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1; Options for the MIPS port of the compiler
2;
2f83c7d6 3; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
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4;
5; This file is part of GCC.
6;
7; GCC is free software; you can redistribute it and/or modify it under
8; the terms of the GNU General Public License as published by the Free
2f83c7d6 9; Software Foundation; either version 3, or (at your option) any later
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10; version.
11;
12; GCC is distributed in the hope that it will be useful, but WITHOUT
13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15; License for more details.
16;
17; You should have received a copy of the GNU General Public License
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18; along with GCC; see the file COPYING3. If not see
19; <http://www.gnu.org/licenses/>.
3ad7bb65 20
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21mabi=
22Target RejectNegative Joined
23-mabi=ABI Generate code that conforms to the given ABI
24
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25mabicalls
26Target Report Mask(ABICALLS)
d9870b7e 27Generate code that can be used in SVR4-style dynamic objects
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28
29mad
30Target Report Var(TARGET_MAD)
31Use PMC-style 'mad' instructions
32
d522e7a2 33march=
55bea00a 34Target RejectNegative Joined Var(mips_arch_string)
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35-march=ISA Generate code for the given ISA
36
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37mbranch-cost=
38Target RejectNegative Joined UInteger Var(mips_branch_cost)
39-mbranch-cost=COST Set the cost of branches to roughly COST instructions
40
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41mbranch-likely
42Target Report Mask(BRANCHLIKELY)
43Use Branch Likely instructions, overriding the architecture default
44
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45mflip-mips16
46Target Report Var(TARGET_FLIP_MIPS16)
47Switch on/off MIPS16 ASE on alternating functions for compiler testing
48
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49mcheck-zero-division
50Target Report Mask(CHECK_ZERO_DIV)
51Trap on integer divide by zero
52
53mdivide-breaks
25e3d99d 54Target Report RejectNegative Mask(DIVIDE_BREAKS)
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55Use branch-and-break sequences to check for integer divide by zero
56
57mdivide-traps
25e3d99d 58Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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59Use trap instructions to check for integer divide by zero
60
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61mdmx
62Target Report RejectNegative Var(TARGET_MDMX)
63Allow the use of MDMX instructions
64
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65mdouble-float
66Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
67Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
68
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69mdsp
70Target Report Mask(DSP)
71Use MIPS-DSP instructions
72
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73mdspr2
74Target Report Mask(DSPR2)
75Use MIPS-DSP REV 2 instructions
76
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77mdebug
78Target Var(TARGET_DEBUG_MODE) Undocumented
79
80mdebugd
81Target Var(TARGET_DEBUG_D_MODE) Undocumented
82
83meb
84Target Report RejectNegative Mask(BIG_ENDIAN)
85Use big-endian byte order
86
87mel
88Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
89Use little-endian byte order
90
91membedded-data
92Target Report Var(TARGET_EMBEDDED_DATA)
93Use ROM instead of RAM
94
95mexplicit-relocs
96Target Report Mask(EXPLICIT_RELOCS)
97Use NewABI-style %reloc() assembly operators
98
99mfix-r4000
100Target Report Mask(FIX_R4000)
101Work around certain R4000 errata
102
103mfix-r4400
104Target Report Mask(FIX_R4400)
105Work around certain R4400 errata
106
107mfix-sb1
108Target Report Var(TARGET_FIX_SB1)
109Work around errata for early SB-1 revision 2 cores
110
111mfix-vr4120
112Target Report Var(TARGET_FIX_VR4120)
113Work around certain VR4120 errata
114
115mfix-vr4130
116Target Report Var(TARGET_FIX_VR4130)
117Work around VR4130 mflo/mfhi errata
118
119mfix4300
120Target Report Var(TARGET_4300_MUL_FIX)
121Work around an early 4300 hardware bug
122
123mfp-exceptions
124Target Report Mask(FP_EXCEPTIONS)
125FP exceptions are enabled
126
127mfp32
128Target Report RejectNegative InverseMask(FLOAT64)
129Use 32-bit floating-point registers
130
131mfp64
132Target Report RejectNegative Mask(FLOAT64)
133Use 64-bit floating-point registers
134
d522e7a2 135mflush-func=
55bea00a 136Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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137-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
138
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139mfused-madd
140Target Report Mask(FUSED_MADD)
141Generate floating-point multiply-add instructions
142
143mgp32
144Target Report RejectNegative InverseMask(64BIT)
145Use 32-bit general registers
146
147mgp64
148Target Report RejectNegative Mask(64BIT)
149Use 64-bit general registers
150
151mhard-float
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152Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
153Allow the use of hardware floating-point ABI and instructions
21c425ee 154
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155mips
156Target RejectNegative Joined
157-mipsN Generate code for ISA level N
158
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159mips16
160Target Report RejectNegative Mask(MIPS16)
500fc425 161Generate MIPS16 code
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162
163mips3d
164Target Report RejectNegative Mask(MIPS3D)
165Use MIPS-3D instructions
166
167mlong-calls
168Target Report Var(TARGET_LONG_CALLS)
169Use indirect calls
170
171mlong32
172Target Report RejectNegative InverseMask(LONG64, LONG32)
173Use a 32-bit long type
174
175mlong64
176Target Report RejectNegative Mask(LONG64)
177Use a 64-bit long type
178
179mmemcpy
cfa31150 180Target Report Mask(MEMCPY)
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181Don't optimize block moves
182
183mmips-tfile
184Target
185Use the mips-tfile postpass
186
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187mmt
188Target Report Var(TARGET_MT)
189Allow the use of MT instructions
190
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191mno-flush-func
192Target RejectNegative
193Do not use a cache-flushing function before calling stack trampolines
194
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195mno-mdmx
196Target Report RejectNegative InverseVar(MDMX)
197Do not use MDMX instructions
198
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199mno-mips16
200Target Report RejectNegative InverseMask(MIPS16)
201Generate normal-mode code
202
203mno-mips3d
204Target Report RejectNegative InverseMask(MIPS3D)
205Do not use MIPS-3D instructions
206
207mpaired-single
208Target Report Mask(PAIRED_SINGLE_FLOAT)
209Use paired-single floating-point instructions
210
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211mshared
212Target Report Var(TARGET_SHARED) Init(1)
213When generating -mabicalls code, make the code suitable for use in shared libraries
214
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215msingle-float
216Target Report RejectNegative Mask(SINGLE_FLOAT)
217Restrict the use of hardware floating-point instructions to 32-bit operations
218
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219msmartmips
220Target Report RejectNegative Mask(SMARTMIPS)
221Use SmartMIPS instructions
222
21c425ee 223msoft-float
cc4ebe7d 224Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
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225Prevent the use of all hardware floating-point instructions
226
227msplit-addresses
228Target Report Mask(SPLIT_ADDRESSES)
229Optimize lui/addiu address loads
230
231msym32
232Target Report Var(TARGET_SYM32)
233Assume all symbols have 32-bit values
234
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235mcode-readable=
236Target RejectNegative Joined
237-mcode-readable=SETTING Specify when instructions are allowed to access code
238
d522e7a2 239mtune=
55bea00a 240Target RejectNegative Joined Var(mips_tune_string)
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241-mtune=PROCESSOR Optimize the output for PROCESSOR
242
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243muninit-const-in-rodata
244Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
245Put uninitialized constants in ROM (needs -membedded-data)
246
247mvr4130-align
248Target Report Mask(VR4130_ALIGN)
249Perform VR4130-specific alignment optimizations
250
251mxgot
252Target Report Var(TARGET_XGOT)
253Lift restrictions on GOT size