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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
3072d30e 2 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
978b9403 3 Free Software Foundation, Inc.
68cbb7e3 4 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
5
581084df 6This file is part of GCC.
68cbb7e3 7
581084df 8GCC is free software; you can redistribute it and/or modify
68cbb7e3 9it under the terms of the GNU General Public License as published by
038d1e19 10the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 11any later version.
12
581084df 13GCC is distributed in the hope that it will be useful,
68cbb7e3 14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
038d1e19 19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
68cbb7e3 21
22#include "config.h"
23#include "system.h"
805e22b2 24#include "coretypes.h"
25#include "tm.h"
68cbb7e3 26#include "rtl.h"
27#include "regs.h"
28#include "hard-reg-set.h"
29#include "hashtab.h"
30#include "insn-config.h"
31#include "output.h"
32#include "flags.h"
33#include "tree.h"
34#include "function.h"
35#include "expr.h"
36#include "toplev.h"
37#include "recog.h"
38#include "ggc.h"
39#include "dwarf2.h"
40#include "debug.h"
41#include "tm_p.h"
42#include "integrate.h"
43#include "target.h"
44#include "target-def.h"
b744252f 45#include "real.h"
68cbb7e3 46
47/* First some local helper definitions. */
48#define MMIX_FIRST_GLOBAL_REGNUM 32
49
50/* We'd need a current_function_has_landing_pad. It's marked as such when
51 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
52 mostly. */
53#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
54
55/* We have no means to tell DWARF 2 about the register stack, so we need
56 to store the return address on the stack if an exception can get into
d3310704 57 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 58 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 59 after reload_completed; it may contain incorrect information some time
60 before that. Within a RTL sequence (after a call to start_sequence,
61 such as in RTL expanders), leaf_function_p doesn't see all insns
62 (perhaps any insn). But regs_ever_live is up-to-date when
63 leaf_function_p () isn't, so we "or" them together to get accurate
64 information. FIXME: Some tweak to leaf_function_p might be
f024691d 65 preferable. */
d3310704 66#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
67 (flag_exceptions \
3072d30e 68 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 69 || !leaf_function_p ()))
68cbb7e3 70
71#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 72 (crtl->calls_eh_return \
68cbb7e3 73 && (EH_RETURN_DATA_REGNO (0) == REGNO \
74 || EH_RETURN_DATA_REGNO (1) == REGNO \
75 || EH_RETURN_DATA_REGNO (2) == REGNO \
76 || EH_RETURN_DATA_REGNO (3) == REGNO))
77
d68ffc6f 78/* For the default ABI, we rename registers at output-time to fill the gap
79 between the (statically partitioned) saved registers and call-clobbered
80 registers. In effect this makes unused call-saved registers to be used
81 as call-clobbered registers. The benefit comes from keeping the number
82 of local registers (value of rL) low, since there's a cost of
d3310704 83 increasing rL and clearing unused (unset) registers with lower numbers.
84 Don't translate while outputting the prologue. */
d68ffc6f 85#define MMIX_OUTPUT_REGNO(N) \
86 (TARGET_ABI_GNU \
0b123c47 87 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
88 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 89 || cfun == NULL \
90 || cfun->machine == NULL \
91 || cfun->machine->in_prologue \
d68ffc6f 92 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
93 + cfun->machine->highest_saved_stack_register + 1))
94
0b123c47 95/* The %d in "POP %d,0". */
96#define MMIX_POP_ARGUMENT() \
97 ((! TARGET_ABI_GNU \
abe32cce 98 && crtl->return_rtx != NULL \
18d50ae6 99 && ! cfun->returns_struct) \
abe32cce 100 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
101 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 102 : 0)
103
68cbb7e3 104/* The canonical saved comparison operands for non-cc0 machines, set in
105 the compare expander. */
106rtx mmix_compare_op0;
107rtx mmix_compare_op1;
108
68cbb7e3 109/* Declarations of locals. */
110
68cbb7e3 111/* Intermediate for insn output. */
112static int mmix_output_destination_register;
113
114static void mmix_output_shiftvalue_op_from_str
7585fcd5 115 (FILE *, const char *, HOST_WIDEST_INT);
116static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
117static void mmix_output_condition (FILE *, rtx, int);
118static HOST_WIDEST_INT mmix_intval (rtx);
119static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
120static bool mmix_assemble_integer (rtx, unsigned int, int);
121static struct machine_function *mmix_init_machine_status (void);
122static void mmix_encode_section_info (tree, rtx, int);
123static const char *mmix_strip_name_encoding (const char *);
124static void mmix_emit_sp_add (HOST_WIDE_INT offset);
125static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
126static void mmix_target_asm_function_end_prologue (FILE *);
127static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
128static void mmix_reorg (void);
6988553d 129static void mmix_asm_output_mi_thunk
7585fcd5 130 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 131static void mmix_setup_incoming_varargs
132 (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
7585fcd5 133static void mmix_file_start (void);
134static void mmix_file_end (void);
135static bool mmix_rtx_costs (rtx, int, int, int *);
9e4a734a 136static rtx mmix_struct_value_rtx (tree, int);
fb80456a 137static bool mmix_pass_by_reference (CUMULATIVE_ARGS *,
138 enum machine_mode, const_tree, bool);
68cbb7e3 139
140/* Target structure macros. Listed by node. See `Using and Porting GCC'
141 for a general description. */
142
143/* Node: Function Entry */
144
58356836 145#undef TARGET_ASM_BYTE_OP
146#define TARGET_ASM_BYTE_OP NULL
147#undef TARGET_ASM_ALIGNED_HI_OP
148#define TARGET_ASM_ALIGNED_HI_OP NULL
149#undef TARGET_ASM_ALIGNED_SI_OP
150#define TARGET_ASM_ALIGNED_SI_OP NULL
151#undef TARGET_ASM_ALIGNED_DI_OP
152#define TARGET_ASM_ALIGNED_DI_OP NULL
153#undef TARGET_ASM_INTEGER
154#define TARGET_ASM_INTEGER mmix_assemble_integer
155
68cbb7e3 156#undef TARGET_ASM_FUNCTION_PROLOGUE
157#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
158
d3310704 159#undef TARGET_ASM_FUNCTION_END_PROLOGUE
160#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
161
68cbb7e3 162#undef TARGET_ASM_FUNCTION_EPILOGUE
163#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
164
7811991d 165#undef TARGET_ENCODE_SECTION_INFO
166#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 167#undef TARGET_STRIP_NAME_ENCODING
168#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 169
6988553d 170#undef TARGET_ASM_OUTPUT_MI_THUNK
171#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 172#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
173#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 174#undef TARGET_ASM_FILE_START
175#define TARGET_ASM_FILE_START mmix_file_start
176#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
177#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 178#undef TARGET_ASM_FILE_END
179#define TARGET_ASM_FILE_END mmix_file_end
6988553d 180
fab7adbf 181#undef TARGET_RTX_COSTS
182#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 183#undef TARGET_ADDRESS_COST
184#define TARGET_ADDRESS_COST hook_int_rtx_0
fab7adbf 185
2efea8c0 186#undef TARGET_MACHINE_DEPENDENT_REORG
187#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
188
9e4a734a 189#undef TARGET_PROMOTE_FUNCTION_ARGS
fb80456a 190#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true
9e4a734a 191#if 0
192/* Apparently not doing TRT if int < register-size. FIXME: Perhaps
193 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
194#undef TARGET_PROMOTE_FUNCTION_RETURN
195#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
196#endif
197
198#undef TARGET_STRUCT_VALUE_RTX
199#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 200#undef TARGET_SETUP_INCOMING_VARARGS
201#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 202#undef TARGET_PASS_BY_REFERENCE
203#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 204#undef TARGET_CALLEE_COPIES
205#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
1eb18897 206#undef TARGET_DEFAULT_TARGET_FLAGS
207#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
9e4a734a 208
68cbb7e3 209struct gcc_target targetm = TARGET_INITIALIZER;
210
211/* Functions that are expansions for target macros.
212 See Target Macros in `Using and Porting GCC'. */
213
214/* OVERRIDE_OPTIONS. */
215
216void
7585fcd5 217mmix_override_options (void)
68cbb7e3 218{
219 /* Should we err or should we warn? Hmm. At least we must neutralize
220 it. For example the wrong kind of case-tables will be generated with
221 PIC; we use absolute address items for mmixal compatibility. FIXME:
222 They could be relative if we just elide them to after all pertinent
223 labels. */
224 if (flag_pic)
225 {
c3ceba8e 226 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 227 flag_pic = 0;
228 }
68cbb7e3 229}
230
231/* INIT_EXPANDERS. */
232
233void
7585fcd5 234mmix_init_expanders (void)
68cbb7e3 235{
236 init_machine_status = mmix_init_machine_status;
237}
238
239/* Set the per-function data. */
240
1f3233d1 241static struct machine_function *
7585fcd5 242mmix_init_machine_status (void)
68cbb7e3 243{
1f3233d1 244 return ggc_alloc_cleared (sizeof (struct machine_function));
68cbb7e3 245}
246
247/* DATA_ALIGNMENT.
248 We have trouble getting the address of stuff that is located at other
249 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 250 at least 32-bit alignment. */
68cbb7e3 251
252int
7585fcd5 253mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 254{
255 if (basic_align < 32)
256 return 32;
257
258 return basic_align;
259}
260
261/* CONSTANT_ALIGNMENT. */
262
263int
7585fcd5 264mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 265{
266 if (basic_align < 32)
267 return 32;
268
269 return basic_align;
270}
271
272/* LOCAL_ALIGNMENT. */
273
274int
7585fcd5 275mmix_local_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 276{
277 if (basic_align < 32)
278 return 32;
279
280 return basic_align;
281}
282
283/* CONDITIONAL_REGISTER_USAGE. */
284
285void
7585fcd5 286mmix_conditional_register_usage (void)
68cbb7e3 287{
288 int i;
289
290 if (TARGET_ABI_GNU)
291 {
292 static const int gnu_abi_reg_alloc_order[]
293 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
294
295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
296 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
297
298 /* Change the default from the mmixware ABI. For the GNU ABI,
299 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 300 call-clobbered local register for the "hole" that holds the
301 number of saved local registers saved by PUSHJ/PUSHGO during the
302 function call, receiving the return value at return. So best is
303 to use the highest, $31. It's already marked call-clobbered for
304 the mmixware ABI. */
68cbb7e3 305 for (i = 15; i <= 30; i++)
306 call_used_regs[i] = 0;
f0b228a5 307
308 /* "Unfix" the parameter registers. */
309 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
310 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
311 i++)
312 fixed_regs[i] = 0;
68cbb7e3 313 }
314
315 /* Step over the ":" in special register names. */
316 if (! TARGET_TOPLEVEL_SYMBOLS)
317 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
318 if (reg_names[i][0] == ':')
319 reg_names[i]++;
320}
321
6d1f3d31 322/* INCOMING_REGNO and OUTGOING_REGNO worker function.
323 Those two macros must only be applied to function argument
324 registers. FIXME: for their current use in gcc, it'd be better
325 with an explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P
326 a'la FUNCTION_ARG / FUNCTION_INCOMING_ARG instead of forcing the
327 target to commit to a fixed mapping and for any unspecified
328 register use. */
329
330int
331mmix_opposite_regno (int regno, int incoming)
332{
333 if (!mmix_function_arg_regno_p (regno, incoming))
334 return regno;
335
336 return
337 regno - (incoming
338 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
339 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
340}
341
d3310704 342/* LOCAL_REGNO.
343 All registers that are part of the register stack and that will be
344 saved are local. */
345
346int
7585fcd5 347mmix_local_regno (int regno)
d3310704 348{
349 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
350}
351
68cbb7e3 352/* PREFERRED_RELOAD_CLASS.
353 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
354
355enum reg_class
7585fcd5 356mmix_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class class)
68cbb7e3 357{
358 /* FIXME: Revisit. */
359 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
360 ? REMAINDER_REG : class;
361}
362
363/* PREFERRED_OUTPUT_RELOAD_CLASS.
364 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
365
366enum reg_class
7585fcd5 367mmix_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED,
368 enum reg_class class)
68cbb7e3 369{
370 /* FIXME: Revisit. */
371 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
372 ? REMAINDER_REG : class;
373}
374
375/* SECONDARY_RELOAD_CLASS.
376 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
377
378enum reg_class
7585fcd5 379mmix_secondary_reload_class (enum reg_class class,
380 enum machine_mode mode ATTRIBUTE_UNUSED,
381 rtx x ATTRIBUTE_UNUSED,
382 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 383{
384 if (class == REMAINDER_REG
385 || class == HIMULT_REG
386 || class == SYSTEM_REGS)
387 return GENERAL_REGS;
388
68cbb7e3 389 return NO_REGS;
390}
391
392/* CONST_OK_FOR_LETTER_P. */
393
394int
7585fcd5 395mmix_const_ok_for_letter_p (HOST_WIDE_INT value, int c)
68cbb7e3 396{
397 return
398 (c == 'I' ? value >= 0 && value <= 255
399 : c == 'J' ? value >= 0 && value <= 65535
400 : c == 'K' ? value <= 0 && value >= -255
401 : c == 'L' ? mmix_shiftable_wyde_value (value)
402 : c == 'M' ? value == 0
403 : c == 'N' ? mmix_shiftable_wyde_value (~value)
404 : c == 'O' ? (value == 3 || value == 5 || value == 9
405 || value == 17)
406 : 0);
407}
408
409/* CONST_DOUBLE_OK_FOR_LETTER_P. */
410
411int
7585fcd5 412mmix_const_double_ok_for_letter_p (rtx value, int c)
68cbb7e3 413{
414 return
415 (c == 'G' ? value == CONST0_RTX (GET_MODE (value))
416 : 0);
417}
418
419/* EXTRA_CONSTRAINT.
420 We need this since our constants are not always expressible as
421 CONST_INT:s, but rather often as CONST_DOUBLE:s. */
422
423int
7585fcd5 424mmix_extra_constraint (rtx x, int c, int strict)
68cbb7e3 425{
426 HOST_WIDEST_INT value;
427
0103ffd2 428 /* When checking for an address, we need to handle strict vs. non-strict
429 register checks. Don't use address_operand, but instead its
430 equivalent (its callee, which it is just a wrapper for),
431 memory_operand_p and the strict-equivalent strict_memory_address_p. */
68cbb7e3 432 if (c == 'U')
0103ffd2 433 return
434 strict
435 ? strict_memory_address_p (Pmode, x)
436 : memory_address_p (Pmode, x);
68cbb7e3 437
f0b228a5 438 /* R asks whether x is to be loaded with GETA or something else. Right
439 now, only a SYMBOL_REF and LABEL_REF can fit for
440 TARGET_BASE_ADDRESSES.
441
442 Only constant symbolic addresses apply. With TARGET_BASE_ADDRESSES,
443 we just allow straight LABEL_REF or SYMBOL_REFs with SYMBOL_REF_FLAG
444 set right now; only function addresses and code labels. If we change
445 to let SYMBOL_REF_FLAG be set on other symbols, we have to check
446 inside CONST expressions. When TARGET_BASE_ADDRESSES is not in
447 effect, a "raw" constant check together with mmix_constant_address_p
448 is all that's needed; we want all constant addresses to be loaded
449 with GETA then. */
450 if (c == 'R')
451 return
452 GET_CODE (x) != CONST_INT && GET_CODE (x) != CONST_DOUBLE
453 && mmix_constant_address_p (x)
454 && (! TARGET_BASE_ADDRESSES
455 || (GET_CODE (x) == LABEL_REF
456 || (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FLAG (x))));
457
68cbb7e3 458 if (GET_CODE (x) != CONST_DOUBLE || GET_MODE (x) != VOIDmode)
459 return 0;
460
461 value = mmix_intval (x);
462
463 /* We used to map Q->J, R->K, S->L, T->N, U->O, but we don't have to any
f0b228a5 464 more ('U' taken for address_operand, 'R' similarly). Some letters map
465 outside of CONST_INT, though; we still use 'S' and 'T'. */
68cbb7e3 466 if (c == 'S')
467 return mmix_shiftable_wyde_value (value);
468 else if (c == 'T')
469 return mmix_shiftable_wyde_value (~value);
470 return 0;
471}
472
473/* DYNAMIC_CHAIN_ADDRESS. */
474
475rtx
7585fcd5 476mmix_dynamic_chain_address (rtx frame)
68cbb7e3 477{
478 /* FIXME: the frame-pointer is stored at offset -8 from the current
479 frame-pointer. Unfortunately, the caller assumes that a
480 frame-pointer is present for *all* previous frames. There should be
481 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
482 return plus_constant (frame, -8);
483}
484
485/* STARTING_FRAME_OFFSET. */
486
487int
7585fcd5 488mmix_starting_frame_offset (void)
68cbb7e3 489{
490 /* The old frame pointer is in the slot below the new one, so
491 FIRST_PARM_OFFSET does not need to depend on whether the
492 frame-pointer is needed or not. We have to adjust for the register
493 stack pointer being located below the saved frame pointer.
494 Similarly, we store the return address on the stack too, for
495 exception handling, and always if we save the register stack pointer. */
496 return
497 (-8
498 + (MMIX_CFUN_HAS_LANDING_PAD
499 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
500}
501
502/* RETURN_ADDR_RTX. */
503
504rtx
7585fcd5 505mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 506{
507 return count == 0
508 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 509 /* FIXME: Set frame_alias_set on the following. (Why?)
510 See mmix_initial_elimination_offset for the reason we can't use
511 get_hard_reg_initial_val for both. Always using a stack slot
512 and not a register would be suboptimal. */
68cbb7e3 513 ? validize_mem (gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, -16)))
514 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
515 : NULL_RTX;
516}
517
518/* SETUP_FRAME_ADDRESSES. */
519
520void
7585fcd5 521mmix_setup_frame_addresses (void)
68cbb7e3 522{
523 /* Nothing needed at the moment. */
524}
525
526/* The difference between the (imaginary) frame pointer and the stack
527 pointer. Used to eliminate the frame pointer. */
528
529int
7585fcd5 530mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 531{
532 int regno;
533 int fp_sp_offset
abe32cce 534 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 535
af08e904 536 /* There is no actual offset between these two virtual values, but for
537 the frame-pointer, we have the old one in the stack position below
538 it, so the offset for the frame-pointer to the stack-pointer is one
539 octabyte larger. */
68cbb7e3 540 if (fromreg == MMIX_ARG_POINTER_REGNUM
541 && toreg == MMIX_FRAME_POINTER_REGNUM)
542 return 0;
543
544 /* The difference is the size of local variables plus the size of
545 outgoing function arguments that would normally be passed as
546 registers but must be passed on stack because we're out of
547 function-argument registers. Only global saved registers are
548 counted; the others go on the register stack.
549
550 The frame-pointer is counted too if it is what is eliminated, as we
551 need to balance the offset for it from STARTING_FRAME_OFFSET.
552
553 Also add in the slot for the register stack pointer we save if we
554 have a landing pad.
555
556 Unfortunately, we can't access $0..$14, from unwinder code easily, so
557 store the return address in a frame slot too. FIXME: Only for
558 non-leaf functions. FIXME: Always with a landing pad, because it's
559 hard to know whether we need the other at the time we know we need
560 the offset for one (and have to state it). It's a kludge until we
561 can express the register stack in the EH frame info.
562
563 We have to do alignment here; get_frame_size will not return a
564 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
565
566 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
567 regno <= 255;
568 regno++)
3072d30e 569 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 570 || IS_MMIX_EH_RETURN_DATA_REG (regno))
571 fp_sp_offset += 8;
572
573 return fp_sp_offset
574 + (MMIX_CFUN_HAS_LANDING_PAD
575 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
576 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
577}
578
579/* Return an rtx for a function argument to go in a register, and 0 for
580 one that must go on stack. */
581
582rtx
7585fcd5 583mmix_function_arg (const CUMULATIVE_ARGS *argsp,
584 enum machine_mode mode,
585 tree type,
586 int named ATTRIBUTE_UNUSED,
587 int incoming)
68cbb7e3 588{
68cbb7e3 589 /* Last-argument marker. */
590 if (type == void_type_node)
591 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
592 ? gen_rtx_REG (mode,
593 (incoming
594 ? MMIX_FIRST_INCOMING_ARG_REGNUM
595 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
596 : NULL_RTX;
597
598 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 599 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 600 && (GET_MODE_BITSIZE (mode) <= 64
601 || argsp->lib
602 || TARGET_LIBFUNC))
603 ? gen_rtx_REG (mode,
604 (incoming
605 ? MMIX_FIRST_INCOMING_ARG_REGNUM
606 : MMIX_FIRST_ARG_REGNUM)
607 + argsp->regs)
608 : NULL_RTX;
609}
610
611/* Returns nonzero for everything that goes by reference, 0 for
612 everything that goes by value. */
613
b981d932 614static bool
fb80456a 615mmix_pass_by_reference (CUMULATIVE_ARGS *argsp, enum machine_mode mode,
616 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 617{
0336f0f0 618 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 619 necessary. */
bef380a4 620 if (targetm.calls.must_pass_in_stack (mode, type))
621 return true;
622
623 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
624 && !TARGET_LIBFUNC
625 && (!argsp || !argsp->lib))
626 return true;
627
628 return false;
68cbb7e3 629}
630
631/* Return nonzero if regno is a register number where a parameter is
632 passed, and 0 otherwise. */
633
634int
7585fcd5 635mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 636{
637 int first_arg_regnum
638 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
639
640 return regno >= first_arg_regnum
641 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
642}
643
644/* FUNCTION_OUTGOING_VALUE. */
645
646rtx
fb80456a 647mmix_function_outgoing_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED)
68cbb7e3 648{
649 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 650 enum machine_mode cmode;
651 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
652 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
653 int i;
654 int nregs;
655
656 /* Return values that fit in a register need no special handling.
657 There's no register hole when parameters are passed in global
658 registers. */
659 if (TARGET_ABI_GNU
660 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
661 return
662 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
663
fb89a8c9 664 if (COMPLEX_MODE_P (mode))
665 /* A complex type, made up of components. */
666 cmode = TYPE_MODE (TREE_TYPE (valtype));
667 else
668 {
669 /* Of the other larger-than-register modes, we only support
670 scalar mode TImode. (At least, that's the only one that's
671 been rudimentally tested.) Make sure we're alerted for
672 unexpected cases. */
673 if (mode != TImode)
674 sorry ("support for mode %qs", GET_MODE_NAME (mode));
675
676 /* In any case, we will fill registers to the natural size. */
677 cmode = DImode;
678 }
679
68cbb7e3 680 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
681
682 /* We need to take care of the effect of the register hole on return
683 values of large sizes; the last register will appear as the first
684 register, with the rest shifted. (For complex modes, this is just
685 swapped registers.) */
686
687 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 688 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 689 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
690
691 /* FIXME: Maybe we should handle structure values like this too
692 (adjusted for BLKmode), perhaps for both ABI:s. */
693 for (i = 0; i < nregs - 1; i++)
694 vec[i]
695 = gen_rtx_EXPR_LIST (VOIDmode,
696 gen_rtx_REG (cmode, first_val_regnum + i),
697 GEN_INT ((i + 1) * BITS_PER_UNIT));
698
699 vec[nregs - 1]
700 = gen_rtx_EXPR_LIST (VOIDmode,
701 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 702 const0_rtx);
68cbb7e3 703
704 return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs, vec));
705}
706
c715d549 707/* FUNCTION_VALUE_REGNO_P. */
708
709int
7585fcd5 710mmix_function_value_regno_p (int regno)
c715d549 711{
712 return regno == MMIX_RETURN_VALUE_REGNUM;
713}
714
68cbb7e3 715/* EH_RETURN_DATA_REGNO. */
716
717int
7585fcd5 718mmix_eh_return_data_regno (int n)
68cbb7e3 719{
720 if (n >= 0 && n < 4)
721 return MMIX_EH_RETURN_DATA_REGNO_START + n;
722
723 return INVALID_REGNUM;
724}
725
726/* EH_RETURN_STACKADJ_RTX. */
727
728rtx
7585fcd5 729mmix_eh_return_stackadj_rtx (void)
68cbb7e3 730{
731 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
732}
733
734/* EH_RETURN_HANDLER_RTX. */
735
736rtx
7585fcd5 737mmix_eh_return_handler_rtx (void)
68cbb7e3 738{
7585fcd5 739 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 740}
741
742/* ASM_PREFERRED_EH_DATA_FORMAT. */
743
744int
7585fcd5 745mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
746 int global ATTRIBUTE_UNUSED)
68cbb7e3 747{
748 /* This is the default (was at 2001-07-20). Revisit when needed. */
749 return DW_EH_PE_absptr;
750}
751
28c2d844 752/* Make a note that we've seen the beginning of the prologue. This
d3310704 753 matters to whether we'll translate register numbers as calculated by
2efea8c0 754 mmix_reorg. */
68cbb7e3 755
d3310704 756static void
7585fcd5 757mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
758 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 759{
d3310704 760 cfun->machine->in_prologue = 1;
761}
68cbb7e3 762
d3310704 763/* Make a note that we've seen the end of the prologue. */
68cbb7e3 764
d3310704 765static void
7585fcd5 766mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 767{
768 cfun->machine->in_prologue = 0;
d68ffc6f 769}
770
2efea8c0 771/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
772 done here; just virtually by calculating the highest saved stack
773 register number used to modify the register numbers at output time. */
d68ffc6f 774
2efea8c0 775static void
7585fcd5 776mmix_reorg (void)
d68ffc6f 777{
778 int regno;
68cbb7e3 779
780 /* We put the number of the highest saved register-file register in a
781 location convenient for the call-patterns to output. Note that we
782 don't tell dwarf2 about these registers, since it can't restore them
783 anyway. */
d68ffc6f 784 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 785 regno >= 0;
786 regno--)
3072d30e 787 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 788 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
789 break;
790
d68ffc6f 791 /* Regardless of whether they're saved (they might be just read), we
792 mustn't include registers that carry parameters. We could scan the
793 insns to see whether they're actually used (and indeed do other less
794 trivial register usage analysis and transformations), but it seems
795 wasteful to optimize for unused parameter registers. As of
3072d30e 796 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 797 that might change. */
abe32cce 798 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 799 {
abe32cce 800 regno = crtl->args.info.regs - 1;
d68ffc6f 801
802 /* We don't want to let this cause us to go over the limit and make
803 incoming parameter registers be misnumbered and treating the last
804 parameter register and incoming return value register call-saved.
805 Stop things at the unmodified scheme. */
806 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
807 regno = MMIX_RETURN_VALUE_REGNUM - 1;
808 }
809
810 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 811}
812
813/* TARGET_ASM_FUNCTION_EPILOGUE. */
814
4448bfa5 815static void
7585fcd5 816mmix_target_asm_function_epilogue (FILE *stream,
817 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 818{
d3310704 819 /* Emit an \n for readability of the generated assembly. */
820 fputc ('\n', stream);
821}
68cbb7e3 822
e7f5e241 823/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 824
6988553d 825static void
7585fcd5 826mmix_asm_output_mi_thunk (FILE *stream,
827 tree fndecl ATTRIBUTE_UNUSED,
828 HOST_WIDE_INT delta,
829 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
830 tree func)
d3310704 831{
6644435d 832 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
833 location of structure to return as invisible first argument), you
834 need to tweak this code too. */
d3310704 835 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 836
d3310704 837 if (delta >= 0 && delta < 65536)
e7f5e241 838 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 839 else if (delta < 0 && delta >= -255)
e7f5e241 840 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 841 else
0b123c47 842 {
d3310704 843 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 844 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 845 }
846
d3310704 847 fprintf (stream, "\tJMP ");
848 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
849 fprintf (stream, "\n");
850}
68cbb7e3 851
d3310704 852/* FUNCTION_PROFILER. */
68cbb7e3 853
d3310704 854void
7585fcd5 855mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
856 int labelno ATTRIBUTE_UNUSED)
d3310704 857{
858 sorry ("function_profiler support for MMIX");
859}
68cbb7e3 860
9e4a734a 861/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
862 let's stick to pushing argument registers on the stack. Later, we
863 can parse all arguments in registers, to improve performance. */
68cbb7e3 864
9e4a734a 865static void
7585fcd5 866mmix_setup_incoming_varargs (CUMULATIVE_ARGS *args_so_farp,
867 enum machine_mode mode,
868 tree vartype,
869 int *pretend_sizep,
870 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 871{
7ccc713a 872 /* The last named variable has been handled, but
873 args_so_farp has not been advanced for it. */
874 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
875 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 876
877 /* We assume that one argument takes up one register here. That should
5aedf60c 878 be true until we start messing with multi-reg parameters. */
68cbb7e3 879 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
880 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
881}
882
68cbb7e3 883/* TRAMPOLINE_SIZE. */
884/* Four 4-byte insns plus two 8-byte values. */
885int mmix_trampoline_size = 32;
886
887
888/* TRAMPOLINE_TEMPLATE. */
889
890void
7585fcd5 891mmix_trampoline_template (FILE *stream)
68cbb7e3 892{
af08e904 893 /* Read a value into the static-chain register and jump somewhere. The
894 static chain is stored at offset 16, and the function address is
895 stored at offset 24. */
68cbb7e3 896 /* FIXME: GCC copies this using *intsize* (tetra), when it should use
897 register size (octa). */
898 fprintf (stream, "\tGETA $255,1F\n\t");
899 fprintf (stream, "LDOU %s,$255,0\n\t",
900 reg_names[MMIX_STATIC_CHAIN_REGNUM]);
901 fprintf (stream, "LDOU $255,$255,8\n\t");
902 fprintf (stream, "GO $255,$255,0\n");
903 fprintf (stream, "1H\tOCTA 0\n\t");
904 fprintf (stream, "OCTA 0\n");
905}
906
907/* INITIALIZE_TRAMPOLINE. */
908/* Set the static chain and function pointer field in the trampoline.
909 We also SYNCID here to be sure (doesn't matter in the simulator, but
910 some day it will). */
911
912void
7585fcd5 913mmix_initialize_trampoline (rtx trampaddr, rtx fnaddr, rtx static_chain)
68cbb7e3 914{
915 emit_move_insn (gen_rtx_MEM (DImode, plus_constant (trampaddr, 16)),
916 static_chain);
917 emit_move_insn (gen_rtx_MEM (DImode,
918 plus_constant (trampaddr, 24)),
919 fnaddr);
920 emit_insn (gen_sync_icache (validize_mem (gen_rtx_MEM (DImode,
921 trampaddr)),
922 GEN_INT (mmix_trampoline_size - 1)));
923}
924
925/* We must exclude constant addresses that have an increment that is not a
926 multiple of four bytes because of restrictions of the GETA
f0b228a5 927 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 928
929int
7585fcd5 930mmix_constant_address_p (rtx x)
68cbb7e3 931{
932 RTX_CODE code = GET_CODE (x);
933 int addend = 0;
f0b228a5 934 /* When using "base addresses", anything constant goes. */
935 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 936
68cbb7e3 937 switch (code)
938 {
939 case LABEL_REF:
940 case SYMBOL_REF:
941 return 1;
942
68cbb7e3 943 case HIGH:
f0b228a5 944 /* FIXME: Don't know how to dissect these. Avoid them for now,
945 except we know they're constants. */
946 return constant_ok;
68cbb7e3 947
948 case CONST_INT:
949 addend = INTVAL (x);
950 break;
951
952 case CONST_DOUBLE:
953 if (GET_MODE (x) != VOIDmode)
954 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 955 return constant_ok;
68cbb7e3 956 addend = CONST_DOUBLE_LOW (x);
957 break;
958
959 case CONST:
960 /* Note that expressions with arithmetic on forward references don't
961 work in mmixal. People using gcc assembly code with mmixal might
962 need to move arrays and such to before the point of use. */
963 if (GET_CODE (XEXP (x, 0)) == PLUS)
964 {
965 rtx x0 = XEXP (XEXP (x, 0), 0);
966 rtx x1 = XEXP (XEXP (x, 0), 1);
967
968 if ((GET_CODE (x0) == SYMBOL_REF
969 || GET_CODE (x0) == LABEL_REF)
970 && (GET_CODE (x1) == CONST_INT
971 || (GET_CODE (x1) == CONST_DOUBLE
972 && GET_MODE (x1) == VOIDmode)))
973 addend = mmix_intval (x1);
974 else
f0b228a5 975 return constant_ok;
68cbb7e3 976 }
977 else
f0b228a5 978 return constant_ok;
68cbb7e3 979 break;
980
981 default:
982 return 0;
983 }
984
f0b228a5 985 return constant_ok || (addend & 3) == 0;
68cbb7e3 986}
987
988/* Return 1 if the address is OK, otherwise 0.
989 Used by GO_IF_LEGITIMATE_ADDRESS. */
990
991int
7585fcd5 992mmix_legitimate_address (enum machine_mode mode ATTRIBUTE_UNUSED,
993 rtx x,
994 int strict_checking)
68cbb7e3 995{
996#define MMIX_REG_OK(X) \
997 ((strict_checking \
998 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
999 || (reg_renumber[REGNO (X)] > 0 \
1000 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1001 || (!strict_checking \
1002 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1003 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1004 || REGNO (X) == ARG_POINTER_REGNUM)))
1005
1006 /* We only accept:
1007 (mem reg)
1008 (mem (plus reg reg))
f0b228a5 1009 (mem (plus reg 0..255)).
1010 unless TARGET_BASE_ADDRESSES, in which case we accept all
1011 (mem constant_address) too. */
68cbb7e3 1012
1013
1014 /* (mem reg) */
1015 if (REG_P (x) && MMIX_REG_OK (x))
1016 return 1;
1017
1018 if (GET_CODE(x) == PLUS)
1019 {
1020 rtx x1 = XEXP (x, 0);
1021 rtx x2 = XEXP (x, 1);
1022
1023 /* Try swapping the order. FIXME: Do we need this? */
1024 if (! REG_P (x1))
1025 {
1026 rtx tem = x1;
1027 x1 = x2;
1028 x2 = tem;
1029 }
1030
f0b228a5 1031 /* (mem (plus (reg?) (?))) */
68cbb7e3 1032 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1033 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1034
f0b228a5 1035 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1036 if (REG_P (x2) && MMIX_REG_OK (x2))
1037 return 1;
1038
f0b228a5 1039 /* (mem (plus (reg) (0..255?))) */
68cbb7e3 1040 if (GET_CODE (x2) == CONST_INT
1041 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1042 return 1;
f0b228a5 1043
1044 return 0;
68cbb7e3 1045 }
1046
f0b228a5 1047 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1048}
1049
1050/* LEGITIMATE_CONSTANT_P. */
1051
1052int
7585fcd5 1053mmix_legitimate_constant_p (rtx x)
68cbb7e3 1054{
1055 RTX_CODE code = GET_CODE (x);
1056
1057 /* We must allow any number due to the way the cse passes works; if we
1058 do not allow any number here, general_operand will fail, and insns
1059 will fatally fail recognition instead of "softly". */
1060 if (code == CONST_INT || code == CONST_DOUBLE)
1061 return 1;
1062
1063 return CONSTANT_ADDRESS_P (x);
1064}
1065
1066/* SELECT_CC_MODE. */
1067
1068enum machine_mode
7585fcd5 1069mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1070{
1071 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1072 output different compare insns. Note that we do not check the
1073 validity of the comparison here. */
1074
1075 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1076 {
1077 if (op == ORDERED || op == UNORDERED || op == UNGE
1078 || op == UNGT || op == UNLE || op == UNLT)
1079 return CC_FUNmode;
1080
1081 if (op == EQ || op == NE)
1082 return CC_FPEQmode;
1083
1084 return CC_FPmode;
1085 }
1086
1087 if (op == GTU || op == LTU || op == GEU || op == LEU)
1088 return CC_UNSmode;
1089
1090 return CCmode;
1091}
1092
68cbb7e3 1093/* REVERSIBLE_CC_MODE. */
1094
1095int
7585fcd5 1096mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1097{
1098 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1099 compares. */
68cbb7e3 1100 return mode != CC_FPmode;
1101}
1102
fab7adbf 1103/* TARGET_RTX_COSTS. */
68cbb7e3 1104
fab7adbf 1105static bool
7585fcd5 1106mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1107 int code ATTRIBUTE_UNUSED,
1108 int outer_code ATTRIBUTE_UNUSED,
1109 int *total ATTRIBUTE_UNUSED)
68cbb7e3 1110{
1111 /* For the time being, this is just a stub and we'll accept the
1112 generic calculations, until we can do measurements, at least.
1113 Say we did not modify any calculated costs. */
fab7adbf 1114 return false;
68cbb7e3 1115}
1116
68cbb7e3 1117/* REGISTER_MOVE_COST. */
1118
1119int
7585fcd5 1120mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
1121 enum reg_class from,
1122 enum reg_class to)
68cbb7e3 1123{
1124 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1125}
1126
1127/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1128 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1129 the target. */
1130
1131/* DATA_SECTION_ASM_OP. */
1132
1133const char *
7585fcd5 1134mmix_data_section_asm_op (void)
68cbb7e3 1135{
1136 return "\t.data ! mmixal:= 8H LOC 9B";
1137}
1138
7811991d 1139static void
7585fcd5 1140mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1141{
1142 /* Test for an external declaration, and do nothing if it is one. */
1143 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1144 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1145 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1146 ;
ae484cc8 1147 else if (first && DECL_P (decl))
68cbb7e3 1148 {
1149 /* For non-visible declarations, add a "@" prefix, which we skip
1150 when the label is output. If the label does not have this
f0b228a5 1151 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1152
1153 Note that this does not work for data that is declared extern and
1154 later defined as static. If there's code in between, that code
f0b228a5 1155 will refer to the extern declaration, and vice versa. This just
1156 means that when -mtoplevel-symbols is in use, we can just handle
1157 well-behaved ISO-compliant code. */
68cbb7e3 1158
2c129d70 1159 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1160 int len = strlen (str);
b948ae2f 1161 char *newstr = alloca (len + 2);
1162 newstr[0] = '@';
68cbb7e3 1163 strcpy (newstr + 1, str);
b948ae2f 1164 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1165 }
1166
f0b228a5 1167 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1168 may need different options to reach for different things with GETA.
1169 For now, functions and things we know or have been told are constant. */
1170 if (TREE_CODE (decl) == FUNCTION_DECL
1171 || TREE_CONSTANT (decl)
1172 || (TREE_CODE (decl) == VAR_DECL
1173 && TREE_READONLY (decl)
1174 && !TREE_SIDE_EFFECTS (decl)
1175 && (!DECL_INITIAL (decl)
1176 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1177 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1178}
1179
7b4a38a6 1180static const char *
7585fcd5 1181mmix_strip_name_encoding (const char *name)
68cbb7e3 1182{
1183 for (; (*name == '@' || *name == '*'); name++)
1184 ;
1185
1186 return name;
1187}
1188
92c473b8 1189/* TARGET_ASM_FILE_START.
1190 We just emit a little comment for the time being. */
68cbb7e3 1191
92c473b8 1192static void
7585fcd5 1193mmix_file_start (void)
68cbb7e3 1194{
92c473b8 1195 default_file_start ();
68cbb7e3 1196
92c473b8 1197 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1198
1d60d981 1199 /* Make sure each file starts with the text section. */
2f14b1f9 1200 switch_to_section (text_section);
68cbb7e3 1201}
1202
f6940372 1203/* TARGET_ASM_FILE_END. */
68cbb7e3 1204
f6940372 1205static void
7585fcd5 1206mmix_file_end (void)
68cbb7e3 1207{
1d60d981 1208 /* Make sure each file ends with the data section. */
2f14b1f9 1209 switch_to_section (data_section);
68cbb7e3 1210}
1211
68cbb7e3 1212/* ASM_OUTPUT_SOURCE_FILENAME. */
1213
1214void
7585fcd5 1215mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1216{
1217 fprintf (stream, "# 1 ");
1218 OUTPUT_QUOTED_STRING (stream, name);
1219 fprintf (stream, "\n");
1220}
1221
1222/* OUTPUT_QUOTED_STRING. */
1223
1224void
7585fcd5 1225mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1226{
1227 const char * string_end = string + length;
25037517 1228 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1229
1230 /* Output "any character except newline and double quote character". We
1231 play it safe and avoid all control characters too. We also do not
1232 want [] as characters, should input be passed through m4 with [] as
1233 quotes. Further, we avoid "\", because the GAS port handles it as a
1234 quoting character. */
1235 while (string < string_end)
1236 {
1237 if (*string
1238 && (unsigned char) *string < 128
1239 && !ISCNTRL (*string)
1240 && strchr (unwanted_chars, *string) == NULL)
1241 {
1242 fputc ('"', stream);
1243 while (*string
1244 && (unsigned char) *string < 128
1245 && !ISCNTRL (*string)
1246 && strchr (unwanted_chars, *string) == NULL
1247 && string < string_end)
1248 {
1249 fputc (*string, stream);
1250 string++;
1251 }
1252 fputc ('"', stream);
1253 if (string < string_end)
1254 fprintf (stream, ",");
1255 }
1256 if (string < string_end)
1257 {
1258 fprintf (stream, "#%x", *string & 255);
1259 string++;
1260 if (string < string_end)
1261 fprintf (stream, ",");
1262 }
1263 }
1264}
1265
58356836 1266/* Target hook for assembling integer objects. Use mmix_print_operand
1267 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1268 CONST_DOUBLEs. */
68cbb7e3 1269
58356836 1270static bool
7585fcd5 1271mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1272{
58356836 1273 if (aligned_p)
1274 switch (size)
1275 {
4f4e478d 1276 /* We handle a limited number of types of operands in here. But
1277 that's ok, because we can punt to generic functions. We then
5c3d1711 1278 pretend that aligned data isn't needed, so the usual .<pseudo>
1279 syntax is used (which works for aligned data too). We actually
1280 *must* do that, since we say we don't have simple aligned
1281 pseudos, causing this function to be called. We just try and
1282 keep as much compatibility as possible with mmixal syntax for
1283 normal cases (i.e. without GNU extensions and C only). */
58356836 1284 case 1:
4f4e478d 1285 if (GET_CODE (x) != CONST_INT)
1286 {
1287 aligned_p = 0;
1288 break;
1289 }
58356836 1290 fputs ("\tBYTE\t", asm_out_file);
1291 mmix_print_operand (asm_out_file, x, 'B');
1292 fputc ('\n', asm_out_file);
1293 return true;
1294
1295 case 2:
4f4e478d 1296 if (GET_CODE (x) != CONST_INT)
1297 {
1298 aligned_p = 0;
1299 break;
1300 }
58356836 1301 fputs ("\tWYDE\t", asm_out_file);
1302 mmix_print_operand (asm_out_file, x, 'W');
1303 fputc ('\n', asm_out_file);
1304 return true;
1305
1306 case 4:
60bb373d 1307 if (GET_CODE (x) != CONST_INT)
4f4e478d 1308 {
1309 aligned_p = 0;
1310 break;
1311 }
58356836 1312 fputs ("\tTETRA\t", asm_out_file);
1313 mmix_print_operand (asm_out_file, x, 'L');
1314 fputc ('\n', asm_out_file);
1315 return true;
1316
1317 case 8:
7f81c162 1318 /* We don't get here anymore for CONST_DOUBLE, because DImode
1319 isn't expressed as CONST_DOUBLE, and DFmode is handled
1320 elsewhere. */
1321 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1322 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1323 return true;
1324 }
1325 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1326}
1327
1328/* ASM_OUTPUT_ASCII. */
1329
1330void
7585fcd5 1331mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1332{
1333 while (length > 0)
1334 {
1335 int chunk_size = length > 60 ? 60 : length;
1336 fprintf (stream, "\tBYTE ");
1337 mmix_output_quoted_string (stream, string, chunk_size);
1338 string += chunk_size;
1339 length -= chunk_size;
1340 fprintf (stream, "\n");
1341 }
1342}
1343
1344/* ASM_OUTPUT_ALIGNED_COMMON. */
1345
1346void
7585fcd5 1347mmix_asm_output_aligned_common (FILE *stream,
1348 const char *name,
1349 int size,
1350 int align)
68cbb7e3 1351{
1352 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1353 express this in a mmixal-compatible way. */
1354 fprintf (stream, "\t.comm\t");
1355 assemble_name (stream, name);
1356 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1357 size, align / BITS_PER_UNIT);
1358}
1359
1360/* ASM_OUTPUT_ALIGNED_LOCAL. */
1361
1362void
7585fcd5 1363mmix_asm_output_aligned_local (FILE *stream,
1364 const char *name,
1365 int size,
1366 int align)
68cbb7e3 1367{
2f14b1f9 1368 switch_to_section (data_section);
68cbb7e3 1369
1370 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1371 assemble_name (stream, name);
1372 fprintf (stream, "\tLOC @+%d\n", size);
1373}
1374
1375/* ASM_OUTPUT_LABEL. */
1376
1377void
7585fcd5 1378mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1379{
1380 assemble_name (stream, name);
1381 fprintf (stream, "\tIS @\n");
1382}
1383
af1c039b 1384/* ASM_OUTPUT_INTERNAL_LABEL. */
1385
1386void
1387mmix_asm_output_internal_label (FILE *stream, const char *name)
1388{
1389 assemble_name_raw (stream, name);
1390 fprintf (stream, "\tIS @\n");
1391}
1392
68cbb7e3 1393/* ASM_DECLARE_REGISTER_GLOBAL. */
1394
1395void
7585fcd5 1396mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1397 tree decl ATTRIBUTE_UNUSED,
1398 int regno ATTRIBUTE_UNUSED,
1399 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1400{
1401 /* Nothing to do here, but there *will* be, therefore the framework is
1402 here. */
1403}
1404
68cbb7e3 1405/* ASM_WEAKEN_LABEL. */
1406
1407void
7585fcd5 1408mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1409 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1410{
7fe1d31c 1411 fprintf (stream, "\t.weak ");
68cbb7e3 1412 assemble_name (stream, name);
7fe1d31c 1413 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1414}
1415
1416/* MAKE_DECL_ONE_ONLY. */
1417
1418void
7585fcd5 1419mmix_make_decl_one_only (tree decl)
68cbb7e3 1420{
1421 DECL_WEAK (decl) = 1;
1422}
1423
1424/* ASM_OUTPUT_LABELREF.
1425 Strip GCC's '*' and our own '@'. No order is assumed. */
1426
1427void
7585fcd5 1428mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1429{
91009d64 1430 int is_extern = 1;
68cbb7e3 1431
1432 for (; (*name == '@' || *name == '*'); name++)
1433 if (*name == '@')
91009d64 1434 is_extern = 0;
68cbb7e3 1435
1436 asm_fprintf (stream, "%s%U%s",
1437 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1438 name);
1439}
1440
68cbb7e3 1441/* ASM_OUTPUT_DEF. */
1442
1443void
7585fcd5 1444mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1445{
1446 assemble_name (stream, name);
1447 fprintf (stream, "\tIS ");
1448 assemble_name (stream, value);
1449 fputc ('\n', stream);
1450}
1451
68cbb7e3 1452/* PRINT_OPERAND. */
1453
1454void
7585fcd5 1455mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1456{
1457 /* When we add support for different codes later, we can, when needed,
1458 drop through to the main handler with a modified operand. */
1459 rtx modified_x = x;
d68ffc6f 1460 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1461
1462 switch (code)
1463 {
1464 /* Unrelated codes are in alphabetic order. */
1465
91009d64 1466 case '+':
1467 /* For conditional branches, output "P" for a probable branch. */
1468 if (TARGET_BRANCH_PREDICT)
1469 {
1470 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
1471 if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
1472 putc ('P', stream);
1473 }
1474 return;
1475
0b123c47 1476 case '.':
1477 /* For the %d in POP %d,0. */
1478 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1479 return;
1480
68cbb7e3 1481 case 'B':
1482 if (GET_CODE (x) != CONST_INT)
1483 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1484 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1485 return;
1486
1487 case 'H':
1488 /* Highpart. Must be general register, and not the last one, as
1489 that one cannot be part of a consecutive register pair. */
d68ffc6f 1490 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1491 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1492
1493 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1494 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1495 return;
1496
1497 case 'L':
1498 /* Lowpart. Must be CONST_INT or general register, and not the last
1499 one, as that one cannot be part of a consecutive register pair. */
1500 if (GET_CODE (x) == CONST_INT)
1501 {
1502 fprintf (stream, "#%lx",
1503 (unsigned long) (INTVAL (x)
1504 & ((unsigned int) 0x7fffffff * 2 + 1)));
1505 return;
1506 }
1507
1508 if (GET_CODE (x) == SYMBOL_REF)
1509 {
1510 output_addr_const (stream, x);
1511 return;
1512 }
1513
d68ffc6f 1514 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1515 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1516
1517 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1518 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1519 return;
1520
1521 /* Can't use 'a' because that's a generic modifier for address
1522 output. */
1523 case 'A':
1524 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1525 ~(unsigned HOST_WIDEST_INT)
1526 mmix_intval (x));
1527 return;
1528
1529 case 'i':
1530 mmix_output_shiftvalue_op_from_str (stream, "INC",
1531 (unsigned HOST_WIDEST_INT)
1532 mmix_intval (x));
1533 return;
1534
1535 case 'o':
1536 mmix_output_shiftvalue_op_from_str (stream, "OR",
1537 (unsigned HOST_WIDEST_INT)
1538 mmix_intval (x));
1539 return;
1540
1541 case 's':
1542 mmix_output_shiftvalue_op_from_str (stream, "SET",
1543 (unsigned HOST_WIDEST_INT)
1544 mmix_intval (x));
1545 return;
1546
1547 case 'd':
1548 case 'D':
1549 mmix_output_condition (stream, x, (code == 'D'));
1550 return;
1551
1552 case 'e':
1553 /* Output an extra "e" to make fcmpe, fune. */
1554 if (TARGET_FCMP_EPSILON)
1555 fprintf (stream, "e");
1556 return;
1557
1558 case 'm':
1559 /* Output the number minus 1. */
1560 if (GET_CODE (x) != CONST_INT)
1561 {
1562 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1563 x);
1564 }
1565 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1566 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1567 return;
1568
1569 case 'p':
1570 /* Store the number of registers we want to save. This was setup
1571 by the prologue. The actual operand contains the number of
1572 registers to pass, but we don't use it currently. Anyway, we
1573 need to output the number of saved registers here. */
d68ffc6f 1574 fprintf (stream, "%d",
1575 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1576 return;
1577
1578 case 'r':
1579 /* Store the register to output a constant to. */
1580 if (! REG_P (x))
68435912 1581 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1582 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1583 return;
1584
1585 case 'I':
1586 /* Output the constant. Note that we use this for floats as well. */
1587 if (GET_CODE (x) != CONST_INT
1588 && (GET_CODE (x) != CONST_DOUBLE
1589 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1590 && GET_MODE (x) != SFmode)))
68435912 1591 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1592 mmix_output_register_setting (stream,
1593 mmix_output_destination_register,
1594 mmix_intval (x), 0);
1595 return;
1596
1597 case 'U':
1598 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1599 if (TARGET_ZERO_EXTEND)
1600 putc ('U', stream);
1601 return;
1602
1603 case 'v':
1604 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1605 return;
1606
1607 case 'V':
1608 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1609 return;
1610
1611 case 'W':
1612 if (GET_CODE (x) != CONST_INT)
1613 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1614 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1615 return;
1616
1617 case 0:
1618 /* Nothing to do. */
1619 break;
1620
1621 default:
1622 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1623 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1624 }
1625
1626 switch (GET_CODE (modified_x))
1627 {
1628 case REG:
d68ffc6f 1629 regno = REGNO (modified_x);
1630 if (regno >= FIRST_PSEUDO_REGISTER)
1631 internal_error ("MMIX Internal: Bad register: %d", regno);
1632 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1633 return;
1634
1635 case MEM:
1636 output_address (XEXP (modified_x, 0));
1637 return;
1638
1639 case CONST_INT:
1640 /* For -2147483648, mmixal complains that the constant does not fit
1641 in 4 bytes, so let's output it as hex. Take care to handle hosts
1642 where HOST_WIDE_INT is longer than an int.
1643
1644 Print small constants +-255 using decimal. */
1645
1646 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1647 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1648 else
1649 fprintf (stream, "#%x",
1650 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1651 return;
1652
1653 case CONST_DOUBLE:
1654 /* Do somewhat as CONST_INT. */
58356836 1655 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1656 return;
1657
1658 case CONST:
1659 output_addr_const (stream, modified_x);
1660 return;
1661
1662 default:
1663 /* No need to test for all strange things. Let output_addr_const do
1664 it for us. */
1665 if (CONSTANT_P (modified_x)
1666 /* Strangely enough, this is not included in CONSTANT_P.
1667 FIXME: Ask/check about sanity here. */
1668 || GET_CODE (modified_x) == CODE_LABEL)
1669 {
1670 output_addr_const (stream, modified_x);
1671 return;
1672 }
1673
1674 /* We need the original here. */
1675 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1676 }
1677}
1678
1679/* PRINT_OPERAND_PUNCT_VALID_P. */
1680
1681int
7585fcd5 1682mmix_print_operand_punct_valid_p (int code ATTRIBUTE_UNUSED)
68cbb7e3 1683{
91009d64 1684 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1685 return code == '+'
1686 /* A '.' is used for the %d in the POP %d,0 return insn. */
1687 || code == '.';
68cbb7e3 1688}
1689
1690/* PRINT_OPERAND_ADDRESS. */
1691
1692void
7585fcd5 1693mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1694{
1695 if (REG_P (x))
1696 {
1697 /* I find the generated assembly code harder to read without
1698 the ",0". */
d68ffc6f 1699 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1700 return;
1701 }
1702 else if (GET_CODE (x) == PLUS)
1703 {
1704 rtx x1 = XEXP (x, 0);
1705 rtx x2 = XEXP (x, 1);
1706
68cbb7e3 1707 if (REG_P (x1))
1708 {
d68ffc6f 1709 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1710
1711 if (REG_P (x2))
1712 {
d68ffc6f 1713 fprintf (stream, "%s",
1714 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1715 return;
1716 }
1717 else if (GET_CODE (x2) == CONST_INT
1718 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1719 {
1720 output_addr_const (stream, x2);
1721 return;
1722 }
1723 }
1724 }
1725
f0b228a5 1726 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (x))
1727 {
1728 output_addr_const (stream, x);
1729 return;
1730 }
1731
68cbb7e3 1732 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1733}
1734
1735/* ASM_OUTPUT_REG_PUSH. */
1736
1737void
7585fcd5 1738mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1739{
1740 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1741 reg_names[MMIX_STACK_POINTER_REGNUM],
1742 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1743 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1744 reg_names[MMIX_STACK_POINTER_REGNUM]);
1745}
1746
1747/* ASM_OUTPUT_REG_POP. */
1748
1749void
7585fcd5 1750mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1751{
1752 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1753 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1754 reg_names[MMIX_STACK_POINTER_REGNUM],
1755 reg_names[MMIX_STACK_POINTER_REGNUM]);
1756}
1757
1758/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1759
1760void
7585fcd5 1761mmix_asm_output_addr_diff_elt (FILE *stream,
1762 rtx body ATTRIBUTE_UNUSED,
1763 int value,
1764 int rel)
68cbb7e3 1765{
1766 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1767}
1768
1769/* ASM_OUTPUT_ADDR_VEC_ELT. */
1770
1771void
7585fcd5 1772mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1773{
1774 fprintf (stream, "\tOCTA L:%d\n", value);
1775}
1776
1777/* ASM_OUTPUT_SKIP. */
1778
1779void
7585fcd5 1780mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1781{
1782 fprintf (stream, "\tLOC @+%d\n", nbytes);
1783}
1784
1785/* ASM_OUTPUT_ALIGN. */
1786
1787void
7585fcd5 1788mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1789{
1790 /* We need to record the needed alignment of this section in the object,
1791 so we have to output an alignment directive. Use a .p2align (not
1792 .align) so people will never have to wonder about whether the
1793 argument is in number of bytes or the log2 thereof. We do it in
1794 addition to the LOC directive, so nothing needs tweaking when
1795 copy-pasting assembly into mmixal. */
1796 fprintf (stream, "\t.p2align %d\n", power);
1797 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1798}
1799
1800/* DBX_REGISTER_NUMBER. */
1801
1802int
7585fcd5 1803mmix_dbx_register_number (int regno)
68cbb7e3 1804{
d68ffc6f 1805 /* Adjust the register number to the one it will be output as, dammit.
1806 It'd be nice if we could check the assumption that we're filling a
1807 gap, but every register between the last saved register and parameter
1808 registers might be a valid parameter register. */
1809 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1810
1811 /* We need to renumber registers to get the number of the return address
1812 register in the range 0..255. It is also space-saving if registers
1813 mentioned in the call-frame information (which uses this function by
1814 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1815 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1816 return regno >= 224 ? (regno - 224) : (regno + 48);
1817}
1818
35a3065a 1819/* End of target macro support functions.
68cbb7e3 1820
7585fcd5 1821 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1822
d3310704 1823/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1824 from insn-emit.c. */
1825
1826rtx
7585fcd5 1827mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1828{
1829 return get_hard_reg_initial_val (mode, regno);
1830}
1831
e911aedf 1832/* Nonzero when the function epilogue is simple enough that a single
d3310704 1833 "POP %d,0" should be used even within the function. */
0b123c47 1834
1835int
7585fcd5 1836mmix_use_simple_return (void)
0b123c47 1837{
1838 int regno;
1839
1840 int stack_space_to_allocate
abe32cce 1841 = (crtl->outgoing_args_size
1842 + crtl->args.pretend_args_size
0b123c47 1843 + get_frame_size () + 7) & ~7;
1844
1845 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1846 return 0;
1847
1848 for (regno = 255;
1849 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1850 regno--)
1851 /* Note that we assume that the frame-pointer-register is one of these
1852 registers, in which case we don't count it here. */
1853 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1854 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1855 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1856 return 0;
1857
1858 if (frame_pointer_needed)
1859 stack_space_to_allocate += 8;
1860
1861 if (MMIX_CFUN_HAS_LANDING_PAD)
1862 stack_space_to_allocate += 16;
1863 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1864 stack_space_to_allocate += 8;
1865
1866 return stack_space_to_allocate == 0;
1867}
1868
d3310704 1869
1870/* Expands the function prologue into RTX. */
1871
1872void
7585fcd5 1873mmix_expand_prologue (void)
d3310704 1874{
1875 HOST_WIDE_INT locals_size = get_frame_size ();
1876 int regno;
1877 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1878 = (crtl->outgoing_args_size
1879 + crtl->args.pretend_args_size
d3310704 1880 + locals_size + 7) & ~7;
1881 HOST_WIDE_INT offset = -8;
1882
1883 /* Add room needed to save global non-register-stack registers. */
1884 for (regno = 255;
1885 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1886 regno--)
1887 /* Note that we assume that the frame-pointer-register is one of these
1888 registers, in which case we don't count it here. */
1889 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1890 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1891 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1892 stack_space_to_allocate += 8;
1893
1894 /* If we do have a frame-pointer, add room for it. */
1895 if (frame_pointer_needed)
1896 stack_space_to_allocate += 8;
1897
1898 /* If we have a non-local label, we need to be able to unwind to it, so
1899 store the current register stack pointer. Also store the return
1900 address if we do that. */
1901 if (MMIX_CFUN_HAS_LANDING_PAD)
1902 stack_space_to_allocate += 16;
1903 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1904 /* If we do have a saved return-address slot, add room for it. */
1905 stack_space_to_allocate += 8;
1906
1907 /* Make sure we don't get an unaligned stack. */
1908 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1909 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1910 stack_space_to_allocate);
1911
abe32cce 1912 if (crtl->args.pretend_args_size)
d3310704 1913 {
1914 int mmix_first_vararg_reg
1915 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1916 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 1917 - crtl->args.pretend_args_size / 8));
d3310704 1918
1919 for (regno
1920 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1921 regno >= mmix_first_vararg_reg;
1922 regno--)
1923 {
1924 if (offset < 0)
1925 {
1926 HOST_WIDE_INT stack_chunk
1927 = stack_space_to_allocate > (256 - 8)
1928 ? (256 - 8) : stack_space_to_allocate;
1929
1930 mmix_emit_sp_add (-stack_chunk);
1931 offset += stack_chunk;
1932 stack_space_to_allocate -= stack_chunk;
1933 }
1934
1935 /* These registers aren't actually saved (as in "will be
1936 restored"), so don't tell DWARF2 they're saved. */
1937 emit_move_insn (gen_rtx_MEM (DImode,
1938 plus_constant (stack_pointer_rtx,
1939 offset)),
1940 gen_rtx_REG (DImode, regno));
1941 offset -= 8;
1942 }
1943 }
1944
1945 /* Store the frame-pointer. */
1946
1947 if (frame_pointer_needed)
1948 {
1949 rtx insn;
1950
1951 if (offset < 0)
1952 {
1953 /* Get 8 less than otherwise, since we need to reach offset + 8. */
1954 HOST_WIDE_INT stack_chunk
1955 = stack_space_to_allocate > (256 - 8 - 8)
1956 ? (256 - 8 - 8) : stack_space_to_allocate;
1957
1958 mmix_emit_sp_add (-stack_chunk);
1959
1960 offset += stack_chunk;
1961 stack_space_to_allocate -= stack_chunk;
1962 }
1963
1964 insn = emit_move_insn (gen_rtx_MEM (DImode,
1965 plus_constant (stack_pointer_rtx,
1966 offset)),
1967 hard_frame_pointer_rtx);
1968 RTX_FRAME_RELATED_P (insn) = 1;
1969 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
1970 stack_pointer_rtx,
1971 GEN_INT (offset + 8)));
1972 RTX_FRAME_RELATED_P (insn) = 1;
1973 offset -= 8;
1974 }
1975
1976 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1977 {
1978 rtx tmpreg, retreg;
1979 rtx insn;
1980
1981 /* Store the return-address, if one is needed on the stack. We
1982 usually store it in a register when needed, but that doesn't work
1983 with -fexceptions. */
1984
1985 if (offset < 0)
1986 {
1987 /* Get 8 less than otherwise, since we need to reach offset + 8. */
1988 HOST_WIDE_INT stack_chunk
1989 = stack_space_to_allocate > (256 - 8 - 8)
1990 ? (256 - 8 - 8) : stack_space_to_allocate;
1991
1992 mmix_emit_sp_add (-stack_chunk);
1993
1994 offset += stack_chunk;
1995 stack_space_to_allocate -= stack_chunk;
1996 }
1997
1998 tmpreg = gen_rtx_REG (DImode, 255);
1999 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2000
2001 /* Dwarf2 code is confused by the use of a temporary register for
2002 storing the return address, so we have to express it as a note,
2003 which we attach to the actual store insn. */
2004 emit_move_insn (tmpreg, retreg);
2005
2006 insn = emit_move_insn (gen_rtx_MEM (DImode,
2007 plus_constant (stack_pointer_rtx,
2008 offset)),
2009 tmpreg);
2010 RTX_FRAME_RELATED_P (insn) = 1;
2011 REG_NOTES (insn)
2012 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
2013 gen_rtx_SET (VOIDmode,
2014 gen_rtx_MEM (DImode,
2015 plus_constant (stack_pointer_rtx,
2016 offset)),
2017 retreg),
2018 REG_NOTES (insn));
2019
2020 offset -= 8;
2021 }
2022 else if (MMIX_CFUN_HAS_LANDING_PAD)
2023 offset -= 8;
2024
2025 if (MMIX_CFUN_HAS_LANDING_PAD)
2026 {
2027 /* Store the register defining the numbering of local registers, so
2028 we know how long to unwind the register stack. */
2029
2030 if (offset < 0)
2031 {
2032 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2033 HOST_WIDE_INT stack_chunk
2034 = stack_space_to_allocate > (256 - 8 - 8)
2035 ? (256 - 8 - 8) : stack_space_to_allocate;
2036
2037 mmix_emit_sp_add (-stack_chunk);
2038
2039 offset += stack_chunk;
2040 stack_space_to_allocate -= stack_chunk;
2041 }
2042
2043 /* We don't tell dwarf2 about this one; we just have it to unwind
2044 the register stack at landing pads. FIXME: It's a kludge because
2045 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2046 register stack at the moment. Best thing would be to handle it
2047 like stack-pointer offsets. Better: some hook into dwarf2out.c
2048 to produce DW_CFA_expression:s that specify the increment of rO,
2049 and unwind it at eh_return (preferred) or at the landing pad.
2050 Then saves to $0..$G-1 could be specified through that register. */
2051
2052 emit_move_insn (gen_rtx_REG (DImode, 255),
2053 gen_rtx_REG (DImode,
2054 MMIX_rO_REGNUM));
2055 emit_move_insn (gen_rtx_MEM (DImode,
2056 plus_constant (stack_pointer_rtx, offset)),
2057 gen_rtx_REG (DImode, 255));
2058 offset -= 8;
2059 }
2060
2061 /* After the return-address and the frame-pointer, we have the local
2062 variables. They're the ones that may have an "unaligned" size. */
2063 offset -= (locals_size + 7) & ~7;
2064
2065 /* Now store all registers that are global, i.e. not saved by the
2066 register file machinery.
2067
2068 It is assumed that the frame-pointer is one of these registers, so it
2069 is explicitly excluded in the count. */
2070
2071 for (regno = 255;
2072 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2073 regno--)
2074 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2075 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2076 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2077 {
2078 rtx insn;
2079
2080 if (offset < 0)
2081 {
2082 HOST_WIDE_INT stack_chunk
2083 = (stack_space_to_allocate > (256 - offset - 8)
2084 ? (256 - offset - 8) : stack_space_to_allocate);
2085
2086 mmix_emit_sp_add (-stack_chunk);
2087 offset += stack_chunk;
2088 stack_space_to_allocate -= stack_chunk;
2089 }
2090
2091 insn = emit_move_insn (gen_rtx_MEM (DImode,
2092 plus_constant (stack_pointer_rtx,
2093 offset)),
2094 gen_rtx_REG (DImode, regno));
2095 RTX_FRAME_RELATED_P (insn) = 1;
2096 offset -= 8;
2097 }
2098
2099 /* Finally, allocate room for outgoing args and local vars if room
2100 wasn't allocated above. */
2101 if (stack_space_to_allocate)
2102 mmix_emit_sp_add (-stack_space_to_allocate);
2103}
2104
2105/* Expands the function epilogue into RTX. */
2106
2107void
7585fcd5 2108mmix_expand_epilogue (void)
d3310704 2109{
2110 HOST_WIDE_INT locals_size = get_frame_size ();
2111 int regno;
2112 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2113 = (crtl->outgoing_args_size
2114 + crtl->args.pretend_args_size
d3310704 2115 + locals_size + 7) & ~7;
2116
d3310704 2117 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2118 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2119
2120 /* Add the space for global non-register-stack registers.
2121 It is assumed that the frame-pointer register can be one of these
2122 registers, in which case it is excluded from the count when needed. */
2123 for (regno = 255;
2124 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2125 regno--)
2126 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2127 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2128 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2129 stack_space_to_deallocate += 8;
2130
2131 /* Add in the space for register stack-pointer. If so, always add room
2132 for the saved PC. */
2133 if (MMIX_CFUN_HAS_LANDING_PAD)
2134 stack_space_to_deallocate += 16;
2135 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2136 /* If we have a saved return-address slot, add it in. */
2137 stack_space_to_deallocate += 8;
2138
2139 /* Add in the frame-pointer. */
2140 if (frame_pointer_needed)
2141 stack_space_to_deallocate += 8;
2142
2143 /* Make sure we don't get an unaligned stack. */
2144 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2145 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2146 stack_space_to_deallocate);
2147
2148 /* We will add back small offsets to the stack pointer as we go.
2149 First, we restore all registers that are global, i.e. not saved by
2150 the register file machinery. */
2151
2152 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2153 regno <= 255;
2154 regno++)
2155 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2156 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2157 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2158 {
2159 if (offset > 255)
2160 {
2161 mmix_emit_sp_add (offset);
2162 stack_space_to_deallocate -= offset;
2163 offset = 0;
2164 }
2165
2166 emit_move_insn (gen_rtx_REG (DImode, regno),
2167 gen_rtx_MEM (DImode,
2168 plus_constant (stack_pointer_rtx,
2169 offset)));
2170 offset += 8;
2171 }
2172
2173 /* Here is where the local variables were. As in the prologue, they
2174 might be of an unaligned size. */
2175 offset += (locals_size + 7) & ~7;
2176
d3310704 2177 /* The saved register stack pointer is just below the frame-pointer
2178 register. We don't need to restore it "manually"; the POP
2179 instruction does that. */
2180 if (MMIX_CFUN_HAS_LANDING_PAD)
2181 offset += 16;
2182 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2183 /* The return-address slot is just below the frame-pointer register.
2184 We don't need to restore it because we don't really use it. */
2185 offset += 8;
2186
2187 /* Get back the old frame-pointer-value. */
2188 if (frame_pointer_needed)
2189 {
2190 if (offset > 255)
2191 {
2192 mmix_emit_sp_add (offset);
2193
2194 stack_space_to_deallocate -= offset;
2195 offset = 0;
2196 }
2197
2198 emit_move_insn (hard_frame_pointer_rtx,
2199 gen_rtx_MEM (DImode,
2200 plus_constant (stack_pointer_rtx,
2201 offset)));
2202 offset += 8;
2203 }
2204
2205 /* We do not need to restore pretended incoming args, just add back
2206 offset to sp. */
2207 if (stack_space_to_deallocate != 0)
2208 mmix_emit_sp_add (stack_space_to_deallocate);
2209
18d50ae6 2210 if (crtl->calls_eh_return)
d3310704 2211 /* Adjust the (normal) stack-pointer to that of the receiver.
2212 FIXME: It would be nice if we could also adjust the register stack
2213 here, but we need to express it through DWARF 2 too. */
2214 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2215 gen_rtx_REG (DImode,
2216 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2217}
2218
68cbb7e3 2219/* Output an optimal sequence for setting a register to a specific
2220 constant. Used in an alternative for const_ints in movdi, and when
2221 using large stack-frame offsets.
2222
2223 Use do_begin_end to say if a line-starting TAB and newline before the
2224 first insn and after the last insn is wanted. */
2225
2226void
7585fcd5 2227mmix_output_register_setting (FILE *stream,
2228 int regno,
2229 HOST_WIDEST_INT value,
2230 int do_begin_end)
68cbb7e3 2231{
2232 if (do_begin_end)
2233 fprintf (stream, "\t");
2234
2235 if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
2236 {
2237 /* First, the one-insn cases. */
2238 mmix_output_shiftvalue_op_from_str (stream, "SET",
2239 (unsigned HOST_WIDEST_INT)
2240 value);
2241 fprintf (stream, " %s,", reg_names[regno]);
2242 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2243 }
2244 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2245 {
2246 /* We do this to get a bit more legible assembly code. The next
2247 alternative is mostly redundant with this. */
2248
2249 mmix_output_shiftvalue_op_from_str (stream, "SET",
2250 -(unsigned HOST_WIDEST_INT)
2251 value);
2252 fprintf (stream, " %s,", reg_names[regno]);
2253 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2254 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2255 reg_names[regno]);
2256 }
2257 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2258 {
2259 /* Slightly more expensive, the two-insn cases. */
2260
2261 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2262 is shiftable, or any other one-insn transformation of the value.
2263 FIXME: Check first if the value is "shiftable" by two loading
2264 with two insns, since it makes more readable assembly code (if
2265 anyone else cares). */
2266
2267 mmix_output_shiftvalue_op_from_str (stream, "SET",
2268 ~(unsigned HOST_WIDEST_INT)
2269 value);
2270 fprintf (stream, " %s,", reg_names[regno]);
2271 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2272 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2273 reg_names[regno]);
2274 }
2275 else
2276 {
2277 /* The generic case. 2..4 insns. */
25037517 2278 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2279 const char *op = "SET";
2280 const char *line_begin = "";
f0b228a5 2281 int insns = 0;
68cbb7e3 2282 int i;
f0b228a5 2283 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2284
f0b228a5 2285 /* Compute the number of insns needed to output this constant. */
2286 for (i = 0; i < 4 && tmpvalue != 0; i++)
2287 {
2288 if (tmpvalue & 65535)
2289 insns++;
2290 tmpvalue >>= 16;
2291 }
2292 if (TARGET_BASE_ADDRESSES && insns == 3)
2293 {
2294 /* The number three is based on a static observation on
2295 ghostscript-6.52. Two and four are excluded because there
2296 are too many such constants, and each unique constant (maybe
2297 offset by 1..255) were used few times compared to other uses,
2298 e.g. addresses.
2299
2300 We use base-plus-offset addressing to force it into a global
2301 register; we just use a "LDA reg,VALUE", which will cause the
2302 assembler and linker to DTRT (for constants as well as
2303 addresses). */
2304 fprintf (stream, "LDA %s,", reg_names[regno]);
2305 mmix_output_octa (stream, value, 0);
2306 }
2307 else
68cbb7e3 2308 {
f0b228a5 2309 /* Output pertinent parts of the 4-wyde sequence.
2310 Still more to do if we want this to be optimal, but hey...
2311 Note that the zero case has been handled above. */
2312 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2313 {
f0b228a5 2314 if (value & 65535)
2315 {
2316 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2317 higher_parts[i], reg_names[regno],
2318 (int) (value & 65535));
2319 /* The first one sets the rest of the bits to 0, the next
2320 ones add set bits. */
2321 op = "INC";
2322 line_begin = "\n\t";
2323 }
68cbb7e3 2324
f0b228a5 2325 value >>= 16;
2326 }
68cbb7e3 2327 }
2328 }
2329
2330 if (do_begin_end)
2331 fprintf (stream, "\n");
2332}
2333
2334/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2335 else return 0. */
2336
2337int
7585fcd5 2338mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2339{
2340 /* Shift by 16 bits per group, stop when we've found two groups with
2341 nonzero bits. */
2342 int i;
2343 int has_candidate = 0;
2344
2345 for (i = 0; i < 4; i++)
2346 {
2347 if (value & 65535)
2348 {
2349 if (has_candidate)
2350 return 0;
2351 else
2352 has_candidate = 1;
2353 }
2354
2355 value >>= 16;
2356 }
2357
2358 return 1;
2359}
2360
68cbb7e3 2361/* Returns zero if code and mode is not a valid condition from a
2362 compare-type insn. Nonzero if it is. The parameter op, if non-NULL,
2363 is the comparison of mode is CC-somethingmode. */
2364
2365int
7585fcd5 2366mmix_valid_comparison (RTX_CODE code, enum machine_mode mode, rtx op)
68cbb7e3 2367{
2368 if (mode == VOIDmode && op != NULL_RTX)
2369 mode = GET_MODE (op);
2370
2371 /* We don't care to look at these, they should always be valid. */
2372 if (mode == CCmode || mode == CC_UNSmode || mode == DImode)
2373 return 1;
2374
2375 if ((mode == CC_FPmode || mode == DFmode)
2376 && (code == GT || code == LT))
2377 return 1;
2378
2379 if ((mode == CC_FPEQmode || mode == DFmode)
2380 && (code == EQ || code == NE))
2381 return 1;
2382
2383 if ((mode == CC_FUNmode || mode == DFmode)
2384 && (code == ORDERED || code == UNORDERED))
2385 return 1;
2386
2387 return 0;
2388}
2389
2390/* X and Y are two things to compare using CODE. Emit a compare insn if
2391 possible and return the rtx for the cc-reg in the proper mode, or
2392 NULL_RTX if this is not a valid comparison. */
2393
2394rtx
7585fcd5 2395mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2396{
2397 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
2398 rtx cc_reg;
2399
2400 /* FIXME: Do we get constants here? Of double mode? */
2401 enum machine_mode mode
2402 = GET_MODE (x) == VOIDmode
2403 ? GET_MODE (y)
2404 : GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT ? DFmode : DImode;
2405
2406 if (! mmix_valid_comparison (code, mode, x))
2407 return NULL_RTX;
2408
2409 cc_reg = gen_reg_rtx (ccmode);
2410
2411 /* FIXME: Can we avoid emitting a compare insn here? */
2412 if (! REG_P (x) && ! REG_P (y))
2413 x = force_reg (mode, x);
2414
68cbb7e3 2415 /* If it's not quite right yet, put y in a register. */
2416 if (! REG_P (y)
2417 && (GET_CODE (y) != CONST_INT
2418 || ! CONST_OK_FOR_LETTER_P (INTVAL (y), 'I')))
2419 y = force_reg (mode, y);
2420
2421 emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
2422 gen_rtx_COMPARE (ccmode, x, y)));
2423
2424 return cc_reg;
2425}
2426
2427/* Local (static) helper functions. */
2428
d3310704 2429static void
7585fcd5 2430mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2431{
2432 rtx insn;
2433
2434 if (offset < 0)
2435 {
2436 /* Negative stack-pointer adjustments are allocations and appear in
2437 the prologue only. We mark them as frame-related so unwind and
2438 debug info is properly emitted for them. */
2439 if (offset > -255)
2440 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2441 stack_pointer_rtx,
2442 GEN_INT (offset)));
2443 else
2444 {
2445 rtx tmpr = gen_rtx_REG (DImode, 255);
2446 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2447 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2448 stack_pointer_rtx, tmpr));
2449 }
2450 RTX_FRAME_RELATED_P (insn) = 1;
2451 }
2452 else
2453 {
2454 /* Positive adjustments are in the epilogue only. Don't mark them
2455 as "frame-related" for unwind info. */
2456 if (CONST_OK_FOR_LETTER_P (offset, 'L'))
2457 emit_insn (gen_adddi3 (stack_pointer_rtx,
2458 stack_pointer_rtx,
2459 GEN_INT (offset)));
2460 else
2461 {
2462 rtx tmpr = gen_rtx_REG (DImode, 255);
2463 emit_move_insn (tmpr, GEN_INT (offset));
2464 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2465 stack_pointer_rtx, tmpr));
2466 }
2467 }
2468}
2469
68cbb7e3 2470/* Print operator suitable for doing something with a shiftable
ebb11c7b 2471 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2472
2473static void
7585fcd5 2474mmix_output_shiftvalue_op_from_str (FILE *stream,
2475 const char *mainop,
2476 HOST_WIDEST_INT value)
68cbb7e3 2477{
25037517 2478 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2479 int i;
2480
2481 if (! mmix_shiftable_wyde_value (value))
2482 {
2483 char s[sizeof ("0xffffffffffffffff")];
2484 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2485 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2486 }
2487
2488 for (i = 0; i < 4; i++)
2489 {
2490 /* We know we're through when we find one-bits in the low
2491 16 bits. */
2492 if (value & 0xffff)
2493 {
2494 fprintf (stream, "%s%s", mainop, op_part[i]);
2495 return;
2496 }
2497 value >>= 16;
2498 }
2499
2500 /* No bits set? Then it must have been zero. */
2501 fprintf (stream, "%sL", mainop);
2502}
2503
2504/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2505
2506static void
7585fcd5 2507mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2508{
2509 /* Snipped from final.c:output_addr_const. We need to avoid the
2510 presumed universal "0x" prefix. We can do it by replacing "0x" with
2511 "#0" here; we must avoid a space in the operands and no, the zero
2512 won't cause the number to be assumed in octal format. */
2513 char hex_format[sizeof (HOST_WIDEST_INT_PRINT_HEX)];
2514
2515 if (do_begin_end)
2516 fprintf (stream, "\tOCTA ");
2517
2518 strcpy (hex_format, HOST_WIDEST_INT_PRINT_HEX);
2519 hex_format[0] = '#';
2520 hex_format[1] = '0';
2521
2522 /* Provide a few alternative output formats depending on the number, to
2523 improve legibility of assembler output. */
2524 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2525 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2526 fprintf (stream, "%d", (int) value);
2527 else if (value > (HOST_WIDEST_INT) 0
2528 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2529 fprintf (stream, "#%x", (unsigned int) value);
2530 else
2531 fprintf (stream, hex_format, value);
2532
2533 if (do_begin_end)
2534 fprintf (stream, "\n");
2535}
2536
2537/* Print the presumed shiftable wyde argument shifted into place (to
2538 be output with an operand). */
2539
2540static void
7585fcd5 2541mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2542{
2543 int i;
2544
2545 if (! mmix_shiftable_wyde_value (value))
2546 {
2547 char s[16+2+1];
2548 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2549 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2550 }
2551
2552 for (i = 0; i < 4; i++)
68cbb7e3 2553 {
7585fcd5 2554 /* We know we're through when we find one-bits in the low 16 bits. */
2555 if (value & 0xffff)
2556 {
2557 fprintf (stream, "#%x", (int) (value & 0xffff));
2558 return;
2559 }
68cbb7e3 2560
2561 value >>= 16;
2562 }
2563
2564 /* No bits set? Then it must have been zero. */
2565 fprintf (stream, "0");
2566}
2567
2568/* Output an MMIX condition name corresponding to an operator
2569 and operands:
2570 (comparison_operator [(comparison_operator ...) (const_int 0)])
2571 which means we have to look at *two* operators.
2572
2573 The argument "reversed" refers to reversal of the condition (not the
2574 same as swapping the arguments). */
2575
2576static void
7585fcd5 2577mmix_output_condition (FILE *stream, rtx x, int reversed)
68cbb7e3 2578{
2579 struct cc_conv
2580 {
2581 RTX_CODE cc;
2582
2583 /* The normal output cc-code. */
2584 const char *const normal;
2585
2586 /* The reversed cc-code, or NULL if invalid. */
2587 const char *const reversed;
2588 };
2589
2590 struct cc_type_conv
2591 {
2592 enum machine_mode cc_mode;
2593
21f1e711 2594 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2595 const struct cc_conv *const convs;
2596 };
2597
2598#undef CCEND
21f1e711 2599#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2600
2601 static const struct cc_conv cc_fun_convs[]
2602 = {{ORDERED, "Z", "P"},
2603 {UNORDERED, "P", "Z"},
2604 CCEND};
2605 static const struct cc_conv cc_fp_convs[]
2606 = {{GT, "P", NULL},
2607 {LT, "N", NULL},
2608 CCEND};
2609 static const struct cc_conv cc_fpeq_convs[]
2610 = {{NE, "Z", "P"},
2611 {EQ, "P", "Z"},
2612 CCEND};
2613 static const struct cc_conv cc_uns_convs[]
2614 = {{GEU, "NN", "N"},
2615 {GTU, "P", "NP"},
2616 {LEU, "NP", "P"},
2617 {LTU, "N", "NN"},
2618 CCEND};
2619 static const struct cc_conv cc_signed_convs[]
2620 = {{NE, "NZ", "Z"},
2621 {EQ, "Z", "NZ"},
2622 {GE, "NN", "N"},
2623 {GT, "P", "NP"},
2624 {LE, "NP", "P"},
2625 {LT, "N", "NN"},
2626 CCEND};
2627 static const struct cc_conv cc_di_convs[]
2628 = {{NE, "NZ", "Z"},
2629 {EQ, "Z", "NZ"},
2630 {GE, "NN", "N"},
2631 {GT, "P", "NP"},
2632 {LE, "NP", "P"},
2633 {LT, "N", "NN"},
2634 {GTU, "NZ", "Z"},
2635 {LEU, "Z", "NZ"},
2636 CCEND};
2637#undef CCEND
2638
2639 static const struct cc_type_conv cc_convs[]
2640 = {{CC_FUNmode, cc_fun_convs},
2641 {CC_FPmode, cc_fp_convs},
2642 {CC_FPEQmode, cc_fpeq_convs},
2643 {CC_UNSmode, cc_uns_convs},
2644 {CCmode, cc_signed_convs},
2645 {DImode, cc_di_convs}};
2646
3585dac7 2647 size_t i;
68cbb7e3 2648 int j;
2649
2650 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2651 RTX_CODE cc = GET_CODE (x);
2652
3585dac7 2653 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2654 {
2655 if (mode == cc_convs[i].cc_mode)
2656 {
21f1e711 2657 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2658 if (cc == cc_convs[i].convs[j].cc)
2659 {
2660 const char *mmix_cc
2661 = (reversed ? cc_convs[i].convs[j].reversed
2662 : cc_convs[i].convs[j].normal);
2663
2664 if (mmix_cc == NULL)
2665 fatal_insn ("MMIX Internal: Trying to output invalidly\
2666 reversed condition:", x);
2667
2668 fprintf (stream, "%s", mmix_cc);
2669 return;
2670 }
2671
2672 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2673 }
2674 }
2675
2676 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2677}
2678
2679/* Return the bit-value for a const_int or const_double. */
2680
2681static HOST_WIDEST_INT
7585fcd5 2682mmix_intval (rtx x)
68cbb7e3 2683{
2684 unsigned HOST_WIDEST_INT retval;
2685
2686 if (GET_CODE (x) == CONST_INT)
2687 return INTVAL (x);
2688
2689 /* We make a little song and dance because converting to long long in
2690 gcc-2.7.2 is broken. I still want people to be able to use it for
2691 cross-compilation to MMIX. */
2692 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2693 {
2694 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2695 {
2696 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2697 retval *= 2;
2698 retval |= CONST_DOUBLE_LOW (x) & 1;
2699
2700 retval |=
2701 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
2702 << (HOST_BITS_PER_LONG);
2703 }
2704 else
2705 retval = CONST_DOUBLE_HIGH (x);
2706
2707 return retval;
2708 }
2709
2710 if (GET_CODE (x) == CONST_DOUBLE)
2711 {
2712 REAL_VALUE_TYPE value;
2713
2714 /* FIXME: This macro is not in the manual but should be. */
2715 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2716
2717 if (GET_MODE (x) == DFmode)
2718 {
2719 long bits[2];
dc8dc4ce 2720
68cbb7e3 2721 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2722
ca2399d9 2723 /* The double cast is necessary to avoid getting the long
2724 sign-extended to unsigned long long(!) when they're of
2725 different size (usually 32-bit hosts). */
2726 return
2727 ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0]
2728 << (unsigned HOST_WIDEST_INT) 32U)
2729 | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1];
68cbb7e3 2730 }
2731 else if (GET_MODE (x) == SFmode)
2732 {
2733 long bits;
2734 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2735
2736 return (unsigned long) bits;
2737 }
2738 }
2739
2740 fatal_insn ("MMIX Internal: This is not a constant:", x);
2741}
2742
9e4a734a 2743/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2744
2745static rtx
2746mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2747 int incoming ATTRIBUTE_UNUSED)
2748{
2749 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2750}
2751
68cbb7e3 2752/*
2753 * Local variables:
2754 * eval: (c-set-style "gnu")
2755 * indent-tabs-mode: t
2756 * End:
2757 */