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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
711789cc 2 Copyright (C) 2000-2013 Free Software Foundation, Inc.
68cbb7e3 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
581084df 5This file is part of GCC.
68cbb7e3 6
581084df 7GCC is free software; you can redistribute it and/or modify
68cbb7e3 8it under the terms of the GNU General Public License as published by
038d1e19 9the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 10any later version.
11
581084df 12GCC is distributed in the hope that it will be useful,
68cbb7e3 13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
038d1e19 18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
68cbb7e3 20
21#include "config.h"
22#include "system.h"
805e22b2 23#include "coretypes.h"
24#include "tm.h"
68cbb7e3 25#include "rtl.h"
26#include "regs.h"
27#include "hard-reg-set.h"
28#include "hashtab.h"
29#include "insn-config.h"
30#include "output.h"
1998fe39 31#include "basic-block.h"
68cbb7e3 32#include "flags.h"
33#include "tree.h"
34#include "function.h"
35#include "expr.h"
0b205f4c 36#include "diagnostic-core.h"
68cbb7e3 37#include "recog.h"
38#include "ggc.h"
bde36f4a 39#include "dwarf2.h"
68cbb7e3 40#include "debug.h"
41#include "tm_p.h"
68cbb7e3 42#include "target.h"
43#include "target-def.h"
c0dae7df 44#include "df.h"
f105c84e 45#include "tm-constrs.h"
68cbb7e3 46
47/* First some local helper definitions. */
48#define MMIX_FIRST_GLOBAL_REGNUM 32
49
50/* We'd need a current_function_has_landing_pad. It's marked as such when
51 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
52 mostly. */
53#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
54
55/* We have no means to tell DWARF 2 about the register stack, so we need
56 to store the return address on the stack if an exception can get into
d3310704 57 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 58 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 59 after reload_completed; it may contain incorrect information some time
60 before that. Within a RTL sequence (after a call to start_sequence,
61 such as in RTL expanders), leaf_function_p doesn't see all insns
62 (perhaps any insn). But regs_ever_live is up-to-date when
63 leaf_function_p () isn't, so we "or" them together to get accurate
64 information. FIXME: Some tweak to leaf_function_p might be
f024691d 65 preferable. */
d3310704 66#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
67 (flag_exceptions \
3072d30e 68 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 69 || !leaf_function_p ()))
68cbb7e3 70
71#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 72 (crtl->calls_eh_return \
68cbb7e3 73 && (EH_RETURN_DATA_REGNO (0) == REGNO \
74 || EH_RETURN_DATA_REGNO (1) == REGNO \
75 || EH_RETURN_DATA_REGNO (2) == REGNO \
76 || EH_RETURN_DATA_REGNO (3) == REGNO))
77
d68ffc6f 78/* For the default ABI, we rename registers at output-time to fill the gap
79 between the (statically partitioned) saved registers and call-clobbered
80 registers. In effect this makes unused call-saved registers to be used
81 as call-clobbered registers. The benefit comes from keeping the number
82 of local registers (value of rL) low, since there's a cost of
d3310704 83 increasing rL and clearing unused (unset) registers with lower numbers.
84 Don't translate while outputting the prologue. */
d68ffc6f 85#define MMIX_OUTPUT_REGNO(N) \
86 (TARGET_ABI_GNU \
0b123c47 87 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
88 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 89 || cfun == NULL \
90 || cfun->machine == NULL \
91 || cfun->machine->in_prologue \
d68ffc6f 92 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
93 + cfun->machine->highest_saved_stack_register + 1))
94
0b123c47 95/* The %d in "POP %d,0". */
96#define MMIX_POP_ARGUMENT() \
97 ((! TARGET_ABI_GNU \
abe32cce 98 && crtl->return_rtx != NULL \
18d50ae6 99 && ! cfun->returns_struct) \
abe32cce 100 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
101 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 102 : 0)
103
68cbb7e3 104/* The canonical saved comparison operands for non-cc0 machines, set in
105 the compare expander. */
106rtx mmix_compare_op0;
107rtx mmix_compare_op1;
108
68cbb7e3 109/* Declarations of locals. */
110
68cbb7e3 111/* Intermediate for insn output. */
112static int mmix_output_destination_register;
113
4c834714 114static void mmix_option_override (void);
40fe393f 115static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 116static void mmix_output_shiftvalue_op_from_str
7585fcd5 117 (FILE *, const char *, HOST_WIDEST_INT);
118static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
7a7fb407 119static void mmix_output_condition (FILE *, const_rtx, int);
7585fcd5 120static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
121static bool mmix_assemble_integer (rtx, unsigned int, int);
122static struct machine_function *mmix_init_machine_status (void);
123static void mmix_encode_section_info (tree, rtx, int);
124static const char *mmix_strip_name_encoding (const char *);
125static void mmix_emit_sp_add (HOST_WIDE_INT offset);
126static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
127static void mmix_target_asm_function_end_prologue (FILE *);
128static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
27925877 129static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
130static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
fd50b071 131static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool);
ca316360 132static bool mmix_legitimate_constant_p (enum machine_mode, rtx);
7585fcd5 133static void mmix_reorg (void);
6988553d 134static void mmix_asm_output_mi_thunk
7585fcd5 135 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 136static void mmix_setup_incoming_varargs
39cba157 137 (cumulative_args_t, enum machine_mode, tree, int *, int);
7585fcd5 138static void mmix_file_start (void);
139static void mmix_file_end (void);
20d892d1 140static bool mmix_rtx_costs (rtx, int, int, int, int *, bool);
f7e13ca6 141static int mmix_register_move_cost (enum machine_mode,
142 reg_class_t, reg_class_t);
9e4a734a 143static rtx mmix_struct_value_rtx (tree, int);
3b2411a8 144static enum machine_mode mmix_promote_function_mode (const_tree,
145 enum machine_mode,
146 int *, const_tree, int);
39cba157 147static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode,
5d246ebf 148 const_tree, bool);
39cba157 149static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode,
5d246ebf 150 const_tree, bool, bool);
39cba157 151static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode,
5d246ebf 152 const_tree, bool);
39cba157 153static rtx mmix_function_arg (cumulative_args_t, enum machine_mode,
5d246ebf 154 const_tree, bool);
b600778c 155static rtx mmix_function_value (const_tree, const_tree, bool);
156static rtx mmix_libcall_value (enum machine_mode, const_rtx);
157static bool mmix_function_value_regno_p (const unsigned int);
39cba157 158static bool mmix_pass_by_reference (cumulative_args_t,
fb80456a 159 enum machine_mode, const_tree, bool);
5a1c68c3 160static bool mmix_frame_pointer_required (void);
604d844a 161static void mmix_asm_trampoline_template (FILE *);
162static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 163static void mmix_print_operand (FILE *, rtx, int);
164static void mmix_print_operand_address (FILE *, rtx);
165static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 166static void mmix_conditional_register_usage (void);
68cbb7e3 167
168/* Target structure macros. Listed by node. See `Using and Porting GCC'
169 for a general description. */
170
171/* Node: Function Entry */
172
58356836 173#undef TARGET_ASM_BYTE_OP
174#define TARGET_ASM_BYTE_OP NULL
175#undef TARGET_ASM_ALIGNED_HI_OP
176#define TARGET_ASM_ALIGNED_HI_OP NULL
177#undef TARGET_ASM_ALIGNED_SI_OP
178#define TARGET_ASM_ALIGNED_SI_OP NULL
179#undef TARGET_ASM_ALIGNED_DI_OP
180#define TARGET_ASM_ALIGNED_DI_OP NULL
181#undef TARGET_ASM_INTEGER
182#define TARGET_ASM_INTEGER mmix_assemble_integer
183
68cbb7e3 184#undef TARGET_ASM_FUNCTION_PROLOGUE
185#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
186
d3310704 187#undef TARGET_ASM_FUNCTION_END_PROLOGUE
188#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
189
68cbb7e3 190#undef TARGET_ASM_FUNCTION_EPILOGUE
191#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
192
7a7fb407 193#undef TARGET_PRINT_OPERAND
194#define TARGET_PRINT_OPERAND mmix_print_operand
195#undef TARGET_PRINT_OPERAND_ADDRESS
196#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
197#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
198#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
199
7811991d 200#undef TARGET_ENCODE_SECTION_INFO
201#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 202#undef TARGET_STRIP_NAME_ENCODING
203#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 204
6988553d 205#undef TARGET_ASM_OUTPUT_MI_THUNK
206#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 207#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
208#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 209#undef TARGET_ASM_FILE_START
210#define TARGET_ASM_FILE_START mmix_file_start
211#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
212#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 213#undef TARGET_ASM_FILE_END
214#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 215#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
216#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 217
b2d7ede1 218#undef TARGET_CONDITIONAL_REGISTER_USAGE
219#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
220
fab7adbf 221#undef TARGET_RTX_COSTS
222#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 223#undef TARGET_ADDRESS_COST
d9c5e5f4 224#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
fab7adbf 225
f7e13ca6 226#undef TARGET_REGISTER_MOVE_COST
227#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
228
2efea8c0 229#undef TARGET_MACHINE_DEPENDENT_REORG
230#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
231
3b2411a8 232#undef TARGET_PROMOTE_FUNCTION_MODE
233#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
234
b600778c 235#undef TARGET_FUNCTION_VALUE
236#define TARGET_FUNCTION_VALUE mmix_function_value
237#undef TARGET_LIBCALL_VALUE
238#define TARGET_LIBCALL_VALUE mmix_libcall_value
239#undef TARGET_FUNCTION_VALUE_REGNO_P
240#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 241
5d246ebf 242#undef TARGET_FUNCTION_ARG
243#define TARGET_FUNCTION_ARG mmix_function_arg
244#undef TARGET_FUNCTION_INCOMING_ARG
245#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
246#undef TARGET_FUNCTION_ARG_ADVANCE
247#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 248#undef TARGET_STRUCT_VALUE_RTX
249#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 250#undef TARGET_SETUP_INCOMING_VARARGS
251#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 252#undef TARGET_PASS_BY_REFERENCE
253#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 254#undef TARGET_CALLEE_COPIES
255#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 256
27925877 257#undef TARGET_PREFERRED_RELOAD_CLASS
258#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
259#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 260#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 261
fd50b071 262#undef TARGET_LEGITIMATE_ADDRESS_P
263#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 264#undef TARGET_LEGITIMATE_CONSTANT_P
265#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 266
5a1c68c3 267#undef TARGET_FRAME_POINTER_REQUIRED
268#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
269
604d844a 270#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
271#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
272#undef TARGET_TRAMPOLINE_INIT
273#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
274
4c834714 275#undef TARGET_OPTION_OVERRIDE
276#define TARGET_OPTION_OVERRIDE mmix_option_override
277
68cbb7e3 278struct gcc_target targetm = TARGET_INITIALIZER;
279
280/* Functions that are expansions for target macros.
281 See Target Macros in `Using and Porting GCC'. */
282
4c834714 283/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 284
4c834714 285static void
286mmix_option_override (void)
68cbb7e3 287{
288 /* Should we err or should we warn? Hmm. At least we must neutralize
289 it. For example the wrong kind of case-tables will be generated with
290 PIC; we use absolute address items for mmixal compatibility. FIXME:
291 They could be relative if we just elide them to after all pertinent
292 labels. */
293 if (flag_pic)
294 {
c3ceba8e 295 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 296 flag_pic = 0;
297 }
68cbb7e3 298}
299
300/* INIT_EXPANDERS. */
301
302void
7585fcd5 303mmix_init_expanders (void)
68cbb7e3 304{
305 init_machine_status = mmix_init_machine_status;
306}
307
308/* Set the per-function data. */
309
1f3233d1 310static struct machine_function *
7585fcd5 311mmix_init_machine_status (void)
68cbb7e3 312{
ba72912a 313 return ggc_alloc_cleared_machine_function ();
68cbb7e3 314}
315
a16734cd 316/* DATA_ABI_ALIGNMENT.
68cbb7e3 317 We have trouble getting the address of stuff that is located at other
318 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 319 at least 32-bit alignment. */
68cbb7e3 320
321int
7585fcd5 322mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 323{
324 if (basic_align < 32)
325 return 32;
326
327 return basic_align;
328}
329
330/* CONSTANT_ALIGNMENT. */
331
332int
7585fcd5 333mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 334{
335 if (basic_align < 32)
336 return 32;
337
338 return basic_align;
339}
340
341/* LOCAL_ALIGNMENT. */
342
c0dae7df 343unsigned
344mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 345{
346 if (basic_align < 32)
347 return 32;
348
349 return basic_align;
350}
351
b2d7ede1 352/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 353
b2d7ede1 354static void
7585fcd5 355mmix_conditional_register_usage (void)
68cbb7e3 356{
357 int i;
358
359 if (TARGET_ABI_GNU)
360 {
361 static const int gnu_abi_reg_alloc_order[]
362 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
363
364 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
365 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
366
367 /* Change the default from the mmixware ABI. For the GNU ABI,
368 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 369 call-clobbered local register for the "hole" that holds the
370 number of saved local registers saved by PUSHJ/PUSHGO during the
371 function call, receiving the return value at return. So best is
372 to use the highest, $31. It's already marked call-clobbered for
373 the mmixware ABI. */
68cbb7e3 374 for (i = 15; i <= 30; i++)
375 call_used_regs[i] = 0;
f0b228a5 376
377 /* "Unfix" the parameter registers. */
378 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
379 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
380 i++)
381 fixed_regs[i] = 0;
68cbb7e3 382 }
383
384 /* Step over the ":" in special register names. */
385 if (! TARGET_TOPLEVEL_SYMBOLS)
386 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
387 if (reg_names[i][0] == ':')
388 reg_names[i]++;
389}
390
6d1f3d31 391/* INCOMING_REGNO and OUTGOING_REGNO worker function.
392 Those two macros must only be applied to function argument
4d19e7b3 393 registers and the function return value register for the opposite
394 use. FIXME: for their current use in gcc, it'd be better with an
395 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la
396 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
5d246ebf 397 forcing the target to commit to a fixed mapping and for any
4d19e7b3 398 unspecified register use. Particularly when thinking about the
399 return-value, it is better to imagine INCOMING_REGNO and
400 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as
401 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming"
402 and "outgoing" is from the perspective of the parameter-registers,
403 but the same macro is (must be, lacking an alternative like
404 suggested above) used to map the return-value-register from the
405 same perspective. To make directions even more confusing, the macro
406 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register
407 in which to return a value, i.e. INCOMING_REGNO for the return-value-
408 register as received from a called function; the return-value on the
409 way out. */
6d1f3d31 410
411int
412mmix_opposite_regno (int regno, int incoming)
413{
4d19e7b3 414 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM)
415 return MMIX_RETURN_VALUE_REGNUM;
416
417 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM)
418 return MMIX_OUTGOING_RETURN_VALUE_REGNUM;
419
6d1f3d31 420 if (!mmix_function_arg_regno_p (regno, incoming))
421 return regno;
422
423 return
424 regno - (incoming
425 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
426 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
427}
428
d3310704 429/* LOCAL_REGNO.
430 All registers that are part of the register stack and that will be
431 saved are local. */
432
433int
7585fcd5 434mmix_local_regno (int regno)
d3310704 435{
436 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
437}
438
27925877 439/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 440 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
441
27925877 442static reg_class_t
443mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 444{
445 /* FIXME: Revisit. */
446 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 447 ? REMAINDER_REG : rclass;
68cbb7e3 448}
449
27925877 450/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 451 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
452
27925877 453static reg_class_t
454mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 455{
456 /* FIXME: Revisit. */
457 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 458 ? REMAINDER_REG : rclass;
68cbb7e3 459}
460
461/* SECONDARY_RELOAD_CLASS.
462 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
463
464enum reg_class
8deb3959 465mmix_secondary_reload_class (enum reg_class rclass,
7585fcd5 466 enum machine_mode mode ATTRIBUTE_UNUSED,
467 rtx x ATTRIBUTE_UNUSED,
468 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 469{
8deb3959 470 if (rclass == REMAINDER_REG
471 || rclass == HIMULT_REG
472 || rclass == SYSTEM_REGS)
68cbb7e3 473 return GENERAL_REGS;
474
68cbb7e3 475 return NO_REGS;
476}
477
68cbb7e3 478/* DYNAMIC_CHAIN_ADDRESS. */
479
480rtx
7585fcd5 481mmix_dynamic_chain_address (rtx frame)
68cbb7e3 482{
483 /* FIXME: the frame-pointer is stored at offset -8 from the current
484 frame-pointer. Unfortunately, the caller assumes that a
485 frame-pointer is present for *all* previous frames. There should be
486 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 487 return plus_constant (Pmode, frame, -8);
68cbb7e3 488}
489
490/* STARTING_FRAME_OFFSET. */
491
492int
7585fcd5 493mmix_starting_frame_offset (void)
68cbb7e3 494{
495 /* The old frame pointer is in the slot below the new one, so
496 FIRST_PARM_OFFSET does not need to depend on whether the
497 frame-pointer is needed or not. We have to adjust for the register
498 stack pointer being located below the saved frame pointer.
499 Similarly, we store the return address on the stack too, for
500 exception handling, and always if we save the register stack pointer. */
501 return
502 (-8
503 + (MMIX_CFUN_HAS_LANDING_PAD
504 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
505}
506
507/* RETURN_ADDR_RTX. */
508
509rtx
7585fcd5 510mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 511{
512 return count == 0
513 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 514 /* FIXME: Set frame_alias_set on the following. (Why?)
515 See mmix_initial_elimination_offset for the reason we can't use
516 get_hard_reg_initial_val for both. Always using a stack slot
517 and not a register would be suboptimal. */
29c05e22 518 ? validize_mem (gen_rtx_MEM (Pmode,
519 plus_constant (Pmode,
520 frame_pointer_rtx, -16)))
68cbb7e3 521 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
522 : NULL_RTX;
523}
524
525/* SETUP_FRAME_ADDRESSES. */
526
527void
7585fcd5 528mmix_setup_frame_addresses (void)
68cbb7e3 529{
530 /* Nothing needed at the moment. */
531}
532
533/* The difference between the (imaginary) frame pointer and the stack
534 pointer. Used to eliminate the frame pointer. */
535
536int
7585fcd5 537mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 538{
539 int regno;
540 int fp_sp_offset
abe32cce 541 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 542
af08e904 543 /* There is no actual offset between these two virtual values, but for
544 the frame-pointer, we have the old one in the stack position below
545 it, so the offset for the frame-pointer to the stack-pointer is one
546 octabyte larger. */
68cbb7e3 547 if (fromreg == MMIX_ARG_POINTER_REGNUM
548 && toreg == MMIX_FRAME_POINTER_REGNUM)
549 return 0;
550
551 /* The difference is the size of local variables plus the size of
552 outgoing function arguments that would normally be passed as
553 registers but must be passed on stack because we're out of
554 function-argument registers. Only global saved registers are
555 counted; the others go on the register stack.
556
557 The frame-pointer is counted too if it is what is eliminated, as we
558 need to balance the offset for it from STARTING_FRAME_OFFSET.
559
560 Also add in the slot for the register stack pointer we save if we
561 have a landing pad.
562
563 Unfortunately, we can't access $0..$14, from unwinder code easily, so
564 store the return address in a frame slot too. FIXME: Only for
565 non-leaf functions. FIXME: Always with a landing pad, because it's
566 hard to know whether we need the other at the time we know we need
567 the offset for one (and have to state it). It's a kludge until we
568 can express the register stack in the EH frame info.
569
570 We have to do alignment here; get_frame_size will not return a
571 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
572
573 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
574 regno <= 255;
575 regno++)
3072d30e 576 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 577 || IS_MMIX_EH_RETURN_DATA_REG (regno))
578 fp_sp_offset += 8;
579
580 return fp_sp_offset
581 + (MMIX_CFUN_HAS_LANDING_PAD
582 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
583 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
584}
585
5d246ebf 586static void
39cba157 587mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode,
5d246ebf 588 const_tree type, bool named ATTRIBUTE_UNUSED)
589{
39cba157 590 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 591 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
592
593 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
594 || (arg_size > 8
595 && !TARGET_LIBFUNC
596 && !argsp->lib))
597 ? (MMIX_MAX_ARGS_IN_REGS) + 1
598 : argsp->regs + (7 + arg_size) / 8);
599}
68cbb7e3 600
5d246ebf 601/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
602
603static rtx
39cba157 604mmix_function_arg_1 (const cumulative_args_t argsp_v,
5d246ebf 605 enum machine_mode mode,
606 const_tree type,
607 bool named ATTRIBUTE_UNUSED,
608 bool incoming)
68cbb7e3 609{
39cba157 610 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
611
68cbb7e3 612 /* Last-argument marker. */
613 if (type == void_type_node)
614 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
615 ? gen_rtx_REG (mode,
616 (incoming
617 ? MMIX_FIRST_INCOMING_ARG_REGNUM
618 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
619 : NULL_RTX;
620
621 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 622 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 623 && (GET_MODE_BITSIZE (mode) <= 64
624 || argsp->lib
625 || TARGET_LIBFUNC))
626 ? gen_rtx_REG (mode,
627 (incoming
628 ? MMIX_FIRST_INCOMING_ARG_REGNUM
629 : MMIX_FIRST_ARG_REGNUM)
630 + argsp->regs)
631 : NULL_RTX;
632}
633
5d246ebf 634/* Return an rtx for a function argument to go in a register, and 0 for
635 one that must go on stack. */
636
637static rtx
39cba157 638mmix_function_arg (cumulative_args_t argsp,
5d246ebf 639 enum machine_mode mode,
640 const_tree type,
641 bool named)
642{
643 return mmix_function_arg_1 (argsp, mode, type, named, false);
644}
645
646static rtx
39cba157 647mmix_function_incoming_arg (cumulative_args_t argsp,
5d246ebf 648 enum machine_mode mode,
649 const_tree type,
650 bool named)
651{
652 return mmix_function_arg_1 (argsp, mode, type, named, true);
653}
654
68cbb7e3 655/* Returns nonzero for everything that goes by reference, 0 for
656 everything that goes by value. */
657
b981d932 658static bool
39cba157 659mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode,
fb80456a 660 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 661{
39cba157 662 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
663
0336f0f0 664 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 665 necessary. */
bef380a4 666 if (targetm.calls.must_pass_in_stack (mode, type))
667 return true;
668
669 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
670 && !TARGET_LIBFUNC
671 && (!argsp || !argsp->lib))
672 return true;
673
674 return false;
68cbb7e3 675}
676
677/* Return nonzero if regno is a register number where a parameter is
678 passed, and 0 otherwise. */
679
680int
7585fcd5 681mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 682{
683 int first_arg_regnum
684 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
685
686 return regno >= first_arg_regnum
687 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
688}
689
b600778c 690/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 691
b600778c 692static rtx
693mmix_function_value (const_tree valtype,
694 const_tree func ATTRIBUTE_UNUSED,
695 bool outgoing)
68cbb7e3 696{
697 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 698 enum machine_mode cmode;
699 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
700 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
701 int i;
702 int nregs;
703
b600778c 704 if (!outgoing)
705 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
706
68cbb7e3 707 /* Return values that fit in a register need no special handling.
708 There's no register hole when parameters are passed in global
709 registers. */
710 if (TARGET_ABI_GNU
711 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
712 return
713 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
714
fb89a8c9 715 if (COMPLEX_MODE_P (mode))
716 /* A complex type, made up of components. */
717 cmode = TYPE_MODE (TREE_TYPE (valtype));
718 else
719 {
720 /* Of the other larger-than-register modes, we only support
721 scalar mode TImode. (At least, that's the only one that's
722 been rudimentally tested.) Make sure we're alerted for
723 unexpected cases. */
724 if (mode != TImode)
725 sorry ("support for mode %qs", GET_MODE_NAME (mode));
726
727 /* In any case, we will fill registers to the natural size. */
728 cmode = DImode;
729 }
730
68cbb7e3 731 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
732
733 /* We need to take care of the effect of the register hole on return
734 values of large sizes; the last register will appear as the first
735 register, with the rest shifted. (For complex modes, this is just
736 swapped registers.) */
737
738 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 739 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 740 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
741
742 /* FIXME: Maybe we should handle structure values like this too
743 (adjusted for BLKmode), perhaps for both ABI:s. */
744 for (i = 0; i < nregs - 1; i++)
745 vec[i]
746 = gen_rtx_EXPR_LIST (VOIDmode,
747 gen_rtx_REG (cmode, first_val_regnum + i),
748 GEN_INT ((i + 1) * BITS_PER_UNIT));
749
750 vec[nregs - 1]
751 = gen_rtx_EXPR_LIST (VOIDmode,
752 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 753 const0_rtx);
68cbb7e3 754
2bdda7ee 755 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec));
68cbb7e3 756}
757
b600778c 758/* Implements TARGET_LIBCALL_VALUE. */
c715d549 759
b600778c 760static rtx
761mmix_libcall_value (enum machine_mode mode,
762 const_rtx fun ATTRIBUTE_UNUSED)
763{
764 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
765}
766
767/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
768
769static bool
770mmix_function_value_regno_p (const unsigned int regno)
c715d549 771{
772 return regno == MMIX_RETURN_VALUE_REGNUM;
773}
774
68cbb7e3 775/* EH_RETURN_DATA_REGNO. */
776
777int
7585fcd5 778mmix_eh_return_data_regno (int n)
68cbb7e3 779{
780 if (n >= 0 && n < 4)
781 return MMIX_EH_RETURN_DATA_REGNO_START + n;
782
783 return INVALID_REGNUM;
784}
785
786/* EH_RETURN_STACKADJ_RTX. */
787
788rtx
7585fcd5 789mmix_eh_return_stackadj_rtx (void)
68cbb7e3 790{
791 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
792}
793
794/* EH_RETURN_HANDLER_RTX. */
795
796rtx
7585fcd5 797mmix_eh_return_handler_rtx (void)
68cbb7e3 798{
7585fcd5 799 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 800}
801
802/* ASM_PREFERRED_EH_DATA_FORMAT. */
803
804int
7585fcd5 805mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
806 int global ATTRIBUTE_UNUSED)
68cbb7e3 807{
808 /* This is the default (was at 2001-07-20). Revisit when needed. */
809 return DW_EH_PE_absptr;
810}
811
28c2d844 812/* Make a note that we've seen the beginning of the prologue. This
d3310704 813 matters to whether we'll translate register numbers as calculated by
2efea8c0 814 mmix_reorg. */
68cbb7e3 815
d3310704 816static void
7585fcd5 817mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
818 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 819{
d3310704 820 cfun->machine->in_prologue = 1;
821}
68cbb7e3 822
d3310704 823/* Make a note that we've seen the end of the prologue. */
68cbb7e3 824
d3310704 825static void
7585fcd5 826mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 827{
828 cfun->machine->in_prologue = 0;
d68ffc6f 829}
830
2efea8c0 831/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
832 done here; just virtually by calculating the highest saved stack
833 register number used to modify the register numbers at output time. */
d68ffc6f 834
2efea8c0 835static void
7585fcd5 836mmix_reorg (void)
d68ffc6f 837{
838 int regno;
68cbb7e3 839
840 /* We put the number of the highest saved register-file register in a
841 location convenient for the call-patterns to output. Note that we
842 don't tell dwarf2 about these registers, since it can't restore them
843 anyway. */
d68ffc6f 844 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 845 regno >= 0;
846 regno--)
3072d30e 847 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 848 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
849 break;
850
d68ffc6f 851 /* Regardless of whether they're saved (they might be just read), we
852 mustn't include registers that carry parameters. We could scan the
853 insns to see whether they're actually used (and indeed do other less
854 trivial register usage analysis and transformations), but it seems
855 wasteful to optimize for unused parameter registers. As of
3072d30e 856 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 857 that might change. */
abe32cce 858 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 859 {
abe32cce 860 regno = crtl->args.info.regs - 1;
d68ffc6f 861
862 /* We don't want to let this cause us to go over the limit and make
863 incoming parameter registers be misnumbered and treating the last
864 parameter register and incoming return value register call-saved.
865 Stop things at the unmodified scheme. */
866 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
867 regno = MMIX_RETURN_VALUE_REGNUM - 1;
868 }
869
870 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 871}
872
873/* TARGET_ASM_FUNCTION_EPILOGUE. */
874
4448bfa5 875static void
7585fcd5 876mmix_target_asm_function_epilogue (FILE *stream,
877 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 878{
d3310704 879 /* Emit an \n for readability of the generated assembly. */
880 fputc ('\n', stream);
881}
68cbb7e3 882
e7f5e241 883/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 884
6988553d 885static void
7585fcd5 886mmix_asm_output_mi_thunk (FILE *stream,
887 tree fndecl ATTRIBUTE_UNUSED,
888 HOST_WIDE_INT delta,
889 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
890 tree func)
d3310704 891{
6644435d 892 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
893 location of structure to return as invisible first argument), you
894 need to tweak this code too. */
d3310704 895 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 896
d3310704 897 if (delta >= 0 && delta < 65536)
e7f5e241 898 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 899 else if (delta < 0 && delta >= -255)
e7f5e241 900 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 901 else
0b123c47 902 {
d3310704 903 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 904 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 905 }
906
d3310704 907 fprintf (stream, "\tJMP ");
908 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
909 fprintf (stream, "\n");
910}
68cbb7e3 911
d3310704 912/* FUNCTION_PROFILER. */
68cbb7e3 913
d3310704 914void
7585fcd5 915mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
916 int labelno ATTRIBUTE_UNUSED)
d3310704 917{
918 sorry ("function_profiler support for MMIX");
919}
68cbb7e3 920
9e4a734a 921/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
922 let's stick to pushing argument registers on the stack. Later, we
923 can parse all arguments in registers, to improve performance. */
68cbb7e3 924
9e4a734a 925static void
39cba157 926mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
7585fcd5 927 enum machine_mode mode,
928 tree vartype,
929 int *pretend_sizep,
930 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 931{
39cba157 932 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
933
7ccc713a 934 /* The last named variable has been handled, but
935 args_so_farp has not been advanced for it. */
936 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
937 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 938
939 /* We assume that one argument takes up one register here. That should
5aedf60c 940 be true until we start messing with multi-reg parameters. */
68cbb7e3 941 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
942 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
943}
944
604d844a 945/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 946
604d844a 947static void
948mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 949{
af08e904 950 /* Read a value into the static-chain register and jump somewhere. The
951 static chain is stored at offset 16, and the function address is
952 stored at offset 24. */
604d844a 953
68cbb7e3 954 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 955 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 956 fprintf (stream, "LDOU $255,$255,8\n\t");
957 fprintf (stream, "GO $255,$255,0\n");
958 fprintf (stream, "1H\tOCTA 0\n\t");
959 fprintf (stream, "OCTA 0\n");
960}
961
604d844a 962/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 963/* Set the static chain and function pointer field in the trampoline.
964 We also SYNCID here to be sure (doesn't matter in the simulator, but
965 some day it will). */
966
604d844a 967static void
968mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
969{
970 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
971 rtx mem;
972
973 emit_block_move (m_tramp, assemble_trampoline_template (),
974 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
975
976 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
977 emit_move_insn (mem, static_chain);
978 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
979 emit_move_insn (mem, fnaddr);
980
981 mem = adjust_address (m_tramp, DImode, 0);
982 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 983}
984
985/* We must exclude constant addresses that have an increment that is not a
986 multiple of four bytes because of restrictions of the GETA
f0b228a5 987 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 988
989int
7585fcd5 990mmix_constant_address_p (rtx x)
68cbb7e3 991{
992 RTX_CODE code = GET_CODE (x);
993 int addend = 0;
f0b228a5 994 /* When using "base addresses", anything constant goes. */
995 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 996
68cbb7e3 997 switch (code)
998 {
999 case LABEL_REF:
1000 case SYMBOL_REF:
1001 return 1;
1002
68cbb7e3 1003 case HIGH:
f0b228a5 1004 /* FIXME: Don't know how to dissect these. Avoid them for now,
1005 except we know they're constants. */
1006 return constant_ok;
68cbb7e3 1007
1008 case CONST_INT:
1009 addend = INTVAL (x);
1010 break;
1011
1012 case CONST_DOUBLE:
1013 if (GET_MODE (x) != VOIDmode)
1014 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1015 return constant_ok;
68cbb7e3 1016 addend = CONST_DOUBLE_LOW (x);
1017 break;
1018
1019 case CONST:
1020 /* Note that expressions with arithmetic on forward references don't
1021 work in mmixal. People using gcc assembly code with mmixal might
1022 need to move arrays and such to before the point of use. */
1023 if (GET_CODE (XEXP (x, 0)) == PLUS)
1024 {
1025 rtx x0 = XEXP (XEXP (x, 0), 0);
1026 rtx x1 = XEXP (XEXP (x, 0), 1);
1027
1028 if ((GET_CODE (x0) == SYMBOL_REF
1029 || GET_CODE (x0) == LABEL_REF)
1030 && (GET_CODE (x1) == CONST_INT
1031 || (GET_CODE (x1) == CONST_DOUBLE
1032 && GET_MODE (x1) == VOIDmode)))
1033 addend = mmix_intval (x1);
1034 else
f0b228a5 1035 return constant_ok;
68cbb7e3 1036 }
1037 else
f0b228a5 1038 return constant_ok;
68cbb7e3 1039 break;
1040
1041 default:
1042 return 0;
1043 }
1044
f0b228a5 1045 return constant_ok || (addend & 3) == 0;
68cbb7e3 1046}
1047
fd50b071 1048/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1049
fd50b071 1050bool
1051mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
1052 rtx x,
1053 bool strict_checking)
68cbb7e3 1054{
1055#define MMIX_REG_OK(X) \
1056 ((strict_checking \
1057 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1058 || (reg_renumber[REGNO (X)] > 0 \
1059 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1060 || (!strict_checking \
1061 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1062 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1063 || REGNO (X) == ARG_POINTER_REGNUM)))
1064
1065 /* We only accept:
1066 (mem reg)
1067 (mem (plus reg reg))
f0b228a5 1068 (mem (plus reg 0..255)).
1069 unless TARGET_BASE_ADDRESSES, in which case we accept all
1070 (mem constant_address) too. */
68cbb7e3 1071
1072
1073 /* (mem reg) */
1074 if (REG_P (x) && MMIX_REG_OK (x))
1075 return 1;
1076
1077 if (GET_CODE(x) == PLUS)
1078 {
1079 rtx x1 = XEXP (x, 0);
1080 rtx x2 = XEXP (x, 1);
1081
1082 /* Try swapping the order. FIXME: Do we need this? */
1083 if (! REG_P (x1))
1084 {
1085 rtx tem = x1;
1086 x1 = x2;
1087 x2 = tem;
1088 }
1089
f0b228a5 1090 /* (mem (plus (reg?) (?))) */
68cbb7e3 1091 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1092 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1093
f0b228a5 1094 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1095 if (REG_P (x2) && MMIX_REG_OK (x2))
1096 return 1;
1097
f0b228a5 1098 /* (mem (plus (reg) (0..255?))) */
f105c84e 1099 if (satisfies_constraint_I (x2))
68cbb7e3 1100 return 1;
f0b228a5 1101
1102 return 0;
68cbb7e3 1103 }
1104
f0b228a5 1105 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1106}
1107
ca316360 1108/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1109
ca316360 1110static bool
1111mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1112{
1113 RTX_CODE code = GET_CODE (x);
1114
1115 /* We must allow any number due to the way the cse passes works; if we
1116 do not allow any number here, general_operand will fail, and insns
1117 will fatally fail recognition instead of "softly". */
1118 if (code == CONST_INT || code == CONST_DOUBLE)
1119 return 1;
1120
1121 return CONSTANT_ADDRESS_P (x);
1122}
1123
1124/* SELECT_CC_MODE. */
1125
1126enum machine_mode
7585fcd5 1127mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1128{
1129 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1130 output different compare insns. Note that we do not check the
1131 validity of the comparison here. */
1132
1133 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1134 {
1135 if (op == ORDERED || op == UNORDERED || op == UNGE
1136 || op == UNGT || op == UNLE || op == UNLT)
1137 return CC_FUNmode;
1138
1139 if (op == EQ || op == NE)
1140 return CC_FPEQmode;
1141
1142 return CC_FPmode;
1143 }
1144
1145 if (op == GTU || op == LTU || op == GEU || op == LEU)
1146 return CC_UNSmode;
1147
1148 return CCmode;
1149}
1150
68cbb7e3 1151/* REVERSIBLE_CC_MODE. */
1152
1153int
7585fcd5 1154mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1155{
1156 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1157 compares. */
68cbb7e3 1158 return mode != CC_FPmode;
1159}
1160
fab7adbf 1161/* TARGET_RTX_COSTS. */
68cbb7e3 1162
fab7adbf 1163static bool
7585fcd5 1164mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1165 int code ATTRIBUTE_UNUSED,
1166 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1167 int opno ATTRIBUTE_UNUSED,
f529eb25 1168 int *total ATTRIBUTE_UNUSED,
1169 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1170{
1171 /* For the time being, this is just a stub and we'll accept the
1172 generic calculations, until we can do measurements, at least.
1173 Say we did not modify any calculated costs. */
fab7adbf 1174 return false;
68cbb7e3 1175}
1176
f7e13ca6 1177/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1178
f7e13ca6 1179 The special registers can only move to and from general regs, and we
1180 need to check that their constraints match, so say 3 for them. */
1181
1182static int
7585fcd5 1183mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1184 reg_class_t from,
1185 reg_class_t to)
68cbb7e3 1186{
1187 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1188}
1189
1190/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1191 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1192 the target. */
1193
1194/* DATA_SECTION_ASM_OP. */
1195
1196const char *
7585fcd5 1197mmix_data_section_asm_op (void)
68cbb7e3 1198{
1199 return "\t.data ! mmixal:= 8H LOC 9B";
1200}
1201
7811991d 1202static void
7585fcd5 1203mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1204{
1205 /* Test for an external declaration, and do nothing if it is one. */
1206 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1207 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1208 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1209 ;
ae484cc8 1210 else if (first && DECL_P (decl))
68cbb7e3 1211 {
1212 /* For non-visible declarations, add a "@" prefix, which we skip
1213 when the label is output. If the label does not have this
f0b228a5 1214 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1215
1216 Note that this does not work for data that is declared extern and
1217 later defined as static. If there's code in between, that code
f0b228a5 1218 will refer to the extern declaration, and vice versa. This just
1219 means that when -mtoplevel-symbols is in use, we can just handle
1220 well-behaved ISO-compliant code. */
68cbb7e3 1221
2c129d70 1222 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1223 int len = strlen (str);
225ab426 1224 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1225 newstr[0] = '@';
68cbb7e3 1226 strcpy (newstr + 1, str);
b948ae2f 1227 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1228 }
1229
f0b228a5 1230 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1231 may need different options to reach for different things with GETA.
1232 For now, functions and things we know or have been told are constant. */
1233 if (TREE_CODE (decl) == FUNCTION_DECL
1234 || TREE_CONSTANT (decl)
1235 || (TREE_CODE (decl) == VAR_DECL
1236 && TREE_READONLY (decl)
1237 && !TREE_SIDE_EFFECTS (decl)
1238 && (!DECL_INITIAL (decl)
1239 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1240 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1241}
1242
7b4a38a6 1243static const char *
7585fcd5 1244mmix_strip_name_encoding (const char *name)
68cbb7e3 1245{
1246 for (; (*name == '@' || *name == '*'); name++)
1247 ;
1248
1249 return name;
1250}
1251
92c473b8 1252/* TARGET_ASM_FILE_START.
1253 We just emit a little comment for the time being. */
68cbb7e3 1254
92c473b8 1255static void
7585fcd5 1256mmix_file_start (void)
68cbb7e3 1257{
92c473b8 1258 default_file_start ();
68cbb7e3 1259
92c473b8 1260 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1261
1d60d981 1262 /* Make sure each file starts with the text section. */
2f14b1f9 1263 switch_to_section (text_section);
68cbb7e3 1264}
1265
f6940372 1266/* TARGET_ASM_FILE_END. */
68cbb7e3 1267
f6940372 1268static void
7585fcd5 1269mmix_file_end (void)
68cbb7e3 1270{
1d60d981 1271 /* Make sure each file ends with the data section. */
2f14b1f9 1272 switch_to_section (data_section);
68cbb7e3 1273}
1274
40fe393f 1275/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1276
40fe393f 1277static void
7585fcd5 1278mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1279{
1280 fprintf (stream, "# 1 ");
1281 OUTPUT_QUOTED_STRING (stream, name);
1282 fprintf (stream, "\n");
1283}
1284
1285/* OUTPUT_QUOTED_STRING. */
1286
1287void
7585fcd5 1288mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1289{
1290 const char * string_end = string + length;
25037517 1291 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1292
1293 /* Output "any character except newline and double quote character". We
1294 play it safe and avoid all control characters too. We also do not
1295 want [] as characters, should input be passed through m4 with [] as
1296 quotes. Further, we avoid "\", because the GAS port handles it as a
1297 quoting character. */
1298 while (string < string_end)
1299 {
1300 if (*string
1301 && (unsigned char) *string < 128
1302 && !ISCNTRL (*string)
1303 && strchr (unwanted_chars, *string) == NULL)
1304 {
1305 fputc ('"', stream);
1306 while (*string
1307 && (unsigned char) *string < 128
1308 && !ISCNTRL (*string)
1309 && strchr (unwanted_chars, *string) == NULL
1310 && string < string_end)
1311 {
1312 fputc (*string, stream);
1313 string++;
1314 }
1315 fputc ('"', stream);
1316 if (string < string_end)
1317 fprintf (stream, ",");
1318 }
1319 if (string < string_end)
1320 {
1321 fprintf (stream, "#%x", *string & 255);
1322 string++;
1323 if (string < string_end)
1324 fprintf (stream, ",");
1325 }
1326 }
1327}
1328
58356836 1329/* Target hook for assembling integer objects. Use mmix_print_operand
1330 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1331 CONST_DOUBLEs. */
68cbb7e3 1332
58356836 1333static bool
7585fcd5 1334mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1335{
58356836 1336 if (aligned_p)
1337 switch (size)
1338 {
4f4e478d 1339 /* We handle a limited number of types of operands in here. But
1340 that's ok, because we can punt to generic functions. We then
5c3d1711 1341 pretend that aligned data isn't needed, so the usual .<pseudo>
1342 syntax is used (which works for aligned data too). We actually
1343 *must* do that, since we say we don't have simple aligned
1344 pseudos, causing this function to be called. We just try and
1345 keep as much compatibility as possible with mmixal syntax for
1346 normal cases (i.e. without GNU extensions and C only). */
58356836 1347 case 1:
4f4e478d 1348 if (GET_CODE (x) != CONST_INT)
1349 {
1350 aligned_p = 0;
1351 break;
1352 }
58356836 1353 fputs ("\tBYTE\t", asm_out_file);
1354 mmix_print_operand (asm_out_file, x, 'B');
1355 fputc ('\n', asm_out_file);
1356 return true;
1357
1358 case 2:
4f4e478d 1359 if (GET_CODE (x) != CONST_INT)
1360 {
1361 aligned_p = 0;
1362 break;
1363 }
58356836 1364 fputs ("\tWYDE\t", asm_out_file);
1365 mmix_print_operand (asm_out_file, x, 'W');
1366 fputc ('\n', asm_out_file);
1367 return true;
1368
1369 case 4:
60bb373d 1370 if (GET_CODE (x) != CONST_INT)
4f4e478d 1371 {
1372 aligned_p = 0;
1373 break;
1374 }
58356836 1375 fputs ("\tTETRA\t", asm_out_file);
1376 mmix_print_operand (asm_out_file, x, 'L');
1377 fputc ('\n', asm_out_file);
1378 return true;
1379
1380 case 8:
7f81c162 1381 /* We don't get here anymore for CONST_DOUBLE, because DImode
1382 isn't expressed as CONST_DOUBLE, and DFmode is handled
1383 elsewhere. */
1384 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1385 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1386 return true;
1387 }
1388 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1389}
1390
1391/* ASM_OUTPUT_ASCII. */
1392
1393void
7585fcd5 1394mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1395{
1396 while (length > 0)
1397 {
1398 int chunk_size = length > 60 ? 60 : length;
1399 fprintf (stream, "\tBYTE ");
1400 mmix_output_quoted_string (stream, string, chunk_size);
1401 string += chunk_size;
1402 length -= chunk_size;
1403 fprintf (stream, "\n");
1404 }
1405}
1406
1407/* ASM_OUTPUT_ALIGNED_COMMON. */
1408
1409void
7585fcd5 1410mmix_asm_output_aligned_common (FILE *stream,
1411 const char *name,
1412 int size,
1413 int align)
68cbb7e3 1414{
1415 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1416 express this in a mmixal-compatible way. */
1417 fprintf (stream, "\t.comm\t");
1418 assemble_name (stream, name);
1419 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1420 size, align / BITS_PER_UNIT);
1421}
1422
1423/* ASM_OUTPUT_ALIGNED_LOCAL. */
1424
1425void
7585fcd5 1426mmix_asm_output_aligned_local (FILE *stream,
1427 const char *name,
1428 int size,
1429 int align)
68cbb7e3 1430{
2f14b1f9 1431 switch_to_section (data_section);
68cbb7e3 1432
1433 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1434 assemble_name (stream, name);
1435 fprintf (stream, "\tLOC @+%d\n", size);
1436}
1437
1438/* ASM_OUTPUT_LABEL. */
1439
1440void
7585fcd5 1441mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1442{
1443 assemble_name (stream, name);
1444 fprintf (stream, "\tIS @\n");
1445}
1446
af1c039b 1447/* ASM_OUTPUT_INTERNAL_LABEL. */
1448
1449void
1450mmix_asm_output_internal_label (FILE *stream, const char *name)
1451{
1452 assemble_name_raw (stream, name);
1453 fprintf (stream, "\tIS @\n");
1454}
1455
68cbb7e3 1456/* ASM_DECLARE_REGISTER_GLOBAL. */
1457
1458void
7585fcd5 1459mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1460 tree decl ATTRIBUTE_UNUSED,
1461 int regno ATTRIBUTE_UNUSED,
1462 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1463{
1464 /* Nothing to do here, but there *will* be, therefore the framework is
1465 here. */
1466}
1467
68cbb7e3 1468/* ASM_WEAKEN_LABEL. */
1469
1470void
7585fcd5 1471mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1472 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1473{
7fe1d31c 1474 fprintf (stream, "\t.weak ");
68cbb7e3 1475 assemble_name (stream, name);
7fe1d31c 1476 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1477}
1478
1479/* MAKE_DECL_ONE_ONLY. */
1480
1481void
7585fcd5 1482mmix_make_decl_one_only (tree decl)
68cbb7e3 1483{
1484 DECL_WEAK (decl) = 1;
1485}
1486
1487/* ASM_OUTPUT_LABELREF.
1488 Strip GCC's '*' and our own '@'. No order is assumed. */
1489
1490void
7585fcd5 1491mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1492{
91009d64 1493 int is_extern = 1;
68cbb7e3 1494
1495 for (; (*name == '@' || *name == '*'); name++)
1496 if (*name == '@')
91009d64 1497 is_extern = 0;
68cbb7e3 1498
1499 asm_fprintf (stream, "%s%U%s",
1500 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1501 name);
1502}
1503
68cbb7e3 1504/* ASM_OUTPUT_DEF. */
1505
1506void
7585fcd5 1507mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1508{
1509 assemble_name (stream, name);
1510 fprintf (stream, "\tIS ");
1511 assemble_name (stream, value);
1512 fputc ('\n', stream);
1513}
1514
7a7fb407 1515/* TARGET_PRINT_OPERAND. */
68cbb7e3 1516
7a7fb407 1517static void
7585fcd5 1518mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1519{
1520 /* When we add support for different codes later, we can, when needed,
1521 drop through to the main handler with a modified operand. */
1522 rtx modified_x = x;
d68ffc6f 1523 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1524
1525 switch (code)
1526 {
1527 /* Unrelated codes are in alphabetic order. */
1528
91009d64 1529 case '+':
1530 /* For conditional branches, output "P" for a probable branch. */
1531 if (TARGET_BRANCH_PREDICT)
1532 {
1533 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
9eb946de 1534 if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2)
91009d64 1535 putc ('P', stream);
1536 }
1537 return;
1538
0b123c47 1539 case '.':
1540 /* For the %d in POP %d,0. */
1541 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1542 return;
1543
68cbb7e3 1544 case 'B':
1545 if (GET_CODE (x) != CONST_INT)
1546 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1547 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1548 return;
1549
1550 case 'H':
1551 /* Highpart. Must be general register, and not the last one, as
1552 that one cannot be part of a consecutive register pair. */
d68ffc6f 1553 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1554 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1555
1556 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1557 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1558 return;
1559
1560 case 'L':
1561 /* Lowpart. Must be CONST_INT or general register, and not the last
1562 one, as that one cannot be part of a consecutive register pair. */
1563 if (GET_CODE (x) == CONST_INT)
1564 {
1565 fprintf (stream, "#%lx",
1566 (unsigned long) (INTVAL (x)
1567 & ((unsigned int) 0x7fffffff * 2 + 1)));
1568 return;
1569 }
1570
1571 if (GET_CODE (x) == SYMBOL_REF)
1572 {
1573 output_addr_const (stream, x);
1574 return;
1575 }
1576
d68ffc6f 1577 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1578 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1579
1580 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1581 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1582 return;
1583
1584 /* Can't use 'a' because that's a generic modifier for address
1585 output. */
1586 case 'A':
1587 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1588 ~(unsigned HOST_WIDEST_INT)
1589 mmix_intval (x));
1590 return;
1591
1592 case 'i':
1593 mmix_output_shiftvalue_op_from_str (stream, "INC",
1594 (unsigned HOST_WIDEST_INT)
1595 mmix_intval (x));
1596 return;
1597
1598 case 'o':
1599 mmix_output_shiftvalue_op_from_str (stream, "OR",
1600 (unsigned HOST_WIDEST_INT)
1601 mmix_intval (x));
1602 return;
1603
1604 case 's':
1605 mmix_output_shiftvalue_op_from_str (stream, "SET",
1606 (unsigned HOST_WIDEST_INT)
1607 mmix_intval (x));
1608 return;
1609
1610 case 'd':
1611 case 'D':
1612 mmix_output_condition (stream, x, (code == 'D'));
1613 return;
1614
1615 case 'e':
1616 /* Output an extra "e" to make fcmpe, fune. */
1617 if (TARGET_FCMP_EPSILON)
1618 fprintf (stream, "e");
1619 return;
1620
1621 case 'm':
1622 /* Output the number minus 1. */
1623 if (GET_CODE (x) != CONST_INT)
1624 {
1625 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1626 x);
1627 }
1628 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1629 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1630 return;
1631
1632 case 'p':
1633 /* Store the number of registers we want to save. This was setup
1634 by the prologue. The actual operand contains the number of
1635 registers to pass, but we don't use it currently. Anyway, we
1636 need to output the number of saved registers here. */
d68ffc6f 1637 fprintf (stream, "%d",
1638 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1639 return;
1640
1641 case 'r':
1642 /* Store the register to output a constant to. */
1643 if (! REG_P (x))
68435912 1644 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1645 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1646 return;
1647
1648 case 'I':
1649 /* Output the constant. Note that we use this for floats as well. */
1650 if (GET_CODE (x) != CONST_INT
1651 && (GET_CODE (x) != CONST_DOUBLE
1652 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1653 && GET_MODE (x) != SFmode)))
68435912 1654 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1655 mmix_output_register_setting (stream,
1656 mmix_output_destination_register,
1657 mmix_intval (x), 0);
1658 return;
1659
1660 case 'U':
1661 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1662 if (TARGET_ZERO_EXTEND)
1663 putc ('U', stream);
1664 return;
1665
1666 case 'v':
1667 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1668 return;
1669
1670 case 'V':
1671 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1672 return;
1673
1674 case 'W':
1675 if (GET_CODE (x) != CONST_INT)
1676 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1677 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1678 return;
1679
1680 case 0:
1681 /* Nothing to do. */
1682 break;
1683
1684 default:
1685 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1686 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1687 }
1688
1689 switch (GET_CODE (modified_x))
1690 {
1691 case REG:
d68ffc6f 1692 regno = REGNO (modified_x);
1693 if (regno >= FIRST_PSEUDO_REGISTER)
1694 internal_error ("MMIX Internal: Bad register: %d", regno);
1695 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1696 return;
1697
1698 case MEM:
1699 output_address (XEXP (modified_x, 0));
1700 return;
1701
1702 case CONST_INT:
1703 /* For -2147483648, mmixal complains that the constant does not fit
1704 in 4 bytes, so let's output it as hex. Take care to handle hosts
1705 where HOST_WIDE_INT is longer than an int.
1706
1707 Print small constants +-255 using decimal. */
1708
1709 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1710 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1711 else
1712 fprintf (stream, "#%x",
1713 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1714 return;
1715
1716 case CONST_DOUBLE:
1717 /* Do somewhat as CONST_INT. */
58356836 1718 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1719 return;
1720
1721 case CONST:
1722 output_addr_const (stream, modified_x);
1723 return;
1724
1725 default:
1726 /* No need to test for all strange things. Let output_addr_const do
1727 it for us. */
1728 if (CONSTANT_P (modified_x)
1729 /* Strangely enough, this is not included in CONSTANT_P.
1730 FIXME: Ask/check about sanity here. */
aa90bb35 1731 || LABEL_P (modified_x))
68cbb7e3 1732 {
1733 output_addr_const (stream, modified_x);
1734 return;
1735 }
1736
1737 /* We need the original here. */
1738 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1739 }
1740}
1741
7a7fb407 1742/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1743
7a7fb407 1744static bool
1745mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1746{
91009d64 1747 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1748 return code == '+'
1749 /* A '.' is used for the %d in the POP %d,0 return insn. */
1750 || code == '.';
68cbb7e3 1751}
1752
7a7fb407 1753/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1754
7a7fb407 1755static void
7585fcd5 1756mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1757{
1758 if (REG_P (x))
1759 {
1760 /* I find the generated assembly code harder to read without
1761 the ",0". */
d68ffc6f 1762 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1763 return;
1764 }
1765 else if (GET_CODE (x) == PLUS)
1766 {
1767 rtx x1 = XEXP (x, 0);
1768 rtx x2 = XEXP (x, 1);
1769
68cbb7e3 1770 if (REG_P (x1))
1771 {
d68ffc6f 1772 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1773
1774 if (REG_P (x2))
1775 {
d68ffc6f 1776 fprintf (stream, "%s",
1777 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1778 return;
1779 }
f105c84e 1780 else if (satisfies_constraint_I (x2))
68cbb7e3 1781 {
1782 output_addr_const (stream, x2);
1783 return;
1784 }
1785 }
1786 }
1787
ca316360 1788 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1789 {
1790 output_addr_const (stream, x);
1791 return;
1792 }
1793
68cbb7e3 1794 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1795}
1796
1797/* ASM_OUTPUT_REG_PUSH. */
1798
1799void
7585fcd5 1800mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1801{
1802 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1803 reg_names[MMIX_STACK_POINTER_REGNUM],
1804 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1805 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1806 reg_names[MMIX_STACK_POINTER_REGNUM]);
1807}
1808
1809/* ASM_OUTPUT_REG_POP. */
1810
1811void
7585fcd5 1812mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1813{
1814 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1815 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1816 reg_names[MMIX_STACK_POINTER_REGNUM],
1817 reg_names[MMIX_STACK_POINTER_REGNUM]);
1818}
1819
1820/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1821
1822void
7585fcd5 1823mmix_asm_output_addr_diff_elt (FILE *stream,
1824 rtx body ATTRIBUTE_UNUSED,
1825 int value,
1826 int rel)
68cbb7e3 1827{
1828 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1829}
1830
1831/* ASM_OUTPUT_ADDR_VEC_ELT. */
1832
1833void
7585fcd5 1834mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1835{
1836 fprintf (stream, "\tOCTA L:%d\n", value);
1837}
1838
1839/* ASM_OUTPUT_SKIP. */
1840
1841void
7585fcd5 1842mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1843{
1844 fprintf (stream, "\tLOC @+%d\n", nbytes);
1845}
1846
1847/* ASM_OUTPUT_ALIGN. */
1848
1849void
7585fcd5 1850mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1851{
1852 /* We need to record the needed alignment of this section in the object,
1853 so we have to output an alignment directive. Use a .p2align (not
1854 .align) so people will never have to wonder about whether the
1855 argument is in number of bytes or the log2 thereof. We do it in
1856 addition to the LOC directive, so nothing needs tweaking when
1857 copy-pasting assembly into mmixal. */
1858 fprintf (stream, "\t.p2align %d\n", power);
1859 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1860}
1861
1862/* DBX_REGISTER_NUMBER. */
1863
c0dae7df 1864unsigned
1865mmix_dbx_register_number (unsigned regno)
68cbb7e3 1866{
d68ffc6f 1867 /* Adjust the register number to the one it will be output as, dammit.
1868 It'd be nice if we could check the assumption that we're filling a
1869 gap, but every register between the last saved register and parameter
1870 registers might be a valid parameter register. */
1871 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1872
1873 /* We need to renumber registers to get the number of the return address
1874 register in the range 0..255. It is also space-saving if registers
1875 mentioned in the call-frame information (which uses this function by
1876 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1877 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1878 return regno >= 224 ? (regno - 224) : (regno + 48);
1879}
1880
35a3065a 1881/* End of target macro support functions.
68cbb7e3 1882
7585fcd5 1883 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1884
d3310704 1885/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1886 from insn-emit.c. */
1887
1888rtx
7585fcd5 1889mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1890{
1891 return get_hard_reg_initial_val (mode, regno);
1892}
1893
e911aedf 1894/* Nonzero when the function epilogue is simple enough that a single
d3310704 1895 "POP %d,0" should be used even within the function. */
0b123c47 1896
1897int
7585fcd5 1898mmix_use_simple_return (void)
0b123c47 1899{
1900 int regno;
1901
1902 int stack_space_to_allocate
abe32cce 1903 = (crtl->outgoing_args_size
1904 + crtl->args.pretend_args_size
0b123c47 1905 + get_frame_size () + 7) & ~7;
1906
1907 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1908 return 0;
1909
1910 for (regno = 255;
1911 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1912 regno--)
1913 /* Note that we assume that the frame-pointer-register is one of these
1914 registers, in which case we don't count it here. */
1915 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1916 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1917 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1918 return 0;
1919
1920 if (frame_pointer_needed)
1921 stack_space_to_allocate += 8;
1922
1923 if (MMIX_CFUN_HAS_LANDING_PAD)
1924 stack_space_to_allocate += 16;
1925 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1926 stack_space_to_allocate += 8;
1927
1928 return stack_space_to_allocate == 0;
1929}
1930
d3310704 1931
1932/* Expands the function prologue into RTX. */
1933
1934void
7585fcd5 1935mmix_expand_prologue (void)
d3310704 1936{
1937 HOST_WIDE_INT locals_size = get_frame_size ();
1938 int regno;
1939 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1940 = (crtl->outgoing_args_size
1941 + crtl->args.pretend_args_size
d3310704 1942 + locals_size + 7) & ~7;
1943 HOST_WIDE_INT offset = -8;
1944
1945 /* Add room needed to save global non-register-stack registers. */
1946 for (regno = 255;
1947 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1948 regno--)
1949 /* Note that we assume that the frame-pointer-register is one of these
1950 registers, in which case we don't count it here. */
1951 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1952 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1953 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1954 stack_space_to_allocate += 8;
1955
1956 /* If we do have a frame-pointer, add room for it. */
1957 if (frame_pointer_needed)
1958 stack_space_to_allocate += 8;
1959
1960 /* If we have a non-local label, we need to be able to unwind to it, so
1961 store the current register stack pointer. Also store the return
1962 address if we do that. */
1963 if (MMIX_CFUN_HAS_LANDING_PAD)
1964 stack_space_to_allocate += 16;
1965 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1966 /* If we do have a saved return-address slot, add room for it. */
1967 stack_space_to_allocate += 8;
1968
1969 /* Make sure we don't get an unaligned stack. */
1970 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1971 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1972 stack_space_to_allocate);
1973
abe32cce 1974 if (crtl->args.pretend_args_size)
d3310704 1975 {
1976 int mmix_first_vararg_reg
1977 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1978 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 1979 - crtl->args.pretend_args_size / 8));
d3310704 1980
1981 for (regno
1982 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1983 regno >= mmix_first_vararg_reg;
1984 regno--)
1985 {
1986 if (offset < 0)
1987 {
1988 HOST_WIDE_INT stack_chunk
1989 = stack_space_to_allocate > (256 - 8)
1990 ? (256 - 8) : stack_space_to_allocate;
1991
1992 mmix_emit_sp_add (-stack_chunk);
1993 offset += stack_chunk;
1994 stack_space_to_allocate -= stack_chunk;
1995 }
1996
1997 /* These registers aren't actually saved (as in "will be
1998 restored"), so don't tell DWARF2 they're saved. */
1999 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2000 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2001 offset)),
2002 gen_rtx_REG (DImode, regno));
2003 offset -= 8;
2004 }
2005 }
2006
2007 /* Store the frame-pointer. */
2008
2009 if (frame_pointer_needed)
2010 {
2011 rtx insn;
2012
2013 if (offset < 0)
2014 {
2015 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2016 HOST_WIDE_INT stack_chunk
2017 = stack_space_to_allocate > (256 - 8 - 8)
2018 ? (256 - 8 - 8) : stack_space_to_allocate;
2019
2020 mmix_emit_sp_add (-stack_chunk);
2021
2022 offset += stack_chunk;
2023 stack_space_to_allocate -= stack_chunk;
2024 }
2025
2026 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2027 plus_constant (Pmode,
2028 stack_pointer_rtx,
d3310704 2029 offset)),
2030 hard_frame_pointer_rtx);
2031 RTX_FRAME_RELATED_P (insn) = 1;
2032 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2033 stack_pointer_rtx,
2034 GEN_INT (offset + 8)));
2035 RTX_FRAME_RELATED_P (insn) = 1;
2036 offset -= 8;
2037 }
2038
2039 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2040 {
2041 rtx tmpreg, retreg;
2042 rtx insn;
2043
2044 /* Store the return-address, if one is needed on the stack. We
2045 usually store it in a register when needed, but that doesn't work
2046 with -fexceptions. */
2047
2048 if (offset < 0)
2049 {
2050 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2051 HOST_WIDE_INT stack_chunk
2052 = stack_space_to_allocate > (256 - 8 - 8)
2053 ? (256 - 8 - 8) : stack_space_to_allocate;
2054
2055 mmix_emit_sp_add (-stack_chunk);
2056
2057 offset += stack_chunk;
2058 stack_space_to_allocate -= stack_chunk;
2059 }
2060
2061 tmpreg = gen_rtx_REG (DImode, 255);
2062 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2063
2064 /* Dwarf2 code is confused by the use of a temporary register for
2065 storing the return address, so we have to express it as a note,
2066 which we attach to the actual store insn. */
2067 emit_move_insn (tmpreg, retreg);
2068
2069 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2070 plus_constant (Pmode,
2071 stack_pointer_rtx,
d3310704 2072 offset)),
2073 tmpreg);
2074 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2075 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
2076 gen_rtx_SET (VOIDmode,
2077 gen_rtx_MEM (DImode,
29c05e22 2078 plus_constant (Pmode,
2079 stack_pointer_rtx,
c0dae7df 2080 offset)),
2081 retreg));
d3310704 2082
2083 offset -= 8;
2084 }
2085 else if (MMIX_CFUN_HAS_LANDING_PAD)
2086 offset -= 8;
2087
2088 if (MMIX_CFUN_HAS_LANDING_PAD)
2089 {
2090 /* Store the register defining the numbering of local registers, so
2091 we know how long to unwind the register stack. */
2092
2093 if (offset < 0)
2094 {
2095 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2096 HOST_WIDE_INT stack_chunk
2097 = stack_space_to_allocate > (256 - 8 - 8)
2098 ? (256 - 8 - 8) : stack_space_to_allocate;
2099
2100 mmix_emit_sp_add (-stack_chunk);
2101
2102 offset += stack_chunk;
2103 stack_space_to_allocate -= stack_chunk;
2104 }
2105
2106 /* We don't tell dwarf2 about this one; we just have it to unwind
2107 the register stack at landing pads. FIXME: It's a kludge because
2108 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2109 register stack at the moment. Best thing would be to handle it
2110 like stack-pointer offsets. Better: some hook into dwarf2out.c
2111 to produce DW_CFA_expression:s that specify the increment of rO,
2112 and unwind it at eh_return (preferred) or at the landing pad.
2113 Then saves to $0..$G-1 could be specified through that register. */
2114
2115 emit_move_insn (gen_rtx_REG (DImode, 255),
2116 gen_rtx_REG (DImode,
2117 MMIX_rO_REGNUM));
2118 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2119 plus_constant (Pmode, stack_pointer_rtx,
2120 offset)),
d3310704 2121 gen_rtx_REG (DImode, 255));
2122 offset -= 8;
2123 }
2124
2125 /* After the return-address and the frame-pointer, we have the local
2126 variables. They're the ones that may have an "unaligned" size. */
2127 offset -= (locals_size + 7) & ~7;
2128
2129 /* Now store all registers that are global, i.e. not saved by the
2130 register file machinery.
2131
2132 It is assumed that the frame-pointer is one of these registers, so it
2133 is explicitly excluded in the count. */
2134
2135 for (regno = 255;
2136 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2137 regno--)
2138 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2139 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2140 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2141 {
2142 rtx insn;
2143
2144 if (offset < 0)
2145 {
2146 HOST_WIDE_INT stack_chunk
2147 = (stack_space_to_allocate > (256 - offset - 8)
2148 ? (256 - offset - 8) : stack_space_to_allocate);
2149
2150 mmix_emit_sp_add (-stack_chunk);
2151 offset += stack_chunk;
2152 stack_space_to_allocate -= stack_chunk;
2153 }
2154
2155 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2156 plus_constant (Pmode,
2157 stack_pointer_rtx,
d3310704 2158 offset)),
2159 gen_rtx_REG (DImode, regno));
2160 RTX_FRAME_RELATED_P (insn) = 1;
2161 offset -= 8;
2162 }
2163
2164 /* Finally, allocate room for outgoing args and local vars if room
2165 wasn't allocated above. */
2166 if (stack_space_to_allocate)
2167 mmix_emit_sp_add (-stack_space_to_allocate);
2168}
2169
2170/* Expands the function epilogue into RTX. */
2171
2172void
7585fcd5 2173mmix_expand_epilogue (void)
d3310704 2174{
2175 HOST_WIDE_INT locals_size = get_frame_size ();
2176 int regno;
2177 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2178 = (crtl->outgoing_args_size
2179 + crtl->args.pretend_args_size
d3310704 2180 + locals_size + 7) & ~7;
2181
d3310704 2182 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2183 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2184
2185 /* Add the space for global non-register-stack registers.
2186 It is assumed that the frame-pointer register can be one of these
2187 registers, in which case it is excluded from the count when needed. */
2188 for (regno = 255;
2189 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2190 regno--)
2191 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2192 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2193 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2194 stack_space_to_deallocate += 8;
2195
2196 /* Add in the space for register stack-pointer. If so, always add room
2197 for the saved PC. */
2198 if (MMIX_CFUN_HAS_LANDING_PAD)
2199 stack_space_to_deallocate += 16;
2200 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2201 /* If we have a saved return-address slot, add it in. */
2202 stack_space_to_deallocate += 8;
2203
2204 /* Add in the frame-pointer. */
2205 if (frame_pointer_needed)
2206 stack_space_to_deallocate += 8;
2207
2208 /* Make sure we don't get an unaligned stack. */
2209 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2210 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2211 stack_space_to_deallocate);
2212
2213 /* We will add back small offsets to the stack pointer as we go.
2214 First, we restore all registers that are global, i.e. not saved by
2215 the register file machinery. */
2216
2217 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2218 regno <= 255;
2219 regno++)
2220 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2221 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2222 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2223 {
2224 if (offset > 255)
2225 {
2226 mmix_emit_sp_add (offset);
2227 stack_space_to_deallocate -= offset;
2228 offset = 0;
2229 }
2230
2231 emit_move_insn (gen_rtx_REG (DImode, regno),
2232 gen_rtx_MEM (DImode,
29c05e22 2233 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2234 offset)));
2235 offset += 8;
2236 }
2237
2238 /* Here is where the local variables were. As in the prologue, they
2239 might be of an unaligned size. */
2240 offset += (locals_size + 7) & ~7;
2241
d3310704 2242 /* The saved register stack pointer is just below the frame-pointer
2243 register. We don't need to restore it "manually"; the POP
2244 instruction does that. */
2245 if (MMIX_CFUN_HAS_LANDING_PAD)
2246 offset += 16;
2247 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2248 /* The return-address slot is just below the frame-pointer register.
2249 We don't need to restore it because we don't really use it. */
2250 offset += 8;
2251
2252 /* Get back the old frame-pointer-value. */
2253 if (frame_pointer_needed)
2254 {
2255 if (offset > 255)
2256 {
2257 mmix_emit_sp_add (offset);
2258
2259 stack_space_to_deallocate -= offset;
2260 offset = 0;
2261 }
2262
2263 emit_move_insn (hard_frame_pointer_rtx,
2264 gen_rtx_MEM (DImode,
29c05e22 2265 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2266 offset)));
2267 offset += 8;
2268 }
2269
2270 /* We do not need to restore pretended incoming args, just add back
2271 offset to sp. */
2272 if (stack_space_to_deallocate != 0)
2273 mmix_emit_sp_add (stack_space_to_deallocate);
2274
18d50ae6 2275 if (crtl->calls_eh_return)
d3310704 2276 /* Adjust the (normal) stack-pointer to that of the receiver.
2277 FIXME: It would be nice if we could also adjust the register stack
2278 here, but we need to express it through DWARF 2 too. */
2279 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2280 gen_rtx_REG (DImode,
2281 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2282}
2283
68cbb7e3 2284/* Output an optimal sequence for setting a register to a specific
2285 constant. Used in an alternative for const_ints in movdi, and when
2286 using large stack-frame offsets.
2287
2288 Use do_begin_end to say if a line-starting TAB and newline before the
2289 first insn and after the last insn is wanted. */
2290
2291void
7585fcd5 2292mmix_output_register_setting (FILE *stream,
2293 int regno,
2294 HOST_WIDEST_INT value,
2295 int do_begin_end)
68cbb7e3 2296{
2297 if (do_begin_end)
2298 fprintf (stream, "\t");
2299
4d66cf01 2300 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K))
2301 fprintf (stream, "NEGU %s,0," HOST_WIDEST_INT_PRINT_DEC, reg_names[regno], -value);
2302 else if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
68cbb7e3 2303 {
2304 /* First, the one-insn cases. */
2305 mmix_output_shiftvalue_op_from_str (stream, "SET",
2306 (unsigned HOST_WIDEST_INT)
2307 value);
2308 fprintf (stream, " %s,", reg_names[regno]);
2309 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2310 }
2311 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2312 {
2313 /* We do this to get a bit more legible assembly code. The next
2314 alternative is mostly redundant with this. */
2315
2316 mmix_output_shiftvalue_op_from_str (stream, "SET",
2317 -(unsigned HOST_WIDEST_INT)
2318 value);
2319 fprintf (stream, " %s,", reg_names[regno]);
2320 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2321 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2322 reg_names[regno]);
2323 }
2324 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2325 {
2326 /* Slightly more expensive, the two-insn cases. */
2327
2328 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2329 is shiftable, or any other one-insn transformation of the value.
2330 FIXME: Check first if the value is "shiftable" by two loading
2331 with two insns, since it makes more readable assembly code (if
2332 anyone else cares). */
2333
2334 mmix_output_shiftvalue_op_from_str (stream, "SET",
2335 ~(unsigned HOST_WIDEST_INT)
2336 value);
2337 fprintf (stream, " %s,", reg_names[regno]);
2338 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2339 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2340 reg_names[regno]);
2341 }
2342 else
2343 {
2344 /* The generic case. 2..4 insns. */
25037517 2345 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2346 const char *op = "SET";
2347 const char *line_begin = "";
f0b228a5 2348 int insns = 0;
68cbb7e3 2349 int i;
f0b228a5 2350 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2351
f0b228a5 2352 /* Compute the number of insns needed to output this constant. */
2353 for (i = 0; i < 4 && tmpvalue != 0; i++)
2354 {
2355 if (tmpvalue & 65535)
2356 insns++;
2357 tmpvalue >>= 16;
2358 }
2359 if (TARGET_BASE_ADDRESSES && insns == 3)
2360 {
2361 /* The number three is based on a static observation on
2362 ghostscript-6.52. Two and four are excluded because there
2363 are too many such constants, and each unique constant (maybe
2364 offset by 1..255) were used few times compared to other uses,
2365 e.g. addresses.
2366
2367 We use base-plus-offset addressing to force it into a global
2368 register; we just use a "LDA reg,VALUE", which will cause the
2369 assembler and linker to DTRT (for constants as well as
2370 addresses). */
2371 fprintf (stream, "LDA %s,", reg_names[regno]);
2372 mmix_output_octa (stream, value, 0);
2373 }
2374 else
68cbb7e3 2375 {
f0b228a5 2376 /* Output pertinent parts of the 4-wyde sequence.
2377 Still more to do if we want this to be optimal, but hey...
2378 Note that the zero case has been handled above. */
2379 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2380 {
f0b228a5 2381 if (value & 65535)
2382 {
2383 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2384 higher_parts[i], reg_names[regno],
2385 (int) (value & 65535));
2386 /* The first one sets the rest of the bits to 0, the next
2387 ones add set bits. */
2388 op = "INC";
2389 line_begin = "\n\t";
2390 }
68cbb7e3 2391
f0b228a5 2392 value >>= 16;
2393 }
68cbb7e3 2394 }
2395 }
2396
2397 if (do_begin_end)
2398 fprintf (stream, "\n");
2399}
2400
2401/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2402 else return 0. */
2403
2404int
7585fcd5 2405mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2406{
2407 /* Shift by 16 bits per group, stop when we've found two groups with
2408 nonzero bits. */
2409 int i;
2410 int has_candidate = 0;
2411
2412 for (i = 0; i < 4; i++)
2413 {
2414 if (value & 65535)
2415 {
2416 if (has_candidate)
2417 return 0;
2418 else
2419 has_candidate = 1;
2420 }
2421
2422 value >>= 16;
2423 }
2424
2425 return 1;
2426}
2427
74f4459c 2428/* X and Y are two things to compare using CODE. Return the rtx for
2429 the cc-reg in the proper mode. */
68cbb7e3 2430
2431rtx
7585fcd5 2432mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2433{
2434 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2435 return gen_reg_rtx (ccmode);
68cbb7e3 2436}
2437
2438/* Local (static) helper functions. */
2439
d3310704 2440static void
7585fcd5 2441mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2442{
2443 rtx insn;
2444
2445 if (offset < 0)
2446 {
2447 /* Negative stack-pointer adjustments are allocations and appear in
2448 the prologue only. We mark them as frame-related so unwind and
2449 debug info is properly emitted for them. */
2450 if (offset > -255)
2451 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2452 stack_pointer_rtx,
2453 GEN_INT (offset)));
2454 else
2455 {
2456 rtx tmpr = gen_rtx_REG (DImode, 255);
2457 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2458 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2459 stack_pointer_rtx, tmpr));
2460 }
2461 RTX_FRAME_RELATED_P (insn) = 1;
2462 }
2463 else
2464 {
2465 /* Positive adjustments are in the epilogue only. Don't mark them
2466 as "frame-related" for unwind info. */
f105c84e 2467 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
d3310704 2468 emit_insn (gen_adddi3 (stack_pointer_rtx,
2469 stack_pointer_rtx,
2470 GEN_INT (offset)));
2471 else
2472 {
2473 rtx tmpr = gen_rtx_REG (DImode, 255);
2474 emit_move_insn (tmpr, GEN_INT (offset));
2475 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2476 stack_pointer_rtx, tmpr));
2477 }
2478 }
2479}
2480
68cbb7e3 2481/* Print operator suitable for doing something with a shiftable
ebb11c7b 2482 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2483
2484static void
7585fcd5 2485mmix_output_shiftvalue_op_from_str (FILE *stream,
2486 const char *mainop,
2487 HOST_WIDEST_INT value)
68cbb7e3 2488{
25037517 2489 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2490 int i;
2491
2492 if (! mmix_shiftable_wyde_value (value))
2493 {
2494 char s[sizeof ("0xffffffffffffffff")];
2495 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2496 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2497 }
2498
2499 for (i = 0; i < 4; i++)
2500 {
2501 /* We know we're through when we find one-bits in the low
2502 16 bits. */
2503 if (value & 0xffff)
2504 {
2505 fprintf (stream, "%s%s", mainop, op_part[i]);
2506 return;
2507 }
2508 value >>= 16;
2509 }
2510
2511 /* No bits set? Then it must have been zero. */
2512 fprintf (stream, "%sL", mainop);
2513}
2514
2515/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2516
2517static void
7585fcd5 2518mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2519{
68cbb7e3 2520 if (do_begin_end)
2521 fprintf (stream, "\tOCTA ");
2522
68cbb7e3 2523 /* Provide a few alternative output formats depending on the number, to
2524 improve legibility of assembler output. */
2525 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2526 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2527 fprintf (stream, "%d", (int) value);
2528 else if (value > (HOST_WIDEST_INT) 0
2529 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2530 fprintf (stream, "#%x", (unsigned int) value);
6996b123 2531 else if (sizeof (HOST_WIDE_INT) == sizeof (HOST_WIDEST_INT))
2532 /* We need to avoid the not-so-universal "0x" prefix; we need the
2533 pure hex-digits together with the mmixal "#" hex prefix. */
2534 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE,
2535 (HOST_WIDE_INT) value);
2536 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */
2537 fprintf (stream, HOST_WIDEST_INT_PRINT_UNSIGNED, value);
68cbb7e3 2538
2539 if (do_begin_end)
2540 fprintf (stream, "\n");
2541}
2542
2543/* Print the presumed shiftable wyde argument shifted into place (to
2544 be output with an operand). */
2545
2546static void
7585fcd5 2547mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2548{
2549 int i;
2550
2551 if (! mmix_shiftable_wyde_value (value))
2552 {
2553 char s[16+2+1];
2554 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2555 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2556 }
2557
2558 for (i = 0; i < 4; i++)
68cbb7e3 2559 {
7585fcd5 2560 /* We know we're through when we find one-bits in the low 16 bits. */
2561 if (value & 0xffff)
2562 {
2563 fprintf (stream, "#%x", (int) (value & 0xffff));
2564 return;
2565 }
68cbb7e3 2566
2567 value >>= 16;
2568 }
2569
2570 /* No bits set? Then it must have been zero. */
2571 fprintf (stream, "0");
2572}
2573
2574/* Output an MMIX condition name corresponding to an operator
2575 and operands:
2576 (comparison_operator [(comparison_operator ...) (const_int 0)])
2577 which means we have to look at *two* operators.
2578
2579 The argument "reversed" refers to reversal of the condition (not the
2580 same as swapping the arguments). */
2581
2582static void
7a7fb407 2583mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2584{
2585 struct cc_conv
2586 {
2587 RTX_CODE cc;
2588
2589 /* The normal output cc-code. */
2590 const char *const normal;
2591
2592 /* The reversed cc-code, or NULL if invalid. */
2593 const char *const reversed;
2594 };
2595
2596 struct cc_type_conv
2597 {
2598 enum machine_mode cc_mode;
2599
21f1e711 2600 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2601 const struct cc_conv *const convs;
2602 };
2603
2604#undef CCEND
21f1e711 2605#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2606
2607 static const struct cc_conv cc_fun_convs[]
2608 = {{ORDERED, "Z", "P"},
2609 {UNORDERED, "P", "Z"},
2610 CCEND};
2611 static const struct cc_conv cc_fp_convs[]
2612 = {{GT, "P", NULL},
2613 {LT, "N", NULL},
2614 CCEND};
2615 static const struct cc_conv cc_fpeq_convs[]
2616 = {{NE, "Z", "P"},
2617 {EQ, "P", "Z"},
2618 CCEND};
2619 static const struct cc_conv cc_uns_convs[]
2620 = {{GEU, "NN", "N"},
2621 {GTU, "P", "NP"},
2622 {LEU, "NP", "P"},
2623 {LTU, "N", "NN"},
2624 CCEND};
2625 static const struct cc_conv cc_signed_convs[]
2626 = {{NE, "NZ", "Z"},
2627 {EQ, "Z", "NZ"},
2628 {GE, "NN", "N"},
2629 {GT, "P", "NP"},
2630 {LE, "NP", "P"},
2631 {LT, "N", "NN"},
2632 CCEND};
2633 static const struct cc_conv cc_di_convs[]
2634 = {{NE, "NZ", "Z"},
2635 {EQ, "Z", "NZ"},
2636 {GE, "NN", "N"},
2637 {GT, "P", "NP"},
2638 {LE, "NP", "P"},
2639 {LT, "N", "NN"},
2640 {GTU, "NZ", "Z"},
2641 {LEU, "Z", "NZ"},
2642 CCEND};
2643#undef CCEND
2644
2645 static const struct cc_type_conv cc_convs[]
2646 = {{CC_FUNmode, cc_fun_convs},
2647 {CC_FPmode, cc_fp_convs},
2648 {CC_FPEQmode, cc_fpeq_convs},
2649 {CC_UNSmode, cc_uns_convs},
2650 {CCmode, cc_signed_convs},
2651 {DImode, cc_di_convs}};
2652
3585dac7 2653 size_t i;
68cbb7e3 2654 int j;
2655
2656 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2657 RTX_CODE cc = GET_CODE (x);
2658
3585dac7 2659 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2660 {
2661 if (mode == cc_convs[i].cc_mode)
2662 {
21f1e711 2663 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2664 if (cc == cc_convs[i].convs[j].cc)
2665 {
2666 const char *mmix_cc
2667 = (reversed ? cc_convs[i].convs[j].reversed
2668 : cc_convs[i].convs[j].normal);
2669
2670 if (mmix_cc == NULL)
2671 fatal_insn ("MMIX Internal: Trying to output invalidly\
2672 reversed condition:", x);
2673
2674 fprintf (stream, "%s", mmix_cc);
2675 return;
2676 }
2677
2678 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2679 }
2680 }
2681
2682 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2683}
2684
2685/* Return the bit-value for a const_int or const_double. */
2686
f105c84e 2687HOST_WIDEST_INT
7a7fb407 2688mmix_intval (const_rtx x)
68cbb7e3 2689{
2690 unsigned HOST_WIDEST_INT retval;
2691
2692 if (GET_CODE (x) == CONST_INT)
2693 return INTVAL (x);
2694
2695 /* We make a little song and dance because converting to long long in
2696 gcc-2.7.2 is broken. I still want people to be able to use it for
2697 cross-compilation to MMIX. */
2698 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2699 {
2700 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2701 {
2702 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2703 retval *= 2;
2704 retval |= CONST_DOUBLE_LOW (x) & 1;
2705
2706 retval |=
2707 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
f5b2b469 2708 << (HOST_BITS_PER_LONG)/2 << (HOST_BITS_PER_LONG)/2;
68cbb7e3 2709 }
2710 else
2711 retval = CONST_DOUBLE_HIGH (x);
2712
2713 return retval;
2714 }
2715
2716 if (GET_CODE (x) == CONST_DOUBLE)
2717 {
2718 REAL_VALUE_TYPE value;
2719
2720 /* FIXME: This macro is not in the manual but should be. */
2721 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2722
2723 if (GET_MODE (x) == DFmode)
2724 {
2725 long bits[2];
dc8dc4ce 2726
68cbb7e3 2727 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2728
ca2399d9 2729 /* The double cast is necessary to avoid getting the long
2730 sign-extended to unsigned long long(!) when they're of
2731 different size (usually 32-bit hosts). */
2732 return
2733 ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0]
2734 << (unsigned HOST_WIDEST_INT) 32U)
2735 | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1];
68cbb7e3 2736 }
2737 else if (GET_MODE (x) == SFmode)
2738 {
2739 long bits;
2740 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2741
2742 return (unsigned long) bits;
2743 }
2744 }
2745
2746 fatal_insn ("MMIX Internal: This is not a constant:", x);
2747}
2748
3b2411a8 2749/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2750
2751enum machine_mode
2752mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
2753 enum machine_mode mode,
2754 int *punsignedp ATTRIBUTE_UNUSED,
2755 const_tree fntype ATTRIBUTE_UNUSED,
2756 int for_return)
2757{
2758 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2759 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2760 if (for_return == 1)
3b2411a8 2761 return mode;
2762
2763 /* Promotion of modes currently generates slow code, extending before
2764 operation, so we do it only for arguments. */
2765 if (GET_MODE_CLASS (mode) == MODE_INT
2766 && GET_MODE_SIZE (mode) < 8)
2767 return DImode;
2768 else
2769 return mode;
2770}
9e4a734a 2771/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2772
2773static rtx
2774mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2775 int incoming ATTRIBUTE_UNUSED)
2776{
2777 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2778}
2779
5a1c68c3 2780/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2781
2782 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2783 of it; we can deduce the value. */
2784
2785bool
2786mmix_frame_pointer_required (void)
2787{
2788 return (cfun->has_nonlocal_label);
2789}
2790
68cbb7e3 2791/*
2792 * Local variables:
2793 * eval: (c-set-style "gnu")
2794 * indent-tabs-mode: t
2795 * End:
2796 */