]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/mmix/mmix.c
2009-06-29 Olatunji Ruwase <tjruwase@google.com>
[thirdparty/gcc.git] / gcc / config / mmix / mmix.c
CommitLineData
68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
cfaf579d 2 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
978b9403 3 Free Software Foundation, Inc.
68cbb7e3 4 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
5
581084df 6This file is part of GCC.
68cbb7e3 7
581084df 8GCC is free software; you can redistribute it and/or modify
68cbb7e3 9it under the terms of the GNU General Public License as published by
038d1e19 10the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 11any later version.
12
581084df 13GCC is distributed in the hope that it will be useful,
68cbb7e3 14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
038d1e19 19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
68cbb7e3 21
22#include "config.h"
23#include "system.h"
805e22b2 24#include "coretypes.h"
25#include "tm.h"
68cbb7e3 26#include "rtl.h"
27#include "regs.h"
28#include "hard-reg-set.h"
29#include "hashtab.h"
30#include "insn-config.h"
31#include "output.h"
32#include "flags.h"
33#include "tree.h"
34#include "function.h"
35#include "expr.h"
36#include "toplev.h"
37#include "recog.h"
38#include "ggc.h"
39#include "dwarf2.h"
40#include "debug.h"
41#include "tm_p.h"
42#include "integrate.h"
43#include "target.h"
44#include "target-def.h"
b744252f 45#include "real.h"
68cbb7e3 46
47/* First some local helper definitions. */
48#define MMIX_FIRST_GLOBAL_REGNUM 32
49
50/* We'd need a current_function_has_landing_pad. It's marked as such when
51 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
52 mostly. */
53#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
54
55/* We have no means to tell DWARF 2 about the register stack, so we need
56 to store the return address on the stack if an exception can get into
d3310704 57 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 58 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 59 after reload_completed; it may contain incorrect information some time
60 before that. Within a RTL sequence (after a call to start_sequence,
61 such as in RTL expanders), leaf_function_p doesn't see all insns
62 (perhaps any insn). But regs_ever_live is up-to-date when
63 leaf_function_p () isn't, so we "or" them together to get accurate
64 information. FIXME: Some tweak to leaf_function_p might be
f024691d 65 preferable. */
d3310704 66#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
67 (flag_exceptions \
3072d30e 68 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 69 || !leaf_function_p ()))
68cbb7e3 70
71#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 72 (crtl->calls_eh_return \
68cbb7e3 73 && (EH_RETURN_DATA_REGNO (0) == REGNO \
74 || EH_RETURN_DATA_REGNO (1) == REGNO \
75 || EH_RETURN_DATA_REGNO (2) == REGNO \
76 || EH_RETURN_DATA_REGNO (3) == REGNO))
77
d68ffc6f 78/* For the default ABI, we rename registers at output-time to fill the gap
79 between the (statically partitioned) saved registers and call-clobbered
80 registers. In effect this makes unused call-saved registers to be used
81 as call-clobbered registers. The benefit comes from keeping the number
82 of local registers (value of rL) low, since there's a cost of
d3310704 83 increasing rL and clearing unused (unset) registers with lower numbers.
84 Don't translate while outputting the prologue. */
d68ffc6f 85#define MMIX_OUTPUT_REGNO(N) \
86 (TARGET_ABI_GNU \
0b123c47 87 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
88 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 89 || cfun == NULL \
90 || cfun->machine == NULL \
91 || cfun->machine->in_prologue \
d68ffc6f 92 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
93 + cfun->machine->highest_saved_stack_register + 1))
94
0b123c47 95/* The %d in "POP %d,0". */
96#define MMIX_POP_ARGUMENT() \
97 ((! TARGET_ABI_GNU \
abe32cce 98 && crtl->return_rtx != NULL \
18d50ae6 99 && ! cfun->returns_struct) \
abe32cce 100 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
101 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 102 : 0)
103
68cbb7e3 104/* The canonical saved comparison operands for non-cc0 machines, set in
105 the compare expander. */
106rtx mmix_compare_op0;
107rtx mmix_compare_op1;
108
68cbb7e3 109/* Declarations of locals. */
110
68cbb7e3 111/* Intermediate for insn output. */
112static int mmix_output_destination_register;
113
114static void mmix_output_shiftvalue_op_from_str
7585fcd5 115 (FILE *, const char *, HOST_WIDEST_INT);
116static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
117static void mmix_output_condition (FILE *, rtx, int);
118static HOST_WIDEST_INT mmix_intval (rtx);
119static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
120static bool mmix_assemble_integer (rtx, unsigned int, int);
121static struct machine_function *mmix_init_machine_status (void);
122static void mmix_encode_section_info (tree, rtx, int);
123static const char *mmix_strip_name_encoding (const char *);
124static void mmix_emit_sp_add (HOST_WIDE_INT offset);
125static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
126static void mmix_target_asm_function_end_prologue (FILE *);
127static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
fd50b071 128static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool);
7585fcd5 129static void mmix_reorg (void);
6988553d 130static void mmix_asm_output_mi_thunk
7585fcd5 131 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 132static void mmix_setup_incoming_varargs
133 (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
7585fcd5 134static void mmix_file_start (void);
135static void mmix_file_end (void);
f529eb25 136static bool mmix_rtx_costs (rtx, int, int, int *, bool);
9e4a734a 137static rtx mmix_struct_value_rtx (tree, int);
fb80456a 138static bool mmix_pass_by_reference (CUMULATIVE_ARGS *,
139 enum machine_mode, const_tree, bool);
68cbb7e3 140
141/* Target structure macros. Listed by node. See `Using and Porting GCC'
142 for a general description. */
143
144/* Node: Function Entry */
145
58356836 146#undef TARGET_ASM_BYTE_OP
147#define TARGET_ASM_BYTE_OP NULL
148#undef TARGET_ASM_ALIGNED_HI_OP
149#define TARGET_ASM_ALIGNED_HI_OP NULL
150#undef TARGET_ASM_ALIGNED_SI_OP
151#define TARGET_ASM_ALIGNED_SI_OP NULL
152#undef TARGET_ASM_ALIGNED_DI_OP
153#define TARGET_ASM_ALIGNED_DI_OP NULL
154#undef TARGET_ASM_INTEGER
155#define TARGET_ASM_INTEGER mmix_assemble_integer
156
68cbb7e3 157#undef TARGET_ASM_FUNCTION_PROLOGUE
158#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
159
d3310704 160#undef TARGET_ASM_FUNCTION_END_PROLOGUE
161#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
162
68cbb7e3 163#undef TARGET_ASM_FUNCTION_EPILOGUE
164#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
165
7811991d 166#undef TARGET_ENCODE_SECTION_INFO
167#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 168#undef TARGET_STRIP_NAME_ENCODING
169#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 170
6988553d 171#undef TARGET_ASM_OUTPUT_MI_THUNK
172#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 173#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
174#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 175#undef TARGET_ASM_FILE_START
176#define TARGET_ASM_FILE_START mmix_file_start
177#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
178#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 179#undef TARGET_ASM_FILE_END
180#define TARGET_ASM_FILE_END mmix_file_end
6988553d 181
fab7adbf 182#undef TARGET_RTX_COSTS
183#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 184#undef TARGET_ADDRESS_COST
f529eb25 185#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
fab7adbf 186
2efea8c0 187#undef TARGET_MACHINE_DEPENDENT_REORG
188#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
189
9e4a734a 190#undef TARGET_PROMOTE_FUNCTION_ARGS
fb80456a 191#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true
9e4a734a 192#if 0
193/* Apparently not doing TRT if int < register-size. FIXME: Perhaps
194 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
195#undef TARGET_PROMOTE_FUNCTION_RETURN
196#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
197#endif
198
199#undef TARGET_STRUCT_VALUE_RTX
200#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 201#undef TARGET_SETUP_INCOMING_VARARGS
202#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 203#undef TARGET_PASS_BY_REFERENCE
204#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 205#undef TARGET_CALLEE_COPIES
206#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
1eb18897 207#undef TARGET_DEFAULT_TARGET_FLAGS
208#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
9e4a734a 209
fd50b071 210#undef TARGET_LEGITIMATE_ADDRESS_P
211#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
212
68cbb7e3 213struct gcc_target targetm = TARGET_INITIALIZER;
214
215/* Functions that are expansions for target macros.
216 See Target Macros in `Using and Porting GCC'. */
217
218/* OVERRIDE_OPTIONS. */
219
220void
7585fcd5 221mmix_override_options (void)
68cbb7e3 222{
223 /* Should we err or should we warn? Hmm. At least we must neutralize
224 it. For example the wrong kind of case-tables will be generated with
225 PIC; we use absolute address items for mmixal compatibility. FIXME:
226 They could be relative if we just elide them to after all pertinent
227 labels. */
228 if (flag_pic)
229 {
c3ceba8e 230 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 231 flag_pic = 0;
232 }
68cbb7e3 233}
234
235/* INIT_EXPANDERS. */
236
237void
7585fcd5 238mmix_init_expanders (void)
68cbb7e3 239{
240 init_machine_status = mmix_init_machine_status;
241}
242
243/* Set the per-function data. */
244
1f3233d1 245static struct machine_function *
7585fcd5 246mmix_init_machine_status (void)
68cbb7e3 247{
225ab426 248 return GGC_CNEW (struct machine_function);
68cbb7e3 249}
250
251/* DATA_ALIGNMENT.
252 We have trouble getting the address of stuff that is located at other
253 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 254 at least 32-bit alignment. */
68cbb7e3 255
256int
7585fcd5 257mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 258{
259 if (basic_align < 32)
260 return 32;
261
262 return basic_align;
263}
264
265/* CONSTANT_ALIGNMENT. */
266
267int
7585fcd5 268mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 269{
270 if (basic_align < 32)
271 return 32;
272
273 return basic_align;
274}
275
276/* LOCAL_ALIGNMENT. */
277
278int
7585fcd5 279mmix_local_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 280{
281 if (basic_align < 32)
282 return 32;
283
284 return basic_align;
285}
286
287/* CONDITIONAL_REGISTER_USAGE. */
288
289void
7585fcd5 290mmix_conditional_register_usage (void)
68cbb7e3 291{
292 int i;
293
294 if (TARGET_ABI_GNU)
295 {
296 static const int gnu_abi_reg_alloc_order[]
297 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
298
299 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
300 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
301
302 /* Change the default from the mmixware ABI. For the GNU ABI,
303 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 304 call-clobbered local register for the "hole" that holds the
305 number of saved local registers saved by PUSHJ/PUSHGO during the
306 function call, receiving the return value at return. So best is
307 to use the highest, $31. It's already marked call-clobbered for
308 the mmixware ABI. */
68cbb7e3 309 for (i = 15; i <= 30; i++)
310 call_used_regs[i] = 0;
f0b228a5 311
312 /* "Unfix" the parameter registers. */
313 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
314 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
315 i++)
316 fixed_regs[i] = 0;
68cbb7e3 317 }
318
319 /* Step over the ":" in special register names. */
320 if (! TARGET_TOPLEVEL_SYMBOLS)
321 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
322 if (reg_names[i][0] == ':')
323 reg_names[i]++;
324}
325
6d1f3d31 326/* INCOMING_REGNO and OUTGOING_REGNO worker function.
327 Those two macros must only be applied to function argument
328 registers. FIXME: for their current use in gcc, it'd be better
329 with an explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P
330 a'la FUNCTION_ARG / FUNCTION_INCOMING_ARG instead of forcing the
331 target to commit to a fixed mapping and for any unspecified
332 register use. */
333
334int
335mmix_opposite_regno (int regno, int incoming)
336{
337 if (!mmix_function_arg_regno_p (regno, incoming))
338 return regno;
339
340 return
341 regno - (incoming
342 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
343 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
344}
345
d3310704 346/* LOCAL_REGNO.
347 All registers that are part of the register stack and that will be
348 saved are local. */
349
350int
7585fcd5 351mmix_local_regno (int regno)
d3310704 352{
353 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
354}
355
68cbb7e3 356/* PREFERRED_RELOAD_CLASS.
357 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
358
359enum reg_class
8deb3959 360mmix_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass)
68cbb7e3 361{
362 /* FIXME: Revisit. */
363 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 364 ? REMAINDER_REG : rclass;
68cbb7e3 365}
366
367/* PREFERRED_OUTPUT_RELOAD_CLASS.
368 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
369
370enum reg_class
7585fcd5 371mmix_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED,
8deb3959 372 enum reg_class rclass)
68cbb7e3 373{
374 /* FIXME: Revisit. */
375 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 376 ? REMAINDER_REG : rclass;
68cbb7e3 377}
378
379/* SECONDARY_RELOAD_CLASS.
380 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
381
382enum reg_class
8deb3959 383mmix_secondary_reload_class (enum reg_class rclass,
7585fcd5 384 enum machine_mode mode ATTRIBUTE_UNUSED,
385 rtx x ATTRIBUTE_UNUSED,
386 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 387{
8deb3959 388 if (rclass == REMAINDER_REG
389 || rclass == HIMULT_REG
390 || rclass == SYSTEM_REGS)
68cbb7e3 391 return GENERAL_REGS;
392
68cbb7e3 393 return NO_REGS;
394}
395
396/* CONST_OK_FOR_LETTER_P. */
397
398int
7585fcd5 399mmix_const_ok_for_letter_p (HOST_WIDE_INT value, int c)
68cbb7e3 400{
401 return
402 (c == 'I' ? value >= 0 && value <= 255
403 : c == 'J' ? value >= 0 && value <= 65535
404 : c == 'K' ? value <= 0 && value >= -255
405 : c == 'L' ? mmix_shiftable_wyde_value (value)
406 : c == 'M' ? value == 0
407 : c == 'N' ? mmix_shiftable_wyde_value (~value)
408 : c == 'O' ? (value == 3 || value == 5 || value == 9
409 || value == 17)
410 : 0);
411}
412
413/* CONST_DOUBLE_OK_FOR_LETTER_P. */
414
415int
7585fcd5 416mmix_const_double_ok_for_letter_p (rtx value, int c)
68cbb7e3 417{
418 return
419 (c == 'G' ? value == CONST0_RTX (GET_MODE (value))
420 : 0);
421}
422
423/* EXTRA_CONSTRAINT.
424 We need this since our constants are not always expressible as
425 CONST_INT:s, but rather often as CONST_DOUBLE:s. */
426
427int
7585fcd5 428mmix_extra_constraint (rtx x, int c, int strict)
68cbb7e3 429{
430 HOST_WIDEST_INT value;
431
0103ffd2 432 /* When checking for an address, we need to handle strict vs. non-strict
433 register checks. Don't use address_operand, but instead its
434 equivalent (its callee, which it is just a wrapper for),
435 memory_operand_p and the strict-equivalent strict_memory_address_p. */
68cbb7e3 436 if (c == 'U')
0103ffd2 437 return
438 strict
439 ? strict_memory_address_p (Pmode, x)
440 : memory_address_p (Pmode, x);
68cbb7e3 441
f0b228a5 442 /* R asks whether x is to be loaded with GETA or something else. Right
443 now, only a SYMBOL_REF and LABEL_REF can fit for
444 TARGET_BASE_ADDRESSES.
445
446 Only constant symbolic addresses apply. With TARGET_BASE_ADDRESSES,
447 we just allow straight LABEL_REF or SYMBOL_REFs with SYMBOL_REF_FLAG
448 set right now; only function addresses and code labels. If we change
449 to let SYMBOL_REF_FLAG be set on other symbols, we have to check
450 inside CONST expressions. When TARGET_BASE_ADDRESSES is not in
451 effect, a "raw" constant check together with mmix_constant_address_p
452 is all that's needed; we want all constant addresses to be loaded
453 with GETA then. */
454 if (c == 'R')
455 return
456 GET_CODE (x) != CONST_INT && GET_CODE (x) != CONST_DOUBLE
457 && mmix_constant_address_p (x)
458 && (! TARGET_BASE_ADDRESSES
459 || (GET_CODE (x) == LABEL_REF
460 || (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FLAG (x))));
461
68cbb7e3 462 if (GET_CODE (x) != CONST_DOUBLE || GET_MODE (x) != VOIDmode)
463 return 0;
464
465 value = mmix_intval (x);
466
467 /* We used to map Q->J, R->K, S->L, T->N, U->O, but we don't have to any
f0b228a5 468 more ('U' taken for address_operand, 'R' similarly). Some letters map
469 outside of CONST_INT, though; we still use 'S' and 'T'. */
68cbb7e3 470 if (c == 'S')
471 return mmix_shiftable_wyde_value (value);
472 else if (c == 'T')
473 return mmix_shiftable_wyde_value (~value);
474 return 0;
475}
476
477/* DYNAMIC_CHAIN_ADDRESS. */
478
479rtx
7585fcd5 480mmix_dynamic_chain_address (rtx frame)
68cbb7e3 481{
482 /* FIXME: the frame-pointer is stored at offset -8 from the current
483 frame-pointer. Unfortunately, the caller assumes that a
484 frame-pointer is present for *all* previous frames. There should be
485 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
486 return plus_constant (frame, -8);
487}
488
489/* STARTING_FRAME_OFFSET. */
490
491int
7585fcd5 492mmix_starting_frame_offset (void)
68cbb7e3 493{
494 /* The old frame pointer is in the slot below the new one, so
495 FIRST_PARM_OFFSET does not need to depend on whether the
496 frame-pointer is needed or not. We have to adjust for the register
497 stack pointer being located below the saved frame pointer.
498 Similarly, we store the return address on the stack too, for
499 exception handling, and always if we save the register stack pointer. */
500 return
501 (-8
502 + (MMIX_CFUN_HAS_LANDING_PAD
503 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
504}
505
506/* RETURN_ADDR_RTX. */
507
508rtx
7585fcd5 509mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 510{
511 return count == 0
512 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 513 /* FIXME: Set frame_alias_set on the following. (Why?)
514 See mmix_initial_elimination_offset for the reason we can't use
515 get_hard_reg_initial_val for both. Always using a stack slot
516 and not a register would be suboptimal. */
68cbb7e3 517 ? validize_mem (gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, -16)))
518 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
519 : NULL_RTX;
520}
521
522/* SETUP_FRAME_ADDRESSES. */
523
524void
7585fcd5 525mmix_setup_frame_addresses (void)
68cbb7e3 526{
527 /* Nothing needed at the moment. */
528}
529
530/* The difference between the (imaginary) frame pointer and the stack
531 pointer. Used to eliminate the frame pointer. */
532
533int
7585fcd5 534mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 535{
536 int regno;
537 int fp_sp_offset
abe32cce 538 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 539
af08e904 540 /* There is no actual offset between these two virtual values, but for
541 the frame-pointer, we have the old one in the stack position below
542 it, so the offset for the frame-pointer to the stack-pointer is one
543 octabyte larger. */
68cbb7e3 544 if (fromreg == MMIX_ARG_POINTER_REGNUM
545 && toreg == MMIX_FRAME_POINTER_REGNUM)
546 return 0;
547
548 /* The difference is the size of local variables plus the size of
549 outgoing function arguments that would normally be passed as
550 registers but must be passed on stack because we're out of
551 function-argument registers. Only global saved registers are
552 counted; the others go on the register stack.
553
554 The frame-pointer is counted too if it is what is eliminated, as we
555 need to balance the offset for it from STARTING_FRAME_OFFSET.
556
557 Also add in the slot for the register stack pointer we save if we
558 have a landing pad.
559
560 Unfortunately, we can't access $0..$14, from unwinder code easily, so
561 store the return address in a frame slot too. FIXME: Only for
562 non-leaf functions. FIXME: Always with a landing pad, because it's
563 hard to know whether we need the other at the time we know we need
564 the offset for one (and have to state it). It's a kludge until we
565 can express the register stack in the EH frame info.
566
567 We have to do alignment here; get_frame_size will not return a
568 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
569
570 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
571 regno <= 255;
572 regno++)
3072d30e 573 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 574 || IS_MMIX_EH_RETURN_DATA_REG (regno))
575 fp_sp_offset += 8;
576
577 return fp_sp_offset
578 + (MMIX_CFUN_HAS_LANDING_PAD
579 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
580 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
581}
582
583/* Return an rtx for a function argument to go in a register, and 0 for
584 one that must go on stack. */
585
586rtx
7585fcd5 587mmix_function_arg (const CUMULATIVE_ARGS *argsp,
588 enum machine_mode mode,
589 tree type,
590 int named ATTRIBUTE_UNUSED,
591 int incoming)
68cbb7e3 592{
68cbb7e3 593 /* Last-argument marker. */
594 if (type == void_type_node)
595 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
596 ? gen_rtx_REG (mode,
597 (incoming
598 ? MMIX_FIRST_INCOMING_ARG_REGNUM
599 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
600 : NULL_RTX;
601
602 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 603 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 604 && (GET_MODE_BITSIZE (mode) <= 64
605 || argsp->lib
606 || TARGET_LIBFUNC))
607 ? gen_rtx_REG (mode,
608 (incoming
609 ? MMIX_FIRST_INCOMING_ARG_REGNUM
610 : MMIX_FIRST_ARG_REGNUM)
611 + argsp->regs)
612 : NULL_RTX;
613}
614
615/* Returns nonzero for everything that goes by reference, 0 for
616 everything that goes by value. */
617
b981d932 618static bool
fb80456a 619mmix_pass_by_reference (CUMULATIVE_ARGS *argsp, enum machine_mode mode,
620 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 621{
0336f0f0 622 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 623 necessary. */
bef380a4 624 if (targetm.calls.must_pass_in_stack (mode, type))
625 return true;
626
627 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
628 && !TARGET_LIBFUNC
629 && (!argsp || !argsp->lib))
630 return true;
631
632 return false;
68cbb7e3 633}
634
635/* Return nonzero if regno is a register number where a parameter is
636 passed, and 0 otherwise. */
637
638int
7585fcd5 639mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 640{
641 int first_arg_regnum
642 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
643
644 return regno >= first_arg_regnum
645 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
646}
647
648/* FUNCTION_OUTGOING_VALUE. */
649
650rtx
fb80456a 651mmix_function_outgoing_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED)
68cbb7e3 652{
653 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 654 enum machine_mode cmode;
655 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
656 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
657 int i;
658 int nregs;
659
660 /* Return values that fit in a register need no special handling.
661 There's no register hole when parameters are passed in global
662 registers. */
663 if (TARGET_ABI_GNU
664 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
665 return
666 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
667
fb89a8c9 668 if (COMPLEX_MODE_P (mode))
669 /* A complex type, made up of components. */
670 cmode = TYPE_MODE (TREE_TYPE (valtype));
671 else
672 {
673 /* Of the other larger-than-register modes, we only support
674 scalar mode TImode. (At least, that's the only one that's
675 been rudimentally tested.) Make sure we're alerted for
676 unexpected cases. */
677 if (mode != TImode)
678 sorry ("support for mode %qs", GET_MODE_NAME (mode));
679
680 /* In any case, we will fill registers to the natural size. */
681 cmode = DImode;
682 }
683
68cbb7e3 684 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
685
686 /* We need to take care of the effect of the register hole on return
687 values of large sizes; the last register will appear as the first
688 register, with the rest shifted. (For complex modes, this is just
689 swapped registers.) */
690
691 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 692 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 693 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
694
695 /* FIXME: Maybe we should handle structure values like this too
696 (adjusted for BLKmode), perhaps for both ABI:s. */
697 for (i = 0; i < nregs - 1; i++)
698 vec[i]
699 = gen_rtx_EXPR_LIST (VOIDmode,
700 gen_rtx_REG (cmode, first_val_regnum + i),
701 GEN_INT ((i + 1) * BITS_PER_UNIT));
702
703 vec[nregs - 1]
704 = gen_rtx_EXPR_LIST (VOIDmode,
705 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 706 const0_rtx);
68cbb7e3 707
708 return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs, vec));
709}
710
c715d549 711/* FUNCTION_VALUE_REGNO_P. */
712
713int
7585fcd5 714mmix_function_value_regno_p (int regno)
c715d549 715{
716 return regno == MMIX_RETURN_VALUE_REGNUM;
717}
718
68cbb7e3 719/* EH_RETURN_DATA_REGNO. */
720
721int
7585fcd5 722mmix_eh_return_data_regno (int n)
68cbb7e3 723{
724 if (n >= 0 && n < 4)
725 return MMIX_EH_RETURN_DATA_REGNO_START + n;
726
727 return INVALID_REGNUM;
728}
729
730/* EH_RETURN_STACKADJ_RTX. */
731
732rtx
7585fcd5 733mmix_eh_return_stackadj_rtx (void)
68cbb7e3 734{
735 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
736}
737
738/* EH_RETURN_HANDLER_RTX. */
739
740rtx
7585fcd5 741mmix_eh_return_handler_rtx (void)
68cbb7e3 742{
7585fcd5 743 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 744}
745
746/* ASM_PREFERRED_EH_DATA_FORMAT. */
747
748int
7585fcd5 749mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
750 int global ATTRIBUTE_UNUSED)
68cbb7e3 751{
752 /* This is the default (was at 2001-07-20). Revisit when needed. */
753 return DW_EH_PE_absptr;
754}
755
28c2d844 756/* Make a note that we've seen the beginning of the prologue. This
d3310704 757 matters to whether we'll translate register numbers as calculated by
2efea8c0 758 mmix_reorg. */
68cbb7e3 759
d3310704 760static void
7585fcd5 761mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
762 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 763{
d3310704 764 cfun->machine->in_prologue = 1;
765}
68cbb7e3 766
d3310704 767/* Make a note that we've seen the end of the prologue. */
68cbb7e3 768
d3310704 769static void
7585fcd5 770mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 771{
772 cfun->machine->in_prologue = 0;
d68ffc6f 773}
774
2efea8c0 775/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
776 done here; just virtually by calculating the highest saved stack
777 register number used to modify the register numbers at output time. */
d68ffc6f 778
2efea8c0 779static void
7585fcd5 780mmix_reorg (void)
d68ffc6f 781{
782 int regno;
68cbb7e3 783
784 /* We put the number of the highest saved register-file register in a
785 location convenient for the call-patterns to output. Note that we
786 don't tell dwarf2 about these registers, since it can't restore them
787 anyway. */
d68ffc6f 788 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 789 regno >= 0;
790 regno--)
3072d30e 791 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 792 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
793 break;
794
d68ffc6f 795 /* Regardless of whether they're saved (they might be just read), we
796 mustn't include registers that carry parameters. We could scan the
797 insns to see whether they're actually used (and indeed do other less
798 trivial register usage analysis and transformations), but it seems
799 wasteful to optimize for unused parameter registers. As of
3072d30e 800 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 801 that might change. */
abe32cce 802 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 803 {
abe32cce 804 regno = crtl->args.info.regs - 1;
d68ffc6f 805
806 /* We don't want to let this cause us to go over the limit and make
807 incoming parameter registers be misnumbered and treating the last
808 parameter register and incoming return value register call-saved.
809 Stop things at the unmodified scheme. */
810 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
811 regno = MMIX_RETURN_VALUE_REGNUM - 1;
812 }
813
814 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 815}
816
817/* TARGET_ASM_FUNCTION_EPILOGUE. */
818
4448bfa5 819static void
7585fcd5 820mmix_target_asm_function_epilogue (FILE *stream,
821 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 822{
d3310704 823 /* Emit an \n for readability of the generated assembly. */
824 fputc ('\n', stream);
825}
68cbb7e3 826
e7f5e241 827/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 828
6988553d 829static void
7585fcd5 830mmix_asm_output_mi_thunk (FILE *stream,
831 tree fndecl ATTRIBUTE_UNUSED,
832 HOST_WIDE_INT delta,
833 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
834 tree func)
d3310704 835{
6644435d 836 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
837 location of structure to return as invisible first argument), you
838 need to tweak this code too. */
d3310704 839 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 840
d3310704 841 if (delta >= 0 && delta < 65536)
e7f5e241 842 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 843 else if (delta < 0 && delta >= -255)
e7f5e241 844 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 845 else
0b123c47 846 {
d3310704 847 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 848 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 849 }
850
d3310704 851 fprintf (stream, "\tJMP ");
852 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
853 fprintf (stream, "\n");
854}
68cbb7e3 855
d3310704 856/* FUNCTION_PROFILER. */
68cbb7e3 857
d3310704 858void
7585fcd5 859mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
860 int labelno ATTRIBUTE_UNUSED)
d3310704 861{
862 sorry ("function_profiler support for MMIX");
863}
68cbb7e3 864
9e4a734a 865/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
866 let's stick to pushing argument registers on the stack. Later, we
867 can parse all arguments in registers, to improve performance. */
68cbb7e3 868
9e4a734a 869static void
7585fcd5 870mmix_setup_incoming_varargs (CUMULATIVE_ARGS *args_so_farp,
871 enum machine_mode mode,
872 tree vartype,
873 int *pretend_sizep,
874 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 875{
7ccc713a 876 /* The last named variable has been handled, but
877 args_so_farp has not been advanced for it. */
878 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
879 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 880
881 /* We assume that one argument takes up one register here. That should
5aedf60c 882 be true until we start messing with multi-reg parameters. */
68cbb7e3 883 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
884 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
885}
886
68cbb7e3 887/* TRAMPOLINE_SIZE. */
888/* Four 4-byte insns plus two 8-byte values. */
889int mmix_trampoline_size = 32;
890
891
892/* TRAMPOLINE_TEMPLATE. */
893
894void
7585fcd5 895mmix_trampoline_template (FILE *stream)
68cbb7e3 896{
af08e904 897 /* Read a value into the static-chain register and jump somewhere. The
898 static chain is stored at offset 16, and the function address is
899 stored at offset 24. */
68cbb7e3 900 /* FIXME: GCC copies this using *intsize* (tetra), when it should use
901 register size (octa). */
902 fprintf (stream, "\tGETA $255,1F\n\t");
903 fprintf (stream, "LDOU %s,$255,0\n\t",
904 reg_names[MMIX_STATIC_CHAIN_REGNUM]);
905 fprintf (stream, "LDOU $255,$255,8\n\t");
906 fprintf (stream, "GO $255,$255,0\n");
907 fprintf (stream, "1H\tOCTA 0\n\t");
908 fprintf (stream, "OCTA 0\n");
909}
910
911/* INITIALIZE_TRAMPOLINE. */
912/* Set the static chain and function pointer field in the trampoline.
913 We also SYNCID here to be sure (doesn't matter in the simulator, but
914 some day it will). */
915
916void
7585fcd5 917mmix_initialize_trampoline (rtx trampaddr, rtx fnaddr, rtx static_chain)
68cbb7e3 918{
919 emit_move_insn (gen_rtx_MEM (DImode, plus_constant (trampaddr, 16)),
920 static_chain);
921 emit_move_insn (gen_rtx_MEM (DImode,
922 plus_constant (trampaddr, 24)),
923 fnaddr);
924 emit_insn (gen_sync_icache (validize_mem (gen_rtx_MEM (DImode,
925 trampaddr)),
926 GEN_INT (mmix_trampoline_size - 1)));
927}
928
929/* We must exclude constant addresses that have an increment that is not a
930 multiple of four bytes because of restrictions of the GETA
f0b228a5 931 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 932
933int
7585fcd5 934mmix_constant_address_p (rtx x)
68cbb7e3 935{
936 RTX_CODE code = GET_CODE (x);
937 int addend = 0;
f0b228a5 938 /* When using "base addresses", anything constant goes. */
939 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 940
68cbb7e3 941 switch (code)
942 {
943 case LABEL_REF:
944 case SYMBOL_REF:
945 return 1;
946
68cbb7e3 947 case HIGH:
f0b228a5 948 /* FIXME: Don't know how to dissect these. Avoid them for now,
949 except we know they're constants. */
950 return constant_ok;
68cbb7e3 951
952 case CONST_INT:
953 addend = INTVAL (x);
954 break;
955
956 case CONST_DOUBLE:
957 if (GET_MODE (x) != VOIDmode)
958 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 959 return constant_ok;
68cbb7e3 960 addend = CONST_DOUBLE_LOW (x);
961 break;
962
963 case CONST:
964 /* Note that expressions with arithmetic on forward references don't
965 work in mmixal. People using gcc assembly code with mmixal might
966 need to move arrays and such to before the point of use. */
967 if (GET_CODE (XEXP (x, 0)) == PLUS)
968 {
969 rtx x0 = XEXP (XEXP (x, 0), 0);
970 rtx x1 = XEXP (XEXP (x, 0), 1);
971
972 if ((GET_CODE (x0) == SYMBOL_REF
973 || GET_CODE (x0) == LABEL_REF)
974 && (GET_CODE (x1) == CONST_INT
975 || (GET_CODE (x1) == CONST_DOUBLE
976 && GET_MODE (x1) == VOIDmode)))
977 addend = mmix_intval (x1);
978 else
f0b228a5 979 return constant_ok;
68cbb7e3 980 }
981 else
f0b228a5 982 return constant_ok;
68cbb7e3 983 break;
984
985 default:
986 return 0;
987 }
988
f0b228a5 989 return constant_ok || (addend & 3) == 0;
68cbb7e3 990}
991
fd50b071 992/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 993
fd50b071 994bool
995mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
996 rtx x,
997 bool strict_checking)
68cbb7e3 998{
999#define MMIX_REG_OK(X) \
1000 ((strict_checking \
1001 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1002 || (reg_renumber[REGNO (X)] > 0 \
1003 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1004 || (!strict_checking \
1005 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1006 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1007 || REGNO (X) == ARG_POINTER_REGNUM)))
1008
1009 /* We only accept:
1010 (mem reg)
1011 (mem (plus reg reg))
f0b228a5 1012 (mem (plus reg 0..255)).
1013 unless TARGET_BASE_ADDRESSES, in which case we accept all
1014 (mem constant_address) too. */
68cbb7e3 1015
1016
1017 /* (mem reg) */
1018 if (REG_P (x) && MMIX_REG_OK (x))
1019 return 1;
1020
1021 if (GET_CODE(x) == PLUS)
1022 {
1023 rtx x1 = XEXP (x, 0);
1024 rtx x2 = XEXP (x, 1);
1025
1026 /* Try swapping the order. FIXME: Do we need this? */
1027 if (! REG_P (x1))
1028 {
1029 rtx tem = x1;
1030 x1 = x2;
1031 x2 = tem;
1032 }
1033
f0b228a5 1034 /* (mem (plus (reg?) (?))) */
68cbb7e3 1035 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1036 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1037
f0b228a5 1038 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1039 if (REG_P (x2) && MMIX_REG_OK (x2))
1040 return 1;
1041
f0b228a5 1042 /* (mem (plus (reg) (0..255?))) */
68cbb7e3 1043 if (GET_CODE (x2) == CONST_INT
1044 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1045 return 1;
f0b228a5 1046
1047 return 0;
68cbb7e3 1048 }
1049
f0b228a5 1050 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1051}
1052
1053/* LEGITIMATE_CONSTANT_P. */
1054
1055int
7585fcd5 1056mmix_legitimate_constant_p (rtx x)
68cbb7e3 1057{
1058 RTX_CODE code = GET_CODE (x);
1059
1060 /* We must allow any number due to the way the cse passes works; if we
1061 do not allow any number here, general_operand will fail, and insns
1062 will fatally fail recognition instead of "softly". */
1063 if (code == CONST_INT || code == CONST_DOUBLE)
1064 return 1;
1065
1066 return CONSTANT_ADDRESS_P (x);
1067}
1068
1069/* SELECT_CC_MODE. */
1070
1071enum machine_mode
7585fcd5 1072mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1073{
1074 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1075 output different compare insns. Note that we do not check the
1076 validity of the comparison here. */
1077
1078 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1079 {
1080 if (op == ORDERED || op == UNORDERED || op == UNGE
1081 || op == UNGT || op == UNLE || op == UNLT)
1082 return CC_FUNmode;
1083
1084 if (op == EQ || op == NE)
1085 return CC_FPEQmode;
1086
1087 return CC_FPmode;
1088 }
1089
1090 if (op == GTU || op == LTU || op == GEU || op == LEU)
1091 return CC_UNSmode;
1092
1093 return CCmode;
1094}
1095
68cbb7e3 1096/* REVERSIBLE_CC_MODE. */
1097
1098int
7585fcd5 1099mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1100{
1101 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1102 compares. */
68cbb7e3 1103 return mode != CC_FPmode;
1104}
1105
fab7adbf 1106/* TARGET_RTX_COSTS. */
68cbb7e3 1107
fab7adbf 1108static bool
7585fcd5 1109mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1110 int code ATTRIBUTE_UNUSED,
1111 int outer_code ATTRIBUTE_UNUSED,
f529eb25 1112 int *total ATTRIBUTE_UNUSED,
1113 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1114{
1115 /* For the time being, this is just a stub and we'll accept the
1116 generic calculations, until we can do measurements, at least.
1117 Say we did not modify any calculated costs. */
fab7adbf 1118 return false;
68cbb7e3 1119}
1120
68cbb7e3 1121/* REGISTER_MOVE_COST. */
1122
1123int
7585fcd5 1124mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
1125 enum reg_class from,
1126 enum reg_class to)
68cbb7e3 1127{
1128 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1129}
1130
1131/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1132 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1133 the target. */
1134
1135/* DATA_SECTION_ASM_OP. */
1136
1137const char *
7585fcd5 1138mmix_data_section_asm_op (void)
68cbb7e3 1139{
1140 return "\t.data ! mmixal:= 8H LOC 9B";
1141}
1142
7811991d 1143static void
7585fcd5 1144mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1145{
1146 /* Test for an external declaration, and do nothing if it is one. */
1147 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1148 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1149 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1150 ;
ae484cc8 1151 else if (first && DECL_P (decl))
68cbb7e3 1152 {
1153 /* For non-visible declarations, add a "@" prefix, which we skip
1154 when the label is output. If the label does not have this
f0b228a5 1155 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1156
1157 Note that this does not work for data that is declared extern and
1158 later defined as static. If there's code in between, that code
f0b228a5 1159 will refer to the extern declaration, and vice versa. This just
1160 means that when -mtoplevel-symbols is in use, we can just handle
1161 well-behaved ISO-compliant code. */
68cbb7e3 1162
2c129d70 1163 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1164 int len = strlen (str);
225ab426 1165 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1166 newstr[0] = '@';
68cbb7e3 1167 strcpy (newstr + 1, str);
b948ae2f 1168 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1169 }
1170
f0b228a5 1171 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1172 may need different options to reach for different things with GETA.
1173 For now, functions and things we know or have been told are constant. */
1174 if (TREE_CODE (decl) == FUNCTION_DECL
1175 || TREE_CONSTANT (decl)
1176 || (TREE_CODE (decl) == VAR_DECL
1177 && TREE_READONLY (decl)
1178 && !TREE_SIDE_EFFECTS (decl)
1179 && (!DECL_INITIAL (decl)
1180 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1181 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1182}
1183
7b4a38a6 1184static const char *
7585fcd5 1185mmix_strip_name_encoding (const char *name)
68cbb7e3 1186{
1187 for (; (*name == '@' || *name == '*'); name++)
1188 ;
1189
1190 return name;
1191}
1192
92c473b8 1193/* TARGET_ASM_FILE_START.
1194 We just emit a little comment for the time being. */
68cbb7e3 1195
92c473b8 1196static void
7585fcd5 1197mmix_file_start (void)
68cbb7e3 1198{
92c473b8 1199 default_file_start ();
68cbb7e3 1200
92c473b8 1201 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1202
1d60d981 1203 /* Make sure each file starts with the text section. */
2f14b1f9 1204 switch_to_section (text_section);
68cbb7e3 1205}
1206
f6940372 1207/* TARGET_ASM_FILE_END. */
68cbb7e3 1208
f6940372 1209static void
7585fcd5 1210mmix_file_end (void)
68cbb7e3 1211{
1d60d981 1212 /* Make sure each file ends with the data section. */
2f14b1f9 1213 switch_to_section (data_section);
68cbb7e3 1214}
1215
68cbb7e3 1216/* ASM_OUTPUT_SOURCE_FILENAME. */
1217
1218void
7585fcd5 1219mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1220{
1221 fprintf (stream, "# 1 ");
1222 OUTPUT_QUOTED_STRING (stream, name);
1223 fprintf (stream, "\n");
1224}
1225
1226/* OUTPUT_QUOTED_STRING. */
1227
1228void
7585fcd5 1229mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1230{
1231 const char * string_end = string + length;
25037517 1232 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1233
1234 /* Output "any character except newline and double quote character". We
1235 play it safe and avoid all control characters too. We also do not
1236 want [] as characters, should input be passed through m4 with [] as
1237 quotes. Further, we avoid "\", because the GAS port handles it as a
1238 quoting character. */
1239 while (string < string_end)
1240 {
1241 if (*string
1242 && (unsigned char) *string < 128
1243 && !ISCNTRL (*string)
1244 && strchr (unwanted_chars, *string) == NULL)
1245 {
1246 fputc ('"', stream);
1247 while (*string
1248 && (unsigned char) *string < 128
1249 && !ISCNTRL (*string)
1250 && strchr (unwanted_chars, *string) == NULL
1251 && string < string_end)
1252 {
1253 fputc (*string, stream);
1254 string++;
1255 }
1256 fputc ('"', stream);
1257 if (string < string_end)
1258 fprintf (stream, ",");
1259 }
1260 if (string < string_end)
1261 {
1262 fprintf (stream, "#%x", *string & 255);
1263 string++;
1264 if (string < string_end)
1265 fprintf (stream, ",");
1266 }
1267 }
1268}
1269
58356836 1270/* Target hook for assembling integer objects. Use mmix_print_operand
1271 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1272 CONST_DOUBLEs. */
68cbb7e3 1273
58356836 1274static bool
7585fcd5 1275mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1276{
58356836 1277 if (aligned_p)
1278 switch (size)
1279 {
4f4e478d 1280 /* We handle a limited number of types of operands in here. But
1281 that's ok, because we can punt to generic functions. We then
5c3d1711 1282 pretend that aligned data isn't needed, so the usual .<pseudo>
1283 syntax is used (which works for aligned data too). We actually
1284 *must* do that, since we say we don't have simple aligned
1285 pseudos, causing this function to be called. We just try and
1286 keep as much compatibility as possible with mmixal syntax for
1287 normal cases (i.e. without GNU extensions and C only). */
58356836 1288 case 1:
4f4e478d 1289 if (GET_CODE (x) != CONST_INT)
1290 {
1291 aligned_p = 0;
1292 break;
1293 }
58356836 1294 fputs ("\tBYTE\t", asm_out_file);
1295 mmix_print_operand (asm_out_file, x, 'B');
1296 fputc ('\n', asm_out_file);
1297 return true;
1298
1299 case 2:
4f4e478d 1300 if (GET_CODE (x) != CONST_INT)
1301 {
1302 aligned_p = 0;
1303 break;
1304 }
58356836 1305 fputs ("\tWYDE\t", asm_out_file);
1306 mmix_print_operand (asm_out_file, x, 'W');
1307 fputc ('\n', asm_out_file);
1308 return true;
1309
1310 case 4:
60bb373d 1311 if (GET_CODE (x) != CONST_INT)
4f4e478d 1312 {
1313 aligned_p = 0;
1314 break;
1315 }
58356836 1316 fputs ("\tTETRA\t", asm_out_file);
1317 mmix_print_operand (asm_out_file, x, 'L');
1318 fputc ('\n', asm_out_file);
1319 return true;
1320
1321 case 8:
7f81c162 1322 /* We don't get here anymore for CONST_DOUBLE, because DImode
1323 isn't expressed as CONST_DOUBLE, and DFmode is handled
1324 elsewhere. */
1325 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1326 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1327 return true;
1328 }
1329 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1330}
1331
1332/* ASM_OUTPUT_ASCII. */
1333
1334void
7585fcd5 1335mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1336{
1337 while (length > 0)
1338 {
1339 int chunk_size = length > 60 ? 60 : length;
1340 fprintf (stream, "\tBYTE ");
1341 mmix_output_quoted_string (stream, string, chunk_size);
1342 string += chunk_size;
1343 length -= chunk_size;
1344 fprintf (stream, "\n");
1345 }
1346}
1347
1348/* ASM_OUTPUT_ALIGNED_COMMON. */
1349
1350void
7585fcd5 1351mmix_asm_output_aligned_common (FILE *stream,
1352 const char *name,
1353 int size,
1354 int align)
68cbb7e3 1355{
1356 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1357 express this in a mmixal-compatible way. */
1358 fprintf (stream, "\t.comm\t");
1359 assemble_name (stream, name);
1360 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1361 size, align / BITS_PER_UNIT);
1362}
1363
1364/* ASM_OUTPUT_ALIGNED_LOCAL. */
1365
1366void
7585fcd5 1367mmix_asm_output_aligned_local (FILE *stream,
1368 const char *name,
1369 int size,
1370 int align)
68cbb7e3 1371{
2f14b1f9 1372 switch_to_section (data_section);
68cbb7e3 1373
1374 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1375 assemble_name (stream, name);
1376 fprintf (stream, "\tLOC @+%d\n", size);
1377}
1378
1379/* ASM_OUTPUT_LABEL. */
1380
1381void
7585fcd5 1382mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1383{
1384 assemble_name (stream, name);
1385 fprintf (stream, "\tIS @\n");
1386}
1387
af1c039b 1388/* ASM_OUTPUT_INTERNAL_LABEL. */
1389
1390void
1391mmix_asm_output_internal_label (FILE *stream, const char *name)
1392{
1393 assemble_name_raw (stream, name);
1394 fprintf (stream, "\tIS @\n");
1395}
1396
68cbb7e3 1397/* ASM_DECLARE_REGISTER_GLOBAL. */
1398
1399void
7585fcd5 1400mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1401 tree decl ATTRIBUTE_UNUSED,
1402 int regno ATTRIBUTE_UNUSED,
1403 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1404{
1405 /* Nothing to do here, but there *will* be, therefore the framework is
1406 here. */
1407}
1408
68cbb7e3 1409/* ASM_WEAKEN_LABEL. */
1410
1411void
7585fcd5 1412mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1413 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1414{
7fe1d31c 1415 fprintf (stream, "\t.weak ");
68cbb7e3 1416 assemble_name (stream, name);
7fe1d31c 1417 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1418}
1419
1420/* MAKE_DECL_ONE_ONLY. */
1421
1422void
7585fcd5 1423mmix_make_decl_one_only (tree decl)
68cbb7e3 1424{
1425 DECL_WEAK (decl) = 1;
1426}
1427
1428/* ASM_OUTPUT_LABELREF.
1429 Strip GCC's '*' and our own '@'. No order is assumed. */
1430
1431void
7585fcd5 1432mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1433{
91009d64 1434 int is_extern = 1;
68cbb7e3 1435
1436 for (; (*name == '@' || *name == '*'); name++)
1437 if (*name == '@')
91009d64 1438 is_extern = 0;
68cbb7e3 1439
1440 asm_fprintf (stream, "%s%U%s",
1441 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1442 name);
1443}
1444
68cbb7e3 1445/* ASM_OUTPUT_DEF. */
1446
1447void
7585fcd5 1448mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1449{
1450 assemble_name (stream, name);
1451 fprintf (stream, "\tIS ");
1452 assemble_name (stream, value);
1453 fputc ('\n', stream);
1454}
1455
68cbb7e3 1456/* PRINT_OPERAND. */
1457
1458void
7585fcd5 1459mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1460{
1461 /* When we add support for different codes later, we can, when needed,
1462 drop through to the main handler with a modified operand. */
1463 rtx modified_x = x;
d68ffc6f 1464 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1465
1466 switch (code)
1467 {
1468 /* Unrelated codes are in alphabetic order. */
1469
91009d64 1470 case '+':
1471 /* For conditional branches, output "P" for a probable branch. */
1472 if (TARGET_BRANCH_PREDICT)
1473 {
1474 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
1475 if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
1476 putc ('P', stream);
1477 }
1478 return;
1479
0b123c47 1480 case '.':
1481 /* For the %d in POP %d,0. */
1482 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1483 return;
1484
68cbb7e3 1485 case 'B':
1486 if (GET_CODE (x) != CONST_INT)
1487 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1488 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1489 return;
1490
1491 case 'H':
1492 /* Highpart. Must be general register, and not the last one, as
1493 that one cannot be part of a consecutive register pair. */
d68ffc6f 1494 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1495 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1496
1497 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1498 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1499 return;
1500
1501 case 'L':
1502 /* Lowpart. Must be CONST_INT or general register, and not the last
1503 one, as that one cannot be part of a consecutive register pair. */
1504 if (GET_CODE (x) == CONST_INT)
1505 {
1506 fprintf (stream, "#%lx",
1507 (unsigned long) (INTVAL (x)
1508 & ((unsigned int) 0x7fffffff * 2 + 1)));
1509 return;
1510 }
1511
1512 if (GET_CODE (x) == SYMBOL_REF)
1513 {
1514 output_addr_const (stream, x);
1515 return;
1516 }
1517
d68ffc6f 1518 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1519 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1520
1521 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1522 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1523 return;
1524
1525 /* Can't use 'a' because that's a generic modifier for address
1526 output. */
1527 case 'A':
1528 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1529 ~(unsigned HOST_WIDEST_INT)
1530 mmix_intval (x));
1531 return;
1532
1533 case 'i':
1534 mmix_output_shiftvalue_op_from_str (stream, "INC",
1535 (unsigned HOST_WIDEST_INT)
1536 mmix_intval (x));
1537 return;
1538
1539 case 'o':
1540 mmix_output_shiftvalue_op_from_str (stream, "OR",
1541 (unsigned HOST_WIDEST_INT)
1542 mmix_intval (x));
1543 return;
1544
1545 case 's':
1546 mmix_output_shiftvalue_op_from_str (stream, "SET",
1547 (unsigned HOST_WIDEST_INT)
1548 mmix_intval (x));
1549 return;
1550
1551 case 'd':
1552 case 'D':
1553 mmix_output_condition (stream, x, (code == 'D'));
1554 return;
1555
1556 case 'e':
1557 /* Output an extra "e" to make fcmpe, fune. */
1558 if (TARGET_FCMP_EPSILON)
1559 fprintf (stream, "e");
1560 return;
1561
1562 case 'm':
1563 /* Output the number minus 1. */
1564 if (GET_CODE (x) != CONST_INT)
1565 {
1566 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1567 x);
1568 }
1569 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1570 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1571 return;
1572
1573 case 'p':
1574 /* Store the number of registers we want to save. This was setup
1575 by the prologue. The actual operand contains the number of
1576 registers to pass, but we don't use it currently. Anyway, we
1577 need to output the number of saved registers here. */
d68ffc6f 1578 fprintf (stream, "%d",
1579 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1580 return;
1581
1582 case 'r':
1583 /* Store the register to output a constant to. */
1584 if (! REG_P (x))
68435912 1585 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1586 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1587 return;
1588
1589 case 'I':
1590 /* Output the constant. Note that we use this for floats as well. */
1591 if (GET_CODE (x) != CONST_INT
1592 && (GET_CODE (x) != CONST_DOUBLE
1593 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1594 && GET_MODE (x) != SFmode)))
68435912 1595 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1596 mmix_output_register_setting (stream,
1597 mmix_output_destination_register,
1598 mmix_intval (x), 0);
1599 return;
1600
1601 case 'U':
1602 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1603 if (TARGET_ZERO_EXTEND)
1604 putc ('U', stream);
1605 return;
1606
1607 case 'v':
1608 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1609 return;
1610
1611 case 'V':
1612 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1613 return;
1614
1615 case 'W':
1616 if (GET_CODE (x) != CONST_INT)
1617 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1618 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1619 return;
1620
1621 case 0:
1622 /* Nothing to do. */
1623 break;
1624
1625 default:
1626 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1627 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1628 }
1629
1630 switch (GET_CODE (modified_x))
1631 {
1632 case REG:
d68ffc6f 1633 regno = REGNO (modified_x);
1634 if (regno >= FIRST_PSEUDO_REGISTER)
1635 internal_error ("MMIX Internal: Bad register: %d", regno);
1636 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1637 return;
1638
1639 case MEM:
1640 output_address (XEXP (modified_x, 0));
1641 return;
1642
1643 case CONST_INT:
1644 /* For -2147483648, mmixal complains that the constant does not fit
1645 in 4 bytes, so let's output it as hex. Take care to handle hosts
1646 where HOST_WIDE_INT is longer than an int.
1647
1648 Print small constants +-255 using decimal. */
1649
1650 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1651 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1652 else
1653 fprintf (stream, "#%x",
1654 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1655 return;
1656
1657 case CONST_DOUBLE:
1658 /* Do somewhat as CONST_INT. */
58356836 1659 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1660 return;
1661
1662 case CONST:
1663 output_addr_const (stream, modified_x);
1664 return;
1665
1666 default:
1667 /* No need to test for all strange things. Let output_addr_const do
1668 it for us. */
1669 if (CONSTANT_P (modified_x)
1670 /* Strangely enough, this is not included in CONSTANT_P.
1671 FIXME: Ask/check about sanity here. */
1672 || GET_CODE (modified_x) == CODE_LABEL)
1673 {
1674 output_addr_const (stream, modified_x);
1675 return;
1676 }
1677
1678 /* We need the original here. */
1679 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1680 }
1681}
1682
1683/* PRINT_OPERAND_PUNCT_VALID_P. */
1684
1685int
7585fcd5 1686mmix_print_operand_punct_valid_p (int code ATTRIBUTE_UNUSED)
68cbb7e3 1687{
91009d64 1688 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1689 return code == '+'
1690 /* A '.' is used for the %d in the POP %d,0 return insn. */
1691 || code == '.';
68cbb7e3 1692}
1693
1694/* PRINT_OPERAND_ADDRESS. */
1695
1696void
7585fcd5 1697mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1698{
1699 if (REG_P (x))
1700 {
1701 /* I find the generated assembly code harder to read without
1702 the ",0". */
d68ffc6f 1703 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1704 return;
1705 }
1706 else if (GET_CODE (x) == PLUS)
1707 {
1708 rtx x1 = XEXP (x, 0);
1709 rtx x2 = XEXP (x, 1);
1710
68cbb7e3 1711 if (REG_P (x1))
1712 {
d68ffc6f 1713 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1714
1715 if (REG_P (x2))
1716 {
d68ffc6f 1717 fprintf (stream, "%s",
1718 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1719 return;
1720 }
1721 else if (GET_CODE (x2) == CONST_INT
1722 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1723 {
1724 output_addr_const (stream, x2);
1725 return;
1726 }
1727 }
1728 }
1729
f0b228a5 1730 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (x))
1731 {
1732 output_addr_const (stream, x);
1733 return;
1734 }
1735
68cbb7e3 1736 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1737}
1738
1739/* ASM_OUTPUT_REG_PUSH. */
1740
1741void
7585fcd5 1742mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1743{
1744 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1745 reg_names[MMIX_STACK_POINTER_REGNUM],
1746 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1747 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1748 reg_names[MMIX_STACK_POINTER_REGNUM]);
1749}
1750
1751/* ASM_OUTPUT_REG_POP. */
1752
1753void
7585fcd5 1754mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1755{
1756 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1757 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1758 reg_names[MMIX_STACK_POINTER_REGNUM],
1759 reg_names[MMIX_STACK_POINTER_REGNUM]);
1760}
1761
1762/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1763
1764void
7585fcd5 1765mmix_asm_output_addr_diff_elt (FILE *stream,
1766 rtx body ATTRIBUTE_UNUSED,
1767 int value,
1768 int rel)
68cbb7e3 1769{
1770 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1771}
1772
1773/* ASM_OUTPUT_ADDR_VEC_ELT. */
1774
1775void
7585fcd5 1776mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1777{
1778 fprintf (stream, "\tOCTA L:%d\n", value);
1779}
1780
1781/* ASM_OUTPUT_SKIP. */
1782
1783void
7585fcd5 1784mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1785{
1786 fprintf (stream, "\tLOC @+%d\n", nbytes);
1787}
1788
1789/* ASM_OUTPUT_ALIGN. */
1790
1791void
7585fcd5 1792mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1793{
1794 /* We need to record the needed alignment of this section in the object,
1795 so we have to output an alignment directive. Use a .p2align (not
1796 .align) so people will never have to wonder about whether the
1797 argument is in number of bytes or the log2 thereof. We do it in
1798 addition to the LOC directive, so nothing needs tweaking when
1799 copy-pasting assembly into mmixal. */
1800 fprintf (stream, "\t.p2align %d\n", power);
1801 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1802}
1803
1804/* DBX_REGISTER_NUMBER. */
1805
1806int
7585fcd5 1807mmix_dbx_register_number (int regno)
68cbb7e3 1808{
d68ffc6f 1809 /* Adjust the register number to the one it will be output as, dammit.
1810 It'd be nice if we could check the assumption that we're filling a
1811 gap, but every register between the last saved register and parameter
1812 registers might be a valid parameter register. */
1813 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1814
1815 /* We need to renumber registers to get the number of the return address
1816 register in the range 0..255. It is also space-saving if registers
1817 mentioned in the call-frame information (which uses this function by
1818 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1819 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1820 return regno >= 224 ? (regno - 224) : (regno + 48);
1821}
1822
35a3065a 1823/* End of target macro support functions.
68cbb7e3 1824
7585fcd5 1825 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1826
d3310704 1827/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1828 from insn-emit.c. */
1829
1830rtx
7585fcd5 1831mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1832{
1833 return get_hard_reg_initial_val (mode, regno);
1834}
1835
e911aedf 1836/* Nonzero when the function epilogue is simple enough that a single
d3310704 1837 "POP %d,0" should be used even within the function. */
0b123c47 1838
1839int
7585fcd5 1840mmix_use_simple_return (void)
0b123c47 1841{
1842 int regno;
1843
1844 int stack_space_to_allocate
abe32cce 1845 = (crtl->outgoing_args_size
1846 + crtl->args.pretend_args_size
0b123c47 1847 + get_frame_size () + 7) & ~7;
1848
1849 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1850 return 0;
1851
1852 for (regno = 255;
1853 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1854 regno--)
1855 /* Note that we assume that the frame-pointer-register is one of these
1856 registers, in which case we don't count it here. */
1857 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1858 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1859 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1860 return 0;
1861
1862 if (frame_pointer_needed)
1863 stack_space_to_allocate += 8;
1864
1865 if (MMIX_CFUN_HAS_LANDING_PAD)
1866 stack_space_to_allocate += 16;
1867 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1868 stack_space_to_allocate += 8;
1869
1870 return stack_space_to_allocate == 0;
1871}
1872
d3310704 1873
1874/* Expands the function prologue into RTX. */
1875
1876void
7585fcd5 1877mmix_expand_prologue (void)
d3310704 1878{
1879 HOST_WIDE_INT locals_size = get_frame_size ();
1880 int regno;
1881 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1882 = (crtl->outgoing_args_size
1883 + crtl->args.pretend_args_size
d3310704 1884 + locals_size + 7) & ~7;
1885 HOST_WIDE_INT offset = -8;
1886
1887 /* Add room needed to save global non-register-stack registers. */
1888 for (regno = 255;
1889 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1890 regno--)
1891 /* Note that we assume that the frame-pointer-register is one of these
1892 registers, in which case we don't count it here. */
1893 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1894 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1895 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1896 stack_space_to_allocate += 8;
1897
1898 /* If we do have a frame-pointer, add room for it. */
1899 if (frame_pointer_needed)
1900 stack_space_to_allocate += 8;
1901
1902 /* If we have a non-local label, we need to be able to unwind to it, so
1903 store the current register stack pointer. Also store the return
1904 address if we do that. */
1905 if (MMIX_CFUN_HAS_LANDING_PAD)
1906 stack_space_to_allocate += 16;
1907 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1908 /* If we do have a saved return-address slot, add room for it. */
1909 stack_space_to_allocate += 8;
1910
1911 /* Make sure we don't get an unaligned stack. */
1912 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1913 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1914 stack_space_to_allocate);
1915
abe32cce 1916 if (crtl->args.pretend_args_size)
d3310704 1917 {
1918 int mmix_first_vararg_reg
1919 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1920 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 1921 - crtl->args.pretend_args_size / 8));
d3310704 1922
1923 for (regno
1924 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1925 regno >= mmix_first_vararg_reg;
1926 regno--)
1927 {
1928 if (offset < 0)
1929 {
1930 HOST_WIDE_INT stack_chunk
1931 = stack_space_to_allocate > (256 - 8)
1932 ? (256 - 8) : stack_space_to_allocate;
1933
1934 mmix_emit_sp_add (-stack_chunk);
1935 offset += stack_chunk;
1936 stack_space_to_allocate -= stack_chunk;
1937 }
1938
1939 /* These registers aren't actually saved (as in "will be
1940 restored"), so don't tell DWARF2 they're saved. */
1941 emit_move_insn (gen_rtx_MEM (DImode,
1942 plus_constant (stack_pointer_rtx,
1943 offset)),
1944 gen_rtx_REG (DImode, regno));
1945 offset -= 8;
1946 }
1947 }
1948
1949 /* Store the frame-pointer. */
1950
1951 if (frame_pointer_needed)
1952 {
1953 rtx insn;
1954
1955 if (offset < 0)
1956 {
1957 /* Get 8 less than otherwise, since we need to reach offset + 8. */
1958 HOST_WIDE_INT stack_chunk
1959 = stack_space_to_allocate > (256 - 8 - 8)
1960 ? (256 - 8 - 8) : stack_space_to_allocate;
1961
1962 mmix_emit_sp_add (-stack_chunk);
1963
1964 offset += stack_chunk;
1965 stack_space_to_allocate -= stack_chunk;
1966 }
1967
1968 insn = emit_move_insn (gen_rtx_MEM (DImode,
1969 plus_constant (stack_pointer_rtx,
1970 offset)),
1971 hard_frame_pointer_rtx);
1972 RTX_FRAME_RELATED_P (insn) = 1;
1973 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
1974 stack_pointer_rtx,
1975 GEN_INT (offset + 8)));
1976 RTX_FRAME_RELATED_P (insn) = 1;
1977 offset -= 8;
1978 }
1979
1980 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1981 {
1982 rtx tmpreg, retreg;
1983 rtx insn;
1984
1985 /* Store the return-address, if one is needed on the stack. We
1986 usually store it in a register when needed, but that doesn't work
1987 with -fexceptions. */
1988
1989 if (offset < 0)
1990 {
1991 /* Get 8 less than otherwise, since we need to reach offset + 8. */
1992 HOST_WIDE_INT stack_chunk
1993 = stack_space_to_allocate > (256 - 8 - 8)
1994 ? (256 - 8 - 8) : stack_space_to_allocate;
1995
1996 mmix_emit_sp_add (-stack_chunk);
1997
1998 offset += stack_chunk;
1999 stack_space_to_allocate -= stack_chunk;
2000 }
2001
2002 tmpreg = gen_rtx_REG (DImode, 255);
2003 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2004
2005 /* Dwarf2 code is confused by the use of a temporary register for
2006 storing the return address, so we have to express it as a note,
2007 which we attach to the actual store insn. */
2008 emit_move_insn (tmpreg, retreg);
2009
2010 insn = emit_move_insn (gen_rtx_MEM (DImode,
2011 plus_constant (stack_pointer_rtx,
2012 offset)),
2013 tmpreg);
2014 RTX_FRAME_RELATED_P (insn) = 1;
2015 REG_NOTES (insn)
2016 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
2017 gen_rtx_SET (VOIDmode,
2018 gen_rtx_MEM (DImode,
2019 plus_constant (stack_pointer_rtx,
2020 offset)),
2021 retreg),
2022 REG_NOTES (insn));
2023
2024 offset -= 8;
2025 }
2026 else if (MMIX_CFUN_HAS_LANDING_PAD)
2027 offset -= 8;
2028
2029 if (MMIX_CFUN_HAS_LANDING_PAD)
2030 {
2031 /* Store the register defining the numbering of local registers, so
2032 we know how long to unwind the register stack. */
2033
2034 if (offset < 0)
2035 {
2036 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2037 HOST_WIDE_INT stack_chunk
2038 = stack_space_to_allocate > (256 - 8 - 8)
2039 ? (256 - 8 - 8) : stack_space_to_allocate;
2040
2041 mmix_emit_sp_add (-stack_chunk);
2042
2043 offset += stack_chunk;
2044 stack_space_to_allocate -= stack_chunk;
2045 }
2046
2047 /* We don't tell dwarf2 about this one; we just have it to unwind
2048 the register stack at landing pads. FIXME: It's a kludge because
2049 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2050 register stack at the moment. Best thing would be to handle it
2051 like stack-pointer offsets. Better: some hook into dwarf2out.c
2052 to produce DW_CFA_expression:s that specify the increment of rO,
2053 and unwind it at eh_return (preferred) or at the landing pad.
2054 Then saves to $0..$G-1 could be specified through that register. */
2055
2056 emit_move_insn (gen_rtx_REG (DImode, 255),
2057 gen_rtx_REG (DImode,
2058 MMIX_rO_REGNUM));
2059 emit_move_insn (gen_rtx_MEM (DImode,
2060 plus_constant (stack_pointer_rtx, offset)),
2061 gen_rtx_REG (DImode, 255));
2062 offset -= 8;
2063 }
2064
2065 /* After the return-address and the frame-pointer, we have the local
2066 variables. They're the ones that may have an "unaligned" size. */
2067 offset -= (locals_size + 7) & ~7;
2068
2069 /* Now store all registers that are global, i.e. not saved by the
2070 register file machinery.
2071
2072 It is assumed that the frame-pointer is one of these registers, so it
2073 is explicitly excluded in the count. */
2074
2075 for (regno = 255;
2076 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2077 regno--)
2078 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2079 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2080 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2081 {
2082 rtx insn;
2083
2084 if (offset < 0)
2085 {
2086 HOST_WIDE_INT stack_chunk
2087 = (stack_space_to_allocate > (256 - offset - 8)
2088 ? (256 - offset - 8) : stack_space_to_allocate);
2089
2090 mmix_emit_sp_add (-stack_chunk);
2091 offset += stack_chunk;
2092 stack_space_to_allocate -= stack_chunk;
2093 }
2094
2095 insn = emit_move_insn (gen_rtx_MEM (DImode,
2096 plus_constant (stack_pointer_rtx,
2097 offset)),
2098 gen_rtx_REG (DImode, regno));
2099 RTX_FRAME_RELATED_P (insn) = 1;
2100 offset -= 8;
2101 }
2102
2103 /* Finally, allocate room for outgoing args and local vars if room
2104 wasn't allocated above. */
2105 if (stack_space_to_allocate)
2106 mmix_emit_sp_add (-stack_space_to_allocate);
2107}
2108
2109/* Expands the function epilogue into RTX. */
2110
2111void
7585fcd5 2112mmix_expand_epilogue (void)
d3310704 2113{
2114 HOST_WIDE_INT locals_size = get_frame_size ();
2115 int regno;
2116 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2117 = (crtl->outgoing_args_size
2118 + crtl->args.pretend_args_size
d3310704 2119 + locals_size + 7) & ~7;
2120
d3310704 2121 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2122 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2123
2124 /* Add the space for global non-register-stack registers.
2125 It is assumed that the frame-pointer register can be one of these
2126 registers, in which case it is excluded from the count when needed. */
2127 for (regno = 255;
2128 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2129 regno--)
2130 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2131 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2132 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2133 stack_space_to_deallocate += 8;
2134
2135 /* Add in the space for register stack-pointer. If so, always add room
2136 for the saved PC. */
2137 if (MMIX_CFUN_HAS_LANDING_PAD)
2138 stack_space_to_deallocate += 16;
2139 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2140 /* If we have a saved return-address slot, add it in. */
2141 stack_space_to_deallocate += 8;
2142
2143 /* Add in the frame-pointer. */
2144 if (frame_pointer_needed)
2145 stack_space_to_deallocate += 8;
2146
2147 /* Make sure we don't get an unaligned stack. */
2148 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2149 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2150 stack_space_to_deallocate);
2151
2152 /* We will add back small offsets to the stack pointer as we go.
2153 First, we restore all registers that are global, i.e. not saved by
2154 the register file machinery. */
2155
2156 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2157 regno <= 255;
2158 regno++)
2159 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2160 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2161 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2162 {
2163 if (offset > 255)
2164 {
2165 mmix_emit_sp_add (offset);
2166 stack_space_to_deallocate -= offset;
2167 offset = 0;
2168 }
2169
2170 emit_move_insn (gen_rtx_REG (DImode, regno),
2171 gen_rtx_MEM (DImode,
2172 plus_constant (stack_pointer_rtx,
2173 offset)));
2174 offset += 8;
2175 }
2176
2177 /* Here is where the local variables were. As in the prologue, they
2178 might be of an unaligned size. */
2179 offset += (locals_size + 7) & ~7;
2180
d3310704 2181 /* The saved register stack pointer is just below the frame-pointer
2182 register. We don't need to restore it "manually"; the POP
2183 instruction does that. */
2184 if (MMIX_CFUN_HAS_LANDING_PAD)
2185 offset += 16;
2186 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2187 /* The return-address slot is just below the frame-pointer register.
2188 We don't need to restore it because we don't really use it. */
2189 offset += 8;
2190
2191 /* Get back the old frame-pointer-value. */
2192 if (frame_pointer_needed)
2193 {
2194 if (offset > 255)
2195 {
2196 mmix_emit_sp_add (offset);
2197
2198 stack_space_to_deallocate -= offset;
2199 offset = 0;
2200 }
2201
2202 emit_move_insn (hard_frame_pointer_rtx,
2203 gen_rtx_MEM (DImode,
2204 plus_constant (stack_pointer_rtx,
2205 offset)));
2206 offset += 8;
2207 }
2208
2209 /* We do not need to restore pretended incoming args, just add back
2210 offset to sp. */
2211 if (stack_space_to_deallocate != 0)
2212 mmix_emit_sp_add (stack_space_to_deallocate);
2213
18d50ae6 2214 if (crtl->calls_eh_return)
d3310704 2215 /* Adjust the (normal) stack-pointer to that of the receiver.
2216 FIXME: It would be nice if we could also adjust the register stack
2217 here, but we need to express it through DWARF 2 too. */
2218 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2219 gen_rtx_REG (DImode,
2220 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2221}
2222
68cbb7e3 2223/* Output an optimal sequence for setting a register to a specific
2224 constant. Used in an alternative for const_ints in movdi, and when
2225 using large stack-frame offsets.
2226
2227 Use do_begin_end to say if a line-starting TAB and newline before the
2228 first insn and after the last insn is wanted. */
2229
2230void
7585fcd5 2231mmix_output_register_setting (FILE *stream,
2232 int regno,
2233 HOST_WIDEST_INT value,
2234 int do_begin_end)
68cbb7e3 2235{
2236 if (do_begin_end)
2237 fprintf (stream, "\t");
2238
2239 if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
2240 {
2241 /* First, the one-insn cases. */
2242 mmix_output_shiftvalue_op_from_str (stream, "SET",
2243 (unsigned HOST_WIDEST_INT)
2244 value);
2245 fprintf (stream, " %s,", reg_names[regno]);
2246 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2247 }
2248 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2249 {
2250 /* We do this to get a bit more legible assembly code. The next
2251 alternative is mostly redundant with this. */
2252
2253 mmix_output_shiftvalue_op_from_str (stream, "SET",
2254 -(unsigned HOST_WIDEST_INT)
2255 value);
2256 fprintf (stream, " %s,", reg_names[regno]);
2257 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2258 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2259 reg_names[regno]);
2260 }
2261 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2262 {
2263 /* Slightly more expensive, the two-insn cases. */
2264
2265 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2266 is shiftable, or any other one-insn transformation of the value.
2267 FIXME: Check first if the value is "shiftable" by two loading
2268 with two insns, since it makes more readable assembly code (if
2269 anyone else cares). */
2270
2271 mmix_output_shiftvalue_op_from_str (stream, "SET",
2272 ~(unsigned HOST_WIDEST_INT)
2273 value);
2274 fprintf (stream, " %s,", reg_names[regno]);
2275 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2276 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2277 reg_names[regno]);
2278 }
2279 else
2280 {
2281 /* The generic case. 2..4 insns. */
25037517 2282 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2283 const char *op = "SET";
2284 const char *line_begin = "";
f0b228a5 2285 int insns = 0;
68cbb7e3 2286 int i;
f0b228a5 2287 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2288
f0b228a5 2289 /* Compute the number of insns needed to output this constant. */
2290 for (i = 0; i < 4 && tmpvalue != 0; i++)
2291 {
2292 if (tmpvalue & 65535)
2293 insns++;
2294 tmpvalue >>= 16;
2295 }
2296 if (TARGET_BASE_ADDRESSES && insns == 3)
2297 {
2298 /* The number three is based on a static observation on
2299 ghostscript-6.52. Two and four are excluded because there
2300 are too many such constants, and each unique constant (maybe
2301 offset by 1..255) were used few times compared to other uses,
2302 e.g. addresses.
2303
2304 We use base-plus-offset addressing to force it into a global
2305 register; we just use a "LDA reg,VALUE", which will cause the
2306 assembler and linker to DTRT (for constants as well as
2307 addresses). */
2308 fprintf (stream, "LDA %s,", reg_names[regno]);
2309 mmix_output_octa (stream, value, 0);
2310 }
2311 else
68cbb7e3 2312 {
f0b228a5 2313 /* Output pertinent parts of the 4-wyde sequence.
2314 Still more to do if we want this to be optimal, but hey...
2315 Note that the zero case has been handled above. */
2316 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2317 {
f0b228a5 2318 if (value & 65535)
2319 {
2320 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2321 higher_parts[i], reg_names[regno],
2322 (int) (value & 65535));
2323 /* The first one sets the rest of the bits to 0, the next
2324 ones add set bits. */
2325 op = "INC";
2326 line_begin = "\n\t";
2327 }
68cbb7e3 2328
f0b228a5 2329 value >>= 16;
2330 }
68cbb7e3 2331 }
2332 }
2333
2334 if (do_begin_end)
2335 fprintf (stream, "\n");
2336}
2337
2338/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2339 else return 0. */
2340
2341int
7585fcd5 2342mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2343{
2344 /* Shift by 16 bits per group, stop when we've found two groups with
2345 nonzero bits. */
2346 int i;
2347 int has_candidate = 0;
2348
2349 for (i = 0; i < 4; i++)
2350 {
2351 if (value & 65535)
2352 {
2353 if (has_candidate)
2354 return 0;
2355 else
2356 has_candidate = 1;
2357 }
2358
2359 value >>= 16;
2360 }
2361
2362 return 1;
2363}
2364
74f4459c 2365/* X and Y are two things to compare using CODE. Return the rtx for
2366 the cc-reg in the proper mode. */
68cbb7e3 2367
2368rtx
7585fcd5 2369mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2370{
2371 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2372 return gen_reg_rtx (ccmode);
68cbb7e3 2373}
2374
2375/* Local (static) helper functions. */
2376
d3310704 2377static void
7585fcd5 2378mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2379{
2380 rtx insn;
2381
2382 if (offset < 0)
2383 {
2384 /* Negative stack-pointer adjustments are allocations and appear in
2385 the prologue only. We mark them as frame-related so unwind and
2386 debug info is properly emitted for them. */
2387 if (offset > -255)
2388 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2389 stack_pointer_rtx,
2390 GEN_INT (offset)));
2391 else
2392 {
2393 rtx tmpr = gen_rtx_REG (DImode, 255);
2394 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2395 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2396 stack_pointer_rtx, tmpr));
2397 }
2398 RTX_FRAME_RELATED_P (insn) = 1;
2399 }
2400 else
2401 {
2402 /* Positive adjustments are in the epilogue only. Don't mark them
2403 as "frame-related" for unwind info. */
2404 if (CONST_OK_FOR_LETTER_P (offset, 'L'))
2405 emit_insn (gen_adddi3 (stack_pointer_rtx,
2406 stack_pointer_rtx,
2407 GEN_INT (offset)));
2408 else
2409 {
2410 rtx tmpr = gen_rtx_REG (DImode, 255);
2411 emit_move_insn (tmpr, GEN_INT (offset));
2412 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2413 stack_pointer_rtx, tmpr));
2414 }
2415 }
2416}
2417
68cbb7e3 2418/* Print operator suitable for doing something with a shiftable
ebb11c7b 2419 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2420
2421static void
7585fcd5 2422mmix_output_shiftvalue_op_from_str (FILE *stream,
2423 const char *mainop,
2424 HOST_WIDEST_INT value)
68cbb7e3 2425{
25037517 2426 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2427 int i;
2428
2429 if (! mmix_shiftable_wyde_value (value))
2430 {
2431 char s[sizeof ("0xffffffffffffffff")];
2432 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2433 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2434 }
2435
2436 for (i = 0; i < 4; i++)
2437 {
2438 /* We know we're through when we find one-bits in the low
2439 16 bits. */
2440 if (value & 0xffff)
2441 {
2442 fprintf (stream, "%s%s", mainop, op_part[i]);
2443 return;
2444 }
2445 value >>= 16;
2446 }
2447
2448 /* No bits set? Then it must have been zero. */
2449 fprintf (stream, "%sL", mainop);
2450}
2451
2452/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2453
2454static void
7585fcd5 2455mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2456{
2457 /* Snipped from final.c:output_addr_const. We need to avoid the
2458 presumed universal "0x" prefix. We can do it by replacing "0x" with
2459 "#0" here; we must avoid a space in the operands and no, the zero
2460 won't cause the number to be assumed in octal format. */
2461 char hex_format[sizeof (HOST_WIDEST_INT_PRINT_HEX)];
2462
2463 if (do_begin_end)
2464 fprintf (stream, "\tOCTA ");
2465
2466 strcpy (hex_format, HOST_WIDEST_INT_PRINT_HEX);
2467 hex_format[0] = '#';
2468 hex_format[1] = '0';
2469
2470 /* Provide a few alternative output formats depending on the number, to
2471 improve legibility of assembler output. */
2472 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2473 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2474 fprintf (stream, "%d", (int) value);
2475 else if (value > (HOST_WIDEST_INT) 0
2476 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2477 fprintf (stream, "#%x", (unsigned int) value);
2478 else
2479 fprintf (stream, hex_format, value);
2480
2481 if (do_begin_end)
2482 fprintf (stream, "\n");
2483}
2484
2485/* Print the presumed shiftable wyde argument shifted into place (to
2486 be output with an operand). */
2487
2488static void
7585fcd5 2489mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2490{
2491 int i;
2492
2493 if (! mmix_shiftable_wyde_value (value))
2494 {
2495 char s[16+2+1];
2496 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2497 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2498 }
2499
2500 for (i = 0; i < 4; i++)
68cbb7e3 2501 {
7585fcd5 2502 /* We know we're through when we find one-bits in the low 16 bits. */
2503 if (value & 0xffff)
2504 {
2505 fprintf (stream, "#%x", (int) (value & 0xffff));
2506 return;
2507 }
68cbb7e3 2508
2509 value >>= 16;
2510 }
2511
2512 /* No bits set? Then it must have been zero. */
2513 fprintf (stream, "0");
2514}
2515
2516/* Output an MMIX condition name corresponding to an operator
2517 and operands:
2518 (comparison_operator [(comparison_operator ...) (const_int 0)])
2519 which means we have to look at *two* operators.
2520
2521 The argument "reversed" refers to reversal of the condition (not the
2522 same as swapping the arguments). */
2523
2524static void
7585fcd5 2525mmix_output_condition (FILE *stream, rtx x, int reversed)
68cbb7e3 2526{
2527 struct cc_conv
2528 {
2529 RTX_CODE cc;
2530
2531 /* The normal output cc-code. */
2532 const char *const normal;
2533
2534 /* The reversed cc-code, or NULL if invalid. */
2535 const char *const reversed;
2536 };
2537
2538 struct cc_type_conv
2539 {
2540 enum machine_mode cc_mode;
2541
21f1e711 2542 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2543 const struct cc_conv *const convs;
2544 };
2545
2546#undef CCEND
21f1e711 2547#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2548
2549 static const struct cc_conv cc_fun_convs[]
2550 = {{ORDERED, "Z", "P"},
2551 {UNORDERED, "P", "Z"},
2552 CCEND};
2553 static const struct cc_conv cc_fp_convs[]
2554 = {{GT, "P", NULL},
2555 {LT, "N", NULL},
2556 CCEND};
2557 static const struct cc_conv cc_fpeq_convs[]
2558 = {{NE, "Z", "P"},
2559 {EQ, "P", "Z"},
2560 CCEND};
2561 static const struct cc_conv cc_uns_convs[]
2562 = {{GEU, "NN", "N"},
2563 {GTU, "P", "NP"},
2564 {LEU, "NP", "P"},
2565 {LTU, "N", "NN"},
2566 CCEND};
2567 static const struct cc_conv cc_signed_convs[]
2568 = {{NE, "NZ", "Z"},
2569 {EQ, "Z", "NZ"},
2570 {GE, "NN", "N"},
2571 {GT, "P", "NP"},
2572 {LE, "NP", "P"},
2573 {LT, "N", "NN"},
2574 CCEND};
2575 static const struct cc_conv cc_di_convs[]
2576 = {{NE, "NZ", "Z"},
2577 {EQ, "Z", "NZ"},
2578 {GE, "NN", "N"},
2579 {GT, "P", "NP"},
2580 {LE, "NP", "P"},
2581 {LT, "N", "NN"},
2582 {GTU, "NZ", "Z"},
2583 {LEU, "Z", "NZ"},
2584 CCEND};
2585#undef CCEND
2586
2587 static const struct cc_type_conv cc_convs[]
2588 = {{CC_FUNmode, cc_fun_convs},
2589 {CC_FPmode, cc_fp_convs},
2590 {CC_FPEQmode, cc_fpeq_convs},
2591 {CC_UNSmode, cc_uns_convs},
2592 {CCmode, cc_signed_convs},
2593 {DImode, cc_di_convs}};
2594
3585dac7 2595 size_t i;
68cbb7e3 2596 int j;
2597
2598 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2599 RTX_CODE cc = GET_CODE (x);
2600
3585dac7 2601 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2602 {
2603 if (mode == cc_convs[i].cc_mode)
2604 {
21f1e711 2605 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2606 if (cc == cc_convs[i].convs[j].cc)
2607 {
2608 const char *mmix_cc
2609 = (reversed ? cc_convs[i].convs[j].reversed
2610 : cc_convs[i].convs[j].normal);
2611
2612 if (mmix_cc == NULL)
2613 fatal_insn ("MMIX Internal: Trying to output invalidly\
2614 reversed condition:", x);
2615
2616 fprintf (stream, "%s", mmix_cc);
2617 return;
2618 }
2619
2620 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2621 }
2622 }
2623
2624 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2625}
2626
2627/* Return the bit-value for a const_int or const_double. */
2628
2629static HOST_WIDEST_INT
7585fcd5 2630mmix_intval (rtx x)
68cbb7e3 2631{
2632 unsigned HOST_WIDEST_INT retval;
2633
2634 if (GET_CODE (x) == CONST_INT)
2635 return INTVAL (x);
2636
2637 /* We make a little song and dance because converting to long long in
2638 gcc-2.7.2 is broken. I still want people to be able to use it for
2639 cross-compilation to MMIX. */
2640 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2641 {
2642 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2643 {
2644 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2645 retval *= 2;
2646 retval |= CONST_DOUBLE_LOW (x) & 1;
2647
2648 retval |=
2649 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
2650 << (HOST_BITS_PER_LONG);
2651 }
2652 else
2653 retval = CONST_DOUBLE_HIGH (x);
2654
2655 return retval;
2656 }
2657
2658 if (GET_CODE (x) == CONST_DOUBLE)
2659 {
2660 REAL_VALUE_TYPE value;
2661
2662 /* FIXME: This macro is not in the manual but should be. */
2663 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2664
2665 if (GET_MODE (x) == DFmode)
2666 {
2667 long bits[2];
dc8dc4ce 2668
68cbb7e3 2669 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2670
ca2399d9 2671 /* The double cast is necessary to avoid getting the long
2672 sign-extended to unsigned long long(!) when they're of
2673 different size (usually 32-bit hosts). */
2674 return
2675 ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0]
2676 << (unsigned HOST_WIDEST_INT) 32U)
2677 | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1];
68cbb7e3 2678 }
2679 else if (GET_MODE (x) == SFmode)
2680 {
2681 long bits;
2682 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2683
2684 return (unsigned long) bits;
2685 }
2686 }
2687
2688 fatal_insn ("MMIX Internal: This is not a constant:", x);
2689}
2690
9e4a734a 2691/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2692
2693static rtx
2694mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2695 int incoming ATTRIBUTE_UNUSED)
2696{
2697 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2698}
2699
68cbb7e3 2700/*
2701 * Local variables:
2702 * eval: (c-set-style "gnu")
2703 * indent-tabs-mode: t
2704 * End:
2705 */