]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/mmix/mmix.c
2012-10-07 Paolo Carlini <paolo.carlini@oracle.com>
[thirdparty/gcc.git] / gcc / config / mmix / mmix.c
CommitLineData
68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
b600778c 2 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
39cba157 3 2010, 2011
978b9403 4 Free Software Foundation, Inc.
68cbb7e3 5 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
6
581084df 7This file is part of GCC.
68cbb7e3 8
581084df 9GCC is free software; you can redistribute it and/or modify
68cbb7e3 10it under the terms of the GNU General Public License as published by
038d1e19 11the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 12any later version.
13
581084df 14GCC is distributed in the hope that it will be useful,
68cbb7e3 15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
038d1e19 20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
68cbb7e3 22
23#include "config.h"
24#include "system.h"
805e22b2 25#include "coretypes.h"
26#include "tm.h"
68cbb7e3 27#include "rtl.h"
28#include "regs.h"
29#include "hard-reg-set.h"
30#include "hashtab.h"
31#include "insn-config.h"
32#include "output.h"
1998fe39 33#include "basic-block.h"
68cbb7e3 34#include "flags.h"
35#include "tree.h"
36#include "function.h"
37#include "expr.h"
0b205f4c 38#include "diagnostic-core.h"
68cbb7e3 39#include "recog.h"
40#include "ggc.h"
bde36f4a 41#include "dwarf2.h"
68cbb7e3 42#include "debug.h"
43#include "tm_p.h"
68cbb7e3 44#include "target.h"
45#include "target-def.h"
c0dae7df 46#include "df.h"
f105c84e 47#include "tm-constrs.h"
68cbb7e3 48
49/* First some local helper definitions. */
50#define MMIX_FIRST_GLOBAL_REGNUM 32
51
52/* We'd need a current_function_has_landing_pad. It's marked as such when
53 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
54 mostly. */
55#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
56
57/* We have no means to tell DWARF 2 about the register stack, so we need
58 to store the return address on the stack if an exception can get into
d3310704 59 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 60 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 61 after reload_completed; it may contain incorrect information some time
62 before that. Within a RTL sequence (after a call to start_sequence,
63 such as in RTL expanders), leaf_function_p doesn't see all insns
64 (perhaps any insn). But regs_ever_live is up-to-date when
65 leaf_function_p () isn't, so we "or" them together to get accurate
66 information. FIXME: Some tweak to leaf_function_p might be
f024691d 67 preferable. */
d3310704 68#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
69 (flag_exceptions \
3072d30e 70 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 71 || !leaf_function_p ()))
68cbb7e3 72
73#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 74 (crtl->calls_eh_return \
68cbb7e3 75 && (EH_RETURN_DATA_REGNO (0) == REGNO \
76 || EH_RETURN_DATA_REGNO (1) == REGNO \
77 || EH_RETURN_DATA_REGNO (2) == REGNO \
78 || EH_RETURN_DATA_REGNO (3) == REGNO))
79
d68ffc6f 80/* For the default ABI, we rename registers at output-time to fill the gap
81 between the (statically partitioned) saved registers and call-clobbered
82 registers. In effect this makes unused call-saved registers to be used
83 as call-clobbered registers. The benefit comes from keeping the number
84 of local registers (value of rL) low, since there's a cost of
d3310704 85 increasing rL and clearing unused (unset) registers with lower numbers.
86 Don't translate while outputting the prologue. */
d68ffc6f 87#define MMIX_OUTPUT_REGNO(N) \
88 (TARGET_ABI_GNU \
0b123c47 89 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
90 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 91 || cfun == NULL \
92 || cfun->machine == NULL \
93 || cfun->machine->in_prologue \
d68ffc6f 94 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
95 + cfun->machine->highest_saved_stack_register + 1))
96
0b123c47 97/* The %d in "POP %d,0". */
98#define MMIX_POP_ARGUMENT() \
99 ((! TARGET_ABI_GNU \
abe32cce 100 && crtl->return_rtx != NULL \
18d50ae6 101 && ! cfun->returns_struct) \
abe32cce 102 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
103 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 104 : 0)
105
68cbb7e3 106/* The canonical saved comparison operands for non-cc0 machines, set in
107 the compare expander. */
108rtx mmix_compare_op0;
109rtx mmix_compare_op1;
110
68cbb7e3 111/* Declarations of locals. */
112
68cbb7e3 113/* Intermediate for insn output. */
114static int mmix_output_destination_register;
115
4c834714 116static void mmix_option_override (void);
40fe393f 117static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 118static void mmix_output_shiftvalue_op_from_str
7585fcd5 119 (FILE *, const char *, HOST_WIDEST_INT);
120static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
7a7fb407 121static void mmix_output_condition (FILE *, const_rtx, int);
7585fcd5 122static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
123static bool mmix_assemble_integer (rtx, unsigned int, int);
124static struct machine_function *mmix_init_machine_status (void);
125static void mmix_encode_section_info (tree, rtx, int);
126static const char *mmix_strip_name_encoding (const char *);
127static void mmix_emit_sp_add (HOST_WIDE_INT offset);
128static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
129static void mmix_target_asm_function_end_prologue (FILE *);
130static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
27925877 131static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
132static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
fd50b071 133static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool);
ca316360 134static bool mmix_legitimate_constant_p (enum machine_mode, rtx);
7585fcd5 135static void mmix_reorg (void);
6988553d 136static void mmix_asm_output_mi_thunk
7585fcd5 137 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 138static void mmix_setup_incoming_varargs
39cba157 139 (cumulative_args_t, enum machine_mode, tree, int *, int);
7585fcd5 140static void mmix_file_start (void);
141static void mmix_file_end (void);
20d892d1 142static bool mmix_rtx_costs (rtx, int, int, int, int *, bool);
f7e13ca6 143static int mmix_register_move_cost (enum machine_mode,
144 reg_class_t, reg_class_t);
9e4a734a 145static rtx mmix_struct_value_rtx (tree, int);
3b2411a8 146static enum machine_mode mmix_promote_function_mode (const_tree,
147 enum machine_mode,
148 int *, const_tree, int);
39cba157 149static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode,
5d246ebf 150 const_tree, bool);
39cba157 151static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode,
5d246ebf 152 const_tree, bool, bool);
39cba157 153static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode,
5d246ebf 154 const_tree, bool);
39cba157 155static rtx mmix_function_arg (cumulative_args_t, enum machine_mode,
5d246ebf 156 const_tree, bool);
b600778c 157static rtx mmix_function_value (const_tree, const_tree, bool);
158static rtx mmix_libcall_value (enum machine_mode, const_rtx);
159static bool mmix_function_value_regno_p (const unsigned int);
39cba157 160static bool mmix_pass_by_reference (cumulative_args_t,
fb80456a 161 enum machine_mode, const_tree, bool);
5a1c68c3 162static bool mmix_frame_pointer_required (void);
604d844a 163static void mmix_asm_trampoline_template (FILE *);
164static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 165static void mmix_print_operand (FILE *, rtx, int);
166static void mmix_print_operand_address (FILE *, rtx);
167static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 168static void mmix_conditional_register_usage (void);
68cbb7e3 169
170/* Target structure macros. Listed by node. See `Using and Porting GCC'
171 for a general description. */
172
173/* Node: Function Entry */
174
58356836 175#undef TARGET_ASM_BYTE_OP
176#define TARGET_ASM_BYTE_OP NULL
177#undef TARGET_ASM_ALIGNED_HI_OP
178#define TARGET_ASM_ALIGNED_HI_OP NULL
179#undef TARGET_ASM_ALIGNED_SI_OP
180#define TARGET_ASM_ALIGNED_SI_OP NULL
181#undef TARGET_ASM_ALIGNED_DI_OP
182#define TARGET_ASM_ALIGNED_DI_OP NULL
183#undef TARGET_ASM_INTEGER
184#define TARGET_ASM_INTEGER mmix_assemble_integer
185
68cbb7e3 186#undef TARGET_ASM_FUNCTION_PROLOGUE
187#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
188
d3310704 189#undef TARGET_ASM_FUNCTION_END_PROLOGUE
190#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
191
68cbb7e3 192#undef TARGET_ASM_FUNCTION_EPILOGUE
193#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
194
7a7fb407 195#undef TARGET_PRINT_OPERAND
196#define TARGET_PRINT_OPERAND mmix_print_operand
197#undef TARGET_PRINT_OPERAND_ADDRESS
198#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
199#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
200#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
201
7811991d 202#undef TARGET_ENCODE_SECTION_INFO
203#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 204#undef TARGET_STRIP_NAME_ENCODING
205#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 206
6988553d 207#undef TARGET_ASM_OUTPUT_MI_THUNK
208#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 209#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
210#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 211#undef TARGET_ASM_FILE_START
212#define TARGET_ASM_FILE_START mmix_file_start
213#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
214#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 215#undef TARGET_ASM_FILE_END
216#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 217#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
218#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 219
b2d7ede1 220#undef TARGET_CONDITIONAL_REGISTER_USAGE
221#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
222
fab7adbf 223#undef TARGET_RTX_COSTS
224#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 225#undef TARGET_ADDRESS_COST
d9c5e5f4 226#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
fab7adbf 227
f7e13ca6 228#undef TARGET_REGISTER_MOVE_COST
229#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
230
2efea8c0 231#undef TARGET_MACHINE_DEPENDENT_REORG
232#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
233
3b2411a8 234#undef TARGET_PROMOTE_FUNCTION_MODE
235#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
236
b600778c 237#undef TARGET_FUNCTION_VALUE
238#define TARGET_FUNCTION_VALUE mmix_function_value
239#undef TARGET_LIBCALL_VALUE
240#define TARGET_LIBCALL_VALUE mmix_libcall_value
241#undef TARGET_FUNCTION_VALUE_REGNO_P
242#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 243
5d246ebf 244#undef TARGET_FUNCTION_ARG
245#define TARGET_FUNCTION_ARG mmix_function_arg
246#undef TARGET_FUNCTION_INCOMING_ARG
247#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
248#undef TARGET_FUNCTION_ARG_ADVANCE
249#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 250#undef TARGET_STRUCT_VALUE_RTX
251#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 252#undef TARGET_SETUP_INCOMING_VARARGS
253#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 254#undef TARGET_PASS_BY_REFERENCE
255#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 256#undef TARGET_CALLEE_COPIES
257#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 258
27925877 259#undef TARGET_PREFERRED_RELOAD_CLASS
260#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
261#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 262#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 263
fd50b071 264#undef TARGET_LEGITIMATE_ADDRESS_P
265#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 266#undef TARGET_LEGITIMATE_CONSTANT_P
267#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 268
5a1c68c3 269#undef TARGET_FRAME_POINTER_REQUIRED
270#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
271
604d844a 272#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
273#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
274#undef TARGET_TRAMPOLINE_INIT
275#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
276
4c834714 277#undef TARGET_OPTION_OVERRIDE
278#define TARGET_OPTION_OVERRIDE mmix_option_override
279
68cbb7e3 280struct gcc_target targetm = TARGET_INITIALIZER;
281
282/* Functions that are expansions for target macros.
283 See Target Macros in `Using and Porting GCC'. */
284
4c834714 285/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 286
4c834714 287static void
288mmix_option_override (void)
68cbb7e3 289{
290 /* Should we err or should we warn? Hmm. At least we must neutralize
291 it. For example the wrong kind of case-tables will be generated with
292 PIC; we use absolute address items for mmixal compatibility. FIXME:
293 They could be relative if we just elide them to after all pertinent
294 labels. */
295 if (flag_pic)
296 {
c3ceba8e 297 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 298 flag_pic = 0;
299 }
68cbb7e3 300}
301
302/* INIT_EXPANDERS. */
303
304void
7585fcd5 305mmix_init_expanders (void)
68cbb7e3 306{
307 init_machine_status = mmix_init_machine_status;
308}
309
310/* Set the per-function data. */
311
1f3233d1 312static struct machine_function *
7585fcd5 313mmix_init_machine_status (void)
68cbb7e3 314{
ba72912a 315 return ggc_alloc_cleared_machine_function ();
68cbb7e3 316}
317
318/* DATA_ALIGNMENT.
319 We have trouble getting the address of stuff that is located at other
320 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 321 at least 32-bit alignment. */
68cbb7e3 322
323int
7585fcd5 324mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 325{
326 if (basic_align < 32)
327 return 32;
328
329 return basic_align;
330}
331
332/* CONSTANT_ALIGNMENT. */
333
334int
7585fcd5 335mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 336{
337 if (basic_align < 32)
338 return 32;
339
340 return basic_align;
341}
342
343/* LOCAL_ALIGNMENT. */
344
c0dae7df 345unsigned
346mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 347{
348 if (basic_align < 32)
349 return 32;
350
351 return basic_align;
352}
353
b2d7ede1 354/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 355
b2d7ede1 356static void
7585fcd5 357mmix_conditional_register_usage (void)
68cbb7e3 358{
359 int i;
360
361 if (TARGET_ABI_GNU)
362 {
363 static const int gnu_abi_reg_alloc_order[]
364 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
365
366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
367 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
368
369 /* Change the default from the mmixware ABI. For the GNU ABI,
370 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 371 call-clobbered local register for the "hole" that holds the
372 number of saved local registers saved by PUSHJ/PUSHGO during the
373 function call, receiving the return value at return. So best is
374 to use the highest, $31. It's already marked call-clobbered for
375 the mmixware ABI. */
68cbb7e3 376 for (i = 15; i <= 30; i++)
377 call_used_regs[i] = 0;
f0b228a5 378
379 /* "Unfix" the parameter registers. */
380 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
381 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
382 i++)
383 fixed_regs[i] = 0;
68cbb7e3 384 }
385
386 /* Step over the ":" in special register names. */
387 if (! TARGET_TOPLEVEL_SYMBOLS)
388 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
389 if (reg_names[i][0] == ':')
390 reg_names[i]++;
391}
392
6d1f3d31 393/* INCOMING_REGNO and OUTGOING_REGNO worker function.
394 Those two macros must only be applied to function argument
395 registers. FIXME: for their current use in gcc, it'd be better
396 with an explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P
5d246ebf 397 a'la TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
398 forcing the target to commit to a fixed mapping and for any
399 unspecified register use. */
6d1f3d31 400
401int
402mmix_opposite_regno (int regno, int incoming)
403{
404 if (!mmix_function_arg_regno_p (regno, incoming))
405 return regno;
406
407 return
408 regno - (incoming
409 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
410 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
411}
412
d3310704 413/* LOCAL_REGNO.
414 All registers that are part of the register stack and that will be
415 saved are local. */
416
417int
7585fcd5 418mmix_local_regno (int regno)
d3310704 419{
420 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
421}
422
27925877 423/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 424 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
425
27925877 426static reg_class_t
427mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 428{
429 /* FIXME: Revisit. */
430 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 431 ? REMAINDER_REG : rclass;
68cbb7e3 432}
433
27925877 434/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 435 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
436
27925877 437static reg_class_t
438mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 439{
440 /* FIXME: Revisit. */
441 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 442 ? REMAINDER_REG : rclass;
68cbb7e3 443}
444
445/* SECONDARY_RELOAD_CLASS.
446 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
447
448enum reg_class
8deb3959 449mmix_secondary_reload_class (enum reg_class rclass,
7585fcd5 450 enum machine_mode mode ATTRIBUTE_UNUSED,
451 rtx x ATTRIBUTE_UNUSED,
452 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 453{
8deb3959 454 if (rclass == REMAINDER_REG
455 || rclass == HIMULT_REG
456 || rclass == SYSTEM_REGS)
68cbb7e3 457 return GENERAL_REGS;
458
68cbb7e3 459 return NO_REGS;
460}
461
68cbb7e3 462/* DYNAMIC_CHAIN_ADDRESS. */
463
464rtx
7585fcd5 465mmix_dynamic_chain_address (rtx frame)
68cbb7e3 466{
467 /* FIXME: the frame-pointer is stored at offset -8 from the current
468 frame-pointer. Unfortunately, the caller assumes that a
469 frame-pointer is present for *all* previous frames. There should be
470 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 471 return plus_constant (Pmode, frame, -8);
68cbb7e3 472}
473
474/* STARTING_FRAME_OFFSET. */
475
476int
7585fcd5 477mmix_starting_frame_offset (void)
68cbb7e3 478{
479 /* The old frame pointer is in the slot below the new one, so
480 FIRST_PARM_OFFSET does not need to depend on whether the
481 frame-pointer is needed or not. We have to adjust for the register
482 stack pointer being located below the saved frame pointer.
483 Similarly, we store the return address on the stack too, for
484 exception handling, and always if we save the register stack pointer. */
485 return
486 (-8
487 + (MMIX_CFUN_HAS_LANDING_PAD
488 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
489}
490
491/* RETURN_ADDR_RTX. */
492
493rtx
7585fcd5 494mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 495{
496 return count == 0
497 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 498 /* FIXME: Set frame_alias_set on the following. (Why?)
499 See mmix_initial_elimination_offset for the reason we can't use
500 get_hard_reg_initial_val for both. Always using a stack slot
501 and not a register would be suboptimal. */
29c05e22 502 ? validize_mem (gen_rtx_MEM (Pmode,
503 plus_constant (Pmode,
504 frame_pointer_rtx, -16)))
68cbb7e3 505 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
506 : NULL_RTX;
507}
508
509/* SETUP_FRAME_ADDRESSES. */
510
511void
7585fcd5 512mmix_setup_frame_addresses (void)
68cbb7e3 513{
514 /* Nothing needed at the moment. */
515}
516
517/* The difference between the (imaginary) frame pointer and the stack
518 pointer. Used to eliminate the frame pointer. */
519
520int
7585fcd5 521mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 522{
523 int regno;
524 int fp_sp_offset
abe32cce 525 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 526
af08e904 527 /* There is no actual offset between these two virtual values, but for
528 the frame-pointer, we have the old one in the stack position below
529 it, so the offset for the frame-pointer to the stack-pointer is one
530 octabyte larger. */
68cbb7e3 531 if (fromreg == MMIX_ARG_POINTER_REGNUM
532 && toreg == MMIX_FRAME_POINTER_REGNUM)
533 return 0;
534
535 /* The difference is the size of local variables plus the size of
536 outgoing function arguments that would normally be passed as
537 registers but must be passed on stack because we're out of
538 function-argument registers. Only global saved registers are
539 counted; the others go on the register stack.
540
541 The frame-pointer is counted too if it is what is eliminated, as we
542 need to balance the offset for it from STARTING_FRAME_OFFSET.
543
544 Also add in the slot for the register stack pointer we save if we
545 have a landing pad.
546
547 Unfortunately, we can't access $0..$14, from unwinder code easily, so
548 store the return address in a frame slot too. FIXME: Only for
549 non-leaf functions. FIXME: Always with a landing pad, because it's
550 hard to know whether we need the other at the time we know we need
551 the offset for one (and have to state it). It's a kludge until we
552 can express the register stack in the EH frame info.
553
554 We have to do alignment here; get_frame_size will not return a
555 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
556
557 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
558 regno <= 255;
559 regno++)
3072d30e 560 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 561 || IS_MMIX_EH_RETURN_DATA_REG (regno))
562 fp_sp_offset += 8;
563
564 return fp_sp_offset
565 + (MMIX_CFUN_HAS_LANDING_PAD
566 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
567 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
568}
569
5d246ebf 570static void
39cba157 571mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode,
5d246ebf 572 const_tree type, bool named ATTRIBUTE_UNUSED)
573{
39cba157 574 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 575 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
576
577 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
578 || (arg_size > 8
579 && !TARGET_LIBFUNC
580 && !argsp->lib))
581 ? (MMIX_MAX_ARGS_IN_REGS) + 1
582 : argsp->regs + (7 + arg_size) / 8);
583}
68cbb7e3 584
5d246ebf 585/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
586
587static rtx
39cba157 588mmix_function_arg_1 (const cumulative_args_t argsp_v,
5d246ebf 589 enum machine_mode mode,
590 const_tree type,
591 bool named ATTRIBUTE_UNUSED,
592 bool incoming)
68cbb7e3 593{
39cba157 594 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
595
68cbb7e3 596 /* Last-argument marker. */
597 if (type == void_type_node)
598 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
599 ? gen_rtx_REG (mode,
600 (incoming
601 ? MMIX_FIRST_INCOMING_ARG_REGNUM
602 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
603 : NULL_RTX;
604
605 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 606 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 607 && (GET_MODE_BITSIZE (mode) <= 64
608 || argsp->lib
609 || TARGET_LIBFUNC))
610 ? gen_rtx_REG (mode,
611 (incoming
612 ? MMIX_FIRST_INCOMING_ARG_REGNUM
613 : MMIX_FIRST_ARG_REGNUM)
614 + argsp->regs)
615 : NULL_RTX;
616}
617
5d246ebf 618/* Return an rtx for a function argument to go in a register, and 0 for
619 one that must go on stack. */
620
621static rtx
39cba157 622mmix_function_arg (cumulative_args_t argsp,
5d246ebf 623 enum machine_mode mode,
624 const_tree type,
625 bool named)
626{
627 return mmix_function_arg_1 (argsp, mode, type, named, false);
628}
629
630static rtx
39cba157 631mmix_function_incoming_arg (cumulative_args_t argsp,
5d246ebf 632 enum machine_mode mode,
633 const_tree type,
634 bool named)
635{
636 return mmix_function_arg_1 (argsp, mode, type, named, true);
637}
638
68cbb7e3 639/* Returns nonzero for everything that goes by reference, 0 for
640 everything that goes by value. */
641
b981d932 642static bool
39cba157 643mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode,
fb80456a 644 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 645{
39cba157 646 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
647
0336f0f0 648 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 649 necessary. */
bef380a4 650 if (targetm.calls.must_pass_in_stack (mode, type))
651 return true;
652
653 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
654 && !TARGET_LIBFUNC
655 && (!argsp || !argsp->lib))
656 return true;
657
658 return false;
68cbb7e3 659}
660
661/* Return nonzero if regno is a register number where a parameter is
662 passed, and 0 otherwise. */
663
664int
7585fcd5 665mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 666{
667 int first_arg_regnum
668 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
669
670 return regno >= first_arg_regnum
671 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
672}
673
b600778c 674/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 675
b600778c 676static rtx
677mmix_function_value (const_tree valtype,
678 const_tree func ATTRIBUTE_UNUSED,
679 bool outgoing)
68cbb7e3 680{
681 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 682 enum machine_mode cmode;
683 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
684 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
685 int i;
686 int nregs;
687
b600778c 688 if (!outgoing)
689 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
690
68cbb7e3 691 /* Return values that fit in a register need no special handling.
692 There's no register hole when parameters are passed in global
693 registers. */
694 if (TARGET_ABI_GNU
695 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
696 return
697 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
698
fb89a8c9 699 if (COMPLEX_MODE_P (mode))
700 /* A complex type, made up of components. */
701 cmode = TYPE_MODE (TREE_TYPE (valtype));
702 else
703 {
704 /* Of the other larger-than-register modes, we only support
705 scalar mode TImode. (At least, that's the only one that's
706 been rudimentally tested.) Make sure we're alerted for
707 unexpected cases. */
708 if (mode != TImode)
709 sorry ("support for mode %qs", GET_MODE_NAME (mode));
710
711 /* In any case, we will fill registers to the natural size. */
712 cmode = DImode;
713 }
714
68cbb7e3 715 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
716
717 /* We need to take care of the effect of the register hole on return
718 values of large sizes; the last register will appear as the first
719 register, with the rest shifted. (For complex modes, this is just
720 swapped registers.) */
721
722 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 723 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 724 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
725
726 /* FIXME: Maybe we should handle structure values like this too
727 (adjusted for BLKmode), perhaps for both ABI:s. */
728 for (i = 0; i < nregs - 1; i++)
729 vec[i]
730 = gen_rtx_EXPR_LIST (VOIDmode,
731 gen_rtx_REG (cmode, first_val_regnum + i),
732 GEN_INT ((i + 1) * BITS_PER_UNIT));
733
734 vec[nregs - 1]
735 = gen_rtx_EXPR_LIST (VOIDmode,
736 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 737 const0_rtx);
68cbb7e3 738
739 return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs, vec));
740}
741
b600778c 742/* Implements TARGET_LIBCALL_VALUE. */
c715d549 743
b600778c 744static rtx
745mmix_libcall_value (enum machine_mode mode,
746 const_rtx fun ATTRIBUTE_UNUSED)
747{
748 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
749}
750
751/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
752
753static bool
754mmix_function_value_regno_p (const unsigned int regno)
c715d549 755{
756 return regno == MMIX_RETURN_VALUE_REGNUM;
757}
758
68cbb7e3 759/* EH_RETURN_DATA_REGNO. */
760
761int
7585fcd5 762mmix_eh_return_data_regno (int n)
68cbb7e3 763{
764 if (n >= 0 && n < 4)
765 return MMIX_EH_RETURN_DATA_REGNO_START + n;
766
767 return INVALID_REGNUM;
768}
769
770/* EH_RETURN_STACKADJ_RTX. */
771
772rtx
7585fcd5 773mmix_eh_return_stackadj_rtx (void)
68cbb7e3 774{
775 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
776}
777
778/* EH_RETURN_HANDLER_RTX. */
779
780rtx
7585fcd5 781mmix_eh_return_handler_rtx (void)
68cbb7e3 782{
7585fcd5 783 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 784}
785
786/* ASM_PREFERRED_EH_DATA_FORMAT. */
787
788int
7585fcd5 789mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
790 int global ATTRIBUTE_UNUSED)
68cbb7e3 791{
792 /* This is the default (was at 2001-07-20). Revisit when needed. */
793 return DW_EH_PE_absptr;
794}
795
28c2d844 796/* Make a note that we've seen the beginning of the prologue. This
d3310704 797 matters to whether we'll translate register numbers as calculated by
2efea8c0 798 mmix_reorg. */
68cbb7e3 799
d3310704 800static void
7585fcd5 801mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
802 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 803{
d3310704 804 cfun->machine->in_prologue = 1;
805}
68cbb7e3 806
d3310704 807/* Make a note that we've seen the end of the prologue. */
68cbb7e3 808
d3310704 809static void
7585fcd5 810mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 811{
812 cfun->machine->in_prologue = 0;
d68ffc6f 813}
814
2efea8c0 815/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
816 done here; just virtually by calculating the highest saved stack
817 register number used to modify the register numbers at output time. */
d68ffc6f 818
2efea8c0 819static void
7585fcd5 820mmix_reorg (void)
d68ffc6f 821{
822 int regno;
68cbb7e3 823
824 /* We put the number of the highest saved register-file register in a
825 location convenient for the call-patterns to output. Note that we
826 don't tell dwarf2 about these registers, since it can't restore them
827 anyway. */
d68ffc6f 828 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 829 regno >= 0;
830 regno--)
3072d30e 831 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 832 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
833 break;
834
d68ffc6f 835 /* Regardless of whether they're saved (they might be just read), we
836 mustn't include registers that carry parameters. We could scan the
837 insns to see whether they're actually used (and indeed do other less
838 trivial register usage analysis and transformations), but it seems
839 wasteful to optimize for unused parameter registers. As of
3072d30e 840 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 841 that might change. */
abe32cce 842 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 843 {
abe32cce 844 regno = crtl->args.info.regs - 1;
d68ffc6f 845
846 /* We don't want to let this cause us to go over the limit and make
847 incoming parameter registers be misnumbered and treating the last
848 parameter register and incoming return value register call-saved.
849 Stop things at the unmodified scheme. */
850 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
851 regno = MMIX_RETURN_VALUE_REGNUM - 1;
852 }
853
854 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 855}
856
857/* TARGET_ASM_FUNCTION_EPILOGUE. */
858
4448bfa5 859static void
7585fcd5 860mmix_target_asm_function_epilogue (FILE *stream,
861 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 862{
d3310704 863 /* Emit an \n for readability of the generated assembly. */
864 fputc ('\n', stream);
865}
68cbb7e3 866
e7f5e241 867/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 868
6988553d 869static void
7585fcd5 870mmix_asm_output_mi_thunk (FILE *stream,
871 tree fndecl ATTRIBUTE_UNUSED,
872 HOST_WIDE_INT delta,
873 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
874 tree func)
d3310704 875{
6644435d 876 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
877 location of structure to return as invisible first argument), you
878 need to tweak this code too. */
d3310704 879 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 880
d3310704 881 if (delta >= 0 && delta < 65536)
e7f5e241 882 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 883 else if (delta < 0 && delta >= -255)
e7f5e241 884 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 885 else
0b123c47 886 {
d3310704 887 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 888 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 889 }
890
d3310704 891 fprintf (stream, "\tJMP ");
892 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
893 fprintf (stream, "\n");
894}
68cbb7e3 895
d3310704 896/* FUNCTION_PROFILER. */
68cbb7e3 897
d3310704 898void
7585fcd5 899mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
900 int labelno ATTRIBUTE_UNUSED)
d3310704 901{
902 sorry ("function_profiler support for MMIX");
903}
68cbb7e3 904
9e4a734a 905/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
906 let's stick to pushing argument registers on the stack. Later, we
907 can parse all arguments in registers, to improve performance. */
68cbb7e3 908
9e4a734a 909static void
39cba157 910mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
7585fcd5 911 enum machine_mode mode,
912 tree vartype,
913 int *pretend_sizep,
914 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 915{
39cba157 916 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
917
7ccc713a 918 /* The last named variable has been handled, but
919 args_so_farp has not been advanced for it. */
920 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
921 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 922
923 /* We assume that one argument takes up one register here. That should
5aedf60c 924 be true until we start messing with multi-reg parameters. */
68cbb7e3 925 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
926 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
927}
928
604d844a 929/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 930
604d844a 931static void
932mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 933{
af08e904 934 /* Read a value into the static-chain register and jump somewhere. The
935 static chain is stored at offset 16, and the function address is
936 stored at offset 24. */
604d844a 937
68cbb7e3 938 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 939 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 940 fprintf (stream, "LDOU $255,$255,8\n\t");
941 fprintf (stream, "GO $255,$255,0\n");
942 fprintf (stream, "1H\tOCTA 0\n\t");
943 fprintf (stream, "OCTA 0\n");
944}
945
604d844a 946/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 947/* Set the static chain and function pointer field in the trampoline.
948 We also SYNCID here to be sure (doesn't matter in the simulator, but
949 some day it will). */
950
604d844a 951static void
952mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
953{
954 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
955 rtx mem;
956
957 emit_block_move (m_tramp, assemble_trampoline_template (),
958 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
959
960 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
961 emit_move_insn (mem, static_chain);
962 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
963 emit_move_insn (mem, fnaddr);
964
965 mem = adjust_address (m_tramp, DImode, 0);
966 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 967}
968
969/* We must exclude constant addresses that have an increment that is not a
970 multiple of four bytes because of restrictions of the GETA
f0b228a5 971 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 972
973int
7585fcd5 974mmix_constant_address_p (rtx x)
68cbb7e3 975{
976 RTX_CODE code = GET_CODE (x);
977 int addend = 0;
f0b228a5 978 /* When using "base addresses", anything constant goes. */
979 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 980
68cbb7e3 981 switch (code)
982 {
983 case LABEL_REF:
984 case SYMBOL_REF:
985 return 1;
986
68cbb7e3 987 case HIGH:
f0b228a5 988 /* FIXME: Don't know how to dissect these. Avoid them for now,
989 except we know they're constants. */
990 return constant_ok;
68cbb7e3 991
992 case CONST_INT:
993 addend = INTVAL (x);
994 break;
995
996 case CONST_DOUBLE:
997 if (GET_MODE (x) != VOIDmode)
998 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 999 return constant_ok;
68cbb7e3 1000 addend = CONST_DOUBLE_LOW (x);
1001 break;
1002
1003 case CONST:
1004 /* Note that expressions with arithmetic on forward references don't
1005 work in mmixal. People using gcc assembly code with mmixal might
1006 need to move arrays and such to before the point of use. */
1007 if (GET_CODE (XEXP (x, 0)) == PLUS)
1008 {
1009 rtx x0 = XEXP (XEXP (x, 0), 0);
1010 rtx x1 = XEXP (XEXP (x, 0), 1);
1011
1012 if ((GET_CODE (x0) == SYMBOL_REF
1013 || GET_CODE (x0) == LABEL_REF)
1014 && (GET_CODE (x1) == CONST_INT
1015 || (GET_CODE (x1) == CONST_DOUBLE
1016 && GET_MODE (x1) == VOIDmode)))
1017 addend = mmix_intval (x1);
1018 else
f0b228a5 1019 return constant_ok;
68cbb7e3 1020 }
1021 else
f0b228a5 1022 return constant_ok;
68cbb7e3 1023 break;
1024
1025 default:
1026 return 0;
1027 }
1028
f0b228a5 1029 return constant_ok || (addend & 3) == 0;
68cbb7e3 1030}
1031
fd50b071 1032/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1033
fd50b071 1034bool
1035mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
1036 rtx x,
1037 bool strict_checking)
68cbb7e3 1038{
1039#define MMIX_REG_OK(X) \
1040 ((strict_checking \
1041 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1042 || (reg_renumber[REGNO (X)] > 0 \
1043 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1044 || (!strict_checking \
1045 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1046 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1047 || REGNO (X) == ARG_POINTER_REGNUM)))
1048
1049 /* We only accept:
1050 (mem reg)
1051 (mem (plus reg reg))
f0b228a5 1052 (mem (plus reg 0..255)).
1053 unless TARGET_BASE_ADDRESSES, in which case we accept all
1054 (mem constant_address) too. */
68cbb7e3 1055
1056
1057 /* (mem reg) */
1058 if (REG_P (x) && MMIX_REG_OK (x))
1059 return 1;
1060
1061 if (GET_CODE(x) == PLUS)
1062 {
1063 rtx x1 = XEXP (x, 0);
1064 rtx x2 = XEXP (x, 1);
1065
1066 /* Try swapping the order. FIXME: Do we need this? */
1067 if (! REG_P (x1))
1068 {
1069 rtx tem = x1;
1070 x1 = x2;
1071 x2 = tem;
1072 }
1073
f0b228a5 1074 /* (mem (plus (reg?) (?))) */
68cbb7e3 1075 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1076 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1077
f0b228a5 1078 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1079 if (REG_P (x2) && MMIX_REG_OK (x2))
1080 return 1;
1081
f0b228a5 1082 /* (mem (plus (reg) (0..255?))) */
f105c84e 1083 if (satisfies_constraint_I (x2))
68cbb7e3 1084 return 1;
f0b228a5 1085
1086 return 0;
68cbb7e3 1087 }
1088
f0b228a5 1089 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1090}
1091
ca316360 1092/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1093
ca316360 1094static bool
1095mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1096{
1097 RTX_CODE code = GET_CODE (x);
1098
1099 /* We must allow any number due to the way the cse passes works; if we
1100 do not allow any number here, general_operand will fail, and insns
1101 will fatally fail recognition instead of "softly". */
1102 if (code == CONST_INT || code == CONST_DOUBLE)
1103 return 1;
1104
1105 return CONSTANT_ADDRESS_P (x);
1106}
1107
1108/* SELECT_CC_MODE. */
1109
1110enum machine_mode
7585fcd5 1111mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1112{
1113 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1114 output different compare insns. Note that we do not check the
1115 validity of the comparison here. */
1116
1117 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1118 {
1119 if (op == ORDERED || op == UNORDERED || op == UNGE
1120 || op == UNGT || op == UNLE || op == UNLT)
1121 return CC_FUNmode;
1122
1123 if (op == EQ || op == NE)
1124 return CC_FPEQmode;
1125
1126 return CC_FPmode;
1127 }
1128
1129 if (op == GTU || op == LTU || op == GEU || op == LEU)
1130 return CC_UNSmode;
1131
1132 return CCmode;
1133}
1134
68cbb7e3 1135/* REVERSIBLE_CC_MODE. */
1136
1137int
7585fcd5 1138mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1139{
1140 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1141 compares. */
68cbb7e3 1142 return mode != CC_FPmode;
1143}
1144
fab7adbf 1145/* TARGET_RTX_COSTS. */
68cbb7e3 1146
fab7adbf 1147static bool
7585fcd5 1148mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1149 int code ATTRIBUTE_UNUSED,
1150 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1151 int opno ATTRIBUTE_UNUSED,
f529eb25 1152 int *total ATTRIBUTE_UNUSED,
1153 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1154{
1155 /* For the time being, this is just a stub and we'll accept the
1156 generic calculations, until we can do measurements, at least.
1157 Say we did not modify any calculated costs. */
fab7adbf 1158 return false;
68cbb7e3 1159}
1160
f7e13ca6 1161/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1162
f7e13ca6 1163 The special registers can only move to and from general regs, and we
1164 need to check that their constraints match, so say 3 for them. */
1165
1166static int
7585fcd5 1167mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1168 reg_class_t from,
1169 reg_class_t to)
68cbb7e3 1170{
1171 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1172}
1173
1174/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1175 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1176 the target. */
1177
1178/* DATA_SECTION_ASM_OP. */
1179
1180const char *
7585fcd5 1181mmix_data_section_asm_op (void)
68cbb7e3 1182{
1183 return "\t.data ! mmixal:= 8H LOC 9B";
1184}
1185
7811991d 1186static void
7585fcd5 1187mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1188{
1189 /* Test for an external declaration, and do nothing if it is one. */
1190 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1191 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1192 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1193 ;
ae484cc8 1194 else if (first && DECL_P (decl))
68cbb7e3 1195 {
1196 /* For non-visible declarations, add a "@" prefix, which we skip
1197 when the label is output. If the label does not have this
f0b228a5 1198 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1199
1200 Note that this does not work for data that is declared extern and
1201 later defined as static. If there's code in between, that code
f0b228a5 1202 will refer to the extern declaration, and vice versa. This just
1203 means that when -mtoplevel-symbols is in use, we can just handle
1204 well-behaved ISO-compliant code. */
68cbb7e3 1205
2c129d70 1206 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1207 int len = strlen (str);
225ab426 1208 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1209 newstr[0] = '@';
68cbb7e3 1210 strcpy (newstr + 1, str);
b948ae2f 1211 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1212 }
1213
f0b228a5 1214 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1215 may need different options to reach for different things with GETA.
1216 For now, functions and things we know or have been told are constant. */
1217 if (TREE_CODE (decl) == FUNCTION_DECL
1218 || TREE_CONSTANT (decl)
1219 || (TREE_CODE (decl) == VAR_DECL
1220 && TREE_READONLY (decl)
1221 && !TREE_SIDE_EFFECTS (decl)
1222 && (!DECL_INITIAL (decl)
1223 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1224 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1225}
1226
7b4a38a6 1227static const char *
7585fcd5 1228mmix_strip_name_encoding (const char *name)
68cbb7e3 1229{
1230 for (; (*name == '@' || *name == '*'); name++)
1231 ;
1232
1233 return name;
1234}
1235
92c473b8 1236/* TARGET_ASM_FILE_START.
1237 We just emit a little comment for the time being. */
68cbb7e3 1238
92c473b8 1239static void
7585fcd5 1240mmix_file_start (void)
68cbb7e3 1241{
92c473b8 1242 default_file_start ();
68cbb7e3 1243
92c473b8 1244 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1245
1d60d981 1246 /* Make sure each file starts with the text section. */
2f14b1f9 1247 switch_to_section (text_section);
68cbb7e3 1248}
1249
f6940372 1250/* TARGET_ASM_FILE_END. */
68cbb7e3 1251
f6940372 1252static void
7585fcd5 1253mmix_file_end (void)
68cbb7e3 1254{
1d60d981 1255 /* Make sure each file ends with the data section. */
2f14b1f9 1256 switch_to_section (data_section);
68cbb7e3 1257}
1258
40fe393f 1259/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1260
40fe393f 1261static void
7585fcd5 1262mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1263{
1264 fprintf (stream, "# 1 ");
1265 OUTPUT_QUOTED_STRING (stream, name);
1266 fprintf (stream, "\n");
1267}
1268
1269/* OUTPUT_QUOTED_STRING. */
1270
1271void
7585fcd5 1272mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1273{
1274 const char * string_end = string + length;
25037517 1275 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1276
1277 /* Output "any character except newline and double quote character". We
1278 play it safe and avoid all control characters too. We also do not
1279 want [] as characters, should input be passed through m4 with [] as
1280 quotes. Further, we avoid "\", because the GAS port handles it as a
1281 quoting character. */
1282 while (string < string_end)
1283 {
1284 if (*string
1285 && (unsigned char) *string < 128
1286 && !ISCNTRL (*string)
1287 && strchr (unwanted_chars, *string) == NULL)
1288 {
1289 fputc ('"', stream);
1290 while (*string
1291 && (unsigned char) *string < 128
1292 && !ISCNTRL (*string)
1293 && strchr (unwanted_chars, *string) == NULL
1294 && string < string_end)
1295 {
1296 fputc (*string, stream);
1297 string++;
1298 }
1299 fputc ('"', stream);
1300 if (string < string_end)
1301 fprintf (stream, ",");
1302 }
1303 if (string < string_end)
1304 {
1305 fprintf (stream, "#%x", *string & 255);
1306 string++;
1307 if (string < string_end)
1308 fprintf (stream, ",");
1309 }
1310 }
1311}
1312
58356836 1313/* Target hook for assembling integer objects. Use mmix_print_operand
1314 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1315 CONST_DOUBLEs. */
68cbb7e3 1316
58356836 1317static bool
7585fcd5 1318mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1319{
58356836 1320 if (aligned_p)
1321 switch (size)
1322 {
4f4e478d 1323 /* We handle a limited number of types of operands in here. But
1324 that's ok, because we can punt to generic functions. We then
5c3d1711 1325 pretend that aligned data isn't needed, so the usual .<pseudo>
1326 syntax is used (which works for aligned data too). We actually
1327 *must* do that, since we say we don't have simple aligned
1328 pseudos, causing this function to be called. We just try and
1329 keep as much compatibility as possible with mmixal syntax for
1330 normal cases (i.e. without GNU extensions and C only). */
58356836 1331 case 1:
4f4e478d 1332 if (GET_CODE (x) != CONST_INT)
1333 {
1334 aligned_p = 0;
1335 break;
1336 }
58356836 1337 fputs ("\tBYTE\t", asm_out_file);
1338 mmix_print_operand (asm_out_file, x, 'B');
1339 fputc ('\n', asm_out_file);
1340 return true;
1341
1342 case 2:
4f4e478d 1343 if (GET_CODE (x) != CONST_INT)
1344 {
1345 aligned_p = 0;
1346 break;
1347 }
58356836 1348 fputs ("\tWYDE\t", asm_out_file);
1349 mmix_print_operand (asm_out_file, x, 'W');
1350 fputc ('\n', asm_out_file);
1351 return true;
1352
1353 case 4:
60bb373d 1354 if (GET_CODE (x) != CONST_INT)
4f4e478d 1355 {
1356 aligned_p = 0;
1357 break;
1358 }
58356836 1359 fputs ("\tTETRA\t", asm_out_file);
1360 mmix_print_operand (asm_out_file, x, 'L');
1361 fputc ('\n', asm_out_file);
1362 return true;
1363
1364 case 8:
7f81c162 1365 /* We don't get here anymore for CONST_DOUBLE, because DImode
1366 isn't expressed as CONST_DOUBLE, and DFmode is handled
1367 elsewhere. */
1368 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1369 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1370 return true;
1371 }
1372 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1373}
1374
1375/* ASM_OUTPUT_ASCII. */
1376
1377void
7585fcd5 1378mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1379{
1380 while (length > 0)
1381 {
1382 int chunk_size = length > 60 ? 60 : length;
1383 fprintf (stream, "\tBYTE ");
1384 mmix_output_quoted_string (stream, string, chunk_size);
1385 string += chunk_size;
1386 length -= chunk_size;
1387 fprintf (stream, "\n");
1388 }
1389}
1390
1391/* ASM_OUTPUT_ALIGNED_COMMON. */
1392
1393void
7585fcd5 1394mmix_asm_output_aligned_common (FILE *stream,
1395 const char *name,
1396 int size,
1397 int align)
68cbb7e3 1398{
1399 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1400 express this in a mmixal-compatible way. */
1401 fprintf (stream, "\t.comm\t");
1402 assemble_name (stream, name);
1403 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1404 size, align / BITS_PER_UNIT);
1405}
1406
1407/* ASM_OUTPUT_ALIGNED_LOCAL. */
1408
1409void
7585fcd5 1410mmix_asm_output_aligned_local (FILE *stream,
1411 const char *name,
1412 int size,
1413 int align)
68cbb7e3 1414{
2f14b1f9 1415 switch_to_section (data_section);
68cbb7e3 1416
1417 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1418 assemble_name (stream, name);
1419 fprintf (stream, "\tLOC @+%d\n", size);
1420}
1421
1422/* ASM_OUTPUT_LABEL. */
1423
1424void
7585fcd5 1425mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1426{
1427 assemble_name (stream, name);
1428 fprintf (stream, "\tIS @\n");
1429}
1430
af1c039b 1431/* ASM_OUTPUT_INTERNAL_LABEL. */
1432
1433void
1434mmix_asm_output_internal_label (FILE *stream, const char *name)
1435{
1436 assemble_name_raw (stream, name);
1437 fprintf (stream, "\tIS @\n");
1438}
1439
68cbb7e3 1440/* ASM_DECLARE_REGISTER_GLOBAL. */
1441
1442void
7585fcd5 1443mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1444 tree decl ATTRIBUTE_UNUSED,
1445 int regno ATTRIBUTE_UNUSED,
1446 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1447{
1448 /* Nothing to do here, but there *will* be, therefore the framework is
1449 here. */
1450}
1451
68cbb7e3 1452/* ASM_WEAKEN_LABEL. */
1453
1454void
7585fcd5 1455mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1456 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1457{
7fe1d31c 1458 fprintf (stream, "\t.weak ");
68cbb7e3 1459 assemble_name (stream, name);
7fe1d31c 1460 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1461}
1462
1463/* MAKE_DECL_ONE_ONLY. */
1464
1465void
7585fcd5 1466mmix_make_decl_one_only (tree decl)
68cbb7e3 1467{
1468 DECL_WEAK (decl) = 1;
1469}
1470
1471/* ASM_OUTPUT_LABELREF.
1472 Strip GCC's '*' and our own '@'. No order is assumed. */
1473
1474void
7585fcd5 1475mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1476{
91009d64 1477 int is_extern = 1;
68cbb7e3 1478
1479 for (; (*name == '@' || *name == '*'); name++)
1480 if (*name == '@')
91009d64 1481 is_extern = 0;
68cbb7e3 1482
1483 asm_fprintf (stream, "%s%U%s",
1484 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1485 name);
1486}
1487
68cbb7e3 1488/* ASM_OUTPUT_DEF. */
1489
1490void
7585fcd5 1491mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1492{
1493 assemble_name (stream, name);
1494 fprintf (stream, "\tIS ");
1495 assemble_name (stream, value);
1496 fputc ('\n', stream);
1497}
1498
7a7fb407 1499/* TARGET_PRINT_OPERAND. */
68cbb7e3 1500
7a7fb407 1501static void
7585fcd5 1502mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1503{
1504 /* When we add support for different codes later, we can, when needed,
1505 drop through to the main handler with a modified operand. */
1506 rtx modified_x = x;
d68ffc6f 1507 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1508
1509 switch (code)
1510 {
1511 /* Unrelated codes are in alphabetic order. */
1512
91009d64 1513 case '+':
1514 /* For conditional branches, output "P" for a probable branch. */
1515 if (TARGET_BRANCH_PREDICT)
1516 {
1517 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
1518 if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
1519 putc ('P', stream);
1520 }
1521 return;
1522
0b123c47 1523 case '.':
1524 /* For the %d in POP %d,0. */
1525 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1526 return;
1527
68cbb7e3 1528 case 'B':
1529 if (GET_CODE (x) != CONST_INT)
1530 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1531 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1532 return;
1533
1534 case 'H':
1535 /* Highpart. Must be general register, and not the last one, as
1536 that one cannot be part of a consecutive register pair. */
d68ffc6f 1537 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1538 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1539
1540 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1541 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1542 return;
1543
1544 case 'L':
1545 /* Lowpart. Must be CONST_INT or general register, and not the last
1546 one, as that one cannot be part of a consecutive register pair. */
1547 if (GET_CODE (x) == CONST_INT)
1548 {
1549 fprintf (stream, "#%lx",
1550 (unsigned long) (INTVAL (x)
1551 & ((unsigned int) 0x7fffffff * 2 + 1)));
1552 return;
1553 }
1554
1555 if (GET_CODE (x) == SYMBOL_REF)
1556 {
1557 output_addr_const (stream, x);
1558 return;
1559 }
1560
d68ffc6f 1561 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1562 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1563
1564 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1565 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1566 return;
1567
1568 /* Can't use 'a' because that's a generic modifier for address
1569 output. */
1570 case 'A':
1571 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1572 ~(unsigned HOST_WIDEST_INT)
1573 mmix_intval (x));
1574 return;
1575
1576 case 'i':
1577 mmix_output_shiftvalue_op_from_str (stream, "INC",
1578 (unsigned HOST_WIDEST_INT)
1579 mmix_intval (x));
1580 return;
1581
1582 case 'o':
1583 mmix_output_shiftvalue_op_from_str (stream, "OR",
1584 (unsigned HOST_WIDEST_INT)
1585 mmix_intval (x));
1586 return;
1587
1588 case 's':
1589 mmix_output_shiftvalue_op_from_str (stream, "SET",
1590 (unsigned HOST_WIDEST_INT)
1591 mmix_intval (x));
1592 return;
1593
1594 case 'd':
1595 case 'D':
1596 mmix_output_condition (stream, x, (code == 'D'));
1597 return;
1598
1599 case 'e':
1600 /* Output an extra "e" to make fcmpe, fune. */
1601 if (TARGET_FCMP_EPSILON)
1602 fprintf (stream, "e");
1603 return;
1604
1605 case 'm':
1606 /* Output the number minus 1. */
1607 if (GET_CODE (x) != CONST_INT)
1608 {
1609 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1610 x);
1611 }
1612 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1613 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1614 return;
1615
1616 case 'p':
1617 /* Store the number of registers we want to save. This was setup
1618 by the prologue. The actual operand contains the number of
1619 registers to pass, but we don't use it currently. Anyway, we
1620 need to output the number of saved registers here. */
d68ffc6f 1621 fprintf (stream, "%d",
1622 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1623 return;
1624
1625 case 'r':
1626 /* Store the register to output a constant to. */
1627 if (! REG_P (x))
68435912 1628 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1629 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1630 return;
1631
1632 case 'I':
1633 /* Output the constant. Note that we use this for floats as well. */
1634 if (GET_CODE (x) != CONST_INT
1635 && (GET_CODE (x) != CONST_DOUBLE
1636 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1637 && GET_MODE (x) != SFmode)))
68435912 1638 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1639 mmix_output_register_setting (stream,
1640 mmix_output_destination_register,
1641 mmix_intval (x), 0);
1642 return;
1643
1644 case 'U':
1645 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1646 if (TARGET_ZERO_EXTEND)
1647 putc ('U', stream);
1648 return;
1649
1650 case 'v':
1651 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1652 return;
1653
1654 case 'V':
1655 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1656 return;
1657
1658 case 'W':
1659 if (GET_CODE (x) != CONST_INT)
1660 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1661 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1662 return;
1663
1664 case 0:
1665 /* Nothing to do. */
1666 break;
1667
1668 default:
1669 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1670 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1671 }
1672
1673 switch (GET_CODE (modified_x))
1674 {
1675 case REG:
d68ffc6f 1676 regno = REGNO (modified_x);
1677 if (regno >= FIRST_PSEUDO_REGISTER)
1678 internal_error ("MMIX Internal: Bad register: %d", regno);
1679 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1680 return;
1681
1682 case MEM:
1683 output_address (XEXP (modified_x, 0));
1684 return;
1685
1686 case CONST_INT:
1687 /* For -2147483648, mmixal complains that the constant does not fit
1688 in 4 bytes, so let's output it as hex. Take care to handle hosts
1689 where HOST_WIDE_INT is longer than an int.
1690
1691 Print small constants +-255 using decimal. */
1692
1693 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1694 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1695 else
1696 fprintf (stream, "#%x",
1697 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1698 return;
1699
1700 case CONST_DOUBLE:
1701 /* Do somewhat as CONST_INT. */
58356836 1702 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1703 return;
1704
1705 case CONST:
1706 output_addr_const (stream, modified_x);
1707 return;
1708
1709 default:
1710 /* No need to test for all strange things. Let output_addr_const do
1711 it for us. */
1712 if (CONSTANT_P (modified_x)
1713 /* Strangely enough, this is not included in CONSTANT_P.
1714 FIXME: Ask/check about sanity here. */
1715 || GET_CODE (modified_x) == CODE_LABEL)
1716 {
1717 output_addr_const (stream, modified_x);
1718 return;
1719 }
1720
1721 /* We need the original here. */
1722 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1723 }
1724}
1725
7a7fb407 1726/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1727
7a7fb407 1728static bool
1729mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1730{
91009d64 1731 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1732 return code == '+'
1733 /* A '.' is used for the %d in the POP %d,0 return insn. */
1734 || code == '.';
68cbb7e3 1735}
1736
7a7fb407 1737/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1738
7a7fb407 1739static void
7585fcd5 1740mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1741{
1742 if (REG_P (x))
1743 {
1744 /* I find the generated assembly code harder to read without
1745 the ",0". */
d68ffc6f 1746 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1747 return;
1748 }
1749 else if (GET_CODE (x) == PLUS)
1750 {
1751 rtx x1 = XEXP (x, 0);
1752 rtx x2 = XEXP (x, 1);
1753
68cbb7e3 1754 if (REG_P (x1))
1755 {
d68ffc6f 1756 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1757
1758 if (REG_P (x2))
1759 {
d68ffc6f 1760 fprintf (stream, "%s",
1761 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1762 return;
1763 }
f105c84e 1764 else if (satisfies_constraint_I (x2))
68cbb7e3 1765 {
1766 output_addr_const (stream, x2);
1767 return;
1768 }
1769 }
1770 }
1771
ca316360 1772 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1773 {
1774 output_addr_const (stream, x);
1775 return;
1776 }
1777
68cbb7e3 1778 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1779}
1780
1781/* ASM_OUTPUT_REG_PUSH. */
1782
1783void
7585fcd5 1784mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1785{
1786 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1787 reg_names[MMIX_STACK_POINTER_REGNUM],
1788 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1789 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1790 reg_names[MMIX_STACK_POINTER_REGNUM]);
1791}
1792
1793/* ASM_OUTPUT_REG_POP. */
1794
1795void
7585fcd5 1796mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1797{
1798 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1799 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1800 reg_names[MMIX_STACK_POINTER_REGNUM],
1801 reg_names[MMIX_STACK_POINTER_REGNUM]);
1802}
1803
1804/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1805
1806void
7585fcd5 1807mmix_asm_output_addr_diff_elt (FILE *stream,
1808 rtx body ATTRIBUTE_UNUSED,
1809 int value,
1810 int rel)
68cbb7e3 1811{
1812 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1813}
1814
1815/* ASM_OUTPUT_ADDR_VEC_ELT. */
1816
1817void
7585fcd5 1818mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1819{
1820 fprintf (stream, "\tOCTA L:%d\n", value);
1821}
1822
1823/* ASM_OUTPUT_SKIP. */
1824
1825void
7585fcd5 1826mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1827{
1828 fprintf (stream, "\tLOC @+%d\n", nbytes);
1829}
1830
1831/* ASM_OUTPUT_ALIGN. */
1832
1833void
7585fcd5 1834mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1835{
1836 /* We need to record the needed alignment of this section in the object,
1837 so we have to output an alignment directive. Use a .p2align (not
1838 .align) so people will never have to wonder about whether the
1839 argument is in number of bytes or the log2 thereof. We do it in
1840 addition to the LOC directive, so nothing needs tweaking when
1841 copy-pasting assembly into mmixal. */
1842 fprintf (stream, "\t.p2align %d\n", power);
1843 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1844}
1845
1846/* DBX_REGISTER_NUMBER. */
1847
c0dae7df 1848unsigned
1849mmix_dbx_register_number (unsigned regno)
68cbb7e3 1850{
d68ffc6f 1851 /* Adjust the register number to the one it will be output as, dammit.
1852 It'd be nice if we could check the assumption that we're filling a
1853 gap, but every register between the last saved register and parameter
1854 registers might be a valid parameter register. */
1855 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1856
1857 /* We need to renumber registers to get the number of the return address
1858 register in the range 0..255. It is also space-saving if registers
1859 mentioned in the call-frame information (which uses this function by
1860 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1861 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1862 return regno >= 224 ? (regno - 224) : (regno + 48);
1863}
1864
35a3065a 1865/* End of target macro support functions.
68cbb7e3 1866
7585fcd5 1867 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1868
d3310704 1869/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1870 from insn-emit.c. */
1871
1872rtx
7585fcd5 1873mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1874{
1875 return get_hard_reg_initial_val (mode, regno);
1876}
1877
e911aedf 1878/* Nonzero when the function epilogue is simple enough that a single
d3310704 1879 "POP %d,0" should be used even within the function. */
0b123c47 1880
1881int
7585fcd5 1882mmix_use_simple_return (void)
0b123c47 1883{
1884 int regno;
1885
1886 int stack_space_to_allocate
abe32cce 1887 = (crtl->outgoing_args_size
1888 + crtl->args.pretend_args_size
0b123c47 1889 + get_frame_size () + 7) & ~7;
1890
1891 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1892 return 0;
1893
1894 for (regno = 255;
1895 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1896 regno--)
1897 /* Note that we assume that the frame-pointer-register is one of these
1898 registers, in which case we don't count it here. */
1899 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1900 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1901 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1902 return 0;
1903
1904 if (frame_pointer_needed)
1905 stack_space_to_allocate += 8;
1906
1907 if (MMIX_CFUN_HAS_LANDING_PAD)
1908 stack_space_to_allocate += 16;
1909 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1910 stack_space_to_allocate += 8;
1911
1912 return stack_space_to_allocate == 0;
1913}
1914
d3310704 1915
1916/* Expands the function prologue into RTX. */
1917
1918void
7585fcd5 1919mmix_expand_prologue (void)
d3310704 1920{
1921 HOST_WIDE_INT locals_size = get_frame_size ();
1922 int regno;
1923 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1924 = (crtl->outgoing_args_size
1925 + crtl->args.pretend_args_size
d3310704 1926 + locals_size + 7) & ~7;
1927 HOST_WIDE_INT offset = -8;
1928
1929 /* Add room needed to save global non-register-stack registers. */
1930 for (regno = 255;
1931 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1932 regno--)
1933 /* Note that we assume that the frame-pointer-register is one of these
1934 registers, in which case we don't count it here. */
1935 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1936 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1937 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1938 stack_space_to_allocate += 8;
1939
1940 /* If we do have a frame-pointer, add room for it. */
1941 if (frame_pointer_needed)
1942 stack_space_to_allocate += 8;
1943
1944 /* If we have a non-local label, we need to be able to unwind to it, so
1945 store the current register stack pointer. Also store the return
1946 address if we do that. */
1947 if (MMIX_CFUN_HAS_LANDING_PAD)
1948 stack_space_to_allocate += 16;
1949 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1950 /* If we do have a saved return-address slot, add room for it. */
1951 stack_space_to_allocate += 8;
1952
1953 /* Make sure we don't get an unaligned stack. */
1954 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1955 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1956 stack_space_to_allocate);
1957
abe32cce 1958 if (crtl->args.pretend_args_size)
d3310704 1959 {
1960 int mmix_first_vararg_reg
1961 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1962 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 1963 - crtl->args.pretend_args_size / 8));
d3310704 1964
1965 for (regno
1966 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1967 regno >= mmix_first_vararg_reg;
1968 regno--)
1969 {
1970 if (offset < 0)
1971 {
1972 HOST_WIDE_INT stack_chunk
1973 = stack_space_to_allocate > (256 - 8)
1974 ? (256 - 8) : stack_space_to_allocate;
1975
1976 mmix_emit_sp_add (-stack_chunk);
1977 offset += stack_chunk;
1978 stack_space_to_allocate -= stack_chunk;
1979 }
1980
1981 /* These registers aren't actually saved (as in "will be
1982 restored"), so don't tell DWARF2 they're saved. */
1983 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 1984 plus_constant (Pmode, stack_pointer_rtx,
d3310704 1985 offset)),
1986 gen_rtx_REG (DImode, regno));
1987 offset -= 8;
1988 }
1989 }
1990
1991 /* Store the frame-pointer. */
1992
1993 if (frame_pointer_needed)
1994 {
1995 rtx insn;
1996
1997 if (offset < 0)
1998 {
1999 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2000 HOST_WIDE_INT stack_chunk
2001 = stack_space_to_allocate > (256 - 8 - 8)
2002 ? (256 - 8 - 8) : stack_space_to_allocate;
2003
2004 mmix_emit_sp_add (-stack_chunk);
2005
2006 offset += stack_chunk;
2007 stack_space_to_allocate -= stack_chunk;
2008 }
2009
2010 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2011 plus_constant (Pmode,
2012 stack_pointer_rtx,
d3310704 2013 offset)),
2014 hard_frame_pointer_rtx);
2015 RTX_FRAME_RELATED_P (insn) = 1;
2016 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2017 stack_pointer_rtx,
2018 GEN_INT (offset + 8)));
2019 RTX_FRAME_RELATED_P (insn) = 1;
2020 offset -= 8;
2021 }
2022
2023 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2024 {
2025 rtx tmpreg, retreg;
2026 rtx insn;
2027
2028 /* Store the return-address, if one is needed on the stack. We
2029 usually store it in a register when needed, but that doesn't work
2030 with -fexceptions. */
2031
2032 if (offset < 0)
2033 {
2034 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2035 HOST_WIDE_INT stack_chunk
2036 = stack_space_to_allocate > (256 - 8 - 8)
2037 ? (256 - 8 - 8) : stack_space_to_allocate;
2038
2039 mmix_emit_sp_add (-stack_chunk);
2040
2041 offset += stack_chunk;
2042 stack_space_to_allocate -= stack_chunk;
2043 }
2044
2045 tmpreg = gen_rtx_REG (DImode, 255);
2046 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2047
2048 /* Dwarf2 code is confused by the use of a temporary register for
2049 storing the return address, so we have to express it as a note,
2050 which we attach to the actual store insn. */
2051 emit_move_insn (tmpreg, retreg);
2052
2053 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2054 plus_constant (Pmode,
2055 stack_pointer_rtx,
d3310704 2056 offset)),
2057 tmpreg);
2058 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2059 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
2060 gen_rtx_SET (VOIDmode,
2061 gen_rtx_MEM (DImode,
29c05e22 2062 plus_constant (Pmode,
2063 stack_pointer_rtx,
c0dae7df 2064 offset)),
2065 retreg));
d3310704 2066
2067 offset -= 8;
2068 }
2069 else if (MMIX_CFUN_HAS_LANDING_PAD)
2070 offset -= 8;
2071
2072 if (MMIX_CFUN_HAS_LANDING_PAD)
2073 {
2074 /* Store the register defining the numbering of local registers, so
2075 we know how long to unwind the register stack. */
2076
2077 if (offset < 0)
2078 {
2079 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2080 HOST_WIDE_INT stack_chunk
2081 = stack_space_to_allocate > (256 - 8 - 8)
2082 ? (256 - 8 - 8) : stack_space_to_allocate;
2083
2084 mmix_emit_sp_add (-stack_chunk);
2085
2086 offset += stack_chunk;
2087 stack_space_to_allocate -= stack_chunk;
2088 }
2089
2090 /* We don't tell dwarf2 about this one; we just have it to unwind
2091 the register stack at landing pads. FIXME: It's a kludge because
2092 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2093 register stack at the moment. Best thing would be to handle it
2094 like stack-pointer offsets. Better: some hook into dwarf2out.c
2095 to produce DW_CFA_expression:s that specify the increment of rO,
2096 and unwind it at eh_return (preferred) or at the landing pad.
2097 Then saves to $0..$G-1 could be specified through that register. */
2098
2099 emit_move_insn (gen_rtx_REG (DImode, 255),
2100 gen_rtx_REG (DImode,
2101 MMIX_rO_REGNUM));
2102 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2103 plus_constant (Pmode, stack_pointer_rtx,
2104 offset)),
d3310704 2105 gen_rtx_REG (DImode, 255));
2106 offset -= 8;
2107 }
2108
2109 /* After the return-address and the frame-pointer, we have the local
2110 variables. They're the ones that may have an "unaligned" size. */
2111 offset -= (locals_size + 7) & ~7;
2112
2113 /* Now store all registers that are global, i.e. not saved by the
2114 register file machinery.
2115
2116 It is assumed that the frame-pointer is one of these registers, so it
2117 is explicitly excluded in the count. */
2118
2119 for (regno = 255;
2120 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2121 regno--)
2122 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2123 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2124 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2125 {
2126 rtx insn;
2127
2128 if (offset < 0)
2129 {
2130 HOST_WIDE_INT stack_chunk
2131 = (stack_space_to_allocate > (256 - offset - 8)
2132 ? (256 - offset - 8) : stack_space_to_allocate);
2133
2134 mmix_emit_sp_add (-stack_chunk);
2135 offset += stack_chunk;
2136 stack_space_to_allocate -= stack_chunk;
2137 }
2138
2139 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2140 plus_constant (Pmode,
2141 stack_pointer_rtx,
d3310704 2142 offset)),
2143 gen_rtx_REG (DImode, regno));
2144 RTX_FRAME_RELATED_P (insn) = 1;
2145 offset -= 8;
2146 }
2147
2148 /* Finally, allocate room for outgoing args and local vars if room
2149 wasn't allocated above. */
2150 if (stack_space_to_allocate)
2151 mmix_emit_sp_add (-stack_space_to_allocate);
2152}
2153
2154/* Expands the function epilogue into RTX. */
2155
2156void
7585fcd5 2157mmix_expand_epilogue (void)
d3310704 2158{
2159 HOST_WIDE_INT locals_size = get_frame_size ();
2160 int regno;
2161 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2162 = (crtl->outgoing_args_size
2163 + crtl->args.pretend_args_size
d3310704 2164 + locals_size + 7) & ~7;
2165
d3310704 2166 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2167 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2168
2169 /* Add the space for global non-register-stack registers.
2170 It is assumed that the frame-pointer register can be one of these
2171 registers, in which case it is excluded from the count when needed. */
2172 for (regno = 255;
2173 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2174 regno--)
2175 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2176 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2177 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2178 stack_space_to_deallocate += 8;
2179
2180 /* Add in the space for register stack-pointer. If so, always add room
2181 for the saved PC. */
2182 if (MMIX_CFUN_HAS_LANDING_PAD)
2183 stack_space_to_deallocate += 16;
2184 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2185 /* If we have a saved return-address slot, add it in. */
2186 stack_space_to_deallocate += 8;
2187
2188 /* Add in the frame-pointer. */
2189 if (frame_pointer_needed)
2190 stack_space_to_deallocate += 8;
2191
2192 /* Make sure we don't get an unaligned stack. */
2193 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2194 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2195 stack_space_to_deallocate);
2196
2197 /* We will add back small offsets to the stack pointer as we go.
2198 First, we restore all registers that are global, i.e. not saved by
2199 the register file machinery. */
2200
2201 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2202 regno <= 255;
2203 regno++)
2204 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2205 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2206 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2207 {
2208 if (offset > 255)
2209 {
2210 mmix_emit_sp_add (offset);
2211 stack_space_to_deallocate -= offset;
2212 offset = 0;
2213 }
2214
2215 emit_move_insn (gen_rtx_REG (DImode, regno),
2216 gen_rtx_MEM (DImode,
29c05e22 2217 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2218 offset)));
2219 offset += 8;
2220 }
2221
2222 /* Here is where the local variables were. As in the prologue, they
2223 might be of an unaligned size. */
2224 offset += (locals_size + 7) & ~7;
2225
d3310704 2226 /* The saved register stack pointer is just below the frame-pointer
2227 register. We don't need to restore it "manually"; the POP
2228 instruction does that. */
2229 if (MMIX_CFUN_HAS_LANDING_PAD)
2230 offset += 16;
2231 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2232 /* The return-address slot is just below the frame-pointer register.
2233 We don't need to restore it because we don't really use it. */
2234 offset += 8;
2235
2236 /* Get back the old frame-pointer-value. */
2237 if (frame_pointer_needed)
2238 {
2239 if (offset > 255)
2240 {
2241 mmix_emit_sp_add (offset);
2242
2243 stack_space_to_deallocate -= offset;
2244 offset = 0;
2245 }
2246
2247 emit_move_insn (hard_frame_pointer_rtx,
2248 gen_rtx_MEM (DImode,
29c05e22 2249 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2250 offset)));
2251 offset += 8;
2252 }
2253
2254 /* We do not need to restore pretended incoming args, just add back
2255 offset to sp. */
2256 if (stack_space_to_deallocate != 0)
2257 mmix_emit_sp_add (stack_space_to_deallocate);
2258
18d50ae6 2259 if (crtl->calls_eh_return)
d3310704 2260 /* Adjust the (normal) stack-pointer to that of the receiver.
2261 FIXME: It would be nice if we could also adjust the register stack
2262 here, but we need to express it through DWARF 2 too. */
2263 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2264 gen_rtx_REG (DImode,
2265 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2266}
2267
68cbb7e3 2268/* Output an optimal sequence for setting a register to a specific
2269 constant. Used in an alternative for const_ints in movdi, and when
2270 using large stack-frame offsets.
2271
2272 Use do_begin_end to say if a line-starting TAB and newline before the
2273 first insn and after the last insn is wanted. */
2274
2275void
7585fcd5 2276mmix_output_register_setting (FILE *stream,
2277 int regno,
2278 HOST_WIDEST_INT value,
2279 int do_begin_end)
68cbb7e3 2280{
2281 if (do_begin_end)
2282 fprintf (stream, "\t");
2283
2284 if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
2285 {
2286 /* First, the one-insn cases. */
2287 mmix_output_shiftvalue_op_from_str (stream, "SET",
2288 (unsigned HOST_WIDEST_INT)
2289 value);
2290 fprintf (stream, " %s,", reg_names[regno]);
2291 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2292 }
2293 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2294 {
2295 /* We do this to get a bit more legible assembly code. The next
2296 alternative is mostly redundant with this. */
2297
2298 mmix_output_shiftvalue_op_from_str (stream, "SET",
2299 -(unsigned HOST_WIDEST_INT)
2300 value);
2301 fprintf (stream, " %s,", reg_names[regno]);
2302 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2303 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2304 reg_names[regno]);
2305 }
2306 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2307 {
2308 /* Slightly more expensive, the two-insn cases. */
2309
2310 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2311 is shiftable, or any other one-insn transformation of the value.
2312 FIXME: Check first if the value is "shiftable" by two loading
2313 with two insns, since it makes more readable assembly code (if
2314 anyone else cares). */
2315
2316 mmix_output_shiftvalue_op_from_str (stream, "SET",
2317 ~(unsigned HOST_WIDEST_INT)
2318 value);
2319 fprintf (stream, " %s,", reg_names[regno]);
2320 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2321 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2322 reg_names[regno]);
2323 }
2324 else
2325 {
2326 /* The generic case. 2..4 insns. */
25037517 2327 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2328 const char *op = "SET";
2329 const char *line_begin = "";
f0b228a5 2330 int insns = 0;
68cbb7e3 2331 int i;
f0b228a5 2332 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2333
f0b228a5 2334 /* Compute the number of insns needed to output this constant. */
2335 for (i = 0; i < 4 && tmpvalue != 0; i++)
2336 {
2337 if (tmpvalue & 65535)
2338 insns++;
2339 tmpvalue >>= 16;
2340 }
2341 if (TARGET_BASE_ADDRESSES && insns == 3)
2342 {
2343 /* The number three is based on a static observation on
2344 ghostscript-6.52. Two and four are excluded because there
2345 are too many such constants, and each unique constant (maybe
2346 offset by 1..255) were used few times compared to other uses,
2347 e.g. addresses.
2348
2349 We use base-plus-offset addressing to force it into a global
2350 register; we just use a "LDA reg,VALUE", which will cause the
2351 assembler and linker to DTRT (for constants as well as
2352 addresses). */
2353 fprintf (stream, "LDA %s,", reg_names[regno]);
2354 mmix_output_octa (stream, value, 0);
2355 }
2356 else
68cbb7e3 2357 {
f0b228a5 2358 /* Output pertinent parts of the 4-wyde sequence.
2359 Still more to do if we want this to be optimal, but hey...
2360 Note that the zero case has been handled above. */
2361 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2362 {
f0b228a5 2363 if (value & 65535)
2364 {
2365 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2366 higher_parts[i], reg_names[regno],
2367 (int) (value & 65535));
2368 /* The first one sets the rest of the bits to 0, the next
2369 ones add set bits. */
2370 op = "INC";
2371 line_begin = "\n\t";
2372 }
68cbb7e3 2373
f0b228a5 2374 value >>= 16;
2375 }
68cbb7e3 2376 }
2377 }
2378
2379 if (do_begin_end)
2380 fprintf (stream, "\n");
2381}
2382
2383/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2384 else return 0. */
2385
2386int
7585fcd5 2387mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2388{
2389 /* Shift by 16 bits per group, stop when we've found two groups with
2390 nonzero bits. */
2391 int i;
2392 int has_candidate = 0;
2393
2394 for (i = 0; i < 4; i++)
2395 {
2396 if (value & 65535)
2397 {
2398 if (has_candidate)
2399 return 0;
2400 else
2401 has_candidate = 1;
2402 }
2403
2404 value >>= 16;
2405 }
2406
2407 return 1;
2408}
2409
74f4459c 2410/* X and Y are two things to compare using CODE. Return the rtx for
2411 the cc-reg in the proper mode. */
68cbb7e3 2412
2413rtx
7585fcd5 2414mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2415{
2416 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2417 return gen_reg_rtx (ccmode);
68cbb7e3 2418}
2419
2420/* Local (static) helper functions. */
2421
d3310704 2422static void
7585fcd5 2423mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2424{
2425 rtx insn;
2426
2427 if (offset < 0)
2428 {
2429 /* Negative stack-pointer adjustments are allocations and appear in
2430 the prologue only. We mark them as frame-related so unwind and
2431 debug info is properly emitted for them. */
2432 if (offset > -255)
2433 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2434 stack_pointer_rtx,
2435 GEN_INT (offset)));
2436 else
2437 {
2438 rtx tmpr = gen_rtx_REG (DImode, 255);
2439 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2440 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2441 stack_pointer_rtx, tmpr));
2442 }
2443 RTX_FRAME_RELATED_P (insn) = 1;
2444 }
2445 else
2446 {
2447 /* Positive adjustments are in the epilogue only. Don't mark them
2448 as "frame-related" for unwind info. */
f105c84e 2449 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
d3310704 2450 emit_insn (gen_adddi3 (stack_pointer_rtx,
2451 stack_pointer_rtx,
2452 GEN_INT (offset)));
2453 else
2454 {
2455 rtx tmpr = gen_rtx_REG (DImode, 255);
2456 emit_move_insn (tmpr, GEN_INT (offset));
2457 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2458 stack_pointer_rtx, tmpr));
2459 }
2460 }
2461}
2462
68cbb7e3 2463/* Print operator suitable for doing something with a shiftable
ebb11c7b 2464 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2465
2466static void
7585fcd5 2467mmix_output_shiftvalue_op_from_str (FILE *stream,
2468 const char *mainop,
2469 HOST_WIDEST_INT value)
68cbb7e3 2470{
25037517 2471 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2472 int i;
2473
2474 if (! mmix_shiftable_wyde_value (value))
2475 {
2476 char s[sizeof ("0xffffffffffffffff")];
2477 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2478 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2479 }
2480
2481 for (i = 0; i < 4; i++)
2482 {
2483 /* We know we're through when we find one-bits in the low
2484 16 bits. */
2485 if (value & 0xffff)
2486 {
2487 fprintf (stream, "%s%s", mainop, op_part[i]);
2488 return;
2489 }
2490 value >>= 16;
2491 }
2492
2493 /* No bits set? Then it must have been zero. */
2494 fprintf (stream, "%sL", mainop);
2495}
2496
2497/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2498
2499static void
7585fcd5 2500mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2501{
2502 /* Snipped from final.c:output_addr_const. We need to avoid the
2503 presumed universal "0x" prefix. We can do it by replacing "0x" with
2504 "#0" here; we must avoid a space in the operands and no, the zero
2505 won't cause the number to be assumed in octal format. */
2506 char hex_format[sizeof (HOST_WIDEST_INT_PRINT_HEX)];
2507
2508 if (do_begin_end)
2509 fprintf (stream, "\tOCTA ");
2510
2511 strcpy (hex_format, HOST_WIDEST_INT_PRINT_HEX);
2512 hex_format[0] = '#';
2513 hex_format[1] = '0';
2514
2515 /* Provide a few alternative output formats depending on the number, to
2516 improve legibility of assembler output. */
2517 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2518 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2519 fprintf (stream, "%d", (int) value);
2520 else if (value > (HOST_WIDEST_INT) 0
2521 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2522 fprintf (stream, "#%x", (unsigned int) value);
2523 else
2524 fprintf (stream, hex_format, value);
2525
2526 if (do_begin_end)
2527 fprintf (stream, "\n");
2528}
2529
2530/* Print the presumed shiftable wyde argument shifted into place (to
2531 be output with an operand). */
2532
2533static void
7585fcd5 2534mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2535{
2536 int i;
2537
2538 if (! mmix_shiftable_wyde_value (value))
2539 {
2540 char s[16+2+1];
2541 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2542 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2543 }
2544
2545 for (i = 0; i < 4; i++)
68cbb7e3 2546 {
7585fcd5 2547 /* We know we're through when we find one-bits in the low 16 bits. */
2548 if (value & 0xffff)
2549 {
2550 fprintf (stream, "#%x", (int) (value & 0xffff));
2551 return;
2552 }
68cbb7e3 2553
2554 value >>= 16;
2555 }
2556
2557 /* No bits set? Then it must have been zero. */
2558 fprintf (stream, "0");
2559}
2560
2561/* Output an MMIX condition name corresponding to an operator
2562 and operands:
2563 (comparison_operator [(comparison_operator ...) (const_int 0)])
2564 which means we have to look at *two* operators.
2565
2566 The argument "reversed" refers to reversal of the condition (not the
2567 same as swapping the arguments). */
2568
2569static void
7a7fb407 2570mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2571{
2572 struct cc_conv
2573 {
2574 RTX_CODE cc;
2575
2576 /* The normal output cc-code. */
2577 const char *const normal;
2578
2579 /* The reversed cc-code, or NULL if invalid. */
2580 const char *const reversed;
2581 };
2582
2583 struct cc_type_conv
2584 {
2585 enum machine_mode cc_mode;
2586
21f1e711 2587 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2588 const struct cc_conv *const convs;
2589 };
2590
2591#undef CCEND
21f1e711 2592#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2593
2594 static const struct cc_conv cc_fun_convs[]
2595 = {{ORDERED, "Z", "P"},
2596 {UNORDERED, "P", "Z"},
2597 CCEND};
2598 static const struct cc_conv cc_fp_convs[]
2599 = {{GT, "P", NULL},
2600 {LT, "N", NULL},
2601 CCEND};
2602 static const struct cc_conv cc_fpeq_convs[]
2603 = {{NE, "Z", "P"},
2604 {EQ, "P", "Z"},
2605 CCEND};
2606 static const struct cc_conv cc_uns_convs[]
2607 = {{GEU, "NN", "N"},
2608 {GTU, "P", "NP"},
2609 {LEU, "NP", "P"},
2610 {LTU, "N", "NN"},
2611 CCEND};
2612 static const struct cc_conv cc_signed_convs[]
2613 = {{NE, "NZ", "Z"},
2614 {EQ, "Z", "NZ"},
2615 {GE, "NN", "N"},
2616 {GT, "P", "NP"},
2617 {LE, "NP", "P"},
2618 {LT, "N", "NN"},
2619 CCEND};
2620 static const struct cc_conv cc_di_convs[]
2621 = {{NE, "NZ", "Z"},
2622 {EQ, "Z", "NZ"},
2623 {GE, "NN", "N"},
2624 {GT, "P", "NP"},
2625 {LE, "NP", "P"},
2626 {LT, "N", "NN"},
2627 {GTU, "NZ", "Z"},
2628 {LEU, "Z", "NZ"},
2629 CCEND};
2630#undef CCEND
2631
2632 static const struct cc_type_conv cc_convs[]
2633 = {{CC_FUNmode, cc_fun_convs},
2634 {CC_FPmode, cc_fp_convs},
2635 {CC_FPEQmode, cc_fpeq_convs},
2636 {CC_UNSmode, cc_uns_convs},
2637 {CCmode, cc_signed_convs},
2638 {DImode, cc_di_convs}};
2639
3585dac7 2640 size_t i;
68cbb7e3 2641 int j;
2642
2643 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2644 RTX_CODE cc = GET_CODE (x);
2645
3585dac7 2646 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2647 {
2648 if (mode == cc_convs[i].cc_mode)
2649 {
21f1e711 2650 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2651 if (cc == cc_convs[i].convs[j].cc)
2652 {
2653 const char *mmix_cc
2654 = (reversed ? cc_convs[i].convs[j].reversed
2655 : cc_convs[i].convs[j].normal);
2656
2657 if (mmix_cc == NULL)
2658 fatal_insn ("MMIX Internal: Trying to output invalidly\
2659 reversed condition:", x);
2660
2661 fprintf (stream, "%s", mmix_cc);
2662 return;
2663 }
2664
2665 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2666 }
2667 }
2668
2669 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2670}
2671
2672/* Return the bit-value for a const_int or const_double. */
2673
f105c84e 2674HOST_WIDEST_INT
7a7fb407 2675mmix_intval (const_rtx x)
68cbb7e3 2676{
2677 unsigned HOST_WIDEST_INT retval;
2678
2679 if (GET_CODE (x) == CONST_INT)
2680 return INTVAL (x);
2681
2682 /* We make a little song and dance because converting to long long in
2683 gcc-2.7.2 is broken. I still want people to be able to use it for
2684 cross-compilation to MMIX. */
2685 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2686 {
2687 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2688 {
2689 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2690 retval *= 2;
2691 retval |= CONST_DOUBLE_LOW (x) & 1;
2692
2693 retval |=
2694 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
f5b2b469 2695 << (HOST_BITS_PER_LONG)/2 << (HOST_BITS_PER_LONG)/2;
68cbb7e3 2696 }
2697 else
2698 retval = CONST_DOUBLE_HIGH (x);
2699
2700 return retval;
2701 }
2702
2703 if (GET_CODE (x) == CONST_DOUBLE)
2704 {
2705 REAL_VALUE_TYPE value;
2706
2707 /* FIXME: This macro is not in the manual but should be. */
2708 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2709
2710 if (GET_MODE (x) == DFmode)
2711 {
2712 long bits[2];
dc8dc4ce 2713
68cbb7e3 2714 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2715
ca2399d9 2716 /* The double cast is necessary to avoid getting the long
2717 sign-extended to unsigned long long(!) when they're of
2718 different size (usually 32-bit hosts). */
2719 return
2720 ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0]
2721 << (unsigned HOST_WIDEST_INT) 32U)
2722 | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1];
68cbb7e3 2723 }
2724 else if (GET_MODE (x) == SFmode)
2725 {
2726 long bits;
2727 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2728
2729 return (unsigned long) bits;
2730 }
2731 }
2732
2733 fatal_insn ("MMIX Internal: This is not a constant:", x);
2734}
2735
3b2411a8 2736/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2737
2738enum machine_mode
2739mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
2740 enum machine_mode mode,
2741 int *punsignedp ATTRIBUTE_UNUSED,
2742 const_tree fntype ATTRIBUTE_UNUSED,
2743 int for_return)
2744{
2745 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2746 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2747 if (for_return == 1)
3b2411a8 2748 return mode;
2749
2750 /* Promotion of modes currently generates slow code, extending before
2751 operation, so we do it only for arguments. */
2752 if (GET_MODE_CLASS (mode) == MODE_INT
2753 && GET_MODE_SIZE (mode) < 8)
2754 return DImode;
2755 else
2756 return mode;
2757}
9e4a734a 2758/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2759
2760static rtx
2761mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2762 int incoming ATTRIBUTE_UNUSED)
2763{
2764 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2765}
2766
5a1c68c3 2767/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2768
2769 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2770 of it; we can deduce the value. */
2771
2772bool
2773mmix_frame_pointer_required (void)
2774{
2775 return (cfun->has_nonlocal_label);
2776}
2777
68cbb7e3 2778/*
2779 * Local variables:
2780 * eval: (c-set-style "gnu")
2781 * indent-tabs-mode: t
2782 * End:
2783 */