]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/mmix/mmix.c
2012-09-05 Tobias Burnus <burnus@net-b.de>
[thirdparty/gcc.git] / gcc / config / mmix / mmix.c
CommitLineData
68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
b600778c 2 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
39cba157 3 2010, 2011
978b9403 4 Free Software Foundation, Inc.
68cbb7e3 5 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
6
581084df 7This file is part of GCC.
68cbb7e3 8
581084df 9GCC is free software; you can redistribute it and/or modify
68cbb7e3 10it under the terms of the GNU General Public License as published by
038d1e19 11the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 12any later version.
13
581084df 14GCC is distributed in the hope that it will be useful,
68cbb7e3 15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
038d1e19 20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
68cbb7e3 22
23#include "config.h"
24#include "system.h"
805e22b2 25#include "coretypes.h"
26#include "tm.h"
68cbb7e3 27#include "rtl.h"
28#include "regs.h"
29#include "hard-reg-set.h"
30#include "hashtab.h"
31#include "insn-config.h"
32#include "output.h"
1998fe39 33#include "basic-block.h"
68cbb7e3 34#include "flags.h"
35#include "tree.h"
36#include "function.h"
37#include "expr.h"
0b205f4c 38#include "diagnostic-core.h"
68cbb7e3 39#include "recog.h"
40#include "ggc.h"
bde36f4a 41#include "dwarf2.h"
68cbb7e3 42#include "debug.h"
43#include "tm_p.h"
68cbb7e3 44#include "target.h"
45#include "target-def.h"
c0dae7df 46#include "df.h"
68cbb7e3 47
48/* First some local helper definitions. */
49#define MMIX_FIRST_GLOBAL_REGNUM 32
50
51/* We'd need a current_function_has_landing_pad. It's marked as such when
52 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
53 mostly. */
54#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
55
56/* We have no means to tell DWARF 2 about the register stack, so we need
57 to store the return address on the stack if an exception can get into
d3310704 58 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 59 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 60 after reload_completed; it may contain incorrect information some time
61 before that. Within a RTL sequence (after a call to start_sequence,
62 such as in RTL expanders), leaf_function_p doesn't see all insns
63 (perhaps any insn). But regs_ever_live is up-to-date when
64 leaf_function_p () isn't, so we "or" them together to get accurate
65 information. FIXME: Some tweak to leaf_function_p might be
f024691d 66 preferable. */
d3310704 67#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
68 (flag_exceptions \
3072d30e 69 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 70 || !leaf_function_p ()))
68cbb7e3 71
72#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 73 (crtl->calls_eh_return \
68cbb7e3 74 && (EH_RETURN_DATA_REGNO (0) == REGNO \
75 || EH_RETURN_DATA_REGNO (1) == REGNO \
76 || EH_RETURN_DATA_REGNO (2) == REGNO \
77 || EH_RETURN_DATA_REGNO (3) == REGNO))
78
d68ffc6f 79/* For the default ABI, we rename registers at output-time to fill the gap
80 between the (statically partitioned) saved registers and call-clobbered
81 registers. In effect this makes unused call-saved registers to be used
82 as call-clobbered registers. The benefit comes from keeping the number
83 of local registers (value of rL) low, since there's a cost of
d3310704 84 increasing rL and clearing unused (unset) registers with lower numbers.
85 Don't translate while outputting the prologue. */
d68ffc6f 86#define MMIX_OUTPUT_REGNO(N) \
87 (TARGET_ABI_GNU \
0b123c47 88 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
89 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 90 || cfun == NULL \
91 || cfun->machine == NULL \
92 || cfun->machine->in_prologue \
d68ffc6f 93 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
94 + cfun->machine->highest_saved_stack_register + 1))
95
0b123c47 96/* The %d in "POP %d,0". */
97#define MMIX_POP_ARGUMENT() \
98 ((! TARGET_ABI_GNU \
abe32cce 99 && crtl->return_rtx != NULL \
18d50ae6 100 && ! cfun->returns_struct) \
abe32cce 101 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
102 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 103 : 0)
104
68cbb7e3 105/* The canonical saved comparison operands for non-cc0 machines, set in
106 the compare expander. */
107rtx mmix_compare_op0;
108rtx mmix_compare_op1;
109
68cbb7e3 110/* Declarations of locals. */
111
68cbb7e3 112/* Intermediate for insn output. */
113static int mmix_output_destination_register;
114
4c834714 115static void mmix_option_override (void);
40fe393f 116static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 117static void mmix_output_shiftvalue_op_from_str
7585fcd5 118 (FILE *, const char *, HOST_WIDEST_INT);
119static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
7a7fb407 120static void mmix_output_condition (FILE *, const_rtx, int);
121static HOST_WIDEST_INT mmix_intval (const_rtx);
7585fcd5 122static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
123static bool mmix_assemble_integer (rtx, unsigned int, int);
124static struct machine_function *mmix_init_machine_status (void);
125static void mmix_encode_section_info (tree, rtx, int);
126static const char *mmix_strip_name_encoding (const char *);
127static void mmix_emit_sp_add (HOST_WIDE_INT offset);
128static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
129static void mmix_target_asm_function_end_prologue (FILE *);
130static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
27925877 131static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
132static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
fd50b071 133static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool);
ca316360 134static bool mmix_legitimate_constant_p (enum machine_mode, rtx);
7585fcd5 135static void mmix_reorg (void);
6988553d 136static void mmix_asm_output_mi_thunk
7585fcd5 137 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 138static void mmix_setup_incoming_varargs
39cba157 139 (cumulative_args_t, enum machine_mode, tree, int *, int);
7585fcd5 140static void mmix_file_start (void);
141static void mmix_file_end (void);
20d892d1 142static bool mmix_rtx_costs (rtx, int, int, int, int *, bool);
f7e13ca6 143static int mmix_register_move_cost (enum machine_mode,
144 reg_class_t, reg_class_t);
9e4a734a 145static rtx mmix_struct_value_rtx (tree, int);
3b2411a8 146static enum machine_mode mmix_promote_function_mode (const_tree,
147 enum machine_mode,
148 int *, const_tree, int);
39cba157 149static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode,
5d246ebf 150 const_tree, bool);
39cba157 151static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode,
5d246ebf 152 const_tree, bool, bool);
39cba157 153static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode,
5d246ebf 154 const_tree, bool);
39cba157 155static rtx mmix_function_arg (cumulative_args_t, enum machine_mode,
5d246ebf 156 const_tree, bool);
b600778c 157static rtx mmix_function_value (const_tree, const_tree, bool);
158static rtx mmix_libcall_value (enum machine_mode, const_rtx);
159static bool mmix_function_value_regno_p (const unsigned int);
39cba157 160static bool mmix_pass_by_reference (cumulative_args_t,
fb80456a 161 enum machine_mode, const_tree, bool);
5a1c68c3 162static bool mmix_frame_pointer_required (void);
604d844a 163static void mmix_asm_trampoline_template (FILE *);
164static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 165static void mmix_print_operand (FILE *, rtx, int);
166static void mmix_print_operand_address (FILE *, rtx);
167static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 168static void mmix_conditional_register_usage (void);
68cbb7e3 169
170/* Target structure macros. Listed by node. See `Using and Porting GCC'
171 for a general description. */
172
173/* Node: Function Entry */
174
58356836 175#undef TARGET_ASM_BYTE_OP
176#define TARGET_ASM_BYTE_OP NULL
177#undef TARGET_ASM_ALIGNED_HI_OP
178#define TARGET_ASM_ALIGNED_HI_OP NULL
179#undef TARGET_ASM_ALIGNED_SI_OP
180#define TARGET_ASM_ALIGNED_SI_OP NULL
181#undef TARGET_ASM_ALIGNED_DI_OP
182#define TARGET_ASM_ALIGNED_DI_OP NULL
183#undef TARGET_ASM_INTEGER
184#define TARGET_ASM_INTEGER mmix_assemble_integer
185
68cbb7e3 186#undef TARGET_ASM_FUNCTION_PROLOGUE
187#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
188
d3310704 189#undef TARGET_ASM_FUNCTION_END_PROLOGUE
190#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
191
68cbb7e3 192#undef TARGET_ASM_FUNCTION_EPILOGUE
193#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
194
7a7fb407 195#undef TARGET_PRINT_OPERAND
196#define TARGET_PRINT_OPERAND mmix_print_operand
197#undef TARGET_PRINT_OPERAND_ADDRESS
198#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
199#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
200#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
201
7811991d 202#undef TARGET_ENCODE_SECTION_INFO
203#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 204#undef TARGET_STRIP_NAME_ENCODING
205#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 206
6988553d 207#undef TARGET_ASM_OUTPUT_MI_THUNK
208#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 209#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
210#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 211#undef TARGET_ASM_FILE_START
212#define TARGET_ASM_FILE_START mmix_file_start
213#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
214#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 215#undef TARGET_ASM_FILE_END
216#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 217#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
218#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 219
b2d7ede1 220#undef TARGET_CONDITIONAL_REGISTER_USAGE
221#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
222
fab7adbf 223#undef TARGET_RTX_COSTS
224#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 225#undef TARGET_ADDRESS_COST
f529eb25 226#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
fab7adbf 227
f7e13ca6 228#undef TARGET_REGISTER_MOVE_COST
229#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
230
2efea8c0 231#undef TARGET_MACHINE_DEPENDENT_REORG
232#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
233
3b2411a8 234#undef TARGET_PROMOTE_FUNCTION_MODE
235#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
236
b600778c 237#undef TARGET_FUNCTION_VALUE
238#define TARGET_FUNCTION_VALUE mmix_function_value
239#undef TARGET_LIBCALL_VALUE
240#define TARGET_LIBCALL_VALUE mmix_libcall_value
241#undef TARGET_FUNCTION_VALUE_REGNO_P
242#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 243
5d246ebf 244#undef TARGET_FUNCTION_ARG
245#define TARGET_FUNCTION_ARG mmix_function_arg
246#undef TARGET_FUNCTION_INCOMING_ARG
247#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
248#undef TARGET_FUNCTION_ARG_ADVANCE
249#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 250#undef TARGET_STRUCT_VALUE_RTX
251#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 252#undef TARGET_SETUP_INCOMING_VARARGS
253#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 254#undef TARGET_PASS_BY_REFERENCE
255#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 256#undef TARGET_CALLEE_COPIES
257#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 258
27925877 259#undef TARGET_PREFERRED_RELOAD_CLASS
260#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
261#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 262#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 263
fd50b071 264#undef TARGET_LEGITIMATE_ADDRESS_P
265#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 266#undef TARGET_LEGITIMATE_CONSTANT_P
267#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 268
5a1c68c3 269#undef TARGET_FRAME_POINTER_REQUIRED
270#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
271
604d844a 272#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
273#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
274#undef TARGET_TRAMPOLINE_INIT
275#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
276
4c834714 277#undef TARGET_OPTION_OVERRIDE
278#define TARGET_OPTION_OVERRIDE mmix_option_override
279
68cbb7e3 280struct gcc_target targetm = TARGET_INITIALIZER;
281
282/* Functions that are expansions for target macros.
283 See Target Macros in `Using and Porting GCC'. */
284
4c834714 285/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 286
4c834714 287static void
288mmix_option_override (void)
68cbb7e3 289{
290 /* Should we err or should we warn? Hmm. At least we must neutralize
291 it. For example the wrong kind of case-tables will be generated with
292 PIC; we use absolute address items for mmixal compatibility. FIXME:
293 They could be relative if we just elide them to after all pertinent
294 labels. */
295 if (flag_pic)
296 {
c3ceba8e 297 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 298 flag_pic = 0;
299 }
68cbb7e3 300}
301
302/* INIT_EXPANDERS. */
303
304void
7585fcd5 305mmix_init_expanders (void)
68cbb7e3 306{
307 init_machine_status = mmix_init_machine_status;
308}
309
310/* Set the per-function data. */
311
1f3233d1 312static struct machine_function *
7585fcd5 313mmix_init_machine_status (void)
68cbb7e3 314{
ba72912a 315 return ggc_alloc_cleared_machine_function ();
68cbb7e3 316}
317
318/* DATA_ALIGNMENT.
319 We have trouble getting the address of stuff that is located at other
320 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 321 at least 32-bit alignment. */
68cbb7e3 322
323int
7585fcd5 324mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 325{
326 if (basic_align < 32)
327 return 32;
328
329 return basic_align;
330}
331
332/* CONSTANT_ALIGNMENT. */
333
334int
7585fcd5 335mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 336{
337 if (basic_align < 32)
338 return 32;
339
340 return basic_align;
341}
342
343/* LOCAL_ALIGNMENT. */
344
c0dae7df 345unsigned
346mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 347{
348 if (basic_align < 32)
349 return 32;
350
351 return basic_align;
352}
353
b2d7ede1 354/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 355
b2d7ede1 356static void
7585fcd5 357mmix_conditional_register_usage (void)
68cbb7e3 358{
359 int i;
360
361 if (TARGET_ABI_GNU)
362 {
363 static const int gnu_abi_reg_alloc_order[]
364 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
365
366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
367 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
368
369 /* Change the default from the mmixware ABI. For the GNU ABI,
370 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 371 call-clobbered local register for the "hole" that holds the
372 number of saved local registers saved by PUSHJ/PUSHGO during the
373 function call, receiving the return value at return. So best is
374 to use the highest, $31. It's already marked call-clobbered for
375 the mmixware ABI. */
68cbb7e3 376 for (i = 15; i <= 30; i++)
377 call_used_regs[i] = 0;
f0b228a5 378
379 /* "Unfix" the parameter registers. */
380 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
381 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
382 i++)
383 fixed_regs[i] = 0;
68cbb7e3 384 }
385
386 /* Step over the ":" in special register names. */
387 if (! TARGET_TOPLEVEL_SYMBOLS)
388 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
389 if (reg_names[i][0] == ':')
390 reg_names[i]++;
391}
392
6d1f3d31 393/* INCOMING_REGNO and OUTGOING_REGNO worker function.
394 Those two macros must only be applied to function argument
395 registers. FIXME: for their current use in gcc, it'd be better
396 with an explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P
5d246ebf 397 a'la TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
398 forcing the target to commit to a fixed mapping and for any
399 unspecified register use. */
6d1f3d31 400
401int
402mmix_opposite_regno (int regno, int incoming)
403{
404 if (!mmix_function_arg_regno_p (regno, incoming))
405 return regno;
406
407 return
408 regno - (incoming
409 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
410 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
411}
412
d3310704 413/* LOCAL_REGNO.
414 All registers that are part of the register stack and that will be
415 saved are local. */
416
417int
7585fcd5 418mmix_local_regno (int regno)
d3310704 419{
420 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
421}
422
27925877 423/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 424 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
425
27925877 426static reg_class_t
427mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 428{
429 /* FIXME: Revisit. */
430 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 431 ? REMAINDER_REG : rclass;
68cbb7e3 432}
433
27925877 434/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 435 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
436
27925877 437static reg_class_t
438mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 439{
440 /* FIXME: Revisit. */
441 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 442 ? REMAINDER_REG : rclass;
68cbb7e3 443}
444
445/* SECONDARY_RELOAD_CLASS.
446 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
447
448enum reg_class
8deb3959 449mmix_secondary_reload_class (enum reg_class rclass,
7585fcd5 450 enum machine_mode mode ATTRIBUTE_UNUSED,
451 rtx x ATTRIBUTE_UNUSED,
452 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 453{
8deb3959 454 if (rclass == REMAINDER_REG
455 || rclass == HIMULT_REG
456 || rclass == SYSTEM_REGS)
68cbb7e3 457 return GENERAL_REGS;
458
68cbb7e3 459 return NO_REGS;
460}
461
462/* CONST_OK_FOR_LETTER_P. */
463
464int
7585fcd5 465mmix_const_ok_for_letter_p (HOST_WIDE_INT value, int c)
68cbb7e3 466{
467 return
468 (c == 'I' ? value >= 0 && value <= 255
469 : c == 'J' ? value >= 0 && value <= 65535
470 : c == 'K' ? value <= 0 && value >= -255
471 : c == 'L' ? mmix_shiftable_wyde_value (value)
472 : c == 'M' ? value == 0
473 : c == 'N' ? mmix_shiftable_wyde_value (~value)
474 : c == 'O' ? (value == 3 || value == 5 || value == 9
475 || value == 17)
476 : 0);
477}
478
479/* CONST_DOUBLE_OK_FOR_LETTER_P. */
480
481int
7585fcd5 482mmix_const_double_ok_for_letter_p (rtx value, int c)
68cbb7e3 483{
484 return
485 (c == 'G' ? value == CONST0_RTX (GET_MODE (value))
486 : 0);
487}
488
489/* EXTRA_CONSTRAINT.
490 We need this since our constants are not always expressible as
491 CONST_INT:s, but rather often as CONST_DOUBLE:s. */
492
493int
7585fcd5 494mmix_extra_constraint (rtx x, int c, int strict)
68cbb7e3 495{
496 HOST_WIDEST_INT value;
497
0103ffd2 498 /* When checking for an address, we need to handle strict vs. non-strict
499 register checks. Don't use address_operand, but instead its
500 equivalent (its callee, which it is just a wrapper for),
501 memory_operand_p and the strict-equivalent strict_memory_address_p. */
68cbb7e3 502 if (c == 'U')
0103ffd2 503 return
504 strict
505 ? strict_memory_address_p (Pmode, x)
506 : memory_address_p (Pmode, x);
68cbb7e3 507
f0b228a5 508 /* R asks whether x is to be loaded with GETA or something else. Right
509 now, only a SYMBOL_REF and LABEL_REF can fit for
510 TARGET_BASE_ADDRESSES.
511
512 Only constant symbolic addresses apply. With TARGET_BASE_ADDRESSES,
513 we just allow straight LABEL_REF or SYMBOL_REFs with SYMBOL_REF_FLAG
514 set right now; only function addresses and code labels. If we change
515 to let SYMBOL_REF_FLAG be set on other symbols, we have to check
516 inside CONST expressions. When TARGET_BASE_ADDRESSES is not in
517 effect, a "raw" constant check together with mmix_constant_address_p
518 is all that's needed; we want all constant addresses to be loaded
519 with GETA then. */
520 if (c == 'R')
521 return
522 GET_CODE (x) != CONST_INT && GET_CODE (x) != CONST_DOUBLE
523 && mmix_constant_address_p (x)
524 && (! TARGET_BASE_ADDRESSES
525 || (GET_CODE (x) == LABEL_REF
526 || (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FLAG (x))));
527
68cbb7e3 528 if (GET_CODE (x) != CONST_DOUBLE || GET_MODE (x) != VOIDmode)
529 return 0;
530
531 value = mmix_intval (x);
532
533 /* We used to map Q->J, R->K, S->L, T->N, U->O, but we don't have to any
f0b228a5 534 more ('U' taken for address_operand, 'R' similarly). Some letters map
535 outside of CONST_INT, though; we still use 'S' and 'T'. */
68cbb7e3 536 if (c == 'S')
537 return mmix_shiftable_wyde_value (value);
538 else if (c == 'T')
539 return mmix_shiftable_wyde_value (~value);
540 return 0;
541}
542
543/* DYNAMIC_CHAIN_ADDRESS. */
544
545rtx
7585fcd5 546mmix_dynamic_chain_address (rtx frame)
68cbb7e3 547{
548 /* FIXME: the frame-pointer is stored at offset -8 from the current
549 frame-pointer. Unfortunately, the caller assumes that a
550 frame-pointer is present for *all* previous frames. There should be
551 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 552 return plus_constant (Pmode, frame, -8);
68cbb7e3 553}
554
555/* STARTING_FRAME_OFFSET. */
556
557int
7585fcd5 558mmix_starting_frame_offset (void)
68cbb7e3 559{
560 /* The old frame pointer is in the slot below the new one, so
561 FIRST_PARM_OFFSET does not need to depend on whether the
562 frame-pointer is needed or not. We have to adjust for the register
563 stack pointer being located below the saved frame pointer.
564 Similarly, we store the return address on the stack too, for
565 exception handling, and always if we save the register stack pointer. */
566 return
567 (-8
568 + (MMIX_CFUN_HAS_LANDING_PAD
569 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
570}
571
572/* RETURN_ADDR_RTX. */
573
574rtx
7585fcd5 575mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 576{
577 return count == 0
578 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 579 /* FIXME: Set frame_alias_set on the following. (Why?)
580 See mmix_initial_elimination_offset for the reason we can't use
581 get_hard_reg_initial_val for both. Always using a stack slot
582 and not a register would be suboptimal. */
29c05e22 583 ? validize_mem (gen_rtx_MEM (Pmode,
584 plus_constant (Pmode,
585 frame_pointer_rtx, -16)))
68cbb7e3 586 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
587 : NULL_RTX;
588}
589
590/* SETUP_FRAME_ADDRESSES. */
591
592void
7585fcd5 593mmix_setup_frame_addresses (void)
68cbb7e3 594{
595 /* Nothing needed at the moment. */
596}
597
598/* The difference between the (imaginary) frame pointer and the stack
599 pointer. Used to eliminate the frame pointer. */
600
601int
7585fcd5 602mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 603{
604 int regno;
605 int fp_sp_offset
abe32cce 606 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 607
af08e904 608 /* There is no actual offset between these two virtual values, but for
609 the frame-pointer, we have the old one in the stack position below
610 it, so the offset for the frame-pointer to the stack-pointer is one
611 octabyte larger. */
68cbb7e3 612 if (fromreg == MMIX_ARG_POINTER_REGNUM
613 && toreg == MMIX_FRAME_POINTER_REGNUM)
614 return 0;
615
616 /* The difference is the size of local variables plus the size of
617 outgoing function arguments that would normally be passed as
618 registers but must be passed on stack because we're out of
619 function-argument registers. Only global saved registers are
620 counted; the others go on the register stack.
621
622 The frame-pointer is counted too if it is what is eliminated, as we
623 need to balance the offset for it from STARTING_FRAME_OFFSET.
624
625 Also add in the slot for the register stack pointer we save if we
626 have a landing pad.
627
628 Unfortunately, we can't access $0..$14, from unwinder code easily, so
629 store the return address in a frame slot too. FIXME: Only for
630 non-leaf functions. FIXME: Always with a landing pad, because it's
631 hard to know whether we need the other at the time we know we need
632 the offset for one (and have to state it). It's a kludge until we
633 can express the register stack in the EH frame info.
634
635 We have to do alignment here; get_frame_size will not return a
636 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
637
638 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
639 regno <= 255;
640 regno++)
3072d30e 641 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 642 || IS_MMIX_EH_RETURN_DATA_REG (regno))
643 fp_sp_offset += 8;
644
645 return fp_sp_offset
646 + (MMIX_CFUN_HAS_LANDING_PAD
647 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
648 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
649}
650
5d246ebf 651static void
39cba157 652mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode,
5d246ebf 653 const_tree type, bool named ATTRIBUTE_UNUSED)
654{
39cba157 655 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 656 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
657
658 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
659 || (arg_size > 8
660 && !TARGET_LIBFUNC
661 && !argsp->lib))
662 ? (MMIX_MAX_ARGS_IN_REGS) + 1
663 : argsp->regs + (7 + arg_size) / 8);
664}
68cbb7e3 665
5d246ebf 666/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
667
668static rtx
39cba157 669mmix_function_arg_1 (const cumulative_args_t argsp_v,
5d246ebf 670 enum machine_mode mode,
671 const_tree type,
672 bool named ATTRIBUTE_UNUSED,
673 bool incoming)
68cbb7e3 674{
39cba157 675 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
676
68cbb7e3 677 /* Last-argument marker. */
678 if (type == void_type_node)
679 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
680 ? gen_rtx_REG (mode,
681 (incoming
682 ? MMIX_FIRST_INCOMING_ARG_REGNUM
683 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
684 : NULL_RTX;
685
686 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 687 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 688 && (GET_MODE_BITSIZE (mode) <= 64
689 || argsp->lib
690 || TARGET_LIBFUNC))
691 ? gen_rtx_REG (mode,
692 (incoming
693 ? MMIX_FIRST_INCOMING_ARG_REGNUM
694 : MMIX_FIRST_ARG_REGNUM)
695 + argsp->regs)
696 : NULL_RTX;
697}
698
5d246ebf 699/* Return an rtx for a function argument to go in a register, and 0 for
700 one that must go on stack. */
701
702static rtx
39cba157 703mmix_function_arg (cumulative_args_t argsp,
5d246ebf 704 enum machine_mode mode,
705 const_tree type,
706 bool named)
707{
708 return mmix_function_arg_1 (argsp, mode, type, named, false);
709}
710
711static rtx
39cba157 712mmix_function_incoming_arg (cumulative_args_t argsp,
5d246ebf 713 enum machine_mode mode,
714 const_tree type,
715 bool named)
716{
717 return mmix_function_arg_1 (argsp, mode, type, named, true);
718}
719
68cbb7e3 720/* Returns nonzero for everything that goes by reference, 0 for
721 everything that goes by value. */
722
b981d932 723static bool
39cba157 724mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode,
fb80456a 725 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 726{
39cba157 727 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
728
0336f0f0 729 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 730 necessary. */
bef380a4 731 if (targetm.calls.must_pass_in_stack (mode, type))
732 return true;
733
734 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
735 && !TARGET_LIBFUNC
736 && (!argsp || !argsp->lib))
737 return true;
738
739 return false;
68cbb7e3 740}
741
742/* Return nonzero if regno is a register number where a parameter is
743 passed, and 0 otherwise. */
744
745int
7585fcd5 746mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 747{
748 int first_arg_regnum
749 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
750
751 return regno >= first_arg_regnum
752 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
753}
754
b600778c 755/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 756
b600778c 757static rtx
758mmix_function_value (const_tree valtype,
759 const_tree func ATTRIBUTE_UNUSED,
760 bool outgoing)
68cbb7e3 761{
762 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 763 enum machine_mode cmode;
764 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
765 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
766 int i;
767 int nregs;
768
b600778c 769 if (!outgoing)
770 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
771
68cbb7e3 772 /* Return values that fit in a register need no special handling.
773 There's no register hole when parameters are passed in global
774 registers. */
775 if (TARGET_ABI_GNU
776 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
777 return
778 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
779
fb89a8c9 780 if (COMPLEX_MODE_P (mode))
781 /* A complex type, made up of components. */
782 cmode = TYPE_MODE (TREE_TYPE (valtype));
783 else
784 {
785 /* Of the other larger-than-register modes, we only support
786 scalar mode TImode. (At least, that's the only one that's
787 been rudimentally tested.) Make sure we're alerted for
788 unexpected cases. */
789 if (mode != TImode)
790 sorry ("support for mode %qs", GET_MODE_NAME (mode));
791
792 /* In any case, we will fill registers to the natural size. */
793 cmode = DImode;
794 }
795
68cbb7e3 796 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
797
798 /* We need to take care of the effect of the register hole on return
799 values of large sizes; the last register will appear as the first
800 register, with the rest shifted. (For complex modes, this is just
801 swapped registers.) */
802
803 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 804 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 805 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
806
807 /* FIXME: Maybe we should handle structure values like this too
808 (adjusted for BLKmode), perhaps for both ABI:s. */
809 for (i = 0; i < nregs - 1; i++)
810 vec[i]
811 = gen_rtx_EXPR_LIST (VOIDmode,
812 gen_rtx_REG (cmode, first_val_regnum + i),
813 GEN_INT ((i + 1) * BITS_PER_UNIT));
814
815 vec[nregs - 1]
816 = gen_rtx_EXPR_LIST (VOIDmode,
817 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 818 const0_rtx);
68cbb7e3 819
820 return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs, vec));
821}
822
b600778c 823/* Implements TARGET_LIBCALL_VALUE. */
c715d549 824
b600778c 825static rtx
826mmix_libcall_value (enum machine_mode mode,
827 const_rtx fun ATTRIBUTE_UNUSED)
828{
829 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
830}
831
832/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
833
834static bool
835mmix_function_value_regno_p (const unsigned int regno)
c715d549 836{
837 return regno == MMIX_RETURN_VALUE_REGNUM;
838}
839
68cbb7e3 840/* EH_RETURN_DATA_REGNO. */
841
842int
7585fcd5 843mmix_eh_return_data_regno (int n)
68cbb7e3 844{
845 if (n >= 0 && n < 4)
846 return MMIX_EH_RETURN_DATA_REGNO_START + n;
847
848 return INVALID_REGNUM;
849}
850
851/* EH_RETURN_STACKADJ_RTX. */
852
853rtx
7585fcd5 854mmix_eh_return_stackadj_rtx (void)
68cbb7e3 855{
856 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
857}
858
859/* EH_RETURN_HANDLER_RTX. */
860
861rtx
7585fcd5 862mmix_eh_return_handler_rtx (void)
68cbb7e3 863{
7585fcd5 864 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 865}
866
867/* ASM_PREFERRED_EH_DATA_FORMAT. */
868
869int
7585fcd5 870mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
871 int global ATTRIBUTE_UNUSED)
68cbb7e3 872{
873 /* This is the default (was at 2001-07-20). Revisit when needed. */
874 return DW_EH_PE_absptr;
875}
876
28c2d844 877/* Make a note that we've seen the beginning of the prologue. This
d3310704 878 matters to whether we'll translate register numbers as calculated by
2efea8c0 879 mmix_reorg. */
68cbb7e3 880
d3310704 881static void
7585fcd5 882mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
883 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 884{
d3310704 885 cfun->machine->in_prologue = 1;
886}
68cbb7e3 887
d3310704 888/* Make a note that we've seen the end of the prologue. */
68cbb7e3 889
d3310704 890static void
7585fcd5 891mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 892{
893 cfun->machine->in_prologue = 0;
d68ffc6f 894}
895
2efea8c0 896/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
897 done here; just virtually by calculating the highest saved stack
898 register number used to modify the register numbers at output time. */
d68ffc6f 899
2efea8c0 900static void
7585fcd5 901mmix_reorg (void)
d68ffc6f 902{
903 int regno;
68cbb7e3 904
905 /* We put the number of the highest saved register-file register in a
906 location convenient for the call-patterns to output. Note that we
907 don't tell dwarf2 about these registers, since it can't restore them
908 anyway. */
d68ffc6f 909 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 910 regno >= 0;
911 regno--)
3072d30e 912 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 913 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
914 break;
915
d68ffc6f 916 /* Regardless of whether they're saved (they might be just read), we
917 mustn't include registers that carry parameters. We could scan the
918 insns to see whether they're actually used (and indeed do other less
919 trivial register usage analysis and transformations), but it seems
920 wasteful to optimize for unused parameter registers. As of
3072d30e 921 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 922 that might change. */
abe32cce 923 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 924 {
abe32cce 925 regno = crtl->args.info.regs - 1;
d68ffc6f 926
927 /* We don't want to let this cause us to go over the limit and make
928 incoming parameter registers be misnumbered and treating the last
929 parameter register and incoming return value register call-saved.
930 Stop things at the unmodified scheme. */
931 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
932 regno = MMIX_RETURN_VALUE_REGNUM - 1;
933 }
934
935 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 936}
937
938/* TARGET_ASM_FUNCTION_EPILOGUE. */
939
4448bfa5 940static void
7585fcd5 941mmix_target_asm_function_epilogue (FILE *stream,
942 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 943{
d3310704 944 /* Emit an \n for readability of the generated assembly. */
945 fputc ('\n', stream);
946}
68cbb7e3 947
e7f5e241 948/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 949
6988553d 950static void
7585fcd5 951mmix_asm_output_mi_thunk (FILE *stream,
952 tree fndecl ATTRIBUTE_UNUSED,
953 HOST_WIDE_INT delta,
954 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
955 tree func)
d3310704 956{
6644435d 957 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
958 location of structure to return as invisible first argument), you
959 need to tweak this code too. */
d3310704 960 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 961
d3310704 962 if (delta >= 0 && delta < 65536)
e7f5e241 963 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 964 else if (delta < 0 && delta >= -255)
e7f5e241 965 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 966 else
0b123c47 967 {
d3310704 968 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 969 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 970 }
971
d3310704 972 fprintf (stream, "\tJMP ");
973 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
974 fprintf (stream, "\n");
975}
68cbb7e3 976
d3310704 977/* FUNCTION_PROFILER. */
68cbb7e3 978
d3310704 979void
7585fcd5 980mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
981 int labelno ATTRIBUTE_UNUSED)
d3310704 982{
983 sorry ("function_profiler support for MMIX");
984}
68cbb7e3 985
9e4a734a 986/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
987 let's stick to pushing argument registers on the stack. Later, we
988 can parse all arguments in registers, to improve performance. */
68cbb7e3 989
9e4a734a 990static void
39cba157 991mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
7585fcd5 992 enum machine_mode mode,
993 tree vartype,
994 int *pretend_sizep,
995 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 996{
39cba157 997 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
998
7ccc713a 999 /* The last named variable has been handled, but
1000 args_so_farp has not been advanced for it. */
1001 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
1002 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 1003
1004 /* We assume that one argument takes up one register here. That should
5aedf60c 1005 be true until we start messing with multi-reg parameters. */
68cbb7e3 1006 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
1007 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
1008}
1009
604d844a 1010/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 1011
604d844a 1012static void
1013mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 1014{
af08e904 1015 /* Read a value into the static-chain register and jump somewhere. The
1016 static chain is stored at offset 16, and the function address is
1017 stored at offset 24. */
604d844a 1018
68cbb7e3 1019 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 1020 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 1021 fprintf (stream, "LDOU $255,$255,8\n\t");
1022 fprintf (stream, "GO $255,$255,0\n");
1023 fprintf (stream, "1H\tOCTA 0\n\t");
1024 fprintf (stream, "OCTA 0\n");
1025}
1026
604d844a 1027/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 1028/* Set the static chain and function pointer field in the trampoline.
1029 We also SYNCID here to be sure (doesn't matter in the simulator, but
1030 some day it will). */
1031
604d844a 1032static void
1033mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
1034{
1035 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
1036 rtx mem;
1037
1038 emit_block_move (m_tramp, assemble_trampoline_template (),
1039 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
1040
1041 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
1042 emit_move_insn (mem, static_chain);
1043 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
1044 emit_move_insn (mem, fnaddr);
1045
1046 mem = adjust_address (m_tramp, DImode, 0);
1047 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 1048}
1049
1050/* We must exclude constant addresses that have an increment that is not a
1051 multiple of four bytes because of restrictions of the GETA
f0b228a5 1052 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 1053
1054int
7585fcd5 1055mmix_constant_address_p (rtx x)
68cbb7e3 1056{
1057 RTX_CODE code = GET_CODE (x);
1058 int addend = 0;
f0b228a5 1059 /* When using "base addresses", anything constant goes. */
1060 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 1061
68cbb7e3 1062 switch (code)
1063 {
1064 case LABEL_REF:
1065 case SYMBOL_REF:
1066 return 1;
1067
68cbb7e3 1068 case HIGH:
f0b228a5 1069 /* FIXME: Don't know how to dissect these. Avoid them for now,
1070 except we know they're constants. */
1071 return constant_ok;
68cbb7e3 1072
1073 case CONST_INT:
1074 addend = INTVAL (x);
1075 break;
1076
1077 case CONST_DOUBLE:
1078 if (GET_MODE (x) != VOIDmode)
1079 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1080 return constant_ok;
68cbb7e3 1081 addend = CONST_DOUBLE_LOW (x);
1082 break;
1083
1084 case CONST:
1085 /* Note that expressions with arithmetic on forward references don't
1086 work in mmixal. People using gcc assembly code with mmixal might
1087 need to move arrays and such to before the point of use. */
1088 if (GET_CODE (XEXP (x, 0)) == PLUS)
1089 {
1090 rtx x0 = XEXP (XEXP (x, 0), 0);
1091 rtx x1 = XEXP (XEXP (x, 0), 1);
1092
1093 if ((GET_CODE (x0) == SYMBOL_REF
1094 || GET_CODE (x0) == LABEL_REF)
1095 && (GET_CODE (x1) == CONST_INT
1096 || (GET_CODE (x1) == CONST_DOUBLE
1097 && GET_MODE (x1) == VOIDmode)))
1098 addend = mmix_intval (x1);
1099 else
f0b228a5 1100 return constant_ok;
68cbb7e3 1101 }
1102 else
f0b228a5 1103 return constant_ok;
68cbb7e3 1104 break;
1105
1106 default:
1107 return 0;
1108 }
1109
f0b228a5 1110 return constant_ok || (addend & 3) == 0;
68cbb7e3 1111}
1112
fd50b071 1113/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1114
fd50b071 1115bool
1116mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
1117 rtx x,
1118 bool strict_checking)
68cbb7e3 1119{
1120#define MMIX_REG_OK(X) \
1121 ((strict_checking \
1122 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1123 || (reg_renumber[REGNO (X)] > 0 \
1124 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1125 || (!strict_checking \
1126 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1127 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1128 || REGNO (X) == ARG_POINTER_REGNUM)))
1129
1130 /* We only accept:
1131 (mem reg)
1132 (mem (plus reg reg))
f0b228a5 1133 (mem (plus reg 0..255)).
1134 unless TARGET_BASE_ADDRESSES, in which case we accept all
1135 (mem constant_address) too. */
68cbb7e3 1136
1137
1138 /* (mem reg) */
1139 if (REG_P (x) && MMIX_REG_OK (x))
1140 return 1;
1141
1142 if (GET_CODE(x) == PLUS)
1143 {
1144 rtx x1 = XEXP (x, 0);
1145 rtx x2 = XEXP (x, 1);
1146
1147 /* Try swapping the order. FIXME: Do we need this? */
1148 if (! REG_P (x1))
1149 {
1150 rtx tem = x1;
1151 x1 = x2;
1152 x2 = tem;
1153 }
1154
f0b228a5 1155 /* (mem (plus (reg?) (?))) */
68cbb7e3 1156 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1157 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1158
f0b228a5 1159 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1160 if (REG_P (x2) && MMIX_REG_OK (x2))
1161 return 1;
1162
f0b228a5 1163 /* (mem (plus (reg) (0..255?))) */
68cbb7e3 1164 if (GET_CODE (x2) == CONST_INT
1165 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1166 return 1;
f0b228a5 1167
1168 return 0;
68cbb7e3 1169 }
1170
f0b228a5 1171 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1172}
1173
ca316360 1174/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1175
ca316360 1176static bool
1177mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1178{
1179 RTX_CODE code = GET_CODE (x);
1180
1181 /* We must allow any number due to the way the cse passes works; if we
1182 do not allow any number here, general_operand will fail, and insns
1183 will fatally fail recognition instead of "softly". */
1184 if (code == CONST_INT || code == CONST_DOUBLE)
1185 return 1;
1186
1187 return CONSTANT_ADDRESS_P (x);
1188}
1189
1190/* SELECT_CC_MODE. */
1191
1192enum machine_mode
7585fcd5 1193mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1194{
1195 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1196 output different compare insns. Note that we do not check the
1197 validity of the comparison here. */
1198
1199 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1200 {
1201 if (op == ORDERED || op == UNORDERED || op == UNGE
1202 || op == UNGT || op == UNLE || op == UNLT)
1203 return CC_FUNmode;
1204
1205 if (op == EQ || op == NE)
1206 return CC_FPEQmode;
1207
1208 return CC_FPmode;
1209 }
1210
1211 if (op == GTU || op == LTU || op == GEU || op == LEU)
1212 return CC_UNSmode;
1213
1214 return CCmode;
1215}
1216
68cbb7e3 1217/* REVERSIBLE_CC_MODE. */
1218
1219int
7585fcd5 1220mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1221{
1222 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1223 compares. */
68cbb7e3 1224 return mode != CC_FPmode;
1225}
1226
fab7adbf 1227/* TARGET_RTX_COSTS. */
68cbb7e3 1228
fab7adbf 1229static bool
7585fcd5 1230mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1231 int code ATTRIBUTE_UNUSED,
1232 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1233 int opno ATTRIBUTE_UNUSED,
f529eb25 1234 int *total ATTRIBUTE_UNUSED,
1235 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1236{
1237 /* For the time being, this is just a stub and we'll accept the
1238 generic calculations, until we can do measurements, at least.
1239 Say we did not modify any calculated costs. */
fab7adbf 1240 return false;
68cbb7e3 1241}
1242
f7e13ca6 1243/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1244
f7e13ca6 1245 The special registers can only move to and from general regs, and we
1246 need to check that their constraints match, so say 3 for them. */
1247
1248static int
7585fcd5 1249mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1250 reg_class_t from,
1251 reg_class_t to)
68cbb7e3 1252{
1253 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1254}
1255
1256/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1257 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1258 the target. */
1259
1260/* DATA_SECTION_ASM_OP. */
1261
1262const char *
7585fcd5 1263mmix_data_section_asm_op (void)
68cbb7e3 1264{
1265 return "\t.data ! mmixal:= 8H LOC 9B";
1266}
1267
7811991d 1268static void
7585fcd5 1269mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1270{
1271 /* Test for an external declaration, and do nothing if it is one. */
1272 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1273 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1274 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1275 ;
ae484cc8 1276 else if (first && DECL_P (decl))
68cbb7e3 1277 {
1278 /* For non-visible declarations, add a "@" prefix, which we skip
1279 when the label is output. If the label does not have this
f0b228a5 1280 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1281
1282 Note that this does not work for data that is declared extern and
1283 later defined as static. If there's code in between, that code
f0b228a5 1284 will refer to the extern declaration, and vice versa. This just
1285 means that when -mtoplevel-symbols is in use, we can just handle
1286 well-behaved ISO-compliant code. */
68cbb7e3 1287
2c129d70 1288 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1289 int len = strlen (str);
225ab426 1290 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1291 newstr[0] = '@';
68cbb7e3 1292 strcpy (newstr + 1, str);
b948ae2f 1293 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1294 }
1295
f0b228a5 1296 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1297 may need different options to reach for different things with GETA.
1298 For now, functions and things we know or have been told are constant. */
1299 if (TREE_CODE (decl) == FUNCTION_DECL
1300 || TREE_CONSTANT (decl)
1301 || (TREE_CODE (decl) == VAR_DECL
1302 && TREE_READONLY (decl)
1303 && !TREE_SIDE_EFFECTS (decl)
1304 && (!DECL_INITIAL (decl)
1305 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1306 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1307}
1308
7b4a38a6 1309static const char *
7585fcd5 1310mmix_strip_name_encoding (const char *name)
68cbb7e3 1311{
1312 for (; (*name == '@' || *name == '*'); name++)
1313 ;
1314
1315 return name;
1316}
1317
92c473b8 1318/* TARGET_ASM_FILE_START.
1319 We just emit a little comment for the time being. */
68cbb7e3 1320
92c473b8 1321static void
7585fcd5 1322mmix_file_start (void)
68cbb7e3 1323{
92c473b8 1324 default_file_start ();
68cbb7e3 1325
92c473b8 1326 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1327
1d60d981 1328 /* Make sure each file starts with the text section. */
2f14b1f9 1329 switch_to_section (text_section);
68cbb7e3 1330}
1331
f6940372 1332/* TARGET_ASM_FILE_END. */
68cbb7e3 1333
f6940372 1334static void
7585fcd5 1335mmix_file_end (void)
68cbb7e3 1336{
1d60d981 1337 /* Make sure each file ends with the data section. */
2f14b1f9 1338 switch_to_section (data_section);
68cbb7e3 1339}
1340
40fe393f 1341/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1342
40fe393f 1343static void
7585fcd5 1344mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1345{
1346 fprintf (stream, "# 1 ");
1347 OUTPUT_QUOTED_STRING (stream, name);
1348 fprintf (stream, "\n");
1349}
1350
1351/* OUTPUT_QUOTED_STRING. */
1352
1353void
7585fcd5 1354mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1355{
1356 const char * string_end = string + length;
25037517 1357 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1358
1359 /* Output "any character except newline and double quote character". We
1360 play it safe and avoid all control characters too. We also do not
1361 want [] as characters, should input be passed through m4 with [] as
1362 quotes. Further, we avoid "\", because the GAS port handles it as a
1363 quoting character. */
1364 while (string < string_end)
1365 {
1366 if (*string
1367 && (unsigned char) *string < 128
1368 && !ISCNTRL (*string)
1369 && strchr (unwanted_chars, *string) == NULL)
1370 {
1371 fputc ('"', stream);
1372 while (*string
1373 && (unsigned char) *string < 128
1374 && !ISCNTRL (*string)
1375 && strchr (unwanted_chars, *string) == NULL
1376 && string < string_end)
1377 {
1378 fputc (*string, stream);
1379 string++;
1380 }
1381 fputc ('"', stream);
1382 if (string < string_end)
1383 fprintf (stream, ",");
1384 }
1385 if (string < string_end)
1386 {
1387 fprintf (stream, "#%x", *string & 255);
1388 string++;
1389 if (string < string_end)
1390 fprintf (stream, ",");
1391 }
1392 }
1393}
1394
58356836 1395/* Target hook for assembling integer objects. Use mmix_print_operand
1396 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1397 CONST_DOUBLEs. */
68cbb7e3 1398
58356836 1399static bool
7585fcd5 1400mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1401{
58356836 1402 if (aligned_p)
1403 switch (size)
1404 {
4f4e478d 1405 /* We handle a limited number of types of operands in here. But
1406 that's ok, because we can punt to generic functions. We then
5c3d1711 1407 pretend that aligned data isn't needed, so the usual .<pseudo>
1408 syntax is used (which works for aligned data too). We actually
1409 *must* do that, since we say we don't have simple aligned
1410 pseudos, causing this function to be called. We just try and
1411 keep as much compatibility as possible with mmixal syntax for
1412 normal cases (i.e. without GNU extensions and C only). */
58356836 1413 case 1:
4f4e478d 1414 if (GET_CODE (x) != CONST_INT)
1415 {
1416 aligned_p = 0;
1417 break;
1418 }
58356836 1419 fputs ("\tBYTE\t", asm_out_file);
1420 mmix_print_operand (asm_out_file, x, 'B');
1421 fputc ('\n', asm_out_file);
1422 return true;
1423
1424 case 2:
4f4e478d 1425 if (GET_CODE (x) != CONST_INT)
1426 {
1427 aligned_p = 0;
1428 break;
1429 }
58356836 1430 fputs ("\tWYDE\t", asm_out_file);
1431 mmix_print_operand (asm_out_file, x, 'W');
1432 fputc ('\n', asm_out_file);
1433 return true;
1434
1435 case 4:
60bb373d 1436 if (GET_CODE (x) != CONST_INT)
4f4e478d 1437 {
1438 aligned_p = 0;
1439 break;
1440 }
58356836 1441 fputs ("\tTETRA\t", asm_out_file);
1442 mmix_print_operand (asm_out_file, x, 'L');
1443 fputc ('\n', asm_out_file);
1444 return true;
1445
1446 case 8:
7f81c162 1447 /* We don't get here anymore for CONST_DOUBLE, because DImode
1448 isn't expressed as CONST_DOUBLE, and DFmode is handled
1449 elsewhere. */
1450 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1451 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1452 return true;
1453 }
1454 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1455}
1456
1457/* ASM_OUTPUT_ASCII. */
1458
1459void
7585fcd5 1460mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1461{
1462 while (length > 0)
1463 {
1464 int chunk_size = length > 60 ? 60 : length;
1465 fprintf (stream, "\tBYTE ");
1466 mmix_output_quoted_string (stream, string, chunk_size);
1467 string += chunk_size;
1468 length -= chunk_size;
1469 fprintf (stream, "\n");
1470 }
1471}
1472
1473/* ASM_OUTPUT_ALIGNED_COMMON. */
1474
1475void
7585fcd5 1476mmix_asm_output_aligned_common (FILE *stream,
1477 const char *name,
1478 int size,
1479 int align)
68cbb7e3 1480{
1481 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1482 express this in a mmixal-compatible way. */
1483 fprintf (stream, "\t.comm\t");
1484 assemble_name (stream, name);
1485 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1486 size, align / BITS_PER_UNIT);
1487}
1488
1489/* ASM_OUTPUT_ALIGNED_LOCAL. */
1490
1491void
7585fcd5 1492mmix_asm_output_aligned_local (FILE *stream,
1493 const char *name,
1494 int size,
1495 int align)
68cbb7e3 1496{
2f14b1f9 1497 switch_to_section (data_section);
68cbb7e3 1498
1499 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1500 assemble_name (stream, name);
1501 fprintf (stream, "\tLOC @+%d\n", size);
1502}
1503
1504/* ASM_OUTPUT_LABEL. */
1505
1506void
7585fcd5 1507mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1508{
1509 assemble_name (stream, name);
1510 fprintf (stream, "\tIS @\n");
1511}
1512
af1c039b 1513/* ASM_OUTPUT_INTERNAL_LABEL. */
1514
1515void
1516mmix_asm_output_internal_label (FILE *stream, const char *name)
1517{
1518 assemble_name_raw (stream, name);
1519 fprintf (stream, "\tIS @\n");
1520}
1521
68cbb7e3 1522/* ASM_DECLARE_REGISTER_GLOBAL. */
1523
1524void
7585fcd5 1525mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1526 tree decl ATTRIBUTE_UNUSED,
1527 int regno ATTRIBUTE_UNUSED,
1528 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1529{
1530 /* Nothing to do here, but there *will* be, therefore the framework is
1531 here. */
1532}
1533
68cbb7e3 1534/* ASM_WEAKEN_LABEL. */
1535
1536void
7585fcd5 1537mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1538 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1539{
7fe1d31c 1540 fprintf (stream, "\t.weak ");
68cbb7e3 1541 assemble_name (stream, name);
7fe1d31c 1542 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1543}
1544
1545/* MAKE_DECL_ONE_ONLY. */
1546
1547void
7585fcd5 1548mmix_make_decl_one_only (tree decl)
68cbb7e3 1549{
1550 DECL_WEAK (decl) = 1;
1551}
1552
1553/* ASM_OUTPUT_LABELREF.
1554 Strip GCC's '*' and our own '@'. No order is assumed. */
1555
1556void
7585fcd5 1557mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1558{
91009d64 1559 int is_extern = 1;
68cbb7e3 1560
1561 for (; (*name == '@' || *name == '*'); name++)
1562 if (*name == '@')
91009d64 1563 is_extern = 0;
68cbb7e3 1564
1565 asm_fprintf (stream, "%s%U%s",
1566 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1567 name);
1568}
1569
68cbb7e3 1570/* ASM_OUTPUT_DEF. */
1571
1572void
7585fcd5 1573mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1574{
1575 assemble_name (stream, name);
1576 fprintf (stream, "\tIS ");
1577 assemble_name (stream, value);
1578 fputc ('\n', stream);
1579}
1580
7a7fb407 1581/* TARGET_PRINT_OPERAND. */
68cbb7e3 1582
7a7fb407 1583static void
7585fcd5 1584mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1585{
1586 /* When we add support for different codes later, we can, when needed,
1587 drop through to the main handler with a modified operand. */
1588 rtx modified_x = x;
d68ffc6f 1589 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1590
1591 switch (code)
1592 {
1593 /* Unrelated codes are in alphabetic order. */
1594
91009d64 1595 case '+':
1596 /* For conditional branches, output "P" for a probable branch. */
1597 if (TARGET_BRANCH_PREDICT)
1598 {
1599 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
1600 if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
1601 putc ('P', stream);
1602 }
1603 return;
1604
0b123c47 1605 case '.':
1606 /* For the %d in POP %d,0. */
1607 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1608 return;
1609
68cbb7e3 1610 case 'B':
1611 if (GET_CODE (x) != CONST_INT)
1612 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1613 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1614 return;
1615
1616 case 'H':
1617 /* Highpart. Must be general register, and not the last one, as
1618 that one cannot be part of a consecutive register pair. */
d68ffc6f 1619 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1620 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1621
1622 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1623 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1624 return;
1625
1626 case 'L':
1627 /* Lowpart. Must be CONST_INT or general register, and not the last
1628 one, as that one cannot be part of a consecutive register pair. */
1629 if (GET_CODE (x) == CONST_INT)
1630 {
1631 fprintf (stream, "#%lx",
1632 (unsigned long) (INTVAL (x)
1633 & ((unsigned int) 0x7fffffff * 2 + 1)));
1634 return;
1635 }
1636
1637 if (GET_CODE (x) == SYMBOL_REF)
1638 {
1639 output_addr_const (stream, x);
1640 return;
1641 }
1642
d68ffc6f 1643 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1644 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1645
1646 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1647 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1648 return;
1649
1650 /* Can't use 'a' because that's a generic modifier for address
1651 output. */
1652 case 'A':
1653 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1654 ~(unsigned HOST_WIDEST_INT)
1655 mmix_intval (x));
1656 return;
1657
1658 case 'i':
1659 mmix_output_shiftvalue_op_from_str (stream, "INC",
1660 (unsigned HOST_WIDEST_INT)
1661 mmix_intval (x));
1662 return;
1663
1664 case 'o':
1665 mmix_output_shiftvalue_op_from_str (stream, "OR",
1666 (unsigned HOST_WIDEST_INT)
1667 mmix_intval (x));
1668 return;
1669
1670 case 's':
1671 mmix_output_shiftvalue_op_from_str (stream, "SET",
1672 (unsigned HOST_WIDEST_INT)
1673 mmix_intval (x));
1674 return;
1675
1676 case 'd':
1677 case 'D':
1678 mmix_output_condition (stream, x, (code == 'D'));
1679 return;
1680
1681 case 'e':
1682 /* Output an extra "e" to make fcmpe, fune. */
1683 if (TARGET_FCMP_EPSILON)
1684 fprintf (stream, "e");
1685 return;
1686
1687 case 'm':
1688 /* Output the number minus 1. */
1689 if (GET_CODE (x) != CONST_INT)
1690 {
1691 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1692 x);
1693 }
1694 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1695 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1696 return;
1697
1698 case 'p':
1699 /* Store the number of registers we want to save. This was setup
1700 by the prologue. The actual operand contains the number of
1701 registers to pass, but we don't use it currently. Anyway, we
1702 need to output the number of saved registers here. */
d68ffc6f 1703 fprintf (stream, "%d",
1704 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1705 return;
1706
1707 case 'r':
1708 /* Store the register to output a constant to. */
1709 if (! REG_P (x))
68435912 1710 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1711 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1712 return;
1713
1714 case 'I':
1715 /* Output the constant. Note that we use this for floats as well. */
1716 if (GET_CODE (x) != CONST_INT
1717 && (GET_CODE (x) != CONST_DOUBLE
1718 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1719 && GET_MODE (x) != SFmode)))
68435912 1720 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1721 mmix_output_register_setting (stream,
1722 mmix_output_destination_register,
1723 mmix_intval (x), 0);
1724 return;
1725
1726 case 'U':
1727 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1728 if (TARGET_ZERO_EXTEND)
1729 putc ('U', stream);
1730 return;
1731
1732 case 'v':
1733 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1734 return;
1735
1736 case 'V':
1737 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1738 return;
1739
1740 case 'W':
1741 if (GET_CODE (x) != CONST_INT)
1742 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1743 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1744 return;
1745
1746 case 0:
1747 /* Nothing to do. */
1748 break;
1749
1750 default:
1751 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1752 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1753 }
1754
1755 switch (GET_CODE (modified_x))
1756 {
1757 case REG:
d68ffc6f 1758 regno = REGNO (modified_x);
1759 if (regno >= FIRST_PSEUDO_REGISTER)
1760 internal_error ("MMIX Internal: Bad register: %d", regno);
1761 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1762 return;
1763
1764 case MEM:
1765 output_address (XEXP (modified_x, 0));
1766 return;
1767
1768 case CONST_INT:
1769 /* For -2147483648, mmixal complains that the constant does not fit
1770 in 4 bytes, so let's output it as hex. Take care to handle hosts
1771 where HOST_WIDE_INT is longer than an int.
1772
1773 Print small constants +-255 using decimal. */
1774
1775 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1776 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1777 else
1778 fprintf (stream, "#%x",
1779 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1780 return;
1781
1782 case CONST_DOUBLE:
1783 /* Do somewhat as CONST_INT. */
58356836 1784 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1785 return;
1786
1787 case CONST:
1788 output_addr_const (stream, modified_x);
1789 return;
1790
1791 default:
1792 /* No need to test for all strange things. Let output_addr_const do
1793 it for us. */
1794 if (CONSTANT_P (modified_x)
1795 /* Strangely enough, this is not included in CONSTANT_P.
1796 FIXME: Ask/check about sanity here. */
1797 || GET_CODE (modified_x) == CODE_LABEL)
1798 {
1799 output_addr_const (stream, modified_x);
1800 return;
1801 }
1802
1803 /* We need the original here. */
1804 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1805 }
1806}
1807
7a7fb407 1808/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1809
7a7fb407 1810static bool
1811mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1812{
91009d64 1813 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1814 return code == '+'
1815 /* A '.' is used for the %d in the POP %d,0 return insn. */
1816 || code == '.';
68cbb7e3 1817}
1818
7a7fb407 1819/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1820
7a7fb407 1821static void
7585fcd5 1822mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1823{
1824 if (REG_P (x))
1825 {
1826 /* I find the generated assembly code harder to read without
1827 the ",0". */
d68ffc6f 1828 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1829 return;
1830 }
1831 else if (GET_CODE (x) == PLUS)
1832 {
1833 rtx x1 = XEXP (x, 0);
1834 rtx x2 = XEXP (x, 1);
1835
68cbb7e3 1836 if (REG_P (x1))
1837 {
d68ffc6f 1838 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1839
1840 if (REG_P (x2))
1841 {
d68ffc6f 1842 fprintf (stream, "%s",
1843 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1844 return;
1845 }
1846 else if (GET_CODE (x2) == CONST_INT
1847 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1848 {
1849 output_addr_const (stream, x2);
1850 return;
1851 }
1852 }
1853 }
1854
ca316360 1855 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1856 {
1857 output_addr_const (stream, x);
1858 return;
1859 }
1860
68cbb7e3 1861 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1862}
1863
1864/* ASM_OUTPUT_REG_PUSH. */
1865
1866void
7585fcd5 1867mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1868{
1869 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1870 reg_names[MMIX_STACK_POINTER_REGNUM],
1871 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1872 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1873 reg_names[MMIX_STACK_POINTER_REGNUM]);
1874}
1875
1876/* ASM_OUTPUT_REG_POP. */
1877
1878void
7585fcd5 1879mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1880{
1881 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1882 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1883 reg_names[MMIX_STACK_POINTER_REGNUM],
1884 reg_names[MMIX_STACK_POINTER_REGNUM]);
1885}
1886
1887/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1888
1889void
7585fcd5 1890mmix_asm_output_addr_diff_elt (FILE *stream,
1891 rtx body ATTRIBUTE_UNUSED,
1892 int value,
1893 int rel)
68cbb7e3 1894{
1895 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1896}
1897
1898/* ASM_OUTPUT_ADDR_VEC_ELT. */
1899
1900void
7585fcd5 1901mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1902{
1903 fprintf (stream, "\tOCTA L:%d\n", value);
1904}
1905
1906/* ASM_OUTPUT_SKIP. */
1907
1908void
7585fcd5 1909mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1910{
1911 fprintf (stream, "\tLOC @+%d\n", nbytes);
1912}
1913
1914/* ASM_OUTPUT_ALIGN. */
1915
1916void
7585fcd5 1917mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1918{
1919 /* We need to record the needed alignment of this section in the object,
1920 so we have to output an alignment directive. Use a .p2align (not
1921 .align) so people will never have to wonder about whether the
1922 argument is in number of bytes or the log2 thereof. We do it in
1923 addition to the LOC directive, so nothing needs tweaking when
1924 copy-pasting assembly into mmixal. */
1925 fprintf (stream, "\t.p2align %d\n", power);
1926 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1927}
1928
1929/* DBX_REGISTER_NUMBER. */
1930
c0dae7df 1931unsigned
1932mmix_dbx_register_number (unsigned regno)
68cbb7e3 1933{
d68ffc6f 1934 /* Adjust the register number to the one it will be output as, dammit.
1935 It'd be nice if we could check the assumption that we're filling a
1936 gap, but every register between the last saved register and parameter
1937 registers might be a valid parameter register. */
1938 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1939
1940 /* We need to renumber registers to get the number of the return address
1941 register in the range 0..255. It is also space-saving if registers
1942 mentioned in the call-frame information (which uses this function by
1943 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1944 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1945 return regno >= 224 ? (regno - 224) : (regno + 48);
1946}
1947
35a3065a 1948/* End of target macro support functions.
68cbb7e3 1949
7585fcd5 1950 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1951
d3310704 1952/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1953 from insn-emit.c. */
1954
1955rtx
7585fcd5 1956mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1957{
1958 return get_hard_reg_initial_val (mode, regno);
1959}
1960
e911aedf 1961/* Nonzero when the function epilogue is simple enough that a single
d3310704 1962 "POP %d,0" should be used even within the function. */
0b123c47 1963
1964int
7585fcd5 1965mmix_use_simple_return (void)
0b123c47 1966{
1967 int regno;
1968
1969 int stack_space_to_allocate
abe32cce 1970 = (crtl->outgoing_args_size
1971 + crtl->args.pretend_args_size
0b123c47 1972 + get_frame_size () + 7) & ~7;
1973
1974 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1975 return 0;
1976
1977 for (regno = 255;
1978 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1979 regno--)
1980 /* Note that we assume that the frame-pointer-register is one of these
1981 registers, in which case we don't count it here. */
1982 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1983 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1984 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1985 return 0;
1986
1987 if (frame_pointer_needed)
1988 stack_space_to_allocate += 8;
1989
1990 if (MMIX_CFUN_HAS_LANDING_PAD)
1991 stack_space_to_allocate += 16;
1992 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1993 stack_space_to_allocate += 8;
1994
1995 return stack_space_to_allocate == 0;
1996}
1997
d3310704 1998
1999/* Expands the function prologue into RTX. */
2000
2001void
7585fcd5 2002mmix_expand_prologue (void)
d3310704 2003{
2004 HOST_WIDE_INT locals_size = get_frame_size ();
2005 int regno;
2006 HOST_WIDE_INT stack_space_to_allocate
abe32cce 2007 = (crtl->outgoing_args_size
2008 + crtl->args.pretend_args_size
d3310704 2009 + locals_size + 7) & ~7;
2010 HOST_WIDE_INT offset = -8;
2011
2012 /* Add room needed to save global non-register-stack registers. */
2013 for (regno = 255;
2014 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2015 regno--)
2016 /* Note that we assume that the frame-pointer-register is one of these
2017 registers, in which case we don't count it here. */
2018 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2019 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 2020 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2021 stack_space_to_allocate += 8;
2022
2023 /* If we do have a frame-pointer, add room for it. */
2024 if (frame_pointer_needed)
2025 stack_space_to_allocate += 8;
2026
2027 /* If we have a non-local label, we need to be able to unwind to it, so
2028 store the current register stack pointer. Also store the return
2029 address if we do that. */
2030 if (MMIX_CFUN_HAS_LANDING_PAD)
2031 stack_space_to_allocate += 16;
2032 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2033 /* If we do have a saved return-address slot, add room for it. */
2034 stack_space_to_allocate += 8;
2035
2036 /* Make sure we don't get an unaligned stack. */
2037 if ((stack_space_to_allocate % 8) != 0)
7781aa77 2038 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 2039 stack_space_to_allocate);
2040
abe32cce 2041 if (crtl->args.pretend_args_size)
d3310704 2042 {
2043 int mmix_first_vararg_reg
2044 = (MMIX_FIRST_INCOMING_ARG_REGNUM
2045 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 2046 - crtl->args.pretend_args_size / 8));
d3310704 2047
2048 for (regno
2049 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
2050 regno >= mmix_first_vararg_reg;
2051 regno--)
2052 {
2053 if (offset < 0)
2054 {
2055 HOST_WIDE_INT stack_chunk
2056 = stack_space_to_allocate > (256 - 8)
2057 ? (256 - 8) : stack_space_to_allocate;
2058
2059 mmix_emit_sp_add (-stack_chunk);
2060 offset += stack_chunk;
2061 stack_space_to_allocate -= stack_chunk;
2062 }
2063
2064 /* These registers aren't actually saved (as in "will be
2065 restored"), so don't tell DWARF2 they're saved. */
2066 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2067 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2068 offset)),
2069 gen_rtx_REG (DImode, regno));
2070 offset -= 8;
2071 }
2072 }
2073
2074 /* Store the frame-pointer. */
2075
2076 if (frame_pointer_needed)
2077 {
2078 rtx insn;
2079
2080 if (offset < 0)
2081 {
2082 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2083 HOST_WIDE_INT stack_chunk
2084 = stack_space_to_allocate > (256 - 8 - 8)
2085 ? (256 - 8 - 8) : stack_space_to_allocate;
2086
2087 mmix_emit_sp_add (-stack_chunk);
2088
2089 offset += stack_chunk;
2090 stack_space_to_allocate -= stack_chunk;
2091 }
2092
2093 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2094 plus_constant (Pmode,
2095 stack_pointer_rtx,
d3310704 2096 offset)),
2097 hard_frame_pointer_rtx);
2098 RTX_FRAME_RELATED_P (insn) = 1;
2099 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2100 stack_pointer_rtx,
2101 GEN_INT (offset + 8)));
2102 RTX_FRAME_RELATED_P (insn) = 1;
2103 offset -= 8;
2104 }
2105
2106 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2107 {
2108 rtx tmpreg, retreg;
2109 rtx insn;
2110
2111 /* Store the return-address, if one is needed on the stack. We
2112 usually store it in a register when needed, but that doesn't work
2113 with -fexceptions. */
2114
2115 if (offset < 0)
2116 {
2117 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2118 HOST_WIDE_INT stack_chunk
2119 = stack_space_to_allocate > (256 - 8 - 8)
2120 ? (256 - 8 - 8) : stack_space_to_allocate;
2121
2122 mmix_emit_sp_add (-stack_chunk);
2123
2124 offset += stack_chunk;
2125 stack_space_to_allocate -= stack_chunk;
2126 }
2127
2128 tmpreg = gen_rtx_REG (DImode, 255);
2129 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2130
2131 /* Dwarf2 code is confused by the use of a temporary register for
2132 storing the return address, so we have to express it as a note,
2133 which we attach to the actual store insn. */
2134 emit_move_insn (tmpreg, retreg);
2135
2136 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2137 plus_constant (Pmode,
2138 stack_pointer_rtx,
d3310704 2139 offset)),
2140 tmpreg);
2141 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2142 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
2143 gen_rtx_SET (VOIDmode,
2144 gen_rtx_MEM (DImode,
29c05e22 2145 plus_constant (Pmode,
2146 stack_pointer_rtx,
c0dae7df 2147 offset)),
2148 retreg));
d3310704 2149
2150 offset -= 8;
2151 }
2152 else if (MMIX_CFUN_HAS_LANDING_PAD)
2153 offset -= 8;
2154
2155 if (MMIX_CFUN_HAS_LANDING_PAD)
2156 {
2157 /* Store the register defining the numbering of local registers, so
2158 we know how long to unwind the register stack. */
2159
2160 if (offset < 0)
2161 {
2162 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2163 HOST_WIDE_INT stack_chunk
2164 = stack_space_to_allocate > (256 - 8 - 8)
2165 ? (256 - 8 - 8) : stack_space_to_allocate;
2166
2167 mmix_emit_sp_add (-stack_chunk);
2168
2169 offset += stack_chunk;
2170 stack_space_to_allocate -= stack_chunk;
2171 }
2172
2173 /* We don't tell dwarf2 about this one; we just have it to unwind
2174 the register stack at landing pads. FIXME: It's a kludge because
2175 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2176 register stack at the moment. Best thing would be to handle it
2177 like stack-pointer offsets. Better: some hook into dwarf2out.c
2178 to produce DW_CFA_expression:s that specify the increment of rO,
2179 and unwind it at eh_return (preferred) or at the landing pad.
2180 Then saves to $0..$G-1 could be specified through that register. */
2181
2182 emit_move_insn (gen_rtx_REG (DImode, 255),
2183 gen_rtx_REG (DImode,
2184 MMIX_rO_REGNUM));
2185 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2186 plus_constant (Pmode, stack_pointer_rtx,
2187 offset)),
d3310704 2188 gen_rtx_REG (DImode, 255));
2189 offset -= 8;
2190 }
2191
2192 /* After the return-address and the frame-pointer, we have the local
2193 variables. They're the ones that may have an "unaligned" size. */
2194 offset -= (locals_size + 7) & ~7;
2195
2196 /* Now store all registers that are global, i.e. not saved by the
2197 register file machinery.
2198
2199 It is assumed that the frame-pointer is one of these registers, so it
2200 is explicitly excluded in the count. */
2201
2202 for (regno = 255;
2203 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2204 regno--)
2205 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2206 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2207 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2208 {
2209 rtx insn;
2210
2211 if (offset < 0)
2212 {
2213 HOST_WIDE_INT stack_chunk
2214 = (stack_space_to_allocate > (256 - offset - 8)
2215 ? (256 - offset - 8) : stack_space_to_allocate);
2216
2217 mmix_emit_sp_add (-stack_chunk);
2218 offset += stack_chunk;
2219 stack_space_to_allocate -= stack_chunk;
2220 }
2221
2222 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2223 plus_constant (Pmode,
2224 stack_pointer_rtx,
d3310704 2225 offset)),
2226 gen_rtx_REG (DImode, regno));
2227 RTX_FRAME_RELATED_P (insn) = 1;
2228 offset -= 8;
2229 }
2230
2231 /* Finally, allocate room for outgoing args and local vars if room
2232 wasn't allocated above. */
2233 if (stack_space_to_allocate)
2234 mmix_emit_sp_add (-stack_space_to_allocate);
2235}
2236
2237/* Expands the function epilogue into RTX. */
2238
2239void
7585fcd5 2240mmix_expand_epilogue (void)
d3310704 2241{
2242 HOST_WIDE_INT locals_size = get_frame_size ();
2243 int regno;
2244 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2245 = (crtl->outgoing_args_size
2246 + crtl->args.pretend_args_size
d3310704 2247 + locals_size + 7) & ~7;
2248
d3310704 2249 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2250 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2251
2252 /* Add the space for global non-register-stack registers.
2253 It is assumed that the frame-pointer register can be one of these
2254 registers, in which case it is excluded from the count when needed. */
2255 for (regno = 255;
2256 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2257 regno--)
2258 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2259 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2260 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2261 stack_space_to_deallocate += 8;
2262
2263 /* Add in the space for register stack-pointer. If so, always add room
2264 for the saved PC. */
2265 if (MMIX_CFUN_HAS_LANDING_PAD)
2266 stack_space_to_deallocate += 16;
2267 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2268 /* If we have a saved return-address slot, add it in. */
2269 stack_space_to_deallocate += 8;
2270
2271 /* Add in the frame-pointer. */
2272 if (frame_pointer_needed)
2273 stack_space_to_deallocate += 8;
2274
2275 /* Make sure we don't get an unaligned stack. */
2276 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2277 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2278 stack_space_to_deallocate);
2279
2280 /* We will add back small offsets to the stack pointer as we go.
2281 First, we restore all registers that are global, i.e. not saved by
2282 the register file machinery. */
2283
2284 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2285 regno <= 255;
2286 regno++)
2287 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2288 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2289 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2290 {
2291 if (offset > 255)
2292 {
2293 mmix_emit_sp_add (offset);
2294 stack_space_to_deallocate -= offset;
2295 offset = 0;
2296 }
2297
2298 emit_move_insn (gen_rtx_REG (DImode, regno),
2299 gen_rtx_MEM (DImode,
29c05e22 2300 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2301 offset)));
2302 offset += 8;
2303 }
2304
2305 /* Here is where the local variables were. As in the prologue, they
2306 might be of an unaligned size. */
2307 offset += (locals_size + 7) & ~7;
2308
d3310704 2309 /* The saved register stack pointer is just below the frame-pointer
2310 register. We don't need to restore it "manually"; the POP
2311 instruction does that. */
2312 if (MMIX_CFUN_HAS_LANDING_PAD)
2313 offset += 16;
2314 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2315 /* The return-address slot is just below the frame-pointer register.
2316 We don't need to restore it because we don't really use it. */
2317 offset += 8;
2318
2319 /* Get back the old frame-pointer-value. */
2320 if (frame_pointer_needed)
2321 {
2322 if (offset > 255)
2323 {
2324 mmix_emit_sp_add (offset);
2325
2326 stack_space_to_deallocate -= offset;
2327 offset = 0;
2328 }
2329
2330 emit_move_insn (hard_frame_pointer_rtx,
2331 gen_rtx_MEM (DImode,
29c05e22 2332 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2333 offset)));
2334 offset += 8;
2335 }
2336
2337 /* We do not need to restore pretended incoming args, just add back
2338 offset to sp. */
2339 if (stack_space_to_deallocate != 0)
2340 mmix_emit_sp_add (stack_space_to_deallocate);
2341
18d50ae6 2342 if (crtl->calls_eh_return)
d3310704 2343 /* Adjust the (normal) stack-pointer to that of the receiver.
2344 FIXME: It would be nice if we could also adjust the register stack
2345 here, but we need to express it through DWARF 2 too. */
2346 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2347 gen_rtx_REG (DImode,
2348 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2349}
2350
68cbb7e3 2351/* Output an optimal sequence for setting a register to a specific
2352 constant. Used in an alternative for const_ints in movdi, and when
2353 using large stack-frame offsets.
2354
2355 Use do_begin_end to say if a line-starting TAB and newline before the
2356 first insn and after the last insn is wanted. */
2357
2358void
7585fcd5 2359mmix_output_register_setting (FILE *stream,
2360 int regno,
2361 HOST_WIDEST_INT value,
2362 int do_begin_end)
68cbb7e3 2363{
2364 if (do_begin_end)
2365 fprintf (stream, "\t");
2366
2367 if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
2368 {
2369 /* First, the one-insn cases. */
2370 mmix_output_shiftvalue_op_from_str (stream, "SET",
2371 (unsigned HOST_WIDEST_INT)
2372 value);
2373 fprintf (stream, " %s,", reg_names[regno]);
2374 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2375 }
2376 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2377 {
2378 /* We do this to get a bit more legible assembly code. The next
2379 alternative is mostly redundant with this. */
2380
2381 mmix_output_shiftvalue_op_from_str (stream, "SET",
2382 -(unsigned HOST_WIDEST_INT)
2383 value);
2384 fprintf (stream, " %s,", reg_names[regno]);
2385 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2386 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2387 reg_names[regno]);
2388 }
2389 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2390 {
2391 /* Slightly more expensive, the two-insn cases. */
2392
2393 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2394 is shiftable, or any other one-insn transformation of the value.
2395 FIXME: Check first if the value is "shiftable" by two loading
2396 with two insns, since it makes more readable assembly code (if
2397 anyone else cares). */
2398
2399 mmix_output_shiftvalue_op_from_str (stream, "SET",
2400 ~(unsigned HOST_WIDEST_INT)
2401 value);
2402 fprintf (stream, " %s,", reg_names[regno]);
2403 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2404 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2405 reg_names[regno]);
2406 }
2407 else
2408 {
2409 /* The generic case. 2..4 insns. */
25037517 2410 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2411 const char *op = "SET";
2412 const char *line_begin = "";
f0b228a5 2413 int insns = 0;
68cbb7e3 2414 int i;
f0b228a5 2415 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2416
f0b228a5 2417 /* Compute the number of insns needed to output this constant. */
2418 for (i = 0; i < 4 && tmpvalue != 0; i++)
2419 {
2420 if (tmpvalue & 65535)
2421 insns++;
2422 tmpvalue >>= 16;
2423 }
2424 if (TARGET_BASE_ADDRESSES && insns == 3)
2425 {
2426 /* The number three is based on a static observation on
2427 ghostscript-6.52. Two and four are excluded because there
2428 are too many such constants, and each unique constant (maybe
2429 offset by 1..255) were used few times compared to other uses,
2430 e.g. addresses.
2431
2432 We use base-plus-offset addressing to force it into a global
2433 register; we just use a "LDA reg,VALUE", which will cause the
2434 assembler and linker to DTRT (for constants as well as
2435 addresses). */
2436 fprintf (stream, "LDA %s,", reg_names[regno]);
2437 mmix_output_octa (stream, value, 0);
2438 }
2439 else
68cbb7e3 2440 {
f0b228a5 2441 /* Output pertinent parts of the 4-wyde sequence.
2442 Still more to do if we want this to be optimal, but hey...
2443 Note that the zero case has been handled above. */
2444 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2445 {
f0b228a5 2446 if (value & 65535)
2447 {
2448 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2449 higher_parts[i], reg_names[regno],
2450 (int) (value & 65535));
2451 /* The first one sets the rest of the bits to 0, the next
2452 ones add set bits. */
2453 op = "INC";
2454 line_begin = "\n\t";
2455 }
68cbb7e3 2456
f0b228a5 2457 value >>= 16;
2458 }
68cbb7e3 2459 }
2460 }
2461
2462 if (do_begin_end)
2463 fprintf (stream, "\n");
2464}
2465
2466/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2467 else return 0. */
2468
2469int
7585fcd5 2470mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2471{
2472 /* Shift by 16 bits per group, stop when we've found two groups with
2473 nonzero bits. */
2474 int i;
2475 int has_candidate = 0;
2476
2477 for (i = 0; i < 4; i++)
2478 {
2479 if (value & 65535)
2480 {
2481 if (has_candidate)
2482 return 0;
2483 else
2484 has_candidate = 1;
2485 }
2486
2487 value >>= 16;
2488 }
2489
2490 return 1;
2491}
2492
74f4459c 2493/* X and Y are two things to compare using CODE. Return the rtx for
2494 the cc-reg in the proper mode. */
68cbb7e3 2495
2496rtx
7585fcd5 2497mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2498{
2499 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2500 return gen_reg_rtx (ccmode);
68cbb7e3 2501}
2502
2503/* Local (static) helper functions. */
2504
d3310704 2505static void
7585fcd5 2506mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2507{
2508 rtx insn;
2509
2510 if (offset < 0)
2511 {
2512 /* Negative stack-pointer adjustments are allocations and appear in
2513 the prologue only. We mark them as frame-related so unwind and
2514 debug info is properly emitted for them. */
2515 if (offset > -255)
2516 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2517 stack_pointer_rtx,
2518 GEN_INT (offset)));
2519 else
2520 {
2521 rtx tmpr = gen_rtx_REG (DImode, 255);
2522 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2523 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2524 stack_pointer_rtx, tmpr));
2525 }
2526 RTX_FRAME_RELATED_P (insn) = 1;
2527 }
2528 else
2529 {
2530 /* Positive adjustments are in the epilogue only. Don't mark them
2531 as "frame-related" for unwind info. */
2532 if (CONST_OK_FOR_LETTER_P (offset, 'L'))
2533 emit_insn (gen_adddi3 (stack_pointer_rtx,
2534 stack_pointer_rtx,
2535 GEN_INT (offset)));
2536 else
2537 {
2538 rtx tmpr = gen_rtx_REG (DImode, 255);
2539 emit_move_insn (tmpr, GEN_INT (offset));
2540 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2541 stack_pointer_rtx, tmpr));
2542 }
2543 }
2544}
2545
68cbb7e3 2546/* Print operator suitable for doing something with a shiftable
ebb11c7b 2547 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2548
2549static void
7585fcd5 2550mmix_output_shiftvalue_op_from_str (FILE *stream,
2551 const char *mainop,
2552 HOST_WIDEST_INT value)
68cbb7e3 2553{
25037517 2554 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2555 int i;
2556
2557 if (! mmix_shiftable_wyde_value (value))
2558 {
2559 char s[sizeof ("0xffffffffffffffff")];
2560 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2561 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2562 }
2563
2564 for (i = 0; i < 4; i++)
2565 {
2566 /* We know we're through when we find one-bits in the low
2567 16 bits. */
2568 if (value & 0xffff)
2569 {
2570 fprintf (stream, "%s%s", mainop, op_part[i]);
2571 return;
2572 }
2573 value >>= 16;
2574 }
2575
2576 /* No bits set? Then it must have been zero. */
2577 fprintf (stream, "%sL", mainop);
2578}
2579
2580/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2581
2582static void
7585fcd5 2583mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2584{
2585 /* Snipped from final.c:output_addr_const. We need to avoid the
2586 presumed universal "0x" prefix. We can do it by replacing "0x" with
2587 "#0" here; we must avoid a space in the operands and no, the zero
2588 won't cause the number to be assumed in octal format. */
2589 char hex_format[sizeof (HOST_WIDEST_INT_PRINT_HEX)];
2590
2591 if (do_begin_end)
2592 fprintf (stream, "\tOCTA ");
2593
2594 strcpy (hex_format, HOST_WIDEST_INT_PRINT_HEX);
2595 hex_format[0] = '#';
2596 hex_format[1] = '0';
2597
2598 /* Provide a few alternative output formats depending on the number, to
2599 improve legibility of assembler output. */
2600 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2601 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2602 fprintf (stream, "%d", (int) value);
2603 else if (value > (HOST_WIDEST_INT) 0
2604 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2605 fprintf (stream, "#%x", (unsigned int) value);
2606 else
2607 fprintf (stream, hex_format, value);
2608
2609 if (do_begin_end)
2610 fprintf (stream, "\n");
2611}
2612
2613/* Print the presumed shiftable wyde argument shifted into place (to
2614 be output with an operand). */
2615
2616static void
7585fcd5 2617mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2618{
2619 int i;
2620
2621 if (! mmix_shiftable_wyde_value (value))
2622 {
2623 char s[16+2+1];
2624 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2625 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2626 }
2627
2628 for (i = 0; i < 4; i++)
68cbb7e3 2629 {
7585fcd5 2630 /* We know we're through when we find one-bits in the low 16 bits. */
2631 if (value & 0xffff)
2632 {
2633 fprintf (stream, "#%x", (int) (value & 0xffff));
2634 return;
2635 }
68cbb7e3 2636
2637 value >>= 16;
2638 }
2639
2640 /* No bits set? Then it must have been zero. */
2641 fprintf (stream, "0");
2642}
2643
2644/* Output an MMIX condition name corresponding to an operator
2645 and operands:
2646 (comparison_operator [(comparison_operator ...) (const_int 0)])
2647 which means we have to look at *two* operators.
2648
2649 The argument "reversed" refers to reversal of the condition (not the
2650 same as swapping the arguments). */
2651
2652static void
7a7fb407 2653mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2654{
2655 struct cc_conv
2656 {
2657 RTX_CODE cc;
2658
2659 /* The normal output cc-code. */
2660 const char *const normal;
2661
2662 /* The reversed cc-code, or NULL if invalid. */
2663 const char *const reversed;
2664 };
2665
2666 struct cc_type_conv
2667 {
2668 enum machine_mode cc_mode;
2669
21f1e711 2670 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2671 const struct cc_conv *const convs;
2672 };
2673
2674#undef CCEND
21f1e711 2675#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2676
2677 static const struct cc_conv cc_fun_convs[]
2678 = {{ORDERED, "Z", "P"},
2679 {UNORDERED, "P", "Z"},
2680 CCEND};
2681 static const struct cc_conv cc_fp_convs[]
2682 = {{GT, "P", NULL},
2683 {LT, "N", NULL},
2684 CCEND};
2685 static const struct cc_conv cc_fpeq_convs[]
2686 = {{NE, "Z", "P"},
2687 {EQ, "P", "Z"},
2688 CCEND};
2689 static const struct cc_conv cc_uns_convs[]
2690 = {{GEU, "NN", "N"},
2691 {GTU, "P", "NP"},
2692 {LEU, "NP", "P"},
2693 {LTU, "N", "NN"},
2694 CCEND};
2695 static const struct cc_conv cc_signed_convs[]
2696 = {{NE, "NZ", "Z"},
2697 {EQ, "Z", "NZ"},
2698 {GE, "NN", "N"},
2699 {GT, "P", "NP"},
2700 {LE, "NP", "P"},
2701 {LT, "N", "NN"},
2702 CCEND};
2703 static const struct cc_conv cc_di_convs[]
2704 = {{NE, "NZ", "Z"},
2705 {EQ, "Z", "NZ"},
2706 {GE, "NN", "N"},
2707 {GT, "P", "NP"},
2708 {LE, "NP", "P"},
2709 {LT, "N", "NN"},
2710 {GTU, "NZ", "Z"},
2711 {LEU, "Z", "NZ"},
2712 CCEND};
2713#undef CCEND
2714
2715 static const struct cc_type_conv cc_convs[]
2716 = {{CC_FUNmode, cc_fun_convs},
2717 {CC_FPmode, cc_fp_convs},
2718 {CC_FPEQmode, cc_fpeq_convs},
2719 {CC_UNSmode, cc_uns_convs},
2720 {CCmode, cc_signed_convs},
2721 {DImode, cc_di_convs}};
2722
3585dac7 2723 size_t i;
68cbb7e3 2724 int j;
2725
2726 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2727 RTX_CODE cc = GET_CODE (x);
2728
3585dac7 2729 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2730 {
2731 if (mode == cc_convs[i].cc_mode)
2732 {
21f1e711 2733 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2734 if (cc == cc_convs[i].convs[j].cc)
2735 {
2736 const char *mmix_cc
2737 = (reversed ? cc_convs[i].convs[j].reversed
2738 : cc_convs[i].convs[j].normal);
2739
2740 if (mmix_cc == NULL)
2741 fatal_insn ("MMIX Internal: Trying to output invalidly\
2742 reversed condition:", x);
2743
2744 fprintf (stream, "%s", mmix_cc);
2745 return;
2746 }
2747
2748 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2749 }
2750 }
2751
2752 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2753}
2754
2755/* Return the bit-value for a const_int or const_double. */
2756
2757static HOST_WIDEST_INT
7a7fb407 2758mmix_intval (const_rtx x)
68cbb7e3 2759{
2760 unsigned HOST_WIDEST_INT retval;
2761
2762 if (GET_CODE (x) == CONST_INT)
2763 return INTVAL (x);
2764
2765 /* We make a little song and dance because converting to long long in
2766 gcc-2.7.2 is broken. I still want people to be able to use it for
2767 cross-compilation to MMIX. */
2768 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2769 {
2770 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2771 {
2772 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2773 retval *= 2;
2774 retval |= CONST_DOUBLE_LOW (x) & 1;
2775
2776 retval |=
2777 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
f5b2b469 2778 << (HOST_BITS_PER_LONG)/2 << (HOST_BITS_PER_LONG)/2;
68cbb7e3 2779 }
2780 else
2781 retval = CONST_DOUBLE_HIGH (x);
2782
2783 return retval;
2784 }
2785
2786 if (GET_CODE (x) == CONST_DOUBLE)
2787 {
2788 REAL_VALUE_TYPE value;
2789
2790 /* FIXME: This macro is not in the manual but should be. */
2791 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2792
2793 if (GET_MODE (x) == DFmode)
2794 {
2795 long bits[2];
dc8dc4ce 2796
68cbb7e3 2797 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2798
ca2399d9 2799 /* The double cast is necessary to avoid getting the long
2800 sign-extended to unsigned long long(!) when they're of
2801 different size (usually 32-bit hosts). */
2802 return
2803 ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0]
2804 << (unsigned HOST_WIDEST_INT) 32U)
2805 | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1];
68cbb7e3 2806 }
2807 else if (GET_MODE (x) == SFmode)
2808 {
2809 long bits;
2810 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2811
2812 return (unsigned long) bits;
2813 }
2814 }
2815
2816 fatal_insn ("MMIX Internal: This is not a constant:", x);
2817}
2818
3b2411a8 2819/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2820
2821enum machine_mode
2822mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
2823 enum machine_mode mode,
2824 int *punsignedp ATTRIBUTE_UNUSED,
2825 const_tree fntype ATTRIBUTE_UNUSED,
2826 int for_return)
2827{
2828 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2829 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2830 if (for_return == 1)
3b2411a8 2831 return mode;
2832
2833 /* Promotion of modes currently generates slow code, extending before
2834 operation, so we do it only for arguments. */
2835 if (GET_MODE_CLASS (mode) == MODE_INT
2836 && GET_MODE_SIZE (mode) < 8)
2837 return DImode;
2838 else
2839 return mode;
2840}
9e4a734a 2841/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2842
2843static rtx
2844mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2845 int incoming ATTRIBUTE_UNUSED)
2846{
2847 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2848}
2849
5a1c68c3 2850/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2851
2852 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2853 of it; we can deduce the value. */
2854
2855bool
2856mmix_frame_pointer_required (void)
2857{
2858 return (cfun->has_nonlocal_label);
2859}
2860
68cbb7e3 2861/*
2862 * Local variables:
2863 * eval: (c-set-style "gnu")
2864 * indent-tabs-mode: t
2865 * End:
2866 */