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68cbb7e3 | 1 | /* Definitions of target machine for GNU compiler, for MMIX. |
d353bf18 | 2 | Copyright (C) 2000-2015 Free Software Foundation, Inc. |
68cbb7e3 | 3 | Contributed by Hans-Peter Nilsson (hp@bitrange.com) |
4 | ||
581084df | 5 | This file is part of GCC. |
68cbb7e3 | 6 | |
581084df | 7 | GCC is free software; you can redistribute it and/or modify |
68cbb7e3 | 8 | it under the terms of the GNU General Public License as published by |
038d1e19 | 9 | the Free Software Foundation; either version 3, or (at your option) |
68cbb7e3 | 10 | any later version. |
11 | ||
581084df | 12 | GCC is distributed in the hope that it will be useful, |
68cbb7e3 | 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
038d1e19 | 18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
68cbb7e3 | 20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
805e22b2 | 23 | #include "coretypes.h" |
9ef16211 | 24 | #include "backend.h" |
d040a5b0 | 25 | #include "cfghooks.h" |
9ef16211 | 26 | #include "tree.h" |
68cbb7e3 | 27 | #include "rtl.h" |
9ef16211 | 28 | #include "df.h" |
68cbb7e3 | 29 | #include "regs.h" |
68cbb7e3 | 30 | #include "insn-config.h" |
31 | #include "output.h" | |
94ea8568 | 32 | #include "cfgrtl.h" |
33 | #include "cfganal.h" | |
34 | #include "lcm.h" | |
35 | #include "cfgbuild.h" | |
36 | #include "cfgcleanup.h" | |
68cbb7e3 | 37 | #include "flags.h" |
9ed99284 | 38 | #include "varasm.h" |
39 | #include "stor-layout.h" | |
40 | #include "calls.h" | |
d53441c8 | 41 | #include "alias.h" |
42 | #include "expmed.h" | |
43 | #include "dojump.h" | |
44 | #include "explow.h" | |
45 | #include "emit-rtl.h" | |
46 | #include "stmt.h" | |
68cbb7e3 | 47 | #include "expr.h" |
0b205f4c | 48 | #include "diagnostic-core.h" |
68cbb7e3 | 49 | #include "recog.h" |
bde36f4a | 50 | #include "dwarf2.h" |
68cbb7e3 | 51 | #include "debug.h" |
52 | #include "tm_p.h" | |
68cbb7e3 | 53 | #include "target.h" |
f105c84e | 54 | #include "tm-constrs.h" |
f7715905 | 55 | #include "builtins.h" |
68cbb7e3 | 56 | |
0c71fb4f | 57 | /* This file should be included last. */ |
4b498588 | 58 | #include "target-def.h" |
59 | ||
68cbb7e3 | 60 | /* First some local helper definitions. */ |
61 | #define MMIX_FIRST_GLOBAL_REGNUM 32 | |
62 | ||
63 | /* We'd need a current_function_has_landing_pad. It's marked as such when | |
64 | a nonlocal_goto_receiver is expanded. Not just a C++ thing, but | |
65 | mostly. */ | |
66 | #define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0) | |
67 | ||
68 | /* We have no means to tell DWARF 2 about the register stack, so we need | |
69 | to store the return address on the stack if an exception can get into | |
d3310704 | 70 | this function. FIXME: Narrow condition. Before any whole-function |
3072d30e | 71 | analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date |
d3310704 | 72 | after reload_completed; it may contain incorrect information some time |
73 | before that. Within a RTL sequence (after a call to start_sequence, | |
74 | such as in RTL expanders), leaf_function_p doesn't see all insns | |
75 | (perhaps any insn). But regs_ever_live is up-to-date when | |
76 | leaf_function_p () isn't, so we "or" them together to get accurate | |
77 | information. FIXME: Some tweak to leaf_function_p might be | |
f024691d | 78 | preferable. */ |
d3310704 | 79 | #define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \ |
80 | (flag_exceptions \ | |
3072d30e | 81 | && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \ |
d3310704 | 82 | || !leaf_function_p ())) |
68cbb7e3 | 83 | |
84 | #define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \ | |
18d50ae6 | 85 | (crtl->calls_eh_return \ |
68cbb7e3 | 86 | && (EH_RETURN_DATA_REGNO (0) == REGNO \ |
87 | || EH_RETURN_DATA_REGNO (1) == REGNO \ | |
88 | || EH_RETURN_DATA_REGNO (2) == REGNO \ | |
89 | || EH_RETURN_DATA_REGNO (3) == REGNO)) | |
90 | ||
d68ffc6f | 91 | /* For the default ABI, we rename registers at output-time to fill the gap |
92 | between the (statically partitioned) saved registers and call-clobbered | |
93 | registers. In effect this makes unused call-saved registers to be used | |
94 | as call-clobbered registers. The benefit comes from keeping the number | |
95 | of local registers (value of rL) low, since there's a cost of | |
d3310704 | 96 | increasing rL and clearing unused (unset) registers with lower numbers. |
97 | Don't translate while outputting the prologue. */ | |
d68ffc6f | 98 | #define MMIX_OUTPUT_REGNO(N) \ |
99 | (TARGET_ABI_GNU \ | |
0b123c47 | 100 | || (int) (N) < MMIX_RETURN_VALUE_REGNUM \ |
101 | || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \ | |
d3310704 | 102 | || cfun == NULL \ |
103 | || cfun->machine == NULL \ | |
104 | || cfun->machine->in_prologue \ | |
d68ffc6f | 105 | ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \ |
106 | + cfun->machine->highest_saved_stack_register + 1)) | |
107 | ||
0b123c47 | 108 | /* The %d in "POP %d,0". */ |
109 | #define MMIX_POP_ARGUMENT() \ | |
110 | ((! TARGET_ABI_GNU \ | |
abe32cce | 111 | && crtl->return_rtx != NULL \ |
18d50ae6 | 112 | && ! cfun->returns_struct) \ |
abe32cce | 113 | ? (GET_CODE (crtl->return_rtx) == PARALLEL \ |
114 | ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \ | |
0b123c47 | 115 | : 0) |
116 | ||
68cbb7e3 | 117 | /* The canonical saved comparison operands for non-cc0 machines, set in |
118 | the compare expander. */ | |
119 | rtx mmix_compare_op0; | |
120 | rtx mmix_compare_op1; | |
121 | ||
68cbb7e3 | 122 | /* Declarations of locals. */ |
123 | ||
68cbb7e3 | 124 | /* Intermediate for insn output. */ |
125 | static int mmix_output_destination_register; | |
126 | ||
4c834714 | 127 | static void mmix_option_override (void); |
40fe393f | 128 | static void mmix_asm_output_source_filename (FILE *, const char *); |
68cbb7e3 | 129 | static void mmix_output_shiftvalue_op_from_str |
3a4303e7 | 130 | (FILE *, const char *, int64_t); |
131 | static void mmix_output_shifted_value (FILE *, int64_t); | |
7a7fb407 | 132 | static void mmix_output_condition (FILE *, const_rtx, int); |
3a4303e7 | 133 | static void mmix_output_octa (FILE *, int64_t, int); |
7585fcd5 | 134 | static bool mmix_assemble_integer (rtx, unsigned int, int); |
135 | static struct machine_function *mmix_init_machine_status (void); | |
136 | static void mmix_encode_section_info (tree, rtx, int); | |
137 | static const char *mmix_strip_name_encoding (const char *); | |
138 | static void mmix_emit_sp_add (HOST_WIDE_INT offset); | |
139 | static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); | |
140 | static void mmix_target_asm_function_end_prologue (FILE *); | |
141 | static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); | |
27925877 | 142 | static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); |
143 | static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); | |
3754d046 | 144 | static bool mmix_legitimate_address_p (machine_mode, rtx, bool); |
145 | static bool mmix_legitimate_constant_p (machine_mode, rtx); | |
7585fcd5 | 146 | static void mmix_reorg (void); |
6988553d | 147 | static void mmix_asm_output_mi_thunk |
7585fcd5 | 148 | (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); |
9e4a734a | 149 | static void mmix_setup_incoming_varargs |
3754d046 | 150 | (cumulative_args_t, machine_mode, tree, int *, int); |
7585fcd5 | 151 | static void mmix_file_start (void); |
152 | static void mmix_file_end (void); | |
5ae4887d | 153 | static bool mmix_rtx_costs (rtx, machine_mode, int, int, int *, bool); |
3754d046 | 154 | static int mmix_register_move_cost (machine_mode, |
f7e13ca6 | 155 | reg_class_t, reg_class_t); |
9e4a734a | 156 | static rtx mmix_struct_value_rtx (tree, int); |
3754d046 | 157 | static machine_mode mmix_promote_function_mode (const_tree, |
158 | machine_mode, | |
3b2411a8 | 159 | int *, const_tree, int); |
3754d046 | 160 | static void mmix_function_arg_advance (cumulative_args_t, machine_mode, |
5d246ebf | 161 | const_tree, bool); |
3754d046 | 162 | static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode, |
5d246ebf | 163 | const_tree, bool, bool); |
3754d046 | 164 | static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode, |
5d246ebf | 165 | const_tree, bool); |
3754d046 | 166 | static rtx mmix_function_arg (cumulative_args_t, machine_mode, |
5d246ebf | 167 | const_tree, bool); |
b600778c | 168 | static rtx mmix_function_value (const_tree, const_tree, bool); |
3754d046 | 169 | static rtx mmix_libcall_value (machine_mode, const_rtx); |
b600778c | 170 | static bool mmix_function_value_regno_p (const unsigned int); |
39cba157 | 171 | static bool mmix_pass_by_reference (cumulative_args_t, |
3754d046 | 172 | machine_mode, const_tree, bool); |
5a1c68c3 | 173 | static bool mmix_frame_pointer_required (void); |
604d844a | 174 | static void mmix_asm_trampoline_template (FILE *); |
175 | static void mmix_trampoline_init (rtx, tree, rtx); | |
7a7fb407 | 176 | static void mmix_print_operand (FILE *, rtx, int); |
177 | static void mmix_print_operand_address (FILE *, rtx); | |
178 | static bool mmix_print_operand_punct_valid_p (unsigned char); | |
b2d7ede1 | 179 | static void mmix_conditional_register_usage (void); |
68cbb7e3 | 180 | |
181 | /* Target structure macros. Listed by node. See `Using and Porting GCC' | |
182 | for a general description. */ | |
183 | ||
184 | /* Node: Function Entry */ | |
185 | ||
58356836 | 186 | #undef TARGET_ASM_BYTE_OP |
187 | #define TARGET_ASM_BYTE_OP NULL | |
188 | #undef TARGET_ASM_ALIGNED_HI_OP | |
189 | #define TARGET_ASM_ALIGNED_HI_OP NULL | |
190 | #undef TARGET_ASM_ALIGNED_SI_OP | |
191 | #define TARGET_ASM_ALIGNED_SI_OP NULL | |
192 | #undef TARGET_ASM_ALIGNED_DI_OP | |
193 | #define TARGET_ASM_ALIGNED_DI_OP NULL | |
194 | #undef TARGET_ASM_INTEGER | |
195 | #define TARGET_ASM_INTEGER mmix_assemble_integer | |
196 | ||
68cbb7e3 | 197 | #undef TARGET_ASM_FUNCTION_PROLOGUE |
198 | #define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue | |
199 | ||
d3310704 | 200 | #undef TARGET_ASM_FUNCTION_END_PROLOGUE |
201 | #define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue | |
202 | ||
68cbb7e3 | 203 | #undef TARGET_ASM_FUNCTION_EPILOGUE |
204 | #define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue | |
205 | ||
7a7fb407 | 206 | #undef TARGET_PRINT_OPERAND |
207 | #define TARGET_PRINT_OPERAND mmix_print_operand | |
208 | #undef TARGET_PRINT_OPERAND_ADDRESS | |
209 | #define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address | |
210 | #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P | |
211 | #define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p | |
212 | ||
7811991d | 213 | #undef TARGET_ENCODE_SECTION_INFO |
214 | #define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info | |
7b4a38a6 | 215 | #undef TARGET_STRIP_NAME_ENCODING |
216 | #define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding | |
7811991d | 217 | |
6988553d | 218 | #undef TARGET_ASM_OUTPUT_MI_THUNK |
219 | #define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk | |
eb344f43 | 220 | #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK |
221 | #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall | |
92c473b8 | 222 | #undef TARGET_ASM_FILE_START |
223 | #define TARGET_ASM_FILE_START mmix_file_start | |
224 | #undef TARGET_ASM_FILE_START_FILE_DIRECTIVE | |
225 | #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true | |
f6940372 | 226 | #undef TARGET_ASM_FILE_END |
227 | #define TARGET_ASM_FILE_END mmix_file_end | |
40fe393f | 228 | #undef TARGET_ASM_OUTPUT_SOURCE_FILENAME |
229 | #define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename | |
6988553d | 230 | |
b2d7ede1 | 231 | #undef TARGET_CONDITIONAL_REGISTER_USAGE |
232 | #define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage | |
233 | ||
fab7adbf | 234 | #undef TARGET_RTX_COSTS |
235 | #define TARGET_RTX_COSTS mmix_rtx_costs | |
ec0457a8 | 236 | #undef TARGET_ADDRESS_COST |
d9c5e5f4 | 237 | #define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0 |
fab7adbf | 238 | |
f7e13ca6 | 239 | #undef TARGET_REGISTER_MOVE_COST |
240 | #define TARGET_REGISTER_MOVE_COST mmix_register_move_cost | |
241 | ||
2efea8c0 | 242 | #undef TARGET_MACHINE_DEPENDENT_REORG |
243 | #define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg | |
244 | ||
3b2411a8 | 245 | #undef TARGET_PROMOTE_FUNCTION_MODE |
246 | #define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode | |
247 | ||
b600778c | 248 | #undef TARGET_FUNCTION_VALUE |
249 | #define TARGET_FUNCTION_VALUE mmix_function_value | |
250 | #undef TARGET_LIBCALL_VALUE | |
251 | #define TARGET_LIBCALL_VALUE mmix_libcall_value | |
252 | #undef TARGET_FUNCTION_VALUE_REGNO_P | |
253 | #define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p | |
9e4a734a | 254 | |
5d246ebf | 255 | #undef TARGET_FUNCTION_ARG |
256 | #define TARGET_FUNCTION_ARG mmix_function_arg | |
257 | #undef TARGET_FUNCTION_INCOMING_ARG | |
258 | #define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg | |
259 | #undef TARGET_FUNCTION_ARG_ADVANCE | |
260 | #define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance | |
9e4a734a | 261 | #undef TARGET_STRUCT_VALUE_RTX |
262 | #define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx | |
9e4a734a | 263 | #undef TARGET_SETUP_INCOMING_VARARGS |
264 | #define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs | |
b981d932 | 265 | #undef TARGET_PASS_BY_REFERENCE |
266 | #define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference | |
13f08ee7 | 267 | #undef TARGET_CALLEE_COPIES |
268 | #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true | |
9e4a734a | 269 | |
27925877 | 270 | #undef TARGET_PREFERRED_RELOAD_CLASS |
271 | #define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class | |
272 | #undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS | |
f7b18294 | 273 | #define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class |
27925877 | 274 | |
fd50b071 | 275 | #undef TARGET_LEGITIMATE_ADDRESS_P |
276 | #define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p | |
ca316360 | 277 | #undef TARGET_LEGITIMATE_CONSTANT_P |
278 | #define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p | |
fd50b071 | 279 | |
5a1c68c3 | 280 | #undef TARGET_FRAME_POINTER_REQUIRED |
281 | #define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required | |
282 | ||
604d844a | 283 | #undef TARGET_ASM_TRAMPOLINE_TEMPLATE |
284 | #define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template | |
285 | #undef TARGET_TRAMPOLINE_INIT | |
286 | #define TARGET_TRAMPOLINE_INIT mmix_trampoline_init | |
287 | ||
4c834714 | 288 | #undef TARGET_OPTION_OVERRIDE |
289 | #define TARGET_OPTION_OVERRIDE mmix_option_override | |
290 | ||
68cbb7e3 | 291 | struct gcc_target targetm = TARGET_INITIALIZER; |
292 | ||
293 | /* Functions that are expansions for target macros. | |
294 | See Target Macros in `Using and Porting GCC'. */ | |
295 | ||
4c834714 | 296 | /* TARGET_OPTION_OVERRIDE. */ |
68cbb7e3 | 297 | |
4c834714 | 298 | static void |
299 | mmix_option_override (void) | |
68cbb7e3 | 300 | { |
301 | /* Should we err or should we warn? Hmm. At least we must neutralize | |
302 | it. For example the wrong kind of case-tables will be generated with | |
303 | PIC; we use absolute address items for mmixal compatibility. FIXME: | |
304 | They could be relative if we just elide them to after all pertinent | |
305 | labels. */ | |
306 | if (flag_pic) | |
307 | { | |
c3ceba8e | 308 | warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic"); |
68cbb7e3 | 309 | flag_pic = 0; |
310 | } | |
68cbb7e3 | 311 | } |
312 | ||
313 | /* INIT_EXPANDERS. */ | |
314 | ||
315 | void | |
7585fcd5 | 316 | mmix_init_expanders (void) |
68cbb7e3 | 317 | { |
318 | init_machine_status = mmix_init_machine_status; | |
319 | } | |
320 | ||
321 | /* Set the per-function data. */ | |
322 | ||
1f3233d1 | 323 | static struct machine_function * |
7585fcd5 | 324 | mmix_init_machine_status (void) |
68cbb7e3 | 325 | { |
25a27413 | 326 | return ggc_cleared_alloc<machine_function> (); |
68cbb7e3 | 327 | } |
328 | ||
a16734cd | 329 | /* DATA_ABI_ALIGNMENT. |
68cbb7e3 | 330 | We have trouble getting the address of stuff that is located at other |
331 | than 32-bit alignments (GETA requirements), so try to give everything | |
1d60d981 | 332 | at least 32-bit alignment. */ |
68cbb7e3 | 333 | |
334 | int | |
7585fcd5 | 335 | mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align) |
68cbb7e3 | 336 | { |
337 | if (basic_align < 32) | |
338 | return 32; | |
339 | ||
340 | return basic_align; | |
341 | } | |
342 | ||
343 | /* CONSTANT_ALIGNMENT. */ | |
344 | ||
345 | int | |
7585fcd5 | 346 | mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align) |
68cbb7e3 | 347 | { |
348 | if (basic_align < 32) | |
349 | return 32; | |
350 | ||
351 | return basic_align; | |
352 | } | |
353 | ||
354 | /* LOCAL_ALIGNMENT. */ | |
355 | ||
c0dae7df | 356 | unsigned |
357 | mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align) | |
68cbb7e3 | 358 | { |
359 | if (basic_align < 32) | |
360 | return 32; | |
361 | ||
362 | return basic_align; | |
363 | } | |
364 | ||
b2d7ede1 | 365 | /* TARGET_CONDITIONAL_REGISTER_USAGE. */ |
68cbb7e3 | 366 | |
b2d7ede1 | 367 | static void |
7585fcd5 | 368 | mmix_conditional_register_usage (void) |
68cbb7e3 | 369 | { |
370 | int i; | |
371 | ||
372 | if (TARGET_ABI_GNU) | |
373 | { | |
374 | static const int gnu_abi_reg_alloc_order[] | |
375 | = MMIX_GNU_ABI_REG_ALLOC_ORDER; | |
376 | ||
377 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
378 | reg_alloc_order[i] = gnu_abi_reg_alloc_order[i]; | |
379 | ||
380 | /* Change the default from the mmixware ABI. For the GNU ABI, | |
381 | $15..$30 are call-saved just as $0..$14. There must be one | |
d3310704 | 382 | call-clobbered local register for the "hole" that holds the |
383 | number of saved local registers saved by PUSHJ/PUSHGO during the | |
384 | function call, receiving the return value at return. So best is | |
385 | to use the highest, $31. It's already marked call-clobbered for | |
386 | the mmixware ABI. */ | |
68cbb7e3 | 387 | for (i = 15; i <= 30; i++) |
388 | call_used_regs[i] = 0; | |
f0b228a5 | 389 | |
390 | /* "Unfix" the parameter registers. */ | |
391 | for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM; | |
392 | i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS; | |
393 | i++) | |
394 | fixed_regs[i] = 0; | |
68cbb7e3 | 395 | } |
396 | ||
397 | /* Step over the ":" in special register names. */ | |
398 | if (! TARGET_TOPLEVEL_SYMBOLS) | |
399 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
400 | if (reg_names[i][0] == ':') | |
401 | reg_names[i]++; | |
402 | } | |
403 | ||
6d1f3d31 | 404 | /* INCOMING_REGNO and OUTGOING_REGNO worker function. |
405 | Those two macros must only be applied to function argument | |
4d19e7b3 | 406 | registers and the function return value register for the opposite |
407 | use. FIXME: for their current use in gcc, it'd be better with an | |
408 | explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la | |
409 | TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of | |
5d246ebf | 410 | forcing the target to commit to a fixed mapping and for any |
4d19e7b3 | 411 | unspecified register use. Particularly when thinking about the |
412 | return-value, it is better to imagine INCOMING_REGNO and | |
413 | OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as | |
414 | named CALLER_TO_CALLEE_REGNO because the direction. The "incoming" | |
415 | and "outgoing" is from the perspective of the parameter-registers, | |
416 | but the same macro is (must be, lacking an alternative like | |
417 | suggested above) used to map the return-value-register from the | |
418 | same perspective. To make directions even more confusing, the macro | |
419 | MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register | |
420 | in which to return a value, i.e. INCOMING_REGNO for the return-value- | |
421 | register as received from a called function; the return-value on the | |
422 | way out. */ | |
6d1f3d31 | 423 | |
424 | int | |
425 | mmix_opposite_regno (int regno, int incoming) | |
426 | { | |
4d19e7b3 | 427 | if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM) |
428 | return MMIX_RETURN_VALUE_REGNUM; | |
429 | ||
430 | if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM) | |
431 | return MMIX_OUTGOING_RETURN_VALUE_REGNUM; | |
432 | ||
6d1f3d31 | 433 | if (!mmix_function_arg_regno_p (regno, incoming)) |
434 | return regno; | |
435 | ||
436 | return | |
437 | regno - (incoming | |
438 | ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM | |
439 | : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM); | |
440 | } | |
441 | ||
d3310704 | 442 | /* LOCAL_REGNO. |
443 | All registers that are part of the register stack and that will be | |
444 | saved are local. */ | |
445 | ||
446 | int | |
7585fcd5 | 447 | mmix_local_regno (int regno) |
d3310704 | 448 | { |
449 | return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno]; | |
450 | } | |
451 | ||
27925877 | 452 | /* TARGET_PREFERRED_RELOAD_CLASS. |
68cbb7e3 | 453 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
454 | ||
27925877 | 455 | static reg_class_t |
456 | mmix_preferred_reload_class (rtx x, reg_class_t rclass) | |
68cbb7e3 | 457 | { |
458 | /* FIXME: Revisit. */ | |
459 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
8deb3959 | 460 | ? REMAINDER_REG : rclass; |
68cbb7e3 | 461 | } |
462 | ||
27925877 | 463 | /* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. |
68cbb7e3 | 464 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
465 | ||
27925877 | 466 | static reg_class_t |
467 | mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) | |
68cbb7e3 | 468 | { |
469 | /* FIXME: Revisit. */ | |
470 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
8deb3959 | 471 | ? REMAINDER_REG : rclass; |
68cbb7e3 | 472 | } |
473 | ||
474 | /* SECONDARY_RELOAD_CLASS. | |
475 | We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */ | |
476 | ||
477 | enum reg_class | |
8deb3959 | 478 | mmix_secondary_reload_class (enum reg_class rclass, |
3754d046 | 479 | machine_mode mode ATTRIBUTE_UNUSED, |
7585fcd5 | 480 | rtx x ATTRIBUTE_UNUSED, |
481 | int in_p ATTRIBUTE_UNUSED) | |
68cbb7e3 | 482 | { |
8deb3959 | 483 | if (rclass == REMAINDER_REG |
484 | || rclass == HIMULT_REG | |
485 | || rclass == SYSTEM_REGS) | |
68cbb7e3 | 486 | return GENERAL_REGS; |
487 | ||
68cbb7e3 | 488 | return NO_REGS; |
489 | } | |
490 | ||
68cbb7e3 | 491 | /* DYNAMIC_CHAIN_ADDRESS. */ |
492 | ||
493 | rtx | |
7585fcd5 | 494 | mmix_dynamic_chain_address (rtx frame) |
68cbb7e3 | 495 | { |
496 | /* FIXME: the frame-pointer is stored at offset -8 from the current | |
497 | frame-pointer. Unfortunately, the caller assumes that a | |
498 | frame-pointer is present for *all* previous frames. There should be | |
499 | a way to say that that cannot be done, like for RETURN_ADDR_RTX. */ | |
29c05e22 | 500 | return plus_constant (Pmode, frame, -8); |
68cbb7e3 | 501 | } |
502 | ||
503 | /* STARTING_FRAME_OFFSET. */ | |
504 | ||
505 | int | |
7585fcd5 | 506 | mmix_starting_frame_offset (void) |
68cbb7e3 | 507 | { |
508 | /* The old frame pointer is in the slot below the new one, so | |
509 | FIRST_PARM_OFFSET does not need to depend on whether the | |
510 | frame-pointer is needed or not. We have to adjust for the register | |
511 | stack pointer being located below the saved frame pointer. | |
512 | Similarly, we store the return address on the stack too, for | |
513 | exception handling, and always if we save the register stack pointer. */ | |
514 | return | |
515 | (-8 | |
516 | + (MMIX_CFUN_HAS_LANDING_PAD | |
517 | ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0))); | |
518 | } | |
519 | ||
520 | /* RETURN_ADDR_RTX. */ | |
521 | ||
522 | rtx | |
7585fcd5 | 523 | mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED) |
68cbb7e3 | 524 | { |
525 | return count == 0 | |
526 | ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS | |
af08e904 | 527 | /* FIXME: Set frame_alias_set on the following. (Why?) |
528 | See mmix_initial_elimination_offset for the reason we can't use | |
529 | get_hard_reg_initial_val for both. Always using a stack slot | |
530 | and not a register would be suboptimal. */ | |
29c05e22 | 531 | ? validize_mem (gen_rtx_MEM (Pmode, |
532 | plus_constant (Pmode, | |
533 | frame_pointer_rtx, -16))) | |
68cbb7e3 | 534 | : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM)) |
535 | : NULL_RTX; | |
536 | } | |
537 | ||
538 | /* SETUP_FRAME_ADDRESSES. */ | |
539 | ||
540 | void | |
7585fcd5 | 541 | mmix_setup_frame_addresses (void) |
68cbb7e3 | 542 | { |
543 | /* Nothing needed at the moment. */ | |
544 | } | |
545 | ||
546 | /* The difference between the (imaginary) frame pointer and the stack | |
547 | pointer. Used to eliminate the frame pointer. */ | |
548 | ||
549 | int | |
7585fcd5 | 550 | mmix_initial_elimination_offset (int fromreg, int toreg) |
68cbb7e3 | 551 | { |
552 | int regno; | |
553 | int fp_sp_offset | |
abe32cce | 554 | = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7; |
68cbb7e3 | 555 | |
af08e904 | 556 | /* There is no actual offset between these two virtual values, but for |
557 | the frame-pointer, we have the old one in the stack position below | |
558 | it, so the offset for the frame-pointer to the stack-pointer is one | |
559 | octabyte larger. */ | |
68cbb7e3 | 560 | if (fromreg == MMIX_ARG_POINTER_REGNUM |
561 | && toreg == MMIX_FRAME_POINTER_REGNUM) | |
562 | return 0; | |
563 | ||
564 | /* The difference is the size of local variables plus the size of | |
565 | outgoing function arguments that would normally be passed as | |
566 | registers but must be passed on stack because we're out of | |
567 | function-argument registers. Only global saved registers are | |
568 | counted; the others go on the register stack. | |
569 | ||
570 | The frame-pointer is counted too if it is what is eliminated, as we | |
571 | need to balance the offset for it from STARTING_FRAME_OFFSET. | |
572 | ||
573 | Also add in the slot for the register stack pointer we save if we | |
574 | have a landing pad. | |
575 | ||
576 | Unfortunately, we can't access $0..$14, from unwinder code easily, so | |
577 | store the return address in a frame slot too. FIXME: Only for | |
578 | non-leaf functions. FIXME: Always with a landing pad, because it's | |
579 | hard to know whether we need the other at the time we know we need | |
580 | the offset for one (and have to state it). It's a kludge until we | |
581 | can express the register stack in the EH frame info. | |
582 | ||
583 | We have to do alignment here; get_frame_size will not return a | |
584 | multiple of STACK_BOUNDARY. FIXME: Add note in manual. */ | |
585 | ||
586 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
587 | regno <= 255; | |
588 | regno++) | |
3072d30e | 589 | if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
68cbb7e3 | 590 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
591 | fp_sp_offset += 8; | |
592 | ||
593 | return fp_sp_offset | |
594 | + (MMIX_CFUN_HAS_LANDING_PAD | |
595 | ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0)) | |
596 | + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8); | |
597 | } | |
598 | ||
5d246ebf | 599 | static void |
3754d046 | 600 | mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode, |
5d246ebf | 601 | const_tree type, bool named ATTRIBUTE_UNUSED) |
602 | { | |
39cba157 | 603 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
5d246ebf | 604 | int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type); |
605 | ||
606 | argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type) | |
607 | || (arg_size > 8 | |
608 | && !TARGET_LIBFUNC | |
609 | && !argsp->lib)) | |
610 | ? (MMIX_MAX_ARGS_IN_REGS) + 1 | |
611 | : argsp->regs + (7 + arg_size) / 8); | |
612 | } | |
68cbb7e3 | 613 | |
5d246ebf | 614 | /* Helper function for mmix_function_arg and mmix_function_incoming_arg. */ |
615 | ||
616 | static rtx | |
39cba157 | 617 | mmix_function_arg_1 (const cumulative_args_t argsp_v, |
3754d046 | 618 | machine_mode mode, |
5d246ebf | 619 | const_tree type, |
620 | bool named ATTRIBUTE_UNUSED, | |
621 | bool incoming) | |
68cbb7e3 | 622 | { |
39cba157 | 623 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
624 | ||
68cbb7e3 | 625 | /* Last-argument marker. */ |
626 | if (type == void_type_node) | |
627 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS) | |
628 | ? gen_rtx_REG (mode, | |
629 | (incoming | |
630 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
631 | : MMIX_FIRST_ARG_REGNUM) + argsp->regs) | |
632 | : NULL_RTX; | |
633 | ||
634 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS | |
0336f0f0 | 635 | && !targetm.calls.must_pass_in_stack (mode, type) |
68cbb7e3 | 636 | && (GET_MODE_BITSIZE (mode) <= 64 |
637 | || argsp->lib | |
638 | || TARGET_LIBFUNC)) | |
639 | ? gen_rtx_REG (mode, | |
640 | (incoming | |
641 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
642 | : MMIX_FIRST_ARG_REGNUM) | |
643 | + argsp->regs) | |
644 | : NULL_RTX; | |
645 | } | |
646 | ||
5d246ebf | 647 | /* Return an rtx for a function argument to go in a register, and 0 for |
648 | one that must go on stack. */ | |
649 | ||
650 | static rtx | |
39cba157 | 651 | mmix_function_arg (cumulative_args_t argsp, |
3754d046 | 652 | machine_mode mode, |
5d246ebf | 653 | const_tree type, |
654 | bool named) | |
655 | { | |
656 | return mmix_function_arg_1 (argsp, mode, type, named, false); | |
657 | } | |
658 | ||
659 | static rtx | |
39cba157 | 660 | mmix_function_incoming_arg (cumulative_args_t argsp, |
3754d046 | 661 | machine_mode mode, |
5d246ebf | 662 | const_tree type, |
663 | bool named) | |
664 | { | |
665 | return mmix_function_arg_1 (argsp, mode, type, named, true); | |
666 | } | |
667 | ||
68cbb7e3 | 668 | /* Returns nonzero for everything that goes by reference, 0 for |
669 | everything that goes by value. */ | |
670 | ||
b981d932 | 671 | static bool |
3754d046 | 672 | mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode, |
fb80456a | 673 | const_tree type, bool named ATTRIBUTE_UNUSED) |
68cbb7e3 | 674 | { |
39cba157 | 675 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
676 | ||
0336f0f0 | 677 | /* FIXME: Check: I'm not sure the must_pass_in_stack check is |
68cbb7e3 | 678 | necessary. */ |
bef380a4 | 679 | if (targetm.calls.must_pass_in_stack (mode, type)) |
680 | return true; | |
681 | ||
682 | if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8 | |
683 | && !TARGET_LIBFUNC | |
684 | && (!argsp || !argsp->lib)) | |
685 | return true; | |
686 | ||
687 | return false; | |
68cbb7e3 | 688 | } |
689 | ||
690 | /* Return nonzero if regno is a register number where a parameter is | |
691 | passed, and 0 otherwise. */ | |
692 | ||
693 | int | |
7585fcd5 | 694 | mmix_function_arg_regno_p (int regno, int incoming) |
68cbb7e3 | 695 | { |
696 | int first_arg_regnum | |
697 | = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM; | |
698 | ||
699 | return regno >= first_arg_regnum | |
700 | && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS; | |
701 | } | |
702 | ||
b600778c | 703 | /* Implements TARGET_FUNCTION_VALUE. */ |
68cbb7e3 | 704 | |
b600778c | 705 | static rtx |
706 | mmix_function_value (const_tree valtype, | |
707 | const_tree func ATTRIBUTE_UNUSED, | |
708 | bool outgoing) | |
68cbb7e3 | 709 | { |
3754d046 | 710 | machine_mode mode = TYPE_MODE (valtype); |
711 | machine_mode cmode; | |
68cbb7e3 | 712 | int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM; |
713 | rtx vec[MMIX_MAX_REGS_FOR_VALUE]; | |
714 | int i; | |
715 | int nregs; | |
716 | ||
b600778c | 717 | if (!outgoing) |
718 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
719 | ||
68cbb7e3 | 720 | /* Return values that fit in a register need no special handling. |
721 | There's no register hole when parameters are passed in global | |
722 | registers. */ | |
723 | if (TARGET_ABI_GNU | |
724 | || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD) | |
725 | return | |
726 | gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM); | |
727 | ||
fb89a8c9 | 728 | if (COMPLEX_MODE_P (mode)) |
729 | /* A complex type, made up of components. */ | |
730 | cmode = TYPE_MODE (TREE_TYPE (valtype)); | |
731 | else | |
732 | { | |
733 | /* Of the other larger-than-register modes, we only support | |
734 | scalar mode TImode. (At least, that's the only one that's | |
735 | been rudimentally tested.) Make sure we're alerted for | |
736 | unexpected cases. */ | |
737 | if (mode != TImode) | |
738 | sorry ("support for mode %qs", GET_MODE_NAME (mode)); | |
739 | ||
740 | /* In any case, we will fill registers to the natural size. */ | |
741 | cmode = DImode; | |
742 | } | |
743 | ||
68cbb7e3 | 744 | nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD); |
745 | ||
746 | /* We need to take care of the effect of the register hole on return | |
747 | values of large sizes; the last register will appear as the first | |
748 | register, with the rest shifted. (For complex modes, this is just | |
749 | swapped registers.) */ | |
750 | ||
751 | if (nregs > MMIX_MAX_REGS_FOR_VALUE) | |
68435912 | 752 | internal_error ("too large function value type, needs %d registers,\ |
68cbb7e3 | 753 | have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE); |
754 | ||
755 | /* FIXME: Maybe we should handle structure values like this too | |
756 | (adjusted for BLKmode), perhaps for both ABI:s. */ | |
757 | for (i = 0; i < nregs - 1; i++) | |
758 | vec[i] | |
759 | = gen_rtx_EXPR_LIST (VOIDmode, | |
760 | gen_rtx_REG (cmode, first_val_regnum + i), | |
761 | GEN_INT ((i + 1) * BITS_PER_UNIT)); | |
762 | ||
763 | vec[nregs - 1] | |
764 | = gen_rtx_EXPR_LIST (VOIDmode, | |
765 | gen_rtx_REG (cmode, first_val_regnum + nregs - 1), | |
bcd9bd66 | 766 | const0_rtx); |
68cbb7e3 | 767 | |
2bdda7ee | 768 | return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec)); |
68cbb7e3 | 769 | } |
770 | ||
b600778c | 771 | /* Implements TARGET_LIBCALL_VALUE. */ |
c715d549 | 772 | |
b600778c | 773 | static rtx |
3754d046 | 774 | mmix_libcall_value (machine_mode mode, |
b600778c | 775 | const_rtx fun ATTRIBUTE_UNUSED) |
776 | { | |
777 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
778 | } | |
779 | ||
780 | /* Implements TARGET_FUNCTION_VALUE_REGNO_P. */ | |
781 | ||
782 | static bool | |
783 | mmix_function_value_regno_p (const unsigned int regno) | |
c715d549 | 784 | { |
785 | return regno == MMIX_RETURN_VALUE_REGNUM; | |
786 | } | |
787 | ||
68cbb7e3 | 788 | /* EH_RETURN_DATA_REGNO. */ |
789 | ||
790 | int | |
7585fcd5 | 791 | mmix_eh_return_data_regno (int n) |
68cbb7e3 | 792 | { |
793 | if (n >= 0 && n < 4) | |
794 | return MMIX_EH_RETURN_DATA_REGNO_START + n; | |
795 | ||
796 | return INVALID_REGNUM; | |
797 | } | |
798 | ||
799 | /* EH_RETURN_STACKADJ_RTX. */ | |
800 | ||
801 | rtx | |
7585fcd5 | 802 | mmix_eh_return_stackadj_rtx (void) |
68cbb7e3 | 803 | { |
804 | return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM); | |
805 | } | |
806 | ||
807 | /* EH_RETURN_HANDLER_RTX. */ | |
808 | ||
809 | rtx | |
7585fcd5 | 810 | mmix_eh_return_handler_rtx (void) |
68cbb7e3 | 811 | { |
7585fcd5 | 812 | return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM); |
68cbb7e3 | 813 | } |
814 | ||
815 | /* ASM_PREFERRED_EH_DATA_FORMAT. */ | |
816 | ||
817 | int | |
7585fcd5 | 818 | mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, |
819 | int global ATTRIBUTE_UNUSED) | |
68cbb7e3 | 820 | { |
821 | /* This is the default (was at 2001-07-20). Revisit when needed. */ | |
822 | return DW_EH_PE_absptr; | |
823 | } | |
824 | ||
28c2d844 | 825 | /* Make a note that we've seen the beginning of the prologue. This |
d3310704 | 826 | matters to whether we'll translate register numbers as calculated by |
2efea8c0 | 827 | mmix_reorg. */ |
68cbb7e3 | 828 | |
d3310704 | 829 | static void |
7585fcd5 | 830 | mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED, |
831 | HOST_WIDE_INT framesize ATTRIBUTE_UNUSED) | |
68cbb7e3 | 832 | { |
d3310704 | 833 | cfun->machine->in_prologue = 1; |
834 | } | |
68cbb7e3 | 835 | |
d3310704 | 836 | /* Make a note that we've seen the end of the prologue. */ |
68cbb7e3 | 837 | |
d3310704 | 838 | static void |
7585fcd5 | 839 | mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED) |
d3310704 | 840 | { |
841 | cfun->machine->in_prologue = 0; | |
d68ffc6f | 842 | } |
843 | ||
2efea8c0 | 844 | /* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements |
845 | done here; just virtually by calculating the highest saved stack | |
846 | register number used to modify the register numbers at output time. */ | |
d68ffc6f | 847 | |
2efea8c0 | 848 | static void |
7585fcd5 | 849 | mmix_reorg (void) |
d68ffc6f | 850 | { |
851 | int regno; | |
68cbb7e3 | 852 | |
853 | /* We put the number of the highest saved register-file register in a | |
854 | location convenient for the call-patterns to output. Note that we | |
855 | don't tell dwarf2 about these registers, since it can't restore them | |
856 | anyway. */ | |
d68ffc6f | 857 | for (regno = MMIX_LAST_STACK_REGISTER_REGNUM; |
68cbb7e3 | 858 | regno >= 0; |
859 | regno--) | |
3072d30e | 860 | if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
68cbb7e3 | 861 | || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed)) |
862 | break; | |
863 | ||
d68ffc6f | 864 | /* Regardless of whether they're saved (they might be just read), we |
865 | mustn't include registers that carry parameters. We could scan the | |
866 | insns to see whether they're actually used (and indeed do other less | |
867 | trivial register usage analysis and transformations), but it seems | |
868 | wasteful to optimize for unused parameter registers. As of | |
3072d30e | 869 | 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but |
d68ffc6f | 870 | that might change. */ |
abe32cce | 871 | if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1) |
d68ffc6f | 872 | { |
abe32cce | 873 | regno = crtl->args.info.regs - 1; |
d68ffc6f | 874 | |
875 | /* We don't want to let this cause us to go over the limit and make | |
876 | incoming parameter registers be misnumbered and treating the last | |
877 | parameter register and incoming return value register call-saved. | |
878 | Stop things at the unmodified scheme. */ | |
879 | if (regno > MMIX_RETURN_VALUE_REGNUM - 1) | |
880 | regno = MMIX_RETURN_VALUE_REGNUM - 1; | |
881 | } | |
882 | ||
883 | cfun->machine->highest_saved_stack_register = regno; | |
68cbb7e3 | 884 | } |
885 | ||
886 | /* TARGET_ASM_FUNCTION_EPILOGUE. */ | |
887 | ||
4448bfa5 | 888 | static void |
7585fcd5 | 889 | mmix_target_asm_function_epilogue (FILE *stream, |
890 | HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED) | |
68cbb7e3 | 891 | { |
d3310704 | 892 | /* Emit an \n for readability of the generated assembly. */ |
893 | fputc ('\n', stream); | |
894 | } | |
68cbb7e3 | 895 | |
e7f5e241 | 896 | /* TARGET_ASM_OUTPUT_MI_THUNK. */ |
68cbb7e3 | 897 | |
6988553d | 898 | static void |
7585fcd5 | 899 | mmix_asm_output_mi_thunk (FILE *stream, |
900 | tree fndecl ATTRIBUTE_UNUSED, | |
901 | HOST_WIDE_INT delta, | |
902 | HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED, | |
903 | tree func) | |
d3310704 | 904 | { |
6644435d | 905 | /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass |
906 | location of structure to return as invisible first argument), you | |
907 | need to tweak this code too. */ | |
d3310704 | 908 | const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM]; |
68cbb7e3 | 909 | |
d3310704 | 910 | if (delta >= 0 && delta < 65536) |
e7f5e241 | 911 | fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta); |
d3310704 | 912 | else if (delta < 0 && delta >= -255) |
e7f5e241 | 913 | fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta); |
d3310704 | 914 | else |
0b123c47 | 915 | { |
d3310704 | 916 | mmix_output_register_setting (stream, 255, delta, 1); |
7fe1d31c | 917 | fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname); |
0b123c47 | 918 | } |
919 | ||
d3310704 | 920 | fprintf (stream, "\tJMP "); |
921 | assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0)); | |
922 | fprintf (stream, "\n"); | |
923 | } | |
68cbb7e3 | 924 | |
d3310704 | 925 | /* FUNCTION_PROFILER. */ |
68cbb7e3 | 926 | |
d3310704 | 927 | void |
7585fcd5 | 928 | mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED, |
929 | int labelno ATTRIBUTE_UNUSED) | |
d3310704 | 930 | { |
931 | sorry ("function_profiler support for MMIX"); | |
932 | } | |
68cbb7e3 | 933 | |
9e4a734a | 934 | /* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment, |
935 | let's stick to pushing argument registers on the stack. Later, we | |
936 | can parse all arguments in registers, to improve performance. */ | |
68cbb7e3 | 937 | |
9e4a734a | 938 | static void |
39cba157 | 939 | mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v, |
3754d046 | 940 | machine_mode mode, |
7585fcd5 | 941 | tree vartype, |
942 | int *pretend_sizep, | |
943 | int second_time ATTRIBUTE_UNUSED) | |
68cbb7e3 | 944 | { |
39cba157 | 945 | CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v); |
946 | ||
7ccc713a | 947 | /* The last named variable has been handled, but |
948 | args_so_farp has not been advanced for it. */ | |
949 | if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS) | |
950 | *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8; | |
68cbb7e3 | 951 | |
952 | /* We assume that one argument takes up one register here. That should | |
5aedf60c | 953 | be true until we start messing with multi-reg parameters. */ |
68cbb7e3 | 954 | if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1) |
955 | internal_error ("MMIX Internal: Last named vararg would not fit in a register"); | |
956 | } | |
957 | ||
604d844a | 958 | /* TARGET_ASM_TRAMPOLINE_TEMPLATE. */ |
68cbb7e3 | 959 | |
604d844a | 960 | static void |
961 | mmix_asm_trampoline_template (FILE *stream) | |
68cbb7e3 | 962 | { |
af08e904 | 963 | /* Read a value into the static-chain register and jump somewhere. The |
964 | static chain is stored at offset 16, and the function address is | |
965 | stored at offset 24. */ | |
604d844a | 966 | |
68cbb7e3 | 967 | fprintf (stream, "\tGETA $255,1F\n\t"); |
604d844a | 968 | fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]); |
68cbb7e3 | 969 | fprintf (stream, "LDOU $255,$255,8\n\t"); |
970 | fprintf (stream, "GO $255,$255,0\n"); | |
971 | fprintf (stream, "1H\tOCTA 0\n\t"); | |
972 | fprintf (stream, "OCTA 0\n"); | |
973 | } | |
974 | ||
604d844a | 975 | /* TARGET_TRAMPOLINE_INIT. */ |
68cbb7e3 | 976 | /* Set the static chain and function pointer field in the trampoline. |
977 | We also SYNCID here to be sure (doesn't matter in the simulator, but | |
978 | some day it will). */ | |
979 | ||
604d844a | 980 | static void |
981 | mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) | |
982 | { | |
983 | rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); | |
984 | rtx mem; | |
985 | ||
986 | emit_block_move (m_tramp, assemble_trampoline_template (), | |
987 | GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL); | |
988 | ||
989 | mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD); | |
990 | emit_move_insn (mem, static_chain); | |
991 | mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD); | |
992 | emit_move_insn (mem, fnaddr); | |
993 | ||
994 | mem = adjust_address (m_tramp, DImode, 0); | |
995 | emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1))); | |
68cbb7e3 | 996 | } |
997 | ||
998 | /* We must exclude constant addresses that have an increment that is not a | |
999 | multiple of four bytes because of restrictions of the GETA | |
f0b228a5 | 1000 | instruction, unless TARGET_BASE_ADDRESSES. */ |
68cbb7e3 | 1001 | |
1002 | int | |
7585fcd5 | 1003 | mmix_constant_address_p (rtx x) |
68cbb7e3 | 1004 | { |
1005 | RTX_CODE code = GET_CODE (x); | |
1006 | int addend = 0; | |
f0b228a5 | 1007 | /* When using "base addresses", anything constant goes. */ |
1008 | int constant_ok = TARGET_BASE_ADDRESSES != 0; | |
68cbb7e3 | 1009 | |
68cbb7e3 | 1010 | switch (code) |
1011 | { | |
1012 | case LABEL_REF: | |
1013 | case SYMBOL_REF: | |
1014 | return 1; | |
1015 | ||
68cbb7e3 | 1016 | case HIGH: |
f0b228a5 | 1017 | /* FIXME: Don't know how to dissect these. Avoid them for now, |
1018 | except we know they're constants. */ | |
1019 | return constant_ok; | |
68cbb7e3 | 1020 | |
1021 | case CONST_INT: | |
1022 | addend = INTVAL (x); | |
1023 | break; | |
1024 | ||
1025 | case CONST_DOUBLE: | |
1026 | if (GET_MODE (x) != VOIDmode) | |
1027 | /* Strange that we got here. FIXME: Check if we do. */ | |
f0b228a5 | 1028 | return constant_ok; |
68cbb7e3 | 1029 | addend = CONST_DOUBLE_LOW (x); |
1030 | break; | |
1031 | ||
1032 | case CONST: | |
1033 | /* Note that expressions with arithmetic on forward references don't | |
1034 | work in mmixal. People using gcc assembly code with mmixal might | |
1035 | need to move arrays and such to before the point of use. */ | |
1036 | if (GET_CODE (XEXP (x, 0)) == PLUS) | |
1037 | { | |
1038 | rtx x0 = XEXP (XEXP (x, 0), 0); | |
1039 | rtx x1 = XEXP (XEXP (x, 0), 1); | |
1040 | ||
1041 | if ((GET_CODE (x0) == SYMBOL_REF | |
1042 | || GET_CODE (x0) == LABEL_REF) | |
1043 | && (GET_CODE (x1) == CONST_INT | |
1044 | || (GET_CODE (x1) == CONST_DOUBLE | |
1045 | && GET_MODE (x1) == VOIDmode))) | |
1046 | addend = mmix_intval (x1); | |
1047 | else | |
f0b228a5 | 1048 | return constant_ok; |
68cbb7e3 | 1049 | } |
1050 | else | |
f0b228a5 | 1051 | return constant_ok; |
68cbb7e3 | 1052 | break; |
1053 | ||
1054 | default: | |
1055 | return 0; | |
1056 | } | |
1057 | ||
f0b228a5 | 1058 | return constant_ok || (addend & 3) == 0; |
68cbb7e3 | 1059 | } |
1060 | ||
fd50b071 | 1061 | /* Return 1 if the address is OK, otherwise 0. */ |
68cbb7e3 | 1062 | |
fd50b071 | 1063 | bool |
3754d046 | 1064 | mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, |
fd50b071 | 1065 | rtx x, |
1066 | bool strict_checking) | |
68cbb7e3 | 1067 | { |
1068 | #define MMIX_REG_OK(X) \ | |
1069 | ((strict_checking \ | |
1070 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1071 | || (reg_renumber[REGNO (X)] > 0 \ | |
1072 | && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \ | |
1073 | || (!strict_checking \ | |
1074 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1075 | || REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
1076 | || REGNO (X) == ARG_POINTER_REGNUM))) | |
1077 | ||
1078 | /* We only accept: | |
1079 | (mem reg) | |
1080 | (mem (plus reg reg)) | |
f0b228a5 | 1081 | (mem (plus reg 0..255)). |
1082 | unless TARGET_BASE_ADDRESSES, in which case we accept all | |
1083 | (mem constant_address) too. */ | |
68cbb7e3 | 1084 | |
1085 | ||
1086 | /* (mem reg) */ | |
1087 | if (REG_P (x) && MMIX_REG_OK (x)) | |
1088 | return 1; | |
1089 | ||
1090 | if (GET_CODE(x) == PLUS) | |
1091 | { | |
1092 | rtx x1 = XEXP (x, 0); | |
1093 | rtx x2 = XEXP (x, 1); | |
1094 | ||
1095 | /* Try swapping the order. FIXME: Do we need this? */ | |
1096 | if (! REG_P (x1)) | |
1097 | { | |
1098 | rtx tem = x1; | |
1099 | x1 = x2; | |
1100 | x2 = tem; | |
1101 | } | |
1102 | ||
f0b228a5 | 1103 | /* (mem (plus (reg?) (?))) */ |
68cbb7e3 | 1104 | if (!REG_P (x1) || !MMIX_REG_OK (x1)) |
f0b228a5 | 1105 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
68cbb7e3 | 1106 | |
f0b228a5 | 1107 | /* (mem (plus (reg) (reg?))) */ |
68cbb7e3 | 1108 | if (REG_P (x2) && MMIX_REG_OK (x2)) |
1109 | return 1; | |
1110 | ||
f0b228a5 | 1111 | /* (mem (plus (reg) (0..255?))) */ |
f105c84e | 1112 | if (satisfies_constraint_I (x2)) |
68cbb7e3 | 1113 | return 1; |
f0b228a5 | 1114 | |
1115 | return 0; | |
68cbb7e3 | 1116 | } |
1117 | ||
f0b228a5 | 1118 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
68cbb7e3 | 1119 | } |
1120 | ||
ca316360 | 1121 | /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ |
68cbb7e3 | 1122 | |
ca316360 | 1123 | static bool |
3754d046 | 1124 | mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) |
68cbb7e3 | 1125 | { |
1126 | RTX_CODE code = GET_CODE (x); | |
1127 | ||
1128 | /* We must allow any number due to the way the cse passes works; if we | |
1129 | do not allow any number here, general_operand will fail, and insns | |
1130 | will fatally fail recognition instead of "softly". */ | |
1131 | if (code == CONST_INT || code == CONST_DOUBLE) | |
1132 | return 1; | |
1133 | ||
1134 | return CONSTANT_ADDRESS_P (x); | |
1135 | } | |
1136 | ||
1137 | /* SELECT_CC_MODE. */ | |
1138 | ||
3754d046 | 1139 | machine_mode |
7585fcd5 | 1140 | mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) |
68cbb7e3 | 1141 | { |
1142 | /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to | |
1143 | output different compare insns. Note that we do not check the | |
1144 | validity of the comparison here. */ | |
1145 | ||
1146 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1147 | { | |
1148 | if (op == ORDERED || op == UNORDERED || op == UNGE | |
1149 | || op == UNGT || op == UNLE || op == UNLT) | |
1150 | return CC_FUNmode; | |
1151 | ||
1152 | if (op == EQ || op == NE) | |
1153 | return CC_FPEQmode; | |
1154 | ||
1155 | return CC_FPmode; | |
1156 | } | |
1157 | ||
1158 | if (op == GTU || op == LTU || op == GEU || op == LEU) | |
1159 | return CC_UNSmode; | |
1160 | ||
1161 | return CCmode; | |
1162 | } | |
1163 | ||
68cbb7e3 | 1164 | /* REVERSIBLE_CC_MODE. */ |
1165 | ||
1166 | int | |
3754d046 | 1167 | mmix_reversible_cc_mode (machine_mode mode) |
68cbb7e3 | 1168 | { |
1169 | /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float | |
581084df | 1170 | compares. */ |
68cbb7e3 | 1171 | return mode != CC_FPmode; |
1172 | } | |
1173 | ||
fab7adbf | 1174 | /* TARGET_RTX_COSTS. */ |
68cbb7e3 | 1175 | |
fab7adbf | 1176 | static bool |
7585fcd5 | 1177 | mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED, |
5ae4887d | 1178 | machine_mode mode ATTRIBUTE_UNUSED, |
7585fcd5 | 1179 | int outer_code ATTRIBUTE_UNUSED, |
20d892d1 | 1180 | int opno ATTRIBUTE_UNUSED, |
f529eb25 | 1181 | int *total ATTRIBUTE_UNUSED, |
1182 | bool speed ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1183 | { |
1184 | /* For the time being, this is just a stub and we'll accept the | |
1185 | generic calculations, until we can do measurements, at least. | |
1186 | Say we did not modify any calculated costs. */ | |
fab7adbf | 1187 | return false; |
68cbb7e3 | 1188 | } |
1189 | ||
f7e13ca6 | 1190 | /* TARGET_REGISTER_MOVE_COST. |
68cbb7e3 | 1191 | |
f7e13ca6 | 1192 | The special registers can only move to and from general regs, and we |
1193 | need to check that their constraints match, so say 3 for them. */ | |
1194 | ||
1195 | static int | |
3754d046 | 1196 | mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, |
f7e13ca6 | 1197 | reg_class_t from, |
1198 | reg_class_t to) | |
68cbb7e3 | 1199 | { |
1200 | return (from == GENERAL_REGS && from == to) ? 2 : 3; | |
1201 | } | |
1202 | ||
1203 | /* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a | |
1204 | compile-time constant; it's used in an asm in crtstuff.c, compiled for | |
1205 | the target. */ | |
1206 | ||
1207 | /* DATA_SECTION_ASM_OP. */ | |
1208 | ||
1209 | const char * | |
7585fcd5 | 1210 | mmix_data_section_asm_op (void) |
68cbb7e3 | 1211 | { |
1212 | return "\t.data ! mmixal:= 8H LOC 9B"; | |
1213 | } | |
1214 | ||
7811991d | 1215 | static void |
7585fcd5 | 1216 | mmix_encode_section_info (tree decl, rtx rtl, int first) |
68cbb7e3 | 1217 | { |
1218 | /* Test for an external declaration, and do nothing if it is one. */ | |
1219 | if ((TREE_CODE (decl) == VAR_DECL | |
91009d64 | 1220 | && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl))) |
1221 | || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl))) | |
68cbb7e3 | 1222 | ; |
ae484cc8 | 1223 | else if (first && DECL_P (decl)) |
68cbb7e3 | 1224 | { |
1225 | /* For non-visible declarations, add a "@" prefix, which we skip | |
1226 | when the label is output. If the label does not have this | |
f0b228a5 | 1227 | prefix, a ":" is output if -mtoplevel-symbols. |
68cbb7e3 | 1228 | |
1229 | Note that this does not work for data that is declared extern and | |
1230 | later defined as static. If there's code in between, that code | |
f0b228a5 | 1231 | will refer to the extern declaration, and vice versa. This just |
1232 | means that when -mtoplevel-symbols is in use, we can just handle | |
1233 | well-behaved ISO-compliant code. */ | |
68cbb7e3 | 1234 | |
2c129d70 | 1235 | const char *str = XSTR (XEXP (rtl, 0), 0); |
68cbb7e3 | 1236 | int len = strlen (str); |
225ab426 | 1237 | char *newstr = XALLOCAVEC (char, len + 2); |
b948ae2f | 1238 | newstr[0] = '@'; |
68cbb7e3 | 1239 | strcpy (newstr + 1, str); |
b948ae2f | 1240 | XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1); |
68cbb7e3 | 1241 | } |
1242 | ||
f0b228a5 | 1243 | /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We |
1244 | may need different options to reach for different things with GETA. | |
1245 | For now, functions and things we know or have been told are constant. */ | |
1246 | if (TREE_CODE (decl) == FUNCTION_DECL | |
1247 | || TREE_CONSTANT (decl) | |
1248 | || (TREE_CODE (decl) == VAR_DECL | |
1249 | && TREE_READONLY (decl) | |
1250 | && !TREE_SIDE_EFFECTS (decl) | |
1251 | && (!DECL_INITIAL (decl) | |
1252 | || TREE_CONSTANT (DECL_INITIAL (decl))))) | |
2c129d70 | 1253 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; |
68cbb7e3 | 1254 | } |
1255 | ||
7b4a38a6 | 1256 | static const char * |
7585fcd5 | 1257 | mmix_strip_name_encoding (const char *name) |
68cbb7e3 | 1258 | { |
1259 | for (; (*name == '@' || *name == '*'); name++) | |
1260 | ; | |
1261 | ||
1262 | return name; | |
1263 | } | |
1264 | ||
92c473b8 | 1265 | /* TARGET_ASM_FILE_START. |
1266 | We just emit a little comment for the time being. */ | |
68cbb7e3 | 1267 | |
92c473b8 | 1268 | static void |
7585fcd5 | 1269 | mmix_file_start (void) |
68cbb7e3 | 1270 | { |
92c473b8 | 1271 | default_file_start (); |
68cbb7e3 | 1272 | |
92c473b8 | 1273 | fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file); |
68cbb7e3 | 1274 | |
1d60d981 | 1275 | /* Make sure each file starts with the text section. */ |
2f14b1f9 | 1276 | switch_to_section (text_section); |
68cbb7e3 | 1277 | } |
1278 | ||
f6940372 | 1279 | /* TARGET_ASM_FILE_END. */ |
68cbb7e3 | 1280 | |
f6940372 | 1281 | static void |
7585fcd5 | 1282 | mmix_file_end (void) |
68cbb7e3 | 1283 | { |
1d60d981 | 1284 | /* Make sure each file ends with the data section. */ |
2f14b1f9 | 1285 | switch_to_section (data_section); |
68cbb7e3 | 1286 | } |
1287 | ||
40fe393f | 1288 | /* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */ |
68cbb7e3 | 1289 | |
40fe393f | 1290 | static void |
7585fcd5 | 1291 | mmix_asm_output_source_filename (FILE *stream, const char *name) |
68cbb7e3 | 1292 | { |
1293 | fprintf (stream, "# 1 "); | |
1294 | OUTPUT_QUOTED_STRING (stream, name); | |
1295 | fprintf (stream, "\n"); | |
1296 | } | |
1297 | ||
1298 | /* OUTPUT_QUOTED_STRING. */ | |
1299 | ||
1300 | void | |
7585fcd5 | 1301 | mmix_output_quoted_string (FILE *stream, const char *string, int length) |
68cbb7e3 | 1302 | { |
1303 | const char * string_end = string + length; | |
25037517 | 1304 | static const char *const unwanted_chars = "\"[]\\"; |
68cbb7e3 | 1305 | |
1306 | /* Output "any character except newline and double quote character". We | |
1307 | play it safe and avoid all control characters too. We also do not | |
1308 | want [] as characters, should input be passed through m4 with [] as | |
1309 | quotes. Further, we avoid "\", because the GAS port handles it as a | |
1310 | quoting character. */ | |
1311 | while (string < string_end) | |
1312 | { | |
1313 | if (*string | |
1314 | && (unsigned char) *string < 128 | |
1315 | && !ISCNTRL (*string) | |
1316 | && strchr (unwanted_chars, *string) == NULL) | |
1317 | { | |
1318 | fputc ('"', stream); | |
1319 | while (*string | |
1320 | && (unsigned char) *string < 128 | |
1321 | && !ISCNTRL (*string) | |
1322 | && strchr (unwanted_chars, *string) == NULL | |
1323 | && string < string_end) | |
1324 | { | |
1325 | fputc (*string, stream); | |
1326 | string++; | |
1327 | } | |
1328 | fputc ('"', stream); | |
1329 | if (string < string_end) | |
1330 | fprintf (stream, ","); | |
1331 | } | |
1332 | if (string < string_end) | |
1333 | { | |
1334 | fprintf (stream, "#%x", *string & 255); | |
1335 | string++; | |
1336 | if (string < string_end) | |
1337 | fprintf (stream, ","); | |
1338 | } | |
1339 | } | |
1340 | } | |
1341 | ||
58356836 | 1342 | /* Target hook for assembling integer objects. Use mmix_print_operand |
1343 | for WYDE and TETRA. Use mmix_output_octa to output 8-byte | |
1344 | CONST_DOUBLEs. */ | |
68cbb7e3 | 1345 | |
58356836 | 1346 | static bool |
7585fcd5 | 1347 | mmix_assemble_integer (rtx x, unsigned int size, int aligned_p) |
68cbb7e3 | 1348 | { |
58356836 | 1349 | if (aligned_p) |
1350 | switch (size) | |
1351 | { | |
4f4e478d | 1352 | /* We handle a limited number of types of operands in here. But |
1353 | that's ok, because we can punt to generic functions. We then | |
5c3d1711 | 1354 | pretend that aligned data isn't needed, so the usual .<pseudo> |
1355 | syntax is used (which works for aligned data too). We actually | |
1356 | *must* do that, since we say we don't have simple aligned | |
1357 | pseudos, causing this function to be called. We just try and | |
1358 | keep as much compatibility as possible with mmixal syntax for | |
1359 | normal cases (i.e. without GNU extensions and C only). */ | |
58356836 | 1360 | case 1: |
4f4e478d | 1361 | if (GET_CODE (x) != CONST_INT) |
1362 | { | |
1363 | aligned_p = 0; | |
1364 | break; | |
1365 | } | |
58356836 | 1366 | fputs ("\tBYTE\t", asm_out_file); |
1367 | mmix_print_operand (asm_out_file, x, 'B'); | |
1368 | fputc ('\n', asm_out_file); | |
1369 | return true; | |
1370 | ||
1371 | case 2: | |
4f4e478d | 1372 | if (GET_CODE (x) != CONST_INT) |
1373 | { | |
1374 | aligned_p = 0; | |
1375 | break; | |
1376 | } | |
58356836 | 1377 | fputs ("\tWYDE\t", asm_out_file); |
1378 | mmix_print_operand (asm_out_file, x, 'W'); | |
1379 | fputc ('\n', asm_out_file); | |
1380 | return true; | |
1381 | ||
1382 | case 4: | |
60bb373d | 1383 | if (GET_CODE (x) != CONST_INT) |
4f4e478d | 1384 | { |
1385 | aligned_p = 0; | |
1386 | break; | |
1387 | } | |
58356836 | 1388 | fputs ("\tTETRA\t", asm_out_file); |
1389 | mmix_print_operand (asm_out_file, x, 'L'); | |
1390 | fputc ('\n', asm_out_file); | |
1391 | return true; | |
1392 | ||
1393 | case 8: | |
7f81c162 | 1394 | /* We don't get here anymore for CONST_DOUBLE, because DImode |
1395 | isn't expressed as CONST_DOUBLE, and DFmode is handled | |
1396 | elsewhere. */ | |
1397 | gcc_assert (GET_CODE (x) != CONST_DOUBLE); | |
4f4e478d | 1398 | assemble_integer_with_op ("\tOCTA\t", x); |
58356836 | 1399 | return true; |
1400 | } | |
1401 | return default_assemble_integer (x, size, aligned_p); | |
68cbb7e3 | 1402 | } |
1403 | ||
1404 | /* ASM_OUTPUT_ASCII. */ | |
1405 | ||
1406 | void | |
7585fcd5 | 1407 | mmix_asm_output_ascii (FILE *stream, const char *string, int length) |
68cbb7e3 | 1408 | { |
1409 | while (length > 0) | |
1410 | { | |
1411 | int chunk_size = length > 60 ? 60 : length; | |
1412 | fprintf (stream, "\tBYTE "); | |
1413 | mmix_output_quoted_string (stream, string, chunk_size); | |
1414 | string += chunk_size; | |
1415 | length -= chunk_size; | |
1416 | fprintf (stream, "\n"); | |
1417 | } | |
1418 | } | |
1419 | ||
1420 | /* ASM_OUTPUT_ALIGNED_COMMON. */ | |
1421 | ||
1422 | void | |
7585fcd5 | 1423 | mmix_asm_output_aligned_common (FILE *stream, |
1424 | const char *name, | |
1425 | int size, | |
1426 | int align) | |
68cbb7e3 | 1427 | { |
1428 | /* This is mostly the elfos.h one. There doesn't seem to be a way to | |
1429 | express this in a mmixal-compatible way. */ | |
1430 | fprintf (stream, "\t.comm\t"); | |
1431 | assemble_name (stream, name); | |
1432 | fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n", | |
1433 | size, align / BITS_PER_UNIT); | |
1434 | } | |
1435 | ||
1436 | /* ASM_OUTPUT_ALIGNED_LOCAL. */ | |
1437 | ||
1438 | void | |
7585fcd5 | 1439 | mmix_asm_output_aligned_local (FILE *stream, |
1440 | const char *name, | |
1441 | int size, | |
1442 | int align) | |
68cbb7e3 | 1443 | { |
2f14b1f9 | 1444 | switch_to_section (data_section); |
68cbb7e3 | 1445 | |
1446 | ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT)); | |
1447 | assemble_name (stream, name); | |
1448 | fprintf (stream, "\tLOC @+%d\n", size); | |
1449 | } | |
1450 | ||
1451 | /* ASM_OUTPUT_LABEL. */ | |
1452 | ||
1453 | void | |
7585fcd5 | 1454 | mmix_asm_output_label (FILE *stream, const char *name) |
68cbb7e3 | 1455 | { |
1456 | assemble_name (stream, name); | |
1457 | fprintf (stream, "\tIS @\n"); | |
1458 | } | |
1459 | ||
af1c039b | 1460 | /* ASM_OUTPUT_INTERNAL_LABEL. */ |
1461 | ||
1462 | void | |
1463 | mmix_asm_output_internal_label (FILE *stream, const char *name) | |
1464 | { | |
1465 | assemble_name_raw (stream, name); | |
1466 | fprintf (stream, "\tIS @\n"); | |
1467 | } | |
1468 | ||
68cbb7e3 | 1469 | /* ASM_DECLARE_REGISTER_GLOBAL. */ |
1470 | ||
1471 | void | |
7585fcd5 | 1472 | mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED, |
1473 | tree decl ATTRIBUTE_UNUSED, | |
1474 | int regno ATTRIBUTE_UNUSED, | |
1475 | const char *name ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1476 | { |
1477 | /* Nothing to do here, but there *will* be, therefore the framework is | |
1478 | here. */ | |
1479 | } | |
1480 | ||
68cbb7e3 | 1481 | /* ASM_WEAKEN_LABEL. */ |
1482 | ||
1483 | void | |
7585fcd5 | 1484 | mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED, |
1485 | const char *name ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1486 | { |
7fe1d31c | 1487 | fprintf (stream, "\t.weak "); |
68cbb7e3 | 1488 | assemble_name (stream, name); |
7fe1d31c | 1489 | fprintf (stream, " ! mmixal-incompatible\n"); |
68cbb7e3 | 1490 | } |
1491 | ||
1492 | /* MAKE_DECL_ONE_ONLY. */ | |
1493 | ||
1494 | void | |
7585fcd5 | 1495 | mmix_make_decl_one_only (tree decl) |
68cbb7e3 | 1496 | { |
1497 | DECL_WEAK (decl) = 1; | |
1498 | } | |
1499 | ||
1500 | /* ASM_OUTPUT_LABELREF. | |
1501 | Strip GCC's '*' and our own '@'. No order is assumed. */ | |
1502 | ||
1503 | void | |
7585fcd5 | 1504 | mmix_asm_output_labelref (FILE *stream, const char *name) |
68cbb7e3 | 1505 | { |
91009d64 | 1506 | int is_extern = 1; |
68cbb7e3 | 1507 | |
1508 | for (; (*name == '@' || *name == '*'); name++) | |
1509 | if (*name == '@') | |
91009d64 | 1510 | is_extern = 0; |
68cbb7e3 | 1511 | |
1512 | asm_fprintf (stream, "%s%U%s", | |
1513 | is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "", | |
1514 | name); | |
1515 | } | |
1516 | ||
68cbb7e3 | 1517 | /* ASM_OUTPUT_DEF. */ |
1518 | ||
1519 | void | |
7585fcd5 | 1520 | mmix_asm_output_def (FILE *stream, const char *name, const char *value) |
68cbb7e3 | 1521 | { |
1522 | assemble_name (stream, name); | |
1523 | fprintf (stream, "\tIS "); | |
1524 | assemble_name (stream, value); | |
1525 | fputc ('\n', stream); | |
1526 | } | |
1527 | ||
7a7fb407 | 1528 | /* TARGET_PRINT_OPERAND. */ |
68cbb7e3 | 1529 | |
7a7fb407 | 1530 | static void |
7585fcd5 | 1531 | mmix_print_operand (FILE *stream, rtx x, int code) |
68cbb7e3 | 1532 | { |
1533 | /* When we add support for different codes later, we can, when needed, | |
1534 | drop through to the main handler with a modified operand. */ | |
1535 | rtx modified_x = x; | |
d68ffc6f | 1536 | int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0; |
68cbb7e3 | 1537 | |
1538 | switch (code) | |
1539 | { | |
1540 | /* Unrelated codes are in alphabetic order. */ | |
1541 | ||
91009d64 | 1542 | case '+': |
1543 | /* For conditional branches, output "P" for a probable branch. */ | |
1544 | if (TARGET_BRANCH_PREDICT) | |
1545 | { | |
1546 | x = find_reg_note (current_output_insn, REG_BR_PROB, 0); | |
9eb946de | 1547 | if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2) |
91009d64 | 1548 | putc ('P', stream); |
1549 | } | |
1550 | return; | |
1551 | ||
0b123c47 | 1552 | case '.': |
1553 | /* For the %d in POP %d,0. */ | |
1554 | fprintf (stream, "%d", MMIX_POP_ARGUMENT ()); | |
1555 | return; | |
1556 | ||
68cbb7e3 | 1557 | case 'B': |
1558 | if (GET_CODE (x) != CONST_INT) | |
1559 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1560 | fprintf (stream, "%d", (int) (INTVAL (x) & 0xff)); | |
1561 | return; | |
1562 | ||
1563 | case 'H': | |
1564 | /* Highpart. Must be general register, and not the last one, as | |
1565 | that one cannot be part of a consecutive register pair. */ | |
d68ffc6f | 1566 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1567 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
68cbb7e3 | 1568 | |
1569 | /* This is big-endian, so the high-part is the first one. */ | |
d68ffc6f | 1570 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); |
68cbb7e3 | 1571 | return; |
1572 | ||
1573 | case 'L': | |
1574 | /* Lowpart. Must be CONST_INT or general register, and not the last | |
1575 | one, as that one cannot be part of a consecutive register pair. */ | |
1576 | if (GET_CODE (x) == CONST_INT) | |
1577 | { | |
1578 | fprintf (stream, "#%lx", | |
1579 | (unsigned long) (INTVAL (x) | |
1580 | & ((unsigned int) 0x7fffffff * 2 + 1))); | |
1581 | return; | |
1582 | } | |
1583 | ||
1584 | if (GET_CODE (x) == SYMBOL_REF) | |
1585 | { | |
1586 | output_addr_const (stream, x); | |
1587 | return; | |
1588 | } | |
1589 | ||
d68ffc6f | 1590 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1591 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
68cbb7e3 | 1592 | |
1593 | /* This is big-endian, so the low-part is + 1. */ | |
d68ffc6f | 1594 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]); |
68cbb7e3 | 1595 | return; |
1596 | ||
1597 | /* Can't use 'a' because that's a generic modifier for address | |
1598 | output. */ | |
1599 | case 'A': | |
1600 | mmix_output_shiftvalue_op_from_str (stream, "ANDN", | |
3a4303e7 | 1601 | ~(uint64_t) |
68cbb7e3 | 1602 | mmix_intval (x)); |
1603 | return; | |
1604 | ||
1605 | case 'i': | |
1606 | mmix_output_shiftvalue_op_from_str (stream, "INC", | |
3a4303e7 | 1607 | (uint64_t) |
68cbb7e3 | 1608 | mmix_intval (x)); |
1609 | return; | |
1610 | ||
1611 | case 'o': | |
1612 | mmix_output_shiftvalue_op_from_str (stream, "OR", | |
3a4303e7 | 1613 | (uint64_t) |
68cbb7e3 | 1614 | mmix_intval (x)); |
1615 | return; | |
1616 | ||
1617 | case 's': | |
1618 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 1619 | (uint64_t) |
68cbb7e3 | 1620 | mmix_intval (x)); |
1621 | return; | |
1622 | ||
1623 | case 'd': | |
1624 | case 'D': | |
1625 | mmix_output_condition (stream, x, (code == 'D')); | |
1626 | return; | |
1627 | ||
1628 | case 'e': | |
1629 | /* Output an extra "e" to make fcmpe, fune. */ | |
1630 | if (TARGET_FCMP_EPSILON) | |
1631 | fprintf (stream, "e"); | |
1632 | return; | |
1633 | ||
1634 | case 'm': | |
1635 | /* Output the number minus 1. */ | |
1636 | if (GET_CODE (x) != CONST_INT) | |
1637 | { | |
1638 | fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT", | |
1639 | x); | |
1640 | } | |
f03df321 | 1641 | fprintf (stream, "%" PRId64, |
3a4303e7 | 1642 | (int64_t) (mmix_intval (x) - 1)); |
68cbb7e3 | 1643 | return; |
1644 | ||
1645 | case 'p': | |
1646 | /* Store the number of registers we want to save. This was setup | |
1647 | by the prologue. The actual operand contains the number of | |
1648 | registers to pass, but we don't use it currently. Anyway, we | |
1649 | need to output the number of saved registers here. */ | |
d68ffc6f | 1650 | fprintf (stream, "%d", |
1651 | cfun->machine->highest_saved_stack_register + 1); | |
68cbb7e3 | 1652 | return; |
1653 | ||
1654 | case 'r': | |
1655 | /* Store the register to output a constant to. */ | |
1656 | if (! REG_P (x)) | |
68435912 | 1657 | fatal_insn ("MMIX Internal: Expected a register, not this", x); |
d68ffc6f | 1658 | mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno); |
68cbb7e3 | 1659 | return; |
1660 | ||
1661 | case 'I': | |
1662 | /* Output the constant. Note that we use this for floats as well. */ | |
1663 | if (GET_CODE (x) != CONST_INT | |
1664 | && (GET_CODE (x) != CONST_DOUBLE | |
1665 | || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode | |
1666 | && GET_MODE (x) != SFmode))) | |
68435912 | 1667 | fatal_insn ("MMIX Internal: Expected a constant, not this", x); |
68cbb7e3 | 1668 | mmix_output_register_setting (stream, |
1669 | mmix_output_destination_register, | |
1670 | mmix_intval (x), 0); | |
1671 | return; | |
1672 | ||
1673 | case 'U': | |
1674 | /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */ | |
1675 | if (TARGET_ZERO_EXTEND) | |
1676 | putc ('U', stream); | |
1677 | return; | |
1678 | ||
1679 | case 'v': | |
3a4303e7 | 1680 | mmix_output_shifted_value (stream, (int64_t) mmix_intval (x)); |
68cbb7e3 | 1681 | return; |
1682 | ||
1683 | case 'V': | |
3a4303e7 | 1684 | mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x)); |
68cbb7e3 | 1685 | return; |
1686 | ||
1687 | case 'W': | |
1688 | if (GET_CODE (x) != CONST_INT) | |
1689 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1690 | fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff)); | |
1691 | return; | |
1692 | ||
1693 | case 0: | |
1694 | /* Nothing to do. */ | |
1695 | break; | |
1696 | ||
1697 | default: | |
1698 | /* Presumably there's a missing case above if we get here. */ | |
1e5fcbe2 | 1699 | internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code); |
68cbb7e3 | 1700 | } |
1701 | ||
1702 | switch (GET_CODE (modified_x)) | |
1703 | { | |
1704 | case REG: | |
d68ffc6f | 1705 | regno = REGNO (modified_x); |
1706 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1707 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
1708 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); | |
68cbb7e3 | 1709 | return; |
1710 | ||
1711 | case MEM: | |
1712 | output_address (XEXP (modified_x, 0)); | |
1713 | return; | |
1714 | ||
1715 | case CONST_INT: | |
1716 | /* For -2147483648, mmixal complains that the constant does not fit | |
1717 | in 4 bytes, so let's output it as hex. Take care to handle hosts | |
1718 | where HOST_WIDE_INT is longer than an int. | |
1719 | ||
1720 | Print small constants +-255 using decimal. */ | |
1721 | ||
1722 | if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256) | |
1723 | fprintf (stream, "%d", (int) (INTVAL (modified_x))); | |
1724 | else | |
1725 | fprintf (stream, "#%x", | |
1726 | (int) (INTVAL (modified_x)) & (unsigned int) ~0); | |
1727 | return; | |
1728 | ||
1729 | case CONST_DOUBLE: | |
1730 | /* Do somewhat as CONST_INT. */ | |
58356836 | 1731 | mmix_output_octa (stream, mmix_intval (modified_x), 0); |
68cbb7e3 | 1732 | return; |
1733 | ||
1734 | case CONST: | |
1735 | output_addr_const (stream, modified_x); | |
1736 | return; | |
1737 | ||
1738 | default: | |
1739 | /* No need to test for all strange things. Let output_addr_const do | |
1740 | it for us. */ | |
1741 | if (CONSTANT_P (modified_x) | |
1742 | /* Strangely enough, this is not included in CONSTANT_P. | |
1743 | FIXME: Ask/check about sanity here. */ | |
aa90bb35 | 1744 | || LABEL_P (modified_x)) |
68cbb7e3 | 1745 | { |
1746 | output_addr_const (stream, modified_x); | |
1747 | return; | |
1748 | } | |
1749 | ||
1750 | /* We need the original here. */ | |
1751 | fatal_insn ("MMIX Internal: Cannot decode this operand", x); | |
1752 | } | |
1753 | } | |
1754 | ||
7a7fb407 | 1755 | /* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ |
68cbb7e3 | 1756 | |
7a7fb407 | 1757 | static bool |
1758 | mmix_print_operand_punct_valid_p (unsigned char code) | |
68cbb7e3 | 1759 | { |
91009d64 | 1760 | /* A '+' is used for branch prediction, similar to other ports. */ |
0b123c47 | 1761 | return code == '+' |
1762 | /* A '.' is used for the %d in the POP %d,0 return insn. */ | |
1763 | || code == '.'; | |
68cbb7e3 | 1764 | } |
1765 | ||
7a7fb407 | 1766 | /* TARGET_PRINT_OPERAND_ADDRESS. */ |
68cbb7e3 | 1767 | |
7a7fb407 | 1768 | static void |
7585fcd5 | 1769 | mmix_print_operand_address (FILE *stream, rtx x) |
68cbb7e3 | 1770 | { |
1771 | if (REG_P (x)) | |
1772 | { | |
1773 | /* I find the generated assembly code harder to read without | |
1774 | the ",0". */ | |
d68ffc6f | 1775 | fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]); |
68cbb7e3 | 1776 | return; |
1777 | } | |
1778 | else if (GET_CODE (x) == PLUS) | |
1779 | { | |
1780 | rtx x1 = XEXP (x, 0); | |
1781 | rtx x2 = XEXP (x, 1); | |
1782 | ||
68cbb7e3 | 1783 | if (REG_P (x1)) |
1784 | { | |
d68ffc6f | 1785 | fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]); |
68cbb7e3 | 1786 | |
1787 | if (REG_P (x2)) | |
1788 | { | |
d68ffc6f | 1789 | fprintf (stream, "%s", |
1790 | reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]); | |
68cbb7e3 | 1791 | return; |
1792 | } | |
f105c84e | 1793 | else if (satisfies_constraint_I (x2)) |
68cbb7e3 | 1794 | { |
1795 | output_addr_const (stream, x2); | |
1796 | return; | |
1797 | } | |
1798 | } | |
1799 | } | |
1800 | ||
ca316360 | 1801 | if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x)) |
f0b228a5 | 1802 | { |
1803 | output_addr_const (stream, x); | |
1804 | return; | |
1805 | } | |
1806 | ||
68cbb7e3 | 1807 | fatal_insn ("MMIX Internal: This is not a recognized address", x); |
1808 | } | |
1809 | ||
1810 | /* ASM_OUTPUT_REG_PUSH. */ | |
1811 | ||
1812 | void | |
7585fcd5 | 1813 | mmix_asm_output_reg_push (FILE *stream, int regno) |
68cbb7e3 | 1814 | { |
1815 | fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n", | |
1816 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
1817 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
d68ffc6f | 1818 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
68cbb7e3 | 1819 | reg_names[MMIX_STACK_POINTER_REGNUM]); |
1820 | } | |
1821 | ||
1822 | /* ASM_OUTPUT_REG_POP. */ | |
1823 | ||
1824 | void | |
7585fcd5 | 1825 | mmix_asm_output_reg_pop (FILE *stream, int regno) |
68cbb7e3 | 1826 | { |
1827 | fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n", | |
d68ffc6f | 1828 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
68cbb7e3 | 1829 | reg_names[MMIX_STACK_POINTER_REGNUM], |
1830 | reg_names[MMIX_STACK_POINTER_REGNUM]); | |
1831 | } | |
1832 | ||
1833 | /* ASM_OUTPUT_ADDR_DIFF_ELT. */ | |
1834 | ||
1835 | void | |
7585fcd5 | 1836 | mmix_asm_output_addr_diff_elt (FILE *stream, |
1837 | rtx body ATTRIBUTE_UNUSED, | |
1838 | int value, | |
1839 | int rel) | |
68cbb7e3 | 1840 | { |
1841 | fprintf (stream, "\tTETRA L%d-L%d\n", value, rel); | |
1842 | } | |
1843 | ||
1844 | /* ASM_OUTPUT_ADDR_VEC_ELT. */ | |
1845 | ||
1846 | void | |
7585fcd5 | 1847 | mmix_asm_output_addr_vec_elt (FILE *stream, int value) |
68cbb7e3 | 1848 | { |
1849 | fprintf (stream, "\tOCTA L:%d\n", value); | |
1850 | } | |
1851 | ||
1852 | /* ASM_OUTPUT_SKIP. */ | |
1853 | ||
1854 | void | |
7585fcd5 | 1855 | mmix_asm_output_skip (FILE *stream, int nbytes) |
68cbb7e3 | 1856 | { |
1857 | fprintf (stream, "\tLOC @+%d\n", nbytes); | |
1858 | } | |
1859 | ||
1860 | /* ASM_OUTPUT_ALIGN. */ | |
1861 | ||
1862 | void | |
7585fcd5 | 1863 | mmix_asm_output_align (FILE *stream, int power) |
68cbb7e3 | 1864 | { |
1865 | /* We need to record the needed alignment of this section in the object, | |
1866 | so we have to output an alignment directive. Use a .p2align (not | |
1867 | .align) so people will never have to wonder about whether the | |
1868 | argument is in number of bytes or the log2 thereof. We do it in | |
1869 | addition to the LOC directive, so nothing needs tweaking when | |
1870 | copy-pasting assembly into mmixal. */ | |
1871 | fprintf (stream, "\t.p2align %d\n", power); | |
1872 | fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1); | |
1873 | } | |
1874 | ||
1875 | /* DBX_REGISTER_NUMBER. */ | |
1876 | ||
c0dae7df | 1877 | unsigned |
1878 | mmix_dbx_register_number (unsigned regno) | |
68cbb7e3 | 1879 | { |
d68ffc6f | 1880 | /* Adjust the register number to the one it will be output as, dammit. |
1881 | It'd be nice if we could check the assumption that we're filling a | |
1882 | gap, but every register between the last saved register and parameter | |
1883 | registers might be a valid parameter register. */ | |
1884 | regno = MMIX_OUTPUT_REGNO (regno); | |
68cbb7e3 | 1885 | |
1886 | /* We need to renumber registers to get the number of the return address | |
1887 | register in the range 0..255. It is also space-saving if registers | |
1888 | mentioned in the call-frame information (which uses this function by | |
1889 | defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered | |
1890 | 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */ | |
1891 | return regno >= 224 ? (regno - 224) : (regno + 48); | |
1892 | } | |
1893 | ||
35a3065a | 1894 | /* End of target macro support functions. |
68cbb7e3 | 1895 | |
7585fcd5 | 1896 | Now the MMIX port's own functions. First the exported ones. */ |
68cbb7e3 | 1897 | |
d3310704 | 1898 | /* Wrapper for get_hard_reg_initial_val since integrate.h isn't included |
1899 | from insn-emit.c. */ | |
1900 | ||
1901 | rtx | |
3754d046 | 1902 | mmix_get_hard_reg_initial_val (machine_mode mode, int regno) |
d3310704 | 1903 | { |
1904 | return get_hard_reg_initial_val (mode, regno); | |
1905 | } | |
1906 | ||
e911aedf | 1907 | /* Nonzero when the function epilogue is simple enough that a single |
d3310704 | 1908 | "POP %d,0" should be used even within the function. */ |
0b123c47 | 1909 | |
1910 | int | |
7585fcd5 | 1911 | mmix_use_simple_return (void) |
0b123c47 | 1912 | { |
1913 | int regno; | |
1914 | ||
1915 | int stack_space_to_allocate | |
abe32cce | 1916 | = (crtl->outgoing_args_size |
1917 | + crtl->args.pretend_args_size | |
0b123c47 | 1918 | + get_frame_size () + 7) & ~7; |
1919 | ||
1920 | if (!TARGET_USE_RETURN_INSN || !reload_completed) | |
1921 | return 0; | |
1922 | ||
1923 | for (regno = 255; | |
1924 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1925 | regno--) | |
1926 | /* Note that we assume that the frame-pointer-register is one of these | |
1927 | registers, in which case we don't count it here. */ | |
1928 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 1929 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
0b123c47 | 1930 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1931 | return 0; | |
1932 | ||
1933 | if (frame_pointer_needed) | |
1934 | stack_space_to_allocate += 8; | |
1935 | ||
1936 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1937 | stack_space_to_allocate += 16; | |
1938 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1939 | stack_space_to_allocate += 8; | |
1940 | ||
1941 | return stack_space_to_allocate == 0; | |
1942 | } | |
1943 | ||
d3310704 | 1944 | |
1945 | /* Expands the function prologue into RTX. */ | |
1946 | ||
1947 | void | |
7585fcd5 | 1948 | mmix_expand_prologue (void) |
d3310704 | 1949 | { |
1950 | HOST_WIDE_INT locals_size = get_frame_size (); | |
1951 | int regno; | |
1952 | HOST_WIDE_INT stack_space_to_allocate | |
abe32cce | 1953 | = (crtl->outgoing_args_size |
1954 | + crtl->args.pretend_args_size | |
d3310704 | 1955 | + locals_size + 7) & ~7; |
1956 | HOST_WIDE_INT offset = -8; | |
1957 | ||
1958 | /* Add room needed to save global non-register-stack registers. */ | |
1959 | for (regno = 255; | |
1960 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1961 | regno--) | |
1962 | /* Note that we assume that the frame-pointer-register is one of these | |
1963 | registers, in which case we don't count it here. */ | |
1964 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 1965 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
d3310704 | 1966 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1967 | stack_space_to_allocate += 8; | |
1968 | ||
1969 | /* If we do have a frame-pointer, add room for it. */ | |
1970 | if (frame_pointer_needed) | |
1971 | stack_space_to_allocate += 8; | |
1972 | ||
1973 | /* If we have a non-local label, we need to be able to unwind to it, so | |
1974 | store the current register stack pointer. Also store the return | |
1975 | address if we do that. */ | |
1976 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1977 | stack_space_to_allocate += 16; | |
1978 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1979 | /* If we do have a saved return-address slot, add room for it. */ | |
1980 | stack_space_to_allocate += 8; | |
1981 | ||
1982 | /* Make sure we don't get an unaligned stack. */ | |
1983 | if ((stack_space_to_allocate % 8) != 0) | |
7781aa77 | 1984 | internal_error ("stack frame not a multiple of 8 bytes: %wd", |
d3310704 | 1985 | stack_space_to_allocate); |
1986 | ||
abe32cce | 1987 | if (crtl->args.pretend_args_size) |
d3310704 | 1988 | { |
1989 | int mmix_first_vararg_reg | |
1990 | = (MMIX_FIRST_INCOMING_ARG_REGNUM | |
1991 | + (MMIX_MAX_ARGS_IN_REGS | |
abe32cce | 1992 | - crtl->args.pretend_args_size / 8)); |
d3310704 | 1993 | |
1994 | for (regno | |
1995 | = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1; | |
1996 | regno >= mmix_first_vararg_reg; | |
1997 | regno--) | |
1998 | { | |
1999 | if (offset < 0) | |
2000 | { | |
2001 | HOST_WIDE_INT stack_chunk | |
2002 | = stack_space_to_allocate > (256 - 8) | |
2003 | ? (256 - 8) : stack_space_to_allocate; | |
2004 | ||
2005 | mmix_emit_sp_add (-stack_chunk); | |
2006 | offset += stack_chunk; | |
2007 | stack_space_to_allocate -= stack_chunk; | |
2008 | } | |
2009 | ||
2010 | /* These registers aren't actually saved (as in "will be | |
2011 | restored"), so don't tell DWARF2 they're saved. */ | |
2012 | emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2013 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2014 | offset)), |
2015 | gen_rtx_REG (DImode, regno)); | |
2016 | offset -= 8; | |
2017 | } | |
2018 | } | |
2019 | ||
2020 | /* Store the frame-pointer. */ | |
2021 | ||
2022 | if (frame_pointer_needed) | |
2023 | { | |
2024 | rtx insn; | |
2025 | ||
2026 | if (offset < 0) | |
2027 | { | |
2028 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2029 | HOST_WIDE_INT stack_chunk | |
2030 | = stack_space_to_allocate > (256 - 8 - 8) | |
2031 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2032 | ||
2033 | mmix_emit_sp_add (-stack_chunk); | |
2034 | ||
2035 | offset += stack_chunk; | |
2036 | stack_space_to_allocate -= stack_chunk; | |
2037 | } | |
2038 | ||
2039 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2040 | plus_constant (Pmode, |
2041 | stack_pointer_rtx, | |
d3310704 | 2042 | offset)), |
2043 | hard_frame_pointer_rtx); | |
2044 | RTX_FRAME_RELATED_P (insn) = 1; | |
2045 | insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, | |
2046 | stack_pointer_rtx, | |
2047 | GEN_INT (offset + 8))); | |
2048 | RTX_FRAME_RELATED_P (insn) = 1; | |
2049 | offset -= 8; | |
2050 | } | |
2051 | ||
2052 | if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2053 | { | |
2054 | rtx tmpreg, retreg; | |
2055 | rtx insn; | |
2056 | ||
2057 | /* Store the return-address, if one is needed on the stack. We | |
2058 | usually store it in a register when needed, but that doesn't work | |
2059 | with -fexceptions. */ | |
2060 | ||
2061 | if (offset < 0) | |
2062 | { | |
2063 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2064 | HOST_WIDE_INT stack_chunk | |
2065 | = stack_space_to_allocate > (256 - 8 - 8) | |
2066 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2067 | ||
2068 | mmix_emit_sp_add (-stack_chunk); | |
2069 | ||
2070 | offset += stack_chunk; | |
2071 | stack_space_to_allocate -= stack_chunk; | |
2072 | } | |
2073 | ||
2074 | tmpreg = gen_rtx_REG (DImode, 255); | |
2075 | retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM); | |
2076 | ||
2077 | /* Dwarf2 code is confused by the use of a temporary register for | |
2078 | storing the return address, so we have to express it as a note, | |
2079 | which we attach to the actual store insn. */ | |
2080 | emit_move_insn (tmpreg, retreg); | |
2081 | ||
2082 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2083 | plus_constant (Pmode, |
2084 | stack_pointer_rtx, | |
d3310704 | 2085 | offset)), |
2086 | tmpreg); | |
2087 | RTX_FRAME_RELATED_P (insn) = 1; | |
c0dae7df | 2088 | add_reg_note (insn, REG_FRAME_RELATED_EXPR, |
d1f9b275 | 2089 | gen_rtx_SET (gen_rtx_MEM (DImode, |
29c05e22 | 2090 | plus_constant (Pmode, |
2091 | stack_pointer_rtx, | |
c0dae7df | 2092 | offset)), |
2093 | retreg)); | |
d3310704 | 2094 | |
2095 | offset -= 8; | |
2096 | } | |
2097 | else if (MMIX_CFUN_HAS_LANDING_PAD) | |
2098 | offset -= 8; | |
2099 | ||
2100 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2101 | { | |
2102 | /* Store the register defining the numbering of local registers, so | |
2103 | we know how long to unwind the register stack. */ | |
2104 | ||
2105 | if (offset < 0) | |
2106 | { | |
2107 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2108 | HOST_WIDE_INT stack_chunk | |
2109 | = stack_space_to_allocate > (256 - 8 - 8) | |
2110 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2111 | ||
2112 | mmix_emit_sp_add (-stack_chunk); | |
2113 | ||
2114 | offset += stack_chunk; | |
2115 | stack_space_to_allocate -= stack_chunk; | |
2116 | } | |
2117 | ||
2118 | /* We don't tell dwarf2 about this one; we just have it to unwind | |
2119 | the register stack at landing pads. FIXME: It's a kludge because | |
2120 | we can't describe the effect of the PUSHJ and PUSHGO insns on the | |
2121 | register stack at the moment. Best thing would be to handle it | |
2122 | like stack-pointer offsets. Better: some hook into dwarf2out.c | |
2123 | to produce DW_CFA_expression:s that specify the increment of rO, | |
2124 | and unwind it at eh_return (preferred) or at the landing pad. | |
2125 | Then saves to $0..$G-1 could be specified through that register. */ | |
2126 | ||
2127 | emit_move_insn (gen_rtx_REG (DImode, 255), | |
2128 | gen_rtx_REG (DImode, | |
2129 | MMIX_rO_REGNUM)); | |
2130 | emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2131 | plus_constant (Pmode, stack_pointer_rtx, |
2132 | offset)), | |
d3310704 | 2133 | gen_rtx_REG (DImode, 255)); |
2134 | offset -= 8; | |
2135 | } | |
2136 | ||
2137 | /* After the return-address and the frame-pointer, we have the local | |
2138 | variables. They're the ones that may have an "unaligned" size. */ | |
2139 | offset -= (locals_size + 7) & ~7; | |
2140 | ||
2141 | /* Now store all registers that are global, i.e. not saved by the | |
2142 | register file machinery. | |
2143 | ||
2144 | It is assumed that the frame-pointer is one of these registers, so it | |
2145 | is explicitly excluded in the count. */ | |
2146 | ||
2147 | for (regno = 255; | |
2148 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2149 | regno--) | |
2150 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2151 | && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
d3310704 | 2152 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2153 | { | |
2154 | rtx insn; | |
2155 | ||
2156 | if (offset < 0) | |
2157 | { | |
2158 | HOST_WIDE_INT stack_chunk | |
2159 | = (stack_space_to_allocate > (256 - offset - 8) | |
2160 | ? (256 - offset - 8) : stack_space_to_allocate); | |
2161 | ||
2162 | mmix_emit_sp_add (-stack_chunk); | |
2163 | offset += stack_chunk; | |
2164 | stack_space_to_allocate -= stack_chunk; | |
2165 | } | |
2166 | ||
2167 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2168 | plus_constant (Pmode, |
2169 | stack_pointer_rtx, | |
d3310704 | 2170 | offset)), |
2171 | gen_rtx_REG (DImode, regno)); | |
2172 | RTX_FRAME_RELATED_P (insn) = 1; | |
2173 | offset -= 8; | |
2174 | } | |
2175 | ||
2176 | /* Finally, allocate room for outgoing args and local vars if room | |
2177 | wasn't allocated above. */ | |
2178 | if (stack_space_to_allocate) | |
2179 | mmix_emit_sp_add (-stack_space_to_allocate); | |
2180 | } | |
2181 | ||
2182 | /* Expands the function epilogue into RTX. */ | |
2183 | ||
2184 | void | |
7585fcd5 | 2185 | mmix_expand_epilogue (void) |
d3310704 | 2186 | { |
2187 | HOST_WIDE_INT locals_size = get_frame_size (); | |
2188 | int regno; | |
2189 | HOST_WIDE_INT stack_space_to_deallocate | |
abe32cce | 2190 | = (crtl->outgoing_args_size |
2191 | + crtl->args.pretend_args_size | |
d3310704 | 2192 | + locals_size + 7) & ~7; |
2193 | ||
d3310704 | 2194 | /* The first address to access is beyond the outgoing_args area. */ |
abe32cce | 2195 | HOST_WIDE_INT offset = crtl->outgoing_args_size; |
d3310704 | 2196 | |
2197 | /* Add the space for global non-register-stack registers. | |
2198 | It is assumed that the frame-pointer register can be one of these | |
2199 | registers, in which case it is excluded from the count when needed. */ | |
2200 | for (regno = 255; | |
2201 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2202 | regno--) | |
2203 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2204 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
d3310704 | 2205 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2206 | stack_space_to_deallocate += 8; | |
2207 | ||
2208 | /* Add in the space for register stack-pointer. If so, always add room | |
2209 | for the saved PC. */ | |
2210 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2211 | stack_space_to_deallocate += 16; | |
2212 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2213 | /* If we have a saved return-address slot, add it in. */ | |
2214 | stack_space_to_deallocate += 8; | |
2215 | ||
2216 | /* Add in the frame-pointer. */ | |
2217 | if (frame_pointer_needed) | |
2218 | stack_space_to_deallocate += 8; | |
2219 | ||
2220 | /* Make sure we don't get an unaligned stack. */ | |
2221 | if ((stack_space_to_deallocate % 8) != 0) | |
7781aa77 | 2222 | internal_error ("stack frame not a multiple of octabyte: %wd", |
d3310704 | 2223 | stack_space_to_deallocate); |
2224 | ||
2225 | /* We will add back small offsets to the stack pointer as we go. | |
2226 | First, we restore all registers that are global, i.e. not saved by | |
2227 | the register file machinery. */ | |
2228 | ||
2229 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
2230 | regno <= 255; | |
2231 | regno++) | |
2232 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2233 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
d3310704 | 2234 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2235 | { | |
2236 | if (offset > 255) | |
2237 | { | |
2238 | mmix_emit_sp_add (offset); | |
2239 | stack_space_to_deallocate -= offset; | |
2240 | offset = 0; | |
2241 | } | |
2242 | ||
2243 | emit_move_insn (gen_rtx_REG (DImode, regno), | |
2244 | gen_rtx_MEM (DImode, | |
29c05e22 | 2245 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2246 | offset))); |
2247 | offset += 8; | |
2248 | } | |
2249 | ||
2250 | /* Here is where the local variables were. As in the prologue, they | |
2251 | might be of an unaligned size. */ | |
2252 | offset += (locals_size + 7) & ~7; | |
2253 | ||
d3310704 | 2254 | /* The saved register stack pointer is just below the frame-pointer |
2255 | register. We don't need to restore it "manually"; the POP | |
2256 | instruction does that. */ | |
2257 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2258 | offset += 16; | |
2259 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2260 | /* The return-address slot is just below the frame-pointer register. | |
2261 | We don't need to restore it because we don't really use it. */ | |
2262 | offset += 8; | |
2263 | ||
2264 | /* Get back the old frame-pointer-value. */ | |
2265 | if (frame_pointer_needed) | |
2266 | { | |
2267 | if (offset > 255) | |
2268 | { | |
2269 | mmix_emit_sp_add (offset); | |
2270 | ||
2271 | stack_space_to_deallocate -= offset; | |
2272 | offset = 0; | |
2273 | } | |
2274 | ||
2275 | emit_move_insn (hard_frame_pointer_rtx, | |
2276 | gen_rtx_MEM (DImode, | |
29c05e22 | 2277 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2278 | offset))); |
2279 | offset += 8; | |
2280 | } | |
2281 | ||
2282 | /* We do not need to restore pretended incoming args, just add back | |
2283 | offset to sp. */ | |
2284 | if (stack_space_to_deallocate != 0) | |
2285 | mmix_emit_sp_add (stack_space_to_deallocate); | |
2286 | ||
18d50ae6 | 2287 | if (crtl->calls_eh_return) |
d3310704 | 2288 | /* Adjust the (normal) stack-pointer to that of the receiver. |
2289 | FIXME: It would be nice if we could also adjust the register stack | |
2290 | here, but we need to express it through DWARF 2 too. */ | |
2291 | emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, | |
2292 | gen_rtx_REG (DImode, | |
2293 | MMIX_EH_RETURN_STACKADJ_REGNUM))); | |
2294 | } | |
2295 | ||
68cbb7e3 | 2296 | /* Output an optimal sequence for setting a register to a specific |
2297 | constant. Used in an alternative for const_ints in movdi, and when | |
2298 | using large stack-frame offsets. | |
2299 | ||
2300 | Use do_begin_end to say if a line-starting TAB and newline before the | |
2301 | first insn and after the last insn is wanted. */ | |
2302 | ||
2303 | void | |
7585fcd5 | 2304 | mmix_output_register_setting (FILE *stream, |
2305 | int regno, | |
3a4303e7 | 2306 | int64_t value, |
7585fcd5 | 2307 | int do_begin_end) |
68cbb7e3 | 2308 | { |
2309 | if (do_begin_end) | |
2310 | fprintf (stream, "\t"); | |
2311 | ||
4d66cf01 | 2312 | if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K)) |
f03df321 | 2313 | fprintf (stream, "NEGU %s,0,%" PRId64, reg_names[regno], -value); |
3a4303e7 | 2314 | else if (mmix_shiftable_wyde_value ((uint64_t) value)) |
68cbb7e3 | 2315 | { |
2316 | /* First, the one-insn cases. */ | |
2317 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2318 | (uint64_t) |
68cbb7e3 | 2319 | value); |
2320 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2321 | mmix_output_shifted_value (stream, (uint64_t) value); |
68cbb7e3 | 2322 | } |
3a4303e7 | 2323 | else if (mmix_shiftable_wyde_value (-(uint64_t) value)) |
68cbb7e3 | 2324 | { |
2325 | /* We do this to get a bit more legible assembly code. The next | |
2326 | alternative is mostly redundant with this. */ | |
2327 | ||
2328 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2329 | -(uint64_t) |
68cbb7e3 | 2330 | value); |
2331 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2332 | mmix_output_shifted_value (stream, -(uint64_t) value); |
68cbb7e3 | 2333 | fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno], |
2334 | reg_names[regno]); | |
2335 | } | |
3a4303e7 | 2336 | else if (mmix_shiftable_wyde_value (~(uint64_t) value)) |
68cbb7e3 | 2337 | { |
2338 | /* Slightly more expensive, the two-insn cases. */ | |
2339 | ||
2340 | /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255) | |
2341 | is shiftable, or any other one-insn transformation of the value. | |
2342 | FIXME: Check first if the value is "shiftable" by two loading | |
2343 | with two insns, since it makes more readable assembly code (if | |
2344 | anyone else cares). */ | |
2345 | ||
2346 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2347 | ~(uint64_t) |
68cbb7e3 | 2348 | value); |
2349 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2350 | mmix_output_shifted_value (stream, ~(uint64_t) value); |
68cbb7e3 | 2351 | fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno], |
2352 | reg_names[regno]); | |
2353 | } | |
2354 | else | |
2355 | { | |
2356 | /* The generic case. 2..4 insns. */ | |
25037517 | 2357 | static const char *const higher_parts[] = {"L", "ML", "MH", "H"}; |
68cbb7e3 | 2358 | const char *op = "SET"; |
2359 | const char *line_begin = ""; | |
f0b228a5 | 2360 | int insns = 0; |
68cbb7e3 | 2361 | int i; |
3a4303e7 | 2362 | int64_t tmpvalue = value; |
68cbb7e3 | 2363 | |
f0b228a5 | 2364 | /* Compute the number of insns needed to output this constant. */ |
2365 | for (i = 0; i < 4 && tmpvalue != 0; i++) | |
2366 | { | |
2367 | if (tmpvalue & 65535) | |
2368 | insns++; | |
2369 | tmpvalue >>= 16; | |
2370 | } | |
2371 | if (TARGET_BASE_ADDRESSES && insns == 3) | |
2372 | { | |
2373 | /* The number three is based on a static observation on | |
2374 | ghostscript-6.52. Two and four are excluded because there | |
2375 | are too many such constants, and each unique constant (maybe | |
2376 | offset by 1..255) were used few times compared to other uses, | |
2377 | e.g. addresses. | |
2378 | ||
2379 | We use base-plus-offset addressing to force it into a global | |
2380 | register; we just use a "LDA reg,VALUE", which will cause the | |
2381 | assembler and linker to DTRT (for constants as well as | |
2382 | addresses). */ | |
2383 | fprintf (stream, "LDA %s,", reg_names[regno]); | |
2384 | mmix_output_octa (stream, value, 0); | |
2385 | } | |
2386 | else | |
68cbb7e3 | 2387 | { |
f0b228a5 | 2388 | /* Output pertinent parts of the 4-wyde sequence. |
2389 | Still more to do if we want this to be optimal, but hey... | |
2390 | Note that the zero case has been handled above. */ | |
2391 | for (i = 0; i < 4 && value != 0; i++) | |
68cbb7e3 | 2392 | { |
f0b228a5 | 2393 | if (value & 65535) |
2394 | { | |
2395 | fprintf (stream, "%s%s%s %s,#%x", line_begin, op, | |
2396 | higher_parts[i], reg_names[regno], | |
2397 | (int) (value & 65535)); | |
2398 | /* The first one sets the rest of the bits to 0, the next | |
2399 | ones add set bits. */ | |
2400 | op = "INC"; | |
2401 | line_begin = "\n\t"; | |
2402 | } | |
68cbb7e3 | 2403 | |
f0b228a5 | 2404 | value >>= 16; |
2405 | } | |
68cbb7e3 | 2406 | } |
2407 | } | |
2408 | ||
2409 | if (do_begin_end) | |
2410 | fprintf (stream, "\n"); | |
2411 | } | |
2412 | ||
2413 | /* Return 1 if value is 0..65535*2**(16*N) for N=0..3. | |
2414 | else return 0. */ | |
2415 | ||
2416 | int | |
3a4303e7 | 2417 | mmix_shiftable_wyde_value (uint64_t value) |
68cbb7e3 | 2418 | { |
2419 | /* Shift by 16 bits per group, stop when we've found two groups with | |
2420 | nonzero bits. */ | |
2421 | int i; | |
2422 | int has_candidate = 0; | |
2423 | ||
2424 | for (i = 0; i < 4; i++) | |
2425 | { | |
2426 | if (value & 65535) | |
2427 | { | |
2428 | if (has_candidate) | |
2429 | return 0; | |
2430 | else | |
2431 | has_candidate = 1; | |
2432 | } | |
2433 | ||
2434 | value >>= 16; | |
2435 | } | |
2436 | ||
2437 | return 1; | |
2438 | } | |
2439 | ||
74f4459c | 2440 | /* X and Y are two things to compare using CODE. Return the rtx for |
2441 | the cc-reg in the proper mode. */ | |
68cbb7e3 | 2442 | |
2443 | rtx | |
7585fcd5 | 2444 | mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) |
68cbb7e3 | 2445 | { |
3754d046 | 2446 | machine_mode ccmode = SELECT_CC_MODE (code, x, y); |
74f4459c | 2447 | return gen_reg_rtx (ccmode); |
68cbb7e3 | 2448 | } |
2449 | ||
2450 | /* Local (static) helper functions. */ | |
2451 | ||
d3310704 | 2452 | static void |
7585fcd5 | 2453 | mmix_emit_sp_add (HOST_WIDE_INT offset) |
d3310704 | 2454 | { |
2455 | rtx insn; | |
2456 | ||
2457 | if (offset < 0) | |
2458 | { | |
2459 | /* Negative stack-pointer adjustments are allocations and appear in | |
2460 | the prologue only. We mark them as frame-related so unwind and | |
2461 | debug info is properly emitted for them. */ | |
2462 | if (offset > -255) | |
2463 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2464 | stack_pointer_rtx, | |
2465 | GEN_INT (offset))); | |
2466 | else | |
2467 | { | |
2468 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2469 | RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1; | |
2470 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2471 | stack_pointer_rtx, tmpr)); | |
2472 | } | |
2473 | RTX_FRAME_RELATED_P (insn) = 1; | |
2474 | } | |
2475 | else | |
2476 | { | |
2477 | /* Positive adjustments are in the epilogue only. Don't mark them | |
2478 | as "frame-related" for unwind info. */ | |
f105c84e | 2479 | if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L)) |
d3310704 | 2480 | emit_insn (gen_adddi3 (stack_pointer_rtx, |
2481 | stack_pointer_rtx, | |
2482 | GEN_INT (offset))); | |
2483 | else | |
2484 | { | |
2485 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2486 | emit_move_insn (tmpr, GEN_INT (offset)); | |
2487 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2488 | stack_pointer_rtx, tmpr)); | |
2489 | } | |
2490 | } | |
2491 | } | |
2492 | ||
68cbb7e3 | 2493 | /* Print operator suitable for doing something with a shiftable |
ebb11c7b | 2494 | wyde. The type of operator is passed as an asm output modifier. */ |
68cbb7e3 | 2495 | |
2496 | static void | |
7585fcd5 | 2497 | mmix_output_shiftvalue_op_from_str (FILE *stream, |
2498 | const char *mainop, | |
3a4303e7 | 2499 | int64_t value) |
68cbb7e3 | 2500 | { |
25037517 | 2501 | static const char *const op_part[] = {"L", "ML", "MH", "H"}; |
68cbb7e3 | 2502 | int i; |
2503 | ||
2504 | if (! mmix_shiftable_wyde_value (value)) | |
2505 | { | |
2506 | char s[sizeof ("0xffffffffffffffff")]; | |
9d247a3d | 2507 | sprintf (s, "%#" PRIx64, value); |
68cbb7e3 | 2508 | internal_error ("MMIX Internal: %s is not a shiftable int", s); |
2509 | } | |
2510 | ||
2511 | for (i = 0; i < 4; i++) | |
2512 | { | |
2513 | /* We know we're through when we find one-bits in the low | |
2514 | 16 bits. */ | |
2515 | if (value & 0xffff) | |
2516 | { | |
2517 | fprintf (stream, "%s%s", mainop, op_part[i]); | |
2518 | return; | |
2519 | } | |
2520 | value >>= 16; | |
2521 | } | |
2522 | ||
2523 | /* No bits set? Then it must have been zero. */ | |
2524 | fprintf (stream, "%sL", mainop); | |
2525 | } | |
2526 | ||
2527 | /* Print a 64-bit value, optionally prefixed by assembly pseudo. */ | |
2528 | ||
2529 | static void | |
3a4303e7 | 2530 | mmix_output_octa (FILE *stream, int64_t value, int do_begin_end) |
68cbb7e3 | 2531 | { |
68cbb7e3 | 2532 | if (do_begin_end) |
2533 | fprintf (stream, "\tOCTA "); | |
2534 | ||
68cbb7e3 | 2535 | /* Provide a few alternative output formats depending on the number, to |
2536 | improve legibility of assembler output. */ | |
3a4303e7 | 2537 | if ((value < (int64_t) 0 && value > (int64_t) -10000) |
2538 | || (value >= (int64_t) 0 && value <= (int64_t) 16384)) | |
68cbb7e3 | 2539 | fprintf (stream, "%d", (int) value); |
3a4303e7 | 2540 | else if (value > (int64_t) 0 |
2541 | && value < ((int64_t) 1 << 31) * 2) | |
68cbb7e3 | 2542 | fprintf (stream, "#%x", (unsigned int) value); |
3a4303e7 | 2543 | else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t)) |
6996b123 | 2544 | /* We need to avoid the not-so-universal "0x" prefix; we need the |
2545 | pure hex-digits together with the mmixal "#" hex prefix. */ | |
2546 | fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE, | |
2547 | (HOST_WIDE_INT) value); | |
2548 | else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */ | |
9d247a3d | 2549 | fprintf (stream, "%" PRIu64, value); |
68cbb7e3 | 2550 | |
2551 | if (do_begin_end) | |
2552 | fprintf (stream, "\n"); | |
2553 | } | |
2554 | ||
2555 | /* Print the presumed shiftable wyde argument shifted into place (to | |
2556 | be output with an operand). */ | |
2557 | ||
2558 | static void | |
3a4303e7 | 2559 | mmix_output_shifted_value (FILE *stream, int64_t value) |
68cbb7e3 | 2560 | { |
2561 | int i; | |
2562 | ||
2563 | if (! mmix_shiftable_wyde_value (value)) | |
2564 | { | |
2565 | char s[16+2+1]; | |
9d247a3d | 2566 | sprintf (s, "%#" PRIx64, value); |
68cbb7e3 | 2567 | internal_error ("MMIX Internal: %s is not a shiftable int", s); |
2568 | } | |
2569 | ||
2570 | for (i = 0; i < 4; i++) | |
68cbb7e3 | 2571 | { |
7585fcd5 | 2572 | /* We know we're through when we find one-bits in the low 16 bits. */ |
2573 | if (value & 0xffff) | |
2574 | { | |
2575 | fprintf (stream, "#%x", (int) (value & 0xffff)); | |
2576 | return; | |
2577 | } | |
68cbb7e3 | 2578 | |
2579 | value >>= 16; | |
2580 | } | |
2581 | ||
2582 | /* No bits set? Then it must have been zero. */ | |
2583 | fprintf (stream, "0"); | |
2584 | } | |
2585 | ||
2586 | /* Output an MMIX condition name corresponding to an operator | |
2587 | and operands: | |
2588 | (comparison_operator [(comparison_operator ...) (const_int 0)]) | |
2589 | which means we have to look at *two* operators. | |
2590 | ||
2591 | The argument "reversed" refers to reversal of the condition (not the | |
2592 | same as swapping the arguments). */ | |
2593 | ||
2594 | static void | |
7a7fb407 | 2595 | mmix_output_condition (FILE *stream, const_rtx x, int reversed) |
68cbb7e3 | 2596 | { |
2597 | struct cc_conv | |
2598 | { | |
2599 | RTX_CODE cc; | |
2600 | ||
2601 | /* The normal output cc-code. */ | |
2602 | const char *const normal; | |
2603 | ||
2604 | /* The reversed cc-code, or NULL if invalid. */ | |
2605 | const char *const reversed; | |
2606 | }; | |
2607 | ||
2608 | struct cc_type_conv | |
2609 | { | |
3754d046 | 2610 | machine_mode cc_mode; |
68cbb7e3 | 2611 | |
21f1e711 | 2612 | /* Terminated with {UNKNOWN, NULL, NULL} */ |
68cbb7e3 | 2613 | const struct cc_conv *const convs; |
2614 | }; | |
2615 | ||
2616 | #undef CCEND | |
21f1e711 | 2617 | #define CCEND {UNKNOWN, NULL, NULL} |
68cbb7e3 | 2618 | |
2619 | static const struct cc_conv cc_fun_convs[] | |
2620 | = {{ORDERED, "Z", "P"}, | |
2621 | {UNORDERED, "P", "Z"}, | |
2622 | CCEND}; | |
2623 | static const struct cc_conv cc_fp_convs[] | |
2624 | = {{GT, "P", NULL}, | |
2625 | {LT, "N", NULL}, | |
2626 | CCEND}; | |
2627 | static const struct cc_conv cc_fpeq_convs[] | |
2628 | = {{NE, "Z", "P"}, | |
2629 | {EQ, "P", "Z"}, | |
2630 | CCEND}; | |
2631 | static const struct cc_conv cc_uns_convs[] | |
2632 | = {{GEU, "NN", "N"}, | |
2633 | {GTU, "P", "NP"}, | |
2634 | {LEU, "NP", "P"}, | |
2635 | {LTU, "N", "NN"}, | |
2636 | CCEND}; | |
2637 | static const struct cc_conv cc_signed_convs[] | |
2638 | = {{NE, "NZ", "Z"}, | |
2639 | {EQ, "Z", "NZ"}, | |
2640 | {GE, "NN", "N"}, | |
2641 | {GT, "P", "NP"}, | |
2642 | {LE, "NP", "P"}, | |
2643 | {LT, "N", "NN"}, | |
2644 | CCEND}; | |
2645 | static const struct cc_conv cc_di_convs[] | |
2646 | = {{NE, "NZ", "Z"}, | |
2647 | {EQ, "Z", "NZ"}, | |
2648 | {GE, "NN", "N"}, | |
2649 | {GT, "P", "NP"}, | |
2650 | {LE, "NP", "P"}, | |
2651 | {LT, "N", "NN"}, | |
2652 | {GTU, "NZ", "Z"}, | |
2653 | {LEU, "Z", "NZ"}, | |
2654 | CCEND}; | |
2655 | #undef CCEND | |
2656 | ||
2657 | static const struct cc_type_conv cc_convs[] | |
2658 | = {{CC_FUNmode, cc_fun_convs}, | |
2659 | {CC_FPmode, cc_fp_convs}, | |
2660 | {CC_FPEQmode, cc_fpeq_convs}, | |
2661 | {CC_UNSmode, cc_uns_convs}, | |
2662 | {CCmode, cc_signed_convs}, | |
2663 | {DImode, cc_di_convs}}; | |
2664 | ||
3585dac7 | 2665 | size_t i; |
68cbb7e3 | 2666 | int j; |
2667 | ||
3754d046 | 2668 | machine_mode mode = GET_MODE (XEXP (x, 0)); |
68cbb7e3 | 2669 | RTX_CODE cc = GET_CODE (x); |
2670 | ||
3585dac7 | 2671 | for (i = 0; i < ARRAY_SIZE (cc_convs); i++) |
68cbb7e3 | 2672 | { |
2673 | if (mode == cc_convs[i].cc_mode) | |
2674 | { | |
21f1e711 | 2675 | for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++) |
68cbb7e3 | 2676 | if (cc == cc_convs[i].convs[j].cc) |
2677 | { | |
2678 | const char *mmix_cc | |
2679 | = (reversed ? cc_convs[i].convs[j].reversed | |
2680 | : cc_convs[i].convs[j].normal); | |
2681 | ||
2682 | if (mmix_cc == NULL) | |
2683 | fatal_insn ("MMIX Internal: Trying to output invalidly\ | |
2684 | reversed condition:", x); | |
2685 | ||
2686 | fprintf (stream, "%s", mmix_cc); | |
2687 | return; | |
2688 | } | |
2689 | ||
2690 | fatal_insn ("MMIX Internal: What's the CC of this?", x); | |
2691 | } | |
2692 | } | |
2693 | ||
2694 | fatal_insn ("MMIX Internal: What is the CC of this?", x); | |
2695 | } | |
2696 | ||
2697 | /* Return the bit-value for a const_int or const_double. */ | |
2698 | ||
3a4303e7 | 2699 | int64_t |
7a7fb407 | 2700 | mmix_intval (const_rtx x) |
68cbb7e3 | 2701 | { |
68cbb7e3 | 2702 | if (GET_CODE (x) == CONST_INT) |
2703 | return INTVAL (x); | |
2704 | ||
2705 | /* We make a little song and dance because converting to long long in | |
2706 | gcc-2.7.2 is broken. I still want people to be able to use it for | |
2707 | cross-compilation to MMIX. */ | |
2708 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode) | |
3a4303e7 | 2709 | return CONST_DOUBLE_HIGH (x); |
68cbb7e3 | 2710 | |
2711 | if (GET_CODE (x) == CONST_DOUBLE) | |
2712 | { | |
68cbb7e3 | 2713 | if (GET_MODE (x) == DFmode) |
2714 | { | |
2715 | long bits[2]; | |
dc8dc4ce | 2716 | |
945f7b03 | 2717 | REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), bits); |
68cbb7e3 | 2718 | |
ca2399d9 | 2719 | /* The double cast is necessary to avoid getting the long |
2720 | sign-extended to unsigned long long(!) when they're of | |
2721 | different size (usually 32-bit hosts). */ | |
2722 | return | |
3a4303e7 | 2723 | ((uint64_t) (unsigned long) bits[0] |
2724 | << (uint64_t) 32U) | |
2725 | | (uint64_t) (unsigned long) bits[1]; | |
68cbb7e3 | 2726 | } |
2727 | else if (GET_MODE (x) == SFmode) | |
2728 | { | |
2729 | long bits; | |
945f7b03 | 2730 | REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), bits); |
68cbb7e3 | 2731 | |
2732 | return (unsigned long) bits; | |
2733 | } | |
2734 | } | |
2735 | ||
2736 | fatal_insn ("MMIX Internal: This is not a constant:", x); | |
2737 | } | |
2738 | ||
3b2411a8 | 2739 | /* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */ |
2740 | ||
3754d046 | 2741 | machine_mode |
3b2411a8 | 2742 | mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, |
3754d046 | 2743 | machine_mode mode, |
3b2411a8 | 2744 | int *punsignedp ATTRIBUTE_UNUSED, |
2745 | const_tree fntype ATTRIBUTE_UNUSED, | |
2746 | int for_return) | |
2747 | { | |
2748 | /* Apparently not doing TRT if int < register-size. FIXME: Perhaps | |
2749 | FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */ | |
c879dbcf | 2750 | if (for_return == 1) |
3b2411a8 | 2751 | return mode; |
2752 | ||
2753 | /* Promotion of modes currently generates slow code, extending before | |
2754 | operation, so we do it only for arguments. */ | |
2755 | if (GET_MODE_CLASS (mode) == MODE_INT | |
2756 | && GET_MODE_SIZE (mode) < 8) | |
2757 | return DImode; | |
2758 | else | |
2759 | return mode; | |
2760 | } | |
9e4a734a | 2761 | /* Worker function for TARGET_STRUCT_VALUE_RTX. */ |
2762 | ||
2763 | static rtx | |
2764 | mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, | |
2765 | int incoming ATTRIBUTE_UNUSED) | |
2766 | { | |
2767 | return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM); | |
2768 | } | |
2769 | ||
5a1c68c3 | 2770 | /* Worker function for TARGET_FRAME_POINTER_REQUIRED. |
2771 | ||
2772 | FIXME: Is this requirement built-in? Anyway, we should try to get rid | |
2773 | of it; we can deduce the value. */ | |
2774 | ||
2775 | bool | |
2776 | mmix_frame_pointer_required (void) | |
2777 | { | |
2778 | return (cfun->has_nonlocal_label); | |
2779 | } | |
2780 | ||
68cbb7e3 | 2781 | /* |
2782 | * Local variables: | |
2783 | * eval: (c-set-style "gnu") | |
2784 | * indent-tabs-mode: t | |
2785 | * End: | |
2786 | */ |