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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
8e8f6434 2 Copyright (C) 2000-2018 Free Software Foundation, Inc.
68cbb7e3 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
581084df 5This file is part of GCC.
68cbb7e3 6
581084df 7GCC is free software; you can redistribute it and/or modify
68cbb7e3 8it under the terms of the GNU General Public License as published by
038d1e19 9the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 10any later version.
11
581084df 12GCC is distributed in the hope that it will be useful,
68cbb7e3 13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
038d1e19 18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
68cbb7e3 20
785790dc 21#define IN_TARGET_CODE 1
22
68cbb7e3 23#include "config.h"
24#include "system.h"
805e22b2 25#include "coretypes.h"
9ef16211 26#include "backend.h"
c1eb80de 27#include "target.h"
68cbb7e3 28#include "rtl.h"
c1eb80de 29#include "tree.h"
30a86690 30#include "stringpool.h"
31#include "attribs.h"
9ef16211 32#include "df.h"
ad7b10a2 33#include "memmodel.h"
c1eb80de 34#include "tm_p.h"
68cbb7e3 35#include "insn-config.h"
c1eb80de 36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "diagnostic-core.h"
68cbb7e3 40#include "output.h"
9ed99284 41#include "varasm.h"
42#include "stor-layout.h"
43#include "calls.h"
d53441c8 44#include "explow.h"
68cbb7e3 45#include "expr.h"
bde36f4a 46#include "dwarf2.h"
f105c84e 47#include "tm-constrs.h"
f7715905 48#include "builtins.h"
68cbb7e3 49
0c71fb4f 50/* This file should be included last. */
4b498588 51#include "target-def.h"
52
68cbb7e3 53/* First some local helper definitions. */
54#define MMIX_FIRST_GLOBAL_REGNUM 32
55
56/* We'd need a current_function_has_landing_pad. It's marked as such when
57 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
58 mostly. */
59#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
60
61/* We have no means to tell DWARF 2 about the register stack, so we need
62 to store the return address on the stack if an exception can get into
e66a5c02 63 this function. We'll have an "initial value" recorded for the
64 return-register if we've seen a call instruction emitted. This note
65 will be inaccurate before instructions are emitted, but the only caller
66 at that time is looking for modulo from stack-boundary, to which the
67 return-address does not contribute, and which is always 0 for MMIX
68 anyway. Beware of calling leaf_function_p here, as it'll abort if
69 called within a sequence. */
d3310704 70#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
71 (flag_exceptions \
e66a5c02 72 && has_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
68cbb7e3 73
74#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 75 (crtl->calls_eh_return \
68cbb7e3 76 && (EH_RETURN_DATA_REGNO (0) == REGNO \
77 || EH_RETURN_DATA_REGNO (1) == REGNO \
78 || EH_RETURN_DATA_REGNO (2) == REGNO \
79 || EH_RETURN_DATA_REGNO (3) == REGNO))
80
d68ffc6f 81/* For the default ABI, we rename registers at output-time to fill the gap
82 between the (statically partitioned) saved registers and call-clobbered
83 registers. In effect this makes unused call-saved registers to be used
84 as call-clobbered registers. The benefit comes from keeping the number
85 of local registers (value of rL) low, since there's a cost of
d3310704 86 increasing rL and clearing unused (unset) registers with lower numbers.
87 Don't translate while outputting the prologue. */
d68ffc6f 88#define MMIX_OUTPUT_REGNO(N) \
89 (TARGET_ABI_GNU \
0b123c47 90 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
91 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 92 || cfun == NULL \
93 || cfun->machine == NULL \
94 || cfun->machine->in_prologue \
d68ffc6f 95 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
96 + cfun->machine->highest_saved_stack_register + 1))
97
0b123c47 98/* The %d in "POP %d,0". */
99#define MMIX_POP_ARGUMENT() \
100 ((! TARGET_ABI_GNU \
abe32cce 101 && crtl->return_rtx != NULL \
18d50ae6 102 && ! cfun->returns_struct) \
abe32cce 103 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
104 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 105 : 0)
106
68cbb7e3 107/* The canonical saved comparison operands for non-cc0 machines, set in
108 the compare expander. */
109rtx mmix_compare_op0;
110rtx mmix_compare_op1;
111
68cbb7e3 112/* Declarations of locals. */
113
68cbb7e3 114/* Intermediate for insn output. */
115static int mmix_output_destination_register;
116
4c834714 117static void mmix_option_override (void);
40fe393f 118static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 119static void mmix_output_shiftvalue_op_from_str
3a4303e7 120 (FILE *, const char *, int64_t);
121static void mmix_output_shifted_value (FILE *, int64_t);
7a7fb407 122static void mmix_output_condition (FILE *, const_rtx, int);
3a4303e7 123static void mmix_output_octa (FILE *, int64_t, int);
7585fcd5 124static bool mmix_assemble_integer (rtx, unsigned int, int);
125static struct machine_function *mmix_init_machine_status (void);
126static void mmix_encode_section_info (tree, rtx, int);
127static const char *mmix_strip_name_encoding (const char *);
128static void mmix_emit_sp_add (HOST_WIDE_INT offset);
718e6d56 129static void mmix_target_asm_function_prologue (FILE *);
7585fcd5 130static void mmix_target_asm_function_end_prologue (FILE *);
718e6d56 131static void mmix_target_asm_function_epilogue (FILE *);
27925877 132static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
133static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
3754d046 134static bool mmix_legitimate_address_p (machine_mode, rtx, bool);
135static bool mmix_legitimate_constant_p (machine_mode, rtx);
7585fcd5 136static void mmix_reorg (void);
6988553d 137static void mmix_asm_output_mi_thunk
7585fcd5 138 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 139static void mmix_setup_incoming_varargs
3754d046 140 (cumulative_args_t, machine_mode, tree, int *, int);
7585fcd5 141static void mmix_file_start (void);
142static void mmix_file_end (void);
5ae4887d 143static bool mmix_rtx_costs (rtx, machine_mode, int, int, int *, bool);
3754d046 144static int mmix_register_move_cost (machine_mode,
f7e13ca6 145 reg_class_t, reg_class_t);
9e4a734a 146static rtx mmix_struct_value_rtx (tree, int);
3754d046 147static machine_mode mmix_promote_function_mode (const_tree,
148 machine_mode,
3b2411a8 149 int *, const_tree, int);
3754d046 150static void mmix_function_arg_advance (cumulative_args_t, machine_mode,
5d246ebf 151 const_tree, bool);
3754d046 152static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode,
5d246ebf 153 const_tree, bool, bool);
3754d046 154static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode,
5d246ebf 155 const_tree, bool);
3754d046 156static rtx mmix_function_arg (cumulative_args_t, machine_mode,
5d246ebf 157 const_tree, bool);
b600778c 158static rtx mmix_function_value (const_tree, const_tree, bool);
3754d046 159static rtx mmix_libcall_value (machine_mode, const_rtx);
b600778c 160static bool mmix_function_value_regno_p (const unsigned int);
39cba157 161static bool mmix_pass_by_reference (cumulative_args_t,
3754d046 162 machine_mode, const_tree, bool);
5a1c68c3 163static bool mmix_frame_pointer_required (void);
604d844a 164static void mmix_asm_trampoline_template (FILE *);
165static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 166static void mmix_print_operand (FILE *, rtx, int);
3c047fe9 167static void mmix_print_operand_address (FILE *, machine_mode, rtx);
7a7fb407 168static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 169static void mmix_conditional_register_usage (void);
1cdbc719 170static HOST_WIDE_INT mmix_static_rtx_alignment (machine_mode);
579d67ba 171static HOST_WIDE_INT mmix_constant_alignment (const_tree, HOST_WIDE_INT);
8374586c 172static HOST_WIDE_INT mmix_starting_frame_offset (void);
68cbb7e3 173
174/* Target structure macros. Listed by node. See `Using and Porting GCC'
175 for a general description. */
176
177/* Node: Function Entry */
178
58356836 179#undef TARGET_ASM_BYTE_OP
180#define TARGET_ASM_BYTE_OP NULL
181#undef TARGET_ASM_ALIGNED_HI_OP
182#define TARGET_ASM_ALIGNED_HI_OP NULL
183#undef TARGET_ASM_ALIGNED_SI_OP
184#define TARGET_ASM_ALIGNED_SI_OP NULL
185#undef TARGET_ASM_ALIGNED_DI_OP
186#define TARGET_ASM_ALIGNED_DI_OP NULL
187#undef TARGET_ASM_INTEGER
188#define TARGET_ASM_INTEGER mmix_assemble_integer
189
68cbb7e3 190#undef TARGET_ASM_FUNCTION_PROLOGUE
191#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
192
d3310704 193#undef TARGET_ASM_FUNCTION_END_PROLOGUE
194#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
195
68cbb7e3 196#undef TARGET_ASM_FUNCTION_EPILOGUE
197#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
198
7a7fb407 199#undef TARGET_PRINT_OPERAND
200#define TARGET_PRINT_OPERAND mmix_print_operand
201#undef TARGET_PRINT_OPERAND_ADDRESS
202#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
203#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
204#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
205
7811991d 206#undef TARGET_ENCODE_SECTION_INFO
207#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 208#undef TARGET_STRIP_NAME_ENCODING
209#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 210
6988553d 211#undef TARGET_ASM_OUTPUT_MI_THUNK
212#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 213#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
214#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 215#undef TARGET_ASM_FILE_START
216#define TARGET_ASM_FILE_START mmix_file_start
217#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
218#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 219#undef TARGET_ASM_FILE_END
220#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 221#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
222#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 223
b2d7ede1 224#undef TARGET_CONDITIONAL_REGISTER_USAGE
225#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
226
fab7adbf 227#undef TARGET_RTX_COSTS
228#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 229#undef TARGET_ADDRESS_COST
d9c5e5f4 230#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
fab7adbf 231
f7e13ca6 232#undef TARGET_REGISTER_MOVE_COST
233#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
234
2efea8c0 235#undef TARGET_MACHINE_DEPENDENT_REORG
236#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
237
3b2411a8 238#undef TARGET_PROMOTE_FUNCTION_MODE
239#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
240
b600778c 241#undef TARGET_FUNCTION_VALUE
242#define TARGET_FUNCTION_VALUE mmix_function_value
243#undef TARGET_LIBCALL_VALUE
244#define TARGET_LIBCALL_VALUE mmix_libcall_value
245#undef TARGET_FUNCTION_VALUE_REGNO_P
246#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 247
5d246ebf 248#undef TARGET_FUNCTION_ARG
249#define TARGET_FUNCTION_ARG mmix_function_arg
250#undef TARGET_FUNCTION_INCOMING_ARG
251#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
252#undef TARGET_FUNCTION_ARG_ADVANCE
253#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 254#undef TARGET_STRUCT_VALUE_RTX
255#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 256#undef TARGET_SETUP_INCOMING_VARARGS
257#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 258#undef TARGET_PASS_BY_REFERENCE
259#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 260#undef TARGET_CALLEE_COPIES
261#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 262
27925877 263#undef TARGET_PREFERRED_RELOAD_CLASS
264#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
265#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 266#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 267
e46fbef5 268#undef TARGET_LRA_P
269#define TARGET_LRA_P hook_bool_void_false
270
fd50b071 271#undef TARGET_LEGITIMATE_ADDRESS_P
272#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 273#undef TARGET_LEGITIMATE_CONSTANT_P
274#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 275
5a1c68c3 276#undef TARGET_FRAME_POINTER_REQUIRED
277#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
278
604d844a 279#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
280#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
281#undef TARGET_TRAMPOLINE_INIT
282#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
283
4c834714 284#undef TARGET_OPTION_OVERRIDE
285#define TARGET_OPTION_OVERRIDE mmix_option_override
286
1cdbc719 287#undef TARGET_STATIC_RTX_ALIGNMENT
288#define TARGET_STATIC_RTX_ALIGNMENT mmix_static_rtx_alignment
579d67ba 289#undef TARGET_CONSTANT_ALIGNMENT
290#define TARGET_CONSTANT_ALIGNMENT mmix_constant_alignment
291
8374586c 292#undef TARGET_STARTING_FRAME_OFFSET
293#define TARGET_STARTING_FRAME_OFFSET mmix_starting_frame_offset
294
68cbb7e3 295struct gcc_target targetm = TARGET_INITIALIZER;
296
297/* Functions that are expansions for target macros.
298 See Target Macros in `Using and Porting GCC'. */
299
4c834714 300/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 301
4c834714 302static void
303mmix_option_override (void)
68cbb7e3 304{
305 /* Should we err or should we warn? Hmm. At least we must neutralize
306 it. For example the wrong kind of case-tables will be generated with
307 PIC; we use absolute address items for mmixal compatibility. FIXME:
308 They could be relative if we just elide them to after all pertinent
309 labels. */
310 if (flag_pic)
311 {
c3ceba8e 312 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 313 flag_pic = 0;
314 }
68cbb7e3 315}
316
317/* INIT_EXPANDERS. */
318
319void
7585fcd5 320mmix_init_expanders (void)
68cbb7e3 321{
322 init_machine_status = mmix_init_machine_status;
323}
324
325/* Set the per-function data. */
326
1f3233d1 327static struct machine_function *
7585fcd5 328mmix_init_machine_status (void)
68cbb7e3 329{
25a27413 330 return ggc_cleared_alloc<machine_function> ();
68cbb7e3 331}
332
a16734cd 333/* DATA_ABI_ALIGNMENT.
68cbb7e3 334 We have trouble getting the address of stuff that is located at other
335 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 336 at least 32-bit alignment. */
68cbb7e3 337
338int
7585fcd5 339mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 340{
341 if (basic_align < 32)
342 return 32;
343
344 return basic_align;
345}
346
1cdbc719 347/* Implement TARGET_STATIC_RTX_ALIGNMENT. */
348
349static HOST_WIDE_INT
350mmix_static_rtx_alignment (machine_mode mode)
351{
352 return MAX (GET_MODE_ALIGNMENT (mode), 32);
353}
354
579d67ba 355/* Implement tARGET_CONSTANT_ALIGNMENT. */
68cbb7e3 356
579d67ba 357static HOST_WIDE_INT
358mmix_constant_alignment (const_tree, HOST_WIDE_INT basic_align)
68cbb7e3 359{
360 if (basic_align < 32)
361 return 32;
362
363 return basic_align;
364}
365
366/* LOCAL_ALIGNMENT. */
367
c0dae7df 368unsigned
369mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 370{
371 if (basic_align < 32)
372 return 32;
373
374 return basic_align;
375}
376
b2d7ede1 377/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 378
b2d7ede1 379static void
7585fcd5 380mmix_conditional_register_usage (void)
68cbb7e3 381{
382 int i;
383
384 if (TARGET_ABI_GNU)
385 {
386 static const int gnu_abi_reg_alloc_order[]
387 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
388
389 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
390 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
391
392 /* Change the default from the mmixware ABI. For the GNU ABI,
393 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 394 call-clobbered local register for the "hole" that holds the
395 number of saved local registers saved by PUSHJ/PUSHGO during the
396 function call, receiving the return value at return. So best is
397 to use the highest, $31. It's already marked call-clobbered for
398 the mmixware ABI. */
68cbb7e3 399 for (i = 15; i <= 30; i++)
400 call_used_regs[i] = 0;
f0b228a5 401
402 /* "Unfix" the parameter registers. */
403 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
404 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
405 i++)
406 fixed_regs[i] = 0;
68cbb7e3 407 }
408
409 /* Step over the ":" in special register names. */
410 if (! TARGET_TOPLEVEL_SYMBOLS)
411 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
412 if (reg_names[i][0] == ':')
413 reg_names[i]++;
414}
415
6d1f3d31 416/* INCOMING_REGNO and OUTGOING_REGNO worker function.
417 Those two macros must only be applied to function argument
4d19e7b3 418 registers and the function return value register for the opposite
419 use. FIXME: for their current use in gcc, it'd be better with an
420 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la
421 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
5d246ebf 422 forcing the target to commit to a fixed mapping and for any
4d19e7b3 423 unspecified register use. Particularly when thinking about the
424 return-value, it is better to imagine INCOMING_REGNO and
425 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as
426 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming"
427 and "outgoing" is from the perspective of the parameter-registers,
428 but the same macro is (must be, lacking an alternative like
429 suggested above) used to map the return-value-register from the
430 same perspective. To make directions even more confusing, the macro
431 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register
432 in which to return a value, i.e. INCOMING_REGNO for the return-value-
433 register as received from a called function; the return-value on the
434 way out. */
6d1f3d31 435
436int
437mmix_opposite_regno (int regno, int incoming)
438{
4d19e7b3 439 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM)
440 return MMIX_RETURN_VALUE_REGNUM;
441
442 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM)
443 return MMIX_OUTGOING_RETURN_VALUE_REGNUM;
444
6d1f3d31 445 if (!mmix_function_arg_regno_p (regno, incoming))
446 return regno;
447
448 return
449 regno - (incoming
450 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
451 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
452}
453
d3310704 454/* LOCAL_REGNO.
455 All registers that are part of the register stack and that will be
456 saved are local. */
457
458int
7585fcd5 459mmix_local_regno (int regno)
d3310704 460{
461 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
462}
463
27925877 464/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 465 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
466
27925877 467static reg_class_t
468mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 469{
470 /* FIXME: Revisit. */
471 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 472 ? REMAINDER_REG : rclass;
68cbb7e3 473}
474
27925877 475/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 476 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
477
27925877 478static reg_class_t
479mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 480{
481 /* FIXME: Revisit. */
482 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 483 ? REMAINDER_REG : rclass;
68cbb7e3 484}
485
486/* SECONDARY_RELOAD_CLASS.
487 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
488
489enum reg_class
8deb3959 490mmix_secondary_reload_class (enum reg_class rclass,
3754d046 491 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 492 rtx x ATTRIBUTE_UNUSED,
493 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 494{
8deb3959 495 if (rclass == REMAINDER_REG
496 || rclass == HIMULT_REG
497 || rclass == SYSTEM_REGS)
68cbb7e3 498 return GENERAL_REGS;
499
68cbb7e3 500 return NO_REGS;
501}
502
68cbb7e3 503/* DYNAMIC_CHAIN_ADDRESS. */
504
505rtx
7585fcd5 506mmix_dynamic_chain_address (rtx frame)
68cbb7e3 507{
508 /* FIXME: the frame-pointer is stored at offset -8 from the current
509 frame-pointer. Unfortunately, the caller assumes that a
510 frame-pointer is present for *all* previous frames. There should be
511 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 512 return plus_constant (Pmode, frame, -8);
68cbb7e3 513}
514
8374586c 515/* Implement TARGET_STARTING_FRAME_OFFSET. */
68cbb7e3 516
8374586c 517static HOST_WIDE_INT
7585fcd5 518mmix_starting_frame_offset (void)
68cbb7e3 519{
520 /* The old frame pointer is in the slot below the new one, so
521 FIRST_PARM_OFFSET does not need to depend on whether the
522 frame-pointer is needed or not. We have to adjust for the register
523 stack pointer being located below the saved frame pointer.
524 Similarly, we store the return address on the stack too, for
525 exception handling, and always if we save the register stack pointer. */
526 return
527 (-8
528 + (MMIX_CFUN_HAS_LANDING_PAD
529 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
530}
531
532/* RETURN_ADDR_RTX. */
533
534rtx
7585fcd5 535mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 536{
537 return count == 0
538 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 539 /* FIXME: Set frame_alias_set on the following. (Why?)
540 See mmix_initial_elimination_offset for the reason we can't use
541 get_hard_reg_initial_val for both. Always using a stack slot
542 and not a register would be suboptimal. */
29c05e22 543 ? validize_mem (gen_rtx_MEM (Pmode,
544 plus_constant (Pmode,
545 frame_pointer_rtx, -16)))
68cbb7e3 546 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
547 : NULL_RTX;
548}
549
550/* SETUP_FRAME_ADDRESSES. */
551
552void
7585fcd5 553mmix_setup_frame_addresses (void)
68cbb7e3 554{
555 /* Nothing needed at the moment. */
556}
557
558/* The difference between the (imaginary) frame pointer and the stack
559 pointer. Used to eliminate the frame pointer. */
560
561int
7585fcd5 562mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 563{
564 int regno;
565 int fp_sp_offset
abe32cce 566 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 567
af08e904 568 /* There is no actual offset between these two virtual values, but for
569 the frame-pointer, we have the old one in the stack position below
570 it, so the offset for the frame-pointer to the stack-pointer is one
571 octabyte larger. */
68cbb7e3 572 if (fromreg == MMIX_ARG_POINTER_REGNUM
573 && toreg == MMIX_FRAME_POINTER_REGNUM)
574 return 0;
575
576 /* The difference is the size of local variables plus the size of
577 outgoing function arguments that would normally be passed as
578 registers but must be passed on stack because we're out of
579 function-argument registers. Only global saved registers are
580 counted; the others go on the register stack.
581
582 The frame-pointer is counted too if it is what is eliminated, as we
8374586c 583 need to balance the offset for it from TARGET_STARTING_FRAME_OFFSET.
68cbb7e3 584
585 Also add in the slot for the register stack pointer we save if we
586 have a landing pad.
587
588 Unfortunately, we can't access $0..$14, from unwinder code easily, so
589 store the return address in a frame slot too. FIXME: Only for
590 non-leaf functions. FIXME: Always with a landing pad, because it's
591 hard to know whether we need the other at the time we know we need
592 the offset for one (and have to state it). It's a kludge until we
593 can express the register stack in the EH frame info.
594
595 We have to do alignment here; get_frame_size will not return a
596 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
597
598 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
599 regno <= 255;
600 regno++)
3072d30e 601 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 602 || IS_MMIX_EH_RETURN_DATA_REG (regno))
603 fp_sp_offset += 8;
604
605 return fp_sp_offset
606 + (MMIX_CFUN_HAS_LANDING_PAD
607 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
608 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
609}
610
5d246ebf 611static void
3754d046 612mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode,
5d246ebf 613 const_tree type, bool named ATTRIBUTE_UNUSED)
614{
39cba157 615 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 616 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
617
618 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
619 || (arg_size > 8
620 && !TARGET_LIBFUNC
621 && !argsp->lib))
622 ? (MMIX_MAX_ARGS_IN_REGS) + 1
623 : argsp->regs + (7 + arg_size) / 8);
624}
68cbb7e3 625
5d246ebf 626/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
627
628static rtx
39cba157 629mmix_function_arg_1 (const cumulative_args_t argsp_v,
3754d046 630 machine_mode mode,
5d246ebf 631 const_tree type,
632 bool named ATTRIBUTE_UNUSED,
633 bool incoming)
68cbb7e3 634{
39cba157 635 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
636
68cbb7e3 637 /* Last-argument marker. */
638 if (type == void_type_node)
639 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
640 ? gen_rtx_REG (mode,
641 (incoming
642 ? MMIX_FIRST_INCOMING_ARG_REGNUM
643 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
644 : NULL_RTX;
645
646 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 647 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 648 && (GET_MODE_BITSIZE (mode) <= 64
649 || argsp->lib
650 || TARGET_LIBFUNC))
651 ? gen_rtx_REG (mode,
652 (incoming
653 ? MMIX_FIRST_INCOMING_ARG_REGNUM
654 : MMIX_FIRST_ARG_REGNUM)
655 + argsp->regs)
656 : NULL_RTX;
657}
658
5d246ebf 659/* Return an rtx for a function argument to go in a register, and 0 for
660 one that must go on stack. */
661
662static rtx
39cba157 663mmix_function_arg (cumulative_args_t argsp,
3754d046 664 machine_mode mode,
5d246ebf 665 const_tree type,
666 bool named)
667{
668 return mmix_function_arg_1 (argsp, mode, type, named, false);
669}
670
671static rtx
39cba157 672mmix_function_incoming_arg (cumulative_args_t argsp,
3754d046 673 machine_mode mode,
5d246ebf 674 const_tree type,
675 bool named)
676{
677 return mmix_function_arg_1 (argsp, mode, type, named, true);
678}
679
68cbb7e3 680/* Returns nonzero for everything that goes by reference, 0 for
681 everything that goes by value. */
682
b981d932 683static bool
3754d046 684mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode,
fb80456a 685 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 686{
39cba157 687 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
688
0336f0f0 689 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 690 necessary. */
bef380a4 691 if (targetm.calls.must_pass_in_stack (mode, type))
692 return true;
693
694 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
695 && !TARGET_LIBFUNC
696 && (!argsp || !argsp->lib))
697 return true;
698
699 return false;
68cbb7e3 700}
701
702/* Return nonzero if regno is a register number where a parameter is
703 passed, and 0 otherwise. */
704
705int
7585fcd5 706mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 707{
708 int first_arg_regnum
709 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
710
711 return regno >= first_arg_regnum
712 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
713}
714
b600778c 715/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 716
b600778c 717static rtx
718mmix_function_value (const_tree valtype,
719 const_tree func ATTRIBUTE_UNUSED,
720 bool outgoing)
68cbb7e3 721{
3754d046 722 machine_mode mode = TYPE_MODE (valtype);
723 machine_mode cmode;
68cbb7e3 724 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
725 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
726 int i;
727 int nregs;
728
b600778c 729 if (!outgoing)
730 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
731
68cbb7e3 732 /* Return values that fit in a register need no special handling.
733 There's no register hole when parameters are passed in global
734 registers. */
735 if (TARGET_ABI_GNU
736 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
737 return
738 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
739
fb89a8c9 740 if (COMPLEX_MODE_P (mode))
741 /* A complex type, made up of components. */
742 cmode = TYPE_MODE (TREE_TYPE (valtype));
743 else
744 {
745 /* Of the other larger-than-register modes, we only support
746 scalar mode TImode. (At least, that's the only one that's
747 been rudimentally tested.) Make sure we're alerted for
748 unexpected cases. */
749 if (mode != TImode)
750 sorry ("support for mode %qs", GET_MODE_NAME (mode));
751
752 /* In any case, we will fill registers to the natural size. */
753 cmode = DImode;
754 }
755
68cbb7e3 756 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
757
758 /* We need to take care of the effect of the register hole on return
759 values of large sizes; the last register will appear as the first
760 register, with the rest shifted. (For complex modes, this is just
761 swapped registers.) */
762
763 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 764 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 765 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
766
767 /* FIXME: Maybe we should handle structure values like this too
768 (adjusted for BLKmode), perhaps for both ABI:s. */
769 for (i = 0; i < nregs - 1; i++)
770 vec[i]
771 = gen_rtx_EXPR_LIST (VOIDmode,
772 gen_rtx_REG (cmode, first_val_regnum + i),
773 GEN_INT ((i + 1) * BITS_PER_UNIT));
774
775 vec[nregs - 1]
776 = gen_rtx_EXPR_LIST (VOIDmode,
777 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 778 const0_rtx);
68cbb7e3 779
2bdda7ee 780 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec));
68cbb7e3 781}
782
b600778c 783/* Implements TARGET_LIBCALL_VALUE. */
c715d549 784
b600778c 785static rtx
3754d046 786mmix_libcall_value (machine_mode mode,
b600778c 787 const_rtx fun ATTRIBUTE_UNUSED)
788{
789 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
790}
791
792/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
793
794static bool
795mmix_function_value_regno_p (const unsigned int regno)
c715d549 796{
797 return regno == MMIX_RETURN_VALUE_REGNUM;
798}
799
68cbb7e3 800/* EH_RETURN_DATA_REGNO. */
801
802int
7585fcd5 803mmix_eh_return_data_regno (int n)
68cbb7e3 804{
805 if (n >= 0 && n < 4)
806 return MMIX_EH_RETURN_DATA_REGNO_START + n;
807
808 return INVALID_REGNUM;
809}
810
811/* EH_RETURN_STACKADJ_RTX. */
812
813rtx
7585fcd5 814mmix_eh_return_stackadj_rtx (void)
68cbb7e3 815{
816 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
817}
818
819/* EH_RETURN_HANDLER_RTX. */
820
821rtx
7585fcd5 822mmix_eh_return_handler_rtx (void)
68cbb7e3 823{
7585fcd5 824 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 825}
826
827/* ASM_PREFERRED_EH_DATA_FORMAT. */
828
829int
7585fcd5 830mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
831 int global ATTRIBUTE_UNUSED)
68cbb7e3 832{
833 /* This is the default (was at 2001-07-20). Revisit when needed. */
834 return DW_EH_PE_absptr;
835}
836
28c2d844 837/* Make a note that we've seen the beginning of the prologue. This
d3310704 838 matters to whether we'll translate register numbers as calculated by
2efea8c0 839 mmix_reorg. */
68cbb7e3 840
d3310704 841static void
718e6d56 842mmix_target_asm_function_prologue (FILE *)
68cbb7e3 843{
d3310704 844 cfun->machine->in_prologue = 1;
845}
68cbb7e3 846
d3310704 847/* Make a note that we've seen the end of the prologue. */
68cbb7e3 848
d3310704 849static void
7585fcd5 850mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 851{
852 cfun->machine->in_prologue = 0;
d68ffc6f 853}
854
2efea8c0 855/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
856 done here; just virtually by calculating the highest saved stack
857 register number used to modify the register numbers at output time. */
d68ffc6f 858
2efea8c0 859static void
7585fcd5 860mmix_reorg (void)
d68ffc6f 861{
862 int regno;
68cbb7e3 863
864 /* We put the number of the highest saved register-file register in a
865 location convenient for the call-patterns to output. Note that we
866 don't tell dwarf2 about these registers, since it can't restore them
867 anyway. */
d68ffc6f 868 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 869 regno >= 0;
870 regno--)
3072d30e 871 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 872 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
873 break;
874
d68ffc6f 875 /* Regardless of whether they're saved (they might be just read), we
876 mustn't include registers that carry parameters. We could scan the
877 insns to see whether they're actually used (and indeed do other less
878 trivial register usage analysis and transformations), but it seems
879 wasteful to optimize for unused parameter registers. As of
3072d30e 880 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 881 that might change. */
abe32cce 882 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 883 {
abe32cce 884 regno = crtl->args.info.regs - 1;
d68ffc6f 885
886 /* We don't want to let this cause us to go over the limit and make
887 incoming parameter registers be misnumbered and treating the last
888 parameter register and incoming return value register call-saved.
889 Stop things at the unmodified scheme. */
890 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
891 regno = MMIX_RETURN_VALUE_REGNUM - 1;
892 }
893
894 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 895}
896
897/* TARGET_ASM_FUNCTION_EPILOGUE. */
898
4448bfa5 899static void
718e6d56 900mmix_target_asm_function_epilogue (FILE *stream)
68cbb7e3 901{
d3310704 902 /* Emit an \n for readability of the generated assembly. */
903 fputc ('\n', stream);
904}
68cbb7e3 905
e7f5e241 906/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 907
6988553d 908static void
7585fcd5 909mmix_asm_output_mi_thunk (FILE *stream,
910 tree fndecl ATTRIBUTE_UNUSED,
911 HOST_WIDE_INT delta,
912 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
913 tree func)
d3310704 914{
6644435d 915 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
916 location of structure to return as invisible first argument), you
917 need to tweak this code too. */
d3310704 918 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 919
d3310704 920 if (delta >= 0 && delta < 65536)
e7f5e241 921 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 922 else if (delta < 0 && delta >= -255)
e7f5e241 923 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 924 else
0b123c47 925 {
d3310704 926 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 927 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 928 }
929
d3310704 930 fprintf (stream, "\tJMP ");
931 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
932 fprintf (stream, "\n");
933}
68cbb7e3 934
d3310704 935/* FUNCTION_PROFILER. */
68cbb7e3 936
d3310704 937void
7585fcd5 938mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
939 int labelno ATTRIBUTE_UNUSED)
d3310704 940{
941 sorry ("function_profiler support for MMIX");
942}
68cbb7e3 943
9e4a734a 944/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
945 let's stick to pushing argument registers on the stack. Later, we
946 can parse all arguments in registers, to improve performance. */
68cbb7e3 947
9e4a734a 948static void
39cba157 949mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
3754d046 950 machine_mode mode,
7585fcd5 951 tree vartype,
952 int *pretend_sizep,
953 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 954{
39cba157 955 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
956
7ccc713a 957 /* The last named variable has been handled, but
958 args_so_farp has not been advanced for it. */
959 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
960 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 961
962 /* We assume that one argument takes up one register here. That should
5aedf60c 963 be true until we start messing with multi-reg parameters. */
68cbb7e3 964 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
965 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
966}
967
604d844a 968/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 969
604d844a 970static void
971mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 972{
af08e904 973 /* Read a value into the static-chain register and jump somewhere. The
974 static chain is stored at offset 16, and the function address is
975 stored at offset 24. */
604d844a 976
68cbb7e3 977 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 978 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 979 fprintf (stream, "LDOU $255,$255,8\n\t");
980 fprintf (stream, "GO $255,$255,0\n");
981 fprintf (stream, "1H\tOCTA 0\n\t");
982 fprintf (stream, "OCTA 0\n");
983}
984
604d844a 985/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 986/* Set the static chain and function pointer field in the trampoline.
987 We also SYNCID here to be sure (doesn't matter in the simulator, but
988 some day it will). */
989
604d844a 990static void
991mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
992{
993 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
994 rtx mem;
995
996 emit_block_move (m_tramp, assemble_trampoline_template (),
997 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
998
999 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
1000 emit_move_insn (mem, static_chain);
1001 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
1002 emit_move_insn (mem, fnaddr);
1003
1004 mem = adjust_address (m_tramp, DImode, 0);
1005 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 1006}
1007
1008/* We must exclude constant addresses that have an increment that is not a
1009 multiple of four bytes because of restrictions of the GETA
f0b228a5 1010 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 1011
1012int
7585fcd5 1013mmix_constant_address_p (rtx x)
68cbb7e3 1014{
1015 RTX_CODE code = GET_CODE (x);
1016 int addend = 0;
f0b228a5 1017 /* When using "base addresses", anything constant goes. */
1018 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 1019
68cbb7e3 1020 switch (code)
1021 {
1022 case LABEL_REF:
1023 case SYMBOL_REF:
1024 return 1;
1025
68cbb7e3 1026 case HIGH:
f0b228a5 1027 /* FIXME: Don't know how to dissect these. Avoid them for now,
1028 except we know they're constants. */
1029 return constant_ok;
68cbb7e3 1030
1031 case CONST_INT:
1032 addend = INTVAL (x);
1033 break;
1034
1035 case CONST_DOUBLE:
1036 if (GET_MODE (x) != VOIDmode)
1037 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1038 return constant_ok;
68cbb7e3 1039 addend = CONST_DOUBLE_LOW (x);
1040 break;
1041
1042 case CONST:
1043 /* Note that expressions with arithmetic on forward references don't
1044 work in mmixal. People using gcc assembly code with mmixal might
1045 need to move arrays and such to before the point of use. */
1046 if (GET_CODE (XEXP (x, 0)) == PLUS)
1047 {
1048 rtx x0 = XEXP (XEXP (x, 0), 0);
1049 rtx x1 = XEXP (XEXP (x, 0), 1);
1050
1051 if ((GET_CODE (x0) == SYMBOL_REF
1052 || GET_CODE (x0) == LABEL_REF)
1053 && (GET_CODE (x1) == CONST_INT
1054 || (GET_CODE (x1) == CONST_DOUBLE
1055 && GET_MODE (x1) == VOIDmode)))
1056 addend = mmix_intval (x1);
1057 else
f0b228a5 1058 return constant_ok;
68cbb7e3 1059 }
1060 else
f0b228a5 1061 return constant_ok;
68cbb7e3 1062 break;
1063
1064 default:
1065 return 0;
1066 }
1067
f0b228a5 1068 return constant_ok || (addend & 3) == 0;
68cbb7e3 1069}
1070
fd50b071 1071/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1072
fd50b071 1073bool
3754d046 1074mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
fd50b071 1075 rtx x,
1076 bool strict_checking)
68cbb7e3 1077{
1078#define MMIX_REG_OK(X) \
1079 ((strict_checking \
1080 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1081 || (reg_renumber[REGNO (X)] > 0 \
1082 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1083 || (!strict_checking \
1084 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1085 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1086 || REGNO (X) == ARG_POINTER_REGNUM)))
1087
1088 /* We only accept:
1089 (mem reg)
1090 (mem (plus reg reg))
f0b228a5 1091 (mem (plus reg 0..255)).
1092 unless TARGET_BASE_ADDRESSES, in which case we accept all
1093 (mem constant_address) too. */
68cbb7e3 1094
1095
1096 /* (mem reg) */
1097 if (REG_P (x) && MMIX_REG_OK (x))
1098 return 1;
1099
1100 if (GET_CODE(x) == PLUS)
1101 {
1102 rtx x1 = XEXP (x, 0);
1103 rtx x2 = XEXP (x, 1);
1104
1105 /* Try swapping the order. FIXME: Do we need this? */
1106 if (! REG_P (x1))
1107 {
1108 rtx tem = x1;
1109 x1 = x2;
1110 x2 = tem;
1111 }
1112
f0b228a5 1113 /* (mem (plus (reg?) (?))) */
68cbb7e3 1114 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1115 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1116
f0b228a5 1117 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1118 if (REG_P (x2) && MMIX_REG_OK (x2))
1119 return 1;
1120
f0b228a5 1121 /* (mem (plus (reg) (0..255?))) */
f105c84e 1122 if (satisfies_constraint_I (x2))
68cbb7e3 1123 return 1;
f0b228a5 1124
1125 return 0;
68cbb7e3 1126 }
1127
f0b228a5 1128 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1129}
1130
ca316360 1131/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1132
ca316360 1133static bool
3754d046 1134mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1135{
1136 RTX_CODE code = GET_CODE (x);
1137
1138 /* We must allow any number due to the way the cse passes works; if we
1139 do not allow any number here, general_operand will fail, and insns
1140 will fatally fail recognition instead of "softly". */
1141 if (code == CONST_INT || code == CONST_DOUBLE)
1142 return 1;
1143
1144 return CONSTANT_ADDRESS_P (x);
1145}
1146
1147/* SELECT_CC_MODE. */
1148
3754d046 1149machine_mode
7585fcd5 1150mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1151{
1152 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1153 output different compare insns. Note that we do not check the
1154 validity of the comparison here. */
1155
1156 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1157 {
1158 if (op == ORDERED || op == UNORDERED || op == UNGE
1159 || op == UNGT || op == UNLE || op == UNLT)
1160 return CC_FUNmode;
1161
1162 if (op == EQ || op == NE)
1163 return CC_FPEQmode;
1164
1165 return CC_FPmode;
1166 }
1167
1168 if (op == GTU || op == LTU || op == GEU || op == LEU)
1169 return CC_UNSmode;
1170
1171 return CCmode;
1172}
1173
68cbb7e3 1174/* REVERSIBLE_CC_MODE. */
1175
1176int
3754d046 1177mmix_reversible_cc_mode (machine_mode mode)
68cbb7e3 1178{
1179 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1180 compares. */
68cbb7e3 1181 return mode != CC_FPmode;
1182}
1183
fab7adbf 1184/* TARGET_RTX_COSTS. */
68cbb7e3 1185
fab7adbf 1186static bool
7585fcd5 1187mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
5ae4887d 1188 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 1189 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1190 int opno ATTRIBUTE_UNUSED,
f529eb25 1191 int *total ATTRIBUTE_UNUSED,
1192 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1193{
1194 /* For the time being, this is just a stub and we'll accept the
1195 generic calculations, until we can do measurements, at least.
1196 Say we did not modify any calculated costs. */
fab7adbf 1197 return false;
68cbb7e3 1198}
1199
f7e13ca6 1200/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1201
f7e13ca6 1202 The special registers can only move to and from general regs, and we
1203 need to check that their constraints match, so say 3 for them. */
1204
1205static int
3754d046 1206mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1207 reg_class_t from,
1208 reg_class_t to)
68cbb7e3 1209{
1210 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1211}
1212
1213/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1214 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1215 the target. */
1216
1217/* DATA_SECTION_ASM_OP. */
1218
1219const char *
7585fcd5 1220mmix_data_section_asm_op (void)
68cbb7e3 1221{
1222 return "\t.data ! mmixal:= 8H LOC 9B";
1223}
1224
7811991d 1225static void
7585fcd5 1226mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1227{
1228 /* Test for an external declaration, and do nothing if it is one. */
1229 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1230 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1231 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1232 ;
ae484cc8 1233 else if (first && DECL_P (decl))
68cbb7e3 1234 {
1235 /* For non-visible declarations, add a "@" prefix, which we skip
1236 when the label is output. If the label does not have this
f0b228a5 1237 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1238
1239 Note that this does not work for data that is declared extern and
1240 later defined as static. If there's code in between, that code
f0b228a5 1241 will refer to the extern declaration, and vice versa. This just
1242 means that when -mtoplevel-symbols is in use, we can just handle
1243 well-behaved ISO-compliant code. */
68cbb7e3 1244
2c129d70 1245 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1246 int len = strlen (str);
225ab426 1247 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1248 newstr[0] = '@';
68cbb7e3 1249 strcpy (newstr + 1, str);
b948ae2f 1250 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1251 }
1252
f0b228a5 1253 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1254 may need different options to reach for different things with GETA.
1255 For now, functions and things we know or have been told are constant. */
1256 if (TREE_CODE (decl) == FUNCTION_DECL
1257 || TREE_CONSTANT (decl)
1258 || (TREE_CODE (decl) == VAR_DECL
1259 && TREE_READONLY (decl)
1260 && !TREE_SIDE_EFFECTS (decl)
1261 && (!DECL_INITIAL (decl)
1262 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1263 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1264}
1265
7b4a38a6 1266static const char *
7585fcd5 1267mmix_strip_name_encoding (const char *name)
68cbb7e3 1268{
1269 for (; (*name == '@' || *name == '*'); name++)
1270 ;
1271
1272 return name;
1273}
1274
92c473b8 1275/* TARGET_ASM_FILE_START.
1276 We just emit a little comment for the time being. */
68cbb7e3 1277
92c473b8 1278static void
7585fcd5 1279mmix_file_start (void)
68cbb7e3 1280{
92c473b8 1281 default_file_start ();
68cbb7e3 1282
92c473b8 1283 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1284
1d60d981 1285 /* Make sure each file starts with the text section. */
2f14b1f9 1286 switch_to_section (text_section);
68cbb7e3 1287}
1288
f6940372 1289/* TARGET_ASM_FILE_END. */
68cbb7e3 1290
f6940372 1291static void
7585fcd5 1292mmix_file_end (void)
68cbb7e3 1293{
1d60d981 1294 /* Make sure each file ends with the data section. */
2f14b1f9 1295 switch_to_section (data_section);
68cbb7e3 1296}
1297
40fe393f 1298/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1299
40fe393f 1300static void
7585fcd5 1301mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1302{
1303 fprintf (stream, "# 1 ");
1304 OUTPUT_QUOTED_STRING (stream, name);
1305 fprintf (stream, "\n");
1306}
1307
1308/* OUTPUT_QUOTED_STRING. */
1309
1310void
7585fcd5 1311mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1312{
1313 const char * string_end = string + length;
25037517 1314 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1315
1316 /* Output "any character except newline and double quote character". We
1317 play it safe and avoid all control characters too. We also do not
1318 want [] as characters, should input be passed through m4 with [] as
1319 quotes. Further, we avoid "\", because the GAS port handles it as a
1320 quoting character. */
1321 while (string < string_end)
1322 {
1323 if (*string
1324 && (unsigned char) *string < 128
1325 && !ISCNTRL (*string)
1326 && strchr (unwanted_chars, *string) == NULL)
1327 {
1328 fputc ('"', stream);
1329 while (*string
1330 && (unsigned char) *string < 128
1331 && !ISCNTRL (*string)
1332 && strchr (unwanted_chars, *string) == NULL
1333 && string < string_end)
1334 {
1335 fputc (*string, stream);
1336 string++;
1337 }
1338 fputc ('"', stream);
1339 if (string < string_end)
1340 fprintf (stream, ",");
1341 }
1342 if (string < string_end)
1343 {
1344 fprintf (stream, "#%x", *string & 255);
1345 string++;
1346 if (string < string_end)
1347 fprintf (stream, ",");
1348 }
1349 }
1350}
1351
58356836 1352/* Target hook for assembling integer objects. Use mmix_print_operand
1353 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1354 CONST_DOUBLEs. */
68cbb7e3 1355
58356836 1356static bool
7585fcd5 1357mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1358{
58356836 1359 if (aligned_p)
1360 switch (size)
1361 {
4f4e478d 1362 /* We handle a limited number of types of operands in here. But
1363 that's ok, because we can punt to generic functions. We then
5c3d1711 1364 pretend that aligned data isn't needed, so the usual .<pseudo>
1365 syntax is used (which works for aligned data too). We actually
1366 *must* do that, since we say we don't have simple aligned
1367 pseudos, causing this function to be called. We just try and
1368 keep as much compatibility as possible with mmixal syntax for
1369 normal cases (i.e. without GNU extensions and C only). */
58356836 1370 case 1:
4f4e478d 1371 if (GET_CODE (x) != CONST_INT)
1372 {
919e63e8 1373 /* There is no "unaligned byte" op or generic function to
1374 which we can punt, so we have to handle this here. As
1375 the expression isn't a plain literal, the generated
1376 assembly-code can't be mmixal-equivalent (i.e. "BYTE"
1377 won't work) and thus it's ok to emit the default op
1378 ".byte". */
1379 assemble_integer_with_op ("\t.byte\t", x);
1380 return true;
4f4e478d 1381 }
58356836 1382 fputs ("\tBYTE\t", asm_out_file);
1383 mmix_print_operand (asm_out_file, x, 'B');
1384 fputc ('\n', asm_out_file);
1385 return true;
1386
1387 case 2:
4f4e478d 1388 if (GET_CODE (x) != CONST_INT)
1389 {
1390 aligned_p = 0;
1391 break;
1392 }
58356836 1393 fputs ("\tWYDE\t", asm_out_file);
1394 mmix_print_operand (asm_out_file, x, 'W');
1395 fputc ('\n', asm_out_file);
1396 return true;
1397
1398 case 4:
60bb373d 1399 if (GET_CODE (x) != CONST_INT)
4f4e478d 1400 {
1401 aligned_p = 0;
1402 break;
1403 }
58356836 1404 fputs ("\tTETRA\t", asm_out_file);
1405 mmix_print_operand (asm_out_file, x, 'L');
1406 fputc ('\n', asm_out_file);
1407 return true;
1408
1409 case 8:
7f81c162 1410 /* We don't get here anymore for CONST_DOUBLE, because DImode
1411 isn't expressed as CONST_DOUBLE, and DFmode is handled
1412 elsewhere. */
1413 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1414 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1415 return true;
1416 }
1417 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1418}
1419
1420/* ASM_OUTPUT_ASCII. */
1421
1422void
7585fcd5 1423mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1424{
1425 while (length > 0)
1426 {
1427 int chunk_size = length > 60 ? 60 : length;
1428 fprintf (stream, "\tBYTE ");
1429 mmix_output_quoted_string (stream, string, chunk_size);
1430 string += chunk_size;
1431 length -= chunk_size;
1432 fprintf (stream, "\n");
1433 }
1434}
1435
1436/* ASM_OUTPUT_ALIGNED_COMMON. */
1437
1438void
7585fcd5 1439mmix_asm_output_aligned_common (FILE *stream,
1440 const char *name,
1441 int size,
1442 int align)
68cbb7e3 1443{
1444 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1445 express this in a mmixal-compatible way. */
1446 fprintf (stream, "\t.comm\t");
1447 assemble_name (stream, name);
1448 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1449 size, align / BITS_PER_UNIT);
1450}
1451
1452/* ASM_OUTPUT_ALIGNED_LOCAL. */
1453
1454void
7585fcd5 1455mmix_asm_output_aligned_local (FILE *stream,
1456 const char *name,
1457 int size,
1458 int align)
68cbb7e3 1459{
2f14b1f9 1460 switch_to_section (data_section);
68cbb7e3 1461
1462 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1463 assemble_name (stream, name);
1464 fprintf (stream, "\tLOC @+%d\n", size);
1465}
1466
1467/* ASM_OUTPUT_LABEL. */
1468
1469void
7585fcd5 1470mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1471{
1472 assemble_name (stream, name);
1473 fprintf (stream, "\tIS @\n");
1474}
1475
af1c039b 1476/* ASM_OUTPUT_INTERNAL_LABEL. */
1477
1478void
1479mmix_asm_output_internal_label (FILE *stream, const char *name)
1480{
1481 assemble_name_raw (stream, name);
1482 fprintf (stream, "\tIS @\n");
1483}
1484
68cbb7e3 1485/* ASM_DECLARE_REGISTER_GLOBAL. */
1486
1487void
7585fcd5 1488mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1489 tree decl ATTRIBUTE_UNUSED,
1490 int regno ATTRIBUTE_UNUSED,
1491 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1492{
1493 /* Nothing to do here, but there *will* be, therefore the framework is
1494 here. */
1495}
1496
68cbb7e3 1497/* ASM_WEAKEN_LABEL. */
1498
1499void
7585fcd5 1500mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1501 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1502{
7fe1d31c 1503 fprintf (stream, "\t.weak ");
68cbb7e3 1504 assemble_name (stream, name);
7fe1d31c 1505 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1506}
1507
1508/* MAKE_DECL_ONE_ONLY. */
1509
1510void
7585fcd5 1511mmix_make_decl_one_only (tree decl)
68cbb7e3 1512{
1513 DECL_WEAK (decl) = 1;
1514}
1515
1516/* ASM_OUTPUT_LABELREF.
1517 Strip GCC's '*' and our own '@'. No order is assumed. */
1518
1519void
7585fcd5 1520mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1521{
91009d64 1522 int is_extern = 1;
68cbb7e3 1523
1524 for (; (*name == '@' || *name == '*'); name++)
1525 if (*name == '@')
91009d64 1526 is_extern = 0;
68cbb7e3 1527
1528 asm_fprintf (stream, "%s%U%s",
1529 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1530 name);
1531}
1532
68cbb7e3 1533/* ASM_OUTPUT_DEF. */
1534
1535void
7585fcd5 1536mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1537{
1538 assemble_name (stream, name);
1539 fprintf (stream, "\tIS ");
1540 assemble_name (stream, value);
1541 fputc ('\n', stream);
1542}
1543
7a7fb407 1544/* TARGET_PRINT_OPERAND. */
68cbb7e3 1545
7a7fb407 1546static void
7585fcd5 1547mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1548{
1549 /* When we add support for different codes later, we can, when needed,
1550 drop through to the main handler with a modified operand. */
1551 rtx modified_x = x;
d68ffc6f 1552 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1553
1554 switch (code)
1555 {
1556 /* Unrelated codes are in alphabetic order. */
1557
91009d64 1558 case '+':
1559 /* For conditional branches, output "P" for a probable branch. */
1560 if (TARGET_BRANCH_PREDICT)
1561 {
1562 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
61cb1816 1563 if (x && profile_probability::from_reg_br_prob_note (XINT (x, 0))
1564 > profile_probability::even ())
91009d64 1565 putc ('P', stream);
1566 }
1567 return;
1568
0b123c47 1569 case '.':
1570 /* For the %d in POP %d,0. */
1571 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1572 return;
1573
68cbb7e3 1574 case 'B':
1575 if (GET_CODE (x) != CONST_INT)
1576 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1577 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1578 return;
1579
1580 case 'H':
1581 /* Highpart. Must be general register, and not the last one, as
1582 that one cannot be part of a consecutive register pair. */
d68ffc6f 1583 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1584 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1585
1586 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1587 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1588 return;
1589
1590 case 'L':
1591 /* Lowpart. Must be CONST_INT or general register, and not the last
1592 one, as that one cannot be part of a consecutive register pair. */
1593 if (GET_CODE (x) == CONST_INT)
1594 {
1595 fprintf (stream, "#%lx",
1596 (unsigned long) (INTVAL (x)
1597 & ((unsigned int) 0x7fffffff * 2 + 1)));
1598 return;
1599 }
1600
1601 if (GET_CODE (x) == SYMBOL_REF)
1602 {
1603 output_addr_const (stream, x);
1604 return;
1605 }
1606
d68ffc6f 1607 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1608 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1609
1610 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1611 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1612 return;
1613
1614 /* Can't use 'a' because that's a generic modifier for address
1615 output. */
1616 case 'A':
1617 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
3a4303e7 1618 ~(uint64_t)
68cbb7e3 1619 mmix_intval (x));
1620 return;
1621
1622 case 'i':
1623 mmix_output_shiftvalue_op_from_str (stream, "INC",
3a4303e7 1624 (uint64_t)
68cbb7e3 1625 mmix_intval (x));
1626 return;
1627
1628 case 'o':
1629 mmix_output_shiftvalue_op_from_str (stream, "OR",
3a4303e7 1630 (uint64_t)
68cbb7e3 1631 mmix_intval (x));
1632 return;
1633
1634 case 's':
1635 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 1636 (uint64_t)
68cbb7e3 1637 mmix_intval (x));
1638 return;
1639
1640 case 'd':
1641 case 'D':
1642 mmix_output_condition (stream, x, (code == 'D'));
1643 return;
1644
1645 case 'e':
1646 /* Output an extra "e" to make fcmpe, fune. */
1647 if (TARGET_FCMP_EPSILON)
1648 fprintf (stream, "e");
1649 return;
1650
1651 case 'm':
1652 /* Output the number minus 1. */
1653 if (GET_CODE (x) != CONST_INT)
1654 {
1655 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1656 x);
1657 }
f03df321 1658 fprintf (stream, "%" PRId64,
3a4303e7 1659 (int64_t) (mmix_intval (x) - 1));
68cbb7e3 1660 return;
1661
1662 case 'p':
1663 /* Store the number of registers we want to save. This was setup
1664 by the prologue. The actual operand contains the number of
1665 registers to pass, but we don't use it currently. Anyway, we
1666 need to output the number of saved registers here. */
d68ffc6f 1667 fprintf (stream, "%d",
1668 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1669 return;
1670
1671 case 'r':
1672 /* Store the register to output a constant to. */
1673 if (! REG_P (x))
68435912 1674 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1675 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1676 return;
1677
1678 case 'I':
1679 /* Output the constant. Note that we use this for floats as well. */
1680 if (GET_CODE (x) != CONST_INT
1681 && (GET_CODE (x) != CONST_DOUBLE
1682 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1683 && GET_MODE (x) != SFmode)))
68435912 1684 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1685 mmix_output_register_setting (stream,
1686 mmix_output_destination_register,
1687 mmix_intval (x), 0);
1688 return;
1689
1690 case 'U':
1691 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1692 if (TARGET_ZERO_EXTEND)
1693 putc ('U', stream);
1694 return;
1695
1696 case 'v':
3a4303e7 1697 mmix_output_shifted_value (stream, (int64_t) mmix_intval (x));
68cbb7e3 1698 return;
1699
1700 case 'V':
3a4303e7 1701 mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x));
68cbb7e3 1702 return;
1703
1704 case 'W':
1705 if (GET_CODE (x) != CONST_INT)
1706 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1707 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1708 return;
1709
1710 case 0:
1711 /* Nothing to do. */
1712 break;
1713
1714 default:
1715 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1716 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1717 }
1718
1719 switch (GET_CODE (modified_x))
1720 {
1721 case REG:
d68ffc6f 1722 regno = REGNO (modified_x);
1723 if (regno >= FIRST_PSEUDO_REGISTER)
1724 internal_error ("MMIX Internal: Bad register: %d", regno);
1725 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1726 return;
1727
1728 case MEM:
3c047fe9 1729 output_address (GET_MODE (modified_x), XEXP (modified_x, 0));
68cbb7e3 1730 return;
1731
1732 case CONST_INT:
1733 /* For -2147483648, mmixal complains that the constant does not fit
1734 in 4 bytes, so let's output it as hex. Take care to handle hosts
1735 where HOST_WIDE_INT is longer than an int.
1736
1737 Print small constants +-255 using decimal. */
1738
1739 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1740 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1741 else
1742 fprintf (stream, "#%x",
1743 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1744 return;
1745
1746 case CONST_DOUBLE:
1747 /* Do somewhat as CONST_INT. */
58356836 1748 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1749 return;
1750
1751 case CONST:
1752 output_addr_const (stream, modified_x);
1753 return;
1754
1755 default:
1756 /* No need to test for all strange things. Let output_addr_const do
1757 it for us. */
1758 if (CONSTANT_P (modified_x)
1759 /* Strangely enough, this is not included in CONSTANT_P.
1760 FIXME: Ask/check about sanity here. */
aa90bb35 1761 || LABEL_P (modified_x))
68cbb7e3 1762 {
1763 output_addr_const (stream, modified_x);
1764 return;
1765 }
1766
1767 /* We need the original here. */
1768 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1769 }
1770}
1771
7a7fb407 1772/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1773
7a7fb407 1774static bool
1775mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1776{
91009d64 1777 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1778 return code == '+'
1779 /* A '.' is used for the %d in the POP %d,0 return insn. */
1780 || code == '.';
68cbb7e3 1781}
1782
7a7fb407 1783/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1784
7a7fb407 1785static void
3c047fe9 1786mmix_print_operand_address (FILE *stream, machine_mode /*mode*/, rtx x)
68cbb7e3 1787{
1788 if (REG_P (x))
1789 {
1790 /* I find the generated assembly code harder to read without
1791 the ",0". */
d68ffc6f 1792 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1793 return;
1794 }
1795 else if (GET_CODE (x) == PLUS)
1796 {
1797 rtx x1 = XEXP (x, 0);
1798 rtx x2 = XEXP (x, 1);
1799
68cbb7e3 1800 if (REG_P (x1))
1801 {
d68ffc6f 1802 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1803
1804 if (REG_P (x2))
1805 {
d68ffc6f 1806 fprintf (stream, "%s",
1807 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1808 return;
1809 }
f105c84e 1810 else if (satisfies_constraint_I (x2))
68cbb7e3 1811 {
1812 output_addr_const (stream, x2);
1813 return;
1814 }
1815 }
1816 }
1817
ca316360 1818 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1819 {
1820 output_addr_const (stream, x);
1821 return;
1822 }
1823
68cbb7e3 1824 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1825}
1826
1827/* ASM_OUTPUT_REG_PUSH. */
1828
1829void
7585fcd5 1830mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1831{
1832 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1833 reg_names[MMIX_STACK_POINTER_REGNUM],
1834 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1835 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1836 reg_names[MMIX_STACK_POINTER_REGNUM]);
1837}
1838
1839/* ASM_OUTPUT_REG_POP. */
1840
1841void
7585fcd5 1842mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1843{
1844 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1845 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1846 reg_names[MMIX_STACK_POINTER_REGNUM],
1847 reg_names[MMIX_STACK_POINTER_REGNUM]);
1848}
1849
1850/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1851
1852void
7585fcd5 1853mmix_asm_output_addr_diff_elt (FILE *stream,
1854 rtx body ATTRIBUTE_UNUSED,
1855 int value,
1856 int rel)
68cbb7e3 1857{
1858 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1859}
1860
1861/* ASM_OUTPUT_ADDR_VEC_ELT. */
1862
1863void
7585fcd5 1864mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1865{
1866 fprintf (stream, "\tOCTA L:%d\n", value);
1867}
1868
1869/* ASM_OUTPUT_SKIP. */
1870
1871void
7585fcd5 1872mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1873{
1874 fprintf (stream, "\tLOC @+%d\n", nbytes);
1875}
1876
1877/* ASM_OUTPUT_ALIGN. */
1878
1879void
7585fcd5 1880mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1881{
1882 /* We need to record the needed alignment of this section in the object,
1883 so we have to output an alignment directive. Use a .p2align (not
1884 .align) so people will never have to wonder about whether the
1885 argument is in number of bytes or the log2 thereof. We do it in
1886 addition to the LOC directive, so nothing needs tweaking when
1887 copy-pasting assembly into mmixal. */
1888 fprintf (stream, "\t.p2align %d\n", power);
1889 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1890}
1891
1892/* DBX_REGISTER_NUMBER. */
1893
c0dae7df 1894unsigned
1895mmix_dbx_register_number (unsigned regno)
68cbb7e3 1896{
d68ffc6f 1897 /* Adjust the register number to the one it will be output as, dammit.
1898 It'd be nice if we could check the assumption that we're filling a
1899 gap, but every register between the last saved register and parameter
1900 registers might be a valid parameter register. */
1901 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1902
1903 /* We need to renumber registers to get the number of the return address
1904 register in the range 0..255. It is also space-saving if registers
1905 mentioned in the call-frame information (which uses this function by
1906 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1907 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1908 return regno >= 224 ? (regno - 224) : (regno + 48);
1909}
1910
35a3065a 1911/* End of target macro support functions.
68cbb7e3 1912
7585fcd5 1913 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1914
d3310704 1915/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1916 from insn-emit.c. */
1917
1918rtx
3754d046 1919mmix_get_hard_reg_initial_val (machine_mode mode, int regno)
d3310704 1920{
1921 return get_hard_reg_initial_val (mode, regno);
1922}
1923
e911aedf 1924/* Nonzero when the function epilogue is simple enough that a single
d3310704 1925 "POP %d,0" should be used even within the function. */
0b123c47 1926
1927int
7585fcd5 1928mmix_use_simple_return (void)
0b123c47 1929{
1930 int regno;
1931
1932 int stack_space_to_allocate
abe32cce 1933 = (crtl->outgoing_args_size
1934 + crtl->args.pretend_args_size
0b123c47 1935 + get_frame_size () + 7) & ~7;
1936
1937 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1938 return 0;
1939
1940 for (regno = 255;
1941 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1942 regno--)
1943 /* Note that we assume that the frame-pointer-register is one of these
1944 registers, in which case we don't count it here. */
1945 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1946 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1947 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1948 return 0;
1949
1950 if (frame_pointer_needed)
1951 stack_space_to_allocate += 8;
1952
1953 if (MMIX_CFUN_HAS_LANDING_PAD)
1954 stack_space_to_allocate += 16;
1955 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1956 stack_space_to_allocate += 8;
1957
1958 return stack_space_to_allocate == 0;
1959}
1960
d3310704 1961
1962/* Expands the function prologue into RTX. */
1963
1964void
7585fcd5 1965mmix_expand_prologue (void)
d3310704 1966{
1967 HOST_WIDE_INT locals_size = get_frame_size ();
1968 int regno;
1969 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1970 = (crtl->outgoing_args_size
1971 + crtl->args.pretend_args_size
d3310704 1972 + locals_size + 7) & ~7;
1973 HOST_WIDE_INT offset = -8;
1974
1975 /* Add room needed to save global non-register-stack registers. */
1976 for (regno = 255;
1977 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1978 regno--)
1979 /* Note that we assume that the frame-pointer-register is one of these
1980 registers, in which case we don't count it here. */
1981 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1982 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1983 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1984 stack_space_to_allocate += 8;
1985
1986 /* If we do have a frame-pointer, add room for it. */
1987 if (frame_pointer_needed)
1988 stack_space_to_allocate += 8;
1989
1990 /* If we have a non-local label, we need to be able to unwind to it, so
1991 store the current register stack pointer. Also store the return
1992 address if we do that. */
1993 if (MMIX_CFUN_HAS_LANDING_PAD)
1994 stack_space_to_allocate += 16;
1995 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1996 /* If we do have a saved return-address slot, add room for it. */
1997 stack_space_to_allocate += 8;
1998
1999 /* Make sure we don't get an unaligned stack. */
2000 if ((stack_space_to_allocate % 8) != 0)
7781aa77 2001 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 2002 stack_space_to_allocate);
2003
abe32cce 2004 if (crtl->args.pretend_args_size)
d3310704 2005 {
2006 int mmix_first_vararg_reg
2007 = (MMIX_FIRST_INCOMING_ARG_REGNUM
2008 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 2009 - crtl->args.pretend_args_size / 8));
d3310704 2010
2011 for (regno
2012 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
2013 regno >= mmix_first_vararg_reg;
2014 regno--)
2015 {
2016 if (offset < 0)
2017 {
2018 HOST_WIDE_INT stack_chunk
2019 = stack_space_to_allocate > (256 - 8)
2020 ? (256 - 8) : stack_space_to_allocate;
2021
2022 mmix_emit_sp_add (-stack_chunk);
2023 offset += stack_chunk;
2024 stack_space_to_allocate -= stack_chunk;
2025 }
2026
2027 /* These registers aren't actually saved (as in "will be
2028 restored"), so don't tell DWARF2 they're saved. */
2029 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2030 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2031 offset)),
2032 gen_rtx_REG (DImode, regno));
2033 offset -= 8;
2034 }
2035 }
2036
2037 /* Store the frame-pointer. */
2038
2039 if (frame_pointer_needed)
2040 {
2041 rtx insn;
2042
2043 if (offset < 0)
2044 {
2045 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2046 HOST_WIDE_INT stack_chunk
2047 = stack_space_to_allocate > (256 - 8 - 8)
2048 ? (256 - 8 - 8) : stack_space_to_allocate;
2049
2050 mmix_emit_sp_add (-stack_chunk);
2051
2052 offset += stack_chunk;
2053 stack_space_to_allocate -= stack_chunk;
2054 }
2055
2056 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2057 plus_constant (Pmode,
2058 stack_pointer_rtx,
d3310704 2059 offset)),
2060 hard_frame_pointer_rtx);
2061 RTX_FRAME_RELATED_P (insn) = 1;
2062 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2063 stack_pointer_rtx,
2064 GEN_INT (offset + 8)));
2065 RTX_FRAME_RELATED_P (insn) = 1;
2066 offset -= 8;
2067 }
2068
2069 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2070 {
2071 rtx tmpreg, retreg;
2072 rtx insn;
2073
2074 /* Store the return-address, if one is needed on the stack. We
2075 usually store it in a register when needed, but that doesn't work
2076 with -fexceptions. */
2077
2078 if (offset < 0)
2079 {
2080 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2081 HOST_WIDE_INT stack_chunk
2082 = stack_space_to_allocate > (256 - 8 - 8)
2083 ? (256 - 8 - 8) : stack_space_to_allocate;
2084
2085 mmix_emit_sp_add (-stack_chunk);
2086
2087 offset += stack_chunk;
2088 stack_space_to_allocate -= stack_chunk;
2089 }
2090
2091 tmpreg = gen_rtx_REG (DImode, 255);
2092 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2093
2094 /* Dwarf2 code is confused by the use of a temporary register for
2095 storing the return address, so we have to express it as a note,
2096 which we attach to the actual store insn. */
2097 emit_move_insn (tmpreg, retreg);
2098
2099 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2100 plus_constant (Pmode,
2101 stack_pointer_rtx,
d3310704 2102 offset)),
2103 tmpreg);
2104 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2105 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
d1f9b275 2106 gen_rtx_SET (gen_rtx_MEM (DImode,
29c05e22 2107 plus_constant (Pmode,
2108 stack_pointer_rtx,
c0dae7df 2109 offset)),
2110 retreg));
d3310704 2111
2112 offset -= 8;
2113 }
2114 else if (MMIX_CFUN_HAS_LANDING_PAD)
2115 offset -= 8;
2116
2117 if (MMIX_CFUN_HAS_LANDING_PAD)
2118 {
2119 /* Store the register defining the numbering of local registers, so
2120 we know how long to unwind the register stack. */
2121
2122 if (offset < 0)
2123 {
2124 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2125 HOST_WIDE_INT stack_chunk
2126 = stack_space_to_allocate > (256 - 8 - 8)
2127 ? (256 - 8 - 8) : stack_space_to_allocate;
2128
2129 mmix_emit_sp_add (-stack_chunk);
2130
2131 offset += stack_chunk;
2132 stack_space_to_allocate -= stack_chunk;
2133 }
2134
2135 /* We don't tell dwarf2 about this one; we just have it to unwind
2136 the register stack at landing pads. FIXME: It's a kludge because
2137 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2138 register stack at the moment. Best thing would be to handle it
2139 like stack-pointer offsets. Better: some hook into dwarf2out.c
2140 to produce DW_CFA_expression:s that specify the increment of rO,
2141 and unwind it at eh_return (preferred) or at the landing pad.
2142 Then saves to $0..$G-1 could be specified through that register. */
2143
2144 emit_move_insn (gen_rtx_REG (DImode, 255),
2145 gen_rtx_REG (DImode,
2146 MMIX_rO_REGNUM));
2147 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2148 plus_constant (Pmode, stack_pointer_rtx,
2149 offset)),
d3310704 2150 gen_rtx_REG (DImode, 255));
2151 offset -= 8;
2152 }
2153
2154 /* After the return-address and the frame-pointer, we have the local
2155 variables. They're the ones that may have an "unaligned" size. */
2156 offset -= (locals_size + 7) & ~7;
2157
2158 /* Now store all registers that are global, i.e. not saved by the
2159 register file machinery.
2160
2161 It is assumed that the frame-pointer is one of these registers, so it
2162 is explicitly excluded in the count. */
2163
2164 for (regno = 255;
2165 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2166 regno--)
2167 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2168 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2169 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2170 {
2171 rtx insn;
2172
2173 if (offset < 0)
2174 {
2175 HOST_WIDE_INT stack_chunk
2176 = (stack_space_to_allocate > (256 - offset - 8)
2177 ? (256 - offset - 8) : stack_space_to_allocate);
2178
2179 mmix_emit_sp_add (-stack_chunk);
2180 offset += stack_chunk;
2181 stack_space_to_allocate -= stack_chunk;
2182 }
2183
2184 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2185 plus_constant (Pmode,
2186 stack_pointer_rtx,
d3310704 2187 offset)),
2188 gen_rtx_REG (DImode, regno));
2189 RTX_FRAME_RELATED_P (insn) = 1;
2190 offset -= 8;
2191 }
2192
2193 /* Finally, allocate room for outgoing args and local vars if room
2194 wasn't allocated above. */
2195 if (stack_space_to_allocate)
2196 mmix_emit_sp_add (-stack_space_to_allocate);
2197}
2198
2199/* Expands the function epilogue into RTX. */
2200
2201void
7585fcd5 2202mmix_expand_epilogue (void)
d3310704 2203{
2204 HOST_WIDE_INT locals_size = get_frame_size ();
2205 int regno;
2206 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2207 = (crtl->outgoing_args_size
2208 + crtl->args.pretend_args_size
d3310704 2209 + locals_size + 7) & ~7;
2210
d3310704 2211 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2212 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2213
2214 /* Add the space for global non-register-stack registers.
2215 It is assumed that the frame-pointer register can be one of these
2216 registers, in which case it is excluded from the count when needed. */
2217 for (regno = 255;
2218 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2219 regno--)
2220 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2221 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2222 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2223 stack_space_to_deallocate += 8;
2224
2225 /* Add in the space for register stack-pointer. If so, always add room
2226 for the saved PC. */
2227 if (MMIX_CFUN_HAS_LANDING_PAD)
2228 stack_space_to_deallocate += 16;
2229 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2230 /* If we have a saved return-address slot, add it in. */
2231 stack_space_to_deallocate += 8;
2232
2233 /* Add in the frame-pointer. */
2234 if (frame_pointer_needed)
2235 stack_space_to_deallocate += 8;
2236
2237 /* Make sure we don't get an unaligned stack. */
2238 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2239 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2240 stack_space_to_deallocate);
2241
2242 /* We will add back small offsets to the stack pointer as we go.
2243 First, we restore all registers that are global, i.e. not saved by
2244 the register file machinery. */
2245
2246 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2247 regno <= 255;
2248 regno++)
2249 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2250 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2251 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2252 {
2253 if (offset > 255)
2254 {
2255 mmix_emit_sp_add (offset);
2256 stack_space_to_deallocate -= offset;
2257 offset = 0;
2258 }
2259
2260 emit_move_insn (gen_rtx_REG (DImode, regno),
2261 gen_rtx_MEM (DImode,
29c05e22 2262 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2263 offset)));
2264 offset += 8;
2265 }
2266
2267 /* Here is where the local variables were. As in the prologue, they
2268 might be of an unaligned size. */
2269 offset += (locals_size + 7) & ~7;
2270
d3310704 2271 /* The saved register stack pointer is just below the frame-pointer
2272 register. We don't need to restore it "manually"; the POP
2273 instruction does that. */
2274 if (MMIX_CFUN_HAS_LANDING_PAD)
2275 offset += 16;
2276 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2277 /* The return-address slot is just below the frame-pointer register.
2278 We don't need to restore it because we don't really use it. */
2279 offset += 8;
2280
2281 /* Get back the old frame-pointer-value. */
2282 if (frame_pointer_needed)
2283 {
2284 if (offset > 255)
2285 {
2286 mmix_emit_sp_add (offset);
2287
2288 stack_space_to_deallocate -= offset;
2289 offset = 0;
2290 }
2291
2292 emit_move_insn (hard_frame_pointer_rtx,
2293 gen_rtx_MEM (DImode,
29c05e22 2294 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2295 offset)));
2296 offset += 8;
2297 }
2298
2299 /* We do not need to restore pretended incoming args, just add back
2300 offset to sp. */
2301 if (stack_space_to_deallocate != 0)
2302 mmix_emit_sp_add (stack_space_to_deallocate);
2303
18d50ae6 2304 if (crtl->calls_eh_return)
d3310704 2305 /* Adjust the (normal) stack-pointer to that of the receiver.
2306 FIXME: It would be nice if we could also adjust the register stack
2307 here, but we need to express it through DWARF 2 too. */
2308 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2309 gen_rtx_REG (DImode,
2310 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2311}
2312
68cbb7e3 2313/* Output an optimal sequence for setting a register to a specific
2314 constant. Used in an alternative for const_ints in movdi, and when
2315 using large stack-frame offsets.
2316
2317 Use do_begin_end to say if a line-starting TAB and newline before the
2318 first insn and after the last insn is wanted. */
2319
2320void
7585fcd5 2321mmix_output_register_setting (FILE *stream,
2322 int regno,
3a4303e7 2323 int64_t value,
7585fcd5 2324 int do_begin_end)
68cbb7e3 2325{
2326 if (do_begin_end)
2327 fprintf (stream, "\t");
2328
4d66cf01 2329 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K))
f03df321 2330 fprintf (stream, "NEGU %s,0,%" PRId64, reg_names[regno], -value);
3a4303e7 2331 else if (mmix_shiftable_wyde_value ((uint64_t) value))
68cbb7e3 2332 {
2333 /* First, the one-insn cases. */
2334 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2335 (uint64_t)
68cbb7e3 2336 value);
2337 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2338 mmix_output_shifted_value (stream, (uint64_t) value);
68cbb7e3 2339 }
3a4303e7 2340 else if (mmix_shiftable_wyde_value (-(uint64_t) value))
68cbb7e3 2341 {
2342 /* We do this to get a bit more legible assembly code. The next
2343 alternative is mostly redundant with this. */
2344
2345 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2346 -(uint64_t)
68cbb7e3 2347 value);
2348 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2349 mmix_output_shifted_value (stream, -(uint64_t) value);
68cbb7e3 2350 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2351 reg_names[regno]);
2352 }
3a4303e7 2353 else if (mmix_shiftable_wyde_value (~(uint64_t) value))
68cbb7e3 2354 {
2355 /* Slightly more expensive, the two-insn cases. */
2356
2357 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2358 is shiftable, or any other one-insn transformation of the value.
2359 FIXME: Check first if the value is "shiftable" by two loading
2360 with two insns, since it makes more readable assembly code (if
2361 anyone else cares). */
2362
2363 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2364 ~(uint64_t)
68cbb7e3 2365 value);
2366 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2367 mmix_output_shifted_value (stream, ~(uint64_t) value);
68cbb7e3 2368 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2369 reg_names[regno]);
2370 }
2371 else
2372 {
2373 /* The generic case. 2..4 insns. */
25037517 2374 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2375 const char *op = "SET";
2376 const char *line_begin = "";
f0b228a5 2377 int insns = 0;
68cbb7e3 2378 int i;
3a4303e7 2379 int64_t tmpvalue = value;
68cbb7e3 2380
f0b228a5 2381 /* Compute the number of insns needed to output this constant. */
2382 for (i = 0; i < 4 && tmpvalue != 0; i++)
2383 {
2384 if (tmpvalue & 65535)
2385 insns++;
2386 tmpvalue >>= 16;
2387 }
2388 if (TARGET_BASE_ADDRESSES && insns == 3)
2389 {
2390 /* The number three is based on a static observation on
2391 ghostscript-6.52. Two and four are excluded because there
2392 are too many such constants, and each unique constant (maybe
2393 offset by 1..255) were used few times compared to other uses,
2394 e.g. addresses.
2395
2396 We use base-plus-offset addressing to force it into a global
2397 register; we just use a "LDA reg,VALUE", which will cause the
2398 assembler and linker to DTRT (for constants as well as
2399 addresses). */
2400 fprintf (stream, "LDA %s,", reg_names[regno]);
2401 mmix_output_octa (stream, value, 0);
2402 }
2403 else
68cbb7e3 2404 {
f0b228a5 2405 /* Output pertinent parts of the 4-wyde sequence.
2406 Still more to do if we want this to be optimal, but hey...
2407 Note that the zero case has been handled above. */
2408 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2409 {
f0b228a5 2410 if (value & 65535)
2411 {
2412 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2413 higher_parts[i], reg_names[regno],
2414 (int) (value & 65535));
2415 /* The first one sets the rest of the bits to 0, the next
2416 ones add set bits. */
2417 op = "INC";
2418 line_begin = "\n\t";
2419 }
68cbb7e3 2420
f0b228a5 2421 value >>= 16;
2422 }
68cbb7e3 2423 }
2424 }
2425
2426 if (do_begin_end)
2427 fprintf (stream, "\n");
2428}
2429
2430/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2431 else return 0. */
2432
2433int
3a4303e7 2434mmix_shiftable_wyde_value (uint64_t value)
68cbb7e3 2435{
2436 /* Shift by 16 bits per group, stop when we've found two groups with
2437 nonzero bits. */
2438 int i;
2439 int has_candidate = 0;
2440
2441 for (i = 0; i < 4; i++)
2442 {
2443 if (value & 65535)
2444 {
2445 if (has_candidate)
2446 return 0;
2447 else
2448 has_candidate = 1;
2449 }
2450
2451 value >>= 16;
2452 }
2453
2454 return 1;
2455}
2456
74f4459c 2457/* X and Y are two things to compare using CODE. Return the rtx for
2458 the cc-reg in the proper mode. */
68cbb7e3 2459
2460rtx
7585fcd5 2461mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2462{
3754d046 2463 machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2464 return gen_reg_rtx (ccmode);
68cbb7e3 2465}
2466
2467/* Local (static) helper functions. */
2468
d3310704 2469static void
7585fcd5 2470mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2471{
2472 rtx insn;
2473
2474 if (offset < 0)
2475 {
2476 /* Negative stack-pointer adjustments are allocations and appear in
2477 the prologue only. We mark them as frame-related so unwind and
2478 debug info is properly emitted for them. */
2479 if (offset > -255)
2480 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2481 stack_pointer_rtx,
2482 GEN_INT (offset)));
2483 else
2484 {
2485 rtx tmpr = gen_rtx_REG (DImode, 255);
2486 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2487 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2488 stack_pointer_rtx, tmpr));
2489 }
2490 RTX_FRAME_RELATED_P (insn) = 1;
2491 }
2492 else
2493 {
2494 /* Positive adjustments are in the epilogue only. Don't mark them
2495 as "frame-related" for unwind info. */
f105c84e 2496 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
d3310704 2497 emit_insn (gen_adddi3 (stack_pointer_rtx,
2498 stack_pointer_rtx,
2499 GEN_INT (offset)));
2500 else
2501 {
2502 rtx tmpr = gen_rtx_REG (DImode, 255);
2503 emit_move_insn (tmpr, GEN_INT (offset));
2504 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2505 stack_pointer_rtx, tmpr));
2506 }
2507 }
2508}
2509
68cbb7e3 2510/* Print operator suitable for doing something with a shiftable
ebb11c7b 2511 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2512
2513static void
7585fcd5 2514mmix_output_shiftvalue_op_from_str (FILE *stream,
2515 const char *mainop,
3a4303e7 2516 int64_t value)
68cbb7e3 2517{
25037517 2518 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2519 int i;
2520
2521 if (! mmix_shiftable_wyde_value (value))
2522 {
2523 char s[sizeof ("0xffffffffffffffff")];
9d247a3d 2524 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2525 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2526 }
2527
2528 for (i = 0; i < 4; i++)
2529 {
2530 /* We know we're through when we find one-bits in the low
2531 16 bits. */
2532 if (value & 0xffff)
2533 {
2534 fprintf (stream, "%s%s", mainop, op_part[i]);
2535 return;
2536 }
2537 value >>= 16;
2538 }
2539
2540 /* No bits set? Then it must have been zero. */
2541 fprintf (stream, "%sL", mainop);
2542}
2543
2544/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2545
2546static void
3a4303e7 2547mmix_output_octa (FILE *stream, int64_t value, int do_begin_end)
68cbb7e3 2548{
68cbb7e3 2549 if (do_begin_end)
2550 fprintf (stream, "\tOCTA ");
2551
68cbb7e3 2552 /* Provide a few alternative output formats depending on the number, to
2553 improve legibility of assembler output. */
3a4303e7 2554 if ((value < (int64_t) 0 && value > (int64_t) -10000)
2555 || (value >= (int64_t) 0 && value <= (int64_t) 16384))
68cbb7e3 2556 fprintf (stream, "%d", (int) value);
3a4303e7 2557 else if (value > (int64_t) 0
2558 && value < ((int64_t) 1 << 31) * 2)
68cbb7e3 2559 fprintf (stream, "#%x", (unsigned int) value);
3a4303e7 2560 else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t))
6996b123 2561 /* We need to avoid the not-so-universal "0x" prefix; we need the
2562 pure hex-digits together with the mmixal "#" hex prefix. */
2563 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE,
2564 (HOST_WIDE_INT) value);
2565 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */
9d247a3d 2566 fprintf (stream, "%" PRIu64, value);
68cbb7e3 2567
2568 if (do_begin_end)
2569 fprintf (stream, "\n");
2570}
2571
2572/* Print the presumed shiftable wyde argument shifted into place (to
2573 be output with an operand). */
2574
2575static void
3a4303e7 2576mmix_output_shifted_value (FILE *stream, int64_t value)
68cbb7e3 2577{
2578 int i;
2579
2580 if (! mmix_shiftable_wyde_value (value))
2581 {
2582 char s[16+2+1];
9d247a3d 2583 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2584 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2585 }
2586
2587 for (i = 0; i < 4; i++)
68cbb7e3 2588 {
7585fcd5 2589 /* We know we're through when we find one-bits in the low 16 bits. */
2590 if (value & 0xffff)
2591 {
2592 fprintf (stream, "#%x", (int) (value & 0xffff));
2593 return;
2594 }
68cbb7e3 2595
2596 value >>= 16;
2597 }
2598
2599 /* No bits set? Then it must have been zero. */
2600 fprintf (stream, "0");
2601}
2602
2603/* Output an MMIX condition name corresponding to an operator
2604 and operands:
2605 (comparison_operator [(comparison_operator ...) (const_int 0)])
2606 which means we have to look at *two* operators.
2607
2608 The argument "reversed" refers to reversal of the condition (not the
2609 same as swapping the arguments). */
2610
2611static void
7a7fb407 2612mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2613{
2614 struct cc_conv
2615 {
2616 RTX_CODE cc;
2617
2618 /* The normal output cc-code. */
2619 const char *const normal;
2620
2621 /* The reversed cc-code, or NULL if invalid. */
2622 const char *const reversed;
2623 };
2624
2625 struct cc_type_conv
2626 {
3754d046 2627 machine_mode cc_mode;
68cbb7e3 2628
21f1e711 2629 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2630 const struct cc_conv *const convs;
2631 };
2632
2633#undef CCEND
21f1e711 2634#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2635
2636 static const struct cc_conv cc_fun_convs[]
2637 = {{ORDERED, "Z", "P"},
2638 {UNORDERED, "P", "Z"},
2639 CCEND};
2640 static const struct cc_conv cc_fp_convs[]
2641 = {{GT, "P", NULL},
2642 {LT, "N", NULL},
2643 CCEND};
2644 static const struct cc_conv cc_fpeq_convs[]
2645 = {{NE, "Z", "P"},
2646 {EQ, "P", "Z"},
2647 CCEND};
2648 static const struct cc_conv cc_uns_convs[]
2649 = {{GEU, "NN", "N"},
2650 {GTU, "P", "NP"},
2651 {LEU, "NP", "P"},
2652 {LTU, "N", "NN"},
2653 CCEND};
2654 static const struct cc_conv cc_signed_convs[]
2655 = {{NE, "NZ", "Z"},
2656 {EQ, "Z", "NZ"},
2657 {GE, "NN", "N"},
2658 {GT, "P", "NP"},
2659 {LE, "NP", "P"},
2660 {LT, "N", "NN"},
2661 CCEND};
2662 static const struct cc_conv cc_di_convs[]
2663 = {{NE, "NZ", "Z"},
2664 {EQ, "Z", "NZ"},
2665 {GE, "NN", "N"},
2666 {GT, "P", "NP"},
2667 {LE, "NP", "P"},
2668 {LT, "N", "NN"},
2669 {GTU, "NZ", "Z"},
2670 {LEU, "Z", "NZ"},
2671 CCEND};
2672#undef CCEND
2673
2674 static const struct cc_type_conv cc_convs[]
1e0295b9 2675 = {{E_CC_FUNmode, cc_fun_convs},
2676 {E_CC_FPmode, cc_fp_convs},
2677 {E_CC_FPEQmode, cc_fpeq_convs},
2678 {E_CC_UNSmode, cc_uns_convs},
2679 {E_CCmode, cc_signed_convs},
2680 {E_DImode, cc_di_convs}};
68cbb7e3 2681
3585dac7 2682 size_t i;
68cbb7e3 2683 int j;
2684
3754d046 2685 machine_mode mode = GET_MODE (XEXP (x, 0));
68cbb7e3 2686 RTX_CODE cc = GET_CODE (x);
2687
3585dac7 2688 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2689 {
2690 if (mode == cc_convs[i].cc_mode)
2691 {
21f1e711 2692 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2693 if (cc == cc_convs[i].convs[j].cc)
2694 {
2695 const char *mmix_cc
2696 = (reversed ? cc_convs[i].convs[j].reversed
2697 : cc_convs[i].convs[j].normal);
2698
2699 if (mmix_cc == NULL)
2700 fatal_insn ("MMIX Internal: Trying to output invalidly\
2701 reversed condition:", x);
2702
2703 fprintf (stream, "%s", mmix_cc);
2704 return;
2705 }
2706
2707 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2708 }
2709 }
2710
2711 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2712}
2713
2714/* Return the bit-value for a const_int or const_double. */
2715
3a4303e7 2716int64_t
7a7fb407 2717mmix_intval (const_rtx x)
68cbb7e3 2718{
68cbb7e3 2719 if (GET_CODE (x) == CONST_INT)
2720 return INTVAL (x);
2721
2722 /* We make a little song and dance because converting to long long in
2723 gcc-2.7.2 is broken. I still want people to be able to use it for
2724 cross-compilation to MMIX. */
2725 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
3a4303e7 2726 return CONST_DOUBLE_HIGH (x);
68cbb7e3 2727
2728 if (GET_CODE (x) == CONST_DOUBLE)
2729 {
68cbb7e3 2730 if (GET_MODE (x) == DFmode)
2731 {
2732 long bits[2];
dc8dc4ce 2733
945f7b03 2734 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2735
ca2399d9 2736 /* The double cast is necessary to avoid getting the long
2737 sign-extended to unsigned long long(!) when they're of
2738 different size (usually 32-bit hosts). */
2739 return
3a4303e7 2740 ((uint64_t) (unsigned long) bits[0]
2741 << (uint64_t) 32U)
2742 | (uint64_t) (unsigned long) bits[1];
68cbb7e3 2743 }
2744 else if (GET_MODE (x) == SFmode)
2745 {
2746 long bits;
945f7b03 2747 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2748
2749 return (unsigned long) bits;
2750 }
2751 }
2752
2753 fatal_insn ("MMIX Internal: This is not a constant:", x);
2754}
2755
3b2411a8 2756/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2757
3754d046 2758machine_mode
3b2411a8 2759mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
3754d046 2760 machine_mode mode,
3b2411a8 2761 int *punsignedp ATTRIBUTE_UNUSED,
2762 const_tree fntype ATTRIBUTE_UNUSED,
2763 int for_return)
2764{
2765 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2766 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2767 if (for_return == 1)
3b2411a8 2768 return mode;
2769
2770 /* Promotion of modes currently generates slow code, extending before
2771 operation, so we do it only for arguments. */
2772 if (GET_MODE_CLASS (mode) == MODE_INT
2773 && GET_MODE_SIZE (mode) < 8)
2774 return DImode;
2775 else
2776 return mode;
2777}
9e4a734a 2778/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2779
2780static rtx
2781mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2782 int incoming ATTRIBUTE_UNUSED)
2783{
2784 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2785}
2786
5a1c68c3 2787/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2788
2789 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2790 of it; we can deduce the value. */
2791
2792bool
2793mmix_frame_pointer_required (void)
2794{
2795 return (cfun->has_nonlocal_label);
2796}
2797
68cbb7e3 2798/*
2799 * Local variables:
2800 * eval: (c-set-style "gnu")
2801 * indent-tabs-mode: t
2802 * End:
2803 */