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bcf684c7 1/* Definitions of target machine for GNU compiler, for MMIX.
23a5b65a 2 Copyright (C) 2000-2014 Free Software Foundation, Inc.
bcf684c7
HPN
3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
c583c5c3 5This file is part of GCC.
bcf684c7 6
c583c5c3 7GCC is free software; you can redistribute it and/or modify
bcf684c7 8it under the terms of the GNU General Public License as published by
2f83c7d6 9the Free Software Foundation; either version 3, or (at your option)
bcf684c7
HPN
10any later version.
11
c583c5c3 12GCC is distributed in the hope that it will be useful,
bcf684c7
HPN
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
2f83c7d6
NC
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
bcf684c7
HPN
20
21#include "config.h"
22#include "system.h"
4977bab6
ZW
23#include "coretypes.h"
24#include "tm.h"
bcf684c7
HPN
25#include "rtl.h"
26#include "regs.h"
27#include "hard-reg-set.h"
28#include "hashtab.h"
29#include "insn-config.h"
30#include "output.h"
2d5bfc67 31#include "basic-block.h"
bcf684c7
HPN
32#include "flags.h"
33#include "tree.h"
d8a2d370
DN
34#include "varasm.h"
35#include "stor-layout.h"
36#include "calls.h"
bcf684c7
HPN
37#include "function.h"
38#include "expr.h"
718f9c0f 39#include "diagnostic-core.h"
bcf684c7
HPN
40#include "recog.h"
41#include "ggc.h"
a80b0574 42#include "dwarf2.h"
bcf684c7
HPN
43#include "debug.h"
44#include "tm_p.h"
bcf684c7
HPN
45#include "target.h"
46#include "target-def.h"
4ae50669 47#include "df.h"
e076319b 48#include "tm-constrs.h"
9b2b7279 49#include "builtins.h"
bcf684c7
HPN
50
51/* First some local helper definitions. */
52#define MMIX_FIRST_GLOBAL_REGNUM 32
53
54/* We'd need a current_function_has_landing_pad. It's marked as such when
55 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
56 mostly. */
57#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
58
59/* We have no means to tell DWARF 2 about the register stack, so we need
60 to store the return address on the stack if an exception can get into
957ec0f9 61 this function. FIXME: Narrow condition. Before any whole-function
6fb5fa3c 62 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
957ec0f9
HPN
63 after reload_completed; it may contain incorrect information some time
64 before that. Within a RTL sequence (after a call to start_sequence,
65 such as in RTL expanders), leaf_function_p doesn't see all insns
66 (perhaps any insn). But regs_ever_live is up-to-date when
67 leaf_function_p () isn't, so we "or" them together to get accurate
68 information. FIXME: Some tweak to leaf_function_p might be
2067c116 69 preferable. */
957ec0f9
HPN
70#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
71 (flag_exceptions \
6fb5fa3c 72 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
957ec0f9 73 || !leaf_function_p ()))
bcf684c7
HPN
74
75#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
e3b5732b 76 (crtl->calls_eh_return \
bcf684c7
HPN
77 && (EH_RETURN_DATA_REGNO (0) == REGNO \
78 || EH_RETURN_DATA_REGNO (1) == REGNO \
79 || EH_RETURN_DATA_REGNO (2) == REGNO \
80 || EH_RETURN_DATA_REGNO (3) == REGNO))
81
1f2641b6
HPN
82/* For the default ABI, we rename registers at output-time to fill the gap
83 between the (statically partitioned) saved registers and call-clobbered
84 registers. In effect this makes unused call-saved registers to be used
85 as call-clobbered registers. The benefit comes from keeping the number
86 of local registers (value of rL) low, since there's a cost of
957ec0f9
HPN
87 increasing rL and clearing unused (unset) registers with lower numbers.
88 Don't translate while outputting the prologue. */
1f2641b6
HPN
89#define MMIX_OUTPUT_REGNO(N) \
90 (TARGET_ABI_GNU \
66b8c57f
HPN
91 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
92 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
957ec0f9
HPN
93 || cfun == NULL \
94 || cfun->machine == NULL \
95 || cfun->machine->in_prologue \
1f2641b6
HPN
96 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
97 + cfun->machine->highest_saved_stack_register + 1))
98
66b8c57f
HPN
99/* The %d in "POP %d,0". */
100#define MMIX_POP_ARGUMENT() \
101 ((! TARGET_ABI_GNU \
38173d38 102 && crtl->return_rtx != NULL \
e3b5732b 103 && ! cfun->returns_struct) \
38173d38
JH
104 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
105 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
66b8c57f
HPN
106 : 0)
107
bcf684c7
HPN
108/* The canonical saved comparison operands for non-cc0 machines, set in
109 the compare expander. */
110rtx mmix_compare_op0;
111rtx mmix_compare_op1;
112
bcf684c7
HPN
113/* Declarations of locals. */
114
bcf684c7
HPN
115/* Intermediate for insn output. */
116static int mmix_output_destination_register;
117
c5387660 118static void mmix_option_override (void);
501d087d 119static void mmix_asm_output_source_filename (FILE *, const char *);
bcf684c7 120static void mmix_output_shiftvalue_op_from_str
a9243bfc
RB
121 (FILE *, const char *, int64_t);
122static void mmix_output_shifted_value (FILE *, int64_t);
5057fa13 123static void mmix_output_condition (FILE *, const_rtx, int);
a9243bfc 124static void mmix_output_octa (FILE *, int64_t, int);
4e58524e
HPN
125static bool mmix_assemble_integer (rtx, unsigned int, int);
126static struct machine_function *mmix_init_machine_status (void);
127static void mmix_encode_section_info (tree, rtx, int);
128static const char *mmix_strip_name_encoding (const char *);
129static void mmix_emit_sp_add (HOST_WIDE_INT offset);
130static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
131static void mmix_target_asm_function_end_prologue (FILE *);
132static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
0d5e496f
AS
133static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
134static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
c6c3dba9 135static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool);
1a627b35 136static bool mmix_legitimate_constant_p (enum machine_mode, rtx);
4e58524e 137static void mmix_reorg (void);
c590b625 138static void mmix_asm_output_mi_thunk
4e58524e 139 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
a9ba5098 140static void mmix_setup_incoming_varargs
d5cc9181 141 (cumulative_args_t, enum machine_mode, tree, int *, int);
4e58524e
HPN
142static void mmix_file_start (void);
143static void mmix_file_end (void);
68f932c4 144static bool mmix_rtx_costs (rtx, int, int, int, int *, bool);
6e9ee54c
AS
145static int mmix_register_move_cost (enum machine_mode,
146 reg_class_t, reg_class_t);
a9ba5098 147static rtx mmix_struct_value_rtx (tree, int);
cde0f3fd
PB
148static enum machine_mode mmix_promote_function_mode (const_tree,
149 enum machine_mode,
150 int *, const_tree, int);
d5cc9181 151static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode,
9fb41e15 152 const_tree, bool);
d5cc9181 153static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode,
9fb41e15 154 const_tree, bool, bool);
d5cc9181 155static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode,
9fb41e15 156 const_tree, bool);
d5cc9181 157static rtx mmix_function_arg (cumulative_args_t, enum machine_mode,
9fb41e15 158 const_tree, bool);
a3ca07e3
AS
159static rtx mmix_function_value (const_tree, const_tree, bool);
160static rtx mmix_libcall_value (enum machine_mode, const_rtx);
161static bool mmix_function_value_regno_p (const unsigned int);
d5cc9181 162static bool mmix_pass_by_reference (cumulative_args_t,
586de218 163 enum machine_mode, const_tree, bool);
b52b1749 164static bool mmix_frame_pointer_required (void);
dbbdb385
RH
165static void mmix_asm_trampoline_template (FILE *);
166static void mmix_trampoline_init (rtx, tree, rtx);
5057fa13
AS
167static void mmix_print_operand (FILE *, rtx, int);
168static void mmix_print_operand_address (FILE *, rtx);
169static bool mmix_print_operand_punct_valid_p (unsigned char);
5efd84c5 170static void mmix_conditional_register_usage (void);
bcf684c7
HPN
171
172/* Target structure macros. Listed by node. See `Using and Porting GCC'
173 for a general description. */
174
175/* Node: Function Entry */
176
301d03af
RS
177#undef TARGET_ASM_BYTE_OP
178#define TARGET_ASM_BYTE_OP NULL
179#undef TARGET_ASM_ALIGNED_HI_OP
180#define TARGET_ASM_ALIGNED_HI_OP NULL
181#undef TARGET_ASM_ALIGNED_SI_OP
182#define TARGET_ASM_ALIGNED_SI_OP NULL
183#undef TARGET_ASM_ALIGNED_DI_OP
184#define TARGET_ASM_ALIGNED_DI_OP NULL
185#undef TARGET_ASM_INTEGER
186#define TARGET_ASM_INTEGER mmix_assemble_integer
187
bcf684c7
HPN
188#undef TARGET_ASM_FUNCTION_PROLOGUE
189#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
190
957ec0f9
HPN
191#undef TARGET_ASM_FUNCTION_END_PROLOGUE
192#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
193
bcf684c7
HPN
194#undef TARGET_ASM_FUNCTION_EPILOGUE
195#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
196
5057fa13
AS
197#undef TARGET_PRINT_OPERAND
198#define TARGET_PRINT_OPERAND mmix_print_operand
199#undef TARGET_PRINT_OPERAND_ADDRESS
200#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
201#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
202#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
203
fb49053f
RH
204#undef TARGET_ENCODE_SECTION_INFO
205#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
772c5265
RH
206#undef TARGET_STRIP_NAME_ENCODING
207#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
fb49053f 208
c590b625
RH
209#undef TARGET_ASM_OUTPUT_MI_THUNK
210#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
3961e8fe
RH
211#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
212#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
1bc7c5b6
ZW
213#undef TARGET_ASM_FILE_START
214#define TARGET_ASM_FILE_START mmix_file_start
215#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
216#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
a5fe455b
ZW
217#undef TARGET_ASM_FILE_END
218#define TARGET_ASM_FILE_END mmix_file_end
501d087d
AS
219#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
220#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
c590b625 221
5efd84c5
NF
222#undef TARGET_CONDITIONAL_REGISTER_USAGE
223#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
224
3c50106f
RH
225#undef TARGET_RTX_COSTS
226#define TARGET_RTX_COSTS mmix_rtx_costs
dcefdf67 227#undef TARGET_ADDRESS_COST
b413068c 228#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
3c50106f 229
6e9ee54c
AS
230#undef TARGET_REGISTER_MOVE_COST
231#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
232
18dbd950
RS
233#undef TARGET_MACHINE_DEPENDENT_REORG
234#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
235
cde0f3fd
PB
236#undef TARGET_PROMOTE_FUNCTION_MODE
237#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
238
a3ca07e3
AS
239#undef TARGET_FUNCTION_VALUE
240#define TARGET_FUNCTION_VALUE mmix_function_value
241#undef TARGET_LIBCALL_VALUE
242#define TARGET_LIBCALL_VALUE mmix_libcall_value
243#undef TARGET_FUNCTION_VALUE_REGNO_P
244#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
a9ba5098 245
9fb41e15
NF
246#undef TARGET_FUNCTION_ARG
247#define TARGET_FUNCTION_ARG mmix_function_arg
248#undef TARGET_FUNCTION_INCOMING_ARG
249#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
250#undef TARGET_FUNCTION_ARG_ADVANCE
251#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
a9ba5098
KH
252#undef TARGET_STRUCT_VALUE_RTX
253#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
a9ba5098
KH
254#undef TARGET_SETUP_INCOMING_VARARGS
255#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
8cd5a4e0
RH
256#undef TARGET_PASS_BY_REFERENCE
257#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
6cdd5672
RH
258#undef TARGET_CALLEE_COPIES
259#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
a9ba5098 260
0d5e496f
AS
261#undef TARGET_PREFERRED_RELOAD_CLASS
262#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
263#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
12e502c6 264#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
0d5e496f 265
c6c3dba9
PB
266#undef TARGET_LEGITIMATE_ADDRESS_P
267#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
1a627b35
RS
268#undef TARGET_LEGITIMATE_CONSTANT_P
269#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
c6c3dba9 270
b52b1749
AS
271#undef TARGET_FRAME_POINTER_REQUIRED
272#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
273
dbbdb385
RH
274#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
275#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
276#undef TARGET_TRAMPOLINE_INIT
277#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
278
c5387660
JM
279#undef TARGET_OPTION_OVERRIDE
280#define TARGET_OPTION_OVERRIDE mmix_option_override
281
bcf684c7
HPN
282struct gcc_target targetm = TARGET_INITIALIZER;
283
284/* Functions that are expansions for target macros.
285 See Target Macros in `Using and Porting GCC'. */
286
c5387660 287/* TARGET_OPTION_OVERRIDE. */
bcf684c7 288
c5387660
JM
289static void
290mmix_option_override (void)
bcf684c7
HPN
291{
292 /* Should we err or should we warn? Hmm. At least we must neutralize
293 it. For example the wrong kind of case-tables will be generated with
294 PIC; we use absolute address items for mmixal compatibility. FIXME:
295 They could be relative if we just elide them to after all pertinent
296 labels. */
297 if (flag_pic)
298 {
d4ee4d25 299 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
bcf684c7
HPN
300 flag_pic = 0;
301 }
bcf684c7
HPN
302}
303
304/* INIT_EXPANDERS. */
305
306void
4e58524e 307mmix_init_expanders (void)
bcf684c7
HPN
308{
309 init_machine_status = mmix_init_machine_status;
310}
311
312/* Set the per-function data. */
313
e2500fed 314static struct machine_function *
4e58524e 315mmix_init_machine_status (void)
bcf684c7 316{
766090c2 317 return ggc_cleared_alloc<machine_function> ();
bcf684c7
HPN
318}
319
df8a1d28 320/* DATA_ABI_ALIGNMENT.
bcf684c7
HPN
321 We have trouble getting the address of stuff that is located at other
322 than 32-bit alignments (GETA requirements), so try to give everything
ff482c8d 323 at least 32-bit alignment. */
bcf684c7
HPN
324
325int
4e58524e 326mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
bcf684c7
HPN
327{
328 if (basic_align < 32)
329 return 32;
330
331 return basic_align;
332}
333
334/* CONSTANT_ALIGNMENT. */
335
336int
4e58524e 337mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
bcf684c7
HPN
338{
339 if (basic_align < 32)
340 return 32;
341
342 return basic_align;
343}
344
345/* LOCAL_ALIGNMENT. */
346
4ae50669
JR
347unsigned
348mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
bcf684c7
HPN
349{
350 if (basic_align < 32)
351 return 32;
352
353 return basic_align;
354}
355
5efd84c5 356/* TARGET_CONDITIONAL_REGISTER_USAGE. */
bcf684c7 357
5efd84c5 358static void
4e58524e 359mmix_conditional_register_usage (void)
bcf684c7
HPN
360{
361 int i;
362
363 if (TARGET_ABI_GNU)
364 {
365 static const int gnu_abi_reg_alloc_order[]
366 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
367
368 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
369 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
370
371 /* Change the default from the mmixware ABI. For the GNU ABI,
372 $15..$30 are call-saved just as $0..$14. There must be one
957ec0f9
HPN
373 call-clobbered local register for the "hole" that holds the
374 number of saved local registers saved by PUSHJ/PUSHGO during the
375 function call, receiving the return value at return. So best is
376 to use the highest, $31. It's already marked call-clobbered for
377 the mmixware ABI. */
bcf684c7
HPN
378 for (i = 15; i <= 30; i++)
379 call_used_regs[i] = 0;
a824924d
HPN
380
381 /* "Unfix" the parameter registers. */
382 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
383 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
384 i++)
385 fixed_regs[i] = 0;
bcf684c7
HPN
386 }
387
388 /* Step over the ":" in special register names. */
389 if (! TARGET_TOPLEVEL_SYMBOLS)
390 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
391 if (reg_names[i][0] == ':')
392 reg_names[i]++;
393}
394
60e90d09
HPN
395/* INCOMING_REGNO and OUTGOING_REGNO worker function.
396 Those two macros must only be applied to function argument
ae9d1af7
HPN
397 registers and the function return value register for the opposite
398 use. FIXME: for their current use in gcc, it'd be better with an
399 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la
400 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
9fb41e15 401 forcing the target to commit to a fixed mapping and for any
ae9d1af7
HPN
402 unspecified register use. Particularly when thinking about the
403 return-value, it is better to imagine INCOMING_REGNO and
404 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as
405 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming"
406 and "outgoing" is from the perspective of the parameter-registers,
407 but the same macro is (must be, lacking an alternative like
408 suggested above) used to map the return-value-register from the
409 same perspective. To make directions even more confusing, the macro
410 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register
411 in which to return a value, i.e. INCOMING_REGNO for the return-value-
412 register as received from a called function; the return-value on the
413 way out. */
60e90d09
HPN
414
415int
416mmix_opposite_regno (int regno, int incoming)
417{
ae9d1af7
HPN
418 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM)
419 return MMIX_RETURN_VALUE_REGNUM;
420
421 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM)
422 return MMIX_OUTGOING_RETURN_VALUE_REGNUM;
423
60e90d09
HPN
424 if (!mmix_function_arg_regno_p (regno, incoming))
425 return regno;
426
427 return
428 regno - (incoming
429 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
430 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
431}
432
957ec0f9
HPN
433/* LOCAL_REGNO.
434 All registers that are part of the register stack and that will be
435 saved are local. */
436
437int
4e58524e 438mmix_local_regno (int regno)
957ec0f9
HPN
439{
440 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
441}
442
0d5e496f 443/* TARGET_PREFERRED_RELOAD_CLASS.
bcf684c7
HPN
444 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
445
0d5e496f
AS
446static reg_class_t
447mmix_preferred_reload_class (rtx x, reg_class_t rclass)
bcf684c7
HPN
448{
449 /* FIXME: Revisit. */
450 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
0a2aaacc 451 ? REMAINDER_REG : rclass;
bcf684c7
HPN
452}
453
0d5e496f 454/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
bcf684c7
HPN
455 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
456
0d5e496f
AS
457static reg_class_t
458mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
bcf684c7
HPN
459{
460 /* FIXME: Revisit. */
461 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
0a2aaacc 462 ? REMAINDER_REG : rclass;
bcf684c7
HPN
463}
464
465/* SECONDARY_RELOAD_CLASS.
466 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
467
468enum reg_class
0a2aaacc 469mmix_secondary_reload_class (enum reg_class rclass,
4e58524e
HPN
470 enum machine_mode mode ATTRIBUTE_UNUSED,
471 rtx x ATTRIBUTE_UNUSED,
472 int in_p ATTRIBUTE_UNUSED)
bcf684c7 473{
0a2aaacc
KG
474 if (rclass == REMAINDER_REG
475 || rclass == HIMULT_REG
476 || rclass == SYSTEM_REGS)
bcf684c7
HPN
477 return GENERAL_REGS;
478
bcf684c7
HPN
479 return NO_REGS;
480}
481
bcf684c7
HPN
482/* DYNAMIC_CHAIN_ADDRESS. */
483
484rtx
4e58524e 485mmix_dynamic_chain_address (rtx frame)
bcf684c7
HPN
486{
487 /* FIXME: the frame-pointer is stored at offset -8 from the current
488 frame-pointer. Unfortunately, the caller assumes that a
489 frame-pointer is present for *all* previous frames. There should be
490 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
0a81f074 491 return plus_constant (Pmode, frame, -8);
bcf684c7
HPN
492}
493
494/* STARTING_FRAME_OFFSET. */
495
496int
4e58524e 497mmix_starting_frame_offset (void)
bcf684c7
HPN
498{
499 /* The old frame pointer is in the slot below the new one, so
500 FIRST_PARM_OFFSET does not need to depend on whether the
501 frame-pointer is needed or not. We have to adjust for the register
502 stack pointer being located below the saved frame pointer.
503 Similarly, we store the return address on the stack too, for
504 exception handling, and always if we save the register stack pointer. */
505 return
506 (-8
507 + (MMIX_CFUN_HAS_LANDING_PAD
508 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
509}
510
511/* RETURN_ADDR_RTX. */
512
513rtx
4e58524e 514mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
bcf684c7
HPN
515{
516 return count == 0
517 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
3ec1b4cb
HPN
518 /* FIXME: Set frame_alias_set on the following. (Why?)
519 See mmix_initial_elimination_offset for the reason we can't use
520 get_hard_reg_initial_val for both. Always using a stack slot
521 and not a register would be suboptimal. */
0a81f074
RS
522 ? validize_mem (gen_rtx_MEM (Pmode,
523 plus_constant (Pmode,
524 frame_pointer_rtx, -16)))
bcf684c7
HPN
525 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
526 : NULL_RTX;
527}
528
529/* SETUP_FRAME_ADDRESSES. */
530
531void
4e58524e 532mmix_setup_frame_addresses (void)
bcf684c7
HPN
533{
534 /* Nothing needed at the moment. */
535}
536
537/* The difference between the (imaginary) frame pointer and the stack
538 pointer. Used to eliminate the frame pointer. */
539
540int
4e58524e 541mmix_initial_elimination_offset (int fromreg, int toreg)
bcf684c7
HPN
542{
543 int regno;
544 int fp_sp_offset
38173d38 545 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
bcf684c7 546
3ec1b4cb
HPN
547 /* There is no actual offset between these two virtual values, but for
548 the frame-pointer, we have the old one in the stack position below
549 it, so the offset for the frame-pointer to the stack-pointer is one
550 octabyte larger. */
bcf684c7
HPN
551 if (fromreg == MMIX_ARG_POINTER_REGNUM
552 && toreg == MMIX_FRAME_POINTER_REGNUM)
553 return 0;
554
555 /* The difference is the size of local variables plus the size of
556 outgoing function arguments that would normally be passed as
557 registers but must be passed on stack because we're out of
558 function-argument registers. Only global saved registers are
559 counted; the others go on the register stack.
560
561 The frame-pointer is counted too if it is what is eliminated, as we
562 need to balance the offset for it from STARTING_FRAME_OFFSET.
563
564 Also add in the slot for the register stack pointer we save if we
565 have a landing pad.
566
567 Unfortunately, we can't access $0..$14, from unwinder code easily, so
568 store the return address in a frame slot too. FIXME: Only for
569 non-leaf functions. FIXME: Always with a landing pad, because it's
570 hard to know whether we need the other at the time we know we need
571 the offset for one (and have to state it). It's a kludge until we
572 can express the register stack in the EH frame info.
573
574 We have to do alignment here; get_frame_size will not return a
575 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
576
577 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
578 regno <= 255;
579 regno++)
6fb5fa3c 580 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
bcf684c7
HPN
581 || IS_MMIX_EH_RETURN_DATA_REG (regno))
582 fp_sp_offset += 8;
583
584 return fp_sp_offset
585 + (MMIX_CFUN_HAS_LANDING_PAD
586 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
587 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
588}
589
9fb41e15 590static void
d5cc9181 591mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode,
9fb41e15
NF
592 const_tree type, bool named ATTRIBUTE_UNUSED)
593{
d5cc9181 594 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
9fb41e15
NF
595 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
596
597 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
598 || (arg_size > 8
599 && !TARGET_LIBFUNC
600 && !argsp->lib))
601 ? (MMIX_MAX_ARGS_IN_REGS) + 1
602 : argsp->regs + (7 + arg_size) / 8);
603}
bcf684c7 604
9fb41e15
NF
605/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
606
607static rtx
d5cc9181 608mmix_function_arg_1 (const cumulative_args_t argsp_v,
9fb41e15
NF
609 enum machine_mode mode,
610 const_tree type,
611 bool named ATTRIBUTE_UNUSED,
612 bool incoming)
bcf684c7 613{
d5cc9181
JR
614 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
615
bcf684c7
HPN
616 /* Last-argument marker. */
617 if (type == void_type_node)
618 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
619 ? gen_rtx_REG (mode,
620 (incoming
621 ? MMIX_FIRST_INCOMING_ARG_REGNUM
622 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
623 : NULL_RTX;
624
625 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
fe984136 626 && !targetm.calls.must_pass_in_stack (mode, type)
bcf684c7
HPN
627 && (GET_MODE_BITSIZE (mode) <= 64
628 || argsp->lib
629 || TARGET_LIBFUNC))
630 ? gen_rtx_REG (mode,
631 (incoming
632 ? MMIX_FIRST_INCOMING_ARG_REGNUM
633 : MMIX_FIRST_ARG_REGNUM)
634 + argsp->regs)
635 : NULL_RTX;
636}
637
9fb41e15
NF
638/* Return an rtx for a function argument to go in a register, and 0 for
639 one that must go on stack. */
640
641static rtx
d5cc9181 642mmix_function_arg (cumulative_args_t argsp,
9fb41e15
NF
643 enum machine_mode mode,
644 const_tree type,
645 bool named)
646{
647 return mmix_function_arg_1 (argsp, mode, type, named, false);
648}
649
650static rtx
d5cc9181 651mmix_function_incoming_arg (cumulative_args_t argsp,
9fb41e15
NF
652 enum machine_mode mode,
653 const_tree type,
654 bool named)
655{
656 return mmix_function_arg_1 (argsp, mode, type, named, true);
657}
658
bcf684c7
HPN
659/* Returns nonzero for everything that goes by reference, 0 for
660 everything that goes by value. */
661
8cd5a4e0 662static bool
d5cc9181 663mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode,
586de218 664 const_tree type, bool named ATTRIBUTE_UNUSED)
bcf684c7 665{
d5cc9181
JR
666 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
667
fe984136 668 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
bcf684c7 669 necessary. */
af064de5
RH
670 if (targetm.calls.must_pass_in_stack (mode, type))
671 return true;
672
673 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
674 && !TARGET_LIBFUNC
675 && (!argsp || !argsp->lib))
676 return true;
677
678 return false;
bcf684c7
HPN
679}
680
681/* Return nonzero if regno is a register number where a parameter is
682 passed, and 0 otherwise. */
683
684int
4e58524e 685mmix_function_arg_regno_p (int regno, int incoming)
bcf684c7
HPN
686{
687 int first_arg_regnum
688 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
689
690 return regno >= first_arg_regnum
691 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
692}
693
a3ca07e3 694/* Implements TARGET_FUNCTION_VALUE. */
bcf684c7 695
a3ca07e3
AS
696static rtx
697mmix_function_value (const_tree valtype,
698 const_tree func ATTRIBUTE_UNUSED,
699 bool outgoing)
bcf684c7
HPN
700{
701 enum machine_mode mode = TYPE_MODE (valtype);
bcf684c7
HPN
702 enum machine_mode cmode;
703 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
704 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
705 int i;
706 int nregs;
707
a3ca07e3
AS
708 if (!outgoing)
709 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
710
bcf684c7
HPN
711 /* Return values that fit in a register need no special handling.
712 There's no register hole when parameters are passed in global
713 registers. */
714 if (TARGET_ABI_GNU
715 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
716 return
717 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
718
85407c3f
HPN
719 if (COMPLEX_MODE_P (mode))
720 /* A complex type, made up of components. */
721 cmode = TYPE_MODE (TREE_TYPE (valtype));
722 else
723 {
724 /* Of the other larger-than-register modes, we only support
725 scalar mode TImode. (At least, that's the only one that's
726 been rudimentally tested.) Make sure we're alerted for
727 unexpected cases. */
728 if (mode != TImode)
729 sorry ("support for mode %qs", GET_MODE_NAME (mode));
730
731 /* In any case, we will fill registers to the natural size. */
732 cmode = DImode;
733 }
734
bcf684c7
HPN
735 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
736
737 /* We need to take care of the effect of the register hole on return
738 values of large sizes; the last register will appear as the first
739 register, with the rest shifted. (For complex modes, this is just
740 swapped registers.) */
741
742 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
c725bd79 743 internal_error ("too large function value type, needs %d registers,\
bcf684c7
HPN
744 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
745
746 /* FIXME: Maybe we should handle structure values like this too
747 (adjusted for BLKmode), perhaps for both ABI:s. */
748 for (i = 0; i < nregs - 1; i++)
749 vec[i]
750 = gen_rtx_EXPR_LIST (VOIDmode,
751 gen_rtx_REG (cmode, first_val_regnum + i),
752 GEN_INT ((i + 1) * BITS_PER_UNIT));
753
754 vec[nregs - 1]
755 = gen_rtx_EXPR_LIST (VOIDmode,
756 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
a556fd39 757 const0_rtx);
bcf684c7 758
0a0337cd 759 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec));
bcf684c7
HPN
760}
761
a3ca07e3 762/* Implements TARGET_LIBCALL_VALUE. */
4b32269b 763
a3ca07e3
AS
764static rtx
765mmix_libcall_value (enum machine_mode mode,
766 const_rtx fun ATTRIBUTE_UNUSED)
767{
768 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
769}
770
771/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
772
773static bool
774mmix_function_value_regno_p (const unsigned int regno)
4b32269b
HPN
775{
776 return regno == MMIX_RETURN_VALUE_REGNUM;
777}
778
bcf684c7
HPN
779/* EH_RETURN_DATA_REGNO. */
780
781int
4e58524e 782mmix_eh_return_data_regno (int n)
bcf684c7
HPN
783{
784 if (n >= 0 && n < 4)
785 return MMIX_EH_RETURN_DATA_REGNO_START + n;
786
787 return INVALID_REGNUM;
788}
789
790/* EH_RETURN_STACKADJ_RTX. */
791
792rtx
4e58524e 793mmix_eh_return_stackadj_rtx (void)
bcf684c7
HPN
794{
795 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
796}
797
798/* EH_RETURN_HANDLER_RTX. */
799
800rtx
4e58524e 801mmix_eh_return_handler_rtx (void)
bcf684c7 802{
4e58524e 803 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
bcf684c7
HPN
804}
805
806/* ASM_PREFERRED_EH_DATA_FORMAT. */
807
808int
4e58524e
HPN
809mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
810 int global ATTRIBUTE_UNUSED)
bcf684c7
HPN
811{
812 /* This is the default (was at 2001-07-20). Revisit when needed. */
813 return DW_EH_PE_absptr;
814}
815
43aa4e05 816/* Make a note that we've seen the beginning of the prologue. This
957ec0f9 817 matters to whether we'll translate register numbers as calculated by
18dbd950 818 mmix_reorg. */
bcf684c7 819
957ec0f9 820static void
4e58524e
HPN
821mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
822 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
bcf684c7 823{
957ec0f9
HPN
824 cfun->machine->in_prologue = 1;
825}
bcf684c7 826
957ec0f9 827/* Make a note that we've seen the end of the prologue. */
bcf684c7 828
957ec0f9 829static void
4e58524e 830mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
957ec0f9
HPN
831{
832 cfun->machine->in_prologue = 0;
1f2641b6
HPN
833}
834
18dbd950
RS
835/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
836 done here; just virtually by calculating the highest saved stack
837 register number used to modify the register numbers at output time. */
1f2641b6 838
18dbd950 839static void
4e58524e 840mmix_reorg (void)
1f2641b6
HPN
841{
842 int regno;
bcf684c7
HPN
843
844 /* We put the number of the highest saved register-file register in a
845 location convenient for the call-patterns to output. Note that we
846 don't tell dwarf2 about these registers, since it can't restore them
847 anyway. */
1f2641b6 848 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
bcf684c7
HPN
849 regno >= 0;
850 regno--)
6fb5fa3c 851 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
bcf684c7
HPN
852 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
853 break;
854
1f2641b6
HPN
855 /* Regardless of whether they're saved (they might be just read), we
856 mustn't include registers that carry parameters. We could scan the
857 insns to see whether they're actually used (and indeed do other less
858 trivial register usage analysis and transformations), but it seems
859 wasteful to optimize for unused parameter registers. As of
6fb5fa3c 860 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
1f2641b6 861 that might change. */
38173d38 862 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
1f2641b6 863 {
38173d38 864 regno = crtl->args.info.regs - 1;
1f2641b6
HPN
865
866 /* We don't want to let this cause us to go over the limit and make
867 incoming parameter registers be misnumbered and treating the last
868 parameter register and incoming return value register call-saved.
869 Stop things at the unmodified scheme. */
870 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
871 regno = MMIX_RETURN_VALUE_REGNUM - 1;
872 }
873
874 cfun->machine->highest_saved_stack_register = regno;
bcf684c7
HPN
875}
876
877/* TARGET_ASM_FUNCTION_EPILOGUE. */
878
8819cab5 879static void
4e58524e
HPN
880mmix_target_asm_function_epilogue (FILE *stream,
881 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
bcf684c7 882{
957ec0f9
HPN
883 /* Emit an \n for readability of the generated assembly. */
884 fputc ('\n', stream);
885}
bcf684c7 886
eb0424da 887/* TARGET_ASM_OUTPUT_MI_THUNK. */
bcf684c7 888
c590b625 889static void
4e58524e
HPN
890mmix_asm_output_mi_thunk (FILE *stream,
891 tree fndecl ATTRIBUTE_UNUSED,
892 HOST_WIDE_INT delta,
893 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
894 tree func)
957ec0f9 895{
bd5bd7ac
KH
896 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
897 location of structure to return as invisible first argument), you
898 need to tweak this code too. */
957ec0f9 899 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
bcf684c7 900
957ec0f9 901 if (delta >= 0 && delta < 65536)
eb0424da 902 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
957ec0f9 903 else if (delta < 0 && delta >= -255)
eb0424da 904 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
957ec0f9 905 else
66b8c57f 906 {
957ec0f9 907 mmix_output_register_setting (stream, 255, delta, 1);
761c70aa 908 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
66b8c57f
HPN
909 }
910
957ec0f9
HPN
911 fprintf (stream, "\tJMP ");
912 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
913 fprintf (stream, "\n");
914}
bcf684c7 915
957ec0f9 916/* FUNCTION_PROFILER. */
bcf684c7 917
957ec0f9 918void
4e58524e
HPN
919mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
920 int labelno ATTRIBUTE_UNUSED)
957ec0f9
HPN
921{
922 sorry ("function_profiler support for MMIX");
923}
bcf684c7 924
a9ba5098
KH
925/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
926 let's stick to pushing argument registers on the stack. Later, we
927 can parse all arguments in registers, to improve performance. */
bcf684c7 928
a9ba5098 929static void
d5cc9181 930mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
4e58524e
HPN
931 enum machine_mode mode,
932 tree vartype,
933 int *pretend_sizep,
934 int second_time ATTRIBUTE_UNUSED)
bcf684c7 935{
d5cc9181
JR
936 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
937
6c535c69
ZW
938 /* The last named variable has been handled, but
939 args_so_farp has not been advanced for it. */
940 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
941 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
bcf684c7
HPN
942
943 /* We assume that one argument takes up one register here. That should
71cc389b 944 be true until we start messing with multi-reg parameters. */
bcf684c7
HPN
945 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
946 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
947}
948
dbbdb385 949/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
bcf684c7 950
dbbdb385
RH
951static void
952mmix_asm_trampoline_template (FILE *stream)
bcf684c7 953{
3ec1b4cb
HPN
954 /* Read a value into the static-chain register and jump somewhere. The
955 static chain is stored at offset 16, and the function address is
956 stored at offset 24. */
dbbdb385 957
bcf684c7 958 fprintf (stream, "\tGETA $255,1F\n\t");
dbbdb385 959 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
bcf684c7
HPN
960 fprintf (stream, "LDOU $255,$255,8\n\t");
961 fprintf (stream, "GO $255,$255,0\n");
962 fprintf (stream, "1H\tOCTA 0\n\t");
963 fprintf (stream, "OCTA 0\n");
964}
965
dbbdb385 966/* TARGET_TRAMPOLINE_INIT. */
bcf684c7
HPN
967/* Set the static chain and function pointer field in the trampoline.
968 We also SYNCID here to be sure (doesn't matter in the simulator, but
969 some day it will). */
970
dbbdb385
RH
971static void
972mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
973{
974 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
975 rtx mem;
976
977 emit_block_move (m_tramp, assemble_trampoline_template (),
978 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
979
980 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
981 emit_move_insn (mem, static_chain);
982 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
983 emit_move_insn (mem, fnaddr);
984
985 mem = adjust_address (m_tramp, DImode, 0);
986 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
bcf684c7
HPN
987}
988
989/* We must exclude constant addresses that have an increment that is not a
990 multiple of four bytes because of restrictions of the GETA
a824924d 991 instruction, unless TARGET_BASE_ADDRESSES. */
bcf684c7
HPN
992
993int
4e58524e 994mmix_constant_address_p (rtx x)
bcf684c7
HPN
995{
996 RTX_CODE code = GET_CODE (x);
997 int addend = 0;
a824924d
HPN
998 /* When using "base addresses", anything constant goes. */
999 int constant_ok = TARGET_BASE_ADDRESSES != 0;
bcf684c7 1000
bcf684c7
HPN
1001 switch (code)
1002 {
1003 case LABEL_REF:
1004 case SYMBOL_REF:
1005 return 1;
1006
bcf684c7 1007 case HIGH:
a824924d
HPN
1008 /* FIXME: Don't know how to dissect these. Avoid them for now,
1009 except we know they're constants. */
1010 return constant_ok;
bcf684c7
HPN
1011
1012 case CONST_INT:
1013 addend = INTVAL (x);
1014 break;
1015
1016 case CONST_DOUBLE:
1017 if (GET_MODE (x) != VOIDmode)
1018 /* Strange that we got here. FIXME: Check if we do. */
a824924d 1019 return constant_ok;
bcf684c7
HPN
1020 addend = CONST_DOUBLE_LOW (x);
1021 break;
1022
1023 case CONST:
1024 /* Note that expressions with arithmetic on forward references don't
1025 work in mmixal. People using gcc assembly code with mmixal might
1026 need to move arrays and such to before the point of use. */
1027 if (GET_CODE (XEXP (x, 0)) == PLUS)
1028 {
1029 rtx x0 = XEXP (XEXP (x, 0), 0);
1030 rtx x1 = XEXP (XEXP (x, 0), 1);
1031
1032 if ((GET_CODE (x0) == SYMBOL_REF
1033 || GET_CODE (x0) == LABEL_REF)
1034 && (GET_CODE (x1) == CONST_INT
1035 || (GET_CODE (x1) == CONST_DOUBLE
1036 && GET_MODE (x1) == VOIDmode)))
1037 addend = mmix_intval (x1);
1038 else
a824924d 1039 return constant_ok;
bcf684c7
HPN
1040 }
1041 else
a824924d 1042 return constant_ok;
bcf684c7
HPN
1043 break;
1044
1045 default:
1046 return 0;
1047 }
1048
a824924d 1049 return constant_ok || (addend & 3) == 0;
bcf684c7
HPN
1050}
1051
c6c3dba9 1052/* Return 1 if the address is OK, otherwise 0. */
bcf684c7 1053
c6c3dba9
PB
1054bool
1055mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
1056 rtx x,
1057 bool strict_checking)
bcf684c7
HPN
1058{
1059#define MMIX_REG_OK(X) \
1060 ((strict_checking \
1061 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1062 || (reg_renumber[REGNO (X)] > 0 \
1063 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1064 || (!strict_checking \
1065 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1066 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1067 || REGNO (X) == ARG_POINTER_REGNUM)))
1068
1069 /* We only accept:
1070 (mem reg)
1071 (mem (plus reg reg))
a824924d
HPN
1072 (mem (plus reg 0..255)).
1073 unless TARGET_BASE_ADDRESSES, in which case we accept all
1074 (mem constant_address) too. */
bcf684c7
HPN
1075
1076
1077 /* (mem reg) */
1078 if (REG_P (x) && MMIX_REG_OK (x))
1079 return 1;
1080
1081 if (GET_CODE(x) == PLUS)
1082 {
1083 rtx x1 = XEXP (x, 0);
1084 rtx x2 = XEXP (x, 1);
1085
1086 /* Try swapping the order. FIXME: Do we need this? */
1087 if (! REG_P (x1))
1088 {
1089 rtx tem = x1;
1090 x1 = x2;
1091 x2 = tem;
1092 }
1093
a824924d 1094 /* (mem (plus (reg?) (?))) */
bcf684c7 1095 if (!REG_P (x1) || !MMIX_REG_OK (x1))
a824924d 1096 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
bcf684c7 1097
a824924d 1098 /* (mem (plus (reg) (reg?))) */
bcf684c7
HPN
1099 if (REG_P (x2) && MMIX_REG_OK (x2))
1100 return 1;
1101
a824924d 1102 /* (mem (plus (reg) (0..255?))) */
e076319b 1103 if (satisfies_constraint_I (x2))
bcf684c7 1104 return 1;
a824924d
HPN
1105
1106 return 0;
bcf684c7
HPN
1107 }
1108
a824924d 1109 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
bcf684c7
HPN
1110}
1111
1a627b35 1112/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
bcf684c7 1113
1a627b35
RS
1114static bool
1115mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
bcf684c7
HPN
1116{
1117 RTX_CODE code = GET_CODE (x);
1118
1119 /* We must allow any number due to the way the cse passes works; if we
1120 do not allow any number here, general_operand will fail, and insns
1121 will fatally fail recognition instead of "softly". */
1122 if (code == CONST_INT || code == CONST_DOUBLE)
1123 return 1;
1124
1125 return CONSTANT_ADDRESS_P (x);
1126}
1127
1128/* SELECT_CC_MODE. */
1129
1130enum machine_mode
4e58524e 1131mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
bcf684c7
HPN
1132{
1133 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1134 output different compare insns. Note that we do not check the
1135 validity of the comparison here. */
1136
1137 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1138 {
1139 if (op == ORDERED || op == UNORDERED || op == UNGE
1140 || op == UNGT || op == UNLE || op == UNLT)
1141 return CC_FUNmode;
1142
1143 if (op == EQ || op == NE)
1144 return CC_FPEQmode;
1145
1146 return CC_FPmode;
1147 }
1148
1149 if (op == GTU || op == LTU || op == GEU || op == LEU)
1150 return CC_UNSmode;
1151
1152 return CCmode;
1153}
1154
bcf684c7
HPN
1155/* REVERSIBLE_CC_MODE. */
1156
1157int
4e58524e 1158mmix_reversible_cc_mode (enum machine_mode mode)
bcf684c7
HPN
1159{
1160 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
c583c5c3 1161 compares. */
bcf684c7
HPN
1162 return mode != CC_FPmode;
1163}
1164
3c50106f 1165/* TARGET_RTX_COSTS. */
bcf684c7 1166
3c50106f 1167static bool
4e58524e
HPN
1168mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1169 int code ATTRIBUTE_UNUSED,
1170 int outer_code ATTRIBUTE_UNUSED,
68f932c4 1171 int opno ATTRIBUTE_UNUSED,
f40751dd
JH
1172 int *total ATTRIBUTE_UNUSED,
1173 bool speed ATTRIBUTE_UNUSED)
bcf684c7
HPN
1174{
1175 /* For the time being, this is just a stub and we'll accept the
1176 generic calculations, until we can do measurements, at least.
1177 Say we did not modify any calculated costs. */
3c50106f 1178 return false;
bcf684c7
HPN
1179}
1180
6e9ee54c 1181/* TARGET_REGISTER_MOVE_COST.
bcf684c7 1182
6e9ee54c
AS
1183 The special registers can only move to and from general regs, and we
1184 need to check that their constraints match, so say 3 for them. */
1185
1186static int
4e58524e 1187mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
6e9ee54c
AS
1188 reg_class_t from,
1189 reg_class_t to)
bcf684c7
HPN
1190{
1191 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1192}
1193
1194/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1195 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1196 the target. */
1197
1198/* DATA_SECTION_ASM_OP. */
1199
1200const char *
4e58524e 1201mmix_data_section_asm_op (void)
bcf684c7
HPN
1202{
1203 return "\t.data ! mmixal:= 8H LOC 9B";
1204}
1205
fb49053f 1206static void
4e58524e 1207mmix_encode_section_info (tree decl, rtx rtl, int first)
bcf684c7
HPN
1208{
1209 /* Test for an external declaration, and do nothing if it is one. */
1210 if ((TREE_CODE (decl) == VAR_DECL
91312b81
HPN
1211 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1212 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
bcf684c7 1213 ;
4f1aac42 1214 else if (first && DECL_P (decl))
bcf684c7
HPN
1215 {
1216 /* For non-visible declarations, add a "@" prefix, which we skip
1217 when the label is output. If the label does not have this
a824924d 1218 prefix, a ":" is output if -mtoplevel-symbols.
bcf684c7
HPN
1219
1220 Note that this does not work for data that is declared extern and
1221 later defined as static. If there's code in between, that code
a824924d
HPN
1222 will refer to the extern declaration, and vice versa. This just
1223 means that when -mtoplevel-symbols is in use, we can just handle
1224 well-behaved ISO-compliant code. */
bcf684c7 1225
c6a2438a 1226 const char *str = XSTR (XEXP (rtl, 0), 0);
bcf684c7 1227 int len = strlen (str);
5ead67f6 1228 char *newstr = XALLOCAVEC (char, len + 2);
d26d1cea 1229 newstr[0] = '@';
bcf684c7 1230 strcpy (newstr + 1, str);
d26d1cea 1231 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
bcf684c7
HPN
1232 }
1233
a824924d
HPN
1234 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1235 may need different options to reach for different things with GETA.
1236 For now, functions and things we know or have been told are constant. */
1237 if (TREE_CODE (decl) == FUNCTION_DECL
1238 || TREE_CONSTANT (decl)
1239 || (TREE_CODE (decl) == VAR_DECL
1240 && TREE_READONLY (decl)
1241 && !TREE_SIDE_EFFECTS (decl)
1242 && (!DECL_INITIAL (decl)
1243 || TREE_CONSTANT (DECL_INITIAL (decl)))))
c6a2438a 1244 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
bcf684c7
HPN
1245}
1246
772c5265 1247static const char *
4e58524e 1248mmix_strip_name_encoding (const char *name)
bcf684c7
HPN
1249{
1250 for (; (*name == '@' || *name == '*'); name++)
1251 ;
1252
1253 return name;
1254}
1255
1bc7c5b6
ZW
1256/* TARGET_ASM_FILE_START.
1257 We just emit a little comment for the time being. */
bcf684c7 1258
1bc7c5b6 1259static void
4e58524e 1260mmix_file_start (void)
bcf684c7 1261{
1bc7c5b6 1262 default_file_start ();
bcf684c7 1263
1bc7c5b6 1264 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
bcf684c7 1265
ff482c8d 1266 /* Make sure each file starts with the text section. */
d6b5193b 1267 switch_to_section (text_section);
bcf684c7
HPN
1268}
1269
a5fe455b 1270/* TARGET_ASM_FILE_END. */
bcf684c7 1271
a5fe455b 1272static void
4e58524e 1273mmix_file_end (void)
bcf684c7 1274{
ff482c8d 1275 /* Make sure each file ends with the data section. */
d6b5193b 1276 switch_to_section (data_section);
bcf684c7
HPN
1277}
1278
501d087d 1279/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
bcf684c7 1280
501d087d 1281static void
4e58524e 1282mmix_asm_output_source_filename (FILE *stream, const char *name)
bcf684c7
HPN
1283{
1284 fprintf (stream, "# 1 ");
1285 OUTPUT_QUOTED_STRING (stream, name);
1286 fprintf (stream, "\n");
1287}
1288
1289/* OUTPUT_QUOTED_STRING. */
1290
1291void
4e58524e 1292mmix_output_quoted_string (FILE *stream, const char *string, int length)
bcf684c7
HPN
1293{
1294 const char * string_end = string + length;
75540760 1295 static const char *const unwanted_chars = "\"[]\\";
bcf684c7
HPN
1296
1297 /* Output "any character except newline and double quote character". We
1298 play it safe and avoid all control characters too. We also do not
1299 want [] as characters, should input be passed through m4 with [] as
1300 quotes. Further, we avoid "\", because the GAS port handles it as a
1301 quoting character. */
1302 while (string < string_end)
1303 {
1304 if (*string
1305 && (unsigned char) *string < 128
1306 && !ISCNTRL (*string)
1307 && strchr (unwanted_chars, *string) == NULL)
1308 {
1309 fputc ('"', stream);
1310 while (*string
1311 && (unsigned char) *string < 128
1312 && !ISCNTRL (*string)
1313 && strchr (unwanted_chars, *string) == NULL
1314 && string < string_end)
1315 {
1316 fputc (*string, stream);
1317 string++;
1318 }
1319 fputc ('"', stream);
1320 if (string < string_end)
1321 fprintf (stream, ",");
1322 }
1323 if (string < string_end)
1324 {
1325 fprintf (stream, "#%x", *string & 255);
1326 string++;
1327 if (string < string_end)
1328 fprintf (stream, ",");
1329 }
1330 }
1331}
1332
301d03af
RS
1333/* Target hook for assembling integer objects. Use mmix_print_operand
1334 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1335 CONST_DOUBLEs. */
bcf684c7 1336
301d03af 1337static bool
4e58524e 1338mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
bcf684c7 1339{
301d03af
RS
1340 if (aligned_p)
1341 switch (size)
1342 {
a02ac966
HPN
1343 /* We handle a limited number of types of operands in here. But
1344 that's ok, because we can punt to generic functions. We then
7d9b6378
HPN
1345 pretend that aligned data isn't needed, so the usual .<pseudo>
1346 syntax is used (which works for aligned data too). We actually
1347 *must* do that, since we say we don't have simple aligned
1348 pseudos, causing this function to be called. We just try and
1349 keep as much compatibility as possible with mmixal syntax for
1350 normal cases (i.e. without GNU extensions and C only). */
301d03af 1351 case 1:
a02ac966
HPN
1352 if (GET_CODE (x) != CONST_INT)
1353 {
1354 aligned_p = 0;
1355 break;
1356 }
301d03af
RS
1357 fputs ("\tBYTE\t", asm_out_file);
1358 mmix_print_operand (asm_out_file, x, 'B');
1359 fputc ('\n', asm_out_file);
1360 return true;
1361
1362 case 2:
a02ac966
HPN
1363 if (GET_CODE (x) != CONST_INT)
1364 {
1365 aligned_p = 0;
1366 break;
1367 }
301d03af
RS
1368 fputs ("\tWYDE\t", asm_out_file);
1369 mmix_print_operand (asm_out_file, x, 'W');
1370 fputc ('\n', asm_out_file);
1371 return true;
1372
1373 case 4:
b007569d 1374 if (GET_CODE (x) != CONST_INT)
a02ac966
HPN
1375 {
1376 aligned_p = 0;
1377 break;
1378 }
301d03af
RS
1379 fputs ("\tTETRA\t", asm_out_file);
1380 mmix_print_operand (asm_out_file, x, 'L');
1381 fputc ('\n', asm_out_file);
1382 return true;
1383
1384 case 8:
107a4b41
NS
1385 /* We don't get here anymore for CONST_DOUBLE, because DImode
1386 isn't expressed as CONST_DOUBLE, and DFmode is handled
1387 elsewhere. */
1388 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
a02ac966 1389 assemble_integer_with_op ("\tOCTA\t", x);
301d03af
RS
1390 return true;
1391 }
1392 return default_assemble_integer (x, size, aligned_p);
bcf684c7
HPN
1393}
1394
1395/* ASM_OUTPUT_ASCII. */
1396
1397void
4e58524e 1398mmix_asm_output_ascii (FILE *stream, const char *string, int length)
bcf684c7
HPN
1399{
1400 while (length > 0)
1401 {
1402 int chunk_size = length > 60 ? 60 : length;
1403 fprintf (stream, "\tBYTE ");
1404 mmix_output_quoted_string (stream, string, chunk_size);
1405 string += chunk_size;
1406 length -= chunk_size;
1407 fprintf (stream, "\n");
1408 }
1409}
1410
1411/* ASM_OUTPUT_ALIGNED_COMMON. */
1412
1413void
4e58524e
HPN
1414mmix_asm_output_aligned_common (FILE *stream,
1415 const char *name,
1416 int size,
1417 int align)
bcf684c7
HPN
1418{
1419 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1420 express this in a mmixal-compatible way. */
1421 fprintf (stream, "\t.comm\t");
1422 assemble_name (stream, name);
1423 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1424 size, align / BITS_PER_UNIT);
1425}
1426
1427/* ASM_OUTPUT_ALIGNED_LOCAL. */
1428
1429void
4e58524e
HPN
1430mmix_asm_output_aligned_local (FILE *stream,
1431 const char *name,
1432 int size,
1433 int align)
bcf684c7 1434{
d6b5193b 1435 switch_to_section (data_section);
bcf684c7
HPN
1436
1437 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1438 assemble_name (stream, name);
1439 fprintf (stream, "\tLOC @+%d\n", size);
1440}
1441
1442/* ASM_OUTPUT_LABEL. */
1443
1444void
4e58524e 1445mmix_asm_output_label (FILE *stream, const char *name)
bcf684c7
HPN
1446{
1447 assemble_name (stream, name);
1448 fprintf (stream, "\tIS @\n");
1449}
1450
8d6cdc68
HPN
1451/* ASM_OUTPUT_INTERNAL_LABEL. */
1452
1453void
1454mmix_asm_output_internal_label (FILE *stream, const char *name)
1455{
1456 assemble_name_raw (stream, name);
1457 fprintf (stream, "\tIS @\n");
1458}
1459
bcf684c7
HPN
1460/* ASM_DECLARE_REGISTER_GLOBAL. */
1461
1462void
4e58524e
HPN
1463mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1464 tree decl ATTRIBUTE_UNUSED,
1465 int regno ATTRIBUTE_UNUSED,
1466 const char *name ATTRIBUTE_UNUSED)
bcf684c7
HPN
1467{
1468 /* Nothing to do here, but there *will* be, therefore the framework is
1469 here. */
1470}
1471
bcf684c7
HPN
1472/* ASM_WEAKEN_LABEL. */
1473
1474void
4e58524e
HPN
1475mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1476 const char *name ATTRIBUTE_UNUSED)
bcf684c7 1477{
761c70aa 1478 fprintf (stream, "\t.weak ");
bcf684c7 1479 assemble_name (stream, name);
761c70aa 1480 fprintf (stream, " ! mmixal-incompatible\n");
bcf684c7
HPN
1481}
1482
1483/* MAKE_DECL_ONE_ONLY. */
1484
1485void
4e58524e 1486mmix_make_decl_one_only (tree decl)
bcf684c7
HPN
1487{
1488 DECL_WEAK (decl) = 1;
1489}
1490
1491/* ASM_OUTPUT_LABELREF.
1492 Strip GCC's '*' and our own '@'. No order is assumed. */
1493
1494void
4e58524e 1495mmix_asm_output_labelref (FILE *stream, const char *name)
bcf684c7 1496{
91312b81 1497 int is_extern = 1;
bcf684c7
HPN
1498
1499 for (; (*name == '@' || *name == '*'); name++)
1500 if (*name == '@')
91312b81 1501 is_extern = 0;
bcf684c7
HPN
1502
1503 asm_fprintf (stream, "%s%U%s",
1504 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1505 name);
1506}
1507
bcf684c7
HPN
1508/* ASM_OUTPUT_DEF. */
1509
1510void
4e58524e 1511mmix_asm_output_def (FILE *stream, const char *name, const char *value)
bcf684c7
HPN
1512{
1513 assemble_name (stream, name);
1514 fprintf (stream, "\tIS ");
1515 assemble_name (stream, value);
1516 fputc ('\n', stream);
1517}
1518
5057fa13 1519/* TARGET_PRINT_OPERAND. */
bcf684c7 1520
5057fa13 1521static void
4e58524e 1522mmix_print_operand (FILE *stream, rtx x, int code)
bcf684c7
HPN
1523{
1524 /* When we add support for different codes later, we can, when needed,
1525 drop through to the main handler with a modified operand. */
1526 rtx modified_x = x;
1f2641b6 1527 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
bcf684c7
HPN
1528
1529 switch (code)
1530 {
1531 /* Unrelated codes are in alphabetic order. */
1532
91312b81
HPN
1533 case '+':
1534 /* For conditional branches, output "P" for a probable branch. */
1535 if (TARGET_BRANCH_PREDICT)
1536 {
1537 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
e5af9ddd 1538 if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2)
91312b81
HPN
1539 putc ('P', stream);
1540 }
1541 return;
1542
66b8c57f
HPN
1543 case '.':
1544 /* For the %d in POP %d,0. */
1545 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1546 return;
1547
bcf684c7
HPN
1548 case 'B':
1549 if (GET_CODE (x) != CONST_INT)
1550 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1551 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1552 return;
1553
1554 case 'H':
1555 /* Highpart. Must be general register, and not the last one, as
1556 that one cannot be part of a consecutive register pair. */
1f2641b6
HPN
1557 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1558 internal_error ("MMIX Internal: Bad register: %d", regno);
bcf684c7
HPN
1559
1560 /* This is big-endian, so the high-part is the first one. */
1f2641b6 1561 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
bcf684c7
HPN
1562 return;
1563
1564 case 'L':
1565 /* Lowpart. Must be CONST_INT or general register, and not the last
1566 one, as that one cannot be part of a consecutive register pair. */
1567 if (GET_CODE (x) == CONST_INT)
1568 {
1569 fprintf (stream, "#%lx",
1570 (unsigned long) (INTVAL (x)
1571 & ((unsigned int) 0x7fffffff * 2 + 1)));
1572 return;
1573 }
1574
1575 if (GET_CODE (x) == SYMBOL_REF)
1576 {
1577 output_addr_const (stream, x);
1578 return;
1579 }
1580
1f2641b6
HPN
1581 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1582 internal_error ("MMIX Internal: Bad register: %d", regno);
bcf684c7
HPN
1583
1584 /* This is big-endian, so the low-part is + 1. */
1f2641b6 1585 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
bcf684c7
HPN
1586 return;
1587
1588 /* Can't use 'a' because that's a generic modifier for address
1589 output. */
1590 case 'A':
1591 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
a9243bfc 1592 ~(uint64_t)
bcf684c7
HPN
1593 mmix_intval (x));
1594 return;
1595
1596 case 'i':
1597 mmix_output_shiftvalue_op_from_str (stream, "INC",
a9243bfc 1598 (uint64_t)
bcf684c7
HPN
1599 mmix_intval (x));
1600 return;
1601
1602 case 'o':
1603 mmix_output_shiftvalue_op_from_str (stream, "OR",
a9243bfc 1604 (uint64_t)
bcf684c7
HPN
1605 mmix_intval (x));
1606 return;
1607
1608 case 's':
1609 mmix_output_shiftvalue_op_from_str (stream, "SET",
a9243bfc 1610 (uint64_t)
bcf684c7
HPN
1611 mmix_intval (x));
1612 return;
1613
1614 case 'd':
1615 case 'D':
1616 mmix_output_condition (stream, x, (code == 'D'));
1617 return;
1618
1619 case 'e':
1620 /* Output an extra "e" to make fcmpe, fune. */
1621 if (TARGET_FCMP_EPSILON)
1622 fprintf (stream, "e");
1623 return;
1624
1625 case 'm':
1626 /* Output the number minus 1. */
1627 if (GET_CODE (x) != CONST_INT)
1628 {
1629 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1630 x);
1631 }
a9243bfc
RB
1632 fprintf (stream, "%"PRId64,
1633 (int64_t) (mmix_intval (x) - 1));
bcf684c7
HPN
1634 return;
1635
1636 case 'p':
1637 /* Store the number of registers we want to save. This was setup
1638 by the prologue. The actual operand contains the number of
1639 registers to pass, but we don't use it currently. Anyway, we
1640 need to output the number of saved registers here. */
1f2641b6
HPN
1641 fprintf (stream, "%d",
1642 cfun->machine->highest_saved_stack_register + 1);
bcf684c7
HPN
1643 return;
1644
1645 case 'r':
1646 /* Store the register to output a constant to. */
1647 if (! REG_P (x))
c725bd79 1648 fatal_insn ("MMIX Internal: Expected a register, not this", x);
1f2641b6 1649 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
bcf684c7
HPN
1650 return;
1651
1652 case 'I':
1653 /* Output the constant. Note that we use this for floats as well. */
1654 if (GET_CODE (x) != CONST_INT
1655 && (GET_CODE (x) != CONST_DOUBLE
1656 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1657 && GET_MODE (x) != SFmode)))
c725bd79 1658 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
bcf684c7
HPN
1659 mmix_output_register_setting (stream,
1660 mmix_output_destination_register,
1661 mmix_intval (x), 0);
1662 return;
1663
1664 case 'U':
1665 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1666 if (TARGET_ZERO_EXTEND)
1667 putc ('U', stream);
1668 return;
1669
1670 case 'v':
a9243bfc 1671 mmix_output_shifted_value (stream, (int64_t) mmix_intval (x));
bcf684c7
HPN
1672 return;
1673
1674 case 'V':
a9243bfc 1675 mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x));
bcf684c7
HPN
1676 return;
1677
1678 case 'W':
1679 if (GET_CODE (x) != CONST_INT)
1680 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1681 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1682 return;
1683
1684 case 0:
1685 /* Nothing to do. */
1686 break;
1687
1688 default:
1689 /* Presumably there's a missing case above if we get here. */
9e637a26 1690 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
bcf684c7
HPN
1691 }
1692
1693 switch (GET_CODE (modified_x))
1694 {
1695 case REG:
1f2641b6
HPN
1696 regno = REGNO (modified_x);
1697 if (regno >= FIRST_PSEUDO_REGISTER)
1698 internal_error ("MMIX Internal: Bad register: %d", regno);
1699 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
bcf684c7
HPN
1700 return;
1701
1702 case MEM:
1703 output_address (XEXP (modified_x, 0));
1704 return;
1705
1706 case CONST_INT:
1707 /* For -2147483648, mmixal complains that the constant does not fit
1708 in 4 bytes, so let's output it as hex. Take care to handle hosts
1709 where HOST_WIDE_INT is longer than an int.
1710
1711 Print small constants +-255 using decimal. */
1712
1713 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1714 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1715 else
1716 fprintf (stream, "#%x",
1717 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1718 return;
1719
1720 case CONST_DOUBLE:
1721 /* Do somewhat as CONST_INT. */
301d03af 1722 mmix_output_octa (stream, mmix_intval (modified_x), 0);
bcf684c7
HPN
1723 return;
1724
1725 case CONST:
1726 output_addr_const (stream, modified_x);
1727 return;
1728
1729 default:
1730 /* No need to test for all strange things. Let output_addr_const do
1731 it for us. */
1732 if (CONSTANT_P (modified_x)
1733 /* Strangely enough, this is not included in CONSTANT_P.
1734 FIXME: Ask/check about sanity here. */
b64925dc 1735 || LABEL_P (modified_x))
bcf684c7
HPN
1736 {
1737 output_addr_const (stream, modified_x);
1738 return;
1739 }
1740
1741 /* We need the original here. */
1742 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1743 }
1744}
1745
5057fa13 1746/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
bcf684c7 1747
5057fa13
AS
1748static bool
1749mmix_print_operand_punct_valid_p (unsigned char code)
bcf684c7 1750{
91312b81 1751 /* A '+' is used for branch prediction, similar to other ports. */
66b8c57f
HPN
1752 return code == '+'
1753 /* A '.' is used for the %d in the POP %d,0 return insn. */
1754 || code == '.';
bcf684c7
HPN
1755}
1756
5057fa13 1757/* TARGET_PRINT_OPERAND_ADDRESS. */
bcf684c7 1758
5057fa13 1759static void
4e58524e 1760mmix_print_operand_address (FILE *stream, rtx x)
bcf684c7
HPN
1761{
1762 if (REG_P (x))
1763 {
1764 /* I find the generated assembly code harder to read without
1765 the ",0". */
1f2641b6 1766 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
bcf684c7
HPN
1767 return;
1768 }
1769 else if (GET_CODE (x) == PLUS)
1770 {
1771 rtx x1 = XEXP (x, 0);
1772 rtx x2 = XEXP (x, 1);
1773
bcf684c7
HPN
1774 if (REG_P (x1))
1775 {
1f2641b6 1776 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
bcf684c7
HPN
1777
1778 if (REG_P (x2))
1779 {
1f2641b6
HPN
1780 fprintf (stream, "%s",
1781 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
bcf684c7
HPN
1782 return;
1783 }
e076319b 1784 else if (satisfies_constraint_I (x2))
bcf684c7
HPN
1785 {
1786 output_addr_const (stream, x2);
1787 return;
1788 }
1789 }
1790 }
1791
1a627b35 1792 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
a824924d
HPN
1793 {
1794 output_addr_const (stream, x);
1795 return;
1796 }
1797
bcf684c7
HPN
1798 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1799}
1800
1801/* ASM_OUTPUT_REG_PUSH. */
1802
1803void
4e58524e 1804mmix_asm_output_reg_push (FILE *stream, int regno)
bcf684c7
HPN
1805{
1806 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1807 reg_names[MMIX_STACK_POINTER_REGNUM],
1808 reg_names[MMIX_STACK_POINTER_REGNUM],
1f2641b6 1809 reg_names[MMIX_OUTPUT_REGNO (regno)],
bcf684c7
HPN
1810 reg_names[MMIX_STACK_POINTER_REGNUM]);
1811}
1812
1813/* ASM_OUTPUT_REG_POP. */
1814
1815void
4e58524e 1816mmix_asm_output_reg_pop (FILE *stream, int regno)
bcf684c7
HPN
1817{
1818 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
1f2641b6 1819 reg_names[MMIX_OUTPUT_REGNO (regno)],
bcf684c7
HPN
1820 reg_names[MMIX_STACK_POINTER_REGNUM],
1821 reg_names[MMIX_STACK_POINTER_REGNUM]);
1822}
1823
1824/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1825
1826void
4e58524e
HPN
1827mmix_asm_output_addr_diff_elt (FILE *stream,
1828 rtx body ATTRIBUTE_UNUSED,
1829 int value,
1830 int rel)
bcf684c7
HPN
1831{
1832 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1833}
1834
1835/* ASM_OUTPUT_ADDR_VEC_ELT. */
1836
1837void
4e58524e 1838mmix_asm_output_addr_vec_elt (FILE *stream, int value)
bcf684c7
HPN
1839{
1840 fprintf (stream, "\tOCTA L:%d\n", value);
1841}
1842
1843/* ASM_OUTPUT_SKIP. */
1844
1845void
4e58524e 1846mmix_asm_output_skip (FILE *stream, int nbytes)
bcf684c7
HPN
1847{
1848 fprintf (stream, "\tLOC @+%d\n", nbytes);
1849}
1850
1851/* ASM_OUTPUT_ALIGN. */
1852
1853void
4e58524e 1854mmix_asm_output_align (FILE *stream, int power)
bcf684c7
HPN
1855{
1856 /* We need to record the needed alignment of this section in the object,
1857 so we have to output an alignment directive. Use a .p2align (not
1858 .align) so people will never have to wonder about whether the
1859 argument is in number of bytes or the log2 thereof. We do it in
1860 addition to the LOC directive, so nothing needs tweaking when
1861 copy-pasting assembly into mmixal. */
1862 fprintf (stream, "\t.p2align %d\n", power);
1863 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1864}
1865
1866/* DBX_REGISTER_NUMBER. */
1867
4ae50669
JR
1868unsigned
1869mmix_dbx_register_number (unsigned regno)
bcf684c7 1870{
1f2641b6
HPN
1871 /* Adjust the register number to the one it will be output as, dammit.
1872 It'd be nice if we could check the assumption that we're filling a
1873 gap, but every register between the last saved register and parameter
1874 registers might be a valid parameter register. */
1875 regno = MMIX_OUTPUT_REGNO (regno);
bcf684c7
HPN
1876
1877 /* We need to renumber registers to get the number of the return address
1878 register in the range 0..255. It is also space-saving if registers
1879 mentioned in the call-frame information (which uses this function by
1880 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1881 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1882 return regno >= 224 ? (regno - 224) : (regno + 48);
1883}
1884
f5143c46 1885/* End of target macro support functions.
bcf684c7 1886
4e58524e 1887 Now the MMIX port's own functions. First the exported ones. */
bcf684c7 1888
957ec0f9
HPN
1889/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1890 from insn-emit.c. */
1891
1892rtx
4e58524e 1893mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
957ec0f9
HPN
1894{
1895 return get_hard_reg_initial_val (mode, regno);
1896}
1897
a0ab749a 1898/* Nonzero when the function epilogue is simple enough that a single
957ec0f9 1899 "POP %d,0" should be used even within the function. */
66b8c57f
HPN
1900
1901int
4e58524e 1902mmix_use_simple_return (void)
66b8c57f
HPN
1903{
1904 int regno;
1905
1906 int stack_space_to_allocate
38173d38
JH
1907 = (crtl->outgoing_args_size
1908 + crtl->args.pretend_args_size
66b8c57f
HPN
1909 + get_frame_size () + 7) & ~7;
1910
1911 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1912 return 0;
1913
1914 for (regno = 255;
1915 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1916 regno--)
1917 /* Note that we assume that the frame-pointer-register is one of these
1918 registers, in which case we don't count it here. */
1919 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
6fb5fa3c 1920 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
66b8c57f
HPN
1921 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1922 return 0;
1923
1924 if (frame_pointer_needed)
1925 stack_space_to_allocate += 8;
1926
1927 if (MMIX_CFUN_HAS_LANDING_PAD)
1928 stack_space_to_allocate += 16;
1929 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1930 stack_space_to_allocate += 8;
1931
1932 return stack_space_to_allocate == 0;
1933}
1934
957ec0f9
HPN
1935
1936/* Expands the function prologue into RTX. */
1937
1938void
4e58524e 1939mmix_expand_prologue (void)
957ec0f9
HPN
1940{
1941 HOST_WIDE_INT locals_size = get_frame_size ();
1942 int regno;
1943 HOST_WIDE_INT stack_space_to_allocate
38173d38
JH
1944 = (crtl->outgoing_args_size
1945 + crtl->args.pretend_args_size
957ec0f9
HPN
1946 + locals_size + 7) & ~7;
1947 HOST_WIDE_INT offset = -8;
1948
1949 /* Add room needed to save global non-register-stack registers. */
1950 for (regno = 255;
1951 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1952 regno--)
1953 /* Note that we assume that the frame-pointer-register is one of these
1954 registers, in which case we don't count it here. */
1955 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
6fb5fa3c 1956 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
957ec0f9
HPN
1957 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1958 stack_space_to_allocate += 8;
1959
1960 /* If we do have a frame-pointer, add room for it. */
1961 if (frame_pointer_needed)
1962 stack_space_to_allocate += 8;
1963
1964 /* If we have a non-local label, we need to be able to unwind to it, so
1965 store the current register stack pointer. Also store the return
1966 address if we do that. */
1967 if (MMIX_CFUN_HAS_LANDING_PAD)
1968 stack_space_to_allocate += 16;
1969 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1970 /* If we do have a saved return-address slot, add room for it. */
1971 stack_space_to_allocate += 8;
1972
1973 /* Make sure we don't get an unaligned stack. */
1974 if ((stack_space_to_allocate % 8) != 0)
ea40ba9c 1975 internal_error ("stack frame not a multiple of 8 bytes: %wd",
957ec0f9
HPN
1976 stack_space_to_allocate);
1977
38173d38 1978 if (crtl->args.pretend_args_size)
957ec0f9
HPN
1979 {
1980 int mmix_first_vararg_reg
1981 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1982 + (MMIX_MAX_ARGS_IN_REGS
38173d38 1983 - crtl->args.pretend_args_size / 8));
957ec0f9
HPN
1984
1985 for (regno
1986 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1987 regno >= mmix_first_vararg_reg;
1988 regno--)
1989 {
1990 if (offset < 0)
1991 {
1992 HOST_WIDE_INT stack_chunk
1993 = stack_space_to_allocate > (256 - 8)
1994 ? (256 - 8) : stack_space_to_allocate;
1995
1996 mmix_emit_sp_add (-stack_chunk);
1997 offset += stack_chunk;
1998 stack_space_to_allocate -= stack_chunk;
1999 }
2000
2001 /* These registers aren't actually saved (as in "will be
2002 restored"), so don't tell DWARF2 they're saved. */
2003 emit_move_insn (gen_rtx_MEM (DImode,
0a81f074 2004 plus_constant (Pmode, stack_pointer_rtx,
957ec0f9
HPN
2005 offset)),
2006 gen_rtx_REG (DImode, regno));
2007 offset -= 8;
2008 }
2009 }
2010
2011 /* Store the frame-pointer. */
2012
2013 if (frame_pointer_needed)
2014 {
2015 rtx insn;
2016
2017 if (offset < 0)
2018 {
2019 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2020 HOST_WIDE_INT stack_chunk
2021 = stack_space_to_allocate > (256 - 8 - 8)
2022 ? (256 - 8 - 8) : stack_space_to_allocate;
2023
2024 mmix_emit_sp_add (-stack_chunk);
2025
2026 offset += stack_chunk;
2027 stack_space_to_allocate -= stack_chunk;
2028 }
2029
2030 insn = emit_move_insn (gen_rtx_MEM (DImode,
0a81f074
RS
2031 plus_constant (Pmode,
2032 stack_pointer_rtx,
957ec0f9
HPN
2033 offset)),
2034 hard_frame_pointer_rtx);
2035 RTX_FRAME_RELATED_P (insn) = 1;
2036 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2037 stack_pointer_rtx,
2038 GEN_INT (offset + 8)));
2039 RTX_FRAME_RELATED_P (insn) = 1;
2040 offset -= 8;
2041 }
2042
2043 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2044 {
2045 rtx tmpreg, retreg;
2046 rtx insn;
2047
2048 /* Store the return-address, if one is needed on the stack. We
2049 usually store it in a register when needed, but that doesn't work
2050 with -fexceptions. */
2051
2052 if (offset < 0)
2053 {
2054 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2055 HOST_WIDE_INT stack_chunk
2056 = stack_space_to_allocate > (256 - 8 - 8)
2057 ? (256 - 8 - 8) : stack_space_to_allocate;
2058
2059 mmix_emit_sp_add (-stack_chunk);
2060
2061 offset += stack_chunk;
2062 stack_space_to_allocate -= stack_chunk;
2063 }
2064
2065 tmpreg = gen_rtx_REG (DImode, 255);
2066 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2067
2068 /* Dwarf2 code is confused by the use of a temporary register for
2069 storing the return address, so we have to express it as a note,
2070 which we attach to the actual store insn. */
2071 emit_move_insn (tmpreg, retreg);
2072
2073 insn = emit_move_insn (gen_rtx_MEM (DImode,
0a81f074
RS
2074 plus_constant (Pmode,
2075 stack_pointer_rtx,
957ec0f9
HPN
2076 offset)),
2077 tmpreg);
2078 RTX_FRAME_RELATED_P (insn) = 1;
4ae50669
JR
2079 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
2080 gen_rtx_SET (VOIDmode,
2081 gen_rtx_MEM (DImode,
0a81f074
RS
2082 plus_constant (Pmode,
2083 stack_pointer_rtx,
4ae50669
JR
2084 offset)),
2085 retreg));
957ec0f9
HPN
2086
2087 offset -= 8;
2088 }
2089 else if (MMIX_CFUN_HAS_LANDING_PAD)
2090 offset -= 8;
2091
2092 if (MMIX_CFUN_HAS_LANDING_PAD)
2093 {
2094 /* Store the register defining the numbering of local registers, so
2095 we know how long to unwind the register stack. */
2096
2097 if (offset < 0)
2098 {
2099 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2100 HOST_WIDE_INT stack_chunk
2101 = stack_space_to_allocate > (256 - 8 - 8)
2102 ? (256 - 8 - 8) : stack_space_to_allocate;
2103
2104 mmix_emit_sp_add (-stack_chunk);
2105
2106 offset += stack_chunk;
2107 stack_space_to_allocate -= stack_chunk;
2108 }
2109
2110 /* We don't tell dwarf2 about this one; we just have it to unwind
2111 the register stack at landing pads. FIXME: It's a kludge because
2112 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2113 register stack at the moment. Best thing would be to handle it
2114 like stack-pointer offsets. Better: some hook into dwarf2out.c
2115 to produce DW_CFA_expression:s that specify the increment of rO,
2116 and unwind it at eh_return (preferred) or at the landing pad.
2117 Then saves to $0..$G-1 could be specified through that register. */
2118
2119 emit_move_insn (gen_rtx_REG (DImode, 255),
2120 gen_rtx_REG (DImode,
2121 MMIX_rO_REGNUM));
2122 emit_move_insn (gen_rtx_MEM (DImode,
0a81f074
RS
2123 plus_constant (Pmode, stack_pointer_rtx,
2124 offset)),
957ec0f9
HPN
2125 gen_rtx_REG (DImode, 255));
2126 offset -= 8;
2127 }
2128
2129 /* After the return-address and the frame-pointer, we have the local
2130 variables. They're the ones that may have an "unaligned" size. */
2131 offset -= (locals_size + 7) & ~7;
2132
2133 /* Now store all registers that are global, i.e. not saved by the
2134 register file machinery.
2135
2136 It is assumed that the frame-pointer is one of these registers, so it
2137 is explicitly excluded in the count. */
2138
2139 for (regno = 255;
2140 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2141 regno--)
2142 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
6fb5fa3c 2143 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
957ec0f9
HPN
2144 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2145 {
2146 rtx insn;
2147
2148 if (offset < 0)
2149 {
2150 HOST_WIDE_INT stack_chunk
2151 = (stack_space_to_allocate > (256 - offset - 8)
2152 ? (256 - offset - 8) : stack_space_to_allocate);
2153
2154 mmix_emit_sp_add (-stack_chunk);
2155 offset += stack_chunk;
2156 stack_space_to_allocate -= stack_chunk;
2157 }
2158
2159 insn = emit_move_insn (gen_rtx_MEM (DImode,
0a81f074
RS
2160 plus_constant (Pmode,
2161 stack_pointer_rtx,
957ec0f9
HPN
2162 offset)),
2163 gen_rtx_REG (DImode, regno));
2164 RTX_FRAME_RELATED_P (insn) = 1;
2165 offset -= 8;
2166 }
2167
2168 /* Finally, allocate room for outgoing args and local vars if room
2169 wasn't allocated above. */
2170 if (stack_space_to_allocate)
2171 mmix_emit_sp_add (-stack_space_to_allocate);
2172}
2173
2174/* Expands the function epilogue into RTX. */
2175
2176void
4e58524e 2177mmix_expand_epilogue (void)
957ec0f9
HPN
2178{
2179 HOST_WIDE_INT locals_size = get_frame_size ();
2180 int regno;
2181 HOST_WIDE_INT stack_space_to_deallocate
38173d38
JH
2182 = (crtl->outgoing_args_size
2183 + crtl->args.pretend_args_size
957ec0f9
HPN
2184 + locals_size + 7) & ~7;
2185
957ec0f9 2186 /* The first address to access is beyond the outgoing_args area. */
38173d38 2187 HOST_WIDE_INT offset = crtl->outgoing_args_size;
957ec0f9
HPN
2188
2189 /* Add the space for global non-register-stack registers.
2190 It is assumed that the frame-pointer register can be one of these
2191 registers, in which case it is excluded from the count when needed. */
2192 for (regno = 255;
2193 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2194 regno--)
2195 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
6fb5fa3c 2196 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
957ec0f9
HPN
2197 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2198 stack_space_to_deallocate += 8;
2199
2200 /* Add in the space for register stack-pointer. If so, always add room
2201 for the saved PC. */
2202 if (MMIX_CFUN_HAS_LANDING_PAD)
2203 stack_space_to_deallocate += 16;
2204 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2205 /* If we have a saved return-address slot, add it in. */
2206 stack_space_to_deallocate += 8;
2207
2208 /* Add in the frame-pointer. */
2209 if (frame_pointer_needed)
2210 stack_space_to_deallocate += 8;
2211
2212 /* Make sure we don't get an unaligned stack. */
2213 if ((stack_space_to_deallocate % 8) != 0)
ea40ba9c 2214 internal_error ("stack frame not a multiple of octabyte: %wd",
957ec0f9
HPN
2215 stack_space_to_deallocate);
2216
2217 /* We will add back small offsets to the stack pointer as we go.
2218 First, we restore all registers that are global, i.e. not saved by
2219 the register file machinery. */
2220
2221 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2222 regno <= 255;
2223 regno++)
2224 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
6fb5fa3c 2225 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
957ec0f9
HPN
2226 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2227 {
2228 if (offset > 255)
2229 {
2230 mmix_emit_sp_add (offset);
2231 stack_space_to_deallocate -= offset;
2232 offset = 0;
2233 }
2234
2235 emit_move_insn (gen_rtx_REG (DImode, regno),
2236 gen_rtx_MEM (DImode,
0a81f074 2237 plus_constant (Pmode, stack_pointer_rtx,
957ec0f9
HPN
2238 offset)));
2239 offset += 8;
2240 }
2241
2242 /* Here is where the local variables were. As in the prologue, they
2243 might be of an unaligned size. */
2244 offset += (locals_size + 7) & ~7;
2245
957ec0f9
HPN
2246 /* The saved register stack pointer is just below the frame-pointer
2247 register. We don't need to restore it "manually"; the POP
2248 instruction does that. */
2249 if (MMIX_CFUN_HAS_LANDING_PAD)
2250 offset += 16;
2251 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2252 /* The return-address slot is just below the frame-pointer register.
2253 We don't need to restore it because we don't really use it. */
2254 offset += 8;
2255
2256 /* Get back the old frame-pointer-value. */
2257 if (frame_pointer_needed)
2258 {
2259 if (offset > 255)
2260 {
2261 mmix_emit_sp_add (offset);
2262
2263 stack_space_to_deallocate -= offset;
2264 offset = 0;
2265 }
2266
2267 emit_move_insn (hard_frame_pointer_rtx,
2268 gen_rtx_MEM (DImode,
0a81f074 2269 plus_constant (Pmode, stack_pointer_rtx,
957ec0f9
HPN
2270 offset)));
2271 offset += 8;
2272 }
2273
2274 /* We do not need to restore pretended incoming args, just add back
2275 offset to sp. */
2276 if (stack_space_to_deallocate != 0)
2277 mmix_emit_sp_add (stack_space_to_deallocate);
2278
e3b5732b 2279 if (crtl->calls_eh_return)
957ec0f9
HPN
2280 /* Adjust the (normal) stack-pointer to that of the receiver.
2281 FIXME: It would be nice if we could also adjust the register stack
2282 here, but we need to express it through DWARF 2 too. */
2283 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2284 gen_rtx_REG (DImode,
2285 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2286}
2287
bcf684c7
HPN
2288/* Output an optimal sequence for setting a register to a specific
2289 constant. Used in an alternative for const_ints in movdi, and when
2290 using large stack-frame offsets.
2291
2292 Use do_begin_end to say if a line-starting TAB and newline before the
2293 first insn and after the last insn is wanted. */
2294
2295void
4e58524e
HPN
2296mmix_output_register_setting (FILE *stream,
2297 int regno,
a9243bfc 2298 int64_t value,
4e58524e 2299 int do_begin_end)
bcf684c7
HPN
2300{
2301 if (do_begin_end)
2302 fprintf (stream, "\t");
2303
a271e61c 2304 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K))
a9243bfc
RB
2305 fprintf (stream, "NEGU %s,0,%"PRId64, reg_names[regno], -value);
2306 else if (mmix_shiftable_wyde_value ((uint64_t) value))
bcf684c7
HPN
2307 {
2308 /* First, the one-insn cases. */
2309 mmix_output_shiftvalue_op_from_str (stream, "SET",
a9243bfc 2310 (uint64_t)
bcf684c7
HPN
2311 value);
2312 fprintf (stream, " %s,", reg_names[regno]);
a9243bfc 2313 mmix_output_shifted_value (stream, (uint64_t) value);
bcf684c7 2314 }
a9243bfc 2315 else if (mmix_shiftable_wyde_value (-(uint64_t) value))
bcf684c7
HPN
2316 {
2317 /* We do this to get a bit more legible assembly code. The next
2318 alternative is mostly redundant with this. */
2319
2320 mmix_output_shiftvalue_op_from_str (stream, "SET",
a9243bfc 2321 -(uint64_t)
bcf684c7
HPN
2322 value);
2323 fprintf (stream, " %s,", reg_names[regno]);
a9243bfc 2324 mmix_output_shifted_value (stream, -(uint64_t) value);
bcf684c7
HPN
2325 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2326 reg_names[regno]);
2327 }
a9243bfc 2328 else if (mmix_shiftable_wyde_value (~(uint64_t) value))
bcf684c7
HPN
2329 {
2330 /* Slightly more expensive, the two-insn cases. */
2331
2332 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2333 is shiftable, or any other one-insn transformation of the value.
2334 FIXME: Check first if the value is "shiftable" by two loading
2335 with two insns, since it makes more readable assembly code (if
2336 anyone else cares). */
2337
2338 mmix_output_shiftvalue_op_from_str (stream, "SET",
a9243bfc 2339 ~(uint64_t)
bcf684c7
HPN
2340 value);
2341 fprintf (stream, " %s,", reg_names[regno]);
a9243bfc 2342 mmix_output_shifted_value (stream, ~(uint64_t) value);
bcf684c7
HPN
2343 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2344 reg_names[regno]);
2345 }
2346 else
2347 {
2348 /* The generic case. 2..4 insns. */
75540760 2349 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
bcf684c7
HPN
2350 const char *op = "SET";
2351 const char *line_begin = "";
a824924d 2352 int insns = 0;
bcf684c7 2353 int i;
a9243bfc 2354 int64_t tmpvalue = value;
bcf684c7 2355
a824924d
HPN
2356 /* Compute the number of insns needed to output this constant. */
2357 for (i = 0; i < 4 && tmpvalue != 0; i++)
2358 {
2359 if (tmpvalue & 65535)
2360 insns++;
2361 tmpvalue >>= 16;
2362 }
2363 if (TARGET_BASE_ADDRESSES && insns == 3)
2364 {
2365 /* The number three is based on a static observation on
2366 ghostscript-6.52. Two and four are excluded because there
2367 are too many such constants, and each unique constant (maybe
2368 offset by 1..255) were used few times compared to other uses,
2369 e.g. addresses.
2370
2371 We use base-plus-offset addressing to force it into a global
2372 register; we just use a "LDA reg,VALUE", which will cause the
2373 assembler and linker to DTRT (for constants as well as
2374 addresses). */
2375 fprintf (stream, "LDA %s,", reg_names[regno]);
2376 mmix_output_octa (stream, value, 0);
2377 }
2378 else
bcf684c7 2379 {
a824924d
HPN
2380 /* Output pertinent parts of the 4-wyde sequence.
2381 Still more to do if we want this to be optimal, but hey...
2382 Note that the zero case has been handled above. */
2383 for (i = 0; i < 4 && value != 0; i++)
bcf684c7 2384 {
a824924d
HPN
2385 if (value & 65535)
2386 {
2387 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2388 higher_parts[i], reg_names[regno],
2389 (int) (value & 65535));
2390 /* The first one sets the rest of the bits to 0, the next
2391 ones add set bits. */
2392 op = "INC";
2393 line_begin = "\n\t";
2394 }
bcf684c7 2395
a824924d
HPN
2396 value >>= 16;
2397 }
bcf684c7
HPN
2398 }
2399 }
2400
2401 if (do_begin_end)
2402 fprintf (stream, "\n");
2403}
2404
2405/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2406 else return 0. */
2407
2408int
a9243bfc 2409mmix_shiftable_wyde_value (uint64_t value)
bcf684c7
HPN
2410{
2411 /* Shift by 16 bits per group, stop when we've found two groups with
2412 nonzero bits. */
2413 int i;
2414 int has_candidate = 0;
2415
2416 for (i = 0; i < 4; i++)
2417 {
2418 if (value & 65535)
2419 {
2420 if (has_candidate)
2421 return 0;
2422 else
2423 has_candidate = 1;
2424 }
2425
2426 value >>= 16;
2427 }
2428
2429 return 1;
2430}
2431
f90b7a5a
PB
2432/* X and Y are two things to compare using CODE. Return the rtx for
2433 the cc-reg in the proper mode. */
bcf684c7
HPN
2434
2435rtx
4e58524e 2436mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
bcf684c7
HPN
2437{
2438 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
f90b7a5a 2439 return gen_reg_rtx (ccmode);
bcf684c7
HPN
2440}
2441
2442/* Local (static) helper functions. */
2443
957ec0f9 2444static void
4e58524e 2445mmix_emit_sp_add (HOST_WIDE_INT offset)
957ec0f9
HPN
2446{
2447 rtx insn;
2448
2449 if (offset < 0)
2450 {
2451 /* Negative stack-pointer adjustments are allocations and appear in
2452 the prologue only. We mark them as frame-related so unwind and
2453 debug info is properly emitted for them. */
2454 if (offset > -255)
2455 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2456 stack_pointer_rtx,
2457 GEN_INT (offset)));
2458 else
2459 {
2460 rtx tmpr = gen_rtx_REG (DImode, 255);
2461 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2462 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2463 stack_pointer_rtx, tmpr));
2464 }
2465 RTX_FRAME_RELATED_P (insn) = 1;
2466 }
2467 else
2468 {
2469 /* Positive adjustments are in the epilogue only. Don't mark them
2470 as "frame-related" for unwind info. */
e076319b 2471 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
957ec0f9
HPN
2472 emit_insn (gen_adddi3 (stack_pointer_rtx,
2473 stack_pointer_rtx,
2474 GEN_INT (offset)));
2475 else
2476 {
2477 rtx tmpr = gen_rtx_REG (DImode, 255);
2478 emit_move_insn (tmpr, GEN_INT (offset));
2479 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2480 stack_pointer_rtx, tmpr));
2481 }
2482 }
2483}
2484
bcf684c7 2485/* Print operator suitable for doing something with a shiftable
e03f5d43 2486 wyde. The type of operator is passed as an asm output modifier. */
bcf684c7
HPN
2487
2488static void
4e58524e
HPN
2489mmix_output_shiftvalue_op_from_str (FILE *stream,
2490 const char *mainop,
a9243bfc 2491 int64_t value)
bcf684c7 2492{
75540760 2493 static const char *const op_part[] = {"L", "ML", "MH", "H"};
bcf684c7
HPN
2494 int i;
2495
2496 if (! mmix_shiftable_wyde_value (value))
2497 {
2498 char s[sizeof ("0xffffffffffffffff")];
a9243bfc 2499 sprintf (s, "%#"PRIx64, value);
bcf684c7
HPN
2500 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2501 }
2502
2503 for (i = 0; i < 4; i++)
2504 {
2505 /* We know we're through when we find one-bits in the low
2506 16 bits. */
2507 if (value & 0xffff)
2508 {
2509 fprintf (stream, "%s%s", mainop, op_part[i]);
2510 return;
2511 }
2512 value >>= 16;
2513 }
2514
2515 /* No bits set? Then it must have been zero. */
2516 fprintf (stream, "%sL", mainop);
2517}
2518
2519/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2520
2521static void
a9243bfc 2522mmix_output_octa (FILE *stream, int64_t value, int do_begin_end)
bcf684c7 2523{
bcf684c7
HPN
2524 if (do_begin_end)
2525 fprintf (stream, "\tOCTA ");
2526
bcf684c7
HPN
2527 /* Provide a few alternative output formats depending on the number, to
2528 improve legibility of assembler output. */
a9243bfc
RB
2529 if ((value < (int64_t) 0 && value > (int64_t) -10000)
2530 || (value >= (int64_t) 0 && value <= (int64_t) 16384))
bcf684c7 2531 fprintf (stream, "%d", (int) value);
a9243bfc
RB
2532 else if (value > (int64_t) 0
2533 && value < ((int64_t) 1 << 31) * 2)
bcf684c7 2534 fprintf (stream, "#%x", (unsigned int) value);
a9243bfc 2535 else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t))
63f2a6a5
HPN
2536 /* We need to avoid the not-so-universal "0x" prefix; we need the
2537 pure hex-digits together with the mmixal "#" hex prefix. */
2538 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE,
2539 (HOST_WIDE_INT) value);
2540 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */
a9243bfc 2541 fprintf (stream, "%"PRIu64, value);
bcf684c7
HPN
2542
2543 if (do_begin_end)
2544 fprintf (stream, "\n");
2545}
2546
2547/* Print the presumed shiftable wyde argument shifted into place (to
2548 be output with an operand). */
2549
2550static void
a9243bfc 2551mmix_output_shifted_value (FILE *stream, int64_t value)
bcf684c7
HPN
2552{
2553 int i;
2554
2555 if (! mmix_shiftable_wyde_value (value))
2556 {
2557 char s[16+2+1];
a9243bfc 2558 sprintf (s, "%#"PRIx64, value);
bcf684c7
HPN
2559 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2560 }
2561
2562 for (i = 0; i < 4; i++)
bcf684c7 2563 {
4e58524e
HPN
2564 /* We know we're through when we find one-bits in the low 16 bits. */
2565 if (value & 0xffff)
2566 {
2567 fprintf (stream, "#%x", (int) (value & 0xffff));
2568 return;
2569 }
bcf684c7
HPN
2570
2571 value >>= 16;
2572 }
2573
2574 /* No bits set? Then it must have been zero. */
2575 fprintf (stream, "0");
2576}
2577
2578/* Output an MMIX condition name corresponding to an operator
2579 and operands:
2580 (comparison_operator [(comparison_operator ...) (const_int 0)])
2581 which means we have to look at *two* operators.
2582
2583 The argument "reversed" refers to reversal of the condition (not the
2584 same as swapping the arguments). */
2585
2586static void
5057fa13 2587mmix_output_condition (FILE *stream, const_rtx x, int reversed)
bcf684c7
HPN
2588{
2589 struct cc_conv
2590 {
2591 RTX_CODE cc;
2592
2593 /* The normal output cc-code. */
2594 const char *const normal;
2595
2596 /* The reversed cc-code, or NULL if invalid. */
2597 const char *const reversed;
2598 };
2599
2600 struct cc_type_conv
2601 {
2602 enum machine_mode cc_mode;
2603
f822d252 2604 /* Terminated with {UNKNOWN, NULL, NULL} */
bcf684c7
HPN
2605 const struct cc_conv *const convs;
2606 };
2607
2608#undef CCEND
f822d252 2609#define CCEND {UNKNOWN, NULL, NULL}
bcf684c7
HPN
2610
2611 static const struct cc_conv cc_fun_convs[]
2612 = {{ORDERED, "Z", "P"},
2613 {UNORDERED, "P", "Z"},
2614 CCEND};
2615 static const struct cc_conv cc_fp_convs[]
2616 = {{GT, "P", NULL},
2617 {LT, "N", NULL},
2618 CCEND};
2619 static const struct cc_conv cc_fpeq_convs[]
2620 = {{NE, "Z", "P"},
2621 {EQ, "P", "Z"},
2622 CCEND};
2623 static const struct cc_conv cc_uns_convs[]
2624 = {{GEU, "NN", "N"},
2625 {GTU, "P", "NP"},
2626 {LEU, "NP", "P"},
2627 {LTU, "N", "NN"},
2628 CCEND};
2629 static const struct cc_conv cc_signed_convs[]
2630 = {{NE, "NZ", "Z"},
2631 {EQ, "Z", "NZ"},
2632 {GE, "NN", "N"},
2633 {GT, "P", "NP"},
2634 {LE, "NP", "P"},
2635 {LT, "N", "NN"},
2636 CCEND};
2637 static const struct cc_conv cc_di_convs[]
2638 = {{NE, "NZ", "Z"},
2639 {EQ, "Z", "NZ"},
2640 {GE, "NN", "N"},
2641 {GT, "P", "NP"},
2642 {LE, "NP", "P"},
2643 {LT, "N", "NN"},
2644 {GTU, "NZ", "Z"},
2645 {LEU, "Z", "NZ"},
2646 CCEND};
2647#undef CCEND
2648
2649 static const struct cc_type_conv cc_convs[]
2650 = {{CC_FUNmode, cc_fun_convs},
2651 {CC_FPmode, cc_fp_convs},
2652 {CC_FPEQmode, cc_fpeq_convs},
2653 {CC_UNSmode, cc_uns_convs},
2654 {CCmode, cc_signed_convs},
2655 {DImode, cc_di_convs}};
2656
ca7558fc 2657 size_t i;
bcf684c7
HPN
2658 int j;
2659
2660 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2661 RTX_CODE cc = GET_CODE (x);
2662
ca7558fc 2663 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
bcf684c7
HPN
2664 {
2665 if (mode == cc_convs[i].cc_mode)
2666 {
f822d252 2667 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
bcf684c7
HPN
2668 if (cc == cc_convs[i].convs[j].cc)
2669 {
2670 const char *mmix_cc
2671 = (reversed ? cc_convs[i].convs[j].reversed
2672 : cc_convs[i].convs[j].normal);
2673
2674 if (mmix_cc == NULL)
2675 fatal_insn ("MMIX Internal: Trying to output invalidly\
2676 reversed condition:", x);
2677
2678 fprintf (stream, "%s", mmix_cc);
2679 return;
2680 }
2681
2682 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2683 }
2684 }
2685
2686 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2687}
2688
2689/* Return the bit-value for a const_int or const_double. */
2690
a9243bfc 2691int64_t
5057fa13 2692mmix_intval (const_rtx x)
bcf684c7 2693{
a9243bfc 2694 uint64_t retval;
bcf684c7
HPN
2695
2696 if (GET_CODE (x) == CONST_INT)
2697 return INTVAL (x);
2698
2699 /* We make a little song and dance because converting to long long in
2700 gcc-2.7.2 is broken. I still want people to be able to use it for
2701 cross-compilation to MMIX. */
2702 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
a9243bfc 2703 return CONST_DOUBLE_HIGH (x);
bcf684c7
HPN
2704
2705 if (GET_CODE (x) == CONST_DOUBLE)
2706 {
2707 REAL_VALUE_TYPE value;
2708
2709 /* FIXME: This macro is not in the manual but should be. */
2710 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2711
2712 if (GET_MODE (x) == DFmode)
2713 {
2714 long bits[2];
1b849cce 2715
bcf684c7
HPN
2716 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2717
e8299ec2
HPN
2718 /* The double cast is necessary to avoid getting the long
2719 sign-extended to unsigned long long(!) when they're of
2720 different size (usually 32-bit hosts). */
2721 return
a9243bfc
RB
2722 ((uint64_t) (unsigned long) bits[0]
2723 << (uint64_t) 32U)
2724 | (uint64_t) (unsigned long) bits[1];
bcf684c7
HPN
2725 }
2726 else if (GET_MODE (x) == SFmode)
2727 {
2728 long bits;
2729 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2730
2731 return (unsigned long) bits;
2732 }
2733 }
2734
2735 fatal_insn ("MMIX Internal: This is not a constant:", x);
2736}
2737
cde0f3fd
PB
2738/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2739
2740enum machine_mode
2741mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
2742 enum machine_mode mode,
2743 int *punsignedp ATTRIBUTE_UNUSED,
2744 const_tree fntype ATTRIBUTE_UNUSED,
2745 int for_return)
2746{
2747 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2748 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
666e3ceb 2749 if (for_return == 1)
cde0f3fd
PB
2750 return mode;
2751
2752 /* Promotion of modes currently generates slow code, extending before
2753 operation, so we do it only for arguments. */
2754 if (GET_MODE_CLASS (mode) == MODE_INT
2755 && GET_MODE_SIZE (mode) < 8)
2756 return DImode;
2757 else
2758 return mode;
2759}
a9ba5098
KH
2760/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2761
2762static rtx
2763mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2764 int incoming ATTRIBUTE_UNUSED)
2765{
2766 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2767}
2768
b52b1749
AS
2769/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2770
2771 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2772 of it; we can deduce the value. */
2773
2774bool
2775mmix_frame_pointer_required (void)
2776{
2777 return (cfun->has_nonlocal_label);
2778}
2779
bcf684c7
HPN
2780/*
2781 * Local variables:
2782 * eval: (c-set-style "gnu")
2783 * indent-tabs-mode: t
2784 * End:
2785 */