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68cbb7e3 | 1 | /* Definitions of target machine for GNU compiler, for MMIX. |
d353bf18 | 2 | Copyright (C) 2000-2015 Free Software Foundation, Inc. |
68cbb7e3 | 3 | Contributed by Hans-Peter Nilsson (hp@bitrange.com) |
4 | ||
581084df | 5 | This file is part of GCC. |
68cbb7e3 | 6 | |
581084df | 7 | GCC is free software; you can redistribute it and/or modify |
68cbb7e3 | 8 | it under the terms of the GNU General Public License as published by |
038d1e19 | 9 | the Free Software Foundation; either version 3, or (at your option) |
68cbb7e3 | 10 | any later version. |
11 | ||
581084df | 12 | GCC is distributed in the hope that it will be useful, |
68cbb7e3 | 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
038d1e19 | 18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
68cbb7e3 | 20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
805e22b2 | 23 | #include "coretypes.h" |
24 | #include "tm.h" | |
68cbb7e3 | 25 | #include "rtl.h" |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
68cbb7e3 | 28 | #include "insn-config.h" |
29 | #include "output.h" | |
94ea8568 | 30 | #include "predict.h" |
94ea8568 | 31 | #include "function.h" |
32 | #include "dominance.h" | |
33 | #include "cfg.h" | |
34 | #include "cfgrtl.h" | |
35 | #include "cfganal.h" | |
36 | #include "lcm.h" | |
37 | #include "cfgbuild.h" | |
38 | #include "cfgcleanup.h" | |
1998fe39 | 39 | #include "basic-block.h" |
68cbb7e3 | 40 | #include "flags.h" |
b20a8bb4 | 41 | #include "symtab.h" |
68cbb7e3 | 42 | #include "tree.h" |
9ed99284 | 43 | #include "varasm.h" |
44 | #include "stor-layout.h" | |
45 | #include "calls.h" | |
d53441c8 | 46 | #include "alias.h" |
47 | #include "expmed.h" | |
48 | #include "dojump.h" | |
49 | #include "explow.h" | |
50 | #include "emit-rtl.h" | |
51 | #include "stmt.h" | |
68cbb7e3 | 52 | #include "expr.h" |
0b205f4c | 53 | #include "diagnostic-core.h" |
68cbb7e3 | 54 | #include "recog.h" |
bde36f4a | 55 | #include "dwarf2.h" |
68cbb7e3 | 56 | #include "debug.h" |
57 | #include "tm_p.h" | |
68cbb7e3 | 58 | #include "target.h" |
c0dae7df | 59 | #include "df.h" |
f105c84e | 60 | #include "tm-constrs.h" |
f7715905 | 61 | #include "builtins.h" |
68cbb7e3 | 62 | |
0c71fb4f | 63 | /* This file should be included last. */ |
4b498588 | 64 | #include "target-def.h" |
65 | ||
68cbb7e3 | 66 | /* First some local helper definitions. */ |
67 | #define MMIX_FIRST_GLOBAL_REGNUM 32 | |
68 | ||
69 | /* We'd need a current_function_has_landing_pad. It's marked as such when | |
70 | a nonlocal_goto_receiver is expanded. Not just a C++ thing, but | |
71 | mostly. */ | |
72 | #define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0) | |
73 | ||
74 | /* We have no means to tell DWARF 2 about the register stack, so we need | |
75 | to store the return address on the stack if an exception can get into | |
d3310704 | 76 | this function. FIXME: Narrow condition. Before any whole-function |
3072d30e | 77 | analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date |
d3310704 | 78 | after reload_completed; it may contain incorrect information some time |
79 | before that. Within a RTL sequence (after a call to start_sequence, | |
80 | such as in RTL expanders), leaf_function_p doesn't see all insns | |
81 | (perhaps any insn). But regs_ever_live is up-to-date when | |
82 | leaf_function_p () isn't, so we "or" them together to get accurate | |
83 | information. FIXME: Some tweak to leaf_function_p might be | |
f024691d | 84 | preferable. */ |
d3310704 | 85 | #define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \ |
86 | (flag_exceptions \ | |
3072d30e | 87 | && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \ |
d3310704 | 88 | || !leaf_function_p ())) |
68cbb7e3 | 89 | |
90 | #define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \ | |
18d50ae6 | 91 | (crtl->calls_eh_return \ |
68cbb7e3 | 92 | && (EH_RETURN_DATA_REGNO (0) == REGNO \ |
93 | || EH_RETURN_DATA_REGNO (1) == REGNO \ | |
94 | || EH_RETURN_DATA_REGNO (2) == REGNO \ | |
95 | || EH_RETURN_DATA_REGNO (3) == REGNO)) | |
96 | ||
d68ffc6f | 97 | /* For the default ABI, we rename registers at output-time to fill the gap |
98 | between the (statically partitioned) saved registers and call-clobbered | |
99 | registers. In effect this makes unused call-saved registers to be used | |
100 | as call-clobbered registers. The benefit comes from keeping the number | |
101 | of local registers (value of rL) low, since there's a cost of | |
d3310704 | 102 | increasing rL and clearing unused (unset) registers with lower numbers. |
103 | Don't translate while outputting the prologue. */ | |
d68ffc6f | 104 | #define MMIX_OUTPUT_REGNO(N) \ |
105 | (TARGET_ABI_GNU \ | |
0b123c47 | 106 | || (int) (N) < MMIX_RETURN_VALUE_REGNUM \ |
107 | || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \ | |
d3310704 | 108 | || cfun == NULL \ |
109 | || cfun->machine == NULL \ | |
110 | || cfun->machine->in_prologue \ | |
d68ffc6f | 111 | ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \ |
112 | + cfun->machine->highest_saved_stack_register + 1)) | |
113 | ||
0b123c47 | 114 | /* The %d in "POP %d,0". */ |
115 | #define MMIX_POP_ARGUMENT() \ | |
116 | ((! TARGET_ABI_GNU \ | |
abe32cce | 117 | && crtl->return_rtx != NULL \ |
18d50ae6 | 118 | && ! cfun->returns_struct) \ |
abe32cce | 119 | ? (GET_CODE (crtl->return_rtx) == PARALLEL \ |
120 | ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \ | |
0b123c47 | 121 | : 0) |
122 | ||
68cbb7e3 | 123 | /* The canonical saved comparison operands for non-cc0 machines, set in |
124 | the compare expander. */ | |
125 | rtx mmix_compare_op0; | |
126 | rtx mmix_compare_op1; | |
127 | ||
68cbb7e3 | 128 | /* Declarations of locals. */ |
129 | ||
68cbb7e3 | 130 | /* Intermediate for insn output. */ |
131 | static int mmix_output_destination_register; | |
132 | ||
4c834714 | 133 | static void mmix_option_override (void); |
40fe393f | 134 | static void mmix_asm_output_source_filename (FILE *, const char *); |
68cbb7e3 | 135 | static void mmix_output_shiftvalue_op_from_str |
3a4303e7 | 136 | (FILE *, const char *, int64_t); |
137 | static void mmix_output_shifted_value (FILE *, int64_t); | |
7a7fb407 | 138 | static void mmix_output_condition (FILE *, const_rtx, int); |
3a4303e7 | 139 | static void mmix_output_octa (FILE *, int64_t, int); |
7585fcd5 | 140 | static bool mmix_assemble_integer (rtx, unsigned int, int); |
141 | static struct machine_function *mmix_init_machine_status (void); | |
142 | static void mmix_encode_section_info (tree, rtx, int); | |
143 | static const char *mmix_strip_name_encoding (const char *); | |
144 | static void mmix_emit_sp_add (HOST_WIDE_INT offset); | |
145 | static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); | |
146 | static void mmix_target_asm_function_end_prologue (FILE *); | |
147 | static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); | |
27925877 | 148 | static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); |
149 | static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); | |
3754d046 | 150 | static bool mmix_legitimate_address_p (machine_mode, rtx, bool); |
151 | static bool mmix_legitimate_constant_p (machine_mode, rtx); | |
7585fcd5 | 152 | static void mmix_reorg (void); |
6988553d | 153 | static void mmix_asm_output_mi_thunk |
7585fcd5 | 154 | (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); |
9e4a734a | 155 | static void mmix_setup_incoming_varargs |
3754d046 | 156 | (cumulative_args_t, machine_mode, tree, int *, int); |
7585fcd5 | 157 | static void mmix_file_start (void); |
158 | static void mmix_file_end (void); | |
20d892d1 | 159 | static bool mmix_rtx_costs (rtx, int, int, int, int *, bool); |
3754d046 | 160 | static int mmix_register_move_cost (machine_mode, |
f7e13ca6 | 161 | reg_class_t, reg_class_t); |
9e4a734a | 162 | static rtx mmix_struct_value_rtx (tree, int); |
3754d046 | 163 | static machine_mode mmix_promote_function_mode (const_tree, |
164 | machine_mode, | |
3b2411a8 | 165 | int *, const_tree, int); |
3754d046 | 166 | static void mmix_function_arg_advance (cumulative_args_t, machine_mode, |
5d246ebf | 167 | const_tree, bool); |
3754d046 | 168 | static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode, |
5d246ebf | 169 | const_tree, bool, bool); |
3754d046 | 170 | static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode, |
5d246ebf | 171 | const_tree, bool); |
3754d046 | 172 | static rtx mmix_function_arg (cumulative_args_t, machine_mode, |
5d246ebf | 173 | const_tree, bool); |
b600778c | 174 | static rtx mmix_function_value (const_tree, const_tree, bool); |
3754d046 | 175 | static rtx mmix_libcall_value (machine_mode, const_rtx); |
b600778c | 176 | static bool mmix_function_value_regno_p (const unsigned int); |
39cba157 | 177 | static bool mmix_pass_by_reference (cumulative_args_t, |
3754d046 | 178 | machine_mode, const_tree, bool); |
5a1c68c3 | 179 | static bool mmix_frame_pointer_required (void); |
604d844a | 180 | static void mmix_asm_trampoline_template (FILE *); |
181 | static void mmix_trampoline_init (rtx, tree, rtx); | |
7a7fb407 | 182 | static void mmix_print_operand (FILE *, rtx, int); |
183 | static void mmix_print_operand_address (FILE *, rtx); | |
184 | static bool mmix_print_operand_punct_valid_p (unsigned char); | |
b2d7ede1 | 185 | static void mmix_conditional_register_usage (void); |
68cbb7e3 | 186 | |
187 | /* Target structure macros. Listed by node. See `Using and Porting GCC' | |
188 | for a general description. */ | |
189 | ||
190 | /* Node: Function Entry */ | |
191 | ||
58356836 | 192 | #undef TARGET_ASM_BYTE_OP |
193 | #define TARGET_ASM_BYTE_OP NULL | |
194 | #undef TARGET_ASM_ALIGNED_HI_OP | |
195 | #define TARGET_ASM_ALIGNED_HI_OP NULL | |
196 | #undef TARGET_ASM_ALIGNED_SI_OP | |
197 | #define TARGET_ASM_ALIGNED_SI_OP NULL | |
198 | #undef TARGET_ASM_ALIGNED_DI_OP | |
199 | #define TARGET_ASM_ALIGNED_DI_OP NULL | |
200 | #undef TARGET_ASM_INTEGER | |
201 | #define TARGET_ASM_INTEGER mmix_assemble_integer | |
202 | ||
68cbb7e3 | 203 | #undef TARGET_ASM_FUNCTION_PROLOGUE |
204 | #define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue | |
205 | ||
d3310704 | 206 | #undef TARGET_ASM_FUNCTION_END_PROLOGUE |
207 | #define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue | |
208 | ||
68cbb7e3 | 209 | #undef TARGET_ASM_FUNCTION_EPILOGUE |
210 | #define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue | |
211 | ||
7a7fb407 | 212 | #undef TARGET_PRINT_OPERAND |
213 | #define TARGET_PRINT_OPERAND mmix_print_operand | |
214 | #undef TARGET_PRINT_OPERAND_ADDRESS | |
215 | #define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address | |
216 | #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P | |
217 | #define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p | |
218 | ||
7811991d | 219 | #undef TARGET_ENCODE_SECTION_INFO |
220 | #define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info | |
7b4a38a6 | 221 | #undef TARGET_STRIP_NAME_ENCODING |
222 | #define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding | |
7811991d | 223 | |
6988553d | 224 | #undef TARGET_ASM_OUTPUT_MI_THUNK |
225 | #define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk | |
eb344f43 | 226 | #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK |
227 | #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall | |
92c473b8 | 228 | #undef TARGET_ASM_FILE_START |
229 | #define TARGET_ASM_FILE_START mmix_file_start | |
230 | #undef TARGET_ASM_FILE_START_FILE_DIRECTIVE | |
231 | #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true | |
f6940372 | 232 | #undef TARGET_ASM_FILE_END |
233 | #define TARGET_ASM_FILE_END mmix_file_end | |
40fe393f | 234 | #undef TARGET_ASM_OUTPUT_SOURCE_FILENAME |
235 | #define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename | |
6988553d | 236 | |
b2d7ede1 | 237 | #undef TARGET_CONDITIONAL_REGISTER_USAGE |
238 | #define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage | |
239 | ||
fab7adbf | 240 | #undef TARGET_RTX_COSTS |
241 | #define TARGET_RTX_COSTS mmix_rtx_costs | |
ec0457a8 | 242 | #undef TARGET_ADDRESS_COST |
d9c5e5f4 | 243 | #define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0 |
fab7adbf | 244 | |
f7e13ca6 | 245 | #undef TARGET_REGISTER_MOVE_COST |
246 | #define TARGET_REGISTER_MOVE_COST mmix_register_move_cost | |
247 | ||
2efea8c0 | 248 | #undef TARGET_MACHINE_DEPENDENT_REORG |
249 | #define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg | |
250 | ||
3b2411a8 | 251 | #undef TARGET_PROMOTE_FUNCTION_MODE |
252 | #define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode | |
253 | ||
b600778c | 254 | #undef TARGET_FUNCTION_VALUE |
255 | #define TARGET_FUNCTION_VALUE mmix_function_value | |
256 | #undef TARGET_LIBCALL_VALUE | |
257 | #define TARGET_LIBCALL_VALUE mmix_libcall_value | |
258 | #undef TARGET_FUNCTION_VALUE_REGNO_P | |
259 | #define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p | |
9e4a734a | 260 | |
5d246ebf | 261 | #undef TARGET_FUNCTION_ARG |
262 | #define TARGET_FUNCTION_ARG mmix_function_arg | |
263 | #undef TARGET_FUNCTION_INCOMING_ARG | |
264 | #define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg | |
265 | #undef TARGET_FUNCTION_ARG_ADVANCE | |
266 | #define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance | |
9e4a734a | 267 | #undef TARGET_STRUCT_VALUE_RTX |
268 | #define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx | |
9e4a734a | 269 | #undef TARGET_SETUP_INCOMING_VARARGS |
270 | #define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs | |
b981d932 | 271 | #undef TARGET_PASS_BY_REFERENCE |
272 | #define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference | |
13f08ee7 | 273 | #undef TARGET_CALLEE_COPIES |
274 | #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true | |
9e4a734a | 275 | |
27925877 | 276 | #undef TARGET_PREFERRED_RELOAD_CLASS |
277 | #define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class | |
278 | #undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS | |
f7b18294 | 279 | #define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class |
27925877 | 280 | |
fd50b071 | 281 | #undef TARGET_LEGITIMATE_ADDRESS_P |
282 | #define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p | |
ca316360 | 283 | #undef TARGET_LEGITIMATE_CONSTANT_P |
284 | #define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p | |
fd50b071 | 285 | |
5a1c68c3 | 286 | #undef TARGET_FRAME_POINTER_REQUIRED |
287 | #define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required | |
288 | ||
604d844a | 289 | #undef TARGET_ASM_TRAMPOLINE_TEMPLATE |
290 | #define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template | |
291 | #undef TARGET_TRAMPOLINE_INIT | |
292 | #define TARGET_TRAMPOLINE_INIT mmix_trampoline_init | |
293 | ||
4c834714 | 294 | #undef TARGET_OPTION_OVERRIDE |
295 | #define TARGET_OPTION_OVERRIDE mmix_option_override | |
296 | ||
68cbb7e3 | 297 | struct gcc_target targetm = TARGET_INITIALIZER; |
298 | ||
299 | /* Functions that are expansions for target macros. | |
300 | See Target Macros in `Using and Porting GCC'. */ | |
301 | ||
4c834714 | 302 | /* TARGET_OPTION_OVERRIDE. */ |
68cbb7e3 | 303 | |
4c834714 | 304 | static void |
305 | mmix_option_override (void) | |
68cbb7e3 | 306 | { |
307 | /* Should we err or should we warn? Hmm. At least we must neutralize | |
308 | it. For example the wrong kind of case-tables will be generated with | |
309 | PIC; we use absolute address items for mmixal compatibility. FIXME: | |
310 | They could be relative if we just elide them to after all pertinent | |
311 | labels. */ | |
312 | if (flag_pic) | |
313 | { | |
c3ceba8e | 314 | warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic"); |
68cbb7e3 | 315 | flag_pic = 0; |
316 | } | |
68cbb7e3 | 317 | } |
318 | ||
319 | /* INIT_EXPANDERS. */ | |
320 | ||
321 | void | |
7585fcd5 | 322 | mmix_init_expanders (void) |
68cbb7e3 | 323 | { |
324 | init_machine_status = mmix_init_machine_status; | |
325 | } | |
326 | ||
327 | /* Set the per-function data. */ | |
328 | ||
1f3233d1 | 329 | static struct machine_function * |
7585fcd5 | 330 | mmix_init_machine_status (void) |
68cbb7e3 | 331 | { |
25a27413 | 332 | return ggc_cleared_alloc<machine_function> (); |
68cbb7e3 | 333 | } |
334 | ||
a16734cd | 335 | /* DATA_ABI_ALIGNMENT. |
68cbb7e3 | 336 | We have trouble getting the address of stuff that is located at other |
337 | than 32-bit alignments (GETA requirements), so try to give everything | |
1d60d981 | 338 | at least 32-bit alignment. */ |
68cbb7e3 | 339 | |
340 | int | |
7585fcd5 | 341 | mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align) |
68cbb7e3 | 342 | { |
343 | if (basic_align < 32) | |
344 | return 32; | |
345 | ||
346 | return basic_align; | |
347 | } | |
348 | ||
349 | /* CONSTANT_ALIGNMENT. */ | |
350 | ||
351 | int | |
7585fcd5 | 352 | mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align) |
68cbb7e3 | 353 | { |
354 | if (basic_align < 32) | |
355 | return 32; | |
356 | ||
357 | return basic_align; | |
358 | } | |
359 | ||
360 | /* LOCAL_ALIGNMENT. */ | |
361 | ||
c0dae7df | 362 | unsigned |
363 | mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align) | |
68cbb7e3 | 364 | { |
365 | if (basic_align < 32) | |
366 | return 32; | |
367 | ||
368 | return basic_align; | |
369 | } | |
370 | ||
b2d7ede1 | 371 | /* TARGET_CONDITIONAL_REGISTER_USAGE. */ |
68cbb7e3 | 372 | |
b2d7ede1 | 373 | static void |
7585fcd5 | 374 | mmix_conditional_register_usage (void) |
68cbb7e3 | 375 | { |
376 | int i; | |
377 | ||
378 | if (TARGET_ABI_GNU) | |
379 | { | |
380 | static const int gnu_abi_reg_alloc_order[] | |
381 | = MMIX_GNU_ABI_REG_ALLOC_ORDER; | |
382 | ||
383 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
384 | reg_alloc_order[i] = gnu_abi_reg_alloc_order[i]; | |
385 | ||
386 | /* Change the default from the mmixware ABI. For the GNU ABI, | |
387 | $15..$30 are call-saved just as $0..$14. There must be one | |
d3310704 | 388 | call-clobbered local register for the "hole" that holds the |
389 | number of saved local registers saved by PUSHJ/PUSHGO during the | |
390 | function call, receiving the return value at return. So best is | |
391 | to use the highest, $31. It's already marked call-clobbered for | |
392 | the mmixware ABI. */ | |
68cbb7e3 | 393 | for (i = 15; i <= 30; i++) |
394 | call_used_regs[i] = 0; | |
f0b228a5 | 395 | |
396 | /* "Unfix" the parameter registers. */ | |
397 | for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM; | |
398 | i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS; | |
399 | i++) | |
400 | fixed_regs[i] = 0; | |
68cbb7e3 | 401 | } |
402 | ||
403 | /* Step over the ":" in special register names. */ | |
404 | if (! TARGET_TOPLEVEL_SYMBOLS) | |
405 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
406 | if (reg_names[i][0] == ':') | |
407 | reg_names[i]++; | |
408 | } | |
409 | ||
6d1f3d31 | 410 | /* INCOMING_REGNO and OUTGOING_REGNO worker function. |
411 | Those two macros must only be applied to function argument | |
4d19e7b3 | 412 | registers and the function return value register for the opposite |
413 | use. FIXME: for their current use in gcc, it'd be better with an | |
414 | explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la | |
415 | TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of | |
5d246ebf | 416 | forcing the target to commit to a fixed mapping and for any |
4d19e7b3 | 417 | unspecified register use. Particularly when thinking about the |
418 | return-value, it is better to imagine INCOMING_REGNO and | |
419 | OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as | |
420 | named CALLER_TO_CALLEE_REGNO because the direction. The "incoming" | |
421 | and "outgoing" is from the perspective of the parameter-registers, | |
422 | but the same macro is (must be, lacking an alternative like | |
423 | suggested above) used to map the return-value-register from the | |
424 | same perspective. To make directions even more confusing, the macro | |
425 | MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register | |
426 | in which to return a value, i.e. INCOMING_REGNO for the return-value- | |
427 | register as received from a called function; the return-value on the | |
428 | way out. */ | |
6d1f3d31 | 429 | |
430 | int | |
431 | mmix_opposite_regno (int regno, int incoming) | |
432 | { | |
4d19e7b3 | 433 | if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM) |
434 | return MMIX_RETURN_VALUE_REGNUM; | |
435 | ||
436 | if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM) | |
437 | return MMIX_OUTGOING_RETURN_VALUE_REGNUM; | |
438 | ||
6d1f3d31 | 439 | if (!mmix_function_arg_regno_p (regno, incoming)) |
440 | return regno; | |
441 | ||
442 | return | |
443 | regno - (incoming | |
444 | ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM | |
445 | : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM); | |
446 | } | |
447 | ||
d3310704 | 448 | /* LOCAL_REGNO. |
449 | All registers that are part of the register stack and that will be | |
450 | saved are local. */ | |
451 | ||
452 | int | |
7585fcd5 | 453 | mmix_local_regno (int regno) |
d3310704 | 454 | { |
455 | return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno]; | |
456 | } | |
457 | ||
27925877 | 458 | /* TARGET_PREFERRED_RELOAD_CLASS. |
68cbb7e3 | 459 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
460 | ||
27925877 | 461 | static reg_class_t |
462 | mmix_preferred_reload_class (rtx x, reg_class_t rclass) | |
68cbb7e3 | 463 | { |
464 | /* FIXME: Revisit. */ | |
465 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
8deb3959 | 466 | ? REMAINDER_REG : rclass; |
68cbb7e3 | 467 | } |
468 | ||
27925877 | 469 | /* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. |
68cbb7e3 | 470 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
471 | ||
27925877 | 472 | static reg_class_t |
473 | mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) | |
68cbb7e3 | 474 | { |
475 | /* FIXME: Revisit. */ | |
476 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
8deb3959 | 477 | ? REMAINDER_REG : rclass; |
68cbb7e3 | 478 | } |
479 | ||
480 | /* SECONDARY_RELOAD_CLASS. | |
481 | We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */ | |
482 | ||
483 | enum reg_class | |
8deb3959 | 484 | mmix_secondary_reload_class (enum reg_class rclass, |
3754d046 | 485 | machine_mode mode ATTRIBUTE_UNUSED, |
7585fcd5 | 486 | rtx x ATTRIBUTE_UNUSED, |
487 | int in_p ATTRIBUTE_UNUSED) | |
68cbb7e3 | 488 | { |
8deb3959 | 489 | if (rclass == REMAINDER_REG |
490 | || rclass == HIMULT_REG | |
491 | || rclass == SYSTEM_REGS) | |
68cbb7e3 | 492 | return GENERAL_REGS; |
493 | ||
68cbb7e3 | 494 | return NO_REGS; |
495 | } | |
496 | ||
68cbb7e3 | 497 | /* DYNAMIC_CHAIN_ADDRESS. */ |
498 | ||
499 | rtx | |
7585fcd5 | 500 | mmix_dynamic_chain_address (rtx frame) |
68cbb7e3 | 501 | { |
502 | /* FIXME: the frame-pointer is stored at offset -8 from the current | |
503 | frame-pointer. Unfortunately, the caller assumes that a | |
504 | frame-pointer is present for *all* previous frames. There should be | |
505 | a way to say that that cannot be done, like for RETURN_ADDR_RTX. */ | |
29c05e22 | 506 | return plus_constant (Pmode, frame, -8); |
68cbb7e3 | 507 | } |
508 | ||
509 | /* STARTING_FRAME_OFFSET. */ | |
510 | ||
511 | int | |
7585fcd5 | 512 | mmix_starting_frame_offset (void) |
68cbb7e3 | 513 | { |
514 | /* The old frame pointer is in the slot below the new one, so | |
515 | FIRST_PARM_OFFSET does not need to depend on whether the | |
516 | frame-pointer is needed or not. We have to adjust for the register | |
517 | stack pointer being located below the saved frame pointer. | |
518 | Similarly, we store the return address on the stack too, for | |
519 | exception handling, and always if we save the register stack pointer. */ | |
520 | return | |
521 | (-8 | |
522 | + (MMIX_CFUN_HAS_LANDING_PAD | |
523 | ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0))); | |
524 | } | |
525 | ||
526 | /* RETURN_ADDR_RTX. */ | |
527 | ||
528 | rtx | |
7585fcd5 | 529 | mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED) |
68cbb7e3 | 530 | { |
531 | return count == 0 | |
532 | ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS | |
af08e904 | 533 | /* FIXME: Set frame_alias_set on the following. (Why?) |
534 | See mmix_initial_elimination_offset for the reason we can't use | |
535 | get_hard_reg_initial_val for both. Always using a stack slot | |
536 | and not a register would be suboptimal. */ | |
29c05e22 | 537 | ? validize_mem (gen_rtx_MEM (Pmode, |
538 | plus_constant (Pmode, | |
539 | frame_pointer_rtx, -16))) | |
68cbb7e3 | 540 | : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM)) |
541 | : NULL_RTX; | |
542 | } | |
543 | ||
544 | /* SETUP_FRAME_ADDRESSES. */ | |
545 | ||
546 | void | |
7585fcd5 | 547 | mmix_setup_frame_addresses (void) |
68cbb7e3 | 548 | { |
549 | /* Nothing needed at the moment. */ | |
550 | } | |
551 | ||
552 | /* The difference between the (imaginary) frame pointer and the stack | |
553 | pointer. Used to eliminate the frame pointer. */ | |
554 | ||
555 | int | |
7585fcd5 | 556 | mmix_initial_elimination_offset (int fromreg, int toreg) |
68cbb7e3 | 557 | { |
558 | int regno; | |
559 | int fp_sp_offset | |
abe32cce | 560 | = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7; |
68cbb7e3 | 561 | |
af08e904 | 562 | /* There is no actual offset between these two virtual values, but for |
563 | the frame-pointer, we have the old one in the stack position below | |
564 | it, so the offset for the frame-pointer to the stack-pointer is one | |
565 | octabyte larger. */ | |
68cbb7e3 | 566 | if (fromreg == MMIX_ARG_POINTER_REGNUM |
567 | && toreg == MMIX_FRAME_POINTER_REGNUM) | |
568 | return 0; | |
569 | ||
570 | /* The difference is the size of local variables plus the size of | |
571 | outgoing function arguments that would normally be passed as | |
572 | registers but must be passed on stack because we're out of | |
573 | function-argument registers. Only global saved registers are | |
574 | counted; the others go on the register stack. | |
575 | ||
576 | The frame-pointer is counted too if it is what is eliminated, as we | |
577 | need to balance the offset for it from STARTING_FRAME_OFFSET. | |
578 | ||
579 | Also add in the slot for the register stack pointer we save if we | |
580 | have a landing pad. | |
581 | ||
582 | Unfortunately, we can't access $0..$14, from unwinder code easily, so | |
583 | store the return address in a frame slot too. FIXME: Only for | |
584 | non-leaf functions. FIXME: Always with a landing pad, because it's | |
585 | hard to know whether we need the other at the time we know we need | |
586 | the offset for one (and have to state it). It's a kludge until we | |
587 | can express the register stack in the EH frame info. | |
588 | ||
589 | We have to do alignment here; get_frame_size will not return a | |
590 | multiple of STACK_BOUNDARY. FIXME: Add note in manual. */ | |
591 | ||
592 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
593 | regno <= 255; | |
594 | regno++) | |
3072d30e | 595 | if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
68cbb7e3 | 596 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
597 | fp_sp_offset += 8; | |
598 | ||
599 | return fp_sp_offset | |
600 | + (MMIX_CFUN_HAS_LANDING_PAD | |
601 | ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0)) | |
602 | + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8); | |
603 | } | |
604 | ||
5d246ebf | 605 | static void |
3754d046 | 606 | mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode, |
5d246ebf | 607 | const_tree type, bool named ATTRIBUTE_UNUSED) |
608 | { | |
39cba157 | 609 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
5d246ebf | 610 | int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type); |
611 | ||
612 | argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type) | |
613 | || (arg_size > 8 | |
614 | && !TARGET_LIBFUNC | |
615 | && !argsp->lib)) | |
616 | ? (MMIX_MAX_ARGS_IN_REGS) + 1 | |
617 | : argsp->regs + (7 + arg_size) / 8); | |
618 | } | |
68cbb7e3 | 619 | |
5d246ebf | 620 | /* Helper function for mmix_function_arg and mmix_function_incoming_arg. */ |
621 | ||
622 | static rtx | |
39cba157 | 623 | mmix_function_arg_1 (const cumulative_args_t argsp_v, |
3754d046 | 624 | machine_mode mode, |
5d246ebf | 625 | const_tree type, |
626 | bool named ATTRIBUTE_UNUSED, | |
627 | bool incoming) | |
68cbb7e3 | 628 | { |
39cba157 | 629 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
630 | ||
68cbb7e3 | 631 | /* Last-argument marker. */ |
632 | if (type == void_type_node) | |
633 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS) | |
634 | ? gen_rtx_REG (mode, | |
635 | (incoming | |
636 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
637 | : MMIX_FIRST_ARG_REGNUM) + argsp->regs) | |
638 | : NULL_RTX; | |
639 | ||
640 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS | |
0336f0f0 | 641 | && !targetm.calls.must_pass_in_stack (mode, type) |
68cbb7e3 | 642 | && (GET_MODE_BITSIZE (mode) <= 64 |
643 | || argsp->lib | |
644 | || TARGET_LIBFUNC)) | |
645 | ? gen_rtx_REG (mode, | |
646 | (incoming | |
647 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
648 | : MMIX_FIRST_ARG_REGNUM) | |
649 | + argsp->regs) | |
650 | : NULL_RTX; | |
651 | } | |
652 | ||
5d246ebf | 653 | /* Return an rtx for a function argument to go in a register, and 0 for |
654 | one that must go on stack. */ | |
655 | ||
656 | static rtx | |
39cba157 | 657 | mmix_function_arg (cumulative_args_t argsp, |
3754d046 | 658 | machine_mode mode, |
5d246ebf | 659 | const_tree type, |
660 | bool named) | |
661 | { | |
662 | return mmix_function_arg_1 (argsp, mode, type, named, false); | |
663 | } | |
664 | ||
665 | static rtx | |
39cba157 | 666 | mmix_function_incoming_arg (cumulative_args_t argsp, |
3754d046 | 667 | machine_mode mode, |
5d246ebf | 668 | const_tree type, |
669 | bool named) | |
670 | { | |
671 | return mmix_function_arg_1 (argsp, mode, type, named, true); | |
672 | } | |
673 | ||
68cbb7e3 | 674 | /* Returns nonzero for everything that goes by reference, 0 for |
675 | everything that goes by value. */ | |
676 | ||
b981d932 | 677 | static bool |
3754d046 | 678 | mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode, |
fb80456a | 679 | const_tree type, bool named ATTRIBUTE_UNUSED) |
68cbb7e3 | 680 | { |
39cba157 | 681 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
682 | ||
0336f0f0 | 683 | /* FIXME: Check: I'm not sure the must_pass_in_stack check is |
68cbb7e3 | 684 | necessary. */ |
bef380a4 | 685 | if (targetm.calls.must_pass_in_stack (mode, type)) |
686 | return true; | |
687 | ||
688 | if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8 | |
689 | && !TARGET_LIBFUNC | |
690 | && (!argsp || !argsp->lib)) | |
691 | return true; | |
692 | ||
693 | return false; | |
68cbb7e3 | 694 | } |
695 | ||
696 | /* Return nonzero if regno is a register number where a parameter is | |
697 | passed, and 0 otherwise. */ | |
698 | ||
699 | int | |
7585fcd5 | 700 | mmix_function_arg_regno_p (int regno, int incoming) |
68cbb7e3 | 701 | { |
702 | int first_arg_regnum | |
703 | = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM; | |
704 | ||
705 | return regno >= first_arg_regnum | |
706 | && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS; | |
707 | } | |
708 | ||
b600778c | 709 | /* Implements TARGET_FUNCTION_VALUE. */ |
68cbb7e3 | 710 | |
b600778c | 711 | static rtx |
712 | mmix_function_value (const_tree valtype, | |
713 | const_tree func ATTRIBUTE_UNUSED, | |
714 | bool outgoing) | |
68cbb7e3 | 715 | { |
3754d046 | 716 | machine_mode mode = TYPE_MODE (valtype); |
717 | machine_mode cmode; | |
68cbb7e3 | 718 | int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM; |
719 | rtx vec[MMIX_MAX_REGS_FOR_VALUE]; | |
720 | int i; | |
721 | int nregs; | |
722 | ||
b600778c | 723 | if (!outgoing) |
724 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
725 | ||
68cbb7e3 | 726 | /* Return values that fit in a register need no special handling. |
727 | There's no register hole when parameters are passed in global | |
728 | registers. */ | |
729 | if (TARGET_ABI_GNU | |
730 | || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD) | |
731 | return | |
732 | gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM); | |
733 | ||
fb89a8c9 | 734 | if (COMPLEX_MODE_P (mode)) |
735 | /* A complex type, made up of components. */ | |
736 | cmode = TYPE_MODE (TREE_TYPE (valtype)); | |
737 | else | |
738 | { | |
739 | /* Of the other larger-than-register modes, we only support | |
740 | scalar mode TImode. (At least, that's the only one that's | |
741 | been rudimentally tested.) Make sure we're alerted for | |
742 | unexpected cases. */ | |
743 | if (mode != TImode) | |
744 | sorry ("support for mode %qs", GET_MODE_NAME (mode)); | |
745 | ||
746 | /* In any case, we will fill registers to the natural size. */ | |
747 | cmode = DImode; | |
748 | } | |
749 | ||
68cbb7e3 | 750 | nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD); |
751 | ||
752 | /* We need to take care of the effect of the register hole on return | |
753 | values of large sizes; the last register will appear as the first | |
754 | register, with the rest shifted. (For complex modes, this is just | |
755 | swapped registers.) */ | |
756 | ||
757 | if (nregs > MMIX_MAX_REGS_FOR_VALUE) | |
68435912 | 758 | internal_error ("too large function value type, needs %d registers,\ |
68cbb7e3 | 759 | have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE); |
760 | ||
761 | /* FIXME: Maybe we should handle structure values like this too | |
762 | (adjusted for BLKmode), perhaps for both ABI:s. */ | |
763 | for (i = 0; i < nregs - 1; i++) | |
764 | vec[i] | |
765 | = gen_rtx_EXPR_LIST (VOIDmode, | |
766 | gen_rtx_REG (cmode, first_val_regnum + i), | |
767 | GEN_INT ((i + 1) * BITS_PER_UNIT)); | |
768 | ||
769 | vec[nregs - 1] | |
770 | = gen_rtx_EXPR_LIST (VOIDmode, | |
771 | gen_rtx_REG (cmode, first_val_regnum + nregs - 1), | |
bcd9bd66 | 772 | const0_rtx); |
68cbb7e3 | 773 | |
2bdda7ee | 774 | return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec)); |
68cbb7e3 | 775 | } |
776 | ||
b600778c | 777 | /* Implements TARGET_LIBCALL_VALUE. */ |
c715d549 | 778 | |
b600778c | 779 | static rtx |
3754d046 | 780 | mmix_libcall_value (machine_mode mode, |
b600778c | 781 | const_rtx fun ATTRIBUTE_UNUSED) |
782 | { | |
783 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
784 | } | |
785 | ||
786 | /* Implements TARGET_FUNCTION_VALUE_REGNO_P. */ | |
787 | ||
788 | static bool | |
789 | mmix_function_value_regno_p (const unsigned int regno) | |
c715d549 | 790 | { |
791 | return regno == MMIX_RETURN_VALUE_REGNUM; | |
792 | } | |
793 | ||
68cbb7e3 | 794 | /* EH_RETURN_DATA_REGNO. */ |
795 | ||
796 | int | |
7585fcd5 | 797 | mmix_eh_return_data_regno (int n) |
68cbb7e3 | 798 | { |
799 | if (n >= 0 && n < 4) | |
800 | return MMIX_EH_RETURN_DATA_REGNO_START + n; | |
801 | ||
802 | return INVALID_REGNUM; | |
803 | } | |
804 | ||
805 | /* EH_RETURN_STACKADJ_RTX. */ | |
806 | ||
807 | rtx | |
7585fcd5 | 808 | mmix_eh_return_stackadj_rtx (void) |
68cbb7e3 | 809 | { |
810 | return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM); | |
811 | } | |
812 | ||
813 | /* EH_RETURN_HANDLER_RTX. */ | |
814 | ||
815 | rtx | |
7585fcd5 | 816 | mmix_eh_return_handler_rtx (void) |
68cbb7e3 | 817 | { |
7585fcd5 | 818 | return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM); |
68cbb7e3 | 819 | } |
820 | ||
821 | /* ASM_PREFERRED_EH_DATA_FORMAT. */ | |
822 | ||
823 | int | |
7585fcd5 | 824 | mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, |
825 | int global ATTRIBUTE_UNUSED) | |
68cbb7e3 | 826 | { |
827 | /* This is the default (was at 2001-07-20). Revisit when needed. */ | |
828 | return DW_EH_PE_absptr; | |
829 | } | |
830 | ||
28c2d844 | 831 | /* Make a note that we've seen the beginning of the prologue. This |
d3310704 | 832 | matters to whether we'll translate register numbers as calculated by |
2efea8c0 | 833 | mmix_reorg. */ |
68cbb7e3 | 834 | |
d3310704 | 835 | static void |
7585fcd5 | 836 | mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED, |
837 | HOST_WIDE_INT framesize ATTRIBUTE_UNUSED) | |
68cbb7e3 | 838 | { |
d3310704 | 839 | cfun->machine->in_prologue = 1; |
840 | } | |
68cbb7e3 | 841 | |
d3310704 | 842 | /* Make a note that we've seen the end of the prologue. */ |
68cbb7e3 | 843 | |
d3310704 | 844 | static void |
7585fcd5 | 845 | mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED) |
d3310704 | 846 | { |
847 | cfun->machine->in_prologue = 0; | |
d68ffc6f | 848 | } |
849 | ||
2efea8c0 | 850 | /* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements |
851 | done here; just virtually by calculating the highest saved stack | |
852 | register number used to modify the register numbers at output time. */ | |
d68ffc6f | 853 | |
2efea8c0 | 854 | static void |
7585fcd5 | 855 | mmix_reorg (void) |
d68ffc6f | 856 | { |
857 | int regno; | |
68cbb7e3 | 858 | |
859 | /* We put the number of the highest saved register-file register in a | |
860 | location convenient for the call-patterns to output. Note that we | |
861 | don't tell dwarf2 about these registers, since it can't restore them | |
862 | anyway. */ | |
d68ffc6f | 863 | for (regno = MMIX_LAST_STACK_REGISTER_REGNUM; |
68cbb7e3 | 864 | regno >= 0; |
865 | regno--) | |
3072d30e | 866 | if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
68cbb7e3 | 867 | || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed)) |
868 | break; | |
869 | ||
d68ffc6f | 870 | /* Regardless of whether they're saved (they might be just read), we |
871 | mustn't include registers that carry parameters. We could scan the | |
872 | insns to see whether they're actually used (and indeed do other less | |
873 | trivial register usage analysis and transformations), but it seems | |
874 | wasteful to optimize for unused parameter registers. As of | |
3072d30e | 875 | 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but |
d68ffc6f | 876 | that might change. */ |
abe32cce | 877 | if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1) |
d68ffc6f | 878 | { |
abe32cce | 879 | regno = crtl->args.info.regs - 1; |
d68ffc6f | 880 | |
881 | /* We don't want to let this cause us to go over the limit and make | |
882 | incoming parameter registers be misnumbered and treating the last | |
883 | parameter register and incoming return value register call-saved. | |
884 | Stop things at the unmodified scheme. */ | |
885 | if (regno > MMIX_RETURN_VALUE_REGNUM - 1) | |
886 | regno = MMIX_RETURN_VALUE_REGNUM - 1; | |
887 | } | |
888 | ||
889 | cfun->machine->highest_saved_stack_register = regno; | |
68cbb7e3 | 890 | } |
891 | ||
892 | /* TARGET_ASM_FUNCTION_EPILOGUE. */ | |
893 | ||
4448bfa5 | 894 | static void |
7585fcd5 | 895 | mmix_target_asm_function_epilogue (FILE *stream, |
896 | HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED) | |
68cbb7e3 | 897 | { |
d3310704 | 898 | /* Emit an \n for readability of the generated assembly. */ |
899 | fputc ('\n', stream); | |
900 | } | |
68cbb7e3 | 901 | |
e7f5e241 | 902 | /* TARGET_ASM_OUTPUT_MI_THUNK. */ |
68cbb7e3 | 903 | |
6988553d | 904 | static void |
7585fcd5 | 905 | mmix_asm_output_mi_thunk (FILE *stream, |
906 | tree fndecl ATTRIBUTE_UNUSED, | |
907 | HOST_WIDE_INT delta, | |
908 | HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED, | |
909 | tree func) | |
d3310704 | 910 | { |
6644435d | 911 | /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass |
912 | location of structure to return as invisible first argument), you | |
913 | need to tweak this code too. */ | |
d3310704 | 914 | const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM]; |
68cbb7e3 | 915 | |
d3310704 | 916 | if (delta >= 0 && delta < 65536) |
e7f5e241 | 917 | fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta); |
d3310704 | 918 | else if (delta < 0 && delta >= -255) |
e7f5e241 | 919 | fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta); |
d3310704 | 920 | else |
0b123c47 | 921 | { |
d3310704 | 922 | mmix_output_register_setting (stream, 255, delta, 1); |
7fe1d31c | 923 | fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname); |
0b123c47 | 924 | } |
925 | ||
d3310704 | 926 | fprintf (stream, "\tJMP "); |
927 | assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0)); | |
928 | fprintf (stream, "\n"); | |
929 | } | |
68cbb7e3 | 930 | |
d3310704 | 931 | /* FUNCTION_PROFILER. */ |
68cbb7e3 | 932 | |
d3310704 | 933 | void |
7585fcd5 | 934 | mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED, |
935 | int labelno ATTRIBUTE_UNUSED) | |
d3310704 | 936 | { |
937 | sorry ("function_profiler support for MMIX"); | |
938 | } | |
68cbb7e3 | 939 | |
9e4a734a | 940 | /* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment, |
941 | let's stick to pushing argument registers on the stack. Later, we | |
942 | can parse all arguments in registers, to improve performance. */ | |
68cbb7e3 | 943 | |
9e4a734a | 944 | static void |
39cba157 | 945 | mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v, |
3754d046 | 946 | machine_mode mode, |
7585fcd5 | 947 | tree vartype, |
948 | int *pretend_sizep, | |
949 | int second_time ATTRIBUTE_UNUSED) | |
68cbb7e3 | 950 | { |
39cba157 | 951 | CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v); |
952 | ||
7ccc713a | 953 | /* The last named variable has been handled, but |
954 | args_so_farp has not been advanced for it. */ | |
955 | if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS) | |
956 | *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8; | |
68cbb7e3 | 957 | |
958 | /* We assume that one argument takes up one register here. That should | |
5aedf60c | 959 | be true until we start messing with multi-reg parameters. */ |
68cbb7e3 | 960 | if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1) |
961 | internal_error ("MMIX Internal: Last named vararg would not fit in a register"); | |
962 | } | |
963 | ||
604d844a | 964 | /* TARGET_ASM_TRAMPOLINE_TEMPLATE. */ |
68cbb7e3 | 965 | |
604d844a | 966 | static void |
967 | mmix_asm_trampoline_template (FILE *stream) | |
68cbb7e3 | 968 | { |
af08e904 | 969 | /* Read a value into the static-chain register and jump somewhere. The |
970 | static chain is stored at offset 16, and the function address is | |
971 | stored at offset 24. */ | |
604d844a | 972 | |
68cbb7e3 | 973 | fprintf (stream, "\tGETA $255,1F\n\t"); |
604d844a | 974 | fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]); |
68cbb7e3 | 975 | fprintf (stream, "LDOU $255,$255,8\n\t"); |
976 | fprintf (stream, "GO $255,$255,0\n"); | |
977 | fprintf (stream, "1H\tOCTA 0\n\t"); | |
978 | fprintf (stream, "OCTA 0\n"); | |
979 | } | |
980 | ||
604d844a | 981 | /* TARGET_TRAMPOLINE_INIT. */ |
68cbb7e3 | 982 | /* Set the static chain and function pointer field in the trampoline. |
983 | We also SYNCID here to be sure (doesn't matter in the simulator, but | |
984 | some day it will). */ | |
985 | ||
604d844a | 986 | static void |
987 | mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) | |
988 | { | |
989 | rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); | |
990 | rtx mem; | |
991 | ||
992 | emit_block_move (m_tramp, assemble_trampoline_template (), | |
993 | GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL); | |
994 | ||
995 | mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD); | |
996 | emit_move_insn (mem, static_chain); | |
997 | mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD); | |
998 | emit_move_insn (mem, fnaddr); | |
999 | ||
1000 | mem = adjust_address (m_tramp, DImode, 0); | |
1001 | emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1))); | |
68cbb7e3 | 1002 | } |
1003 | ||
1004 | /* We must exclude constant addresses that have an increment that is not a | |
1005 | multiple of four bytes because of restrictions of the GETA | |
f0b228a5 | 1006 | instruction, unless TARGET_BASE_ADDRESSES. */ |
68cbb7e3 | 1007 | |
1008 | int | |
7585fcd5 | 1009 | mmix_constant_address_p (rtx x) |
68cbb7e3 | 1010 | { |
1011 | RTX_CODE code = GET_CODE (x); | |
1012 | int addend = 0; | |
f0b228a5 | 1013 | /* When using "base addresses", anything constant goes. */ |
1014 | int constant_ok = TARGET_BASE_ADDRESSES != 0; | |
68cbb7e3 | 1015 | |
68cbb7e3 | 1016 | switch (code) |
1017 | { | |
1018 | case LABEL_REF: | |
1019 | case SYMBOL_REF: | |
1020 | return 1; | |
1021 | ||
68cbb7e3 | 1022 | case HIGH: |
f0b228a5 | 1023 | /* FIXME: Don't know how to dissect these. Avoid them for now, |
1024 | except we know they're constants. */ | |
1025 | return constant_ok; | |
68cbb7e3 | 1026 | |
1027 | case CONST_INT: | |
1028 | addend = INTVAL (x); | |
1029 | break; | |
1030 | ||
1031 | case CONST_DOUBLE: | |
1032 | if (GET_MODE (x) != VOIDmode) | |
1033 | /* Strange that we got here. FIXME: Check if we do. */ | |
f0b228a5 | 1034 | return constant_ok; |
68cbb7e3 | 1035 | addend = CONST_DOUBLE_LOW (x); |
1036 | break; | |
1037 | ||
1038 | case CONST: | |
1039 | /* Note that expressions with arithmetic on forward references don't | |
1040 | work in mmixal. People using gcc assembly code with mmixal might | |
1041 | need to move arrays and such to before the point of use. */ | |
1042 | if (GET_CODE (XEXP (x, 0)) == PLUS) | |
1043 | { | |
1044 | rtx x0 = XEXP (XEXP (x, 0), 0); | |
1045 | rtx x1 = XEXP (XEXP (x, 0), 1); | |
1046 | ||
1047 | if ((GET_CODE (x0) == SYMBOL_REF | |
1048 | || GET_CODE (x0) == LABEL_REF) | |
1049 | && (GET_CODE (x1) == CONST_INT | |
1050 | || (GET_CODE (x1) == CONST_DOUBLE | |
1051 | && GET_MODE (x1) == VOIDmode))) | |
1052 | addend = mmix_intval (x1); | |
1053 | else | |
f0b228a5 | 1054 | return constant_ok; |
68cbb7e3 | 1055 | } |
1056 | else | |
f0b228a5 | 1057 | return constant_ok; |
68cbb7e3 | 1058 | break; |
1059 | ||
1060 | default: | |
1061 | return 0; | |
1062 | } | |
1063 | ||
f0b228a5 | 1064 | return constant_ok || (addend & 3) == 0; |
68cbb7e3 | 1065 | } |
1066 | ||
fd50b071 | 1067 | /* Return 1 if the address is OK, otherwise 0. */ |
68cbb7e3 | 1068 | |
fd50b071 | 1069 | bool |
3754d046 | 1070 | mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, |
fd50b071 | 1071 | rtx x, |
1072 | bool strict_checking) | |
68cbb7e3 | 1073 | { |
1074 | #define MMIX_REG_OK(X) \ | |
1075 | ((strict_checking \ | |
1076 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1077 | || (reg_renumber[REGNO (X)] > 0 \ | |
1078 | && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \ | |
1079 | || (!strict_checking \ | |
1080 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1081 | || REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
1082 | || REGNO (X) == ARG_POINTER_REGNUM))) | |
1083 | ||
1084 | /* We only accept: | |
1085 | (mem reg) | |
1086 | (mem (plus reg reg)) | |
f0b228a5 | 1087 | (mem (plus reg 0..255)). |
1088 | unless TARGET_BASE_ADDRESSES, in which case we accept all | |
1089 | (mem constant_address) too. */ | |
68cbb7e3 | 1090 | |
1091 | ||
1092 | /* (mem reg) */ | |
1093 | if (REG_P (x) && MMIX_REG_OK (x)) | |
1094 | return 1; | |
1095 | ||
1096 | if (GET_CODE(x) == PLUS) | |
1097 | { | |
1098 | rtx x1 = XEXP (x, 0); | |
1099 | rtx x2 = XEXP (x, 1); | |
1100 | ||
1101 | /* Try swapping the order. FIXME: Do we need this? */ | |
1102 | if (! REG_P (x1)) | |
1103 | { | |
1104 | rtx tem = x1; | |
1105 | x1 = x2; | |
1106 | x2 = tem; | |
1107 | } | |
1108 | ||
f0b228a5 | 1109 | /* (mem (plus (reg?) (?))) */ |
68cbb7e3 | 1110 | if (!REG_P (x1) || !MMIX_REG_OK (x1)) |
f0b228a5 | 1111 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
68cbb7e3 | 1112 | |
f0b228a5 | 1113 | /* (mem (plus (reg) (reg?))) */ |
68cbb7e3 | 1114 | if (REG_P (x2) && MMIX_REG_OK (x2)) |
1115 | return 1; | |
1116 | ||
f0b228a5 | 1117 | /* (mem (plus (reg) (0..255?))) */ |
f105c84e | 1118 | if (satisfies_constraint_I (x2)) |
68cbb7e3 | 1119 | return 1; |
f0b228a5 | 1120 | |
1121 | return 0; | |
68cbb7e3 | 1122 | } |
1123 | ||
f0b228a5 | 1124 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
68cbb7e3 | 1125 | } |
1126 | ||
ca316360 | 1127 | /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ |
68cbb7e3 | 1128 | |
ca316360 | 1129 | static bool |
3754d046 | 1130 | mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) |
68cbb7e3 | 1131 | { |
1132 | RTX_CODE code = GET_CODE (x); | |
1133 | ||
1134 | /* We must allow any number due to the way the cse passes works; if we | |
1135 | do not allow any number here, general_operand will fail, and insns | |
1136 | will fatally fail recognition instead of "softly". */ | |
1137 | if (code == CONST_INT || code == CONST_DOUBLE) | |
1138 | return 1; | |
1139 | ||
1140 | return CONSTANT_ADDRESS_P (x); | |
1141 | } | |
1142 | ||
1143 | /* SELECT_CC_MODE. */ | |
1144 | ||
3754d046 | 1145 | machine_mode |
7585fcd5 | 1146 | mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) |
68cbb7e3 | 1147 | { |
1148 | /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to | |
1149 | output different compare insns. Note that we do not check the | |
1150 | validity of the comparison here. */ | |
1151 | ||
1152 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1153 | { | |
1154 | if (op == ORDERED || op == UNORDERED || op == UNGE | |
1155 | || op == UNGT || op == UNLE || op == UNLT) | |
1156 | return CC_FUNmode; | |
1157 | ||
1158 | if (op == EQ || op == NE) | |
1159 | return CC_FPEQmode; | |
1160 | ||
1161 | return CC_FPmode; | |
1162 | } | |
1163 | ||
1164 | if (op == GTU || op == LTU || op == GEU || op == LEU) | |
1165 | return CC_UNSmode; | |
1166 | ||
1167 | return CCmode; | |
1168 | } | |
1169 | ||
68cbb7e3 | 1170 | /* REVERSIBLE_CC_MODE. */ |
1171 | ||
1172 | int | |
3754d046 | 1173 | mmix_reversible_cc_mode (machine_mode mode) |
68cbb7e3 | 1174 | { |
1175 | /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float | |
581084df | 1176 | compares. */ |
68cbb7e3 | 1177 | return mode != CC_FPmode; |
1178 | } | |
1179 | ||
fab7adbf | 1180 | /* TARGET_RTX_COSTS. */ |
68cbb7e3 | 1181 | |
fab7adbf | 1182 | static bool |
7585fcd5 | 1183 | mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED, |
1184 | int code ATTRIBUTE_UNUSED, | |
1185 | int outer_code ATTRIBUTE_UNUSED, | |
20d892d1 | 1186 | int opno ATTRIBUTE_UNUSED, |
f529eb25 | 1187 | int *total ATTRIBUTE_UNUSED, |
1188 | bool speed ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1189 | { |
1190 | /* For the time being, this is just a stub and we'll accept the | |
1191 | generic calculations, until we can do measurements, at least. | |
1192 | Say we did not modify any calculated costs. */ | |
fab7adbf | 1193 | return false; |
68cbb7e3 | 1194 | } |
1195 | ||
f7e13ca6 | 1196 | /* TARGET_REGISTER_MOVE_COST. |
68cbb7e3 | 1197 | |
f7e13ca6 | 1198 | The special registers can only move to and from general regs, and we |
1199 | need to check that their constraints match, so say 3 for them. */ | |
1200 | ||
1201 | static int | |
3754d046 | 1202 | mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, |
f7e13ca6 | 1203 | reg_class_t from, |
1204 | reg_class_t to) | |
68cbb7e3 | 1205 | { |
1206 | return (from == GENERAL_REGS && from == to) ? 2 : 3; | |
1207 | } | |
1208 | ||
1209 | /* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a | |
1210 | compile-time constant; it's used in an asm in crtstuff.c, compiled for | |
1211 | the target. */ | |
1212 | ||
1213 | /* DATA_SECTION_ASM_OP. */ | |
1214 | ||
1215 | const char * | |
7585fcd5 | 1216 | mmix_data_section_asm_op (void) |
68cbb7e3 | 1217 | { |
1218 | return "\t.data ! mmixal:= 8H LOC 9B"; | |
1219 | } | |
1220 | ||
7811991d | 1221 | static void |
7585fcd5 | 1222 | mmix_encode_section_info (tree decl, rtx rtl, int first) |
68cbb7e3 | 1223 | { |
1224 | /* Test for an external declaration, and do nothing if it is one. */ | |
1225 | if ((TREE_CODE (decl) == VAR_DECL | |
91009d64 | 1226 | && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl))) |
1227 | || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl))) | |
68cbb7e3 | 1228 | ; |
ae484cc8 | 1229 | else if (first && DECL_P (decl)) |
68cbb7e3 | 1230 | { |
1231 | /* For non-visible declarations, add a "@" prefix, which we skip | |
1232 | when the label is output. If the label does not have this | |
f0b228a5 | 1233 | prefix, a ":" is output if -mtoplevel-symbols. |
68cbb7e3 | 1234 | |
1235 | Note that this does not work for data that is declared extern and | |
1236 | later defined as static. If there's code in between, that code | |
f0b228a5 | 1237 | will refer to the extern declaration, and vice versa. This just |
1238 | means that when -mtoplevel-symbols is in use, we can just handle | |
1239 | well-behaved ISO-compliant code. */ | |
68cbb7e3 | 1240 | |
2c129d70 | 1241 | const char *str = XSTR (XEXP (rtl, 0), 0); |
68cbb7e3 | 1242 | int len = strlen (str); |
225ab426 | 1243 | char *newstr = XALLOCAVEC (char, len + 2); |
b948ae2f | 1244 | newstr[0] = '@'; |
68cbb7e3 | 1245 | strcpy (newstr + 1, str); |
b948ae2f | 1246 | XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1); |
68cbb7e3 | 1247 | } |
1248 | ||
f0b228a5 | 1249 | /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We |
1250 | may need different options to reach for different things with GETA. | |
1251 | For now, functions and things we know or have been told are constant. */ | |
1252 | if (TREE_CODE (decl) == FUNCTION_DECL | |
1253 | || TREE_CONSTANT (decl) | |
1254 | || (TREE_CODE (decl) == VAR_DECL | |
1255 | && TREE_READONLY (decl) | |
1256 | && !TREE_SIDE_EFFECTS (decl) | |
1257 | && (!DECL_INITIAL (decl) | |
1258 | || TREE_CONSTANT (DECL_INITIAL (decl))))) | |
2c129d70 | 1259 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; |
68cbb7e3 | 1260 | } |
1261 | ||
7b4a38a6 | 1262 | static const char * |
7585fcd5 | 1263 | mmix_strip_name_encoding (const char *name) |
68cbb7e3 | 1264 | { |
1265 | for (; (*name == '@' || *name == '*'); name++) | |
1266 | ; | |
1267 | ||
1268 | return name; | |
1269 | } | |
1270 | ||
92c473b8 | 1271 | /* TARGET_ASM_FILE_START. |
1272 | We just emit a little comment for the time being. */ | |
68cbb7e3 | 1273 | |
92c473b8 | 1274 | static void |
7585fcd5 | 1275 | mmix_file_start (void) |
68cbb7e3 | 1276 | { |
92c473b8 | 1277 | default_file_start (); |
68cbb7e3 | 1278 | |
92c473b8 | 1279 | fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file); |
68cbb7e3 | 1280 | |
1d60d981 | 1281 | /* Make sure each file starts with the text section. */ |
2f14b1f9 | 1282 | switch_to_section (text_section); |
68cbb7e3 | 1283 | } |
1284 | ||
f6940372 | 1285 | /* TARGET_ASM_FILE_END. */ |
68cbb7e3 | 1286 | |
f6940372 | 1287 | static void |
7585fcd5 | 1288 | mmix_file_end (void) |
68cbb7e3 | 1289 | { |
1d60d981 | 1290 | /* Make sure each file ends with the data section. */ |
2f14b1f9 | 1291 | switch_to_section (data_section); |
68cbb7e3 | 1292 | } |
1293 | ||
40fe393f | 1294 | /* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */ |
68cbb7e3 | 1295 | |
40fe393f | 1296 | static void |
7585fcd5 | 1297 | mmix_asm_output_source_filename (FILE *stream, const char *name) |
68cbb7e3 | 1298 | { |
1299 | fprintf (stream, "# 1 "); | |
1300 | OUTPUT_QUOTED_STRING (stream, name); | |
1301 | fprintf (stream, "\n"); | |
1302 | } | |
1303 | ||
1304 | /* OUTPUT_QUOTED_STRING. */ | |
1305 | ||
1306 | void | |
7585fcd5 | 1307 | mmix_output_quoted_string (FILE *stream, const char *string, int length) |
68cbb7e3 | 1308 | { |
1309 | const char * string_end = string + length; | |
25037517 | 1310 | static const char *const unwanted_chars = "\"[]\\"; |
68cbb7e3 | 1311 | |
1312 | /* Output "any character except newline and double quote character". We | |
1313 | play it safe and avoid all control characters too. We also do not | |
1314 | want [] as characters, should input be passed through m4 with [] as | |
1315 | quotes. Further, we avoid "\", because the GAS port handles it as a | |
1316 | quoting character. */ | |
1317 | while (string < string_end) | |
1318 | { | |
1319 | if (*string | |
1320 | && (unsigned char) *string < 128 | |
1321 | && !ISCNTRL (*string) | |
1322 | && strchr (unwanted_chars, *string) == NULL) | |
1323 | { | |
1324 | fputc ('"', stream); | |
1325 | while (*string | |
1326 | && (unsigned char) *string < 128 | |
1327 | && !ISCNTRL (*string) | |
1328 | && strchr (unwanted_chars, *string) == NULL | |
1329 | && string < string_end) | |
1330 | { | |
1331 | fputc (*string, stream); | |
1332 | string++; | |
1333 | } | |
1334 | fputc ('"', stream); | |
1335 | if (string < string_end) | |
1336 | fprintf (stream, ","); | |
1337 | } | |
1338 | if (string < string_end) | |
1339 | { | |
1340 | fprintf (stream, "#%x", *string & 255); | |
1341 | string++; | |
1342 | if (string < string_end) | |
1343 | fprintf (stream, ","); | |
1344 | } | |
1345 | } | |
1346 | } | |
1347 | ||
58356836 | 1348 | /* Target hook for assembling integer objects. Use mmix_print_operand |
1349 | for WYDE and TETRA. Use mmix_output_octa to output 8-byte | |
1350 | CONST_DOUBLEs. */ | |
68cbb7e3 | 1351 | |
58356836 | 1352 | static bool |
7585fcd5 | 1353 | mmix_assemble_integer (rtx x, unsigned int size, int aligned_p) |
68cbb7e3 | 1354 | { |
58356836 | 1355 | if (aligned_p) |
1356 | switch (size) | |
1357 | { | |
4f4e478d | 1358 | /* We handle a limited number of types of operands in here. But |
1359 | that's ok, because we can punt to generic functions. We then | |
5c3d1711 | 1360 | pretend that aligned data isn't needed, so the usual .<pseudo> |
1361 | syntax is used (which works for aligned data too). We actually | |
1362 | *must* do that, since we say we don't have simple aligned | |
1363 | pseudos, causing this function to be called. We just try and | |
1364 | keep as much compatibility as possible with mmixal syntax for | |
1365 | normal cases (i.e. without GNU extensions and C only). */ | |
58356836 | 1366 | case 1: |
4f4e478d | 1367 | if (GET_CODE (x) != CONST_INT) |
1368 | { | |
1369 | aligned_p = 0; | |
1370 | break; | |
1371 | } | |
58356836 | 1372 | fputs ("\tBYTE\t", asm_out_file); |
1373 | mmix_print_operand (asm_out_file, x, 'B'); | |
1374 | fputc ('\n', asm_out_file); | |
1375 | return true; | |
1376 | ||
1377 | case 2: | |
4f4e478d | 1378 | if (GET_CODE (x) != CONST_INT) |
1379 | { | |
1380 | aligned_p = 0; | |
1381 | break; | |
1382 | } | |
58356836 | 1383 | fputs ("\tWYDE\t", asm_out_file); |
1384 | mmix_print_operand (asm_out_file, x, 'W'); | |
1385 | fputc ('\n', asm_out_file); | |
1386 | return true; | |
1387 | ||
1388 | case 4: | |
60bb373d | 1389 | if (GET_CODE (x) != CONST_INT) |
4f4e478d | 1390 | { |
1391 | aligned_p = 0; | |
1392 | break; | |
1393 | } | |
58356836 | 1394 | fputs ("\tTETRA\t", asm_out_file); |
1395 | mmix_print_operand (asm_out_file, x, 'L'); | |
1396 | fputc ('\n', asm_out_file); | |
1397 | return true; | |
1398 | ||
1399 | case 8: | |
7f81c162 | 1400 | /* We don't get here anymore for CONST_DOUBLE, because DImode |
1401 | isn't expressed as CONST_DOUBLE, and DFmode is handled | |
1402 | elsewhere. */ | |
1403 | gcc_assert (GET_CODE (x) != CONST_DOUBLE); | |
4f4e478d | 1404 | assemble_integer_with_op ("\tOCTA\t", x); |
58356836 | 1405 | return true; |
1406 | } | |
1407 | return default_assemble_integer (x, size, aligned_p); | |
68cbb7e3 | 1408 | } |
1409 | ||
1410 | /* ASM_OUTPUT_ASCII. */ | |
1411 | ||
1412 | void | |
7585fcd5 | 1413 | mmix_asm_output_ascii (FILE *stream, const char *string, int length) |
68cbb7e3 | 1414 | { |
1415 | while (length > 0) | |
1416 | { | |
1417 | int chunk_size = length > 60 ? 60 : length; | |
1418 | fprintf (stream, "\tBYTE "); | |
1419 | mmix_output_quoted_string (stream, string, chunk_size); | |
1420 | string += chunk_size; | |
1421 | length -= chunk_size; | |
1422 | fprintf (stream, "\n"); | |
1423 | } | |
1424 | } | |
1425 | ||
1426 | /* ASM_OUTPUT_ALIGNED_COMMON. */ | |
1427 | ||
1428 | void | |
7585fcd5 | 1429 | mmix_asm_output_aligned_common (FILE *stream, |
1430 | const char *name, | |
1431 | int size, | |
1432 | int align) | |
68cbb7e3 | 1433 | { |
1434 | /* This is mostly the elfos.h one. There doesn't seem to be a way to | |
1435 | express this in a mmixal-compatible way. */ | |
1436 | fprintf (stream, "\t.comm\t"); | |
1437 | assemble_name (stream, name); | |
1438 | fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n", | |
1439 | size, align / BITS_PER_UNIT); | |
1440 | } | |
1441 | ||
1442 | /* ASM_OUTPUT_ALIGNED_LOCAL. */ | |
1443 | ||
1444 | void | |
7585fcd5 | 1445 | mmix_asm_output_aligned_local (FILE *stream, |
1446 | const char *name, | |
1447 | int size, | |
1448 | int align) | |
68cbb7e3 | 1449 | { |
2f14b1f9 | 1450 | switch_to_section (data_section); |
68cbb7e3 | 1451 | |
1452 | ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT)); | |
1453 | assemble_name (stream, name); | |
1454 | fprintf (stream, "\tLOC @+%d\n", size); | |
1455 | } | |
1456 | ||
1457 | /* ASM_OUTPUT_LABEL. */ | |
1458 | ||
1459 | void | |
7585fcd5 | 1460 | mmix_asm_output_label (FILE *stream, const char *name) |
68cbb7e3 | 1461 | { |
1462 | assemble_name (stream, name); | |
1463 | fprintf (stream, "\tIS @\n"); | |
1464 | } | |
1465 | ||
af1c039b | 1466 | /* ASM_OUTPUT_INTERNAL_LABEL. */ |
1467 | ||
1468 | void | |
1469 | mmix_asm_output_internal_label (FILE *stream, const char *name) | |
1470 | { | |
1471 | assemble_name_raw (stream, name); | |
1472 | fprintf (stream, "\tIS @\n"); | |
1473 | } | |
1474 | ||
68cbb7e3 | 1475 | /* ASM_DECLARE_REGISTER_GLOBAL. */ |
1476 | ||
1477 | void | |
7585fcd5 | 1478 | mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED, |
1479 | tree decl ATTRIBUTE_UNUSED, | |
1480 | int regno ATTRIBUTE_UNUSED, | |
1481 | const char *name ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1482 | { |
1483 | /* Nothing to do here, but there *will* be, therefore the framework is | |
1484 | here. */ | |
1485 | } | |
1486 | ||
68cbb7e3 | 1487 | /* ASM_WEAKEN_LABEL. */ |
1488 | ||
1489 | void | |
7585fcd5 | 1490 | mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED, |
1491 | const char *name ATTRIBUTE_UNUSED) | |
68cbb7e3 | 1492 | { |
7fe1d31c | 1493 | fprintf (stream, "\t.weak "); |
68cbb7e3 | 1494 | assemble_name (stream, name); |
7fe1d31c | 1495 | fprintf (stream, " ! mmixal-incompatible\n"); |
68cbb7e3 | 1496 | } |
1497 | ||
1498 | /* MAKE_DECL_ONE_ONLY. */ | |
1499 | ||
1500 | void | |
7585fcd5 | 1501 | mmix_make_decl_one_only (tree decl) |
68cbb7e3 | 1502 | { |
1503 | DECL_WEAK (decl) = 1; | |
1504 | } | |
1505 | ||
1506 | /* ASM_OUTPUT_LABELREF. | |
1507 | Strip GCC's '*' and our own '@'. No order is assumed. */ | |
1508 | ||
1509 | void | |
7585fcd5 | 1510 | mmix_asm_output_labelref (FILE *stream, const char *name) |
68cbb7e3 | 1511 | { |
91009d64 | 1512 | int is_extern = 1; |
68cbb7e3 | 1513 | |
1514 | for (; (*name == '@' || *name == '*'); name++) | |
1515 | if (*name == '@') | |
91009d64 | 1516 | is_extern = 0; |
68cbb7e3 | 1517 | |
1518 | asm_fprintf (stream, "%s%U%s", | |
1519 | is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "", | |
1520 | name); | |
1521 | } | |
1522 | ||
68cbb7e3 | 1523 | /* ASM_OUTPUT_DEF. */ |
1524 | ||
1525 | void | |
7585fcd5 | 1526 | mmix_asm_output_def (FILE *stream, const char *name, const char *value) |
68cbb7e3 | 1527 | { |
1528 | assemble_name (stream, name); | |
1529 | fprintf (stream, "\tIS "); | |
1530 | assemble_name (stream, value); | |
1531 | fputc ('\n', stream); | |
1532 | } | |
1533 | ||
7a7fb407 | 1534 | /* TARGET_PRINT_OPERAND. */ |
68cbb7e3 | 1535 | |
7a7fb407 | 1536 | static void |
7585fcd5 | 1537 | mmix_print_operand (FILE *stream, rtx x, int code) |
68cbb7e3 | 1538 | { |
1539 | /* When we add support for different codes later, we can, when needed, | |
1540 | drop through to the main handler with a modified operand. */ | |
1541 | rtx modified_x = x; | |
d68ffc6f | 1542 | int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0; |
68cbb7e3 | 1543 | |
1544 | switch (code) | |
1545 | { | |
1546 | /* Unrelated codes are in alphabetic order. */ | |
1547 | ||
91009d64 | 1548 | case '+': |
1549 | /* For conditional branches, output "P" for a probable branch. */ | |
1550 | if (TARGET_BRANCH_PREDICT) | |
1551 | { | |
1552 | x = find_reg_note (current_output_insn, REG_BR_PROB, 0); | |
9eb946de | 1553 | if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2) |
91009d64 | 1554 | putc ('P', stream); |
1555 | } | |
1556 | return; | |
1557 | ||
0b123c47 | 1558 | case '.': |
1559 | /* For the %d in POP %d,0. */ | |
1560 | fprintf (stream, "%d", MMIX_POP_ARGUMENT ()); | |
1561 | return; | |
1562 | ||
68cbb7e3 | 1563 | case 'B': |
1564 | if (GET_CODE (x) != CONST_INT) | |
1565 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1566 | fprintf (stream, "%d", (int) (INTVAL (x) & 0xff)); | |
1567 | return; | |
1568 | ||
1569 | case 'H': | |
1570 | /* Highpart. Must be general register, and not the last one, as | |
1571 | that one cannot be part of a consecutive register pair. */ | |
d68ffc6f | 1572 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1573 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
68cbb7e3 | 1574 | |
1575 | /* This is big-endian, so the high-part is the first one. */ | |
d68ffc6f | 1576 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); |
68cbb7e3 | 1577 | return; |
1578 | ||
1579 | case 'L': | |
1580 | /* Lowpart. Must be CONST_INT or general register, and not the last | |
1581 | one, as that one cannot be part of a consecutive register pair. */ | |
1582 | if (GET_CODE (x) == CONST_INT) | |
1583 | { | |
1584 | fprintf (stream, "#%lx", | |
1585 | (unsigned long) (INTVAL (x) | |
1586 | & ((unsigned int) 0x7fffffff * 2 + 1))); | |
1587 | return; | |
1588 | } | |
1589 | ||
1590 | if (GET_CODE (x) == SYMBOL_REF) | |
1591 | { | |
1592 | output_addr_const (stream, x); | |
1593 | return; | |
1594 | } | |
1595 | ||
d68ffc6f | 1596 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1597 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
68cbb7e3 | 1598 | |
1599 | /* This is big-endian, so the low-part is + 1. */ | |
d68ffc6f | 1600 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]); |
68cbb7e3 | 1601 | return; |
1602 | ||
1603 | /* Can't use 'a' because that's a generic modifier for address | |
1604 | output. */ | |
1605 | case 'A': | |
1606 | mmix_output_shiftvalue_op_from_str (stream, "ANDN", | |
3a4303e7 | 1607 | ~(uint64_t) |
68cbb7e3 | 1608 | mmix_intval (x)); |
1609 | return; | |
1610 | ||
1611 | case 'i': | |
1612 | mmix_output_shiftvalue_op_from_str (stream, "INC", | |
3a4303e7 | 1613 | (uint64_t) |
68cbb7e3 | 1614 | mmix_intval (x)); |
1615 | return; | |
1616 | ||
1617 | case 'o': | |
1618 | mmix_output_shiftvalue_op_from_str (stream, "OR", | |
3a4303e7 | 1619 | (uint64_t) |
68cbb7e3 | 1620 | mmix_intval (x)); |
1621 | return; | |
1622 | ||
1623 | case 's': | |
1624 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 1625 | (uint64_t) |
68cbb7e3 | 1626 | mmix_intval (x)); |
1627 | return; | |
1628 | ||
1629 | case 'd': | |
1630 | case 'D': | |
1631 | mmix_output_condition (stream, x, (code == 'D')); | |
1632 | return; | |
1633 | ||
1634 | case 'e': | |
1635 | /* Output an extra "e" to make fcmpe, fune. */ | |
1636 | if (TARGET_FCMP_EPSILON) | |
1637 | fprintf (stream, "e"); | |
1638 | return; | |
1639 | ||
1640 | case 'm': | |
1641 | /* Output the number minus 1. */ | |
1642 | if (GET_CODE (x) != CONST_INT) | |
1643 | { | |
1644 | fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT", | |
1645 | x); | |
1646 | } | |
f03df321 | 1647 | fprintf (stream, "%" PRId64, |
3a4303e7 | 1648 | (int64_t) (mmix_intval (x) - 1)); |
68cbb7e3 | 1649 | return; |
1650 | ||
1651 | case 'p': | |
1652 | /* Store the number of registers we want to save. This was setup | |
1653 | by the prologue. The actual operand contains the number of | |
1654 | registers to pass, but we don't use it currently. Anyway, we | |
1655 | need to output the number of saved registers here. */ | |
d68ffc6f | 1656 | fprintf (stream, "%d", |
1657 | cfun->machine->highest_saved_stack_register + 1); | |
68cbb7e3 | 1658 | return; |
1659 | ||
1660 | case 'r': | |
1661 | /* Store the register to output a constant to. */ | |
1662 | if (! REG_P (x)) | |
68435912 | 1663 | fatal_insn ("MMIX Internal: Expected a register, not this", x); |
d68ffc6f | 1664 | mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno); |
68cbb7e3 | 1665 | return; |
1666 | ||
1667 | case 'I': | |
1668 | /* Output the constant. Note that we use this for floats as well. */ | |
1669 | if (GET_CODE (x) != CONST_INT | |
1670 | && (GET_CODE (x) != CONST_DOUBLE | |
1671 | || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode | |
1672 | && GET_MODE (x) != SFmode))) | |
68435912 | 1673 | fatal_insn ("MMIX Internal: Expected a constant, not this", x); |
68cbb7e3 | 1674 | mmix_output_register_setting (stream, |
1675 | mmix_output_destination_register, | |
1676 | mmix_intval (x), 0); | |
1677 | return; | |
1678 | ||
1679 | case 'U': | |
1680 | /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */ | |
1681 | if (TARGET_ZERO_EXTEND) | |
1682 | putc ('U', stream); | |
1683 | return; | |
1684 | ||
1685 | case 'v': | |
3a4303e7 | 1686 | mmix_output_shifted_value (stream, (int64_t) mmix_intval (x)); |
68cbb7e3 | 1687 | return; |
1688 | ||
1689 | case 'V': | |
3a4303e7 | 1690 | mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x)); |
68cbb7e3 | 1691 | return; |
1692 | ||
1693 | case 'W': | |
1694 | if (GET_CODE (x) != CONST_INT) | |
1695 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1696 | fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff)); | |
1697 | return; | |
1698 | ||
1699 | case 0: | |
1700 | /* Nothing to do. */ | |
1701 | break; | |
1702 | ||
1703 | default: | |
1704 | /* Presumably there's a missing case above if we get here. */ | |
1e5fcbe2 | 1705 | internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code); |
68cbb7e3 | 1706 | } |
1707 | ||
1708 | switch (GET_CODE (modified_x)) | |
1709 | { | |
1710 | case REG: | |
d68ffc6f | 1711 | regno = REGNO (modified_x); |
1712 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1713 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
1714 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); | |
68cbb7e3 | 1715 | return; |
1716 | ||
1717 | case MEM: | |
1718 | output_address (XEXP (modified_x, 0)); | |
1719 | return; | |
1720 | ||
1721 | case CONST_INT: | |
1722 | /* For -2147483648, mmixal complains that the constant does not fit | |
1723 | in 4 bytes, so let's output it as hex. Take care to handle hosts | |
1724 | where HOST_WIDE_INT is longer than an int. | |
1725 | ||
1726 | Print small constants +-255 using decimal. */ | |
1727 | ||
1728 | if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256) | |
1729 | fprintf (stream, "%d", (int) (INTVAL (modified_x))); | |
1730 | else | |
1731 | fprintf (stream, "#%x", | |
1732 | (int) (INTVAL (modified_x)) & (unsigned int) ~0); | |
1733 | return; | |
1734 | ||
1735 | case CONST_DOUBLE: | |
1736 | /* Do somewhat as CONST_INT. */ | |
58356836 | 1737 | mmix_output_octa (stream, mmix_intval (modified_x), 0); |
68cbb7e3 | 1738 | return; |
1739 | ||
1740 | case CONST: | |
1741 | output_addr_const (stream, modified_x); | |
1742 | return; | |
1743 | ||
1744 | default: | |
1745 | /* No need to test for all strange things. Let output_addr_const do | |
1746 | it for us. */ | |
1747 | if (CONSTANT_P (modified_x) | |
1748 | /* Strangely enough, this is not included in CONSTANT_P. | |
1749 | FIXME: Ask/check about sanity here. */ | |
aa90bb35 | 1750 | || LABEL_P (modified_x)) |
68cbb7e3 | 1751 | { |
1752 | output_addr_const (stream, modified_x); | |
1753 | return; | |
1754 | } | |
1755 | ||
1756 | /* We need the original here. */ | |
1757 | fatal_insn ("MMIX Internal: Cannot decode this operand", x); | |
1758 | } | |
1759 | } | |
1760 | ||
7a7fb407 | 1761 | /* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ |
68cbb7e3 | 1762 | |
7a7fb407 | 1763 | static bool |
1764 | mmix_print_operand_punct_valid_p (unsigned char code) | |
68cbb7e3 | 1765 | { |
91009d64 | 1766 | /* A '+' is used for branch prediction, similar to other ports. */ |
0b123c47 | 1767 | return code == '+' |
1768 | /* A '.' is used for the %d in the POP %d,0 return insn. */ | |
1769 | || code == '.'; | |
68cbb7e3 | 1770 | } |
1771 | ||
7a7fb407 | 1772 | /* TARGET_PRINT_OPERAND_ADDRESS. */ |
68cbb7e3 | 1773 | |
7a7fb407 | 1774 | static void |
7585fcd5 | 1775 | mmix_print_operand_address (FILE *stream, rtx x) |
68cbb7e3 | 1776 | { |
1777 | if (REG_P (x)) | |
1778 | { | |
1779 | /* I find the generated assembly code harder to read without | |
1780 | the ",0". */ | |
d68ffc6f | 1781 | fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]); |
68cbb7e3 | 1782 | return; |
1783 | } | |
1784 | else if (GET_CODE (x) == PLUS) | |
1785 | { | |
1786 | rtx x1 = XEXP (x, 0); | |
1787 | rtx x2 = XEXP (x, 1); | |
1788 | ||
68cbb7e3 | 1789 | if (REG_P (x1)) |
1790 | { | |
d68ffc6f | 1791 | fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]); |
68cbb7e3 | 1792 | |
1793 | if (REG_P (x2)) | |
1794 | { | |
d68ffc6f | 1795 | fprintf (stream, "%s", |
1796 | reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]); | |
68cbb7e3 | 1797 | return; |
1798 | } | |
f105c84e | 1799 | else if (satisfies_constraint_I (x2)) |
68cbb7e3 | 1800 | { |
1801 | output_addr_const (stream, x2); | |
1802 | return; | |
1803 | } | |
1804 | } | |
1805 | } | |
1806 | ||
ca316360 | 1807 | if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x)) |
f0b228a5 | 1808 | { |
1809 | output_addr_const (stream, x); | |
1810 | return; | |
1811 | } | |
1812 | ||
68cbb7e3 | 1813 | fatal_insn ("MMIX Internal: This is not a recognized address", x); |
1814 | } | |
1815 | ||
1816 | /* ASM_OUTPUT_REG_PUSH. */ | |
1817 | ||
1818 | void | |
7585fcd5 | 1819 | mmix_asm_output_reg_push (FILE *stream, int regno) |
68cbb7e3 | 1820 | { |
1821 | fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n", | |
1822 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
1823 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
d68ffc6f | 1824 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
68cbb7e3 | 1825 | reg_names[MMIX_STACK_POINTER_REGNUM]); |
1826 | } | |
1827 | ||
1828 | /* ASM_OUTPUT_REG_POP. */ | |
1829 | ||
1830 | void | |
7585fcd5 | 1831 | mmix_asm_output_reg_pop (FILE *stream, int regno) |
68cbb7e3 | 1832 | { |
1833 | fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n", | |
d68ffc6f | 1834 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
68cbb7e3 | 1835 | reg_names[MMIX_STACK_POINTER_REGNUM], |
1836 | reg_names[MMIX_STACK_POINTER_REGNUM]); | |
1837 | } | |
1838 | ||
1839 | /* ASM_OUTPUT_ADDR_DIFF_ELT. */ | |
1840 | ||
1841 | void | |
7585fcd5 | 1842 | mmix_asm_output_addr_diff_elt (FILE *stream, |
1843 | rtx body ATTRIBUTE_UNUSED, | |
1844 | int value, | |
1845 | int rel) | |
68cbb7e3 | 1846 | { |
1847 | fprintf (stream, "\tTETRA L%d-L%d\n", value, rel); | |
1848 | } | |
1849 | ||
1850 | /* ASM_OUTPUT_ADDR_VEC_ELT. */ | |
1851 | ||
1852 | void | |
7585fcd5 | 1853 | mmix_asm_output_addr_vec_elt (FILE *stream, int value) |
68cbb7e3 | 1854 | { |
1855 | fprintf (stream, "\tOCTA L:%d\n", value); | |
1856 | } | |
1857 | ||
1858 | /* ASM_OUTPUT_SKIP. */ | |
1859 | ||
1860 | void | |
7585fcd5 | 1861 | mmix_asm_output_skip (FILE *stream, int nbytes) |
68cbb7e3 | 1862 | { |
1863 | fprintf (stream, "\tLOC @+%d\n", nbytes); | |
1864 | } | |
1865 | ||
1866 | /* ASM_OUTPUT_ALIGN. */ | |
1867 | ||
1868 | void | |
7585fcd5 | 1869 | mmix_asm_output_align (FILE *stream, int power) |
68cbb7e3 | 1870 | { |
1871 | /* We need to record the needed alignment of this section in the object, | |
1872 | so we have to output an alignment directive. Use a .p2align (not | |
1873 | .align) so people will never have to wonder about whether the | |
1874 | argument is in number of bytes or the log2 thereof. We do it in | |
1875 | addition to the LOC directive, so nothing needs tweaking when | |
1876 | copy-pasting assembly into mmixal. */ | |
1877 | fprintf (stream, "\t.p2align %d\n", power); | |
1878 | fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1); | |
1879 | } | |
1880 | ||
1881 | /* DBX_REGISTER_NUMBER. */ | |
1882 | ||
c0dae7df | 1883 | unsigned |
1884 | mmix_dbx_register_number (unsigned regno) | |
68cbb7e3 | 1885 | { |
d68ffc6f | 1886 | /* Adjust the register number to the one it will be output as, dammit. |
1887 | It'd be nice if we could check the assumption that we're filling a | |
1888 | gap, but every register between the last saved register and parameter | |
1889 | registers might be a valid parameter register. */ | |
1890 | regno = MMIX_OUTPUT_REGNO (regno); | |
68cbb7e3 | 1891 | |
1892 | /* We need to renumber registers to get the number of the return address | |
1893 | register in the range 0..255. It is also space-saving if registers | |
1894 | mentioned in the call-frame information (which uses this function by | |
1895 | defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered | |
1896 | 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */ | |
1897 | return regno >= 224 ? (regno - 224) : (regno + 48); | |
1898 | } | |
1899 | ||
35a3065a | 1900 | /* End of target macro support functions. |
68cbb7e3 | 1901 | |
7585fcd5 | 1902 | Now the MMIX port's own functions. First the exported ones. */ |
68cbb7e3 | 1903 | |
d3310704 | 1904 | /* Wrapper for get_hard_reg_initial_val since integrate.h isn't included |
1905 | from insn-emit.c. */ | |
1906 | ||
1907 | rtx | |
3754d046 | 1908 | mmix_get_hard_reg_initial_val (machine_mode mode, int regno) |
d3310704 | 1909 | { |
1910 | return get_hard_reg_initial_val (mode, regno); | |
1911 | } | |
1912 | ||
e911aedf | 1913 | /* Nonzero when the function epilogue is simple enough that a single |
d3310704 | 1914 | "POP %d,0" should be used even within the function. */ |
0b123c47 | 1915 | |
1916 | int | |
7585fcd5 | 1917 | mmix_use_simple_return (void) |
0b123c47 | 1918 | { |
1919 | int regno; | |
1920 | ||
1921 | int stack_space_to_allocate | |
abe32cce | 1922 | = (crtl->outgoing_args_size |
1923 | + crtl->args.pretend_args_size | |
0b123c47 | 1924 | + get_frame_size () + 7) & ~7; |
1925 | ||
1926 | if (!TARGET_USE_RETURN_INSN || !reload_completed) | |
1927 | return 0; | |
1928 | ||
1929 | for (regno = 255; | |
1930 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1931 | regno--) | |
1932 | /* Note that we assume that the frame-pointer-register is one of these | |
1933 | registers, in which case we don't count it here. */ | |
1934 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 1935 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
0b123c47 | 1936 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1937 | return 0; | |
1938 | ||
1939 | if (frame_pointer_needed) | |
1940 | stack_space_to_allocate += 8; | |
1941 | ||
1942 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1943 | stack_space_to_allocate += 16; | |
1944 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1945 | stack_space_to_allocate += 8; | |
1946 | ||
1947 | return stack_space_to_allocate == 0; | |
1948 | } | |
1949 | ||
d3310704 | 1950 | |
1951 | /* Expands the function prologue into RTX. */ | |
1952 | ||
1953 | void | |
7585fcd5 | 1954 | mmix_expand_prologue (void) |
d3310704 | 1955 | { |
1956 | HOST_WIDE_INT locals_size = get_frame_size (); | |
1957 | int regno; | |
1958 | HOST_WIDE_INT stack_space_to_allocate | |
abe32cce | 1959 | = (crtl->outgoing_args_size |
1960 | + crtl->args.pretend_args_size | |
d3310704 | 1961 | + locals_size + 7) & ~7; |
1962 | HOST_WIDE_INT offset = -8; | |
1963 | ||
1964 | /* Add room needed to save global non-register-stack registers. */ | |
1965 | for (regno = 255; | |
1966 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1967 | regno--) | |
1968 | /* Note that we assume that the frame-pointer-register is one of these | |
1969 | registers, in which case we don't count it here. */ | |
1970 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 1971 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
d3310704 | 1972 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1973 | stack_space_to_allocate += 8; | |
1974 | ||
1975 | /* If we do have a frame-pointer, add room for it. */ | |
1976 | if (frame_pointer_needed) | |
1977 | stack_space_to_allocate += 8; | |
1978 | ||
1979 | /* If we have a non-local label, we need to be able to unwind to it, so | |
1980 | store the current register stack pointer. Also store the return | |
1981 | address if we do that. */ | |
1982 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1983 | stack_space_to_allocate += 16; | |
1984 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1985 | /* If we do have a saved return-address slot, add room for it. */ | |
1986 | stack_space_to_allocate += 8; | |
1987 | ||
1988 | /* Make sure we don't get an unaligned stack. */ | |
1989 | if ((stack_space_to_allocate % 8) != 0) | |
7781aa77 | 1990 | internal_error ("stack frame not a multiple of 8 bytes: %wd", |
d3310704 | 1991 | stack_space_to_allocate); |
1992 | ||
abe32cce | 1993 | if (crtl->args.pretend_args_size) |
d3310704 | 1994 | { |
1995 | int mmix_first_vararg_reg | |
1996 | = (MMIX_FIRST_INCOMING_ARG_REGNUM | |
1997 | + (MMIX_MAX_ARGS_IN_REGS | |
abe32cce | 1998 | - crtl->args.pretend_args_size / 8)); |
d3310704 | 1999 | |
2000 | for (regno | |
2001 | = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1; | |
2002 | regno >= mmix_first_vararg_reg; | |
2003 | regno--) | |
2004 | { | |
2005 | if (offset < 0) | |
2006 | { | |
2007 | HOST_WIDE_INT stack_chunk | |
2008 | = stack_space_to_allocate > (256 - 8) | |
2009 | ? (256 - 8) : stack_space_to_allocate; | |
2010 | ||
2011 | mmix_emit_sp_add (-stack_chunk); | |
2012 | offset += stack_chunk; | |
2013 | stack_space_to_allocate -= stack_chunk; | |
2014 | } | |
2015 | ||
2016 | /* These registers aren't actually saved (as in "will be | |
2017 | restored"), so don't tell DWARF2 they're saved. */ | |
2018 | emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2019 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2020 | offset)), |
2021 | gen_rtx_REG (DImode, regno)); | |
2022 | offset -= 8; | |
2023 | } | |
2024 | } | |
2025 | ||
2026 | /* Store the frame-pointer. */ | |
2027 | ||
2028 | if (frame_pointer_needed) | |
2029 | { | |
2030 | rtx insn; | |
2031 | ||
2032 | if (offset < 0) | |
2033 | { | |
2034 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2035 | HOST_WIDE_INT stack_chunk | |
2036 | = stack_space_to_allocate > (256 - 8 - 8) | |
2037 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2038 | ||
2039 | mmix_emit_sp_add (-stack_chunk); | |
2040 | ||
2041 | offset += stack_chunk; | |
2042 | stack_space_to_allocate -= stack_chunk; | |
2043 | } | |
2044 | ||
2045 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2046 | plus_constant (Pmode, |
2047 | stack_pointer_rtx, | |
d3310704 | 2048 | offset)), |
2049 | hard_frame_pointer_rtx); | |
2050 | RTX_FRAME_RELATED_P (insn) = 1; | |
2051 | insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, | |
2052 | stack_pointer_rtx, | |
2053 | GEN_INT (offset + 8))); | |
2054 | RTX_FRAME_RELATED_P (insn) = 1; | |
2055 | offset -= 8; | |
2056 | } | |
2057 | ||
2058 | if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2059 | { | |
2060 | rtx tmpreg, retreg; | |
2061 | rtx insn; | |
2062 | ||
2063 | /* Store the return-address, if one is needed on the stack. We | |
2064 | usually store it in a register when needed, but that doesn't work | |
2065 | with -fexceptions. */ | |
2066 | ||
2067 | if (offset < 0) | |
2068 | { | |
2069 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2070 | HOST_WIDE_INT stack_chunk | |
2071 | = stack_space_to_allocate > (256 - 8 - 8) | |
2072 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2073 | ||
2074 | mmix_emit_sp_add (-stack_chunk); | |
2075 | ||
2076 | offset += stack_chunk; | |
2077 | stack_space_to_allocate -= stack_chunk; | |
2078 | } | |
2079 | ||
2080 | tmpreg = gen_rtx_REG (DImode, 255); | |
2081 | retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM); | |
2082 | ||
2083 | /* Dwarf2 code is confused by the use of a temporary register for | |
2084 | storing the return address, so we have to express it as a note, | |
2085 | which we attach to the actual store insn. */ | |
2086 | emit_move_insn (tmpreg, retreg); | |
2087 | ||
2088 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2089 | plus_constant (Pmode, |
2090 | stack_pointer_rtx, | |
d3310704 | 2091 | offset)), |
2092 | tmpreg); | |
2093 | RTX_FRAME_RELATED_P (insn) = 1; | |
c0dae7df | 2094 | add_reg_note (insn, REG_FRAME_RELATED_EXPR, |
d1f9b275 | 2095 | gen_rtx_SET (gen_rtx_MEM (DImode, |
29c05e22 | 2096 | plus_constant (Pmode, |
2097 | stack_pointer_rtx, | |
c0dae7df | 2098 | offset)), |
2099 | retreg)); | |
d3310704 | 2100 | |
2101 | offset -= 8; | |
2102 | } | |
2103 | else if (MMIX_CFUN_HAS_LANDING_PAD) | |
2104 | offset -= 8; | |
2105 | ||
2106 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2107 | { | |
2108 | /* Store the register defining the numbering of local registers, so | |
2109 | we know how long to unwind the register stack. */ | |
2110 | ||
2111 | if (offset < 0) | |
2112 | { | |
2113 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2114 | HOST_WIDE_INT stack_chunk | |
2115 | = stack_space_to_allocate > (256 - 8 - 8) | |
2116 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2117 | ||
2118 | mmix_emit_sp_add (-stack_chunk); | |
2119 | ||
2120 | offset += stack_chunk; | |
2121 | stack_space_to_allocate -= stack_chunk; | |
2122 | } | |
2123 | ||
2124 | /* We don't tell dwarf2 about this one; we just have it to unwind | |
2125 | the register stack at landing pads. FIXME: It's a kludge because | |
2126 | we can't describe the effect of the PUSHJ and PUSHGO insns on the | |
2127 | register stack at the moment. Best thing would be to handle it | |
2128 | like stack-pointer offsets. Better: some hook into dwarf2out.c | |
2129 | to produce DW_CFA_expression:s that specify the increment of rO, | |
2130 | and unwind it at eh_return (preferred) or at the landing pad. | |
2131 | Then saves to $0..$G-1 could be specified through that register. */ | |
2132 | ||
2133 | emit_move_insn (gen_rtx_REG (DImode, 255), | |
2134 | gen_rtx_REG (DImode, | |
2135 | MMIX_rO_REGNUM)); | |
2136 | emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2137 | plus_constant (Pmode, stack_pointer_rtx, |
2138 | offset)), | |
d3310704 | 2139 | gen_rtx_REG (DImode, 255)); |
2140 | offset -= 8; | |
2141 | } | |
2142 | ||
2143 | /* After the return-address and the frame-pointer, we have the local | |
2144 | variables. They're the ones that may have an "unaligned" size. */ | |
2145 | offset -= (locals_size + 7) & ~7; | |
2146 | ||
2147 | /* Now store all registers that are global, i.e. not saved by the | |
2148 | register file machinery. | |
2149 | ||
2150 | It is assumed that the frame-pointer is one of these registers, so it | |
2151 | is explicitly excluded in the count. */ | |
2152 | ||
2153 | for (regno = 255; | |
2154 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2155 | regno--) | |
2156 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2157 | && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
d3310704 | 2158 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2159 | { | |
2160 | rtx insn; | |
2161 | ||
2162 | if (offset < 0) | |
2163 | { | |
2164 | HOST_WIDE_INT stack_chunk | |
2165 | = (stack_space_to_allocate > (256 - offset - 8) | |
2166 | ? (256 - offset - 8) : stack_space_to_allocate); | |
2167 | ||
2168 | mmix_emit_sp_add (-stack_chunk); | |
2169 | offset += stack_chunk; | |
2170 | stack_space_to_allocate -= stack_chunk; | |
2171 | } | |
2172 | ||
2173 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
29c05e22 | 2174 | plus_constant (Pmode, |
2175 | stack_pointer_rtx, | |
d3310704 | 2176 | offset)), |
2177 | gen_rtx_REG (DImode, regno)); | |
2178 | RTX_FRAME_RELATED_P (insn) = 1; | |
2179 | offset -= 8; | |
2180 | } | |
2181 | ||
2182 | /* Finally, allocate room for outgoing args and local vars if room | |
2183 | wasn't allocated above. */ | |
2184 | if (stack_space_to_allocate) | |
2185 | mmix_emit_sp_add (-stack_space_to_allocate); | |
2186 | } | |
2187 | ||
2188 | /* Expands the function epilogue into RTX. */ | |
2189 | ||
2190 | void | |
7585fcd5 | 2191 | mmix_expand_epilogue (void) |
d3310704 | 2192 | { |
2193 | HOST_WIDE_INT locals_size = get_frame_size (); | |
2194 | int regno; | |
2195 | HOST_WIDE_INT stack_space_to_deallocate | |
abe32cce | 2196 | = (crtl->outgoing_args_size |
2197 | + crtl->args.pretend_args_size | |
d3310704 | 2198 | + locals_size + 7) & ~7; |
2199 | ||
d3310704 | 2200 | /* The first address to access is beyond the outgoing_args area. */ |
abe32cce | 2201 | HOST_WIDE_INT offset = crtl->outgoing_args_size; |
d3310704 | 2202 | |
2203 | /* Add the space for global non-register-stack registers. | |
2204 | It is assumed that the frame-pointer register can be one of these | |
2205 | registers, in which case it is excluded from the count when needed. */ | |
2206 | for (regno = 255; | |
2207 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2208 | regno--) | |
2209 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2210 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
d3310704 | 2211 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2212 | stack_space_to_deallocate += 8; | |
2213 | ||
2214 | /* Add in the space for register stack-pointer. If so, always add room | |
2215 | for the saved PC. */ | |
2216 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2217 | stack_space_to_deallocate += 16; | |
2218 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2219 | /* If we have a saved return-address slot, add it in. */ | |
2220 | stack_space_to_deallocate += 8; | |
2221 | ||
2222 | /* Add in the frame-pointer. */ | |
2223 | if (frame_pointer_needed) | |
2224 | stack_space_to_deallocate += 8; | |
2225 | ||
2226 | /* Make sure we don't get an unaligned stack. */ | |
2227 | if ((stack_space_to_deallocate % 8) != 0) | |
7781aa77 | 2228 | internal_error ("stack frame not a multiple of octabyte: %wd", |
d3310704 | 2229 | stack_space_to_deallocate); |
2230 | ||
2231 | /* We will add back small offsets to the stack pointer as we go. | |
2232 | First, we restore all registers that are global, i.e. not saved by | |
2233 | the register file machinery. */ | |
2234 | ||
2235 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
2236 | regno <= 255; | |
2237 | regno++) | |
2238 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
3072d30e | 2239 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
d3310704 | 2240 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2241 | { | |
2242 | if (offset > 255) | |
2243 | { | |
2244 | mmix_emit_sp_add (offset); | |
2245 | stack_space_to_deallocate -= offset; | |
2246 | offset = 0; | |
2247 | } | |
2248 | ||
2249 | emit_move_insn (gen_rtx_REG (DImode, regno), | |
2250 | gen_rtx_MEM (DImode, | |
29c05e22 | 2251 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2252 | offset))); |
2253 | offset += 8; | |
2254 | } | |
2255 | ||
2256 | /* Here is where the local variables were. As in the prologue, they | |
2257 | might be of an unaligned size. */ | |
2258 | offset += (locals_size + 7) & ~7; | |
2259 | ||
d3310704 | 2260 | /* The saved register stack pointer is just below the frame-pointer |
2261 | register. We don't need to restore it "manually"; the POP | |
2262 | instruction does that. */ | |
2263 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2264 | offset += 16; | |
2265 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2266 | /* The return-address slot is just below the frame-pointer register. | |
2267 | We don't need to restore it because we don't really use it. */ | |
2268 | offset += 8; | |
2269 | ||
2270 | /* Get back the old frame-pointer-value. */ | |
2271 | if (frame_pointer_needed) | |
2272 | { | |
2273 | if (offset > 255) | |
2274 | { | |
2275 | mmix_emit_sp_add (offset); | |
2276 | ||
2277 | stack_space_to_deallocate -= offset; | |
2278 | offset = 0; | |
2279 | } | |
2280 | ||
2281 | emit_move_insn (hard_frame_pointer_rtx, | |
2282 | gen_rtx_MEM (DImode, | |
29c05e22 | 2283 | plus_constant (Pmode, stack_pointer_rtx, |
d3310704 | 2284 | offset))); |
2285 | offset += 8; | |
2286 | } | |
2287 | ||
2288 | /* We do not need to restore pretended incoming args, just add back | |
2289 | offset to sp. */ | |
2290 | if (stack_space_to_deallocate != 0) | |
2291 | mmix_emit_sp_add (stack_space_to_deallocate); | |
2292 | ||
18d50ae6 | 2293 | if (crtl->calls_eh_return) |
d3310704 | 2294 | /* Adjust the (normal) stack-pointer to that of the receiver. |
2295 | FIXME: It would be nice if we could also adjust the register stack | |
2296 | here, but we need to express it through DWARF 2 too. */ | |
2297 | emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, | |
2298 | gen_rtx_REG (DImode, | |
2299 | MMIX_EH_RETURN_STACKADJ_REGNUM))); | |
2300 | } | |
2301 | ||
68cbb7e3 | 2302 | /* Output an optimal sequence for setting a register to a specific |
2303 | constant. Used in an alternative for const_ints in movdi, and when | |
2304 | using large stack-frame offsets. | |
2305 | ||
2306 | Use do_begin_end to say if a line-starting TAB and newline before the | |
2307 | first insn and after the last insn is wanted. */ | |
2308 | ||
2309 | void | |
7585fcd5 | 2310 | mmix_output_register_setting (FILE *stream, |
2311 | int regno, | |
3a4303e7 | 2312 | int64_t value, |
7585fcd5 | 2313 | int do_begin_end) |
68cbb7e3 | 2314 | { |
2315 | if (do_begin_end) | |
2316 | fprintf (stream, "\t"); | |
2317 | ||
4d66cf01 | 2318 | if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K)) |
f03df321 | 2319 | fprintf (stream, "NEGU %s,0,%" PRId64, reg_names[regno], -value); |
3a4303e7 | 2320 | else if (mmix_shiftable_wyde_value ((uint64_t) value)) |
68cbb7e3 | 2321 | { |
2322 | /* First, the one-insn cases. */ | |
2323 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2324 | (uint64_t) |
68cbb7e3 | 2325 | value); |
2326 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2327 | mmix_output_shifted_value (stream, (uint64_t) value); |
68cbb7e3 | 2328 | } |
3a4303e7 | 2329 | else if (mmix_shiftable_wyde_value (-(uint64_t) value)) |
68cbb7e3 | 2330 | { |
2331 | /* We do this to get a bit more legible assembly code. The next | |
2332 | alternative is mostly redundant with this. */ | |
2333 | ||
2334 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2335 | -(uint64_t) |
68cbb7e3 | 2336 | value); |
2337 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2338 | mmix_output_shifted_value (stream, -(uint64_t) value); |
68cbb7e3 | 2339 | fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno], |
2340 | reg_names[regno]); | |
2341 | } | |
3a4303e7 | 2342 | else if (mmix_shiftable_wyde_value (~(uint64_t) value)) |
68cbb7e3 | 2343 | { |
2344 | /* Slightly more expensive, the two-insn cases. */ | |
2345 | ||
2346 | /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255) | |
2347 | is shiftable, or any other one-insn transformation of the value. | |
2348 | FIXME: Check first if the value is "shiftable" by two loading | |
2349 | with two insns, since it makes more readable assembly code (if | |
2350 | anyone else cares). */ | |
2351 | ||
2352 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
3a4303e7 | 2353 | ~(uint64_t) |
68cbb7e3 | 2354 | value); |
2355 | fprintf (stream, " %s,", reg_names[regno]); | |
3a4303e7 | 2356 | mmix_output_shifted_value (stream, ~(uint64_t) value); |
68cbb7e3 | 2357 | fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno], |
2358 | reg_names[regno]); | |
2359 | } | |
2360 | else | |
2361 | { | |
2362 | /* The generic case. 2..4 insns. */ | |
25037517 | 2363 | static const char *const higher_parts[] = {"L", "ML", "MH", "H"}; |
68cbb7e3 | 2364 | const char *op = "SET"; |
2365 | const char *line_begin = ""; | |
f0b228a5 | 2366 | int insns = 0; |
68cbb7e3 | 2367 | int i; |
3a4303e7 | 2368 | int64_t tmpvalue = value; |
68cbb7e3 | 2369 | |
f0b228a5 | 2370 | /* Compute the number of insns needed to output this constant. */ |
2371 | for (i = 0; i < 4 && tmpvalue != 0; i++) | |
2372 | { | |
2373 | if (tmpvalue & 65535) | |
2374 | insns++; | |
2375 | tmpvalue >>= 16; | |
2376 | } | |
2377 | if (TARGET_BASE_ADDRESSES && insns == 3) | |
2378 | { | |
2379 | /* The number three is based on a static observation on | |
2380 | ghostscript-6.52. Two and four are excluded because there | |
2381 | are too many such constants, and each unique constant (maybe | |
2382 | offset by 1..255) were used few times compared to other uses, | |
2383 | e.g. addresses. | |
2384 | ||
2385 | We use base-plus-offset addressing to force it into a global | |
2386 | register; we just use a "LDA reg,VALUE", which will cause the | |
2387 | assembler and linker to DTRT (for constants as well as | |
2388 | addresses). */ | |
2389 | fprintf (stream, "LDA %s,", reg_names[regno]); | |
2390 | mmix_output_octa (stream, value, 0); | |
2391 | } | |
2392 | else | |
68cbb7e3 | 2393 | { |
f0b228a5 | 2394 | /* Output pertinent parts of the 4-wyde sequence. |
2395 | Still more to do if we want this to be optimal, but hey... | |
2396 | Note that the zero case has been handled above. */ | |
2397 | for (i = 0; i < 4 && value != 0; i++) | |
68cbb7e3 | 2398 | { |
f0b228a5 | 2399 | if (value & 65535) |
2400 | { | |
2401 | fprintf (stream, "%s%s%s %s,#%x", line_begin, op, | |
2402 | higher_parts[i], reg_names[regno], | |
2403 | (int) (value & 65535)); | |
2404 | /* The first one sets the rest of the bits to 0, the next | |
2405 | ones add set bits. */ | |
2406 | op = "INC"; | |
2407 | line_begin = "\n\t"; | |
2408 | } | |
68cbb7e3 | 2409 | |
f0b228a5 | 2410 | value >>= 16; |
2411 | } | |
68cbb7e3 | 2412 | } |
2413 | } | |
2414 | ||
2415 | if (do_begin_end) | |
2416 | fprintf (stream, "\n"); | |
2417 | } | |
2418 | ||
2419 | /* Return 1 if value is 0..65535*2**(16*N) for N=0..3. | |
2420 | else return 0. */ | |
2421 | ||
2422 | int | |
3a4303e7 | 2423 | mmix_shiftable_wyde_value (uint64_t value) |
68cbb7e3 | 2424 | { |
2425 | /* Shift by 16 bits per group, stop when we've found two groups with | |
2426 | nonzero bits. */ | |
2427 | int i; | |
2428 | int has_candidate = 0; | |
2429 | ||
2430 | for (i = 0; i < 4; i++) | |
2431 | { | |
2432 | if (value & 65535) | |
2433 | { | |
2434 | if (has_candidate) | |
2435 | return 0; | |
2436 | else | |
2437 | has_candidate = 1; | |
2438 | } | |
2439 | ||
2440 | value >>= 16; | |
2441 | } | |
2442 | ||
2443 | return 1; | |
2444 | } | |
2445 | ||
74f4459c | 2446 | /* X and Y are two things to compare using CODE. Return the rtx for |
2447 | the cc-reg in the proper mode. */ | |
68cbb7e3 | 2448 | |
2449 | rtx | |
7585fcd5 | 2450 | mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) |
68cbb7e3 | 2451 | { |
3754d046 | 2452 | machine_mode ccmode = SELECT_CC_MODE (code, x, y); |
74f4459c | 2453 | return gen_reg_rtx (ccmode); |
68cbb7e3 | 2454 | } |
2455 | ||
2456 | /* Local (static) helper functions. */ | |
2457 | ||
d3310704 | 2458 | static void |
7585fcd5 | 2459 | mmix_emit_sp_add (HOST_WIDE_INT offset) |
d3310704 | 2460 | { |
2461 | rtx insn; | |
2462 | ||
2463 | if (offset < 0) | |
2464 | { | |
2465 | /* Negative stack-pointer adjustments are allocations and appear in | |
2466 | the prologue only. We mark them as frame-related so unwind and | |
2467 | debug info is properly emitted for them. */ | |
2468 | if (offset > -255) | |
2469 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2470 | stack_pointer_rtx, | |
2471 | GEN_INT (offset))); | |
2472 | else | |
2473 | { | |
2474 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2475 | RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1; | |
2476 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2477 | stack_pointer_rtx, tmpr)); | |
2478 | } | |
2479 | RTX_FRAME_RELATED_P (insn) = 1; | |
2480 | } | |
2481 | else | |
2482 | { | |
2483 | /* Positive adjustments are in the epilogue only. Don't mark them | |
2484 | as "frame-related" for unwind info. */ | |
f105c84e | 2485 | if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L)) |
d3310704 | 2486 | emit_insn (gen_adddi3 (stack_pointer_rtx, |
2487 | stack_pointer_rtx, | |
2488 | GEN_INT (offset))); | |
2489 | else | |
2490 | { | |
2491 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2492 | emit_move_insn (tmpr, GEN_INT (offset)); | |
2493 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2494 | stack_pointer_rtx, tmpr)); | |
2495 | } | |
2496 | } | |
2497 | } | |
2498 | ||
68cbb7e3 | 2499 | /* Print operator suitable for doing something with a shiftable |
ebb11c7b | 2500 | wyde. The type of operator is passed as an asm output modifier. */ |
68cbb7e3 | 2501 | |
2502 | static void | |
7585fcd5 | 2503 | mmix_output_shiftvalue_op_from_str (FILE *stream, |
2504 | const char *mainop, | |
3a4303e7 | 2505 | int64_t value) |
68cbb7e3 | 2506 | { |
25037517 | 2507 | static const char *const op_part[] = {"L", "ML", "MH", "H"}; |
68cbb7e3 | 2508 | int i; |
2509 | ||
2510 | if (! mmix_shiftable_wyde_value (value)) | |
2511 | { | |
2512 | char s[sizeof ("0xffffffffffffffff")]; | |
9d247a3d | 2513 | sprintf (s, "%#" PRIx64, value); |
68cbb7e3 | 2514 | internal_error ("MMIX Internal: %s is not a shiftable int", s); |
2515 | } | |
2516 | ||
2517 | for (i = 0; i < 4; i++) | |
2518 | { | |
2519 | /* We know we're through when we find one-bits in the low | |
2520 | 16 bits. */ | |
2521 | if (value & 0xffff) | |
2522 | { | |
2523 | fprintf (stream, "%s%s", mainop, op_part[i]); | |
2524 | return; | |
2525 | } | |
2526 | value >>= 16; | |
2527 | } | |
2528 | ||
2529 | /* No bits set? Then it must have been zero. */ | |
2530 | fprintf (stream, "%sL", mainop); | |
2531 | } | |
2532 | ||
2533 | /* Print a 64-bit value, optionally prefixed by assembly pseudo. */ | |
2534 | ||
2535 | static void | |
3a4303e7 | 2536 | mmix_output_octa (FILE *stream, int64_t value, int do_begin_end) |
68cbb7e3 | 2537 | { |
68cbb7e3 | 2538 | if (do_begin_end) |
2539 | fprintf (stream, "\tOCTA "); | |
2540 | ||
68cbb7e3 | 2541 | /* Provide a few alternative output formats depending on the number, to |
2542 | improve legibility of assembler output. */ | |
3a4303e7 | 2543 | if ((value < (int64_t) 0 && value > (int64_t) -10000) |
2544 | || (value >= (int64_t) 0 && value <= (int64_t) 16384)) | |
68cbb7e3 | 2545 | fprintf (stream, "%d", (int) value); |
3a4303e7 | 2546 | else if (value > (int64_t) 0 |
2547 | && value < ((int64_t) 1 << 31) * 2) | |
68cbb7e3 | 2548 | fprintf (stream, "#%x", (unsigned int) value); |
3a4303e7 | 2549 | else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t)) |
6996b123 | 2550 | /* We need to avoid the not-so-universal "0x" prefix; we need the |
2551 | pure hex-digits together with the mmixal "#" hex prefix. */ | |
2552 | fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE, | |
2553 | (HOST_WIDE_INT) value); | |
2554 | else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */ | |
9d247a3d | 2555 | fprintf (stream, "%" PRIu64, value); |
68cbb7e3 | 2556 | |
2557 | if (do_begin_end) | |
2558 | fprintf (stream, "\n"); | |
2559 | } | |
2560 | ||
2561 | /* Print the presumed shiftable wyde argument shifted into place (to | |
2562 | be output with an operand). */ | |
2563 | ||
2564 | static void | |
3a4303e7 | 2565 | mmix_output_shifted_value (FILE *stream, int64_t value) |
68cbb7e3 | 2566 | { |
2567 | int i; | |
2568 | ||
2569 | if (! mmix_shiftable_wyde_value (value)) | |
2570 | { | |
2571 | char s[16+2+1]; | |
9d247a3d | 2572 | sprintf (s, "%#" PRIx64, value); |
68cbb7e3 | 2573 | internal_error ("MMIX Internal: %s is not a shiftable int", s); |
2574 | } | |
2575 | ||
2576 | for (i = 0; i < 4; i++) | |
68cbb7e3 | 2577 | { |
7585fcd5 | 2578 | /* We know we're through when we find one-bits in the low 16 bits. */ |
2579 | if (value & 0xffff) | |
2580 | { | |
2581 | fprintf (stream, "#%x", (int) (value & 0xffff)); | |
2582 | return; | |
2583 | } | |
68cbb7e3 | 2584 | |
2585 | value >>= 16; | |
2586 | } | |
2587 | ||
2588 | /* No bits set? Then it must have been zero. */ | |
2589 | fprintf (stream, "0"); | |
2590 | } | |
2591 | ||
2592 | /* Output an MMIX condition name corresponding to an operator | |
2593 | and operands: | |
2594 | (comparison_operator [(comparison_operator ...) (const_int 0)]) | |
2595 | which means we have to look at *two* operators. | |
2596 | ||
2597 | The argument "reversed" refers to reversal of the condition (not the | |
2598 | same as swapping the arguments). */ | |
2599 | ||
2600 | static void | |
7a7fb407 | 2601 | mmix_output_condition (FILE *stream, const_rtx x, int reversed) |
68cbb7e3 | 2602 | { |
2603 | struct cc_conv | |
2604 | { | |
2605 | RTX_CODE cc; | |
2606 | ||
2607 | /* The normal output cc-code. */ | |
2608 | const char *const normal; | |
2609 | ||
2610 | /* The reversed cc-code, or NULL if invalid. */ | |
2611 | const char *const reversed; | |
2612 | }; | |
2613 | ||
2614 | struct cc_type_conv | |
2615 | { | |
3754d046 | 2616 | machine_mode cc_mode; |
68cbb7e3 | 2617 | |
21f1e711 | 2618 | /* Terminated with {UNKNOWN, NULL, NULL} */ |
68cbb7e3 | 2619 | const struct cc_conv *const convs; |
2620 | }; | |
2621 | ||
2622 | #undef CCEND | |
21f1e711 | 2623 | #define CCEND {UNKNOWN, NULL, NULL} |
68cbb7e3 | 2624 | |
2625 | static const struct cc_conv cc_fun_convs[] | |
2626 | = {{ORDERED, "Z", "P"}, | |
2627 | {UNORDERED, "P", "Z"}, | |
2628 | CCEND}; | |
2629 | static const struct cc_conv cc_fp_convs[] | |
2630 | = {{GT, "P", NULL}, | |
2631 | {LT, "N", NULL}, | |
2632 | CCEND}; | |
2633 | static const struct cc_conv cc_fpeq_convs[] | |
2634 | = {{NE, "Z", "P"}, | |
2635 | {EQ, "P", "Z"}, | |
2636 | CCEND}; | |
2637 | static const struct cc_conv cc_uns_convs[] | |
2638 | = {{GEU, "NN", "N"}, | |
2639 | {GTU, "P", "NP"}, | |
2640 | {LEU, "NP", "P"}, | |
2641 | {LTU, "N", "NN"}, | |
2642 | CCEND}; | |
2643 | static const struct cc_conv cc_signed_convs[] | |
2644 | = {{NE, "NZ", "Z"}, | |
2645 | {EQ, "Z", "NZ"}, | |
2646 | {GE, "NN", "N"}, | |
2647 | {GT, "P", "NP"}, | |
2648 | {LE, "NP", "P"}, | |
2649 | {LT, "N", "NN"}, | |
2650 | CCEND}; | |
2651 | static const struct cc_conv cc_di_convs[] | |
2652 | = {{NE, "NZ", "Z"}, | |
2653 | {EQ, "Z", "NZ"}, | |
2654 | {GE, "NN", "N"}, | |
2655 | {GT, "P", "NP"}, | |
2656 | {LE, "NP", "P"}, | |
2657 | {LT, "N", "NN"}, | |
2658 | {GTU, "NZ", "Z"}, | |
2659 | {LEU, "Z", "NZ"}, | |
2660 | CCEND}; | |
2661 | #undef CCEND | |
2662 | ||
2663 | static const struct cc_type_conv cc_convs[] | |
2664 | = {{CC_FUNmode, cc_fun_convs}, | |
2665 | {CC_FPmode, cc_fp_convs}, | |
2666 | {CC_FPEQmode, cc_fpeq_convs}, | |
2667 | {CC_UNSmode, cc_uns_convs}, | |
2668 | {CCmode, cc_signed_convs}, | |
2669 | {DImode, cc_di_convs}}; | |
2670 | ||
3585dac7 | 2671 | size_t i; |
68cbb7e3 | 2672 | int j; |
2673 | ||
3754d046 | 2674 | machine_mode mode = GET_MODE (XEXP (x, 0)); |
68cbb7e3 | 2675 | RTX_CODE cc = GET_CODE (x); |
2676 | ||
3585dac7 | 2677 | for (i = 0; i < ARRAY_SIZE (cc_convs); i++) |
68cbb7e3 | 2678 | { |
2679 | if (mode == cc_convs[i].cc_mode) | |
2680 | { | |
21f1e711 | 2681 | for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++) |
68cbb7e3 | 2682 | if (cc == cc_convs[i].convs[j].cc) |
2683 | { | |
2684 | const char *mmix_cc | |
2685 | = (reversed ? cc_convs[i].convs[j].reversed | |
2686 | : cc_convs[i].convs[j].normal); | |
2687 | ||
2688 | if (mmix_cc == NULL) | |
2689 | fatal_insn ("MMIX Internal: Trying to output invalidly\ | |
2690 | reversed condition:", x); | |
2691 | ||
2692 | fprintf (stream, "%s", mmix_cc); | |
2693 | return; | |
2694 | } | |
2695 | ||
2696 | fatal_insn ("MMIX Internal: What's the CC of this?", x); | |
2697 | } | |
2698 | } | |
2699 | ||
2700 | fatal_insn ("MMIX Internal: What is the CC of this?", x); | |
2701 | } | |
2702 | ||
2703 | /* Return the bit-value for a const_int or const_double. */ | |
2704 | ||
3a4303e7 | 2705 | int64_t |
7a7fb407 | 2706 | mmix_intval (const_rtx x) |
68cbb7e3 | 2707 | { |
68cbb7e3 | 2708 | if (GET_CODE (x) == CONST_INT) |
2709 | return INTVAL (x); | |
2710 | ||
2711 | /* We make a little song and dance because converting to long long in | |
2712 | gcc-2.7.2 is broken. I still want people to be able to use it for | |
2713 | cross-compilation to MMIX. */ | |
2714 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode) | |
3a4303e7 | 2715 | return CONST_DOUBLE_HIGH (x); |
68cbb7e3 | 2716 | |
2717 | if (GET_CODE (x) == CONST_DOUBLE) | |
2718 | { | |
2719 | REAL_VALUE_TYPE value; | |
2720 | ||
2721 | /* FIXME: This macro is not in the manual but should be. */ | |
2722 | REAL_VALUE_FROM_CONST_DOUBLE (value, x); | |
2723 | ||
2724 | if (GET_MODE (x) == DFmode) | |
2725 | { | |
2726 | long bits[2]; | |
dc8dc4ce | 2727 | |
68cbb7e3 | 2728 | REAL_VALUE_TO_TARGET_DOUBLE (value, bits); |
2729 | ||
ca2399d9 | 2730 | /* The double cast is necessary to avoid getting the long |
2731 | sign-extended to unsigned long long(!) when they're of | |
2732 | different size (usually 32-bit hosts). */ | |
2733 | return | |
3a4303e7 | 2734 | ((uint64_t) (unsigned long) bits[0] |
2735 | << (uint64_t) 32U) | |
2736 | | (uint64_t) (unsigned long) bits[1]; | |
68cbb7e3 | 2737 | } |
2738 | else if (GET_MODE (x) == SFmode) | |
2739 | { | |
2740 | long bits; | |
2741 | REAL_VALUE_TO_TARGET_SINGLE (value, bits); | |
2742 | ||
2743 | return (unsigned long) bits; | |
2744 | } | |
2745 | } | |
2746 | ||
2747 | fatal_insn ("MMIX Internal: This is not a constant:", x); | |
2748 | } | |
2749 | ||
3b2411a8 | 2750 | /* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */ |
2751 | ||
3754d046 | 2752 | machine_mode |
3b2411a8 | 2753 | mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, |
3754d046 | 2754 | machine_mode mode, |
3b2411a8 | 2755 | int *punsignedp ATTRIBUTE_UNUSED, |
2756 | const_tree fntype ATTRIBUTE_UNUSED, | |
2757 | int for_return) | |
2758 | { | |
2759 | /* Apparently not doing TRT if int < register-size. FIXME: Perhaps | |
2760 | FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */ | |
c879dbcf | 2761 | if (for_return == 1) |
3b2411a8 | 2762 | return mode; |
2763 | ||
2764 | /* Promotion of modes currently generates slow code, extending before | |
2765 | operation, so we do it only for arguments. */ | |
2766 | if (GET_MODE_CLASS (mode) == MODE_INT | |
2767 | && GET_MODE_SIZE (mode) < 8) | |
2768 | return DImode; | |
2769 | else | |
2770 | return mode; | |
2771 | } | |
9e4a734a | 2772 | /* Worker function for TARGET_STRUCT_VALUE_RTX. */ |
2773 | ||
2774 | static rtx | |
2775 | mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, | |
2776 | int incoming ATTRIBUTE_UNUSED) | |
2777 | { | |
2778 | return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM); | |
2779 | } | |
2780 | ||
5a1c68c3 | 2781 | /* Worker function for TARGET_FRAME_POINTER_REQUIRED. |
2782 | ||
2783 | FIXME: Is this requirement built-in? Anyway, we should try to get rid | |
2784 | of it; we can deduce the value. */ | |
2785 | ||
2786 | bool | |
2787 | mmix_frame_pointer_required (void) | |
2788 | { | |
2789 | return (cfun->has_nonlocal_label); | |
2790 | } | |
2791 | ||
68cbb7e3 | 2792 | /* |
2793 | * Local variables: | |
2794 | * eval: (c-set-style "gnu") | |
2795 | * indent-tabs-mode: t | |
2796 | * End: | |
2797 | */ |