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bcf684c7 | 1 | /* Definitions of target machine for GNU compiler, for MMIX. |
d1e082c2 | 2 | Copyright (C) 2000-2013 Free Software Foundation, Inc. |
bcf684c7 HPN |
3 | Contributed by Hans-Peter Nilsson (hp@bitrange.com) |
4 | ||
c583c5c3 | 5 | This file is part of GCC. |
bcf684c7 | 6 | |
c583c5c3 | 7 | GCC is free software; you can redistribute it and/or modify |
bcf684c7 | 8 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
bcf684c7 HPN |
10 | any later version. |
11 | ||
c583c5c3 | 12 | GCC is distributed in the hope that it will be useful, |
bcf684c7 HPN |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
bcf684c7 HPN |
20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
4977bab6 ZW |
23 | #include "coretypes.h" |
24 | #include "tm.h" | |
bcf684c7 HPN |
25 | #include "rtl.h" |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "hashtab.h" | |
29 | #include "insn-config.h" | |
30 | #include "output.h" | |
2d5bfc67 | 31 | #include "basic-block.h" |
bcf684c7 HPN |
32 | #include "flags.h" |
33 | #include "tree.h" | |
d8a2d370 DN |
34 | #include "varasm.h" |
35 | #include "stor-layout.h" | |
36 | #include "calls.h" | |
bcf684c7 HPN |
37 | #include "function.h" |
38 | #include "expr.h" | |
718f9c0f | 39 | #include "diagnostic-core.h" |
bcf684c7 HPN |
40 | #include "recog.h" |
41 | #include "ggc.h" | |
a80b0574 | 42 | #include "dwarf2.h" |
bcf684c7 HPN |
43 | #include "debug.h" |
44 | #include "tm_p.h" | |
bcf684c7 HPN |
45 | #include "target.h" |
46 | #include "target-def.h" | |
4ae50669 | 47 | #include "df.h" |
e076319b | 48 | #include "tm-constrs.h" |
bcf684c7 HPN |
49 | |
50 | /* First some local helper definitions. */ | |
51 | #define MMIX_FIRST_GLOBAL_REGNUM 32 | |
52 | ||
53 | /* We'd need a current_function_has_landing_pad. It's marked as such when | |
54 | a nonlocal_goto_receiver is expanded. Not just a C++ thing, but | |
55 | mostly. */ | |
56 | #define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0) | |
57 | ||
58 | /* We have no means to tell DWARF 2 about the register stack, so we need | |
59 | to store the return address on the stack if an exception can get into | |
957ec0f9 | 60 | this function. FIXME: Narrow condition. Before any whole-function |
6fb5fa3c | 61 | analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date |
957ec0f9 HPN |
62 | after reload_completed; it may contain incorrect information some time |
63 | before that. Within a RTL sequence (after a call to start_sequence, | |
64 | such as in RTL expanders), leaf_function_p doesn't see all insns | |
65 | (perhaps any insn). But regs_ever_live is up-to-date when | |
66 | leaf_function_p () isn't, so we "or" them together to get accurate | |
67 | information. FIXME: Some tweak to leaf_function_p might be | |
2067c116 | 68 | preferable. */ |
957ec0f9 HPN |
69 | #define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \ |
70 | (flag_exceptions \ | |
6fb5fa3c | 71 | && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \ |
957ec0f9 | 72 | || !leaf_function_p ())) |
bcf684c7 HPN |
73 | |
74 | #define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \ | |
e3b5732b | 75 | (crtl->calls_eh_return \ |
bcf684c7 HPN |
76 | && (EH_RETURN_DATA_REGNO (0) == REGNO \ |
77 | || EH_RETURN_DATA_REGNO (1) == REGNO \ | |
78 | || EH_RETURN_DATA_REGNO (2) == REGNO \ | |
79 | || EH_RETURN_DATA_REGNO (3) == REGNO)) | |
80 | ||
1f2641b6 HPN |
81 | /* For the default ABI, we rename registers at output-time to fill the gap |
82 | between the (statically partitioned) saved registers and call-clobbered | |
83 | registers. In effect this makes unused call-saved registers to be used | |
84 | as call-clobbered registers. The benefit comes from keeping the number | |
85 | of local registers (value of rL) low, since there's a cost of | |
957ec0f9 HPN |
86 | increasing rL and clearing unused (unset) registers with lower numbers. |
87 | Don't translate while outputting the prologue. */ | |
1f2641b6 HPN |
88 | #define MMIX_OUTPUT_REGNO(N) \ |
89 | (TARGET_ABI_GNU \ | |
66b8c57f HPN |
90 | || (int) (N) < MMIX_RETURN_VALUE_REGNUM \ |
91 | || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \ | |
957ec0f9 HPN |
92 | || cfun == NULL \ |
93 | || cfun->machine == NULL \ | |
94 | || cfun->machine->in_prologue \ | |
1f2641b6 HPN |
95 | ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \ |
96 | + cfun->machine->highest_saved_stack_register + 1)) | |
97 | ||
66b8c57f HPN |
98 | /* The %d in "POP %d,0". */ |
99 | #define MMIX_POP_ARGUMENT() \ | |
100 | ((! TARGET_ABI_GNU \ | |
38173d38 | 101 | && crtl->return_rtx != NULL \ |
e3b5732b | 102 | && ! cfun->returns_struct) \ |
38173d38 JH |
103 | ? (GET_CODE (crtl->return_rtx) == PARALLEL \ |
104 | ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \ | |
66b8c57f HPN |
105 | : 0) |
106 | ||
bcf684c7 HPN |
107 | /* The canonical saved comparison operands for non-cc0 machines, set in |
108 | the compare expander. */ | |
109 | rtx mmix_compare_op0; | |
110 | rtx mmix_compare_op1; | |
111 | ||
bcf684c7 HPN |
112 | /* Declarations of locals. */ |
113 | ||
bcf684c7 HPN |
114 | /* Intermediate for insn output. */ |
115 | static int mmix_output_destination_register; | |
116 | ||
c5387660 | 117 | static void mmix_option_override (void); |
501d087d | 118 | static void mmix_asm_output_source_filename (FILE *, const char *); |
bcf684c7 | 119 | static void mmix_output_shiftvalue_op_from_str |
4e58524e HPN |
120 | (FILE *, const char *, HOST_WIDEST_INT); |
121 | static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT); | |
5057fa13 | 122 | static void mmix_output_condition (FILE *, const_rtx, int); |
4e58524e HPN |
123 | static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int); |
124 | static bool mmix_assemble_integer (rtx, unsigned int, int); | |
125 | static struct machine_function *mmix_init_machine_status (void); | |
126 | static void mmix_encode_section_info (tree, rtx, int); | |
127 | static const char *mmix_strip_name_encoding (const char *); | |
128 | static void mmix_emit_sp_add (HOST_WIDE_INT offset); | |
129 | static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); | |
130 | static void mmix_target_asm_function_end_prologue (FILE *); | |
131 | static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); | |
0d5e496f AS |
132 | static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); |
133 | static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); | |
c6c3dba9 | 134 | static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool); |
1a627b35 | 135 | static bool mmix_legitimate_constant_p (enum machine_mode, rtx); |
4e58524e | 136 | static void mmix_reorg (void); |
c590b625 | 137 | static void mmix_asm_output_mi_thunk |
4e58524e | 138 | (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); |
a9ba5098 | 139 | static void mmix_setup_incoming_varargs |
d5cc9181 | 140 | (cumulative_args_t, enum machine_mode, tree, int *, int); |
4e58524e HPN |
141 | static void mmix_file_start (void); |
142 | static void mmix_file_end (void); | |
68f932c4 | 143 | static bool mmix_rtx_costs (rtx, int, int, int, int *, bool); |
6e9ee54c AS |
144 | static int mmix_register_move_cost (enum machine_mode, |
145 | reg_class_t, reg_class_t); | |
a9ba5098 | 146 | static rtx mmix_struct_value_rtx (tree, int); |
cde0f3fd PB |
147 | static enum machine_mode mmix_promote_function_mode (const_tree, |
148 | enum machine_mode, | |
149 | int *, const_tree, int); | |
d5cc9181 | 150 | static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode, |
9fb41e15 | 151 | const_tree, bool); |
d5cc9181 | 152 | static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode, |
9fb41e15 | 153 | const_tree, bool, bool); |
d5cc9181 | 154 | static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode, |
9fb41e15 | 155 | const_tree, bool); |
d5cc9181 | 156 | static rtx mmix_function_arg (cumulative_args_t, enum machine_mode, |
9fb41e15 | 157 | const_tree, bool); |
a3ca07e3 AS |
158 | static rtx mmix_function_value (const_tree, const_tree, bool); |
159 | static rtx mmix_libcall_value (enum machine_mode, const_rtx); | |
160 | static bool mmix_function_value_regno_p (const unsigned int); | |
d5cc9181 | 161 | static bool mmix_pass_by_reference (cumulative_args_t, |
586de218 | 162 | enum machine_mode, const_tree, bool); |
b52b1749 | 163 | static bool mmix_frame_pointer_required (void); |
dbbdb385 RH |
164 | static void mmix_asm_trampoline_template (FILE *); |
165 | static void mmix_trampoline_init (rtx, tree, rtx); | |
5057fa13 AS |
166 | static void mmix_print_operand (FILE *, rtx, int); |
167 | static void mmix_print_operand_address (FILE *, rtx); | |
168 | static bool mmix_print_operand_punct_valid_p (unsigned char); | |
5efd84c5 | 169 | static void mmix_conditional_register_usage (void); |
bcf684c7 HPN |
170 | |
171 | /* Target structure macros. Listed by node. See `Using and Porting GCC' | |
172 | for a general description. */ | |
173 | ||
174 | /* Node: Function Entry */ | |
175 | ||
301d03af RS |
176 | #undef TARGET_ASM_BYTE_OP |
177 | #define TARGET_ASM_BYTE_OP NULL | |
178 | #undef TARGET_ASM_ALIGNED_HI_OP | |
179 | #define TARGET_ASM_ALIGNED_HI_OP NULL | |
180 | #undef TARGET_ASM_ALIGNED_SI_OP | |
181 | #define TARGET_ASM_ALIGNED_SI_OP NULL | |
182 | #undef TARGET_ASM_ALIGNED_DI_OP | |
183 | #define TARGET_ASM_ALIGNED_DI_OP NULL | |
184 | #undef TARGET_ASM_INTEGER | |
185 | #define TARGET_ASM_INTEGER mmix_assemble_integer | |
186 | ||
bcf684c7 HPN |
187 | #undef TARGET_ASM_FUNCTION_PROLOGUE |
188 | #define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue | |
189 | ||
957ec0f9 HPN |
190 | #undef TARGET_ASM_FUNCTION_END_PROLOGUE |
191 | #define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue | |
192 | ||
bcf684c7 HPN |
193 | #undef TARGET_ASM_FUNCTION_EPILOGUE |
194 | #define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue | |
195 | ||
5057fa13 AS |
196 | #undef TARGET_PRINT_OPERAND |
197 | #define TARGET_PRINT_OPERAND mmix_print_operand | |
198 | #undef TARGET_PRINT_OPERAND_ADDRESS | |
199 | #define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address | |
200 | #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P | |
201 | #define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p | |
202 | ||
fb49053f RH |
203 | #undef TARGET_ENCODE_SECTION_INFO |
204 | #define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info | |
772c5265 RH |
205 | #undef TARGET_STRIP_NAME_ENCODING |
206 | #define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding | |
fb49053f | 207 | |
c590b625 RH |
208 | #undef TARGET_ASM_OUTPUT_MI_THUNK |
209 | #define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk | |
3961e8fe RH |
210 | #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK |
211 | #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall | |
1bc7c5b6 ZW |
212 | #undef TARGET_ASM_FILE_START |
213 | #define TARGET_ASM_FILE_START mmix_file_start | |
214 | #undef TARGET_ASM_FILE_START_FILE_DIRECTIVE | |
215 | #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true | |
a5fe455b ZW |
216 | #undef TARGET_ASM_FILE_END |
217 | #define TARGET_ASM_FILE_END mmix_file_end | |
501d087d AS |
218 | #undef TARGET_ASM_OUTPUT_SOURCE_FILENAME |
219 | #define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename | |
c590b625 | 220 | |
5efd84c5 NF |
221 | #undef TARGET_CONDITIONAL_REGISTER_USAGE |
222 | #define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage | |
223 | ||
3c50106f RH |
224 | #undef TARGET_RTX_COSTS |
225 | #define TARGET_RTX_COSTS mmix_rtx_costs | |
dcefdf67 | 226 | #undef TARGET_ADDRESS_COST |
b413068c | 227 | #define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0 |
3c50106f | 228 | |
6e9ee54c AS |
229 | #undef TARGET_REGISTER_MOVE_COST |
230 | #define TARGET_REGISTER_MOVE_COST mmix_register_move_cost | |
231 | ||
18dbd950 RS |
232 | #undef TARGET_MACHINE_DEPENDENT_REORG |
233 | #define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg | |
234 | ||
cde0f3fd PB |
235 | #undef TARGET_PROMOTE_FUNCTION_MODE |
236 | #define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode | |
237 | ||
a3ca07e3 AS |
238 | #undef TARGET_FUNCTION_VALUE |
239 | #define TARGET_FUNCTION_VALUE mmix_function_value | |
240 | #undef TARGET_LIBCALL_VALUE | |
241 | #define TARGET_LIBCALL_VALUE mmix_libcall_value | |
242 | #undef TARGET_FUNCTION_VALUE_REGNO_P | |
243 | #define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p | |
a9ba5098 | 244 | |
9fb41e15 NF |
245 | #undef TARGET_FUNCTION_ARG |
246 | #define TARGET_FUNCTION_ARG mmix_function_arg | |
247 | #undef TARGET_FUNCTION_INCOMING_ARG | |
248 | #define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg | |
249 | #undef TARGET_FUNCTION_ARG_ADVANCE | |
250 | #define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance | |
a9ba5098 KH |
251 | #undef TARGET_STRUCT_VALUE_RTX |
252 | #define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx | |
a9ba5098 KH |
253 | #undef TARGET_SETUP_INCOMING_VARARGS |
254 | #define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs | |
8cd5a4e0 RH |
255 | #undef TARGET_PASS_BY_REFERENCE |
256 | #define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference | |
6cdd5672 RH |
257 | #undef TARGET_CALLEE_COPIES |
258 | #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true | |
a9ba5098 | 259 | |
0d5e496f AS |
260 | #undef TARGET_PREFERRED_RELOAD_CLASS |
261 | #define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class | |
262 | #undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS | |
12e502c6 | 263 | #define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class |
0d5e496f | 264 | |
c6c3dba9 PB |
265 | #undef TARGET_LEGITIMATE_ADDRESS_P |
266 | #define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p | |
1a627b35 RS |
267 | #undef TARGET_LEGITIMATE_CONSTANT_P |
268 | #define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p | |
c6c3dba9 | 269 | |
b52b1749 AS |
270 | #undef TARGET_FRAME_POINTER_REQUIRED |
271 | #define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required | |
272 | ||
dbbdb385 RH |
273 | #undef TARGET_ASM_TRAMPOLINE_TEMPLATE |
274 | #define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template | |
275 | #undef TARGET_TRAMPOLINE_INIT | |
276 | #define TARGET_TRAMPOLINE_INIT mmix_trampoline_init | |
277 | ||
c5387660 JM |
278 | #undef TARGET_OPTION_OVERRIDE |
279 | #define TARGET_OPTION_OVERRIDE mmix_option_override | |
280 | ||
bcf684c7 HPN |
281 | struct gcc_target targetm = TARGET_INITIALIZER; |
282 | ||
283 | /* Functions that are expansions for target macros. | |
284 | See Target Macros in `Using and Porting GCC'. */ | |
285 | ||
c5387660 | 286 | /* TARGET_OPTION_OVERRIDE. */ |
bcf684c7 | 287 | |
c5387660 JM |
288 | static void |
289 | mmix_option_override (void) | |
bcf684c7 HPN |
290 | { |
291 | /* Should we err or should we warn? Hmm. At least we must neutralize | |
292 | it. For example the wrong kind of case-tables will be generated with | |
293 | PIC; we use absolute address items for mmixal compatibility. FIXME: | |
294 | They could be relative if we just elide them to after all pertinent | |
295 | labels. */ | |
296 | if (flag_pic) | |
297 | { | |
d4ee4d25 | 298 | warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic"); |
bcf684c7 HPN |
299 | flag_pic = 0; |
300 | } | |
bcf684c7 HPN |
301 | } |
302 | ||
303 | /* INIT_EXPANDERS. */ | |
304 | ||
305 | void | |
4e58524e | 306 | mmix_init_expanders (void) |
bcf684c7 HPN |
307 | { |
308 | init_machine_status = mmix_init_machine_status; | |
309 | } | |
310 | ||
311 | /* Set the per-function data. */ | |
312 | ||
e2500fed | 313 | static struct machine_function * |
4e58524e | 314 | mmix_init_machine_status (void) |
bcf684c7 | 315 | { |
a9429e29 | 316 | return ggc_alloc_cleared_machine_function (); |
bcf684c7 HPN |
317 | } |
318 | ||
df8a1d28 | 319 | /* DATA_ABI_ALIGNMENT. |
bcf684c7 HPN |
320 | We have trouble getting the address of stuff that is located at other |
321 | than 32-bit alignments (GETA requirements), so try to give everything | |
ff482c8d | 322 | at least 32-bit alignment. */ |
bcf684c7 HPN |
323 | |
324 | int | |
4e58524e | 325 | mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align) |
bcf684c7 HPN |
326 | { |
327 | if (basic_align < 32) | |
328 | return 32; | |
329 | ||
330 | return basic_align; | |
331 | } | |
332 | ||
333 | /* CONSTANT_ALIGNMENT. */ | |
334 | ||
335 | int | |
4e58524e | 336 | mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align) |
bcf684c7 HPN |
337 | { |
338 | if (basic_align < 32) | |
339 | return 32; | |
340 | ||
341 | return basic_align; | |
342 | } | |
343 | ||
344 | /* LOCAL_ALIGNMENT. */ | |
345 | ||
4ae50669 JR |
346 | unsigned |
347 | mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align) | |
bcf684c7 HPN |
348 | { |
349 | if (basic_align < 32) | |
350 | return 32; | |
351 | ||
352 | return basic_align; | |
353 | } | |
354 | ||
5efd84c5 | 355 | /* TARGET_CONDITIONAL_REGISTER_USAGE. */ |
bcf684c7 | 356 | |
5efd84c5 | 357 | static void |
4e58524e | 358 | mmix_conditional_register_usage (void) |
bcf684c7 HPN |
359 | { |
360 | int i; | |
361 | ||
362 | if (TARGET_ABI_GNU) | |
363 | { | |
364 | static const int gnu_abi_reg_alloc_order[] | |
365 | = MMIX_GNU_ABI_REG_ALLOC_ORDER; | |
366 | ||
367 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
368 | reg_alloc_order[i] = gnu_abi_reg_alloc_order[i]; | |
369 | ||
370 | /* Change the default from the mmixware ABI. For the GNU ABI, | |
371 | $15..$30 are call-saved just as $0..$14. There must be one | |
957ec0f9 HPN |
372 | call-clobbered local register for the "hole" that holds the |
373 | number of saved local registers saved by PUSHJ/PUSHGO during the | |
374 | function call, receiving the return value at return. So best is | |
375 | to use the highest, $31. It's already marked call-clobbered for | |
376 | the mmixware ABI. */ | |
bcf684c7 HPN |
377 | for (i = 15; i <= 30; i++) |
378 | call_used_regs[i] = 0; | |
a824924d HPN |
379 | |
380 | /* "Unfix" the parameter registers. */ | |
381 | for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM; | |
382 | i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS; | |
383 | i++) | |
384 | fixed_regs[i] = 0; | |
bcf684c7 HPN |
385 | } |
386 | ||
387 | /* Step over the ":" in special register names. */ | |
388 | if (! TARGET_TOPLEVEL_SYMBOLS) | |
389 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
390 | if (reg_names[i][0] == ':') | |
391 | reg_names[i]++; | |
392 | } | |
393 | ||
60e90d09 HPN |
394 | /* INCOMING_REGNO and OUTGOING_REGNO worker function. |
395 | Those two macros must only be applied to function argument | |
ae9d1af7 HPN |
396 | registers and the function return value register for the opposite |
397 | use. FIXME: for their current use in gcc, it'd be better with an | |
398 | explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la | |
399 | TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of | |
9fb41e15 | 400 | forcing the target to commit to a fixed mapping and for any |
ae9d1af7 HPN |
401 | unspecified register use. Particularly when thinking about the |
402 | return-value, it is better to imagine INCOMING_REGNO and | |
403 | OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as | |
404 | named CALLER_TO_CALLEE_REGNO because the direction. The "incoming" | |
405 | and "outgoing" is from the perspective of the parameter-registers, | |
406 | but the same macro is (must be, lacking an alternative like | |
407 | suggested above) used to map the return-value-register from the | |
408 | same perspective. To make directions even more confusing, the macro | |
409 | MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register | |
410 | in which to return a value, i.e. INCOMING_REGNO for the return-value- | |
411 | register as received from a called function; the return-value on the | |
412 | way out. */ | |
60e90d09 HPN |
413 | |
414 | int | |
415 | mmix_opposite_regno (int regno, int incoming) | |
416 | { | |
ae9d1af7 HPN |
417 | if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM) |
418 | return MMIX_RETURN_VALUE_REGNUM; | |
419 | ||
420 | if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM) | |
421 | return MMIX_OUTGOING_RETURN_VALUE_REGNUM; | |
422 | ||
60e90d09 HPN |
423 | if (!mmix_function_arg_regno_p (regno, incoming)) |
424 | return regno; | |
425 | ||
426 | return | |
427 | regno - (incoming | |
428 | ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM | |
429 | : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM); | |
430 | } | |
431 | ||
957ec0f9 HPN |
432 | /* LOCAL_REGNO. |
433 | All registers that are part of the register stack and that will be | |
434 | saved are local. */ | |
435 | ||
436 | int | |
4e58524e | 437 | mmix_local_regno (int regno) |
957ec0f9 HPN |
438 | { |
439 | return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno]; | |
440 | } | |
441 | ||
0d5e496f | 442 | /* TARGET_PREFERRED_RELOAD_CLASS. |
bcf684c7 HPN |
443 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
444 | ||
0d5e496f AS |
445 | static reg_class_t |
446 | mmix_preferred_reload_class (rtx x, reg_class_t rclass) | |
bcf684c7 HPN |
447 | { |
448 | /* FIXME: Revisit. */ | |
449 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
0a2aaacc | 450 | ? REMAINDER_REG : rclass; |
bcf684c7 HPN |
451 | } |
452 | ||
0d5e496f | 453 | /* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. |
bcf684c7 HPN |
454 | We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ |
455 | ||
0d5e496f AS |
456 | static reg_class_t |
457 | mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) | |
bcf684c7 HPN |
458 | { |
459 | /* FIXME: Revisit. */ | |
460 | return GET_CODE (x) == MOD && GET_MODE (x) == DImode | |
0a2aaacc | 461 | ? REMAINDER_REG : rclass; |
bcf684c7 HPN |
462 | } |
463 | ||
464 | /* SECONDARY_RELOAD_CLASS. | |
465 | We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */ | |
466 | ||
467 | enum reg_class | |
0a2aaacc | 468 | mmix_secondary_reload_class (enum reg_class rclass, |
4e58524e HPN |
469 | enum machine_mode mode ATTRIBUTE_UNUSED, |
470 | rtx x ATTRIBUTE_UNUSED, | |
471 | int in_p ATTRIBUTE_UNUSED) | |
bcf684c7 | 472 | { |
0a2aaacc KG |
473 | if (rclass == REMAINDER_REG |
474 | || rclass == HIMULT_REG | |
475 | || rclass == SYSTEM_REGS) | |
bcf684c7 HPN |
476 | return GENERAL_REGS; |
477 | ||
bcf684c7 HPN |
478 | return NO_REGS; |
479 | } | |
480 | ||
bcf684c7 HPN |
481 | /* DYNAMIC_CHAIN_ADDRESS. */ |
482 | ||
483 | rtx | |
4e58524e | 484 | mmix_dynamic_chain_address (rtx frame) |
bcf684c7 HPN |
485 | { |
486 | /* FIXME: the frame-pointer is stored at offset -8 from the current | |
487 | frame-pointer. Unfortunately, the caller assumes that a | |
488 | frame-pointer is present for *all* previous frames. There should be | |
489 | a way to say that that cannot be done, like for RETURN_ADDR_RTX. */ | |
0a81f074 | 490 | return plus_constant (Pmode, frame, -8); |
bcf684c7 HPN |
491 | } |
492 | ||
493 | /* STARTING_FRAME_OFFSET. */ | |
494 | ||
495 | int | |
4e58524e | 496 | mmix_starting_frame_offset (void) |
bcf684c7 HPN |
497 | { |
498 | /* The old frame pointer is in the slot below the new one, so | |
499 | FIRST_PARM_OFFSET does not need to depend on whether the | |
500 | frame-pointer is needed or not. We have to adjust for the register | |
501 | stack pointer being located below the saved frame pointer. | |
502 | Similarly, we store the return address on the stack too, for | |
503 | exception handling, and always if we save the register stack pointer. */ | |
504 | return | |
505 | (-8 | |
506 | + (MMIX_CFUN_HAS_LANDING_PAD | |
507 | ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0))); | |
508 | } | |
509 | ||
510 | /* RETURN_ADDR_RTX. */ | |
511 | ||
512 | rtx | |
4e58524e | 513 | mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED) |
bcf684c7 HPN |
514 | { |
515 | return count == 0 | |
516 | ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS | |
3ec1b4cb HPN |
517 | /* FIXME: Set frame_alias_set on the following. (Why?) |
518 | See mmix_initial_elimination_offset for the reason we can't use | |
519 | get_hard_reg_initial_val for both. Always using a stack slot | |
520 | and not a register would be suboptimal. */ | |
0a81f074 RS |
521 | ? validize_mem (gen_rtx_MEM (Pmode, |
522 | plus_constant (Pmode, | |
523 | frame_pointer_rtx, -16))) | |
bcf684c7 HPN |
524 | : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM)) |
525 | : NULL_RTX; | |
526 | } | |
527 | ||
528 | /* SETUP_FRAME_ADDRESSES. */ | |
529 | ||
530 | void | |
4e58524e | 531 | mmix_setup_frame_addresses (void) |
bcf684c7 HPN |
532 | { |
533 | /* Nothing needed at the moment. */ | |
534 | } | |
535 | ||
536 | /* The difference between the (imaginary) frame pointer and the stack | |
537 | pointer. Used to eliminate the frame pointer. */ | |
538 | ||
539 | int | |
4e58524e | 540 | mmix_initial_elimination_offset (int fromreg, int toreg) |
bcf684c7 HPN |
541 | { |
542 | int regno; | |
543 | int fp_sp_offset | |
38173d38 | 544 | = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7; |
bcf684c7 | 545 | |
3ec1b4cb HPN |
546 | /* There is no actual offset between these two virtual values, but for |
547 | the frame-pointer, we have the old one in the stack position below | |
548 | it, so the offset for the frame-pointer to the stack-pointer is one | |
549 | octabyte larger. */ | |
bcf684c7 HPN |
550 | if (fromreg == MMIX_ARG_POINTER_REGNUM |
551 | && toreg == MMIX_FRAME_POINTER_REGNUM) | |
552 | return 0; | |
553 | ||
554 | /* The difference is the size of local variables plus the size of | |
555 | outgoing function arguments that would normally be passed as | |
556 | registers but must be passed on stack because we're out of | |
557 | function-argument registers. Only global saved registers are | |
558 | counted; the others go on the register stack. | |
559 | ||
560 | The frame-pointer is counted too if it is what is eliminated, as we | |
561 | need to balance the offset for it from STARTING_FRAME_OFFSET. | |
562 | ||
563 | Also add in the slot for the register stack pointer we save if we | |
564 | have a landing pad. | |
565 | ||
566 | Unfortunately, we can't access $0..$14, from unwinder code easily, so | |
567 | store the return address in a frame slot too. FIXME: Only for | |
568 | non-leaf functions. FIXME: Always with a landing pad, because it's | |
569 | hard to know whether we need the other at the time we know we need | |
570 | the offset for one (and have to state it). It's a kludge until we | |
571 | can express the register stack in the EH frame info. | |
572 | ||
573 | We have to do alignment here; get_frame_size will not return a | |
574 | multiple of STACK_BOUNDARY. FIXME: Add note in manual. */ | |
575 | ||
576 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
577 | regno <= 255; | |
578 | regno++) | |
6fb5fa3c | 579 | if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
bcf684c7 HPN |
580 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
581 | fp_sp_offset += 8; | |
582 | ||
583 | return fp_sp_offset | |
584 | + (MMIX_CFUN_HAS_LANDING_PAD | |
585 | ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0)) | |
586 | + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8); | |
587 | } | |
588 | ||
9fb41e15 | 589 | static void |
d5cc9181 | 590 | mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode, |
9fb41e15 NF |
591 | const_tree type, bool named ATTRIBUTE_UNUSED) |
592 | { | |
d5cc9181 | 593 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
9fb41e15 NF |
594 | int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type); |
595 | ||
596 | argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type) | |
597 | || (arg_size > 8 | |
598 | && !TARGET_LIBFUNC | |
599 | && !argsp->lib)) | |
600 | ? (MMIX_MAX_ARGS_IN_REGS) + 1 | |
601 | : argsp->regs + (7 + arg_size) / 8); | |
602 | } | |
bcf684c7 | 603 | |
9fb41e15 NF |
604 | /* Helper function for mmix_function_arg and mmix_function_incoming_arg. */ |
605 | ||
606 | static rtx | |
d5cc9181 | 607 | mmix_function_arg_1 (const cumulative_args_t argsp_v, |
9fb41e15 NF |
608 | enum machine_mode mode, |
609 | const_tree type, | |
610 | bool named ATTRIBUTE_UNUSED, | |
611 | bool incoming) | |
bcf684c7 | 612 | { |
d5cc9181 JR |
613 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
614 | ||
bcf684c7 HPN |
615 | /* Last-argument marker. */ |
616 | if (type == void_type_node) | |
617 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS) | |
618 | ? gen_rtx_REG (mode, | |
619 | (incoming | |
620 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
621 | : MMIX_FIRST_ARG_REGNUM) + argsp->regs) | |
622 | : NULL_RTX; | |
623 | ||
624 | return (argsp->regs < MMIX_MAX_ARGS_IN_REGS | |
fe984136 | 625 | && !targetm.calls.must_pass_in_stack (mode, type) |
bcf684c7 HPN |
626 | && (GET_MODE_BITSIZE (mode) <= 64 |
627 | || argsp->lib | |
628 | || TARGET_LIBFUNC)) | |
629 | ? gen_rtx_REG (mode, | |
630 | (incoming | |
631 | ? MMIX_FIRST_INCOMING_ARG_REGNUM | |
632 | : MMIX_FIRST_ARG_REGNUM) | |
633 | + argsp->regs) | |
634 | : NULL_RTX; | |
635 | } | |
636 | ||
9fb41e15 NF |
637 | /* Return an rtx for a function argument to go in a register, and 0 for |
638 | one that must go on stack. */ | |
639 | ||
640 | static rtx | |
d5cc9181 | 641 | mmix_function_arg (cumulative_args_t argsp, |
9fb41e15 NF |
642 | enum machine_mode mode, |
643 | const_tree type, | |
644 | bool named) | |
645 | { | |
646 | return mmix_function_arg_1 (argsp, mode, type, named, false); | |
647 | } | |
648 | ||
649 | static rtx | |
d5cc9181 | 650 | mmix_function_incoming_arg (cumulative_args_t argsp, |
9fb41e15 NF |
651 | enum machine_mode mode, |
652 | const_tree type, | |
653 | bool named) | |
654 | { | |
655 | return mmix_function_arg_1 (argsp, mode, type, named, true); | |
656 | } | |
657 | ||
bcf684c7 HPN |
658 | /* Returns nonzero for everything that goes by reference, 0 for |
659 | everything that goes by value. */ | |
660 | ||
8cd5a4e0 | 661 | static bool |
d5cc9181 | 662 | mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode, |
586de218 | 663 | const_tree type, bool named ATTRIBUTE_UNUSED) |
bcf684c7 | 664 | { |
d5cc9181 JR |
665 | CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); |
666 | ||
fe984136 | 667 | /* FIXME: Check: I'm not sure the must_pass_in_stack check is |
bcf684c7 | 668 | necessary. */ |
af064de5 RH |
669 | if (targetm.calls.must_pass_in_stack (mode, type)) |
670 | return true; | |
671 | ||
672 | if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8 | |
673 | && !TARGET_LIBFUNC | |
674 | && (!argsp || !argsp->lib)) | |
675 | return true; | |
676 | ||
677 | return false; | |
bcf684c7 HPN |
678 | } |
679 | ||
680 | /* Return nonzero if regno is a register number where a parameter is | |
681 | passed, and 0 otherwise. */ | |
682 | ||
683 | int | |
4e58524e | 684 | mmix_function_arg_regno_p (int regno, int incoming) |
bcf684c7 HPN |
685 | { |
686 | int first_arg_regnum | |
687 | = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM; | |
688 | ||
689 | return regno >= first_arg_regnum | |
690 | && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS; | |
691 | } | |
692 | ||
a3ca07e3 | 693 | /* Implements TARGET_FUNCTION_VALUE. */ |
bcf684c7 | 694 | |
a3ca07e3 AS |
695 | static rtx |
696 | mmix_function_value (const_tree valtype, | |
697 | const_tree func ATTRIBUTE_UNUSED, | |
698 | bool outgoing) | |
bcf684c7 HPN |
699 | { |
700 | enum machine_mode mode = TYPE_MODE (valtype); | |
bcf684c7 HPN |
701 | enum machine_mode cmode; |
702 | int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM; | |
703 | rtx vec[MMIX_MAX_REGS_FOR_VALUE]; | |
704 | int i; | |
705 | int nregs; | |
706 | ||
a3ca07e3 AS |
707 | if (!outgoing) |
708 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
709 | ||
bcf684c7 HPN |
710 | /* Return values that fit in a register need no special handling. |
711 | There's no register hole when parameters are passed in global | |
712 | registers. */ | |
713 | if (TARGET_ABI_GNU | |
714 | || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD) | |
715 | return | |
716 | gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM); | |
717 | ||
85407c3f HPN |
718 | if (COMPLEX_MODE_P (mode)) |
719 | /* A complex type, made up of components. */ | |
720 | cmode = TYPE_MODE (TREE_TYPE (valtype)); | |
721 | else | |
722 | { | |
723 | /* Of the other larger-than-register modes, we only support | |
724 | scalar mode TImode. (At least, that's the only one that's | |
725 | been rudimentally tested.) Make sure we're alerted for | |
726 | unexpected cases. */ | |
727 | if (mode != TImode) | |
728 | sorry ("support for mode %qs", GET_MODE_NAME (mode)); | |
729 | ||
730 | /* In any case, we will fill registers to the natural size. */ | |
731 | cmode = DImode; | |
732 | } | |
733 | ||
bcf684c7 HPN |
734 | nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD); |
735 | ||
736 | /* We need to take care of the effect of the register hole on return | |
737 | values of large sizes; the last register will appear as the first | |
738 | register, with the rest shifted. (For complex modes, this is just | |
739 | swapped registers.) */ | |
740 | ||
741 | if (nregs > MMIX_MAX_REGS_FOR_VALUE) | |
c725bd79 | 742 | internal_error ("too large function value type, needs %d registers,\ |
bcf684c7 HPN |
743 | have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE); |
744 | ||
745 | /* FIXME: Maybe we should handle structure values like this too | |
746 | (adjusted for BLKmode), perhaps for both ABI:s. */ | |
747 | for (i = 0; i < nregs - 1; i++) | |
748 | vec[i] | |
749 | = gen_rtx_EXPR_LIST (VOIDmode, | |
750 | gen_rtx_REG (cmode, first_val_regnum + i), | |
751 | GEN_INT ((i + 1) * BITS_PER_UNIT)); | |
752 | ||
753 | vec[nregs - 1] | |
754 | = gen_rtx_EXPR_LIST (VOIDmode, | |
755 | gen_rtx_REG (cmode, first_val_regnum + nregs - 1), | |
a556fd39 | 756 | const0_rtx); |
bcf684c7 | 757 | |
0a0337cd | 758 | return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec)); |
bcf684c7 HPN |
759 | } |
760 | ||
a3ca07e3 | 761 | /* Implements TARGET_LIBCALL_VALUE. */ |
4b32269b | 762 | |
a3ca07e3 AS |
763 | static rtx |
764 | mmix_libcall_value (enum machine_mode mode, | |
765 | const_rtx fun ATTRIBUTE_UNUSED) | |
766 | { | |
767 | return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); | |
768 | } | |
769 | ||
770 | /* Implements TARGET_FUNCTION_VALUE_REGNO_P. */ | |
771 | ||
772 | static bool | |
773 | mmix_function_value_regno_p (const unsigned int regno) | |
4b32269b HPN |
774 | { |
775 | return regno == MMIX_RETURN_VALUE_REGNUM; | |
776 | } | |
777 | ||
bcf684c7 HPN |
778 | /* EH_RETURN_DATA_REGNO. */ |
779 | ||
780 | int | |
4e58524e | 781 | mmix_eh_return_data_regno (int n) |
bcf684c7 HPN |
782 | { |
783 | if (n >= 0 && n < 4) | |
784 | return MMIX_EH_RETURN_DATA_REGNO_START + n; | |
785 | ||
786 | return INVALID_REGNUM; | |
787 | } | |
788 | ||
789 | /* EH_RETURN_STACKADJ_RTX. */ | |
790 | ||
791 | rtx | |
4e58524e | 792 | mmix_eh_return_stackadj_rtx (void) |
bcf684c7 HPN |
793 | { |
794 | return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM); | |
795 | } | |
796 | ||
797 | /* EH_RETURN_HANDLER_RTX. */ | |
798 | ||
799 | rtx | |
4e58524e | 800 | mmix_eh_return_handler_rtx (void) |
bcf684c7 | 801 | { |
4e58524e | 802 | return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM); |
bcf684c7 HPN |
803 | } |
804 | ||
805 | /* ASM_PREFERRED_EH_DATA_FORMAT. */ | |
806 | ||
807 | int | |
4e58524e HPN |
808 | mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, |
809 | int global ATTRIBUTE_UNUSED) | |
bcf684c7 HPN |
810 | { |
811 | /* This is the default (was at 2001-07-20). Revisit when needed. */ | |
812 | return DW_EH_PE_absptr; | |
813 | } | |
814 | ||
43aa4e05 | 815 | /* Make a note that we've seen the beginning of the prologue. This |
957ec0f9 | 816 | matters to whether we'll translate register numbers as calculated by |
18dbd950 | 817 | mmix_reorg. */ |
bcf684c7 | 818 | |
957ec0f9 | 819 | static void |
4e58524e HPN |
820 | mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED, |
821 | HOST_WIDE_INT framesize ATTRIBUTE_UNUSED) | |
bcf684c7 | 822 | { |
957ec0f9 HPN |
823 | cfun->machine->in_prologue = 1; |
824 | } | |
bcf684c7 | 825 | |
957ec0f9 | 826 | /* Make a note that we've seen the end of the prologue. */ |
bcf684c7 | 827 | |
957ec0f9 | 828 | static void |
4e58524e | 829 | mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED) |
957ec0f9 HPN |
830 | { |
831 | cfun->machine->in_prologue = 0; | |
1f2641b6 HPN |
832 | } |
833 | ||
18dbd950 RS |
834 | /* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements |
835 | done here; just virtually by calculating the highest saved stack | |
836 | register number used to modify the register numbers at output time. */ | |
1f2641b6 | 837 | |
18dbd950 | 838 | static void |
4e58524e | 839 | mmix_reorg (void) |
1f2641b6 HPN |
840 | { |
841 | int regno; | |
bcf684c7 HPN |
842 | |
843 | /* We put the number of the highest saved register-file register in a | |
844 | location convenient for the call-patterns to output. Note that we | |
845 | don't tell dwarf2 about these registers, since it can't restore them | |
846 | anyway. */ | |
1f2641b6 | 847 | for (regno = MMIX_LAST_STACK_REGISTER_REGNUM; |
bcf684c7 HPN |
848 | regno >= 0; |
849 | regno--) | |
6fb5fa3c | 850 | if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
bcf684c7 HPN |
851 | || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed)) |
852 | break; | |
853 | ||
1f2641b6 HPN |
854 | /* Regardless of whether they're saved (they might be just read), we |
855 | mustn't include registers that carry parameters. We could scan the | |
856 | insns to see whether they're actually used (and indeed do other less | |
857 | trivial register usage analysis and transformations), but it seems | |
858 | wasteful to optimize for unused parameter registers. As of | |
6fb5fa3c | 859 | 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but |
1f2641b6 | 860 | that might change. */ |
38173d38 | 861 | if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1) |
1f2641b6 | 862 | { |
38173d38 | 863 | regno = crtl->args.info.regs - 1; |
1f2641b6 HPN |
864 | |
865 | /* We don't want to let this cause us to go over the limit and make | |
866 | incoming parameter registers be misnumbered and treating the last | |
867 | parameter register and incoming return value register call-saved. | |
868 | Stop things at the unmodified scheme. */ | |
869 | if (regno > MMIX_RETURN_VALUE_REGNUM - 1) | |
870 | regno = MMIX_RETURN_VALUE_REGNUM - 1; | |
871 | } | |
872 | ||
873 | cfun->machine->highest_saved_stack_register = regno; | |
bcf684c7 HPN |
874 | } |
875 | ||
876 | /* TARGET_ASM_FUNCTION_EPILOGUE. */ | |
877 | ||
8819cab5 | 878 | static void |
4e58524e HPN |
879 | mmix_target_asm_function_epilogue (FILE *stream, |
880 | HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED) | |
bcf684c7 | 881 | { |
957ec0f9 HPN |
882 | /* Emit an \n for readability of the generated assembly. */ |
883 | fputc ('\n', stream); | |
884 | } | |
bcf684c7 | 885 | |
eb0424da | 886 | /* TARGET_ASM_OUTPUT_MI_THUNK. */ |
bcf684c7 | 887 | |
c590b625 | 888 | static void |
4e58524e HPN |
889 | mmix_asm_output_mi_thunk (FILE *stream, |
890 | tree fndecl ATTRIBUTE_UNUSED, | |
891 | HOST_WIDE_INT delta, | |
892 | HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED, | |
893 | tree func) | |
957ec0f9 | 894 | { |
bd5bd7ac KH |
895 | /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass |
896 | location of structure to return as invisible first argument), you | |
897 | need to tweak this code too. */ | |
957ec0f9 | 898 | const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM]; |
bcf684c7 | 899 | |
957ec0f9 | 900 | if (delta >= 0 && delta < 65536) |
eb0424da | 901 | fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta); |
957ec0f9 | 902 | else if (delta < 0 && delta >= -255) |
eb0424da | 903 | fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta); |
957ec0f9 | 904 | else |
66b8c57f | 905 | { |
957ec0f9 | 906 | mmix_output_register_setting (stream, 255, delta, 1); |
761c70aa | 907 | fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname); |
66b8c57f HPN |
908 | } |
909 | ||
957ec0f9 HPN |
910 | fprintf (stream, "\tJMP "); |
911 | assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0)); | |
912 | fprintf (stream, "\n"); | |
913 | } | |
bcf684c7 | 914 | |
957ec0f9 | 915 | /* FUNCTION_PROFILER. */ |
bcf684c7 | 916 | |
957ec0f9 | 917 | void |
4e58524e HPN |
918 | mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED, |
919 | int labelno ATTRIBUTE_UNUSED) | |
957ec0f9 HPN |
920 | { |
921 | sorry ("function_profiler support for MMIX"); | |
922 | } | |
bcf684c7 | 923 | |
a9ba5098 KH |
924 | /* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment, |
925 | let's stick to pushing argument registers on the stack. Later, we | |
926 | can parse all arguments in registers, to improve performance. */ | |
bcf684c7 | 927 | |
a9ba5098 | 928 | static void |
d5cc9181 | 929 | mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v, |
4e58524e HPN |
930 | enum machine_mode mode, |
931 | tree vartype, | |
932 | int *pretend_sizep, | |
933 | int second_time ATTRIBUTE_UNUSED) | |
bcf684c7 | 934 | { |
d5cc9181 JR |
935 | CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v); |
936 | ||
6c535c69 ZW |
937 | /* The last named variable has been handled, but |
938 | args_so_farp has not been advanced for it. */ | |
939 | if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS) | |
940 | *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8; | |
bcf684c7 HPN |
941 | |
942 | /* We assume that one argument takes up one register here. That should | |
71cc389b | 943 | be true until we start messing with multi-reg parameters. */ |
bcf684c7 HPN |
944 | if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1) |
945 | internal_error ("MMIX Internal: Last named vararg would not fit in a register"); | |
946 | } | |
947 | ||
dbbdb385 | 948 | /* TARGET_ASM_TRAMPOLINE_TEMPLATE. */ |
bcf684c7 | 949 | |
dbbdb385 RH |
950 | static void |
951 | mmix_asm_trampoline_template (FILE *stream) | |
bcf684c7 | 952 | { |
3ec1b4cb HPN |
953 | /* Read a value into the static-chain register and jump somewhere. The |
954 | static chain is stored at offset 16, and the function address is | |
955 | stored at offset 24. */ | |
dbbdb385 | 956 | |
bcf684c7 | 957 | fprintf (stream, "\tGETA $255,1F\n\t"); |
dbbdb385 | 958 | fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]); |
bcf684c7 HPN |
959 | fprintf (stream, "LDOU $255,$255,8\n\t"); |
960 | fprintf (stream, "GO $255,$255,0\n"); | |
961 | fprintf (stream, "1H\tOCTA 0\n\t"); | |
962 | fprintf (stream, "OCTA 0\n"); | |
963 | } | |
964 | ||
dbbdb385 | 965 | /* TARGET_TRAMPOLINE_INIT. */ |
bcf684c7 HPN |
966 | /* Set the static chain and function pointer field in the trampoline. |
967 | We also SYNCID here to be sure (doesn't matter in the simulator, but | |
968 | some day it will). */ | |
969 | ||
dbbdb385 RH |
970 | static void |
971 | mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) | |
972 | { | |
973 | rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); | |
974 | rtx mem; | |
975 | ||
976 | emit_block_move (m_tramp, assemble_trampoline_template (), | |
977 | GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL); | |
978 | ||
979 | mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD); | |
980 | emit_move_insn (mem, static_chain); | |
981 | mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD); | |
982 | emit_move_insn (mem, fnaddr); | |
983 | ||
984 | mem = adjust_address (m_tramp, DImode, 0); | |
985 | emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1))); | |
bcf684c7 HPN |
986 | } |
987 | ||
988 | /* We must exclude constant addresses that have an increment that is not a | |
989 | multiple of four bytes because of restrictions of the GETA | |
a824924d | 990 | instruction, unless TARGET_BASE_ADDRESSES. */ |
bcf684c7 HPN |
991 | |
992 | int | |
4e58524e | 993 | mmix_constant_address_p (rtx x) |
bcf684c7 HPN |
994 | { |
995 | RTX_CODE code = GET_CODE (x); | |
996 | int addend = 0; | |
a824924d HPN |
997 | /* When using "base addresses", anything constant goes. */ |
998 | int constant_ok = TARGET_BASE_ADDRESSES != 0; | |
bcf684c7 | 999 | |
bcf684c7 HPN |
1000 | switch (code) |
1001 | { | |
1002 | case LABEL_REF: | |
1003 | case SYMBOL_REF: | |
1004 | return 1; | |
1005 | ||
bcf684c7 | 1006 | case HIGH: |
a824924d HPN |
1007 | /* FIXME: Don't know how to dissect these. Avoid them for now, |
1008 | except we know they're constants. */ | |
1009 | return constant_ok; | |
bcf684c7 HPN |
1010 | |
1011 | case CONST_INT: | |
1012 | addend = INTVAL (x); | |
1013 | break; | |
1014 | ||
1015 | case CONST_DOUBLE: | |
1016 | if (GET_MODE (x) != VOIDmode) | |
1017 | /* Strange that we got here. FIXME: Check if we do. */ | |
a824924d | 1018 | return constant_ok; |
bcf684c7 HPN |
1019 | addend = CONST_DOUBLE_LOW (x); |
1020 | break; | |
1021 | ||
1022 | case CONST: | |
1023 | /* Note that expressions with arithmetic on forward references don't | |
1024 | work in mmixal. People using gcc assembly code with mmixal might | |
1025 | need to move arrays and such to before the point of use. */ | |
1026 | if (GET_CODE (XEXP (x, 0)) == PLUS) | |
1027 | { | |
1028 | rtx x0 = XEXP (XEXP (x, 0), 0); | |
1029 | rtx x1 = XEXP (XEXP (x, 0), 1); | |
1030 | ||
1031 | if ((GET_CODE (x0) == SYMBOL_REF | |
1032 | || GET_CODE (x0) == LABEL_REF) | |
1033 | && (GET_CODE (x1) == CONST_INT | |
1034 | || (GET_CODE (x1) == CONST_DOUBLE | |
1035 | && GET_MODE (x1) == VOIDmode))) | |
1036 | addend = mmix_intval (x1); | |
1037 | else | |
a824924d | 1038 | return constant_ok; |
bcf684c7 HPN |
1039 | } |
1040 | else | |
a824924d | 1041 | return constant_ok; |
bcf684c7 HPN |
1042 | break; |
1043 | ||
1044 | default: | |
1045 | return 0; | |
1046 | } | |
1047 | ||
a824924d | 1048 | return constant_ok || (addend & 3) == 0; |
bcf684c7 HPN |
1049 | } |
1050 | ||
c6c3dba9 | 1051 | /* Return 1 if the address is OK, otherwise 0. */ |
bcf684c7 | 1052 | |
c6c3dba9 PB |
1053 | bool |
1054 | mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, | |
1055 | rtx x, | |
1056 | bool strict_checking) | |
bcf684c7 HPN |
1057 | { |
1058 | #define MMIX_REG_OK(X) \ | |
1059 | ((strict_checking \ | |
1060 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1061 | || (reg_renumber[REGNO (X)] > 0 \ | |
1062 | && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \ | |
1063 | || (!strict_checking \ | |
1064 | && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ | |
1065 | || REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
1066 | || REGNO (X) == ARG_POINTER_REGNUM))) | |
1067 | ||
1068 | /* We only accept: | |
1069 | (mem reg) | |
1070 | (mem (plus reg reg)) | |
a824924d HPN |
1071 | (mem (plus reg 0..255)). |
1072 | unless TARGET_BASE_ADDRESSES, in which case we accept all | |
1073 | (mem constant_address) too. */ | |
bcf684c7 HPN |
1074 | |
1075 | ||
1076 | /* (mem reg) */ | |
1077 | if (REG_P (x) && MMIX_REG_OK (x)) | |
1078 | return 1; | |
1079 | ||
1080 | if (GET_CODE(x) == PLUS) | |
1081 | { | |
1082 | rtx x1 = XEXP (x, 0); | |
1083 | rtx x2 = XEXP (x, 1); | |
1084 | ||
1085 | /* Try swapping the order. FIXME: Do we need this? */ | |
1086 | if (! REG_P (x1)) | |
1087 | { | |
1088 | rtx tem = x1; | |
1089 | x1 = x2; | |
1090 | x2 = tem; | |
1091 | } | |
1092 | ||
a824924d | 1093 | /* (mem (plus (reg?) (?))) */ |
bcf684c7 | 1094 | if (!REG_P (x1) || !MMIX_REG_OK (x1)) |
a824924d | 1095 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
bcf684c7 | 1096 | |
a824924d | 1097 | /* (mem (plus (reg) (reg?))) */ |
bcf684c7 HPN |
1098 | if (REG_P (x2) && MMIX_REG_OK (x2)) |
1099 | return 1; | |
1100 | ||
a824924d | 1101 | /* (mem (plus (reg) (0..255?))) */ |
e076319b | 1102 | if (satisfies_constraint_I (x2)) |
bcf684c7 | 1103 | return 1; |
a824924d HPN |
1104 | |
1105 | return 0; | |
bcf684c7 HPN |
1106 | } |
1107 | ||
a824924d | 1108 | return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x); |
bcf684c7 HPN |
1109 | } |
1110 | ||
1a627b35 | 1111 | /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ |
bcf684c7 | 1112 | |
1a627b35 RS |
1113 | static bool |
1114 | mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) | |
bcf684c7 HPN |
1115 | { |
1116 | RTX_CODE code = GET_CODE (x); | |
1117 | ||
1118 | /* We must allow any number due to the way the cse passes works; if we | |
1119 | do not allow any number here, general_operand will fail, and insns | |
1120 | will fatally fail recognition instead of "softly". */ | |
1121 | if (code == CONST_INT || code == CONST_DOUBLE) | |
1122 | return 1; | |
1123 | ||
1124 | return CONSTANT_ADDRESS_P (x); | |
1125 | } | |
1126 | ||
1127 | /* SELECT_CC_MODE. */ | |
1128 | ||
1129 | enum machine_mode | |
4e58524e | 1130 | mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) |
bcf684c7 HPN |
1131 | { |
1132 | /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to | |
1133 | output different compare insns. Note that we do not check the | |
1134 | validity of the comparison here. */ | |
1135 | ||
1136 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1137 | { | |
1138 | if (op == ORDERED || op == UNORDERED || op == UNGE | |
1139 | || op == UNGT || op == UNLE || op == UNLT) | |
1140 | return CC_FUNmode; | |
1141 | ||
1142 | if (op == EQ || op == NE) | |
1143 | return CC_FPEQmode; | |
1144 | ||
1145 | return CC_FPmode; | |
1146 | } | |
1147 | ||
1148 | if (op == GTU || op == LTU || op == GEU || op == LEU) | |
1149 | return CC_UNSmode; | |
1150 | ||
1151 | return CCmode; | |
1152 | } | |
1153 | ||
bcf684c7 HPN |
1154 | /* REVERSIBLE_CC_MODE. */ |
1155 | ||
1156 | int | |
4e58524e | 1157 | mmix_reversible_cc_mode (enum machine_mode mode) |
bcf684c7 HPN |
1158 | { |
1159 | /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float | |
c583c5c3 | 1160 | compares. */ |
bcf684c7 HPN |
1161 | return mode != CC_FPmode; |
1162 | } | |
1163 | ||
3c50106f | 1164 | /* TARGET_RTX_COSTS. */ |
bcf684c7 | 1165 | |
3c50106f | 1166 | static bool |
4e58524e HPN |
1167 | mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED, |
1168 | int code ATTRIBUTE_UNUSED, | |
1169 | int outer_code ATTRIBUTE_UNUSED, | |
68f932c4 | 1170 | int opno ATTRIBUTE_UNUSED, |
f40751dd JH |
1171 | int *total ATTRIBUTE_UNUSED, |
1172 | bool speed ATTRIBUTE_UNUSED) | |
bcf684c7 HPN |
1173 | { |
1174 | /* For the time being, this is just a stub and we'll accept the | |
1175 | generic calculations, until we can do measurements, at least. | |
1176 | Say we did not modify any calculated costs. */ | |
3c50106f | 1177 | return false; |
bcf684c7 HPN |
1178 | } |
1179 | ||
6e9ee54c | 1180 | /* TARGET_REGISTER_MOVE_COST. |
bcf684c7 | 1181 | |
6e9ee54c AS |
1182 | The special registers can only move to and from general regs, and we |
1183 | need to check that their constraints match, so say 3 for them. */ | |
1184 | ||
1185 | static int | |
4e58524e | 1186 | mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, |
6e9ee54c AS |
1187 | reg_class_t from, |
1188 | reg_class_t to) | |
bcf684c7 HPN |
1189 | { |
1190 | return (from == GENERAL_REGS && from == to) ? 2 : 3; | |
1191 | } | |
1192 | ||
1193 | /* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a | |
1194 | compile-time constant; it's used in an asm in crtstuff.c, compiled for | |
1195 | the target. */ | |
1196 | ||
1197 | /* DATA_SECTION_ASM_OP. */ | |
1198 | ||
1199 | const char * | |
4e58524e | 1200 | mmix_data_section_asm_op (void) |
bcf684c7 HPN |
1201 | { |
1202 | return "\t.data ! mmixal:= 8H LOC 9B"; | |
1203 | } | |
1204 | ||
fb49053f | 1205 | static void |
4e58524e | 1206 | mmix_encode_section_info (tree decl, rtx rtl, int first) |
bcf684c7 HPN |
1207 | { |
1208 | /* Test for an external declaration, and do nothing if it is one. */ | |
1209 | if ((TREE_CODE (decl) == VAR_DECL | |
91312b81 HPN |
1210 | && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl))) |
1211 | || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl))) | |
bcf684c7 | 1212 | ; |
4f1aac42 | 1213 | else if (first && DECL_P (decl)) |
bcf684c7 HPN |
1214 | { |
1215 | /* For non-visible declarations, add a "@" prefix, which we skip | |
1216 | when the label is output. If the label does not have this | |
a824924d | 1217 | prefix, a ":" is output if -mtoplevel-symbols. |
bcf684c7 HPN |
1218 | |
1219 | Note that this does not work for data that is declared extern and | |
1220 | later defined as static. If there's code in between, that code | |
a824924d HPN |
1221 | will refer to the extern declaration, and vice versa. This just |
1222 | means that when -mtoplevel-symbols is in use, we can just handle | |
1223 | well-behaved ISO-compliant code. */ | |
bcf684c7 | 1224 | |
c6a2438a | 1225 | const char *str = XSTR (XEXP (rtl, 0), 0); |
bcf684c7 | 1226 | int len = strlen (str); |
5ead67f6 | 1227 | char *newstr = XALLOCAVEC (char, len + 2); |
d26d1cea | 1228 | newstr[0] = '@'; |
bcf684c7 | 1229 | strcpy (newstr + 1, str); |
d26d1cea | 1230 | XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1); |
bcf684c7 HPN |
1231 | } |
1232 | ||
a824924d HPN |
1233 | /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We |
1234 | may need different options to reach for different things with GETA. | |
1235 | For now, functions and things we know or have been told are constant. */ | |
1236 | if (TREE_CODE (decl) == FUNCTION_DECL | |
1237 | || TREE_CONSTANT (decl) | |
1238 | || (TREE_CODE (decl) == VAR_DECL | |
1239 | && TREE_READONLY (decl) | |
1240 | && !TREE_SIDE_EFFECTS (decl) | |
1241 | && (!DECL_INITIAL (decl) | |
1242 | || TREE_CONSTANT (DECL_INITIAL (decl))))) | |
c6a2438a | 1243 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1; |
bcf684c7 HPN |
1244 | } |
1245 | ||
772c5265 | 1246 | static const char * |
4e58524e | 1247 | mmix_strip_name_encoding (const char *name) |
bcf684c7 HPN |
1248 | { |
1249 | for (; (*name == '@' || *name == '*'); name++) | |
1250 | ; | |
1251 | ||
1252 | return name; | |
1253 | } | |
1254 | ||
1bc7c5b6 ZW |
1255 | /* TARGET_ASM_FILE_START. |
1256 | We just emit a little comment for the time being. */ | |
bcf684c7 | 1257 | |
1bc7c5b6 | 1258 | static void |
4e58524e | 1259 | mmix_file_start (void) |
bcf684c7 | 1260 | { |
1bc7c5b6 | 1261 | default_file_start (); |
bcf684c7 | 1262 | |
1bc7c5b6 | 1263 | fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file); |
bcf684c7 | 1264 | |
ff482c8d | 1265 | /* Make sure each file starts with the text section. */ |
d6b5193b | 1266 | switch_to_section (text_section); |
bcf684c7 HPN |
1267 | } |
1268 | ||
a5fe455b | 1269 | /* TARGET_ASM_FILE_END. */ |
bcf684c7 | 1270 | |
a5fe455b | 1271 | static void |
4e58524e | 1272 | mmix_file_end (void) |
bcf684c7 | 1273 | { |
ff482c8d | 1274 | /* Make sure each file ends with the data section. */ |
d6b5193b | 1275 | switch_to_section (data_section); |
bcf684c7 HPN |
1276 | } |
1277 | ||
501d087d | 1278 | /* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */ |
bcf684c7 | 1279 | |
501d087d | 1280 | static void |
4e58524e | 1281 | mmix_asm_output_source_filename (FILE *stream, const char *name) |
bcf684c7 HPN |
1282 | { |
1283 | fprintf (stream, "# 1 "); | |
1284 | OUTPUT_QUOTED_STRING (stream, name); | |
1285 | fprintf (stream, "\n"); | |
1286 | } | |
1287 | ||
1288 | /* OUTPUT_QUOTED_STRING. */ | |
1289 | ||
1290 | void | |
4e58524e | 1291 | mmix_output_quoted_string (FILE *stream, const char *string, int length) |
bcf684c7 HPN |
1292 | { |
1293 | const char * string_end = string + length; | |
75540760 | 1294 | static const char *const unwanted_chars = "\"[]\\"; |
bcf684c7 HPN |
1295 | |
1296 | /* Output "any character except newline and double quote character". We | |
1297 | play it safe and avoid all control characters too. We also do not | |
1298 | want [] as characters, should input be passed through m4 with [] as | |
1299 | quotes. Further, we avoid "\", because the GAS port handles it as a | |
1300 | quoting character. */ | |
1301 | while (string < string_end) | |
1302 | { | |
1303 | if (*string | |
1304 | && (unsigned char) *string < 128 | |
1305 | && !ISCNTRL (*string) | |
1306 | && strchr (unwanted_chars, *string) == NULL) | |
1307 | { | |
1308 | fputc ('"', stream); | |
1309 | while (*string | |
1310 | && (unsigned char) *string < 128 | |
1311 | && !ISCNTRL (*string) | |
1312 | && strchr (unwanted_chars, *string) == NULL | |
1313 | && string < string_end) | |
1314 | { | |
1315 | fputc (*string, stream); | |
1316 | string++; | |
1317 | } | |
1318 | fputc ('"', stream); | |
1319 | if (string < string_end) | |
1320 | fprintf (stream, ","); | |
1321 | } | |
1322 | if (string < string_end) | |
1323 | { | |
1324 | fprintf (stream, "#%x", *string & 255); | |
1325 | string++; | |
1326 | if (string < string_end) | |
1327 | fprintf (stream, ","); | |
1328 | } | |
1329 | } | |
1330 | } | |
1331 | ||
301d03af RS |
1332 | /* Target hook for assembling integer objects. Use mmix_print_operand |
1333 | for WYDE and TETRA. Use mmix_output_octa to output 8-byte | |
1334 | CONST_DOUBLEs. */ | |
bcf684c7 | 1335 | |
301d03af | 1336 | static bool |
4e58524e | 1337 | mmix_assemble_integer (rtx x, unsigned int size, int aligned_p) |
bcf684c7 | 1338 | { |
301d03af RS |
1339 | if (aligned_p) |
1340 | switch (size) | |
1341 | { | |
a02ac966 HPN |
1342 | /* We handle a limited number of types of operands in here. But |
1343 | that's ok, because we can punt to generic functions. We then | |
7d9b6378 HPN |
1344 | pretend that aligned data isn't needed, so the usual .<pseudo> |
1345 | syntax is used (which works for aligned data too). We actually | |
1346 | *must* do that, since we say we don't have simple aligned | |
1347 | pseudos, causing this function to be called. We just try and | |
1348 | keep as much compatibility as possible with mmixal syntax for | |
1349 | normal cases (i.e. without GNU extensions and C only). */ | |
301d03af | 1350 | case 1: |
a02ac966 HPN |
1351 | if (GET_CODE (x) != CONST_INT) |
1352 | { | |
1353 | aligned_p = 0; | |
1354 | break; | |
1355 | } | |
301d03af RS |
1356 | fputs ("\tBYTE\t", asm_out_file); |
1357 | mmix_print_operand (asm_out_file, x, 'B'); | |
1358 | fputc ('\n', asm_out_file); | |
1359 | return true; | |
1360 | ||
1361 | case 2: | |
a02ac966 HPN |
1362 | if (GET_CODE (x) != CONST_INT) |
1363 | { | |
1364 | aligned_p = 0; | |
1365 | break; | |
1366 | } | |
301d03af RS |
1367 | fputs ("\tWYDE\t", asm_out_file); |
1368 | mmix_print_operand (asm_out_file, x, 'W'); | |
1369 | fputc ('\n', asm_out_file); | |
1370 | return true; | |
1371 | ||
1372 | case 4: | |
b007569d | 1373 | if (GET_CODE (x) != CONST_INT) |
a02ac966 HPN |
1374 | { |
1375 | aligned_p = 0; | |
1376 | break; | |
1377 | } | |
301d03af RS |
1378 | fputs ("\tTETRA\t", asm_out_file); |
1379 | mmix_print_operand (asm_out_file, x, 'L'); | |
1380 | fputc ('\n', asm_out_file); | |
1381 | return true; | |
1382 | ||
1383 | case 8: | |
107a4b41 NS |
1384 | /* We don't get here anymore for CONST_DOUBLE, because DImode |
1385 | isn't expressed as CONST_DOUBLE, and DFmode is handled | |
1386 | elsewhere. */ | |
1387 | gcc_assert (GET_CODE (x) != CONST_DOUBLE); | |
a02ac966 | 1388 | assemble_integer_with_op ("\tOCTA\t", x); |
301d03af RS |
1389 | return true; |
1390 | } | |
1391 | return default_assemble_integer (x, size, aligned_p); | |
bcf684c7 HPN |
1392 | } |
1393 | ||
1394 | /* ASM_OUTPUT_ASCII. */ | |
1395 | ||
1396 | void | |
4e58524e | 1397 | mmix_asm_output_ascii (FILE *stream, const char *string, int length) |
bcf684c7 HPN |
1398 | { |
1399 | while (length > 0) | |
1400 | { | |
1401 | int chunk_size = length > 60 ? 60 : length; | |
1402 | fprintf (stream, "\tBYTE "); | |
1403 | mmix_output_quoted_string (stream, string, chunk_size); | |
1404 | string += chunk_size; | |
1405 | length -= chunk_size; | |
1406 | fprintf (stream, "\n"); | |
1407 | } | |
1408 | } | |
1409 | ||
1410 | /* ASM_OUTPUT_ALIGNED_COMMON. */ | |
1411 | ||
1412 | void | |
4e58524e HPN |
1413 | mmix_asm_output_aligned_common (FILE *stream, |
1414 | const char *name, | |
1415 | int size, | |
1416 | int align) | |
bcf684c7 HPN |
1417 | { |
1418 | /* This is mostly the elfos.h one. There doesn't seem to be a way to | |
1419 | express this in a mmixal-compatible way. */ | |
1420 | fprintf (stream, "\t.comm\t"); | |
1421 | assemble_name (stream, name); | |
1422 | fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n", | |
1423 | size, align / BITS_PER_UNIT); | |
1424 | } | |
1425 | ||
1426 | /* ASM_OUTPUT_ALIGNED_LOCAL. */ | |
1427 | ||
1428 | void | |
4e58524e HPN |
1429 | mmix_asm_output_aligned_local (FILE *stream, |
1430 | const char *name, | |
1431 | int size, | |
1432 | int align) | |
bcf684c7 | 1433 | { |
d6b5193b | 1434 | switch_to_section (data_section); |
bcf684c7 HPN |
1435 | |
1436 | ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT)); | |
1437 | assemble_name (stream, name); | |
1438 | fprintf (stream, "\tLOC @+%d\n", size); | |
1439 | } | |
1440 | ||
1441 | /* ASM_OUTPUT_LABEL. */ | |
1442 | ||
1443 | void | |
4e58524e | 1444 | mmix_asm_output_label (FILE *stream, const char *name) |
bcf684c7 HPN |
1445 | { |
1446 | assemble_name (stream, name); | |
1447 | fprintf (stream, "\tIS @\n"); | |
1448 | } | |
1449 | ||
8d6cdc68 HPN |
1450 | /* ASM_OUTPUT_INTERNAL_LABEL. */ |
1451 | ||
1452 | void | |
1453 | mmix_asm_output_internal_label (FILE *stream, const char *name) | |
1454 | { | |
1455 | assemble_name_raw (stream, name); | |
1456 | fprintf (stream, "\tIS @\n"); | |
1457 | } | |
1458 | ||
bcf684c7 HPN |
1459 | /* ASM_DECLARE_REGISTER_GLOBAL. */ |
1460 | ||
1461 | void | |
4e58524e HPN |
1462 | mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED, |
1463 | tree decl ATTRIBUTE_UNUSED, | |
1464 | int regno ATTRIBUTE_UNUSED, | |
1465 | const char *name ATTRIBUTE_UNUSED) | |
bcf684c7 HPN |
1466 | { |
1467 | /* Nothing to do here, but there *will* be, therefore the framework is | |
1468 | here. */ | |
1469 | } | |
1470 | ||
bcf684c7 HPN |
1471 | /* ASM_WEAKEN_LABEL. */ |
1472 | ||
1473 | void | |
4e58524e HPN |
1474 | mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED, |
1475 | const char *name ATTRIBUTE_UNUSED) | |
bcf684c7 | 1476 | { |
761c70aa | 1477 | fprintf (stream, "\t.weak "); |
bcf684c7 | 1478 | assemble_name (stream, name); |
761c70aa | 1479 | fprintf (stream, " ! mmixal-incompatible\n"); |
bcf684c7 HPN |
1480 | } |
1481 | ||
1482 | /* MAKE_DECL_ONE_ONLY. */ | |
1483 | ||
1484 | void | |
4e58524e | 1485 | mmix_make_decl_one_only (tree decl) |
bcf684c7 HPN |
1486 | { |
1487 | DECL_WEAK (decl) = 1; | |
1488 | } | |
1489 | ||
1490 | /* ASM_OUTPUT_LABELREF. | |
1491 | Strip GCC's '*' and our own '@'. No order is assumed. */ | |
1492 | ||
1493 | void | |
4e58524e | 1494 | mmix_asm_output_labelref (FILE *stream, const char *name) |
bcf684c7 | 1495 | { |
91312b81 | 1496 | int is_extern = 1; |
bcf684c7 HPN |
1497 | |
1498 | for (; (*name == '@' || *name == '*'); name++) | |
1499 | if (*name == '@') | |
91312b81 | 1500 | is_extern = 0; |
bcf684c7 HPN |
1501 | |
1502 | asm_fprintf (stream, "%s%U%s", | |
1503 | is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "", | |
1504 | name); | |
1505 | } | |
1506 | ||
bcf684c7 HPN |
1507 | /* ASM_OUTPUT_DEF. */ |
1508 | ||
1509 | void | |
4e58524e | 1510 | mmix_asm_output_def (FILE *stream, const char *name, const char *value) |
bcf684c7 HPN |
1511 | { |
1512 | assemble_name (stream, name); | |
1513 | fprintf (stream, "\tIS "); | |
1514 | assemble_name (stream, value); | |
1515 | fputc ('\n', stream); | |
1516 | } | |
1517 | ||
5057fa13 | 1518 | /* TARGET_PRINT_OPERAND. */ |
bcf684c7 | 1519 | |
5057fa13 | 1520 | static void |
4e58524e | 1521 | mmix_print_operand (FILE *stream, rtx x, int code) |
bcf684c7 HPN |
1522 | { |
1523 | /* When we add support for different codes later, we can, when needed, | |
1524 | drop through to the main handler with a modified operand. */ | |
1525 | rtx modified_x = x; | |
1f2641b6 | 1526 | int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0; |
bcf684c7 HPN |
1527 | |
1528 | switch (code) | |
1529 | { | |
1530 | /* Unrelated codes are in alphabetic order. */ | |
1531 | ||
91312b81 HPN |
1532 | case '+': |
1533 | /* For conditional branches, output "P" for a probable branch. */ | |
1534 | if (TARGET_BRANCH_PREDICT) | |
1535 | { | |
1536 | x = find_reg_note (current_output_insn, REG_BR_PROB, 0); | |
e5af9ddd | 1537 | if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2) |
91312b81 HPN |
1538 | putc ('P', stream); |
1539 | } | |
1540 | return; | |
1541 | ||
66b8c57f HPN |
1542 | case '.': |
1543 | /* For the %d in POP %d,0. */ | |
1544 | fprintf (stream, "%d", MMIX_POP_ARGUMENT ()); | |
1545 | return; | |
1546 | ||
bcf684c7 HPN |
1547 | case 'B': |
1548 | if (GET_CODE (x) != CONST_INT) | |
1549 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1550 | fprintf (stream, "%d", (int) (INTVAL (x) & 0xff)); | |
1551 | return; | |
1552 | ||
1553 | case 'H': | |
1554 | /* Highpart. Must be general register, and not the last one, as | |
1555 | that one cannot be part of a consecutive register pair. */ | |
1f2641b6 HPN |
1556 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1557 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
bcf684c7 HPN |
1558 | |
1559 | /* This is big-endian, so the high-part is the first one. */ | |
1f2641b6 | 1560 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); |
bcf684c7 HPN |
1561 | return; |
1562 | ||
1563 | case 'L': | |
1564 | /* Lowpart. Must be CONST_INT or general register, and not the last | |
1565 | one, as that one cannot be part of a consecutive register pair. */ | |
1566 | if (GET_CODE (x) == CONST_INT) | |
1567 | { | |
1568 | fprintf (stream, "#%lx", | |
1569 | (unsigned long) (INTVAL (x) | |
1570 | & ((unsigned int) 0x7fffffff * 2 + 1))); | |
1571 | return; | |
1572 | } | |
1573 | ||
1574 | if (GET_CODE (x) == SYMBOL_REF) | |
1575 | { | |
1576 | output_addr_const (stream, x); | |
1577 | return; | |
1578 | } | |
1579 | ||
1f2641b6 HPN |
1580 | if (regno > MMIX_LAST_GENERAL_REGISTER - 1) |
1581 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
bcf684c7 HPN |
1582 | |
1583 | /* This is big-endian, so the low-part is + 1. */ | |
1f2641b6 | 1584 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]); |
bcf684c7 HPN |
1585 | return; |
1586 | ||
1587 | /* Can't use 'a' because that's a generic modifier for address | |
1588 | output. */ | |
1589 | case 'A': | |
1590 | mmix_output_shiftvalue_op_from_str (stream, "ANDN", | |
1591 | ~(unsigned HOST_WIDEST_INT) | |
1592 | mmix_intval (x)); | |
1593 | return; | |
1594 | ||
1595 | case 'i': | |
1596 | mmix_output_shiftvalue_op_from_str (stream, "INC", | |
1597 | (unsigned HOST_WIDEST_INT) | |
1598 | mmix_intval (x)); | |
1599 | return; | |
1600 | ||
1601 | case 'o': | |
1602 | mmix_output_shiftvalue_op_from_str (stream, "OR", | |
1603 | (unsigned HOST_WIDEST_INT) | |
1604 | mmix_intval (x)); | |
1605 | return; | |
1606 | ||
1607 | case 's': | |
1608 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
1609 | (unsigned HOST_WIDEST_INT) | |
1610 | mmix_intval (x)); | |
1611 | return; | |
1612 | ||
1613 | case 'd': | |
1614 | case 'D': | |
1615 | mmix_output_condition (stream, x, (code == 'D')); | |
1616 | return; | |
1617 | ||
1618 | case 'e': | |
1619 | /* Output an extra "e" to make fcmpe, fune. */ | |
1620 | if (TARGET_FCMP_EPSILON) | |
1621 | fprintf (stream, "e"); | |
1622 | return; | |
1623 | ||
1624 | case 'm': | |
1625 | /* Output the number minus 1. */ | |
1626 | if (GET_CODE (x) != CONST_INT) | |
1627 | { | |
1628 | fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT", | |
1629 | x); | |
1630 | } | |
1631 | fprintf (stream, HOST_WIDEST_INT_PRINT_DEC, | |
1632 | (HOST_WIDEST_INT) (mmix_intval (x) - 1)); | |
1633 | return; | |
1634 | ||
1635 | case 'p': | |
1636 | /* Store the number of registers we want to save. This was setup | |
1637 | by the prologue. The actual operand contains the number of | |
1638 | registers to pass, but we don't use it currently. Anyway, we | |
1639 | need to output the number of saved registers here. */ | |
1f2641b6 HPN |
1640 | fprintf (stream, "%d", |
1641 | cfun->machine->highest_saved_stack_register + 1); | |
bcf684c7 HPN |
1642 | return; |
1643 | ||
1644 | case 'r': | |
1645 | /* Store the register to output a constant to. */ | |
1646 | if (! REG_P (x)) | |
c725bd79 | 1647 | fatal_insn ("MMIX Internal: Expected a register, not this", x); |
1f2641b6 | 1648 | mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno); |
bcf684c7 HPN |
1649 | return; |
1650 | ||
1651 | case 'I': | |
1652 | /* Output the constant. Note that we use this for floats as well. */ | |
1653 | if (GET_CODE (x) != CONST_INT | |
1654 | && (GET_CODE (x) != CONST_DOUBLE | |
1655 | || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode | |
1656 | && GET_MODE (x) != SFmode))) | |
c725bd79 | 1657 | fatal_insn ("MMIX Internal: Expected a constant, not this", x); |
bcf684c7 HPN |
1658 | mmix_output_register_setting (stream, |
1659 | mmix_output_destination_register, | |
1660 | mmix_intval (x), 0); | |
1661 | return; | |
1662 | ||
1663 | case 'U': | |
1664 | /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */ | |
1665 | if (TARGET_ZERO_EXTEND) | |
1666 | putc ('U', stream); | |
1667 | return; | |
1668 | ||
1669 | case 'v': | |
1670 | mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x)); | |
1671 | return; | |
1672 | ||
1673 | case 'V': | |
1674 | mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x)); | |
1675 | return; | |
1676 | ||
1677 | case 'W': | |
1678 | if (GET_CODE (x) != CONST_INT) | |
1679 | fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x); | |
1680 | fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff)); | |
1681 | return; | |
1682 | ||
1683 | case 0: | |
1684 | /* Nothing to do. */ | |
1685 | break; | |
1686 | ||
1687 | default: | |
1688 | /* Presumably there's a missing case above if we get here. */ | |
9e637a26 | 1689 | internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code); |
bcf684c7 HPN |
1690 | } |
1691 | ||
1692 | switch (GET_CODE (modified_x)) | |
1693 | { | |
1694 | case REG: | |
1f2641b6 HPN |
1695 | regno = REGNO (modified_x); |
1696 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1697 | internal_error ("MMIX Internal: Bad register: %d", regno); | |
1698 | fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]); | |
bcf684c7 HPN |
1699 | return; |
1700 | ||
1701 | case MEM: | |
1702 | output_address (XEXP (modified_x, 0)); | |
1703 | return; | |
1704 | ||
1705 | case CONST_INT: | |
1706 | /* For -2147483648, mmixal complains that the constant does not fit | |
1707 | in 4 bytes, so let's output it as hex. Take care to handle hosts | |
1708 | where HOST_WIDE_INT is longer than an int. | |
1709 | ||
1710 | Print small constants +-255 using decimal. */ | |
1711 | ||
1712 | if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256) | |
1713 | fprintf (stream, "%d", (int) (INTVAL (modified_x))); | |
1714 | else | |
1715 | fprintf (stream, "#%x", | |
1716 | (int) (INTVAL (modified_x)) & (unsigned int) ~0); | |
1717 | return; | |
1718 | ||
1719 | case CONST_DOUBLE: | |
1720 | /* Do somewhat as CONST_INT. */ | |
301d03af | 1721 | mmix_output_octa (stream, mmix_intval (modified_x), 0); |
bcf684c7 HPN |
1722 | return; |
1723 | ||
1724 | case CONST: | |
1725 | output_addr_const (stream, modified_x); | |
1726 | return; | |
1727 | ||
1728 | default: | |
1729 | /* No need to test for all strange things. Let output_addr_const do | |
1730 | it for us. */ | |
1731 | if (CONSTANT_P (modified_x) | |
1732 | /* Strangely enough, this is not included in CONSTANT_P. | |
1733 | FIXME: Ask/check about sanity here. */ | |
b64925dc | 1734 | || LABEL_P (modified_x)) |
bcf684c7 HPN |
1735 | { |
1736 | output_addr_const (stream, modified_x); | |
1737 | return; | |
1738 | } | |
1739 | ||
1740 | /* We need the original here. */ | |
1741 | fatal_insn ("MMIX Internal: Cannot decode this operand", x); | |
1742 | } | |
1743 | } | |
1744 | ||
5057fa13 | 1745 | /* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ |
bcf684c7 | 1746 | |
5057fa13 AS |
1747 | static bool |
1748 | mmix_print_operand_punct_valid_p (unsigned char code) | |
bcf684c7 | 1749 | { |
91312b81 | 1750 | /* A '+' is used for branch prediction, similar to other ports. */ |
66b8c57f HPN |
1751 | return code == '+' |
1752 | /* A '.' is used for the %d in the POP %d,0 return insn. */ | |
1753 | || code == '.'; | |
bcf684c7 HPN |
1754 | } |
1755 | ||
5057fa13 | 1756 | /* TARGET_PRINT_OPERAND_ADDRESS. */ |
bcf684c7 | 1757 | |
5057fa13 | 1758 | static void |
4e58524e | 1759 | mmix_print_operand_address (FILE *stream, rtx x) |
bcf684c7 HPN |
1760 | { |
1761 | if (REG_P (x)) | |
1762 | { | |
1763 | /* I find the generated assembly code harder to read without | |
1764 | the ",0". */ | |
1f2641b6 | 1765 | fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]); |
bcf684c7 HPN |
1766 | return; |
1767 | } | |
1768 | else if (GET_CODE (x) == PLUS) | |
1769 | { | |
1770 | rtx x1 = XEXP (x, 0); | |
1771 | rtx x2 = XEXP (x, 1); | |
1772 | ||
bcf684c7 HPN |
1773 | if (REG_P (x1)) |
1774 | { | |
1f2641b6 | 1775 | fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]); |
bcf684c7 HPN |
1776 | |
1777 | if (REG_P (x2)) | |
1778 | { | |
1f2641b6 HPN |
1779 | fprintf (stream, "%s", |
1780 | reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]); | |
bcf684c7 HPN |
1781 | return; |
1782 | } | |
e076319b | 1783 | else if (satisfies_constraint_I (x2)) |
bcf684c7 HPN |
1784 | { |
1785 | output_addr_const (stream, x2); | |
1786 | return; | |
1787 | } | |
1788 | } | |
1789 | } | |
1790 | ||
1a627b35 | 1791 | if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x)) |
a824924d HPN |
1792 | { |
1793 | output_addr_const (stream, x); | |
1794 | return; | |
1795 | } | |
1796 | ||
bcf684c7 HPN |
1797 | fatal_insn ("MMIX Internal: This is not a recognized address", x); |
1798 | } | |
1799 | ||
1800 | /* ASM_OUTPUT_REG_PUSH. */ | |
1801 | ||
1802 | void | |
4e58524e | 1803 | mmix_asm_output_reg_push (FILE *stream, int regno) |
bcf684c7 HPN |
1804 | { |
1805 | fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n", | |
1806 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
1807 | reg_names[MMIX_STACK_POINTER_REGNUM], | |
1f2641b6 | 1808 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
bcf684c7 HPN |
1809 | reg_names[MMIX_STACK_POINTER_REGNUM]); |
1810 | } | |
1811 | ||
1812 | /* ASM_OUTPUT_REG_POP. */ | |
1813 | ||
1814 | void | |
4e58524e | 1815 | mmix_asm_output_reg_pop (FILE *stream, int regno) |
bcf684c7 HPN |
1816 | { |
1817 | fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n", | |
1f2641b6 | 1818 | reg_names[MMIX_OUTPUT_REGNO (regno)], |
bcf684c7 HPN |
1819 | reg_names[MMIX_STACK_POINTER_REGNUM], |
1820 | reg_names[MMIX_STACK_POINTER_REGNUM]); | |
1821 | } | |
1822 | ||
1823 | /* ASM_OUTPUT_ADDR_DIFF_ELT. */ | |
1824 | ||
1825 | void | |
4e58524e HPN |
1826 | mmix_asm_output_addr_diff_elt (FILE *stream, |
1827 | rtx body ATTRIBUTE_UNUSED, | |
1828 | int value, | |
1829 | int rel) | |
bcf684c7 HPN |
1830 | { |
1831 | fprintf (stream, "\tTETRA L%d-L%d\n", value, rel); | |
1832 | } | |
1833 | ||
1834 | /* ASM_OUTPUT_ADDR_VEC_ELT. */ | |
1835 | ||
1836 | void | |
4e58524e | 1837 | mmix_asm_output_addr_vec_elt (FILE *stream, int value) |
bcf684c7 HPN |
1838 | { |
1839 | fprintf (stream, "\tOCTA L:%d\n", value); | |
1840 | } | |
1841 | ||
1842 | /* ASM_OUTPUT_SKIP. */ | |
1843 | ||
1844 | void | |
4e58524e | 1845 | mmix_asm_output_skip (FILE *stream, int nbytes) |
bcf684c7 HPN |
1846 | { |
1847 | fprintf (stream, "\tLOC @+%d\n", nbytes); | |
1848 | } | |
1849 | ||
1850 | /* ASM_OUTPUT_ALIGN. */ | |
1851 | ||
1852 | void | |
4e58524e | 1853 | mmix_asm_output_align (FILE *stream, int power) |
bcf684c7 HPN |
1854 | { |
1855 | /* We need to record the needed alignment of this section in the object, | |
1856 | so we have to output an alignment directive. Use a .p2align (not | |
1857 | .align) so people will never have to wonder about whether the | |
1858 | argument is in number of bytes or the log2 thereof. We do it in | |
1859 | addition to the LOC directive, so nothing needs tweaking when | |
1860 | copy-pasting assembly into mmixal. */ | |
1861 | fprintf (stream, "\t.p2align %d\n", power); | |
1862 | fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1); | |
1863 | } | |
1864 | ||
1865 | /* DBX_REGISTER_NUMBER. */ | |
1866 | ||
4ae50669 JR |
1867 | unsigned |
1868 | mmix_dbx_register_number (unsigned regno) | |
bcf684c7 | 1869 | { |
1f2641b6 HPN |
1870 | /* Adjust the register number to the one it will be output as, dammit. |
1871 | It'd be nice if we could check the assumption that we're filling a | |
1872 | gap, but every register between the last saved register and parameter | |
1873 | registers might be a valid parameter register. */ | |
1874 | regno = MMIX_OUTPUT_REGNO (regno); | |
bcf684c7 HPN |
1875 | |
1876 | /* We need to renumber registers to get the number of the return address | |
1877 | register in the range 0..255. It is also space-saving if registers | |
1878 | mentioned in the call-frame information (which uses this function by | |
1879 | defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered | |
1880 | 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */ | |
1881 | return regno >= 224 ? (regno - 224) : (regno + 48); | |
1882 | } | |
1883 | ||
f5143c46 | 1884 | /* End of target macro support functions. |
bcf684c7 | 1885 | |
4e58524e | 1886 | Now the MMIX port's own functions. First the exported ones. */ |
bcf684c7 | 1887 | |
957ec0f9 HPN |
1888 | /* Wrapper for get_hard_reg_initial_val since integrate.h isn't included |
1889 | from insn-emit.c. */ | |
1890 | ||
1891 | rtx | |
4e58524e | 1892 | mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno) |
957ec0f9 HPN |
1893 | { |
1894 | return get_hard_reg_initial_val (mode, regno); | |
1895 | } | |
1896 | ||
a0ab749a | 1897 | /* Nonzero when the function epilogue is simple enough that a single |
957ec0f9 | 1898 | "POP %d,0" should be used even within the function. */ |
66b8c57f HPN |
1899 | |
1900 | int | |
4e58524e | 1901 | mmix_use_simple_return (void) |
66b8c57f HPN |
1902 | { |
1903 | int regno; | |
1904 | ||
1905 | int stack_space_to_allocate | |
38173d38 JH |
1906 | = (crtl->outgoing_args_size |
1907 | + crtl->args.pretend_args_size | |
66b8c57f HPN |
1908 | + get_frame_size () + 7) & ~7; |
1909 | ||
1910 | if (!TARGET_USE_RETURN_INSN || !reload_completed) | |
1911 | return 0; | |
1912 | ||
1913 | for (regno = 255; | |
1914 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1915 | regno--) | |
1916 | /* Note that we assume that the frame-pointer-register is one of these | |
1917 | registers, in which case we don't count it here. */ | |
1918 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
6fb5fa3c | 1919 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
66b8c57f HPN |
1920 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1921 | return 0; | |
1922 | ||
1923 | if (frame_pointer_needed) | |
1924 | stack_space_to_allocate += 8; | |
1925 | ||
1926 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1927 | stack_space_to_allocate += 16; | |
1928 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1929 | stack_space_to_allocate += 8; | |
1930 | ||
1931 | return stack_space_to_allocate == 0; | |
1932 | } | |
1933 | ||
957ec0f9 HPN |
1934 | |
1935 | /* Expands the function prologue into RTX. */ | |
1936 | ||
1937 | void | |
4e58524e | 1938 | mmix_expand_prologue (void) |
957ec0f9 HPN |
1939 | { |
1940 | HOST_WIDE_INT locals_size = get_frame_size (); | |
1941 | int regno; | |
1942 | HOST_WIDE_INT stack_space_to_allocate | |
38173d38 JH |
1943 | = (crtl->outgoing_args_size |
1944 | + crtl->args.pretend_args_size | |
957ec0f9 HPN |
1945 | + locals_size + 7) & ~7; |
1946 | HOST_WIDE_INT offset = -8; | |
1947 | ||
1948 | /* Add room needed to save global non-register-stack registers. */ | |
1949 | for (regno = 255; | |
1950 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
1951 | regno--) | |
1952 | /* Note that we assume that the frame-pointer-register is one of these | |
1953 | registers, in which case we don't count it here. */ | |
1954 | if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
6fb5fa3c | 1955 | && df_regs_ever_live_p (regno) && !call_used_regs[regno])) |
957ec0f9 HPN |
1956 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
1957 | stack_space_to_allocate += 8; | |
1958 | ||
1959 | /* If we do have a frame-pointer, add room for it. */ | |
1960 | if (frame_pointer_needed) | |
1961 | stack_space_to_allocate += 8; | |
1962 | ||
1963 | /* If we have a non-local label, we need to be able to unwind to it, so | |
1964 | store the current register stack pointer. Also store the return | |
1965 | address if we do that. */ | |
1966 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
1967 | stack_space_to_allocate += 16; | |
1968 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
1969 | /* If we do have a saved return-address slot, add room for it. */ | |
1970 | stack_space_to_allocate += 8; | |
1971 | ||
1972 | /* Make sure we don't get an unaligned stack. */ | |
1973 | if ((stack_space_to_allocate % 8) != 0) | |
ea40ba9c | 1974 | internal_error ("stack frame not a multiple of 8 bytes: %wd", |
957ec0f9 HPN |
1975 | stack_space_to_allocate); |
1976 | ||
38173d38 | 1977 | if (crtl->args.pretend_args_size) |
957ec0f9 HPN |
1978 | { |
1979 | int mmix_first_vararg_reg | |
1980 | = (MMIX_FIRST_INCOMING_ARG_REGNUM | |
1981 | + (MMIX_MAX_ARGS_IN_REGS | |
38173d38 | 1982 | - crtl->args.pretend_args_size / 8)); |
957ec0f9 HPN |
1983 | |
1984 | for (regno | |
1985 | = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1; | |
1986 | regno >= mmix_first_vararg_reg; | |
1987 | regno--) | |
1988 | { | |
1989 | if (offset < 0) | |
1990 | { | |
1991 | HOST_WIDE_INT stack_chunk | |
1992 | = stack_space_to_allocate > (256 - 8) | |
1993 | ? (256 - 8) : stack_space_to_allocate; | |
1994 | ||
1995 | mmix_emit_sp_add (-stack_chunk); | |
1996 | offset += stack_chunk; | |
1997 | stack_space_to_allocate -= stack_chunk; | |
1998 | } | |
1999 | ||
2000 | /* These registers aren't actually saved (as in "will be | |
2001 | restored"), so don't tell DWARF2 they're saved. */ | |
2002 | emit_move_insn (gen_rtx_MEM (DImode, | |
0a81f074 | 2003 | plus_constant (Pmode, stack_pointer_rtx, |
957ec0f9 HPN |
2004 | offset)), |
2005 | gen_rtx_REG (DImode, regno)); | |
2006 | offset -= 8; | |
2007 | } | |
2008 | } | |
2009 | ||
2010 | /* Store the frame-pointer. */ | |
2011 | ||
2012 | if (frame_pointer_needed) | |
2013 | { | |
2014 | rtx insn; | |
2015 | ||
2016 | if (offset < 0) | |
2017 | { | |
2018 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2019 | HOST_WIDE_INT stack_chunk | |
2020 | = stack_space_to_allocate > (256 - 8 - 8) | |
2021 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2022 | ||
2023 | mmix_emit_sp_add (-stack_chunk); | |
2024 | ||
2025 | offset += stack_chunk; | |
2026 | stack_space_to_allocate -= stack_chunk; | |
2027 | } | |
2028 | ||
2029 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
0a81f074 RS |
2030 | plus_constant (Pmode, |
2031 | stack_pointer_rtx, | |
957ec0f9 HPN |
2032 | offset)), |
2033 | hard_frame_pointer_rtx); | |
2034 | RTX_FRAME_RELATED_P (insn) = 1; | |
2035 | insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx, | |
2036 | stack_pointer_rtx, | |
2037 | GEN_INT (offset + 8))); | |
2038 | RTX_FRAME_RELATED_P (insn) = 1; | |
2039 | offset -= 8; | |
2040 | } | |
2041 | ||
2042 | if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2043 | { | |
2044 | rtx tmpreg, retreg; | |
2045 | rtx insn; | |
2046 | ||
2047 | /* Store the return-address, if one is needed on the stack. We | |
2048 | usually store it in a register when needed, but that doesn't work | |
2049 | with -fexceptions. */ | |
2050 | ||
2051 | if (offset < 0) | |
2052 | { | |
2053 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2054 | HOST_WIDE_INT stack_chunk | |
2055 | = stack_space_to_allocate > (256 - 8 - 8) | |
2056 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2057 | ||
2058 | mmix_emit_sp_add (-stack_chunk); | |
2059 | ||
2060 | offset += stack_chunk; | |
2061 | stack_space_to_allocate -= stack_chunk; | |
2062 | } | |
2063 | ||
2064 | tmpreg = gen_rtx_REG (DImode, 255); | |
2065 | retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM); | |
2066 | ||
2067 | /* Dwarf2 code is confused by the use of a temporary register for | |
2068 | storing the return address, so we have to express it as a note, | |
2069 | which we attach to the actual store insn. */ | |
2070 | emit_move_insn (tmpreg, retreg); | |
2071 | ||
2072 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
0a81f074 RS |
2073 | plus_constant (Pmode, |
2074 | stack_pointer_rtx, | |
957ec0f9 HPN |
2075 | offset)), |
2076 | tmpreg); | |
2077 | RTX_FRAME_RELATED_P (insn) = 1; | |
4ae50669 JR |
2078 | add_reg_note (insn, REG_FRAME_RELATED_EXPR, |
2079 | gen_rtx_SET (VOIDmode, | |
2080 | gen_rtx_MEM (DImode, | |
0a81f074 RS |
2081 | plus_constant (Pmode, |
2082 | stack_pointer_rtx, | |
4ae50669 JR |
2083 | offset)), |
2084 | retreg)); | |
957ec0f9 HPN |
2085 | |
2086 | offset -= 8; | |
2087 | } | |
2088 | else if (MMIX_CFUN_HAS_LANDING_PAD) | |
2089 | offset -= 8; | |
2090 | ||
2091 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2092 | { | |
2093 | /* Store the register defining the numbering of local registers, so | |
2094 | we know how long to unwind the register stack. */ | |
2095 | ||
2096 | if (offset < 0) | |
2097 | { | |
2098 | /* Get 8 less than otherwise, since we need to reach offset + 8. */ | |
2099 | HOST_WIDE_INT stack_chunk | |
2100 | = stack_space_to_allocate > (256 - 8 - 8) | |
2101 | ? (256 - 8 - 8) : stack_space_to_allocate; | |
2102 | ||
2103 | mmix_emit_sp_add (-stack_chunk); | |
2104 | ||
2105 | offset += stack_chunk; | |
2106 | stack_space_to_allocate -= stack_chunk; | |
2107 | } | |
2108 | ||
2109 | /* We don't tell dwarf2 about this one; we just have it to unwind | |
2110 | the register stack at landing pads. FIXME: It's a kludge because | |
2111 | we can't describe the effect of the PUSHJ and PUSHGO insns on the | |
2112 | register stack at the moment. Best thing would be to handle it | |
2113 | like stack-pointer offsets. Better: some hook into dwarf2out.c | |
2114 | to produce DW_CFA_expression:s that specify the increment of rO, | |
2115 | and unwind it at eh_return (preferred) or at the landing pad. | |
2116 | Then saves to $0..$G-1 could be specified through that register. */ | |
2117 | ||
2118 | emit_move_insn (gen_rtx_REG (DImode, 255), | |
2119 | gen_rtx_REG (DImode, | |
2120 | MMIX_rO_REGNUM)); | |
2121 | emit_move_insn (gen_rtx_MEM (DImode, | |
0a81f074 RS |
2122 | plus_constant (Pmode, stack_pointer_rtx, |
2123 | offset)), | |
957ec0f9 HPN |
2124 | gen_rtx_REG (DImode, 255)); |
2125 | offset -= 8; | |
2126 | } | |
2127 | ||
2128 | /* After the return-address and the frame-pointer, we have the local | |
2129 | variables. They're the ones that may have an "unaligned" size. */ | |
2130 | offset -= (locals_size + 7) & ~7; | |
2131 | ||
2132 | /* Now store all registers that are global, i.e. not saved by the | |
2133 | register file machinery. | |
2134 | ||
2135 | It is assumed that the frame-pointer is one of these registers, so it | |
2136 | is explicitly excluded in the count. */ | |
2137 | ||
2138 | for (regno = 255; | |
2139 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2140 | regno--) | |
2141 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
6fb5fa3c | 2142 | && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) |
957ec0f9 HPN |
2143 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2144 | { | |
2145 | rtx insn; | |
2146 | ||
2147 | if (offset < 0) | |
2148 | { | |
2149 | HOST_WIDE_INT stack_chunk | |
2150 | = (stack_space_to_allocate > (256 - offset - 8) | |
2151 | ? (256 - offset - 8) : stack_space_to_allocate); | |
2152 | ||
2153 | mmix_emit_sp_add (-stack_chunk); | |
2154 | offset += stack_chunk; | |
2155 | stack_space_to_allocate -= stack_chunk; | |
2156 | } | |
2157 | ||
2158 | insn = emit_move_insn (gen_rtx_MEM (DImode, | |
0a81f074 RS |
2159 | plus_constant (Pmode, |
2160 | stack_pointer_rtx, | |
957ec0f9 HPN |
2161 | offset)), |
2162 | gen_rtx_REG (DImode, regno)); | |
2163 | RTX_FRAME_RELATED_P (insn) = 1; | |
2164 | offset -= 8; | |
2165 | } | |
2166 | ||
2167 | /* Finally, allocate room for outgoing args and local vars if room | |
2168 | wasn't allocated above. */ | |
2169 | if (stack_space_to_allocate) | |
2170 | mmix_emit_sp_add (-stack_space_to_allocate); | |
2171 | } | |
2172 | ||
2173 | /* Expands the function epilogue into RTX. */ | |
2174 | ||
2175 | void | |
4e58524e | 2176 | mmix_expand_epilogue (void) |
957ec0f9 HPN |
2177 | { |
2178 | HOST_WIDE_INT locals_size = get_frame_size (); | |
2179 | int regno; | |
2180 | HOST_WIDE_INT stack_space_to_deallocate | |
38173d38 JH |
2181 | = (crtl->outgoing_args_size |
2182 | + crtl->args.pretend_args_size | |
957ec0f9 HPN |
2183 | + locals_size + 7) & ~7; |
2184 | ||
957ec0f9 | 2185 | /* The first address to access is beyond the outgoing_args area. */ |
38173d38 | 2186 | HOST_WIDE_INT offset = crtl->outgoing_args_size; |
957ec0f9 HPN |
2187 | |
2188 | /* Add the space for global non-register-stack registers. | |
2189 | It is assumed that the frame-pointer register can be one of these | |
2190 | registers, in which case it is excluded from the count when needed. */ | |
2191 | for (regno = 255; | |
2192 | regno >= MMIX_FIRST_GLOBAL_REGNUM; | |
2193 | regno--) | |
2194 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
6fb5fa3c | 2195 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
957ec0f9 HPN |
2196 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2197 | stack_space_to_deallocate += 8; | |
2198 | ||
2199 | /* Add in the space for register stack-pointer. If so, always add room | |
2200 | for the saved PC. */ | |
2201 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2202 | stack_space_to_deallocate += 16; | |
2203 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2204 | /* If we have a saved return-address slot, add it in. */ | |
2205 | stack_space_to_deallocate += 8; | |
2206 | ||
2207 | /* Add in the frame-pointer. */ | |
2208 | if (frame_pointer_needed) | |
2209 | stack_space_to_deallocate += 8; | |
2210 | ||
2211 | /* Make sure we don't get an unaligned stack. */ | |
2212 | if ((stack_space_to_deallocate % 8) != 0) | |
ea40ba9c | 2213 | internal_error ("stack frame not a multiple of octabyte: %wd", |
957ec0f9 HPN |
2214 | stack_space_to_deallocate); |
2215 | ||
2216 | /* We will add back small offsets to the stack pointer as we go. | |
2217 | First, we restore all registers that are global, i.e. not saved by | |
2218 | the register file machinery. */ | |
2219 | ||
2220 | for (regno = MMIX_FIRST_GLOBAL_REGNUM; | |
2221 | regno <= 255; | |
2222 | regno++) | |
2223 | if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) | |
6fb5fa3c | 2224 | && df_regs_ever_live_p (regno) && !call_used_regs[regno]) |
957ec0f9 HPN |
2225 | || IS_MMIX_EH_RETURN_DATA_REG (regno)) |
2226 | { | |
2227 | if (offset > 255) | |
2228 | { | |
2229 | mmix_emit_sp_add (offset); | |
2230 | stack_space_to_deallocate -= offset; | |
2231 | offset = 0; | |
2232 | } | |
2233 | ||
2234 | emit_move_insn (gen_rtx_REG (DImode, regno), | |
2235 | gen_rtx_MEM (DImode, | |
0a81f074 | 2236 | plus_constant (Pmode, stack_pointer_rtx, |
957ec0f9 HPN |
2237 | offset))); |
2238 | offset += 8; | |
2239 | } | |
2240 | ||
2241 | /* Here is where the local variables were. As in the prologue, they | |
2242 | might be of an unaligned size. */ | |
2243 | offset += (locals_size + 7) & ~7; | |
2244 | ||
957ec0f9 HPN |
2245 | /* The saved register stack pointer is just below the frame-pointer |
2246 | register. We don't need to restore it "manually"; the POP | |
2247 | instruction does that. */ | |
2248 | if (MMIX_CFUN_HAS_LANDING_PAD) | |
2249 | offset += 16; | |
2250 | else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS) | |
2251 | /* The return-address slot is just below the frame-pointer register. | |
2252 | We don't need to restore it because we don't really use it. */ | |
2253 | offset += 8; | |
2254 | ||
2255 | /* Get back the old frame-pointer-value. */ | |
2256 | if (frame_pointer_needed) | |
2257 | { | |
2258 | if (offset > 255) | |
2259 | { | |
2260 | mmix_emit_sp_add (offset); | |
2261 | ||
2262 | stack_space_to_deallocate -= offset; | |
2263 | offset = 0; | |
2264 | } | |
2265 | ||
2266 | emit_move_insn (hard_frame_pointer_rtx, | |
2267 | gen_rtx_MEM (DImode, | |
0a81f074 | 2268 | plus_constant (Pmode, stack_pointer_rtx, |
957ec0f9 HPN |
2269 | offset))); |
2270 | offset += 8; | |
2271 | } | |
2272 | ||
2273 | /* We do not need to restore pretended incoming args, just add back | |
2274 | offset to sp. */ | |
2275 | if (stack_space_to_deallocate != 0) | |
2276 | mmix_emit_sp_add (stack_space_to_deallocate); | |
2277 | ||
e3b5732b | 2278 | if (crtl->calls_eh_return) |
957ec0f9 HPN |
2279 | /* Adjust the (normal) stack-pointer to that of the receiver. |
2280 | FIXME: It would be nice if we could also adjust the register stack | |
2281 | here, but we need to express it through DWARF 2 too. */ | |
2282 | emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, | |
2283 | gen_rtx_REG (DImode, | |
2284 | MMIX_EH_RETURN_STACKADJ_REGNUM))); | |
2285 | } | |
2286 | ||
bcf684c7 HPN |
2287 | /* Output an optimal sequence for setting a register to a specific |
2288 | constant. Used in an alternative for const_ints in movdi, and when | |
2289 | using large stack-frame offsets. | |
2290 | ||
2291 | Use do_begin_end to say if a line-starting TAB and newline before the | |
2292 | first insn and after the last insn is wanted. */ | |
2293 | ||
2294 | void | |
4e58524e HPN |
2295 | mmix_output_register_setting (FILE *stream, |
2296 | int regno, | |
2297 | HOST_WIDEST_INT value, | |
2298 | int do_begin_end) | |
bcf684c7 HPN |
2299 | { |
2300 | if (do_begin_end) | |
2301 | fprintf (stream, "\t"); | |
2302 | ||
a271e61c HPN |
2303 | if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K)) |
2304 | fprintf (stream, "NEGU %s,0," HOST_WIDEST_INT_PRINT_DEC, reg_names[regno], -value); | |
2305 | else if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value)) | |
bcf684c7 HPN |
2306 | { |
2307 | /* First, the one-insn cases. */ | |
2308 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
2309 | (unsigned HOST_WIDEST_INT) | |
2310 | value); | |
2311 | fprintf (stream, " %s,", reg_names[regno]); | |
2312 | mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value); | |
2313 | } | |
2314 | else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value)) | |
2315 | { | |
2316 | /* We do this to get a bit more legible assembly code. The next | |
2317 | alternative is mostly redundant with this. */ | |
2318 | ||
2319 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
2320 | -(unsigned HOST_WIDEST_INT) | |
2321 | value); | |
2322 | fprintf (stream, " %s,", reg_names[regno]); | |
2323 | mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value); | |
2324 | fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno], | |
2325 | reg_names[regno]); | |
2326 | } | |
2327 | else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value)) | |
2328 | { | |
2329 | /* Slightly more expensive, the two-insn cases. */ | |
2330 | ||
2331 | /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255) | |
2332 | is shiftable, or any other one-insn transformation of the value. | |
2333 | FIXME: Check first if the value is "shiftable" by two loading | |
2334 | with two insns, since it makes more readable assembly code (if | |
2335 | anyone else cares). */ | |
2336 | ||
2337 | mmix_output_shiftvalue_op_from_str (stream, "SET", | |
2338 | ~(unsigned HOST_WIDEST_INT) | |
2339 | value); | |
2340 | fprintf (stream, " %s,", reg_names[regno]); | |
2341 | mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value); | |
2342 | fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno], | |
2343 | reg_names[regno]); | |
2344 | } | |
2345 | else | |
2346 | { | |
2347 | /* The generic case. 2..4 insns. */ | |
75540760 | 2348 | static const char *const higher_parts[] = {"L", "ML", "MH", "H"}; |
bcf684c7 HPN |
2349 | const char *op = "SET"; |
2350 | const char *line_begin = ""; | |
a824924d | 2351 | int insns = 0; |
bcf684c7 | 2352 | int i; |
a824924d | 2353 | HOST_WIDEST_INT tmpvalue = value; |
bcf684c7 | 2354 | |
a824924d HPN |
2355 | /* Compute the number of insns needed to output this constant. */ |
2356 | for (i = 0; i < 4 && tmpvalue != 0; i++) | |
2357 | { | |
2358 | if (tmpvalue & 65535) | |
2359 | insns++; | |
2360 | tmpvalue >>= 16; | |
2361 | } | |
2362 | if (TARGET_BASE_ADDRESSES && insns == 3) | |
2363 | { | |
2364 | /* The number three is based on a static observation on | |
2365 | ghostscript-6.52. Two and four are excluded because there | |
2366 | are too many such constants, and each unique constant (maybe | |
2367 | offset by 1..255) were used few times compared to other uses, | |
2368 | e.g. addresses. | |
2369 | ||
2370 | We use base-plus-offset addressing to force it into a global | |
2371 | register; we just use a "LDA reg,VALUE", which will cause the | |
2372 | assembler and linker to DTRT (for constants as well as | |
2373 | addresses). */ | |
2374 | fprintf (stream, "LDA %s,", reg_names[regno]); | |
2375 | mmix_output_octa (stream, value, 0); | |
2376 | } | |
2377 | else | |
bcf684c7 | 2378 | { |
a824924d HPN |
2379 | /* Output pertinent parts of the 4-wyde sequence. |
2380 | Still more to do if we want this to be optimal, but hey... | |
2381 | Note that the zero case has been handled above. */ | |
2382 | for (i = 0; i < 4 && value != 0; i++) | |
bcf684c7 | 2383 | { |
a824924d HPN |
2384 | if (value & 65535) |
2385 | { | |
2386 | fprintf (stream, "%s%s%s %s,#%x", line_begin, op, | |
2387 | higher_parts[i], reg_names[regno], | |
2388 | (int) (value & 65535)); | |
2389 | /* The first one sets the rest of the bits to 0, the next | |
2390 | ones add set bits. */ | |
2391 | op = "INC"; | |
2392 | line_begin = "\n\t"; | |
2393 | } | |
bcf684c7 | 2394 | |
a824924d HPN |
2395 | value >>= 16; |
2396 | } | |
bcf684c7 HPN |
2397 | } |
2398 | } | |
2399 | ||
2400 | if (do_begin_end) | |
2401 | fprintf (stream, "\n"); | |
2402 | } | |
2403 | ||
2404 | /* Return 1 if value is 0..65535*2**(16*N) for N=0..3. | |
2405 | else return 0. */ | |
2406 | ||
2407 | int | |
4e58524e | 2408 | mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value) |
bcf684c7 HPN |
2409 | { |
2410 | /* Shift by 16 bits per group, stop when we've found two groups with | |
2411 | nonzero bits. */ | |
2412 | int i; | |
2413 | int has_candidate = 0; | |
2414 | ||
2415 | for (i = 0; i < 4; i++) | |
2416 | { | |
2417 | if (value & 65535) | |
2418 | { | |
2419 | if (has_candidate) | |
2420 | return 0; | |
2421 | else | |
2422 | has_candidate = 1; | |
2423 | } | |
2424 | ||
2425 | value >>= 16; | |
2426 | } | |
2427 | ||
2428 | return 1; | |
2429 | } | |
2430 | ||
f90b7a5a PB |
2431 | /* X and Y are two things to compare using CODE. Return the rtx for |
2432 | the cc-reg in the proper mode. */ | |
bcf684c7 HPN |
2433 | |
2434 | rtx | |
4e58524e | 2435 | mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) |
bcf684c7 HPN |
2436 | { |
2437 | enum machine_mode ccmode = SELECT_CC_MODE (code, x, y); | |
f90b7a5a | 2438 | return gen_reg_rtx (ccmode); |
bcf684c7 HPN |
2439 | } |
2440 | ||
2441 | /* Local (static) helper functions. */ | |
2442 | ||
957ec0f9 | 2443 | static void |
4e58524e | 2444 | mmix_emit_sp_add (HOST_WIDE_INT offset) |
957ec0f9 HPN |
2445 | { |
2446 | rtx insn; | |
2447 | ||
2448 | if (offset < 0) | |
2449 | { | |
2450 | /* Negative stack-pointer adjustments are allocations and appear in | |
2451 | the prologue only. We mark them as frame-related so unwind and | |
2452 | debug info is properly emitted for them. */ | |
2453 | if (offset > -255) | |
2454 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2455 | stack_pointer_rtx, | |
2456 | GEN_INT (offset))); | |
2457 | else | |
2458 | { | |
2459 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2460 | RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1; | |
2461 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2462 | stack_pointer_rtx, tmpr)); | |
2463 | } | |
2464 | RTX_FRAME_RELATED_P (insn) = 1; | |
2465 | } | |
2466 | else | |
2467 | { | |
2468 | /* Positive adjustments are in the epilogue only. Don't mark them | |
2469 | as "frame-related" for unwind info. */ | |
e076319b | 2470 | if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L)) |
957ec0f9 HPN |
2471 | emit_insn (gen_adddi3 (stack_pointer_rtx, |
2472 | stack_pointer_rtx, | |
2473 | GEN_INT (offset))); | |
2474 | else | |
2475 | { | |
2476 | rtx tmpr = gen_rtx_REG (DImode, 255); | |
2477 | emit_move_insn (tmpr, GEN_INT (offset)); | |
2478 | insn = emit_insn (gen_adddi3 (stack_pointer_rtx, | |
2479 | stack_pointer_rtx, tmpr)); | |
2480 | } | |
2481 | } | |
2482 | } | |
2483 | ||
bcf684c7 | 2484 | /* Print operator suitable for doing something with a shiftable |
e03f5d43 | 2485 | wyde. The type of operator is passed as an asm output modifier. */ |
bcf684c7 HPN |
2486 | |
2487 | static void | |
4e58524e HPN |
2488 | mmix_output_shiftvalue_op_from_str (FILE *stream, |
2489 | const char *mainop, | |
2490 | HOST_WIDEST_INT value) | |
bcf684c7 | 2491 | { |
75540760 | 2492 | static const char *const op_part[] = {"L", "ML", "MH", "H"}; |
bcf684c7 HPN |
2493 | int i; |
2494 | ||
2495 | if (! mmix_shiftable_wyde_value (value)) | |
2496 | { | |
2497 | char s[sizeof ("0xffffffffffffffff")]; | |
2498 | sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value); | |
2499 | internal_error ("MMIX Internal: %s is not a shiftable int", s); | |
2500 | } | |
2501 | ||
2502 | for (i = 0; i < 4; i++) | |
2503 | { | |
2504 | /* We know we're through when we find one-bits in the low | |
2505 | 16 bits. */ | |
2506 | if (value & 0xffff) | |
2507 | { | |
2508 | fprintf (stream, "%s%s", mainop, op_part[i]); | |
2509 | return; | |
2510 | } | |
2511 | value >>= 16; | |
2512 | } | |
2513 | ||
2514 | /* No bits set? Then it must have been zero. */ | |
2515 | fprintf (stream, "%sL", mainop); | |
2516 | } | |
2517 | ||
2518 | /* Print a 64-bit value, optionally prefixed by assembly pseudo. */ | |
2519 | ||
2520 | static void | |
4e58524e | 2521 | mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end) |
bcf684c7 | 2522 | { |
bcf684c7 HPN |
2523 | if (do_begin_end) |
2524 | fprintf (stream, "\tOCTA "); | |
2525 | ||
bcf684c7 HPN |
2526 | /* Provide a few alternative output formats depending on the number, to |
2527 | improve legibility of assembler output. */ | |
2528 | if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000) | |
2529 | || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384)) | |
2530 | fprintf (stream, "%d", (int) value); | |
2531 | else if (value > (HOST_WIDEST_INT) 0 | |
2532 | && value < ((HOST_WIDEST_INT) 1 << 31) * 2) | |
2533 | fprintf (stream, "#%x", (unsigned int) value); | |
63f2a6a5 HPN |
2534 | else if (sizeof (HOST_WIDE_INT) == sizeof (HOST_WIDEST_INT)) |
2535 | /* We need to avoid the not-so-universal "0x" prefix; we need the | |
2536 | pure hex-digits together with the mmixal "#" hex prefix. */ | |
2537 | fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE, | |
2538 | (HOST_WIDE_INT) value); | |
2539 | else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */ | |
2540 | fprintf (stream, HOST_WIDEST_INT_PRINT_UNSIGNED, value); | |
bcf684c7 HPN |
2541 | |
2542 | if (do_begin_end) | |
2543 | fprintf (stream, "\n"); | |
2544 | } | |
2545 | ||
2546 | /* Print the presumed shiftable wyde argument shifted into place (to | |
2547 | be output with an operand). */ | |
2548 | ||
2549 | static void | |
4e58524e | 2550 | mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value) |
bcf684c7 HPN |
2551 | { |
2552 | int i; | |
2553 | ||
2554 | if (! mmix_shiftable_wyde_value (value)) | |
2555 | { | |
2556 | char s[16+2+1]; | |
2557 | sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value); | |
2558 | internal_error ("MMIX Internal: %s is not a shiftable int", s); | |
2559 | } | |
2560 | ||
2561 | for (i = 0; i < 4; i++) | |
bcf684c7 | 2562 | { |
4e58524e HPN |
2563 | /* We know we're through when we find one-bits in the low 16 bits. */ |
2564 | if (value & 0xffff) | |
2565 | { | |
2566 | fprintf (stream, "#%x", (int) (value & 0xffff)); | |
2567 | return; | |
2568 | } | |
bcf684c7 HPN |
2569 | |
2570 | value >>= 16; | |
2571 | } | |
2572 | ||
2573 | /* No bits set? Then it must have been zero. */ | |
2574 | fprintf (stream, "0"); | |
2575 | } | |
2576 | ||
2577 | /* Output an MMIX condition name corresponding to an operator | |
2578 | and operands: | |
2579 | (comparison_operator [(comparison_operator ...) (const_int 0)]) | |
2580 | which means we have to look at *two* operators. | |
2581 | ||
2582 | The argument "reversed" refers to reversal of the condition (not the | |
2583 | same as swapping the arguments). */ | |
2584 | ||
2585 | static void | |
5057fa13 | 2586 | mmix_output_condition (FILE *stream, const_rtx x, int reversed) |
bcf684c7 HPN |
2587 | { |
2588 | struct cc_conv | |
2589 | { | |
2590 | RTX_CODE cc; | |
2591 | ||
2592 | /* The normal output cc-code. */ | |
2593 | const char *const normal; | |
2594 | ||
2595 | /* The reversed cc-code, or NULL if invalid. */ | |
2596 | const char *const reversed; | |
2597 | }; | |
2598 | ||
2599 | struct cc_type_conv | |
2600 | { | |
2601 | enum machine_mode cc_mode; | |
2602 | ||
f822d252 | 2603 | /* Terminated with {UNKNOWN, NULL, NULL} */ |
bcf684c7 HPN |
2604 | const struct cc_conv *const convs; |
2605 | }; | |
2606 | ||
2607 | #undef CCEND | |
f822d252 | 2608 | #define CCEND {UNKNOWN, NULL, NULL} |
bcf684c7 HPN |
2609 | |
2610 | static const struct cc_conv cc_fun_convs[] | |
2611 | = {{ORDERED, "Z", "P"}, | |
2612 | {UNORDERED, "P", "Z"}, | |
2613 | CCEND}; | |
2614 | static const struct cc_conv cc_fp_convs[] | |
2615 | = {{GT, "P", NULL}, | |
2616 | {LT, "N", NULL}, | |
2617 | CCEND}; | |
2618 | static const struct cc_conv cc_fpeq_convs[] | |
2619 | = {{NE, "Z", "P"}, | |
2620 | {EQ, "P", "Z"}, | |
2621 | CCEND}; | |
2622 | static const struct cc_conv cc_uns_convs[] | |
2623 | = {{GEU, "NN", "N"}, | |
2624 | {GTU, "P", "NP"}, | |
2625 | {LEU, "NP", "P"}, | |
2626 | {LTU, "N", "NN"}, | |
2627 | CCEND}; | |
2628 | static const struct cc_conv cc_signed_convs[] | |
2629 | = {{NE, "NZ", "Z"}, | |
2630 | {EQ, "Z", "NZ"}, | |
2631 | {GE, "NN", "N"}, | |
2632 | {GT, "P", "NP"}, | |
2633 | {LE, "NP", "P"}, | |
2634 | {LT, "N", "NN"}, | |
2635 | CCEND}; | |
2636 | static const struct cc_conv cc_di_convs[] | |
2637 | = {{NE, "NZ", "Z"}, | |
2638 | {EQ, "Z", "NZ"}, | |
2639 | {GE, "NN", "N"}, | |
2640 | {GT, "P", "NP"}, | |
2641 | {LE, "NP", "P"}, | |
2642 | {LT, "N", "NN"}, | |
2643 | {GTU, "NZ", "Z"}, | |
2644 | {LEU, "Z", "NZ"}, | |
2645 | CCEND}; | |
2646 | #undef CCEND | |
2647 | ||
2648 | static const struct cc_type_conv cc_convs[] | |
2649 | = {{CC_FUNmode, cc_fun_convs}, | |
2650 | {CC_FPmode, cc_fp_convs}, | |
2651 | {CC_FPEQmode, cc_fpeq_convs}, | |
2652 | {CC_UNSmode, cc_uns_convs}, | |
2653 | {CCmode, cc_signed_convs}, | |
2654 | {DImode, cc_di_convs}}; | |
2655 | ||
ca7558fc | 2656 | size_t i; |
bcf684c7 HPN |
2657 | int j; |
2658 | ||
2659 | enum machine_mode mode = GET_MODE (XEXP (x, 0)); | |
2660 | RTX_CODE cc = GET_CODE (x); | |
2661 | ||
ca7558fc | 2662 | for (i = 0; i < ARRAY_SIZE (cc_convs); i++) |
bcf684c7 HPN |
2663 | { |
2664 | if (mode == cc_convs[i].cc_mode) | |
2665 | { | |
f822d252 | 2666 | for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++) |
bcf684c7 HPN |
2667 | if (cc == cc_convs[i].convs[j].cc) |
2668 | { | |
2669 | const char *mmix_cc | |
2670 | = (reversed ? cc_convs[i].convs[j].reversed | |
2671 | : cc_convs[i].convs[j].normal); | |
2672 | ||
2673 | if (mmix_cc == NULL) | |
2674 | fatal_insn ("MMIX Internal: Trying to output invalidly\ | |
2675 | reversed condition:", x); | |
2676 | ||
2677 | fprintf (stream, "%s", mmix_cc); | |
2678 | return; | |
2679 | } | |
2680 | ||
2681 | fatal_insn ("MMIX Internal: What's the CC of this?", x); | |
2682 | } | |
2683 | } | |
2684 | ||
2685 | fatal_insn ("MMIX Internal: What is the CC of this?", x); | |
2686 | } | |
2687 | ||
2688 | /* Return the bit-value for a const_int or const_double. */ | |
2689 | ||
e076319b | 2690 | HOST_WIDEST_INT |
5057fa13 | 2691 | mmix_intval (const_rtx x) |
bcf684c7 HPN |
2692 | { |
2693 | unsigned HOST_WIDEST_INT retval; | |
2694 | ||
2695 | if (GET_CODE (x) == CONST_INT) | |
2696 | return INTVAL (x); | |
2697 | ||
2698 | /* We make a little song and dance because converting to long long in | |
2699 | gcc-2.7.2 is broken. I still want people to be able to use it for | |
2700 | cross-compilation to MMIX. */ | |
2701 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode) | |
2702 | { | |
2703 | if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT)) | |
2704 | { | |
2705 | retval = (unsigned) CONST_DOUBLE_LOW (x) / 2; | |
2706 | retval *= 2; | |
2707 | retval |= CONST_DOUBLE_LOW (x) & 1; | |
2708 | ||
2709 | retval |= | |
2710 | (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x) | |
1cd7d53f | 2711 | << (HOST_BITS_PER_LONG)/2 << (HOST_BITS_PER_LONG)/2; |
bcf684c7 HPN |
2712 | } |
2713 | else | |
2714 | retval = CONST_DOUBLE_HIGH (x); | |
2715 | ||
2716 | return retval; | |
2717 | } | |
2718 | ||
2719 | if (GET_CODE (x) == CONST_DOUBLE) | |
2720 | { | |
2721 | REAL_VALUE_TYPE value; | |
2722 | ||
2723 | /* FIXME: This macro is not in the manual but should be. */ | |
2724 | REAL_VALUE_FROM_CONST_DOUBLE (value, x); | |
2725 | ||
2726 | if (GET_MODE (x) == DFmode) | |
2727 | { | |
2728 | long bits[2]; | |
1b849cce | 2729 | |
bcf684c7 HPN |
2730 | REAL_VALUE_TO_TARGET_DOUBLE (value, bits); |
2731 | ||
e8299ec2 HPN |
2732 | /* The double cast is necessary to avoid getting the long |
2733 | sign-extended to unsigned long long(!) when they're of | |
2734 | different size (usually 32-bit hosts). */ | |
2735 | return | |
2736 | ((unsigned HOST_WIDEST_INT) (unsigned long) bits[0] | |
2737 | << (unsigned HOST_WIDEST_INT) 32U) | |
2738 | | (unsigned HOST_WIDEST_INT) (unsigned long) bits[1]; | |
bcf684c7 HPN |
2739 | } |
2740 | else if (GET_MODE (x) == SFmode) | |
2741 | { | |
2742 | long bits; | |
2743 | REAL_VALUE_TO_TARGET_SINGLE (value, bits); | |
2744 | ||
2745 | return (unsigned long) bits; | |
2746 | } | |
2747 | } | |
2748 | ||
2749 | fatal_insn ("MMIX Internal: This is not a constant:", x); | |
2750 | } | |
2751 | ||
cde0f3fd PB |
2752 | /* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */ |
2753 | ||
2754 | enum machine_mode | |
2755 | mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, | |
2756 | enum machine_mode mode, | |
2757 | int *punsignedp ATTRIBUTE_UNUSED, | |
2758 | const_tree fntype ATTRIBUTE_UNUSED, | |
2759 | int for_return) | |
2760 | { | |
2761 | /* Apparently not doing TRT if int < register-size. FIXME: Perhaps | |
2762 | FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */ | |
666e3ceb | 2763 | if (for_return == 1) |
cde0f3fd PB |
2764 | return mode; |
2765 | ||
2766 | /* Promotion of modes currently generates slow code, extending before | |
2767 | operation, so we do it only for arguments. */ | |
2768 | if (GET_MODE_CLASS (mode) == MODE_INT | |
2769 | && GET_MODE_SIZE (mode) < 8) | |
2770 | return DImode; | |
2771 | else | |
2772 | return mode; | |
2773 | } | |
a9ba5098 KH |
2774 | /* Worker function for TARGET_STRUCT_VALUE_RTX. */ |
2775 | ||
2776 | static rtx | |
2777 | mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, | |
2778 | int incoming ATTRIBUTE_UNUSED) | |
2779 | { | |
2780 | return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM); | |
2781 | } | |
2782 | ||
b52b1749 AS |
2783 | /* Worker function for TARGET_FRAME_POINTER_REQUIRED. |
2784 | ||
2785 | FIXME: Is this requirement built-in? Anyway, we should try to get rid | |
2786 | of it; we can deduce the value. */ | |
2787 | ||
2788 | bool | |
2789 | mmix_frame_pointer_required (void) | |
2790 | { | |
2791 | return (cfun->has_nonlocal_label); | |
2792 | } | |
2793 | ||
bcf684c7 HPN |
2794 | /* |
2795 | * Local variables: | |
2796 | * eval: (c-set-style "gnu") | |
2797 | * indent-tabs-mode: t | |
2798 | * End: | |
2799 | */ |