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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
8e8f6434 2 Copyright (C) 2000-2018 Free Software Foundation, Inc.
68cbb7e3 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
581084df 5This file is part of GCC.
68cbb7e3 6
581084df 7GCC is free software; you can redistribute it and/or modify
68cbb7e3 8it under the terms of the GNU General Public License as published by
038d1e19 9the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 10any later version.
11
581084df 12GCC is distributed in the hope that it will be useful,
68cbb7e3 13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
038d1e19 18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
68cbb7e3 20
785790dc 21#define IN_TARGET_CODE 1
22
68cbb7e3 23#include "config.h"
24#include "system.h"
805e22b2 25#include "coretypes.h"
9ef16211 26#include "backend.h"
c1eb80de 27#include "target.h"
68cbb7e3 28#include "rtl.h"
c1eb80de 29#include "tree.h"
30a86690 30#include "stringpool.h"
31#include "attribs.h"
9ef16211 32#include "df.h"
ad7b10a2 33#include "memmodel.h"
c1eb80de 34#include "tm_p.h"
68cbb7e3 35#include "insn-config.h"
c1eb80de 36#include "regs.h"
37#include "emit-rtl.h"
38#include "recog.h"
39#include "diagnostic-core.h"
68cbb7e3 40#include "output.h"
9ed99284 41#include "varasm.h"
42#include "stor-layout.h"
43#include "calls.h"
d53441c8 44#include "explow.h"
68cbb7e3 45#include "expr.h"
bde36f4a 46#include "dwarf2.h"
f105c84e 47#include "tm-constrs.h"
f7715905 48#include "builtins.h"
68cbb7e3 49
0c71fb4f 50/* This file should be included last. */
4b498588 51#include "target-def.h"
52
68cbb7e3 53/* First some local helper definitions. */
54#define MMIX_FIRST_GLOBAL_REGNUM 32
55
56/* We'd need a current_function_has_landing_pad. It's marked as such when
57 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
58 mostly. */
59#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
60
61/* We have no means to tell DWARF 2 about the register stack, so we need
62 to store the return address on the stack if an exception can get into
d3310704 63 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 64 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 65 after reload_completed; it may contain incorrect information some time
66 before that. Within a RTL sequence (after a call to start_sequence,
67 such as in RTL expanders), leaf_function_p doesn't see all insns
68 (perhaps any insn). But regs_ever_live is up-to-date when
69 leaf_function_p () isn't, so we "or" them together to get accurate
70 information. FIXME: Some tweak to leaf_function_p might be
f024691d 71 preferable. */
d3310704 72#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
73 (flag_exceptions \
3072d30e 74 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 75 || !leaf_function_p ()))
68cbb7e3 76
77#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 78 (crtl->calls_eh_return \
68cbb7e3 79 && (EH_RETURN_DATA_REGNO (0) == REGNO \
80 || EH_RETURN_DATA_REGNO (1) == REGNO \
81 || EH_RETURN_DATA_REGNO (2) == REGNO \
82 || EH_RETURN_DATA_REGNO (3) == REGNO))
83
d68ffc6f 84/* For the default ABI, we rename registers at output-time to fill the gap
85 between the (statically partitioned) saved registers and call-clobbered
86 registers. In effect this makes unused call-saved registers to be used
87 as call-clobbered registers. The benefit comes from keeping the number
88 of local registers (value of rL) low, since there's a cost of
d3310704 89 increasing rL and clearing unused (unset) registers with lower numbers.
90 Don't translate while outputting the prologue. */
d68ffc6f 91#define MMIX_OUTPUT_REGNO(N) \
92 (TARGET_ABI_GNU \
0b123c47 93 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
94 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 95 || cfun == NULL \
96 || cfun->machine == NULL \
97 || cfun->machine->in_prologue \
d68ffc6f 98 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
99 + cfun->machine->highest_saved_stack_register + 1))
100
0b123c47 101/* The %d in "POP %d,0". */
102#define MMIX_POP_ARGUMENT() \
103 ((! TARGET_ABI_GNU \
abe32cce 104 && crtl->return_rtx != NULL \
18d50ae6 105 && ! cfun->returns_struct) \
abe32cce 106 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
107 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 108 : 0)
109
68cbb7e3 110/* The canonical saved comparison operands for non-cc0 machines, set in
111 the compare expander. */
112rtx mmix_compare_op0;
113rtx mmix_compare_op1;
114
68cbb7e3 115/* Declarations of locals. */
116
68cbb7e3 117/* Intermediate for insn output. */
118static int mmix_output_destination_register;
119
4c834714 120static void mmix_option_override (void);
40fe393f 121static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 122static void mmix_output_shiftvalue_op_from_str
3a4303e7 123 (FILE *, const char *, int64_t);
124static void mmix_output_shifted_value (FILE *, int64_t);
7a7fb407 125static void mmix_output_condition (FILE *, const_rtx, int);
3a4303e7 126static void mmix_output_octa (FILE *, int64_t, int);
7585fcd5 127static bool mmix_assemble_integer (rtx, unsigned int, int);
128static struct machine_function *mmix_init_machine_status (void);
129static void mmix_encode_section_info (tree, rtx, int);
130static const char *mmix_strip_name_encoding (const char *);
131static void mmix_emit_sp_add (HOST_WIDE_INT offset);
718e6d56 132static void mmix_target_asm_function_prologue (FILE *);
7585fcd5 133static void mmix_target_asm_function_end_prologue (FILE *);
718e6d56 134static void mmix_target_asm_function_epilogue (FILE *);
27925877 135static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
136static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
3754d046 137static bool mmix_legitimate_address_p (machine_mode, rtx, bool);
138static bool mmix_legitimate_constant_p (machine_mode, rtx);
7585fcd5 139static void mmix_reorg (void);
6988553d 140static void mmix_asm_output_mi_thunk
7585fcd5 141 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 142static void mmix_setup_incoming_varargs
3754d046 143 (cumulative_args_t, machine_mode, tree, int *, int);
7585fcd5 144static void mmix_file_start (void);
145static void mmix_file_end (void);
5ae4887d 146static bool mmix_rtx_costs (rtx, machine_mode, int, int, int *, bool);
3754d046 147static int mmix_register_move_cost (machine_mode,
f7e13ca6 148 reg_class_t, reg_class_t);
9e4a734a 149static rtx mmix_struct_value_rtx (tree, int);
3754d046 150static machine_mode mmix_promote_function_mode (const_tree,
151 machine_mode,
3b2411a8 152 int *, const_tree, int);
3754d046 153static void mmix_function_arg_advance (cumulative_args_t, machine_mode,
5d246ebf 154 const_tree, bool);
3754d046 155static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode,
5d246ebf 156 const_tree, bool, bool);
3754d046 157static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode,
5d246ebf 158 const_tree, bool);
3754d046 159static rtx mmix_function_arg (cumulative_args_t, machine_mode,
5d246ebf 160 const_tree, bool);
b600778c 161static rtx mmix_function_value (const_tree, const_tree, bool);
3754d046 162static rtx mmix_libcall_value (machine_mode, const_rtx);
b600778c 163static bool mmix_function_value_regno_p (const unsigned int);
39cba157 164static bool mmix_pass_by_reference (cumulative_args_t,
3754d046 165 machine_mode, const_tree, bool);
5a1c68c3 166static bool mmix_frame_pointer_required (void);
604d844a 167static void mmix_asm_trampoline_template (FILE *);
168static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 169static void mmix_print_operand (FILE *, rtx, int);
3c047fe9 170static void mmix_print_operand_address (FILE *, machine_mode, rtx);
7a7fb407 171static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 172static void mmix_conditional_register_usage (void);
1cdbc719 173static HOST_WIDE_INT mmix_static_rtx_alignment (machine_mode);
579d67ba 174static HOST_WIDE_INT mmix_constant_alignment (const_tree, HOST_WIDE_INT);
8374586c 175static HOST_WIDE_INT mmix_starting_frame_offset (void);
68cbb7e3 176
177/* Target structure macros. Listed by node. See `Using and Porting GCC'
178 for a general description. */
179
180/* Node: Function Entry */
181
58356836 182#undef TARGET_ASM_BYTE_OP
183#define TARGET_ASM_BYTE_OP NULL
184#undef TARGET_ASM_ALIGNED_HI_OP
185#define TARGET_ASM_ALIGNED_HI_OP NULL
186#undef TARGET_ASM_ALIGNED_SI_OP
187#define TARGET_ASM_ALIGNED_SI_OP NULL
188#undef TARGET_ASM_ALIGNED_DI_OP
189#define TARGET_ASM_ALIGNED_DI_OP NULL
190#undef TARGET_ASM_INTEGER
191#define TARGET_ASM_INTEGER mmix_assemble_integer
192
68cbb7e3 193#undef TARGET_ASM_FUNCTION_PROLOGUE
194#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
195
d3310704 196#undef TARGET_ASM_FUNCTION_END_PROLOGUE
197#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
198
68cbb7e3 199#undef TARGET_ASM_FUNCTION_EPILOGUE
200#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
201
7a7fb407 202#undef TARGET_PRINT_OPERAND
203#define TARGET_PRINT_OPERAND mmix_print_operand
204#undef TARGET_PRINT_OPERAND_ADDRESS
205#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
206#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
207#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
208
7811991d 209#undef TARGET_ENCODE_SECTION_INFO
210#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 211#undef TARGET_STRIP_NAME_ENCODING
212#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 213
6988553d 214#undef TARGET_ASM_OUTPUT_MI_THUNK
215#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 216#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
217#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 218#undef TARGET_ASM_FILE_START
219#define TARGET_ASM_FILE_START mmix_file_start
220#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
221#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 222#undef TARGET_ASM_FILE_END
223#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 224#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
225#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 226
b2d7ede1 227#undef TARGET_CONDITIONAL_REGISTER_USAGE
228#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
229
fab7adbf 230#undef TARGET_RTX_COSTS
231#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 232#undef TARGET_ADDRESS_COST
d9c5e5f4 233#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
fab7adbf 234
f7e13ca6 235#undef TARGET_REGISTER_MOVE_COST
236#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
237
2efea8c0 238#undef TARGET_MACHINE_DEPENDENT_REORG
239#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
240
3b2411a8 241#undef TARGET_PROMOTE_FUNCTION_MODE
242#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
243
b600778c 244#undef TARGET_FUNCTION_VALUE
245#define TARGET_FUNCTION_VALUE mmix_function_value
246#undef TARGET_LIBCALL_VALUE
247#define TARGET_LIBCALL_VALUE mmix_libcall_value
248#undef TARGET_FUNCTION_VALUE_REGNO_P
249#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 250
5d246ebf 251#undef TARGET_FUNCTION_ARG
252#define TARGET_FUNCTION_ARG mmix_function_arg
253#undef TARGET_FUNCTION_INCOMING_ARG
254#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
255#undef TARGET_FUNCTION_ARG_ADVANCE
256#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 257#undef TARGET_STRUCT_VALUE_RTX
258#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 259#undef TARGET_SETUP_INCOMING_VARARGS
260#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 261#undef TARGET_PASS_BY_REFERENCE
262#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 263#undef TARGET_CALLEE_COPIES
264#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 265
27925877 266#undef TARGET_PREFERRED_RELOAD_CLASS
267#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
268#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 269#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 270
e46fbef5 271#undef TARGET_LRA_P
272#define TARGET_LRA_P hook_bool_void_false
273
fd50b071 274#undef TARGET_LEGITIMATE_ADDRESS_P
275#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 276#undef TARGET_LEGITIMATE_CONSTANT_P
277#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 278
5a1c68c3 279#undef TARGET_FRAME_POINTER_REQUIRED
280#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
281
604d844a 282#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
283#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
284#undef TARGET_TRAMPOLINE_INIT
285#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
286
4c834714 287#undef TARGET_OPTION_OVERRIDE
288#define TARGET_OPTION_OVERRIDE mmix_option_override
289
1cdbc719 290#undef TARGET_STATIC_RTX_ALIGNMENT
291#define TARGET_STATIC_RTX_ALIGNMENT mmix_static_rtx_alignment
579d67ba 292#undef TARGET_CONSTANT_ALIGNMENT
293#define TARGET_CONSTANT_ALIGNMENT mmix_constant_alignment
294
8374586c 295#undef TARGET_STARTING_FRAME_OFFSET
296#define TARGET_STARTING_FRAME_OFFSET mmix_starting_frame_offset
297
68cbb7e3 298struct gcc_target targetm = TARGET_INITIALIZER;
299
300/* Functions that are expansions for target macros.
301 See Target Macros in `Using and Porting GCC'. */
302
4c834714 303/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 304
4c834714 305static void
306mmix_option_override (void)
68cbb7e3 307{
308 /* Should we err or should we warn? Hmm. At least we must neutralize
309 it. For example the wrong kind of case-tables will be generated with
310 PIC; we use absolute address items for mmixal compatibility. FIXME:
311 They could be relative if we just elide them to after all pertinent
312 labels. */
313 if (flag_pic)
314 {
c3ceba8e 315 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 316 flag_pic = 0;
317 }
68cbb7e3 318}
319
320/* INIT_EXPANDERS. */
321
322void
7585fcd5 323mmix_init_expanders (void)
68cbb7e3 324{
325 init_machine_status = mmix_init_machine_status;
326}
327
328/* Set the per-function data. */
329
1f3233d1 330static struct machine_function *
7585fcd5 331mmix_init_machine_status (void)
68cbb7e3 332{
25a27413 333 return ggc_cleared_alloc<machine_function> ();
68cbb7e3 334}
335
a16734cd 336/* DATA_ABI_ALIGNMENT.
68cbb7e3 337 We have trouble getting the address of stuff that is located at other
338 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 339 at least 32-bit alignment. */
68cbb7e3 340
341int
7585fcd5 342mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 343{
344 if (basic_align < 32)
345 return 32;
346
347 return basic_align;
348}
349
1cdbc719 350/* Implement TARGET_STATIC_RTX_ALIGNMENT. */
351
352static HOST_WIDE_INT
353mmix_static_rtx_alignment (machine_mode mode)
354{
355 return MAX (GET_MODE_ALIGNMENT (mode), 32);
356}
357
579d67ba 358/* Implement tARGET_CONSTANT_ALIGNMENT. */
68cbb7e3 359
579d67ba 360static HOST_WIDE_INT
361mmix_constant_alignment (const_tree, HOST_WIDE_INT basic_align)
68cbb7e3 362{
363 if (basic_align < 32)
364 return 32;
365
366 return basic_align;
367}
368
369/* LOCAL_ALIGNMENT. */
370
c0dae7df 371unsigned
372mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 373{
374 if (basic_align < 32)
375 return 32;
376
377 return basic_align;
378}
379
b2d7ede1 380/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 381
b2d7ede1 382static void
7585fcd5 383mmix_conditional_register_usage (void)
68cbb7e3 384{
385 int i;
386
387 if (TARGET_ABI_GNU)
388 {
389 static const int gnu_abi_reg_alloc_order[]
390 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
391
392 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
393 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
394
395 /* Change the default from the mmixware ABI. For the GNU ABI,
396 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 397 call-clobbered local register for the "hole" that holds the
398 number of saved local registers saved by PUSHJ/PUSHGO during the
399 function call, receiving the return value at return. So best is
400 to use the highest, $31. It's already marked call-clobbered for
401 the mmixware ABI. */
68cbb7e3 402 for (i = 15; i <= 30; i++)
403 call_used_regs[i] = 0;
f0b228a5 404
405 /* "Unfix" the parameter registers. */
406 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
407 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
408 i++)
409 fixed_regs[i] = 0;
68cbb7e3 410 }
411
412 /* Step over the ":" in special register names. */
413 if (! TARGET_TOPLEVEL_SYMBOLS)
414 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
415 if (reg_names[i][0] == ':')
416 reg_names[i]++;
417}
418
6d1f3d31 419/* INCOMING_REGNO and OUTGOING_REGNO worker function.
420 Those two macros must only be applied to function argument
4d19e7b3 421 registers and the function return value register for the opposite
422 use. FIXME: for their current use in gcc, it'd be better with an
423 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la
424 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
5d246ebf 425 forcing the target to commit to a fixed mapping and for any
4d19e7b3 426 unspecified register use. Particularly when thinking about the
427 return-value, it is better to imagine INCOMING_REGNO and
428 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as
429 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming"
430 and "outgoing" is from the perspective of the parameter-registers,
431 but the same macro is (must be, lacking an alternative like
432 suggested above) used to map the return-value-register from the
433 same perspective. To make directions even more confusing, the macro
434 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register
435 in which to return a value, i.e. INCOMING_REGNO for the return-value-
436 register as received from a called function; the return-value on the
437 way out. */
6d1f3d31 438
439int
440mmix_opposite_regno (int regno, int incoming)
441{
4d19e7b3 442 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM)
443 return MMIX_RETURN_VALUE_REGNUM;
444
445 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM)
446 return MMIX_OUTGOING_RETURN_VALUE_REGNUM;
447
6d1f3d31 448 if (!mmix_function_arg_regno_p (regno, incoming))
449 return regno;
450
451 return
452 regno - (incoming
453 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
454 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
455}
456
d3310704 457/* LOCAL_REGNO.
458 All registers that are part of the register stack and that will be
459 saved are local. */
460
461int
7585fcd5 462mmix_local_regno (int regno)
d3310704 463{
464 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
465}
466
27925877 467/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 468 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
469
27925877 470static reg_class_t
471mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 472{
473 /* FIXME: Revisit. */
474 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 475 ? REMAINDER_REG : rclass;
68cbb7e3 476}
477
27925877 478/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 479 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
480
27925877 481static reg_class_t
482mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 483{
484 /* FIXME: Revisit. */
485 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 486 ? REMAINDER_REG : rclass;
68cbb7e3 487}
488
489/* SECONDARY_RELOAD_CLASS.
490 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
491
492enum reg_class
8deb3959 493mmix_secondary_reload_class (enum reg_class rclass,
3754d046 494 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 495 rtx x ATTRIBUTE_UNUSED,
496 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 497{
8deb3959 498 if (rclass == REMAINDER_REG
499 || rclass == HIMULT_REG
500 || rclass == SYSTEM_REGS)
68cbb7e3 501 return GENERAL_REGS;
502
68cbb7e3 503 return NO_REGS;
504}
505
68cbb7e3 506/* DYNAMIC_CHAIN_ADDRESS. */
507
508rtx
7585fcd5 509mmix_dynamic_chain_address (rtx frame)
68cbb7e3 510{
511 /* FIXME: the frame-pointer is stored at offset -8 from the current
512 frame-pointer. Unfortunately, the caller assumes that a
513 frame-pointer is present for *all* previous frames. There should be
514 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 515 return plus_constant (Pmode, frame, -8);
68cbb7e3 516}
517
8374586c 518/* Implement TARGET_STARTING_FRAME_OFFSET. */
68cbb7e3 519
8374586c 520static HOST_WIDE_INT
7585fcd5 521mmix_starting_frame_offset (void)
68cbb7e3 522{
523 /* The old frame pointer is in the slot below the new one, so
524 FIRST_PARM_OFFSET does not need to depend on whether the
525 frame-pointer is needed or not. We have to adjust for the register
526 stack pointer being located below the saved frame pointer.
527 Similarly, we store the return address on the stack too, for
528 exception handling, and always if we save the register stack pointer. */
529 return
530 (-8
531 + (MMIX_CFUN_HAS_LANDING_PAD
532 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
533}
534
535/* RETURN_ADDR_RTX. */
536
537rtx
7585fcd5 538mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 539{
540 return count == 0
541 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 542 /* FIXME: Set frame_alias_set on the following. (Why?)
543 See mmix_initial_elimination_offset for the reason we can't use
544 get_hard_reg_initial_val for both. Always using a stack slot
545 and not a register would be suboptimal. */
29c05e22 546 ? validize_mem (gen_rtx_MEM (Pmode,
547 plus_constant (Pmode,
548 frame_pointer_rtx, -16)))
68cbb7e3 549 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
550 : NULL_RTX;
551}
552
553/* SETUP_FRAME_ADDRESSES. */
554
555void
7585fcd5 556mmix_setup_frame_addresses (void)
68cbb7e3 557{
558 /* Nothing needed at the moment. */
559}
560
561/* The difference between the (imaginary) frame pointer and the stack
562 pointer. Used to eliminate the frame pointer. */
563
564int
7585fcd5 565mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 566{
567 int regno;
568 int fp_sp_offset
abe32cce 569 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 570
af08e904 571 /* There is no actual offset between these two virtual values, but for
572 the frame-pointer, we have the old one in the stack position below
573 it, so the offset for the frame-pointer to the stack-pointer is one
574 octabyte larger. */
68cbb7e3 575 if (fromreg == MMIX_ARG_POINTER_REGNUM
576 && toreg == MMIX_FRAME_POINTER_REGNUM)
577 return 0;
578
579 /* The difference is the size of local variables plus the size of
580 outgoing function arguments that would normally be passed as
581 registers but must be passed on stack because we're out of
582 function-argument registers. Only global saved registers are
583 counted; the others go on the register stack.
584
585 The frame-pointer is counted too if it is what is eliminated, as we
8374586c 586 need to balance the offset for it from TARGET_STARTING_FRAME_OFFSET.
68cbb7e3 587
588 Also add in the slot for the register stack pointer we save if we
589 have a landing pad.
590
591 Unfortunately, we can't access $0..$14, from unwinder code easily, so
592 store the return address in a frame slot too. FIXME: Only for
593 non-leaf functions. FIXME: Always with a landing pad, because it's
594 hard to know whether we need the other at the time we know we need
595 the offset for one (and have to state it). It's a kludge until we
596 can express the register stack in the EH frame info.
597
598 We have to do alignment here; get_frame_size will not return a
599 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
600
601 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
602 regno <= 255;
603 regno++)
3072d30e 604 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 605 || IS_MMIX_EH_RETURN_DATA_REG (regno))
606 fp_sp_offset += 8;
607
608 return fp_sp_offset
609 + (MMIX_CFUN_HAS_LANDING_PAD
610 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
611 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
612}
613
5d246ebf 614static void
3754d046 615mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode,
5d246ebf 616 const_tree type, bool named ATTRIBUTE_UNUSED)
617{
39cba157 618 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 619 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
620
621 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
622 || (arg_size > 8
623 && !TARGET_LIBFUNC
624 && !argsp->lib))
625 ? (MMIX_MAX_ARGS_IN_REGS) + 1
626 : argsp->regs + (7 + arg_size) / 8);
627}
68cbb7e3 628
5d246ebf 629/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
630
631static rtx
39cba157 632mmix_function_arg_1 (const cumulative_args_t argsp_v,
3754d046 633 machine_mode mode,
5d246ebf 634 const_tree type,
635 bool named ATTRIBUTE_UNUSED,
636 bool incoming)
68cbb7e3 637{
39cba157 638 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
639
68cbb7e3 640 /* Last-argument marker. */
641 if (type == void_type_node)
642 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
643 ? gen_rtx_REG (mode,
644 (incoming
645 ? MMIX_FIRST_INCOMING_ARG_REGNUM
646 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
647 : NULL_RTX;
648
649 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 650 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 651 && (GET_MODE_BITSIZE (mode) <= 64
652 || argsp->lib
653 || TARGET_LIBFUNC))
654 ? gen_rtx_REG (mode,
655 (incoming
656 ? MMIX_FIRST_INCOMING_ARG_REGNUM
657 : MMIX_FIRST_ARG_REGNUM)
658 + argsp->regs)
659 : NULL_RTX;
660}
661
5d246ebf 662/* Return an rtx for a function argument to go in a register, and 0 for
663 one that must go on stack. */
664
665static rtx
39cba157 666mmix_function_arg (cumulative_args_t argsp,
3754d046 667 machine_mode mode,
5d246ebf 668 const_tree type,
669 bool named)
670{
671 return mmix_function_arg_1 (argsp, mode, type, named, false);
672}
673
674static rtx
39cba157 675mmix_function_incoming_arg (cumulative_args_t argsp,
3754d046 676 machine_mode mode,
5d246ebf 677 const_tree type,
678 bool named)
679{
680 return mmix_function_arg_1 (argsp, mode, type, named, true);
681}
682
68cbb7e3 683/* Returns nonzero for everything that goes by reference, 0 for
684 everything that goes by value. */
685
b981d932 686static bool
3754d046 687mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode,
fb80456a 688 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 689{
39cba157 690 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
691
0336f0f0 692 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 693 necessary. */
bef380a4 694 if (targetm.calls.must_pass_in_stack (mode, type))
695 return true;
696
697 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
698 && !TARGET_LIBFUNC
699 && (!argsp || !argsp->lib))
700 return true;
701
702 return false;
68cbb7e3 703}
704
705/* Return nonzero if regno is a register number where a parameter is
706 passed, and 0 otherwise. */
707
708int
7585fcd5 709mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 710{
711 int first_arg_regnum
712 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
713
714 return regno >= first_arg_regnum
715 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
716}
717
b600778c 718/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 719
b600778c 720static rtx
721mmix_function_value (const_tree valtype,
722 const_tree func ATTRIBUTE_UNUSED,
723 bool outgoing)
68cbb7e3 724{
3754d046 725 machine_mode mode = TYPE_MODE (valtype);
726 machine_mode cmode;
68cbb7e3 727 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
728 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
729 int i;
730 int nregs;
731
b600778c 732 if (!outgoing)
733 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
734
68cbb7e3 735 /* Return values that fit in a register need no special handling.
736 There's no register hole when parameters are passed in global
737 registers. */
738 if (TARGET_ABI_GNU
739 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
740 return
741 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
742
fb89a8c9 743 if (COMPLEX_MODE_P (mode))
744 /* A complex type, made up of components. */
745 cmode = TYPE_MODE (TREE_TYPE (valtype));
746 else
747 {
748 /* Of the other larger-than-register modes, we only support
749 scalar mode TImode. (At least, that's the only one that's
750 been rudimentally tested.) Make sure we're alerted for
751 unexpected cases. */
752 if (mode != TImode)
753 sorry ("support for mode %qs", GET_MODE_NAME (mode));
754
755 /* In any case, we will fill registers to the natural size. */
756 cmode = DImode;
757 }
758
68cbb7e3 759 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
760
761 /* We need to take care of the effect of the register hole on return
762 values of large sizes; the last register will appear as the first
763 register, with the rest shifted. (For complex modes, this is just
764 swapped registers.) */
765
766 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 767 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 768 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
769
770 /* FIXME: Maybe we should handle structure values like this too
771 (adjusted for BLKmode), perhaps for both ABI:s. */
772 for (i = 0; i < nregs - 1; i++)
773 vec[i]
774 = gen_rtx_EXPR_LIST (VOIDmode,
775 gen_rtx_REG (cmode, first_val_regnum + i),
776 GEN_INT ((i + 1) * BITS_PER_UNIT));
777
778 vec[nregs - 1]
779 = gen_rtx_EXPR_LIST (VOIDmode,
780 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 781 const0_rtx);
68cbb7e3 782
2bdda7ee 783 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec));
68cbb7e3 784}
785
b600778c 786/* Implements TARGET_LIBCALL_VALUE. */
c715d549 787
b600778c 788static rtx
3754d046 789mmix_libcall_value (machine_mode mode,
b600778c 790 const_rtx fun ATTRIBUTE_UNUSED)
791{
792 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
793}
794
795/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
796
797static bool
798mmix_function_value_regno_p (const unsigned int regno)
c715d549 799{
800 return regno == MMIX_RETURN_VALUE_REGNUM;
801}
802
68cbb7e3 803/* EH_RETURN_DATA_REGNO. */
804
805int
7585fcd5 806mmix_eh_return_data_regno (int n)
68cbb7e3 807{
808 if (n >= 0 && n < 4)
809 return MMIX_EH_RETURN_DATA_REGNO_START + n;
810
811 return INVALID_REGNUM;
812}
813
814/* EH_RETURN_STACKADJ_RTX. */
815
816rtx
7585fcd5 817mmix_eh_return_stackadj_rtx (void)
68cbb7e3 818{
819 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
820}
821
822/* EH_RETURN_HANDLER_RTX. */
823
824rtx
7585fcd5 825mmix_eh_return_handler_rtx (void)
68cbb7e3 826{
7585fcd5 827 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 828}
829
830/* ASM_PREFERRED_EH_DATA_FORMAT. */
831
832int
7585fcd5 833mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
834 int global ATTRIBUTE_UNUSED)
68cbb7e3 835{
836 /* This is the default (was at 2001-07-20). Revisit when needed. */
837 return DW_EH_PE_absptr;
838}
839
28c2d844 840/* Make a note that we've seen the beginning of the prologue. This
d3310704 841 matters to whether we'll translate register numbers as calculated by
2efea8c0 842 mmix_reorg. */
68cbb7e3 843
d3310704 844static void
718e6d56 845mmix_target_asm_function_prologue (FILE *)
68cbb7e3 846{
d3310704 847 cfun->machine->in_prologue = 1;
848}
68cbb7e3 849
d3310704 850/* Make a note that we've seen the end of the prologue. */
68cbb7e3 851
d3310704 852static void
7585fcd5 853mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 854{
855 cfun->machine->in_prologue = 0;
d68ffc6f 856}
857
2efea8c0 858/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
859 done here; just virtually by calculating the highest saved stack
860 register number used to modify the register numbers at output time. */
d68ffc6f 861
2efea8c0 862static void
7585fcd5 863mmix_reorg (void)
d68ffc6f 864{
865 int regno;
68cbb7e3 866
867 /* We put the number of the highest saved register-file register in a
868 location convenient for the call-patterns to output. Note that we
869 don't tell dwarf2 about these registers, since it can't restore them
870 anyway. */
d68ffc6f 871 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 872 regno >= 0;
873 regno--)
3072d30e 874 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 875 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
876 break;
877
d68ffc6f 878 /* Regardless of whether they're saved (they might be just read), we
879 mustn't include registers that carry parameters. We could scan the
880 insns to see whether they're actually used (and indeed do other less
881 trivial register usage analysis and transformations), but it seems
882 wasteful to optimize for unused parameter registers. As of
3072d30e 883 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 884 that might change. */
abe32cce 885 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 886 {
abe32cce 887 regno = crtl->args.info.regs - 1;
d68ffc6f 888
889 /* We don't want to let this cause us to go over the limit and make
890 incoming parameter registers be misnumbered and treating the last
891 parameter register and incoming return value register call-saved.
892 Stop things at the unmodified scheme. */
893 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
894 regno = MMIX_RETURN_VALUE_REGNUM - 1;
895 }
896
897 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 898}
899
900/* TARGET_ASM_FUNCTION_EPILOGUE. */
901
4448bfa5 902static void
718e6d56 903mmix_target_asm_function_epilogue (FILE *stream)
68cbb7e3 904{
d3310704 905 /* Emit an \n for readability of the generated assembly. */
906 fputc ('\n', stream);
907}
68cbb7e3 908
e7f5e241 909/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 910
6988553d 911static void
7585fcd5 912mmix_asm_output_mi_thunk (FILE *stream,
913 tree fndecl ATTRIBUTE_UNUSED,
914 HOST_WIDE_INT delta,
915 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
916 tree func)
d3310704 917{
6644435d 918 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
919 location of structure to return as invisible first argument), you
920 need to tweak this code too. */
d3310704 921 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 922
d3310704 923 if (delta >= 0 && delta < 65536)
e7f5e241 924 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 925 else if (delta < 0 && delta >= -255)
e7f5e241 926 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 927 else
0b123c47 928 {
d3310704 929 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 930 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 931 }
932
d3310704 933 fprintf (stream, "\tJMP ");
934 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
935 fprintf (stream, "\n");
936}
68cbb7e3 937
d3310704 938/* FUNCTION_PROFILER. */
68cbb7e3 939
d3310704 940void
7585fcd5 941mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
942 int labelno ATTRIBUTE_UNUSED)
d3310704 943{
944 sorry ("function_profiler support for MMIX");
945}
68cbb7e3 946
9e4a734a 947/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
948 let's stick to pushing argument registers on the stack. Later, we
949 can parse all arguments in registers, to improve performance. */
68cbb7e3 950
9e4a734a 951static void
39cba157 952mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
3754d046 953 machine_mode mode,
7585fcd5 954 tree vartype,
955 int *pretend_sizep,
956 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 957{
39cba157 958 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
959
7ccc713a 960 /* The last named variable has been handled, but
961 args_so_farp has not been advanced for it. */
962 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
963 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 964
965 /* We assume that one argument takes up one register here. That should
5aedf60c 966 be true until we start messing with multi-reg parameters. */
68cbb7e3 967 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
968 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
969}
970
604d844a 971/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 972
604d844a 973static void
974mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 975{
af08e904 976 /* Read a value into the static-chain register and jump somewhere. The
977 static chain is stored at offset 16, and the function address is
978 stored at offset 24. */
604d844a 979
68cbb7e3 980 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 981 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 982 fprintf (stream, "LDOU $255,$255,8\n\t");
983 fprintf (stream, "GO $255,$255,0\n");
984 fprintf (stream, "1H\tOCTA 0\n\t");
985 fprintf (stream, "OCTA 0\n");
986}
987
604d844a 988/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 989/* Set the static chain and function pointer field in the trampoline.
990 We also SYNCID here to be sure (doesn't matter in the simulator, but
991 some day it will). */
992
604d844a 993static void
994mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
995{
996 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
997 rtx mem;
998
999 emit_block_move (m_tramp, assemble_trampoline_template (),
1000 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
1001
1002 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
1003 emit_move_insn (mem, static_chain);
1004 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
1005 emit_move_insn (mem, fnaddr);
1006
1007 mem = adjust_address (m_tramp, DImode, 0);
1008 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 1009}
1010
1011/* We must exclude constant addresses that have an increment that is not a
1012 multiple of four bytes because of restrictions of the GETA
f0b228a5 1013 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 1014
1015int
7585fcd5 1016mmix_constant_address_p (rtx x)
68cbb7e3 1017{
1018 RTX_CODE code = GET_CODE (x);
1019 int addend = 0;
f0b228a5 1020 /* When using "base addresses", anything constant goes. */
1021 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 1022
68cbb7e3 1023 switch (code)
1024 {
1025 case LABEL_REF:
1026 case SYMBOL_REF:
1027 return 1;
1028
68cbb7e3 1029 case HIGH:
f0b228a5 1030 /* FIXME: Don't know how to dissect these. Avoid them for now,
1031 except we know they're constants. */
1032 return constant_ok;
68cbb7e3 1033
1034 case CONST_INT:
1035 addend = INTVAL (x);
1036 break;
1037
1038 case CONST_DOUBLE:
1039 if (GET_MODE (x) != VOIDmode)
1040 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1041 return constant_ok;
68cbb7e3 1042 addend = CONST_DOUBLE_LOW (x);
1043 break;
1044
1045 case CONST:
1046 /* Note that expressions with arithmetic on forward references don't
1047 work in mmixal. People using gcc assembly code with mmixal might
1048 need to move arrays and such to before the point of use. */
1049 if (GET_CODE (XEXP (x, 0)) == PLUS)
1050 {
1051 rtx x0 = XEXP (XEXP (x, 0), 0);
1052 rtx x1 = XEXP (XEXP (x, 0), 1);
1053
1054 if ((GET_CODE (x0) == SYMBOL_REF
1055 || GET_CODE (x0) == LABEL_REF)
1056 && (GET_CODE (x1) == CONST_INT
1057 || (GET_CODE (x1) == CONST_DOUBLE
1058 && GET_MODE (x1) == VOIDmode)))
1059 addend = mmix_intval (x1);
1060 else
f0b228a5 1061 return constant_ok;
68cbb7e3 1062 }
1063 else
f0b228a5 1064 return constant_ok;
68cbb7e3 1065 break;
1066
1067 default:
1068 return 0;
1069 }
1070
f0b228a5 1071 return constant_ok || (addend & 3) == 0;
68cbb7e3 1072}
1073
fd50b071 1074/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1075
fd50b071 1076bool
3754d046 1077mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
fd50b071 1078 rtx x,
1079 bool strict_checking)
68cbb7e3 1080{
1081#define MMIX_REG_OK(X) \
1082 ((strict_checking \
1083 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1084 || (reg_renumber[REGNO (X)] > 0 \
1085 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1086 || (!strict_checking \
1087 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1088 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1089 || REGNO (X) == ARG_POINTER_REGNUM)))
1090
1091 /* We only accept:
1092 (mem reg)
1093 (mem (plus reg reg))
f0b228a5 1094 (mem (plus reg 0..255)).
1095 unless TARGET_BASE_ADDRESSES, in which case we accept all
1096 (mem constant_address) too. */
68cbb7e3 1097
1098
1099 /* (mem reg) */
1100 if (REG_P (x) && MMIX_REG_OK (x))
1101 return 1;
1102
1103 if (GET_CODE(x) == PLUS)
1104 {
1105 rtx x1 = XEXP (x, 0);
1106 rtx x2 = XEXP (x, 1);
1107
1108 /* Try swapping the order. FIXME: Do we need this? */
1109 if (! REG_P (x1))
1110 {
1111 rtx tem = x1;
1112 x1 = x2;
1113 x2 = tem;
1114 }
1115
f0b228a5 1116 /* (mem (plus (reg?) (?))) */
68cbb7e3 1117 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1118 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1119
f0b228a5 1120 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1121 if (REG_P (x2) && MMIX_REG_OK (x2))
1122 return 1;
1123
f0b228a5 1124 /* (mem (plus (reg) (0..255?))) */
f105c84e 1125 if (satisfies_constraint_I (x2))
68cbb7e3 1126 return 1;
f0b228a5 1127
1128 return 0;
68cbb7e3 1129 }
1130
f0b228a5 1131 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1132}
1133
ca316360 1134/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1135
ca316360 1136static bool
3754d046 1137mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1138{
1139 RTX_CODE code = GET_CODE (x);
1140
1141 /* We must allow any number due to the way the cse passes works; if we
1142 do not allow any number here, general_operand will fail, and insns
1143 will fatally fail recognition instead of "softly". */
1144 if (code == CONST_INT || code == CONST_DOUBLE)
1145 return 1;
1146
1147 return CONSTANT_ADDRESS_P (x);
1148}
1149
1150/* SELECT_CC_MODE. */
1151
3754d046 1152machine_mode
7585fcd5 1153mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1154{
1155 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1156 output different compare insns. Note that we do not check the
1157 validity of the comparison here. */
1158
1159 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1160 {
1161 if (op == ORDERED || op == UNORDERED || op == UNGE
1162 || op == UNGT || op == UNLE || op == UNLT)
1163 return CC_FUNmode;
1164
1165 if (op == EQ || op == NE)
1166 return CC_FPEQmode;
1167
1168 return CC_FPmode;
1169 }
1170
1171 if (op == GTU || op == LTU || op == GEU || op == LEU)
1172 return CC_UNSmode;
1173
1174 return CCmode;
1175}
1176
68cbb7e3 1177/* REVERSIBLE_CC_MODE. */
1178
1179int
3754d046 1180mmix_reversible_cc_mode (machine_mode mode)
68cbb7e3 1181{
1182 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1183 compares. */
68cbb7e3 1184 return mode != CC_FPmode;
1185}
1186
fab7adbf 1187/* TARGET_RTX_COSTS. */
68cbb7e3 1188
fab7adbf 1189static bool
7585fcd5 1190mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
5ae4887d 1191 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 1192 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1193 int opno ATTRIBUTE_UNUSED,
f529eb25 1194 int *total ATTRIBUTE_UNUSED,
1195 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1196{
1197 /* For the time being, this is just a stub and we'll accept the
1198 generic calculations, until we can do measurements, at least.
1199 Say we did not modify any calculated costs. */
fab7adbf 1200 return false;
68cbb7e3 1201}
1202
f7e13ca6 1203/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1204
f7e13ca6 1205 The special registers can only move to and from general regs, and we
1206 need to check that their constraints match, so say 3 for them. */
1207
1208static int
3754d046 1209mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1210 reg_class_t from,
1211 reg_class_t to)
68cbb7e3 1212{
1213 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1214}
1215
1216/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1217 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1218 the target. */
1219
1220/* DATA_SECTION_ASM_OP. */
1221
1222const char *
7585fcd5 1223mmix_data_section_asm_op (void)
68cbb7e3 1224{
1225 return "\t.data ! mmixal:= 8H LOC 9B";
1226}
1227
7811991d 1228static void
7585fcd5 1229mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1230{
1231 /* Test for an external declaration, and do nothing if it is one. */
1232 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1233 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1234 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1235 ;
ae484cc8 1236 else if (first && DECL_P (decl))
68cbb7e3 1237 {
1238 /* For non-visible declarations, add a "@" prefix, which we skip
1239 when the label is output. If the label does not have this
f0b228a5 1240 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1241
1242 Note that this does not work for data that is declared extern and
1243 later defined as static. If there's code in between, that code
f0b228a5 1244 will refer to the extern declaration, and vice versa. This just
1245 means that when -mtoplevel-symbols is in use, we can just handle
1246 well-behaved ISO-compliant code. */
68cbb7e3 1247
2c129d70 1248 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1249 int len = strlen (str);
225ab426 1250 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1251 newstr[0] = '@';
68cbb7e3 1252 strcpy (newstr + 1, str);
b948ae2f 1253 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1254 }
1255
f0b228a5 1256 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1257 may need different options to reach for different things with GETA.
1258 For now, functions and things we know or have been told are constant. */
1259 if (TREE_CODE (decl) == FUNCTION_DECL
1260 || TREE_CONSTANT (decl)
1261 || (TREE_CODE (decl) == VAR_DECL
1262 && TREE_READONLY (decl)
1263 && !TREE_SIDE_EFFECTS (decl)
1264 && (!DECL_INITIAL (decl)
1265 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1266 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1267}
1268
7b4a38a6 1269static const char *
7585fcd5 1270mmix_strip_name_encoding (const char *name)
68cbb7e3 1271{
1272 for (; (*name == '@' || *name == '*'); name++)
1273 ;
1274
1275 return name;
1276}
1277
92c473b8 1278/* TARGET_ASM_FILE_START.
1279 We just emit a little comment for the time being. */
68cbb7e3 1280
92c473b8 1281static void
7585fcd5 1282mmix_file_start (void)
68cbb7e3 1283{
92c473b8 1284 default_file_start ();
68cbb7e3 1285
92c473b8 1286 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1287
1d60d981 1288 /* Make sure each file starts with the text section. */
2f14b1f9 1289 switch_to_section (text_section);
68cbb7e3 1290}
1291
f6940372 1292/* TARGET_ASM_FILE_END. */
68cbb7e3 1293
f6940372 1294static void
7585fcd5 1295mmix_file_end (void)
68cbb7e3 1296{
1d60d981 1297 /* Make sure each file ends with the data section. */
2f14b1f9 1298 switch_to_section (data_section);
68cbb7e3 1299}
1300
40fe393f 1301/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1302
40fe393f 1303static void
7585fcd5 1304mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1305{
1306 fprintf (stream, "# 1 ");
1307 OUTPUT_QUOTED_STRING (stream, name);
1308 fprintf (stream, "\n");
1309}
1310
1311/* OUTPUT_QUOTED_STRING. */
1312
1313void
7585fcd5 1314mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1315{
1316 const char * string_end = string + length;
25037517 1317 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1318
1319 /* Output "any character except newline and double quote character". We
1320 play it safe and avoid all control characters too. We also do not
1321 want [] as characters, should input be passed through m4 with [] as
1322 quotes. Further, we avoid "\", because the GAS port handles it as a
1323 quoting character. */
1324 while (string < string_end)
1325 {
1326 if (*string
1327 && (unsigned char) *string < 128
1328 && !ISCNTRL (*string)
1329 && strchr (unwanted_chars, *string) == NULL)
1330 {
1331 fputc ('"', stream);
1332 while (*string
1333 && (unsigned char) *string < 128
1334 && !ISCNTRL (*string)
1335 && strchr (unwanted_chars, *string) == NULL
1336 && string < string_end)
1337 {
1338 fputc (*string, stream);
1339 string++;
1340 }
1341 fputc ('"', stream);
1342 if (string < string_end)
1343 fprintf (stream, ",");
1344 }
1345 if (string < string_end)
1346 {
1347 fprintf (stream, "#%x", *string & 255);
1348 string++;
1349 if (string < string_end)
1350 fprintf (stream, ",");
1351 }
1352 }
1353}
1354
58356836 1355/* Target hook for assembling integer objects. Use mmix_print_operand
1356 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1357 CONST_DOUBLEs. */
68cbb7e3 1358
58356836 1359static bool
7585fcd5 1360mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1361{
58356836 1362 if (aligned_p)
1363 switch (size)
1364 {
4f4e478d 1365 /* We handle a limited number of types of operands in here. But
1366 that's ok, because we can punt to generic functions. We then
5c3d1711 1367 pretend that aligned data isn't needed, so the usual .<pseudo>
1368 syntax is used (which works for aligned data too). We actually
1369 *must* do that, since we say we don't have simple aligned
1370 pseudos, causing this function to be called. We just try and
1371 keep as much compatibility as possible with mmixal syntax for
1372 normal cases (i.e. without GNU extensions and C only). */
58356836 1373 case 1:
4f4e478d 1374 if (GET_CODE (x) != CONST_INT)
1375 {
1376 aligned_p = 0;
1377 break;
1378 }
58356836 1379 fputs ("\tBYTE\t", asm_out_file);
1380 mmix_print_operand (asm_out_file, x, 'B');
1381 fputc ('\n', asm_out_file);
1382 return true;
1383
1384 case 2:
4f4e478d 1385 if (GET_CODE (x) != CONST_INT)
1386 {
1387 aligned_p = 0;
1388 break;
1389 }
58356836 1390 fputs ("\tWYDE\t", asm_out_file);
1391 mmix_print_operand (asm_out_file, x, 'W');
1392 fputc ('\n', asm_out_file);
1393 return true;
1394
1395 case 4:
60bb373d 1396 if (GET_CODE (x) != CONST_INT)
4f4e478d 1397 {
1398 aligned_p = 0;
1399 break;
1400 }
58356836 1401 fputs ("\tTETRA\t", asm_out_file);
1402 mmix_print_operand (asm_out_file, x, 'L');
1403 fputc ('\n', asm_out_file);
1404 return true;
1405
1406 case 8:
7f81c162 1407 /* We don't get here anymore for CONST_DOUBLE, because DImode
1408 isn't expressed as CONST_DOUBLE, and DFmode is handled
1409 elsewhere. */
1410 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1411 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1412 return true;
1413 }
1414 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1415}
1416
1417/* ASM_OUTPUT_ASCII. */
1418
1419void
7585fcd5 1420mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1421{
1422 while (length > 0)
1423 {
1424 int chunk_size = length > 60 ? 60 : length;
1425 fprintf (stream, "\tBYTE ");
1426 mmix_output_quoted_string (stream, string, chunk_size);
1427 string += chunk_size;
1428 length -= chunk_size;
1429 fprintf (stream, "\n");
1430 }
1431}
1432
1433/* ASM_OUTPUT_ALIGNED_COMMON. */
1434
1435void
7585fcd5 1436mmix_asm_output_aligned_common (FILE *stream,
1437 const char *name,
1438 int size,
1439 int align)
68cbb7e3 1440{
1441 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1442 express this in a mmixal-compatible way. */
1443 fprintf (stream, "\t.comm\t");
1444 assemble_name (stream, name);
1445 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1446 size, align / BITS_PER_UNIT);
1447}
1448
1449/* ASM_OUTPUT_ALIGNED_LOCAL. */
1450
1451void
7585fcd5 1452mmix_asm_output_aligned_local (FILE *stream,
1453 const char *name,
1454 int size,
1455 int align)
68cbb7e3 1456{
2f14b1f9 1457 switch_to_section (data_section);
68cbb7e3 1458
1459 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1460 assemble_name (stream, name);
1461 fprintf (stream, "\tLOC @+%d\n", size);
1462}
1463
1464/* ASM_OUTPUT_LABEL. */
1465
1466void
7585fcd5 1467mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1468{
1469 assemble_name (stream, name);
1470 fprintf (stream, "\tIS @\n");
1471}
1472
af1c039b 1473/* ASM_OUTPUT_INTERNAL_LABEL. */
1474
1475void
1476mmix_asm_output_internal_label (FILE *stream, const char *name)
1477{
1478 assemble_name_raw (stream, name);
1479 fprintf (stream, "\tIS @\n");
1480}
1481
68cbb7e3 1482/* ASM_DECLARE_REGISTER_GLOBAL. */
1483
1484void
7585fcd5 1485mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1486 tree decl ATTRIBUTE_UNUSED,
1487 int regno ATTRIBUTE_UNUSED,
1488 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1489{
1490 /* Nothing to do here, but there *will* be, therefore the framework is
1491 here. */
1492}
1493
68cbb7e3 1494/* ASM_WEAKEN_LABEL. */
1495
1496void
7585fcd5 1497mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1498 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1499{
7fe1d31c 1500 fprintf (stream, "\t.weak ");
68cbb7e3 1501 assemble_name (stream, name);
7fe1d31c 1502 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1503}
1504
1505/* MAKE_DECL_ONE_ONLY. */
1506
1507void
7585fcd5 1508mmix_make_decl_one_only (tree decl)
68cbb7e3 1509{
1510 DECL_WEAK (decl) = 1;
1511}
1512
1513/* ASM_OUTPUT_LABELREF.
1514 Strip GCC's '*' and our own '@'. No order is assumed. */
1515
1516void
7585fcd5 1517mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1518{
91009d64 1519 int is_extern = 1;
68cbb7e3 1520
1521 for (; (*name == '@' || *name == '*'); name++)
1522 if (*name == '@')
91009d64 1523 is_extern = 0;
68cbb7e3 1524
1525 asm_fprintf (stream, "%s%U%s",
1526 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1527 name);
1528}
1529
68cbb7e3 1530/* ASM_OUTPUT_DEF. */
1531
1532void
7585fcd5 1533mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1534{
1535 assemble_name (stream, name);
1536 fprintf (stream, "\tIS ");
1537 assemble_name (stream, value);
1538 fputc ('\n', stream);
1539}
1540
7a7fb407 1541/* TARGET_PRINT_OPERAND. */
68cbb7e3 1542
7a7fb407 1543static void
7585fcd5 1544mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1545{
1546 /* When we add support for different codes later, we can, when needed,
1547 drop through to the main handler with a modified operand. */
1548 rtx modified_x = x;
d68ffc6f 1549 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1550
1551 switch (code)
1552 {
1553 /* Unrelated codes are in alphabetic order. */
1554
91009d64 1555 case '+':
1556 /* For conditional branches, output "P" for a probable branch. */
1557 if (TARGET_BRANCH_PREDICT)
1558 {
1559 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
61cb1816 1560 if (x && profile_probability::from_reg_br_prob_note (XINT (x, 0))
1561 > profile_probability::even ())
91009d64 1562 putc ('P', stream);
1563 }
1564 return;
1565
0b123c47 1566 case '.':
1567 /* For the %d in POP %d,0. */
1568 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1569 return;
1570
68cbb7e3 1571 case 'B':
1572 if (GET_CODE (x) != CONST_INT)
1573 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1574 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1575 return;
1576
1577 case 'H':
1578 /* Highpart. Must be general register, and not the last one, as
1579 that one cannot be part of a consecutive register pair. */
d68ffc6f 1580 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1581 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1582
1583 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1584 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1585 return;
1586
1587 case 'L':
1588 /* Lowpart. Must be CONST_INT or general register, and not the last
1589 one, as that one cannot be part of a consecutive register pair. */
1590 if (GET_CODE (x) == CONST_INT)
1591 {
1592 fprintf (stream, "#%lx",
1593 (unsigned long) (INTVAL (x)
1594 & ((unsigned int) 0x7fffffff * 2 + 1)));
1595 return;
1596 }
1597
1598 if (GET_CODE (x) == SYMBOL_REF)
1599 {
1600 output_addr_const (stream, x);
1601 return;
1602 }
1603
d68ffc6f 1604 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1605 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1606
1607 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1608 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1609 return;
1610
1611 /* Can't use 'a' because that's a generic modifier for address
1612 output. */
1613 case 'A':
1614 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
3a4303e7 1615 ~(uint64_t)
68cbb7e3 1616 mmix_intval (x));
1617 return;
1618
1619 case 'i':
1620 mmix_output_shiftvalue_op_from_str (stream, "INC",
3a4303e7 1621 (uint64_t)
68cbb7e3 1622 mmix_intval (x));
1623 return;
1624
1625 case 'o':
1626 mmix_output_shiftvalue_op_from_str (stream, "OR",
3a4303e7 1627 (uint64_t)
68cbb7e3 1628 mmix_intval (x));
1629 return;
1630
1631 case 's':
1632 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 1633 (uint64_t)
68cbb7e3 1634 mmix_intval (x));
1635 return;
1636
1637 case 'd':
1638 case 'D':
1639 mmix_output_condition (stream, x, (code == 'D'));
1640 return;
1641
1642 case 'e':
1643 /* Output an extra "e" to make fcmpe, fune. */
1644 if (TARGET_FCMP_EPSILON)
1645 fprintf (stream, "e");
1646 return;
1647
1648 case 'm':
1649 /* Output the number minus 1. */
1650 if (GET_CODE (x) != CONST_INT)
1651 {
1652 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1653 x);
1654 }
f03df321 1655 fprintf (stream, "%" PRId64,
3a4303e7 1656 (int64_t) (mmix_intval (x) - 1));
68cbb7e3 1657 return;
1658
1659 case 'p':
1660 /* Store the number of registers we want to save. This was setup
1661 by the prologue. The actual operand contains the number of
1662 registers to pass, but we don't use it currently. Anyway, we
1663 need to output the number of saved registers here. */
d68ffc6f 1664 fprintf (stream, "%d",
1665 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1666 return;
1667
1668 case 'r':
1669 /* Store the register to output a constant to. */
1670 if (! REG_P (x))
68435912 1671 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1672 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1673 return;
1674
1675 case 'I':
1676 /* Output the constant. Note that we use this for floats as well. */
1677 if (GET_CODE (x) != CONST_INT
1678 && (GET_CODE (x) != CONST_DOUBLE
1679 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1680 && GET_MODE (x) != SFmode)))
68435912 1681 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1682 mmix_output_register_setting (stream,
1683 mmix_output_destination_register,
1684 mmix_intval (x), 0);
1685 return;
1686
1687 case 'U':
1688 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1689 if (TARGET_ZERO_EXTEND)
1690 putc ('U', stream);
1691 return;
1692
1693 case 'v':
3a4303e7 1694 mmix_output_shifted_value (stream, (int64_t) mmix_intval (x));
68cbb7e3 1695 return;
1696
1697 case 'V':
3a4303e7 1698 mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x));
68cbb7e3 1699 return;
1700
1701 case 'W':
1702 if (GET_CODE (x) != CONST_INT)
1703 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1704 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1705 return;
1706
1707 case 0:
1708 /* Nothing to do. */
1709 break;
1710
1711 default:
1712 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1713 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1714 }
1715
1716 switch (GET_CODE (modified_x))
1717 {
1718 case REG:
d68ffc6f 1719 regno = REGNO (modified_x);
1720 if (regno >= FIRST_PSEUDO_REGISTER)
1721 internal_error ("MMIX Internal: Bad register: %d", regno);
1722 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1723 return;
1724
1725 case MEM:
3c047fe9 1726 output_address (GET_MODE (modified_x), XEXP (modified_x, 0));
68cbb7e3 1727 return;
1728
1729 case CONST_INT:
1730 /* For -2147483648, mmixal complains that the constant does not fit
1731 in 4 bytes, so let's output it as hex. Take care to handle hosts
1732 where HOST_WIDE_INT is longer than an int.
1733
1734 Print small constants +-255 using decimal. */
1735
1736 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1737 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1738 else
1739 fprintf (stream, "#%x",
1740 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1741 return;
1742
1743 case CONST_DOUBLE:
1744 /* Do somewhat as CONST_INT. */
58356836 1745 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1746 return;
1747
1748 case CONST:
1749 output_addr_const (stream, modified_x);
1750 return;
1751
1752 default:
1753 /* No need to test for all strange things. Let output_addr_const do
1754 it for us. */
1755 if (CONSTANT_P (modified_x)
1756 /* Strangely enough, this is not included in CONSTANT_P.
1757 FIXME: Ask/check about sanity here. */
aa90bb35 1758 || LABEL_P (modified_x))
68cbb7e3 1759 {
1760 output_addr_const (stream, modified_x);
1761 return;
1762 }
1763
1764 /* We need the original here. */
1765 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1766 }
1767}
1768
7a7fb407 1769/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1770
7a7fb407 1771static bool
1772mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1773{
91009d64 1774 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1775 return code == '+'
1776 /* A '.' is used for the %d in the POP %d,0 return insn. */
1777 || code == '.';
68cbb7e3 1778}
1779
7a7fb407 1780/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1781
7a7fb407 1782static void
3c047fe9 1783mmix_print_operand_address (FILE *stream, machine_mode /*mode*/, rtx x)
68cbb7e3 1784{
1785 if (REG_P (x))
1786 {
1787 /* I find the generated assembly code harder to read without
1788 the ",0". */
d68ffc6f 1789 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1790 return;
1791 }
1792 else if (GET_CODE (x) == PLUS)
1793 {
1794 rtx x1 = XEXP (x, 0);
1795 rtx x2 = XEXP (x, 1);
1796
68cbb7e3 1797 if (REG_P (x1))
1798 {
d68ffc6f 1799 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1800
1801 if (REG_P (x2))
1802 {
d68ffc6f 1803 fprintf (stream, "%s",
1804 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1805 return;
1806 }
f105c84e 1807 else if (satisfies_constraint_I (x2))
68cbb7e3 1808 {
1809 output_addr_const (stream, x2);
1810 return;
1811 }
1812 }
1813 }
1814
ca316360 1815 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1816 {
1817 output_addr_const (stream, x);
1818 return;
1819 }
1820
68cbb7e3 1821 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1822}
1823
1824/* ASM_OUTPUT_REG_PUSH. */
1825
1826void
7585fcd5 1827mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1828{
1829 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1830 reg_names[MMIX_STACK_POINTER_REGNUM],
1831 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1832 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1833 reg_names[MMIX_STACK_POINTER_REGNUM]);
1834}
1835
1836/* ASM_OUTPUT_REG_POP. */
1837
1838void
7585fcd5 1839mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1840{
1841 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1842 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1843 reg_names[MMIX_STACK_POINTER_REGNUM],
1844 reg_names[MMIX_STACK_POINTER_REGNUM]);
1845}
1846
1847/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1848
1849void
7585fcd5 1850mmix_asm_output_addr_diff_elt (FILE *stream,
1851 rtx body ATTRIBUTE_UNUSED,
1852 int value,
1853 int rel)
68cbb7e3 1854{
1855 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1856}
1857
1858/* ASM_OUTPUT_ADDR_VEC_ELT. */
1859
1860void
7585fcd5 1861mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1862{
1863 fprintf (stream, "\tOCTA L:%d\n", value);
1864}
1865
1866/* ASM_OUTPUT_SKIP. */
1867
1868void
7585fcd5 1869mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1870{
1871 fprintf (stream, "\tLOC @+%d\n", nbytes);
1872}
1873
1874/* ASM_OUTPUT_ALIGN. */
1875
1876void
7585fcd5 1877mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1878{
1879 /* We need to record the needed alignment of this section in the object,
1880 so we have to output an alignment directive. Use a .p2align (not
1881 .align) so people will never have to wonder about whether the
1882 argument is in number of bytes or the log2 thereof. We do it in
1883 addition to the LOC directive, so nothing needs tweaking when
1884 copy-pasting assembly into mmixal. */
1885 fprintf (stream, "\t.p2align %d\n", power);
1886 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1887}
1888
1889/* DBX_REGISTER_NUMBER. */
1890
c0dae7df 1891unsigned
1892mmix_dbx_register_number (unsigned regno)
68cbb7e3 1893{
d68ffc6f 1894 /* Adjust the register number to the one it will be output as, dammit.
1895 It'd be nice if we could check the assumption that we're filling a
1896 gap, but every register between the last saved register and parameter
1897 registers might be a valid parameter register. */
1898 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1899
1900 /* We need to renumber registers to get the number of the return address
1901 register in the range 0..255. It is also space-saving if registers
1902 mentioned in the call-frame information (which uses this function by
1903 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1904 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1905 return regno >= 224 ? (regno - 224) : (regno + 48);
1906}
1907
35a3065a 1908/* End of target macro support functions.
68cbb7e3 1909
7585fcd5 1910 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1911
d3310704 1912/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1913 from insn-emit.c. */
1914
1915rtx
3754d046 1916mmix_get_hard_reg_initial_val (machine_mode mode, int regno)
d3310704 1917{
1918 return get_hard_reg_initial_val (mode, regno);
1919}
1920
e911aedf 1921/* Nonzero when the function epilogue is simple enough that a single
d3310704 1922 "POP %d,0" should be used even within the function. */
0b123c47 1923
1924int
7585fcd5 1925mmix_use_simple_return (void)
0b123c47 1926{
1927 int regno;
1928
1929 int stack_space_to_allocate
abe32cce 1930 = (crtl->outgoing_args_size
1931 + crtl->args.pretend_args_size
0b123c47 1932 + get_frame_size () + 7) & ~7;
1933
1934 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1935 return 0;
1936
1937 for (regno = 255;
1938 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1939 regno--)
1940 /* Note that we assume that the frame-pointer-register is one of these
1941 registers, in which case we don't count it here. */
1942 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1943 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1944 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1945 return 0;
1946
1947 if (frame_pointer_needed)
1948 stack_space_to_allocate += 8;
1949
1950 if (MMIX_CFUN_HAS_LANDING_PAD)
1951 stack_space_to_allocate += 16;
1952 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1953 stack_space_to_allocate += 8;
1954
1955 return stack_space_to_allocate == 0;
1956}
1957
d3310704 1958
1959/* Expands the function prologue into RTX. */
1960
1961void
7585fcd5 1962mmix_expand_prologue (void)
d3310704 1963{
1964 HOST_WIDE_INT locals_size = get_frame_size ();
1965 int regno;
1966 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1967 = (crtl->outgoing_args_size
1968 + crtl->args.pretend_args_size
d3310704 1969 + locals_size + 7) & ~7;
1970 HOST_WIDE_INT offset = -8;
1971
1972 /* Add room needed to save global non-register-stack registers. */
1973 for (regno = 255;
1974 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1975 regno--)
1976 /* Note that we assume that the frame-pointer-register is one of these
1977 registers, in which case we don't count it here. */
1978 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1979 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1980 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1981 stack_space_to_allocate += 8;
1982
1983 /* If we do have a frame-pointer, add room for it. */
1984 if (frame_pointer_needed)
1985 stack_space_to_allocate += 8;
1986
1987 /* If we have a non-local label, we need to be able to unwind to it, so
1988 store the current register stack pointer. Also store the return
1989 address if we do that. */
1990 if (MMIX_CFUN_HAS_LANDING_PAD)
1991 stack_space_to_allocate += 16;
1992 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1993 /* If we do have a saved return-address slot, add room for it. */
1994 stack_space_to_allocate += 8;
1995
1996 /* Make sure we don't get an unaligned stack. */
1997 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1998 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1999 stack_space_to_allocate);
2000
abe32cce 2001 if (crtl->args.pretend_args_size)
d3310704 2002 {
2003 int mmix_first_vararg_reg
2004 = (MMIX_FIRST_INCOMING_ARG_REGNUM
2005 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 2006 - crtl->args.pretend_args_size / 8));
d3310704 2007
2008 for (regno
2009 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
2010 regno >= mmix_first_vararg_reg;
2011 regno--)
2012 {
2013 if (offset < 0)
2014 {
2015 HOST_WIDE_INT stack_chunk
2016 = stack_space_to_allocate > (256 - 8)
2017 ? (256 - 8) : stack_space_to_allocate;
2018
2019 mmix_emit_sp_add (-stack_chunk);
2020 offset += stack_chunk;
2021 stack_space_to_allocate -= stack_chunk;
2022 }
2023
2024 /* These registers aren't actually saved (as in "will be
2025 restored"), so don't tell DWARF2 they're saved. */
2026 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2027 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2028 offset)),
2029 gen_rtx_REG (DImode, regno));
2030 offset -= 8;
2031 }
2032 }
2033
2034 /* Store the frame-pointer. */
2035
2036 if (frame_pointer_needed)
2037 {
2038 rtx insn;
2039
2040 if (offset < 0)
2041 {
2042 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2043 HOST_WIDE_INT stack_chunk
2044 = stack_space_to_allocate > (256 - 8 - 8)
2045 ? (256 - 8 - 8) : stack_space_to_allocate;
2046
2047 mmix_emit_sp_add (-stack_chunk);
2048
2049 offset += stack_chunk;
2050 stack_space_to_allocate -= stack_chunk;
2051 }
2052
2053 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2054 plus_constant (Pmode,
2055 stack_pointer_rtx,
d3310704 2056 offset)),
2057 hard_frame_pointer_rtx);
2058 RTX_FRAME_RELATED_P (insn) = 1;
2059 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2060 stack_pointer_rtx,
2061 GEN_INT (offset + 8)));
2062 RTX_FRAME_RELATED_P (insn) = 1;
2063 offset -= 8;
2064 }
2065
2066 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2067 {
2068 rtx tmpreg, retreg;
2069 rtx insn;
2070
2071 /* Store the return-address, if one is needed on the stack. We
2072 usually store it in a register when needed, but that doesn't work
2073 with -fexceptions. */
2074
2075 if (offset < 0)
2076 {
2077 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2078 HOST_WIDE_INT stack_chunk
2079 = stack_space_to_allocate > (256 - 8 - 8)
2080 ? (256 - 8 - 8) : stack_space_to_allocate;
2081
2082 mmix_emit_sp_add (-stack_chunk);
2083
2084 offset += stack_chunk;
2085 stack_space_to_allocate -= stack_chunk;
2086 }
2087
2088 tmpreg = gen_rtx_REG (DImode, 255);
2089 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2090
2091 /* Dwarf2 code is confused by the use of a temporary register for
2092 storing the return address, so we have to express it as a note,
2093 which we attach to the actual store insn. */
2094 emit_move_insn (tmpreg, retreg);
2095
2096 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2097 plus_constant (Pmode,
2098 stack_pointer_rtx,
d3310704 2099 offset)),
2100 tmpreg);
2101 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2102 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
d1f9b275 2103 gen_rtx_SET (gen_rtx_MEM (DImode,
29c05e22 2104 plus_constant (Pmode,
2105 stack_pointer_rtx,
c0dae7df 2106 offset)),
2107 retreg));
d3310704 2108
2109 offset -= 8;
2110 }
2111 else if (MMIX_CFUN_HAS_LANDING_PAD)
2112 offset -= 8;
2113
2114 if (MMIX_CFUN_HAS_LANDING_PAD)
2115 {
2116 /* Store the register defining the numbering of local registers, so
2117 we know how long to unwind the register stack. */
2118
2119 if (offset < 0)
2120 {
2121 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2122 HOST_WIDE_INT stack_chunk
2123 = stack_space_to_allocate > (256 - 8 - 8)
2124 ? (256 - 8 - 8) : stack_space_to_allocate;
2125
2126 mmix_emit_sp_add (-stack_chunk);
2127
2128 offset += stack_chunk;
2129 stack_space_to_allocate -= stack_chunk;
2130 }
2131
2132 /* We don't tell dwarf2 about this one; we just have it to unwind
2133 the register stack at landing pads. FIXME: It's a kludge because
2134 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2135 register stack at the moment. Best thing would be to handle it
2136 like stack-pointer offsets. Better: some hook into dwarf2out.c
2137 to produce DW_CFA_expression:s that specify the increment of rO,
2138 and unwind it at eh_return (preferred) or at the landing pad.
2139 Then saves to $0..$G-1 could be specified through that register. */
2140
2141 emit_move_insn (gen_rtx_REG (DImode, 255),
2142 gen_rtx_REG (DImode,
2143 MMIX_rO_REGNUM));
2144 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2145 plus_constant (Pmode, stack_pointer_rtx,
2146 offset)),
d3310704 2147 gen_rtx_REG (DImode, 255));
2148 offset -= 8;
2149 }
2150
2151 /* After the return-address and the frame-pointer, we have the local
2152 variables. They're the ones that may have an "unaligned" size. */
2153 offset -= (locals_size + 7) & ~7;
2154
2155 /* Now store all registers that are global, i.e. not saved by the
2156 register file machinery.
2157
2158 It is assumed that the frame-pointer is one of these registers, so it
2159 is explicitly excluded in the count. */
2160
2161 for (regno = 255;
2162 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2163 regno--)
2164 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2165 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2166 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2167 {
2168 rtx insn;
2169
2170 if (offset < 0)
2171 {
2172 HOST_WIDE_INT stack_chunk
2173 = (stack_space_to_allocate > (256 - offset - 8)
2174 ? (256 - offset - 8) : stack_space_to_allocate);
2175
2176 mmix_emit_sp_add (-stack_chunk);
2177 offset += stack_chunk;
2178 stack_space_to_allocate -= stack_chunk;
2179 }
2180
2181 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2182 plus_constant (Pmode,
2183 stack_pointer_rtx,
d3310704 2184 offset)),
2185 gen_rtx_REG (DImode, regno));
2186 RTX_FRAME_RELATED_P (insn) = 1;
2187 offset -= 8;
2188 }
2189
2190 /* Finally, allocate room for outgoing args and local vars if room
2191 wasn't allocated above. */
2192 if (stack_space_to_allocate)
2193 mmix_emit_sp_add (-stack_space_to_allocate);
2194}
2195
2196/* Expands the function epilogue into RTX. */
2197
2198void
7585fcd5 2199mmix_expand_epilogue (void)
d3310704 2200{
2201 HOST_WIDE_INT locals_size = get_frame_size ();
2202 int regno;
2203 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2204 = (crtl->outgoing_args_size
2205 + crtl->args.pretend_args_size
d3310704 2206 + locals_size + 7) & ~7;
2207
d3310704 2208 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2209 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2210
2211 /* Add the space for global non-register-stack registers.
2212 It is assumed that the frame-pointer register can be one of these
2213 registers, in which case it is excluded from the count when needed. */
2214 for (regno = 255;
2215 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2216 regno--)
2217 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2218 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2219 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2220 stack_space_to_deallocate += 8;
2221
2222 /* Add in the space for register stack-pointer. If so, always add room
2223 for the saved PC. */
2224 if (MMIX_CFUN_HAS_LANDING_PAD)
2225 stack_space_to_deallocate += 16;
2226 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2227 /* If we have a saved return-address slot, add it in. */
2228 stack_space_to_deallocate += 8;
2229
2230 /* Add in the frame-pointer. */
2231 if (frame_pointer_needed)
2232 stack_space_to_deallocate += 8;
2233
2234 /* Make sure we don't get an unaligned stack. */
2235 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2236 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2237 stack_space_to_deallocate);
2238
2239 /* We will add back small offsets to the stack pointer as we go.
2240 First, we restore all registers that are global, i.e. not saved by
2241 the register file machinery. */
2242
2243 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2244 regno <= 255;
2245 regno++)
2246 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2247 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2248 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2249 {
2250 if (offset > 255)
2251 {
2252 mmix_emit_sp_add (offset);
2253 stack_space_to_deallocate -= offset;
2254 offset = 0;
2255 }
2256
2257 emit_move_insn (gen_rtx_REG (DImode, regno),
2258 gen_rtx_MEM (DImode,
29c05e22 2259 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2260 offset)));
2261 offset += 8;
2262 }
2263
2264 /* Here is where the local variables were. As in the prologue, they
2265 might be of an unaligned size. */
2266 offset += (locals_size + 7) & ~7;
2267
d3310704 2268 /* The saved register stack pointer is just below the frame-pointer
2269 register. We don't need to restore it "manually"; the POP
2270 instruction does that. */
2271 if (MMIX_CFUN_HAS_LANDING_PAD)
2272 offset += 16;
2273 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2274 /* The return-address slot is just below the frame-pointer register.
2275 We don't need to restore it because we don't really use it. */
2276 offset += 8;
2277
2278 /* Get back the old frame-pointer-value. */
2279 if (frame_pointer_needed)
2280 {
2281 if (offset > 255)
2282 {
2283 mmix_emit_sp_add (offset);
2284
2285 stack_space_to_deallocate -= offset;
2286 offset = 0;
2287 }
2288
2289 emit_move_insn (hard_frame_pointer_rtx,
2290 gen_rtx_MEM (DImode,
29c05e22 2291 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2292 offset)));
2293 offset += 8;
2294 }
2295
2296 /* We do not need to restore pretended incoming args, just add back
2297 offset to sp. */
2298 if (stack_space_to_deallocate != 0)
2299 mmix_emit_sp_add (stack_space_to_deallocate);
2300
18d50ae6 2301 if (crtl->calls_eh_return)
d3310704 2302 /* Adjust the (normal) stack-pointer to that of the receiver.
2303 FIXME: It would be nice if we could also adjust the register stack
2304 here, but we need to express it through DWARF 2 too. */
2305 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2306 gen_rtx_REG (DImode,
2307 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2308}
2309
68cbb7e3 2310/* Output an optimal sequence for setting a register to a specific
2311 constant. Used in an alternative for const_ints in movdi, and when
2312 using large stack-frame offsets.
2313
2314 Use do_begin_end to say if a line-starting TAB and newline before the
2315 first insn and after the last insn is wanted. */
2316
2317void
7585fcd5 2318mmix_output_register_setting (FILE *stream,
2319 int regno,
3a4303e7 2320 int64_t value,
7585fcd5 2321 int do_begin_end)
68cbb7e3 2322{
2323 if (do_begin_end)
2324 fprintf (stream, "\t");
2325
4d66cf01 2326 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K))
f03df321 2327 fprintf (stream, "NEGU %s,0,%" PRId64, reg_names[regno], -value);
3a4303e7 2328 else if (mmix_shiftable_wyde_value ((uint64_t) value))
68cbb7e3 2329 {
2330 /* First, the one-insn cases. */
2331 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2332 (uint64_t)
68cbb7e3 2333 value);
2334 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2335 mmix_output_shifted_value (stream, (uint64_t) value);
68cbb7e3 2336 }
3a4303e7 2337 else if (mmix_shiftable_wyde_value (-(uint64_t) value))
68cbb7e3 2338 {
2339 /* We do this to get a bit more legible assembly code. The next
2340 alternative is mostly redundant with this. */
2341
2342 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2343 -(uint64_t)
68cbb7e3 2344 value);
2345 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2346 mmix_output_shifted_value (stream, -(uint64_t) value);
68cbb7e3 2347 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2348 reg_names[regno]);
2349 }
3a4303e7 2350 else if (mmix_shiftable_wyde_value (~(uint64_t) value))
68cbb7e3 2351 {
2352 /* Slightly more expensive, the two-insn cases. */
2353
2354 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2355 is shiftable, or any other one-insn transformation of the value.
2356 FIXME: Check first if the value is "shiftable" by two loading
2357 with two insns, since it makes more readable assembly code (if
2358 anyone else cares). */
2359
2360 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2361 ~(uint64_t)
68cbb7e3 2362 value);
2363 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2364 mmix_output_shifted_value (stream, ~(uint64_t) value);
68cbb7e3 2365 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2366 reg_names[regno]);
2367 }
2368 else
2369 {
2370 /* The generic case. 2..4 insns. */
25037517 2371 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2372 const char *op = "SET";
2373 const char *line_begin = "";
f0b228a5 2374 int insns = 0;
68cbb7e3 2375 int i;
3a4303e7 2376 int64_t tmpvalue = value;
68cbb7e3 2377
f0b228a5 2378 /* Compute the number of insns needed to output this constant. */
2379 for (i = 0; i < 4 && tmpvalue != 0; i++)
2380 {
2381 if (tmpvalue & 65535)
2382 insns++;
2383 tmpvalue >>= 16;
2384 }
2385 if (TARGET_BASE_ADDRESSES && insns == 3)
2386 {
2387 /* The number three is based on a static observation on
2388 ghostscript-6.52. Two and four are excluded because there
2389 are too many such constants, and each unique constant (maybe
2390 offset by 1..255) were used few times compared to other uses,
2391 e.g. addresses.
2392
2393 We use base-plus-offset addressing to force it into a global
2394 register; we just use a "LDA reg,VALUE", which will cause the
2395 assembler and linker to DTRT (for constants as well as
2396 addresses). */
2397 fprintf (stream, "LDA %s,", reg_names[regno]);
2398 mmix_output_octa (stream, value, 0);
2399 }
2400 else
68cbb7e3 2401 {
f0b228a5 2402 /* Output pertinent parts of the 4-wyde sequence.
2403 Still more to do if we want this to be optimal, but hey...
2404 Note that the zero case has been handled above. */
2405 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2406 {
f0b228a5 2407 if (value & 65535)
2408 {
2409 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2410 higher_parts[i], reg_names[regno],
2411 (int) (value & 65535));
2412 /* The first one sets the rest of the bits to 0, the next
2413 ones add set bits. */
2414 op = "INC";
2415 line_begin = "\n\t";
2416 }
68cbb7e3 2417
f0b228a5 2418 value >>= 16;
2419 }
68cbb7e3 2420 }
2421 }
2422
2423 if (do_begin_end)
2424 fprintf (stream, "\n");
2425}
2426
2427/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2428 else return 0. */
2429
2430int
3a4303e7 2431mmix_shiftable_wyde_value (uint64_t value)
68cbb7e3 2432{
2433 /* Shift by 16 bits per group, stop when we've found two groups with
2434 nonzero bits. */
2435 int i;
2436 int has_candidate = 0;
2437
2438 for (i = 0; i < 4; i++)
2439 {
2440 if (value & 65535)
2441 {
2442 if (has_candidate)
2443 return 0;
2444 else
2445 has_candidate = 1;
2446 }
2447
2448 value >>= 16;
2449 }
2450
2451 return 1;
2452}
2453
74f4459c 2454/* X and Y are two things to compare using CODE. Return the rtx for
2455 the cc-reg in the proper mode. */
68cbb7e3 2456
2457rtx
7585fcd5 2458mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2459{
3754d046 2460 machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2461 return gen_reg_rtx (ccmode);
68cbb7e3 2462}
2463
2464/* Local (static) helper functions. */
2465
d3310704 2466static void
7585fcd5 2467mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2468{
2469 rtx insn;
2470
2471 if (offset < 0)
2472 {
2473 /* Negative stack-pointer adjustments are allocations and appear in
2474 the prologue only. We mark them as frame-related so unwind and
2475 debug info is properly emitted for them. */
2476 if (offset > -255)
2477 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2478 stack_pointer_rtx,
2479 GEN_INT (offset)));
2480 else
2481 {
2482 rtx tmpr = gen_rtx_REG (DImode, 255);
2483 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2484 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2485 stack_pointer_rtx, tmpr));
2486 }
2487 RTX_FRAME_RELATED_P (insn) = 1;
2488 }
2489 else
2490 {
2491 /* Positive adjustments are in the epilogue only. Don't mark them
2492 as "frame-related" for unwind info. */
f105c84e 2493 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
d3310704 2494 emit_insn (gen_adddi3 (stack_pointer_rtx,
2495 stack_pointer_rtx,
2496 GEN_INT (offset)));
2497 else
2498 {
2499 rtx tmpr = gen_rtx_REG (DImode, 255);
2500 emit_move_insn (tmpr, GEN_INT (offset));
2501 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2502 stack_pointer_rtx, tmpr));
2503 }
2504 }
2505}
2506
68cbb7e3 2507/* Print operator suitable for doing something with a shiftable
ebb11c7b 2508 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2509
2510static void
7585fcd5 2511mmix_output_shiftvalue_op_from_str (FILE *stream,
2512 const char *mainop,
3a4303e7 2513 int64_t value)
68cbb7e3 2514{
25037517 2515 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2516 int i;
2517
2518 if (! mmix_shiftable_wyde_value (value))
2519 {
2520 char s[sizeof ("0xffffffffffffffff")];
9d247a3d 2521 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2522 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2523 }
2524
2525 for (i = 0; i < 4; i++)
2526 {
2527 /* We know we're through when we find one-bits in the low
2528 16 bits. */
2529 if (value & 0xffff)
2530 {
2531 fprintf (stream, "%s%s", mainop, op_part[i]);
2532 return;
2533 }
2534 value >>= 16;
2535 }
2536
2537 /* No bits set? Then it must have been zero. */
2538 fprintf (stream, "%sL", mainop);
2539}
2540
2541/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2542
2543static void
3a4303e7 2544mmix_output_octa (FILE *stream, int64_t value, int do_begin_end)
68cbb7e3 2545{
68cbb7e3 2546 if (do_begin_end)
2547 fprintf (stream, "\tOCTA ");
2548
68cbb7e3 2549 /* Provide a few alternative output formats depending on the number, to
2550 improve legibility of assembler output. */
3a4303e7 2551 if ((value < (int64_t) 0 && value > (int64_t) -10000)
2552 || (value >= (int64_t) 0 && value <= (int64_t) 16384))
68cbb7e3 2553 fprintf (stream, "%d", (int) value);
3a4303e7 2554 else if (value > (int64_t) 0
2555 && value < ((int64_t) 1 << 31) * 2)
68cbb7e3 2556 fprintf (stream, "#%x", (unsigned int) value);
3a4303e7 2557 else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t))
6996b123 2558 /* We need to avoid the not-so-universal "0x" prefix; we need the
2559 pure hex-digits together with the mmixal "#" hex prefix. */
2560 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE,
2561 (HOST_WIDE_INT) value);
2562 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */
9d247a3d 2563 fprintf (stream, "%" PRIu64, value);
68cbb7e3 2564
2565 if (do_begin_end)
2566 fprintf (stream, "\n");
2567}
2568
2569/* Print the presumed shiftable wyde argument shifted into place (to
2570 be output with an operand). */
2571
2572static void
3a4303e7 2573mmix_output_shifted_value (FILE *stream, int64_t value)
68cbb7e3 2574{
2575 int i;
2576
2577 if (! mmix_shiftable_wyde_value (value))
2578 {
2579 char s[16+2+1];
9d247a3d 2580 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2581 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2582 }
2583
2584 for (i = 0; i < 4; i++)
68cbb7e3 2585 {
7585fcd5 2586 /* We know we're through when we find one-bits in the low 16 bits. */
2587 if (value & 0xffff)
2588 {
2589 fprintf (stream, "#%x", (int) (value & 0xffff));
2590 return;
2591 }
68cbb7e3 2592
2593 value >>= 16;
2594 }
2595
2596 /* No bits set? Then it must have been zero. */
2597 fprintf (stream, "0");
2598}
2599
2600/* Output an MMIX condition name corresponding to an operator
2601 and operands:
2602 (comparison_operator [(comparison_operator ...) (const_int 0)])
2603 which means we have to look at *two* operators.
2604
2605 The argument "reversed" refers to reversal of the condition (not the
2606 same as swapping the arguments). */
2607
2608static void
7a7fb407 2609mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2610{
2611 struct cc_conv
2612 {
2613 RTX_CODE cc;
2614
2615 /* The normal output cc-code. */
2616 const char *const normal;
2617
2618 /* The reversed cc-code, or NULL if invalid. */
2619 const char *const reversed;
2620 };
2621
2622 struct cc_type_conv
2623 {
3754d046 2624 machine_mode cc_mode;
68cbb7e3 2625
21f1e711 2626 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2627 const struct cc_conv *const convs;
2628 };
2629
2630#undef CCEND
21f1e711 2631#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2632
2633 static const struct cc_conv cc_fun_convs[]
2634 = {{ORDERED, "Z", "P"},
2635 {UNORDERED, "P", "Z"},
2636 CCEND};
2637 static const struct cc_conv cc_fp_convs[]
2638 = {{GT, "P", NULL},
2639 {LT, "N", NULL},
2640 CCEND};
2641 static const struct cc_conv cc_fpeq_convs[]
2642 = {{NE, "Z", "P"},
2643 {EQ, "P", "Z"},
2644 CCEND};
2645 static const struct cc_conv cc_uns_convs[]
2646 = {{GEU, "NN", "N"},
2647 {GTU, "P", "NP"},
2648 {LEU, "NP", "P"},
2649 {LTU, "N", "NN"},
2650 CCEND};
2651 static const struct cc_conv cc_signed_convs[]
2652 = {{NE, "NZ", "Z"},
2653 {EQ, "Z", "NZ"},
2654 {GE, "NN", "N"},
2655 {GT, "P", "NP"},
2656 {LE, "NP", "P"},
2657 {LT, "N", "NN"},
2658 CCEND};
2659 static const struct cc_conv cc_di_convs[]
2660 = {{NE, "NZ", "Z"},
2661 {EQ, "Z", "NZ"},
2662 {GE, "NN", "N"},
2663 {GT, "P", "NP"},
2664 {LE, "NP", "P"},
2665 {LT, "N", "NN"},
2666 {GTU, "NZ", "Z"},
2667 {LEU, "Z", "NZ"},
2668 CCEND};
2669#undef CCEND
2670
2671 static const struct cc_type_conv cc_convs[]
1e0295b9 2672 = {{E_CC_FUNmode, cc_fun_convs},
2673 {E_CC_FPmode, cc_fp_convs},
2674 {E_CC_FPEQmode, cc_fpeq_convs},
2675 {E_CC_UNSmode, cc_uns_convs},
2676 {E_CCmode, cc_signed_convs},
2677 {E_DImode, cc_di_convs}};
68cbb7e3 2678
3585dac7 2679 size_t i;
68cbb7e3 2680 int j;
2681
3754d046 2682 machine_mode mode = GET_MODE (XEXP (x, 0));
68cbb7e3 2683 RTX_CODE cc = GET_CODE (x);
2684
3585dac7 2685 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2686 {
2687 if (mode == cc_convs[i].cc_mode)
2688 {
21f1e711 2689 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2690 if (cc == cc_convs[i].convs[j].cc)
2691 {
2692 const char *mmix_cc
2693 = (reversed ? cc_convs[i].convs[j].reversed
2694 : cc_convs[i].convs[j].normal);
2695
2696 if (mmix_cc == NULL)
2697 fatal_insn ("MMIX Internal: Trying to output invalidly\
2698 reversed condition:", x);
2699
2700 fprintf (stream, "%s", mmix_cc);
2701 return;
2702 }
2703
2704 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2705 }
2706 }
2707
2708 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2709}
2710
2711/* Return the bit-value for a const_int or const_double. */
2712
3a4303e7 2713int64_t
7a7fb407 2714mmix_intval (const_rtx x)
68cbb7e3 2715{
68cbb7e3 2716 if (GET_CODE (x) == CONST_INT)
2717 return INTVAL (x);
2718
2719 /* We make a little song and dance because converting to long long in
2720 gcc-2.7.2 is broken. I still want people to be able to use it for
2721 cross-compilation to MMIX. */
2722 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
3a4303e7 2723 return CONST_DOUBLE_HIGH (x);
68cbb7e3 2724
2725 if (GET_CODE (x) == CONST_DOUBLE)
2726 {
68cbb7e3 2727 if (GET_MODE (x) == DFmode)
2728 {
2729 long bits[2];
dc8dc4ce 2730
945f7b03 2731 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2732
ca2399d9 2733 /* The double cast is necessary to avoid getting the long
2734 sign-extended to unsigned long long(!) when they're of
2735 different size (usually 32-bit hosts). */
2736 return
3a4303e7 2737 ((uint64_t) (unsigned long) bits[0]
2738 << (uint64_t) 32U)
2739 | (uint64_t) (unsigned long) bits[1];
68cbb7e3 2740 }
2741 else if (GET_MODE (x) == SFmode)
2742 {
2743 long bits;
945f7b03 2744 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2745
2746 return (unsigned long) bits;
2747 }
2748 }
2749
2750 fatal_insn ("MMIX Internal: This is not a constant:", x);
2751}
2752
3b2411a8 2753/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2754
3754d046 2755machine_mode
3b2411a8 2756mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
3754d046 2757 machine_mode mode,
3b2411a8 2758 int *punsignedp ATTRIBUTE_UNUSED,
2759 const_tree fntype ATTRIBUTE_UNUSED,
2760 int for_return)
2761{
2762 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2763 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2764 if (for_return == 1)
3b2411a8 2765 return mode;
2766
2767 /* Promotion of modes currently generates slow code, extending before
2768 operation, so we do it only for arguments. */
2769 if (GET_MODE_CLASS (mode) == MODE_INT
2770 && GET_MODE_SIZE (mode) < 8)
2771 return DImode;
2772 else
2773 return mode;
2774}
9e4a734a 2775/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2776
2777static rtx
2778mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2779 int incoming ATTRIBUTE_UNUSED)
2780{
2781 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2782}
2783
5a1c68c3 2784/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2785
2786 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2787 of it; we can deduce the value. */
2788
2789bool
2790mmix_frame_pointer_required (void)
2791{
2792 return (cfun->has_nonlocal_label);
2793}
2794
68cbb7e3 2795/*
2796 * Local variables:
2797 * eval: (c-set-style "gnu")
2798 * indent-tabs-mode: t
2799 * End:
2800 */