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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
f1717362 2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
68cbb7e3 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
581084df 5This file is part of GCC.
68cbb7e3 6
581084df 7GCC is free software; you can redistribute it and/or modify
68cbb7e3 8it under the terms of the GNU General Public License as published by
038d1e19 9the Free Software Foundation; either version 3, or (at your option)
68cbb7e3 10any later version.
11
581084df 12GCC is distributed in the hope that it will be useful,
68cbb7e3 13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
038d1e19 18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
68cbb7e3 20
21#include "config.h"
22#include "system.h"
805e22b2 23#include "coretypes.h"
9ef16211 24#include "backend.h"
c1eb80de 25#include "target.h"
68cbb7e3 26#include "rtl.h"
c1eb80de 27#include "tree.h"
9ef16211 28#include "df.h"
c1eb80de 29#include "tm_p.h"
68cbb7e3 30#include "insn-config.h"
c1eb80de 31#include "regs.h"
32#include "emit-rtl.h"
33#include "recog.h"
34#include "diagnostic-core.h"
68cbb7e3 35#include "output.h"
9ed99284 36#include "varasm.h"
37#include "stor-layout.h"
38#include "calls.h"
d53441c8 39#include "explow.h"
68cbb7e3 40#include "expr.h"
bde36f4a 41#include "dwarf2.h"
f105c84e 42#include "tm-constrs.h"
f7715905 43#include "builtins.h"
68cbb7e3 44
0c71fb4f 45/* This file should be included last. */
4b498588 46#include "target-def.h"
47
68cbb7e3 48/* First some local helper definitions. */
49#define MMIX_FIRST_GLOBAL_REGNUM 32
50
51/* We'd need a current_function_has_landing_pad. It's marked as such when
52 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
53 mostly. */
54#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
55
56/* We have no means to tell DWARF 2 about the register stack, so we need
57 to store the return address on the stack if an exception can get into
d3310704 58 this function. FIXME: Narrow condition. Before any whole-function
3072d30e 59 analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date
d3310704 60 after reload_completed; it may contain incorrect information some time
61 before that. Within a RTL sequence (after a call to start_sequence,
62 such as in RTL expanders), leaf_function_p doesn't see all insns
63 (perhaps any insn). But regs_ever_live is up-to-date when
64 leaf_function_p () isn't, so we "or" them together to get accurate
65 information. FIXME: Some tweak to leaf_function_p might be
f024691d 66 preferable. */
d3310704 67#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
68 (flag_exceptions \
3072d30e 69 && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \
d3310704 70 || !leaf_function_p ()))
68cbb7e3 71
72#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
18d50ae6 73 (crtl->calls_eh_return \
68cbb7e3 74 && (EH_RETURN_DATA_REGNO (0) == REGNO \
75 || EH_RETURN_DATA_REGNO (1) == REGNO \
76 || EH_RETURN_DATA_REGNO (2) == REGNO \
77 || EH_RETURN_DATA_REGNO (3) == REGNO))
78
d68ffc6f 79/* For the default ABI, we rename registers at output-time to fill the gap
80 between the (statically partitioned) saved registers and call-clobbered
81 registers. In effect this makes unused call-saved registers to be used
82 as call-clobbered registers. The benefit comes from keeping the number
83 of local registers (value of rL) low, since there's a cost of
d3310704 84 increasing rL and clearing unused (unset) registers with lower numbers.
85 Don't translate while outputting the prologue. */
d68ffc6f 86#define MMIX_OUTPUT_REGNO(N) \
87 (TARGET_ABI_GNU \
0b123c47 88 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
89 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 90 || cfun == NULL \
91 || cfun->machine == NULL \
92 || cfun->machine->in_prologue \
d68ffc6f 93 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
94 + cfun->machine->highest_saved_stack_register + 1))
95
0b123c47 96/* The %d in "POP %d,0". */
97#define MMIX_POP_ARGUMENT() \
98 ((! TARGET_ABI_GNU \
abe32cce 99 && crtl->return_rtx != NULL \
18d50ae6 100 && ! cfun->returns_struct) \
abe32cce 101 ? (GET_CODE (crtl->return_rtx) == PARALLEL \
102 ? GET_NUM_ELEM (XVEC (crtl->return_rtx, 0)) : 1) \
0b123c47 103 : 0)
104
68cbb7e3 105/* The canonical saved comparison operands for non-cc0 machines, set in
106 the compare expander. */
107rtx mmix_compare_op0;
108rtx mmix_compare_op1;
109
68cbb7e3 110/* Declarations of locals. */
111
68cbb7e3 112/* Intermediate for insn output. */
113static int mmix_output_destination_register;
114
4c834714 115static void mmix_option_override (void);
40fe393f 116static void mmix_asm_output_source_filename (FILE *, const char *);
68cbb7e3 117static void mmix_output_shiftvalue_op_from_str
3a4303e7 118 (FILE *, const char *, int64_t);
119static void mmix_output_shifted_value (FILE *, int64_t);
7a7fb407 120static void mmix_output_condition (FILE *, const_rtx, int);
3a4303e7 121static void mmix_output_octa (FILE *, int64_t, int);
7585fcd5 122static bool mmix_assemble_integer (rtx, unsigned int, int);
123static struct machine_function *mmix_init_machine_status (void);
124static void mmix_encode_section_info (tree, rtx, int);
125static const char *mmix_strip_name_encoding (const char *);
126static void mmix_emit_sp_add (HOST_WIDE_INT offset);
127static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
128static void mmix_target_asm_function_end_prologue (FILE *);
129static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
27925877 130static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t);
131static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t);
3754d046 132static bool mmix_legitimate_address_p (machine_mode, rtx, bool);
133static bool mmix_legitimate_constant_p (machine_mode, rtx);
7585fcd5 134static void mmix_reorg (void);
6988553d 135static void mmix_asm_output_mi_thunk
7585fcd5 136 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
9e4a734a 137static void mmix_setup_incoming_varargs
3754d046 138 (cumulative_args_t, machine_mode, tree, int *, int);
7585fcd5 139static void mmix_file_start (void);
140static void mmix_file_end (void);
5ae4887d 141static bool mmix_rtx_costs (rtx, machine_mode, int, int, int *, bool);
3754d046 142static int mmix_register_move_cost (machine_mode,
f7e13ca6 143 reg_class_t, reg_class_t);
9e4a734a 144static rtx mmix_struct_value_rtx (tree, int);
3754d046 145static machine_mode mmix_promote_function_mode (const_tree,
146 machine_mode,
3b2411a8 147 int *, const_tree, int);
3754d046 148static void mmix_function_arg_advance (cumulative_args_t, machine_mode,
5d246ebf 149 const_tree, bool);
3754d046 150static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode,
5d246ebf 151 const_tree, bool, bool);
3754d046 152static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode,
5d246ebf 153 const_tree, bool);
3754d046 154static rtx mmix_function_arg (cumulative_args_t, machine_mode,
5d246ebf 155 const_tree, bool);
b600778c 156static rtx mmix_function_value (const_tree, const_tree, bool);
3754d046 157static rtx mmix_libcall_value (machine_mode, const_rtx);
b600778c 158static bool mmix_function_value_regno_p (const unsigned int);
39cba157 159static bool mmix_pass_by_reference (cumulative_args_t,
3754d046 160 machine_mode, const_tree, bool);
5a1c68c3 161static bool mmix_frame_pointer_required (void);
604d844a 162static void mmix_asm_trampoline_template (FILE *);
163static void mmix_trampoline_init (rtx, tree, rtx);
7a7fb407 164static void mmix_print_operand (FILE *, rtx, int);
3c047fe9 165static void mmix_print_operand_address (FILE *, machine_mode, rtx);
7a7fb407 166static bool mmix_print_operand_punct_valid_p (unsigned char);
b2d7ede1 167static void mmix_conditional_register_usage (void);
68cbb7e3 168
169/* Target structure macros. Listed by node. See `Using and Porting GCC'
170 for a general description. */
171
172/* Node: Function Entry */
173
58356836 174#undef TARGET_ASM_BYTE_OP
175#define TARGET_ASM_BYTE_OP NULL
176#undef TARGET_ASM_ALIGNED_HI_OP
177#define TARGET_ASM_ALIGNED_HI_OP NULL
178#undef TARGET_ASM_ALIGNED_SI_OP
179#define TARGET_ASM_ALIGNED_SI_OP NULL
180#undef TARGET_ASM_ALIGNED_DI_OP
181#define TARGET_ASM_ALIGNED_DI_OP NULL
182#undef TARGET_ASM_INTEGER
183#define TARGET_ASM_INTEGER mmix_assemble_integer
184
68cbb7e3 185#undef TARGET_ASM_FUNCTION_PROLOGUE
186#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
187
d3310704 188#undef TARGET_ASM_FUNCTION_END_PROLOGUE
189#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
190
68cbb7e3 191#undef TARGET_ASM_FUNCTION_EPILOGUE
192#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
193
7a7fb407 194#undef TARGET_PRINT_OPERAND
195#define TARGET_PRINT_OPERAND mmix_print_operand
196#undef TARGET_PRINT_OPERAND_ADDRESS
197#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address
198#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
199#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p
200
7811991d 201#undef TARGET_ENCODE_SECTION_INFO
202#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 203#undef TARGET_STRIP_NAME_ENCODING
204#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 205
6988553d 206#undef TARGET_ASM_OUTPUT_MI_THUNK
207#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 208#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
209#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 210#undef TARGET_ASM_FILE_START
211#define TARGET_ASM_FILE_START mmix_file_start
212#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
213#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 214#undef TARGET_ASM_FILE_END
215#define TARGET_ASM_FILE_END mmix_file_end
40fe393f 216#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
217#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
6988553d 218
b2d7ede1 219#undef TARGET_CONDITIONAL_REGISTER_USAGE
220#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
221
fab7adbf 222#undef TARGET_RTX_COSTS
223#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 224#undef TARGET_ADDRESS_COST
d9c5e5f4 225#define TARGET_ADDRESS_COST hook_int_rtx_mode_as_bool_0
fab7adbf 226
f7e13ca6 227#undef TARGET_REGISTER_MOVE_COST
228#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost
229
2efea8c0 230#undef TARGET_MACHINE_DEPENDENT_REORG
231#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
232
3b2411a8 233#undef TARGET_PROMOTE_FUNCTION_MODE
234#define TARGET_PROMOTE_FUNCTION_MODE mmix_promote_function_mode
235
b600778c 236#undef TARGET_FUNCTION_VALUE
237#define TARGET_FUNCTION_VALUE mmix_function_value
238#undef TARGET_LIBCALL_VALUE
239#define TARGET_LIBCALL_VALUE mmix_libcall_value
240#undef TARGET_FUNCTION_VALUE_REGNO_P
241#define TARGET_FUNCTION_VALUE_REGNO_P mmix_function_value_regno_p
9e4a734a 242
5d246ebf 243#undef TARGET_FUNCTION_ARG
244#define TARGET_FUNCTION_ARG mmix_function_arg
245#undef TARGET_FUNCTION_INCOMING_ARG
246#define TARGET_FUNCTION_INCOMING_ARG mmix_function_incoming_arg
247#undef TARGET_FUNCTION_ARG_ADVANCE
248#define TARGET_FUNCTION_ARG_ADVANCE mmix_function_arg_advance
9e4a734a 249#undef TARGET_STRUCT_VALUE_RTX
250#define TARGET_STRUCT_VALUE_RTX mmix_struct_value_rtx
9e4a734a 251#undef TARGET_SETUP_INCOMING_VARARGS
252#define TARGET_SETUP_INCOMING_VARARGS mmix_setup_incoming_varargs
b981d932 253#undef TARGET_PASS_BY_REFERENCE
254#define TARGET_PASS_BY_REFERENCE mmix_pass_by_reference
13f08ee7 255#undef TARGET_CALLEE_COPIES
256#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true
9e4a734a 257
27925877 258#undef TARGET_PREFERRED_RELOAD_CLASS
259#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class
260#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
f7b18294 261#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class
27925877 262
fd50b071 263#undef TARGET_LEGITIMATE_ADDRESS_P
264#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p
ca316360 265#undef TARGET_LEGITIMATE_CONSTANT_P
266#define TARGET_LEGITIMATE_CONSTANT_P mmix_legitimate_constant_p
fd50b071 267
5a1c68c3 268#undef TARGET_FRAME_POINTER_REQUIRED
269#define TARGET_FRAME_POINTER_REQUIRED mmix_frame_pointer_required
270
604d844a 271#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
272#define TARGET_ASM_TRAMPOLINE_TEMPLATE mmix_asm_trampoline_template
273#undef TARGET_TRAMPOLINE_INIT
274#define TARGET_TRAMPOLINE_INIT mmix_trampoline_init
275
4c834714 276#undef TARGET_OPTION_OVERRIDE
277#define TARGET_OPTION_OVERRIDE mmix_option_override
278
68cbb7e3 279struct gcc_target targetm = TARGET_INITIALIZER;
280
281/* Functions that are expansions for target macros.
282 See Target Macros in `Using and Porting GCC'. */
283
4c834714 284/* TARGET_OPTION_OVERRIDE. */
68cbb7e3 285
4c834714 286static void
287mmix_option_override (void)
68cbb7e3 288{
289 /* Should we err or should we warn? Hmm. At least we must neutralize
290 it. For example the wrong kind of case-tables will be generated with
291 PIC; we use absolute address items for mmixal compatibility. FIXME:
292 They could be relative if we just elide them to after all pertinent
293 labels. */
294 if (flag_pic)
295 {
c3ceba8e 296 warning (0, "-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
68cbb7e3 297 flag_pic = 0;
298 }
68cbb7e3 299}
300
301/* INIT_EXPANDERS. */
302
303void
7585fcd5 304mmix_init_expanders (void)
68cbb7e3 305{
306 init_machine_status = mmix_init_machine_status;
307}
308
309/* Set the per-function data. */
310
1f3233d1 311static struct machine_function *
7585fcd5 312mmix_init_machine_status (void)
68cbb7e3 313{
25a27413 314 return ggc_cleared_alloc<machine_function> ();
68cbb7e3 315}
316
a16734cd 317/* DATA_ABI_ALIGNMENT.
68cbb7e3 318 We have trouble getting the address of stuff that is located at other
319 than 32-bit alignments (GETA requirements), so try to give everything
1d60d981 320 at least 32-bit alignment. */
68cbb7e3 321
322int
7585fcd5 323mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 324{
325 if (basic_align < 32)
326 return 32;
327
328 return basic_align;
329}
330
331/* CONSTANT_ALIGNMENT. */
332
333int
7585fcd5 334mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 335{
336 if (basic_align < 32)
337 return 32;
338
339 return basic_align;
340}
341
342/* LOCAL_ALIGNMENT. */
343
c0dae7df 344unsigned
345mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
68cbb7e3 346{
347 if (basic_align < 32)
348 return 32;
349
350 return basic_align;
351}
352
b2d7ede1 353/* TARGET_CONDITIONAL_REGISTER_USAGE. */
68cbb7e3 354
b2d7ede1 355static void
7585fcd5 356mmix_conditional_register_usage (void)
68cbb7e3 357{
358 int i;
359
360 if (TARGET_ABI_GNU)
361 {
362 static const int gnu_abi_reg_alloc_order[]
363 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
364
365 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
366 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
367
368 /* Change the default from the mmixware ABI. For the GNU ABI,
369 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 370 call-clobbered local register for the "hole" that holds the
371 number of saved local registers saved by PUSHJ/PUSHGO during the
372 function call, receiving the return value at return. So best is
373 to use the highest, $31. It's already marked call-clobbered for
374 the mmixware ABI. */
68cbb7e3 375 for (i = 15; i <= 30; i++)
376 call_used_regs[i] = 0;
f0b228a5 377
378 /* "Unfix" the parameter registers. */
379 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
380 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
381 i++)
382 fixed_regs[i] = 0;
68cbb7e3 383 }
384
385 /* Step over the ":" in special register names. */
386 if (! TARGET_TOPLEVEL_SYMBOLS)
387 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
388 if (reg_names[i][0] == ':')
389 reg_names[i]++;
390}
391
6d1f3d31 392/* INCOMING_REGNO and OUTGOING_REGNO worker function.
393 Those two macros must only be applied to function argument
4d19e7b3 394 registers and the function return value register for the opposite
395 use. FIXME: for their current use in gcc, it'd be better with an
396 explicit specific additional FUNCTION_INCOMING_ARG_REGNO_P a'la
397 TARGET_FUNCTION_ARG / TARGET_FUNCTION_INCOMING_ARG instead of
5d246ebf 398 forcing the target to commit to a fixed mapping and for any
4d19e7b3 399 unspecified register use. Particularly when thinking about the
400 return-value, it is better to imagine INCOMING_REGNO and
401 OUTGOING_REGNO as named CALLEE_TO_CALLER_REGNO and INNER_REGNO as
402 named CALLER_TO_CALLEE_REGNO because the direction. The "incoming"
403 and "outgoing" is from the perspective of the parameter-registers,
404 but the same macro is (must be, lacking an alternative like
405 suggested above) used to map the return-value-register from the
406 same perspective. To make directions even more confusing, the macro
407 MMIX_OUTGOING_RETURN_VALUE_REGNUM holds the number of the register
408 in which to return a value, i.e. INCOMING_REGNO for the return-value-
409 register as received from a called function; the return-value on the
410 way out. */
6d1f3d31 411
412int
413mmix_opposite_regno (int regno, int incoming)
414{
4d19e7b3 415 if (incoming && regno == MMIX_OUTGOING_RETURN_VALUE_REGNUM)
416 return MMIX_RETURN_VALUE_REGNUM;
417
418 if (!incoming && regno == MMIX_RETURN_VALUE_REGNUM)
419 return MMIX_OUTGOING_RETURN_VALUE_REGNUM;
420
6d1f3d31 421 if (!mmix_function_arg_regno_p (regno, incoming))
422 return regno;
423
424 return
425 regno - (incoming
426 ? MMIX_FIRST_INCOMING_ARG_REGNUM - MMIX_FIRST_ARG_REGNUM
427 : MMIX_FIRST_ARG_REGNUM - MMIX_FIRST_INCOMING_ARG_REGNUM);
428}
429
d3310704 430/* LOCAL_REGNO.
431 All registers that are part of the register stack and that will be
432 saved are local. */
433
434int
7585fcd5 435mmix_local_regno (int regno)
d3310704 436{
437 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
438}
439
27925877 440/* TARGET_PREFERRED_RELOAD_CLASS.
68cbb7e3 441 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
442
27925877 443static reg_class_t
444mmix_preferred_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 445{
446 /* FIXME: Revisit. */
447 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 448 ? REMAINDER_REG : rclass;
68cbb7e3 449}
450
27925877 451/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.
68cbb7e3 452 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
453
27925877 454static reg_class_t
455mmix_preferred_output_reload_class (rtx x, reg_class_t rclass)
68cbb7e3 456{
457 /* FIXME: Revisit. */
458 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
8deb3959 459 ? REMAINDER_REG : rclass;
68cbb7e3 460}
461
462/* SECONDARY_RELOAD_CLASS.
463 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
464
465enum reg_class
8deb3959 466mmix_secondary_reload_class (enum reg_class rclass,
3754d046 467 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 468 rtx x ATTRIBUTE_UNUSED,
469 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 470{
8deb3959 471 if (rclass == REMAINDER_REG
472 || rclass == HIMULT_REG
473 || rclass == SYSTEM_REGS)
68cbb7e3 474 return GENERAL_REGS;
475
68cbb7e3 476 return NO_REGS;
477}
478
68cbb7e3 479/* DYNAMIC_CHAIN_ADDRESS. */
480
481rtx
7585fcd5 482mmix_dynamic_chain_address (rtx frame)
68cbb7e3 483{
484 /* FIXME: the frame-pointer is stored at offset -8 from the current
485 frame-pointer. Unfortunately, the caller assumes that a
486 frame-pointer is present for *all* previous frames. There should be
487 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
29c05e22 488 return plus_constant (Pmode, frame, -8);
68cbb7e3 489}
490
491/* STARTING_FRAME_OFFSET. */
492
493int
7585fcd5 494mmix_starting_frame_offset (void)
68cbb7e3 495{
496 /* The old frame pointer is in the slot below the new one, so
497 FIRST_PARM_OFFSET does not need to depend on whether the
498 frame-pointer is needed or not. We have to adjust for the register
499 stack pointer being located below the saved frame pointer.
500 Similarly, we store the return address on the stack too, for
501 exception handling, and always if we save the register stack pointer. */
502 return
503 (-8
504 + (MMIX_CFUN_HAS_LANDING_PAD
505 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
506}
507
508/* RETURN_ADDR_RTX. */
509
510rtx
7585fcd5 511mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 512{
513 return count == 0
514 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 515 /* FIXME: Set frame_alias_set on the following. (Why?)
516 See mmix_initial_elimination_offset for the reason we can't use
517 get_hard_reg_initial_val for both. Always using a stack slot
518 and not a register would be suboptimal. */
29c05e22 519 ? validize_mem (gen_rtx_MEM (Pmode,
520 plus_constant (Pmode,
521 frame_pointer_rtx, -16)))
68cbb7e3 522 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
523 : NULL_RTX;
524}
525
526/* SETUP_FRAME_ADDRESSES. */
527
528void
7585fcd5 529mmix_setup_frame_addresses (void)
68cbb7e3 530{
531 /* Nothing needed at the moment. */
532}
533
534/* The difference between the (imaginary) frame pointer and the stack
535 pointer. Used to eliminate the frame pointer. */
536
537int
7585fcd5 538mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 539{
540 int regno;
541 int fp_sp_offset
abe32cce 542 = (get_frame_size () + crtl->outgoing_args_size + 7) & ~7;
68cbb7e3 543
af08e904 544 /* There is no actual offset between these two virtual values, but for
545 the frame-pointer, we have the old one in the stack position below
546 it, so the offset for the frame-pointer to the stack-pointer is one
547 octabyte larger. */
68cbb7e3 548 if (fromreg == MMIX_ARG_POINTER_REGNUM
549 && toreg == MMIX_FRAME_POINTER_REGNUM)
550 return 0;
551
552 /* The difference is the size of local variables plus the size of
553 outgoing function arguments that would normally be passed as
554 registers but must be passed on stack because we're out of
555 function-argument registers. Only global saved registers are
556 counted; the others go on the register stack.
557
558 The frame-pointer is counted too if it is what is eliminated, as we
559 need to balance the offset for it from STARTING_FRAME_OFFSET.
560
561 Also add in the slot for the register stack pointer we save if we
562 have a landing pad.
563
564 Unfortunately, we can't access $0..$14, from unwinder code easily, so
565 store the return address in a frame slot too. FIXME: Only for
566 non-leaf functions. FIXME: Always with a landing pad, because it's
567 hard to know whether we need the other at the time we know we need
568 the offset for one (and have to state it). It's a kludge until we
569 can express the register stack in the EH frame info.
570
571 We have to do alignment here; get_frame_size will not return a
572 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
573
574 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
575 regno <= 255;
576 regno++)
3072d30e 577 if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno])
68cbb7e3 578 || IS_MMIX_EH_RETURN_DATA_REG (regno))
579 fp_sp_offset += 8;
580
581 return fp_sp_offset
582 + (MMIX_CFUN_HAS_LANDING_PAD
583 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
584 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
585}
586
5d246ebf 587static void
3754d046 588mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode,
5d246ebf 589 const_tree type, bool named ATTRIBUTE_UNUSED)
590{
39cba157 591 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
5d246ebf 592 int arg_size = MMIX_FUNCTION_ARG_SIZE (mode, type);
593
594 argsp->regs = ((targetm.calls.must_pass_in_stack (mode, type)
595 || (arg_size > 8
596 && !TARGET_LIBFUNC
597 && !argsp->lib))
598 ? (MMIX_MAX_ARGS_IN_REGS) + 1
599 : argsp->regs + (7 + arg_size) / 8);
600}
68cbb7e3 601
5d246ebf 602/* Helper function for mmix_function_arg and mmix_function_incoming_arg. */
603
604static rtx
39cba157 605mmix_function_arg_1 (const cumulative_args_t argsp_v,
3754d046 606 machine_mode mode,
5d246ebf 607 const_tree type,
608 bool named ATTRIBUTE_UNUSED,
609 bool incoming)
68cbb7e3 610{
39cba157 611 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
612
68cbb7e3 613 /* Last-argument marker. */
614 if (type == void_type_node)
615 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
616 ? gen_rtx_REG (mode,
617 (incoming
618 ? MMIX_FIRST_INCOMING_ARG_REGNUM
619 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
620 : NULL_RTX;
621
622 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
0336f0f0 623 && !targetm.calls.must_pass_in_stack (mode, type)
68cbb7e3 624 && (GET_MODE_BITSIZE (mode) <= 64
625 || argsp->lib
626 || TARGET_LIBFUNC))
627 ? gen_rtx_REG (mode,
628 (incoming
629 ? MMIX_FIRST_INCOMING_ARG_REGNUM
630 : MMIX_FIRST_ARG_REGNUM)
631 + argsp->regs)
632 : NULL_RTX;
633}
634
5d246ebf 635/* Return an rtx for a function argument to go in a register, and 0 for
636 one that must go on stack. */
637
638static rtx
39cba157 639mmix_function_arg (cumulative_args_t argsp,
3754d046 640 machine_mode mode,
5d246ebf 641 const_tree type,
642 bool named)
643{
644 return mmix_function_arg_1 (argsp, mode, type, named, false);
645}
646
647static rtx
39cba157 648mmix_function_incoming_arg (cumulative_args_t argsp,
3754d046 649 machine_mode mode,
5d246ebf 650 const_tree type,
651 bool named)
652{
653 return mmix_function_arg_1 (argsp, mode, type, named, true);
654}
655
68cbb7e3 656/* Returns nonzero for everything that goes by reference, 0 for
657 everything that goes by value. */
658
b981d932 659static bool
3754d046 660mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode,
fb80456a 661 const_tree type, bool named ATTRIBUTE_UNUSED)
68cbb7e3 662{
39cba157 663 CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v);
664
0336f0f0 665 /* FIXME: Check: I'm not sure the must_pass_in_stack check is
68cbb7e3 666 necessary. */
bef380a4 667 if (targetm.calls.must_pass_in_stack (mode, type))
668 return true;
669
670 if (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
671 && !TARGET_LIBFUNC
672 && (!argsp || !argsp->lib))
673 return true;
674
675 return false;
68cbb7e3 676}
677
678/* Return nonzero if regno is a register number where a parameter is
679 passed, and 0 otherwise. */
680
681int
7585fcd5 682mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 683{
684 int first_arg_regnum
685 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
686
687 return regno >= first_arg_regnum
688 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
689}
690
b600778c 691/* Implements TARGET_FUNCTION_VALUE. */
68cbb7e3 692
b600778c 693static rtx
694mmix_function_value (const_tree valtype,
695 const_tree func ATTRIBUTE_UNUSED,
696 bool outgoing)
68cbb7e3 697{
3754d046 698 machine_mode mode = TYPE_MODE (valtype);
699 machine_mode cmode;
68cbb7e3 700 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
701 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
702 int i;
703 int nregs;
704
b600778c 705 if (!outgoing)
706 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
707
68cbb7e3 708 /* Return values that fit in a register need no special handling.
709 There's no register hole when parameters are passed in global
710 registers. */
711 if (TARGET_ABI_GNU
712 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
713 return
714 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
715
fb89a8c9 716 if (COMPLEX_MODE_P (mode))
717 /* A complex type, made up of components. */
718 cmode = TYPE_MODE (TREE_TYPE (valtype));
719 else
720 {
721 /* Of the other larger-than-register modes, we only support
722 scalar mode TImode. (At least, that's the only one that's
723 been rudimentally tested.) Make sure we're alerted for
724 unexpected cases. */
725 if (mode != TImode)
726 sorry ("support for mode %qs", GET_MODE_NAME (mode));
727
728 /* In any case, we will fill registers to the natural size. */
729 cmode = DImode;
730 }
731
68cbb7e3 732 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
733
734 /* We need to take care of the effect of the register hole on return
735 values of large sizes; the last register will appear as the first
736 register, with the rest shifted. (For complex modes, this is just
737 swapped registers.) */
738
739 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 740 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 741 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
742
743 /* FIXME: Maybe we should handle structure values like this too
744 (adjusted for BLKmode), perhaps for both ABI:s. */
745 for (i = 0; i < nregs - 1; i++)
746 vec[i]
747 = gen_rtx_EXPR_LIST (VOIDmode,
748 gen_rtx_REG (cmode, first_val_regnum + i),
749 GEN_INT ((i + 1) * BITS_PER_UNIT));
750
751 vec[nregs - 1]
752 = gen_rtx_EXPR_LIST (VOIDmode,
753 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
bcd9bd66 754 const0_rtx);
68cbb7e3 755
2bdda7ee 756 return gen_rtx_PARALLEL (mode, gen_rtvec_v (nregs, vec));
68cbb7e3 757}
758
b600778c 759/* Implements TARGET_LIBCALL_VALUE. */
c715d549 760
b600778c 761static rtx
3754d046 762mmix_libcall_value (machine_mode mode,
b600778c 763 const_rtx fun ATTRIBUTE_UNUSED)
764{
765 return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM);
766}
767
768/* Implements TARGET_FUNCTION_VALUE_REGNO_P. */
769
770static bool
771mmix_function_value_regno_p (const unsigned int regno)
c715d549 772{
773 return regno == MMIX_RETURN_VALUE_REGNUM;
774}
775
68cbb7e3 776/* EH_RETURN_DATA_REGNO. */
777
778int
7585fcd5 779mmix_eh_return_data_regno (int n)
68cbb7e3 780{
781 if (n >= 0 && n < 4)
782 return MMIX_EH_RETURN_DATA_REGNO_START + n;
783
784 return INVALID_REGNUM;
785}
786
787/* EH_RETURN_STACKADJ_RTX. */
788
789rtx
7585fcd5 790mmix_eh_return_stackadj_rtx (void)
68cbb7e3 791{
792 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
793}
794
795/* EH_RETURN_HANDLER_RTX. */
796
797rtx
7585fcd5 798mmix_eh_return_handler_rtx (void)
68cbb7e3 799{
7585fcd5 800 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 801}
802
803/* ASM_PREFERRED_EH_DATA_FORMAT. */
804
805int
7585fcd5 806mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
807 int global ATTRIBUTE_UNUSED)
68cbb7e3 808{
809 /* This is the default (was at 2001-07-20). Revisit when needed. */
810 return DW_EH_PE_absptr;
811}
812
28c2d844 813/* Make a note that we've seen the beginning of the prologue. This
d3310704 814 matters to whether we'll translate register numbers as calculated by
2efea8c0 815 mmix_reorg. */
68cbb7e3 816
d3310704 817static void
7585fcd5 818mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
819 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 820{
d3310704 821 cfun->machine->in_prologue = 1;
822}
68cbb7e3 823
d3310704 824/* Make a note that we've seen the end of the prologue. */
68cbb7e3 825
d3310704 826static void
7585fcd5 827mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 828{
829 cfun->machine->in_prologue = 0;
d68ffc6f 830}
831
2efea8c0 832/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
833 done here; just virtually by calculating the highest saved stack
834 register number used to modify the register numbers at output time. */
d68ffc6f 835
2efea8c0 836static void
7585fcd5 837mmix_reorg (void)
d68ffc6f 838{
839 int regno;
68cbb7e3 840
841 /* We put the number of the highest saved register-file register in a
842 location convenient for the call-patterns to output. Note that we
843 don't tell dwarf2 about these registers, since it can't restore them
844 anyway. */
d68ffc6f 845 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 846 regno >= 0;
847 regno--)
3072d30e 848 if ((df_regs_ever_live_p (regno) && !call_used_regs[regno])
68cbb7e3 849 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
850 break;
851
d68ffc6f 852 /* Regardless of whether they're saved (they might be just read), we
853 mustn't include registers that carry parameters. We could scan the
854 insns to see whether they're actually used (and indeed do other less
855 trivial register usage analysis and transformations), but it seems
856 wasteful to optimize for unused parameter registers. As of
3072d30e 857 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but
d68ffc6f 858 that might change. */
abe32cce 859 if (!TARGET_ABI_GNU && regno < crtl->args.info.regs - 1)
d68ffc6f 860 {
abe32cce 861 regno = crtl->args.info.regs - 1;
d68ffc6f 862
863 /* We don't want to let this cause us to go over the limit and make
864 incoming parameter registers be misnumbered and treating the last
865 parameter register and incoming return value register call-saved.
866 Stop things at the unmodified scheme. */
867 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
868 regno = MMIX_RETURN_VALUE_REGNUM - 1;
869 }
870
871 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 872}
873
874/* TARGET_ASM_FUNCTION_EPILOGUE. */
875
4448bfa5 876static void
7585fcd5 877mmix_target_asm_function_epilogue (FILE *stream,
878 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 879{
d3310704 880 /* Emit an \n for readability of the generated assembly. */
881 fputc ('\n', stream);
882}
68cbb7e3 883
e7f5e241 884/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 885
6988553d 886static void
7585fcd5 887mmix_asm_output_mi_thunk (FILE *stream,
888 tree fndecl ATTRIBUTE_UNUSED,
889 HOST_WIDE_INT delta,
890 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
891 tree func)
d3310704 892{
6644435d 893 /* If you define TARGET_STRUCT_VALUE_RTX that returns 0 (i.e. pass
894 location of structure to return as invisible first argument), you
895 need to tweak this code too. */
d3310704 896 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 897
d3310704 898 if (delta >= 0 && delta < 65536)
e7f5e241 899 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 900 else if (delta < 0 && delta >= -255)
e7f5e241 901 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 902 else
0b123c47 903 {
d3310704 904 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 905 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 906 }
907
d3310704 908 fprintf (stream, "\tJMP ");
909 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
910 fprintf (stream, "\n");
911}
68cbb7e3 912
d3310704 913/* FUNCTION_PROFILER. */
68cbb7e3 914
d3310704 915void
7585fcd5 916mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
917 int labelno ATTRIBUTE_UNUSED)
d3310704 918{
919 sorry ("function_profiler support for MMIX");
920}
68cbb7e3 921
9e4a734a 922/* Worker function for TARGET_SETUP_INCOMING_VARARGS. For the moment,
923 let's stick to pushing argument registers on the stack. Later, we
924 can parse all arguments in registers, to improve performance. */
68cbb7e3 925
9e4a734a 926static void
39cba157 927mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v,
3754d046 928 machine_mode mode,
7585fcd5 929 tree vartype,
930 int *pretend_sizep,
931 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 932{
39cba157 933 CUMULATIVE_ARGS *args_so_farp = get_cumulative_args (args_so_farp_v);
934
7ccc713a 935 /* The last named variable has been handled, but
936 args_so_farp has not been advanced for it. */
937 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
938 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 939
940 /* We assume that one argument takes up one register here. That should
5aedf60c 941 be true until we start messing with multi-reg parameters. */
68cbb7e3 942 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
943 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
944}
945
604d844a 946/* TARGET_ASM_TRAMPOLINE_TEMPLATE. */
68cbb7e3 947
604d844a 948static void
949mmix_asm_trampoline_template (FILE *stream)
68cbb7e3 950{
af08e904 951 /* Read a value into the static-chain register and jump somewhere. The
952 static chain is stored at offset 16, and the function address is
953 stored at offset 24. */
604d844a 954
68cbb7e3 955 fprintf (stream, "\tGETA $255,1F\n\t");
604d844a 956 fprintf (stream, "LDOU %s,$255,0\n\t", reg_names[MMIX_STATIC_CHAIN_REGNUM]);
68cbb7e3 957 fprintf (stream, "LDOU $255,$255,8\n\t");
958 fprintf (stream, "GO $255,$255,0\n");
959 fprintf (stream, "1H\tOCTA 0\n\t");
960 fprintf (stream, "OCTA 0\n");
961}
962
604d844a 963/* TARGET_TRAMPOLINE_INIT. */
68cbb7e3 964/* Set the static chain and function pointer field in the trampoline.
965 We also SYNCID here to be sure (doesn't matter in the simulator, but
966 some day it will). */
967
604d844a 968static void
969mmix_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain)
970{
971 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
972 rtx mem;
973
974 emit_block_move (m_tramp, assemble_trampoline_template (),
975 GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
976
977 mem = adjust_address (m_tramp, DImode, 2*UNITS_PER_WORD);
978 emit_move_insn (mem, static_chain);
979 mem = adjust_address (m_tramp, DImode, 3*UNITS_PER_WORD);
980 emit_move_insn (mem, fnaddr);
981
982 mem = adjust_address (m_tramp, DImode, 0);
983 emit_insn (gen_sync_icache (mem, GEN_INT (TRAMPOLINE_SIZE - 1)));
68cbb7e3 984}
985
986/* We must exclude constant addresses that have an increment that is not a
987 multiple of four bytes because of restrictions of the GETA
f0b228a5 988 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 989
990int
7585fcd5 991mmix_constant_address_p (rtx x)
68cbb7e3 992{
993 RTX_CODE code = GET_CODE (x);
994 int addend = 0;
f0b228a5 995 /* When using "base addresses", anything constant goes. */
996 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 997
68cbb7e3 998 switch (code)
999 {
1000 case LABEL_REF:
1001 case SYMBOL_REF:
1002 return 1;
1003
68cbb7e3 1004 case HIGH:
f0b228a5 1005 /* FIXME: Don't know how to dissect these. Avoid them for now,
1006 except we know they're constants. */
1007 return constant_ok;
68cbb7e3 1008
1009 case CONST_INT:
1010 addend = INTVAL (x);
1011 break;
1012
1013 case CONST_DOUBLE:
1014 if (GET_MODE (x) != VOIDmode)
1015 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1016 return constant_ok;
68cbb7e3 1017 addend = CONST_DOUBLE_LOW (x);
1018 break;
1019
1020 case CONST:
1021 /* Note that expressions with arithmetic on forward references don't
1022 work in mmixal. People using gcc assembly code with mmixal might
1023 need to move arrays and such to before the point of use. */
1024 if (GET_CODE (XEXP (x, 0)) == PLUS)
1025 {
1026 rtx x0 = XEXP (XEXP (x, 0), 0);
1027 rtx x1 = XEXP (XEXP (x, 0), 1);
1028
1029 if ((GET_CODE (x0) == SYMBOL_REF
1030 || GET_CODE (x0) == LABEL_REF)
1031 && (GET_CODE (x1) == CONST_INT
1032 || (GET_CODE (x1) == CONST_DOUBLE
1033 && GET_MODE (x1) == VOIDmode)))
1034 addend = mmix_intval (x1);
1035 else
f0b228a5 1036 return constant_ok;
68cbb7e3 1037 }
1038 else
f0b228a5 1039 return constant_ok;
68cbb7e3 1040 break;
1041
1042 default:
1043 return 0;
1044 }
1045
f0b228a5 1046 return constant_ok || (addend & 3) == 0;
68cbb7e3 1047}
1048
fd50b071 1049/* Return 1 if the address is OK, otherwise 0. */
68cbb7e3 1050
fd50b071 1051bool
3754d046 1052mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED,
fd50b071 1053 rtx x,
1054 bool strict_checking)
68cbb7e3 1055{
1056#define MMIX_REG_OK(X) \
1057 ((strict_checking \
1058 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1059 || (reg_renumber[REGNO (X)] > 0 \
1060 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1061 || (!strict_checking \
1062 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1063 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1064 || REGNO (X) == ARG_POINTER_REGNUM)))
1065
1066 /* We only accept:
1067 (mem reg)
1068 (mem (plus reg reg))
f0b228a5 1069 (mem (plus reg 0..255)).
1070 unless TARGET_BASE_ADDRESSES, in which case we accept all
1071 (mem constant_address) too. */
68cbb7e3 1072
1073
1074 /* (mem reg) */
1075 if (REG_P (x) && MMIX_REG_OK (x))
1076 return 1;
1077
1078 if (GET_CODE(x) == PLUS)
1079 {
1080 rtx x1 = XEXP (x, 0);
1081 rtx x2 = XEXP (x, 1);
1082
1083 /* Try swapping the order. FIXME: Do we need this? */
1084 if (! REG_P (x1))
1085 {
1086 rtx tem = x1;
1087 x1 = x2;
1088 x2 = tem;
1089 }
1090
f0b228a5 1091 /* (mem (plus (reg?) (?))) */
68cbb7e3 1092 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1093 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1094
f0b228a5 1095 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1096 if (REG_P (x2) && MMIX_REG_OK (x2))
1097 return 1;
1098
f0b228a5 1099 /* (mem (plus (reg) (0..255?))) */
f105c84e 1100 if (satisfies_constraint_I (x2))
68cbb7e3 1101 return 1;
f0b228a5 1102
1103 return 0;
68cbb7e3 1104 }
1105
f0b228a5 1106 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1107}
1108
ca316360 1109/* Implement TARGET_LEGITIMATE_CONSTANT_P. */
68cbb7e3 1110
ca316360 1111static bool
3754d046 1112mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
68cbb7e3 1113{
1114 RTX_CODE code = GET_CODE (x);
1115
1116 /* We must allow any number due to the way the cse passes works; if we
1117 do not allow any number here, general_operand will fail, and insns
1118 will fatally fail recognition instead of "softly". */
1119 if (code == CONST_INT || code == CONST_DOUBLE)
1120 return 1;
1121
1122 return CONSTANT_ADDRESS_P (x);
1123}
1124
1125/* SELECT_CC_MODE. */
1126
3754d046 1127machine_mode
7585fcd5 1128mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1129{
1130 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1131 output different compare insns. Note that we do not check the
1132 validity of the comparison here. */
1133
1134 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1135 {
1136 if (op == ORDERED || op == UNORDERED || op == UNGE
1137 || op == UNGT || op == UNLE || op == UNLT)
1138 return CC_FUNmode;
1139
1140 if (op == EQ || op == NE)
1141 return CC_FPEQmode;
1142
1143 return CC_FPmode;
1144 }
1145
1146 if (op == GTU || op == LTU || op == GEU || op == LEU)
1147 return CC_UNSmode;
1148
1149 return CCmode;
1150}
1151
68cbb7e3 1152/* REVERSIBLE_CC_MODE. */
1153
1154int
3754d046 1155mmix_reversible_cc_mode (machine_mode mode)
68cbb7e3 1156{
1157 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1158 compares. */
68cbb7e3 1159 return mode != CC_FPmode;
1160}
1161
fab7adbf 1162/* TARGET_RTX_COSTS. */
68cbb7e3 1163
fab7adbf 1164static bool
7585fcd5 1165mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
5ae4887d 1166 machine_mode mode ATTRIBUTE_UNUSED,
7585fcd5 1167 int outer_code ATTRIBUTE_UNUSED,
20d892d1 1168 int opno ATTRIBUTE_UNUSED,
f529eb25 1169 int *total ATTRIBUTE_UNUSED,
1170 bool speed ATTRIBUTE_UNUSED)
68cbb7e3 1171{
1172 /* For the time being, this is just a stub and we'll accept the
1173 generic calculations, until we can do measurements, at least.
1174 Say we did not modify any calculated costs. */
fab7adbf 1175 return false;
68cbb7e3 1176}
1177
f7e13ca6 1178/* TARGET_REGISTER_MOVE_COST.
68cbb7e3 1179
f7e13ca6 1180 The special registers can only move to and from general regs, and we
1181 need to check that their constraints match, so say 3 for them. */
1182
1183static int
3754d046 1184mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
f7e13ca6 1185 reg_class_t from,
1186 reg_class_t to)
68cbb7e3 1187{
1188 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1189}
1190
1191/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1192 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1193 the target. */
1194
1195/* DATA_SECTION_ASM_OP. */
1196
1197const char *
7585fcd5 1198mmix_data_section_asm_op (void)
68cbb7e3 1199{
1200 return "\t.data ! mmixal:= 8H LOC 9B";
1201}
1202
7811991d 1203static void
7585fcd5 1204mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1205{
1206 /* Test for an external declaration, and do nothing if it is one. */
1207 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1208 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1209 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1210 ;
ae484cc8 1211 else if (first && DECL_P (decl))
68cbb7e3 1212 {
1213 /* For non-visible declarations, add a "@" prefix, which we skip
1214 when the label is output. If the label does not have this
f0b228a5 1215 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1216
1217 Note that this does not work for data that is declared extern and
1218 later defined as static. If there's code in between, that code
f0b228a5 1219 will refer to the extern declaration, and vice versa. This just
1220 means that when -mtoplevel-symbols is in use, we can just handle
1221 well-behaved ISO-compliant code. */
68cbb7e3 1222
2c129d70 1223 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1224 int len = strlen (str);
225ab426 1225 char *newstr = XALLOCAVEC (char, len + 2);
b948ae2f 1226 newstr[0] = '@';
68cbb7e3 1227 strcpy (newstr + 1, str);
b948ae2f 1228 XSTR (XEXP (rtl, 0), 0) = ggc_alloc_string (newstr, len + 1);
68cbb7e3 1229 }
1230
f0b228a5 1231 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1232 may need different options to reach for different things with GETA.
1233 For now, functions and things we know or have been told are constant. */
1234 if (TREE_CODE (decl) == FUNCTION_DECL
1235 || TREE_CONSTANT (decl)
1236 || (TREE_CODE (decl) == VAR_DECL
1237 && TREE_READONLY (decl)
1238 && !TREE_SIDE_EFFECTS (decl)
1239 && (!DECL_INITIAL (decl)
1240 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1241 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1242}
1243
7b4a38a6 1244static const char *
7585fcd5 1245mmix_strip_name_encoding (const char *name)
68cbb7e3 1246{
1247 for (; (*name == '@' || *name == '*'); name++)
1248 ;
1249
1250 return name;
1251}
1252
92c473b8 1253/* TARGET_ASM_FILE_START.
1254 We just emit a little comment for the time being. */
68cbb7e3 1255
92c473b8 1256static void
7585fcd5 1257mmix_file_start (void)
68cbb7e3 1258{
92c473b8 1259 default_file_start ();
68cbb7e3 1260
92c473b8 1261 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1262
1d60d981 1263 /* Make sure each file starts with the text section. */
2f14b1f9 1264 switch_to_section (text_section);
68cbb7e3 1265}
1266
f6940372 1267/* TARGET_ASM_FILE_END. */
68cbb7e3 1268
f6940372 1269static void
7585fcd5 1270mmix_file_end (void)
68cbb7e3 1271{
1d60d981 1272 /* Make sure each file ends with the data section. */
2f14b1f9 1273 switch_to_section (data_section);
68cbb7e3 1274}
1275
40fe393f 1276/* TARGET_ASM_OUTPUT_SOURCE_FILENAME. */
68cbb7e3 1277
40fe393f 1278static void
7585fcd5 1279mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1280{
1281 fprintf (stream, "# 1 ");
1282 OUTPUT_QUOTED_STRING (stream, name);
1283 fprintf (stream, "\n");
1284}
1285
1286/* OUTPUT_QUOTED_STRING. */
1287
1288void
7585fcd5 1289mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1290{
1291 const char * string_end = string + length;
25037517 1292 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1293
1294 /* Output "any character except newline and double quote character". We
1295 play it safe and avoid all control characters too. We also do not
1296 want [] as characters, should input be passed through m4 with [] as
1297 quotes. Further, we avoid "\", because the GAS port handles it as a
1298 quoting character. */
1299 while (string < string_end)
1300 {
1301 if (*string
1302 && (unsigned char) *string < 128
1303 && !ISCNTRL (*string)
1304 && strchr (unwanted_chars, *string) == NULL)
1305 {
1306 fputc ('"', stream);
1307 while (*string
1308 && (unsigned char) *string < 128
1309 && !ISCNTRL (*string)
1310 && strchr (unwanted_chars, *string) == NULL
1311 && string < string_end)
1312 {
1313 fputc (*string, stream);
1314 string++;
1315 }
1316 fputc ('"', stream);
1317 if (string < string_end)
1318 fprintf (stream, ",");
1319 }
1320 if (string < string_end)
1321 {
1322 fprintf (stream, "#%x", *string & 255);
1323 string++;
1324 if (string < string_end)
1325 fprintf (stream, ",");
1326 }
1327 }
1328}
1329
58356836 1330/* Target hook for assembling integer objects. Use mmix_print_operand
1331 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1332 CONST_DOUBLEs. */
68cbb7e3 1333
58356836 1334static bool
7585fcd5 1335mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1336{
58356836 1337 if (aligned_p)
1338 switch (size)
1339 {
4f4e478d 1340 /* We handle a limited number of types of operands in here. But
1341 that's ok, because we can punt to generic functions. We then
5c3d1711 1342 pretend that aligned data isn't needed, so the usual .<pseudo>
1343 syntax is used (which works for aligned data too). We actually
1344 *must* do that, since we say we don't have simple aligned
1345 pseudos, causing this function to be called. We just try and
1346 keep as much compatibility as possible with mmixal syntax for
1347 normal cases (i.e. without GNU extensions and C only). */
58356836 1348 case 1:
4f4e478d 1349 if (GET_CODE (x) != CONST_INT)
1350 {
1351 aligned_p = 0;
1352 break;
1353 }
58356836 1354 fputs ("\tBYTE\t", asm_out_file);
1355 mmix_print_operand (asm_out_file, x, 'B');
1356 fputc ('\n', asm_out_file);
1357 return true;
1358
1359 case 2:
4f4e478d 1360 if (GET_CODE (x) != CONST_INT)
1361 {
1362 aligned_p = 0;
1363 break;
1364 }
58356836 1365 fputs ("\tWYDE\t", asm_out_file);
1366 mmix_print_operand (asm_out_file, x, 'W');
1367 fputc ('\n', asm_out_file);
1368 return true;
1369
1370 case 4:
60bb373d 1371 if (GET_CODE (x) != CONST_INT)
4f4e478d 1372 {
1373 aligned_p = 0;
1374 break;
1375 }
58356836 1376 fputs ("\tTETRA\t", asm_out_file);
1377 mmix_print_operand (asm_out_file, x, 'L');
1378 fputc ('\n', asm_out_file);
1379 return true;
1380
1381 case 8:
7f81c162 1382 /* We don't get here anymore for CONST_DOUBLE, because DImode
1383 isn't expressed as CONST_DOUBLE, and DFmode is handled
1384 elsewhere. */
1385 gcc_assert (GET_CODE (x) != CONST_DOUBLE);
4f4e478d 1386 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1387 return true;
1388 }
1389 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1390}
1391
1392/* ASM_OUTPUT_ASCII. */
1393
1394void
7585fcd5 1395mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1396{
1397 while (length > 0)
1398 {
1399 int chunk_size = length > 60 ? 60 : length;
1400 fprintf (stream, "\tBYTE ");
1401 mmix_output_quoted_string (stream, string, chunk_size);
1402 string += chunk_size;
1403 length -= chunk_size;
1404 fprintf (stream, "\n");
1405 }
1406}
1407
1408/* ASM_OUTPUT_ALIGNED_COMMON. */
1409
1410void
7585fcd5 1411mmix_asm_output_aligned_common (FILE *stream,
1412 const char *name,
1413 int size,
1414 int align)
68cbb7e3 1415{
1416 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1417 express this in a mmixal-compatible way. */
1418 fprintf (stream, "\t.comm\t");
1419 assemble_name (stream, name);
1420 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1421 size, align / BITS_PER_UNIT);
1422}
1423
1424/* ASM_OUTPUT_ALIGNED_LOCAL. */
1425
1426void
7585fcd5 1427mmix_asm_output_aligned_local (FILE *stream,
1428 const char *name,
1429 int size,
1430 int align)
68cbb7e3 1431{
2f14b1f9 1432 switch_to_section (data_section);
68cbb7e3 1433
1434 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1435 assemble_name (stream, name);
1436 fprintf (stream, "\tLOC @+%d\n", size);
1437}
1438
1439/* ASM_OUTPUT_LABEL. */
1440
1441void
7585fcd5 1442mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1443{
1444 assemble_name (stream, name);
1445 fprintf (stream, "\tIS @\n");
1446}
1447
af1c039b 1448/* ASM_OUTPUT_INTERNAL_LABEL. */
1449
1450void
1451mmix_asm_output_internal_label (FILE *stream, const char *name)
1452{
1453 assemble_name_raw (stream, name);
1454 fprintf (stream, "\tIS @\n");
1455}
1456
68cbb7e3 1457/* ASM_DECLARE_REGISTER_GLOBAL. */
1458
1459void
7585fcd5 1460mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1461 tree decl ATTRIBUTE_UNUSED,
1462 int regno ATTRIBUTE_UNUSED,
1463 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1464{
1465 /* Nothing to do here, but there *will* be, therefore the framework is
1466 here. */
1467}
1468
68cbb7e3 1469/* ASM_WEAKEN_LABEL. */
1470
1471void
7585fcd5 1472mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1473 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1474{
7fe1d31c 1475 fprintf (stream, "\t.weak ");
68cbb7e3 1476 assemble_name (stream, name);
7fe1d31c 1477 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1478}
1479
1480/* MAKE_DECL_ONE_ONLY. */
1481
1482void
7585fcd5 1483mmix_make_decl_one_only (tree decl)
68cbb7e3 1484{
1485 DECL_WEAK (decl) = 1;
1486}
1487
1488/* ASM_OUTPUT_LABELREF.
1489 Strip GCC's '*' and our own '@'. No order is assumed. */
1490
1491void
7585fcd5 1492mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1493{
91009d64 1494 int is_extern = 1;
68cbb7e3 1495
1496 for (; (*name == '@' || *name == '*'); name++)
1497 if (*name == '@')
91009d64 1498 is_extern = 0;
68cbb7e3 1499
1500 asm_fprintf (stream, "%s%U%s",
1501 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1502 name);
1503}
1504
68cbb7e3 1505/* ASM_OUTPUT_DEF. */
1506
1507void
7585fcd5 1508mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1509{
1510 assemble_name (stream, name);
1511 fprintf (stream, "\tIS ");
1512 assemble_name (stream, value);
1513 fputc ('\n', stream);
1514}
1515
7a7fb407 1516/* TARGET_PRINT_OPERAND. */
68cbb7e3 1517
7a7fb407 1518static void
7585fcd5 1519mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1520{
1521 /* When we add support for different codes later, we can, when needed,
1522 drop through to the main handler with a modified operand. */
1523 rtx modified_x = x;
d68ffc6f 1524 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1525
1526 switch (code)
1527 {
1528 /* Unrelated codes are in alphabetic order. */
1529
91009d64 1530 case '+':
1531 /* For conditional branches, output "P" for a probable branch. */
1532 if (TARGET_BRANCH_PREDICT)
1533 {
1534 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
9eb946de 1535 if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2)
91009d64 1536 putc ('P', stream);
1537 }
1538 return;
1539
0b123c47 1540 case '.':
1541 /* For the %d in POP %d,0. */
1542 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1543 return;
1544
68cbb7e3 1545 case 'B':
1546 if (GET_CODE (x) != CONST_INT)
1547 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1548 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1549 return;
1550
1551 case 'H':
1552 /* Highpart. Must be general register, and not the last one, as
1553 that one cannot be part of a consecutive register pair. */
d68ffc6f 1554 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1555 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1556
1557 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1558 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1559 return;
1560
1561 case 'L':
1562 /* Lowpart. Must be CONST_INT or general register, and not the last
1563 one, as that one cannot be part of a consecutive register pair. */
1564 if (GET_CODE (x) == CONST_INT)
1565 {
1566 fprintf (stream, "#%lx",
1567 (unsigned long) (INTVAL (x)
1568 & ((unsigned int) 0x7fffffff * 2 + 1)));
1569 return;
1570 }
1571
1572 if (GET_CODE (x) == SYMBOL_REF)
1573 {
1574 output_addr_const (stream, x);
1575 return;
1576 }
1577
d68ffc6f 1578 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1579 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1580
1581 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1582 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1583 return;
1584
1585 /* Can't use 'a' because that's a generic modifier for address
1586 output. */
1587 case 'A':
1588 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
3a4303e7 1589 ~(uint64_t)
68cbb7e3 1590 mmix_intval (x));
1591 return;
1592
1593 case 'i':
1594 mmix_output_shiftvalue_op_from_str (stream, "INC",
3a4303e7 1595 (uint64_t)
68cbb7e3 1596 mmix_intval (x));
1597 return;
1598
1599 case 'o':
1600 mmix_output_shiftvalue_op_from_str (stream, "OR",
3a4303e7 1601 (uint64_t)
68cbb7e3 1602 mmix_intval (x));
1603 return;
1604
1605 case 's':
1606 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 1607 (uint64_t)
68cbb7e3 1608 mmix_intval (x));
1609 return;
1610
1611 case 'd':
1612 case 'D':
1613 mmix_output_condition (stream, x, (code == 'D'));
1614 return;
1615
1616 case 'e':
1617 /* Output an extra "e" to make fcmpe, fune. */
1618 if (TARGET_FCMP_EPSILON)
1619 fprintf (stream, "e");
1620 return;
1621
1622 case 'm':
1623 /* Output the number minus 1. */
1624 if (GET_CODE (x) != CONST_INT)
1625 {
1626 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1627 x);
1628 }
f03df321 1629 fprintf (stream, "%" PRId64,
3a4303e7 1630 (int64_t) (mmix_intval (x) - 1));
68cbb7e3 1631 return;
1632
1633 case 'p':
1634 /* Store the number of registers we want to save. This was setup
1635 by the prologue. The actual operand contains the number of
1636 registers to pass, but we don't use it currently. Anyway, we
1637 need to output the number of saved registers here. */
d68ffc6f 1638 fprintf (stream, "%d",
1639 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1640 return;
1641
1642 case 'r':
1643 /* Store the register to output a constant to. */
1644 if (! REG_P (x))
68435912 1645 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1646 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1647 return;
1648
1649 case 'I':
1650 /* Output the constant. Note that we use this for floats as well. */
1651 if (GET_CODE (x) != CONST_INT
1652 && (GET_CODE (x) != CONST_DOUBLE
1653 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1654 && GET_MODE (x) != SFmode)))
68435912 1655 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1656 mmix_output_register_setting (stream,
1657 mmix_output_destination_register,
1658 mmix_intval (x), 0);
1659 return;
1660
1661 case 'U':
1662 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1663 if (TARGET_ZERO_EXTEND)
1664 putc ('U', stream);
1665 return;
1666
1667 case 'v':
3a4303e7 1668 mmix_output_shifted_value (stream, (int64_t) mmix_intval (x));
68cbb7e3 1669 return;
1670
1671 case 'V':
3a4303e7 1672 mmix_output_shifted_value (stream, (int64_t) ~mmix_intval (x));
68cbb7e3 1673 return;
1674
1675 case 'W':
1676 if (GET_CODE (x) != CONST_INT)
1677 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1678 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1679 return;
1680
1681 case 0:
1682 /* Nothing to do. */
1683 break;
1684
1685 default:
1686 /* Presumably there's a missing case above if we get here. */
1e5fcbe2 1687 internal_error ("MMIX Internal: Missing %qc case in mmix_print_operand", code);
68cbb7e3 1688 }
1689
1690 switch (GET_CODE (modified_x))
1691 {
1692 case REG:
d68ffc6f 1693 regno = REGNO (modified_x);
1694 if (regno >= FIRST_PSEUDO_REGISTER)
1695 internal_error ("MMIX Internal: Bad register: %d", regno);
1696 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1697 return;
1698
1699 case MEM:
3c047fe9 1700 output_address (GET_MODE (modified_x), XEXP (modified_x, 0));
68cbb7e3 1701 return;
1702
1703 case CONST_INT:
1704 /* For -2147483648, mmixal complains that the constant does not fit
1705 in 4 bytes, so let's output it as hex. Take care to handle hosts
1706 where HOST_WIDE_INT is longer than an int.
1707
1708 Print small constants +-255 using decimal. */
1709
1710 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1711 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1712 else
1713 fprintf (stream, "#%x",
1714 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1715 return;
1716
1717 case CONST_DOUBLE:
1718 /* Do somewhat as CONST_INT. */
58356836 1719 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1720 return;
1721
1722 case CONST:
1723 output_addr_const (stream, modified_x);
1724 return;
1725
1726 default:
1727 /* No need to test for all strange things. Let output_addr_const do
1728 it for us. */
1729 if (CONSTANT_P (modified_x)
1730 /* Strangely enough, this is not included in CONSTANT_P.
1731 FIXME: Ask/check about sanity here. */
aa90bb35 1732 || LABEL_P (modified_x))
68cbb7e3 1733 {
1734 output_addr_const (stream, modified_x);
1735 return;
1736 }
1737
1738 /* We need the original here. */
1739 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1740 }
1741}
1742
7a7fb407 1743/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */
68cbb7e3 1744
7a7fb407 1745static bool
1746mmix_print_operand_punct_valid_p (unsigned char code)
68cbb7e3 1747{
91009d64 1748 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1749 return code == '+'
1750 /* A '.' is used for the %d in the POP %d,0 return insn. */
1751 || code == '.';
68cbb7e3 1752}
1753
7a7fb407 1754/* TARGET_PRINT_OPERAND_ADDRESS. */
68cbb7e3 1755
7a7fb407 1756static void
3c047fe9 1757mmix_print_operand_address (FILE *stream, machine_mode /*mode*/, rtx x)
68cbb7e3 1758{
1759 if (REG_P (x))
1760 {
1761 /* I find the generated assembly code harder to read without
1762 the ",0". */
d68ffc6f 1763 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1764 return;
1765 }
1766 else if (GET_CODE (x) == PLUS)
1767 {
1768 rtx x1 = XEXP (x, 0);
1769 rtx x2 = XEXP (x, 1);
1770
68cbb7e3 1771 if (REG_P (x1))
1772 {
d68ffc6f 1773 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1774
1775 if (REG_P (x2))
1776 {
d68ffc6f 1777 fprintf (stream, "%s",
1778 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1779 return;
1780 }
f105c84e 1781 else if (satisfies_constraint_I (x2))
68cbb7e3 1782 {
1783 output_addr_const (stream, x2);
1784 return;
1785 }
1786 }
1787 }
1788
ca316360 1789 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (Pmode, x))
f0b228a5 1790 {
1791 output_addr_const (stream, x);
1792 return;
1793 }
1794
68cbb7e3 1795 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1796}
1797
1798/* ASM_OUTPUT_REG_PUSH. */
1799
1800void
7585fcd5 1801mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1802{
1803 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1804 reg_names[MMIX_STACK_POINTER_REGNUM],
1805 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1806 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1807 reg_names[MMIX_STACK_POINTER_REGNUM]);
1808}
1809
1810/* ASM_OUTPUT_REG_POP. */
1811
1812void
7585fcd5 1813mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1814{
1815 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1816 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1817 reg_names[MMIX_STACK_POINTER_REGNUM],
1818 reg_names[MMIX_STACK_POINTER_REGNUM]);
1819}
1820
1821/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1822
1823void
7585fcd5 1824mmix_asm_output_addr_diff_elt (FILE *stream,
1825 rtx body ATTRIBUTE_UNUSED,
1826 int value,
1827 int rel)
68cbb7e3 1828{
1829 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1830}
1831
1832/* ASM_OUTPUT_ADDR_VEC_ELT. */
1833
1834void
7585fcd5 1835mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1836{
1837 fprintf (stream, "\tOCTA L:%d\n", value);
1838}
1839
1840/* ASM_OUTPUT_SKIP. */
1841
1842void
7585fcd5 1843mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1844{
1845 fprintf (stream, "\tLOC @+%d\n", nbytes);
1846}
1847
1848/* ASM_OUTPUT_ALIGN. */
1849
1850void
7585fcd5 1851mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1852{
1853 /* We need to record the needed alignment of this section in the object,
1854 so we have to output an alignment directive. Use a .p2align (not
1855 .align) so people will never have to wonder about whether the
1856 argument is in number of bytes or the log2 thereof. We do it in
1857 addition to the LOC directive, so nothing needs tweaking when
1858 copy-pasting assembly into mmixal. */
1859 fprintf (stream, "\t.p2align %d\n", power);
1860 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1861}
1862
1863/* DBX_REGISTER_NUMBER. */
1864
c0dae7df 1865unsigned
1866mmix_dbx_register_number (unsigned regno)
68cbb7e3 1867{
d68ffc6f 1868 /* Adjust the register number to the one it will be output as, dammit.
1869 It'd be nice if we could check the assumption that we're filling a
1870 gap, but every register between the last saved register and parameter
1871 registers might be a valid parameter register. */
1872 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1873
1874 /* We need to renumber registers to get the number of the return address
1875 register in the range 0..255. It is also space-saving if registers
1876 mentioned in the call-frame information (which uses this function by
1877 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1878 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1879 return regno >= 224 ? (regno - 224) : (regno + 48);
1880}
1881
35a3065a 1882/* End of target macro support functions.
68cbb7e3 1883
7585fcd5 1884 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1885
d3310704 1886/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1887 from insn-emit.c. */
1888
1889rtx
3754d046 1890mmix_get_hard_reg_initial_val (machine_mode mode, int regno)
d3310704 1891{
1892 return get_hard_reg_initial_val (mode, regno);
1893}
1894
e911aedf 1895/* Nonzero when the function epilogue is simple enough that a single
d3310704 1896 "POP %d,0" should be used even within the function. */
0b123c47 1897
1898int
7585fcd5 1899mmix_use_simple_return (void)
0b123c47 1900{
1901 int regno;
1902
1903 int stack_space_to_allocate
abe32cce 1904 = (crtl->outgoing_args_size
1905 + crtl->args.pretend_args_size
0b123c47 1906 + get_frame_size () + 7) & ~7;
1907
1908 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1909 return 0;
1910
1911 for (regno = 255;
1912 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1913 regno--)
1914 /* Note that we assume that the frame-pointer-register is one of these
1915 registers, in which case we don't count it here. */
1916 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1917 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
0b123c47 1918 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1919 return 0;
1920
1921 if (frame_pointer_needed)
1922 stack_space_to_allocate += 8;
1923
1924 if (MMIX_CFUN_HAS_LANDING_PAD)
1925 stack_space_to_allocate += 16;
1926 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1927 stack_space_to_allocate += 8;
1928
1929 return stack_space_to_allocate == 0;
1930}
1931
d3310704 1932
1933/* Expands the function prologue into RTX. */
1934
1935void
7585fcd5 1936mmix_expand_prologue (void)
d3310704 1937{
1938 HOST_WIDE_INT locals_size = get_frame_size ();
1939 int regno;
1940 HOST_WIDE_INT stack_space_to_allocate
abe32cce 1941 = (crtl->outgoing_args_size
1942 + crtl->args.pretend_args_size
d3310704 1943 + locals_size + 7) & ~7;
1944 HOST_WIDE_INT offset = -8;
1945
1946 /* Add room needed to save global non-register-stack registers. */
1947 for (regno = 255;
1948 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1949 regno--)
1950 /* Note that we assume that the frame-pointer-register is one of these
1951 registers, in which case we don't count it here. */
1952 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 1953 && df_regs_ever_live_p (regno) && !call_used_regs[regno]))
d3310704 1954 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1955 stack_space_to_allocate += 8;
1956
1957 /* If we do have a frame-pointer, add room for it. */
1958 if (frame_pointer_needed)
1959 stack_space_to_allocate += 8;
1960
1961 /* If we have a non-local label, we need to be able to unwind to it, so
1962 store the current register stack pointer. Also store the return
1963 address if we do that. */
1964 if (MMIX_CFUN_HAS_LANDING_PAD)
1965 stack_space_to_allocate += 16;
1966 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1967 /* If we do have a saved return-address slot, add room for it. */
1968 stack_space_to_allocate += 8;
1969
1970 /* Make sure we don't get an unaligned stack. */
1971 if ((stack_space_to_allocate % 8) != 0)
7781aa77 1972 internal_error ("stack frame not a multiple of 8 bytes: %wd",
d3310704 1973 stack_space_to_allocate);
1974
abe32cce 1975 if (crtl->args.pretend_args_size)
d3310704 1976 {
1977 int mmix_first_vararg_reg
1978 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1979 + (MMIX_MAX_ARGS_IN_REGS
abe32cce 1980 - crtl->args.pretend_args_size / 8));
d3310704 1981
1982 for (regno
1983 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1984 regno >= mmix_first_vararg_reg;
1985 regno--)
1986 {
1987 if (offset < 0)
1988 {
1989 HOST_WIDE_INT stack_chunk
1990 = stack_space_to_allocate > (256 - 8)
1991 ? (256 - 8) : stack_space_to_allocate;
1992
1993 mmix_emit_sp_add (-stack_chunk);
1994 offset += stack_chunk;
1995 stack_space_to_allocate -= stack_chunk;
1996 }
1997
1998 /* These registers aren't actually saved (as in "will be
1999 restored"), so don't tell DWARF2 they're saved. */
2000 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2001 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2002 offset)),
2003 gen_rtx_REG (DImode, regno));
2004 offset -= 8;
2005 }
2006 }
2007
2008 /* Store the frame-pointer. */
2009
2010 if (frame_pointer_needed)
2011 {
2012 rtx insn;
2013
2014 if (offset < 0)
2015 {
2016 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2017 HOST_WIDE_INT stack_chunk
2018 = stack_space_to_allocate > (256 - 8 - 8)
2019 ? (256 - 8 - 8) : stack_space_to_allocate;
2020
2021 mmix_emit_sp_add (-stack_chunk);
2022
2023 offset += stack_chunk;
2024 stack_space_to_allocate -= stack_chunk;
2025 }
2026
2027 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2028 plus_constant (Pmode,
2029 stack_pointer_rtx,
d3310704 2030 offset)),
2031 hard_frame_pointer_rtx);
2032 RTX_FRAME_RELATED_P (insn) = 1;
2033 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2034 stack_pointer_rtx,
2035 GEN_INT (offset + 8)));
2036 RTX_FRAME_RELATED_P (insn) = 1;
2037 offset -= 8;
2038 }
2039
2040 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2041 {
2042 rtx tmpreg, retreg;
2043 rtx insn;
2044
2045 /* Store the return-address, if one is needed on the stack. We
2046 usually store it in a register when needed, but that doesn't work
2047 with -fexceptions. */
2048
2049 if (offset < 0)
2050 {
2051 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2052 HOST_WIDE_INT stack_chunk
2053 = stack_space_to_allocate > (256 - 8 - 8)
2054 ? (256 - 8 - 8) : stack_space_to_allocate;
2055
2056 mmix_emit_sp_add (-stack_chunk);
2057
2058 offset += stack_chunk;
2059 stack_space_to_allocate -= stack_chunk;
2060 }
2061
2062 tmpreg = gen_rtx_REG (DImode, 255);
2063 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2064
2065 /* Dwarf2 code is confused by the use of a temporary register for
2066 storing the return address, so we have to express it as a note,
2067 which we attach to the actual store insn. */
2068 emit_move_insn (tmpreg, retreg);
2069
2070 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2071 plus_constant (Pmode,
2072 stack_pointer_rtx,
d3310704 2073 offset)),
2074 tmpreg);
2075 RTX_FRAME_RELATED_P (insn) = 1;
c0dae7df 2076 add_reg_note (insn, REG_FRAME_RELATED_EXPR,
d1f9b275 2077 gen_rtx_SET (gen_rtx_MEM (DImode,
29c05e22 2078 plus_constant (Pmode,
2079 stack_pointer_rtx,
c0dae7df 2080 offset)),
2081 retreg));
d3310704 2082
2083 offset -= 8;
2084 }
2085 else if (MMIX_CFUN_HAS_LANDING_PAD)
2086 offset -= 8;
2087
2088 if (MMIX_CFUN_HAS_LANDING_PAD)
2089 {
2090 /* Store the register defining the numbering of local registers, so
2091 we know how long to unwind the register stack. */
2092
2093 if (offset < 0)
2094 {
2095 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2096 HOST_WIDE_INT stack_chunk
2097 = stack_space_to_allocate > (256 - 8 - 8)
2098 ? (256 - 8 - 8) : stack_space_to_allocate;
2099
2100 mmix_emit_sp_add (-stack_chunk);
2101
2102 offset += stack_chunk;
2103 stack_space_to_allocate -= stack_chunk;
2104 }
2105
2106 /* We don't tell dwarf2 about this one; we just have it to unwind
2107 the register stack at landing pads. FIXME: It's a kludge because
2108 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2109 register stack at the moment. Best thing would be to handle it
2110 like stack-pointer offsets. Better: some hook into dwarf2out.c
2111 to produce DW_CFA_expression:s that specify the increment of rO,
2112 and unwind it at eh_return (preferred) or at the landing pad.
2113 Then saves to $0..$G-1 could be specified through that register. */
2114
2115 emit_move_insn (gen_rtx_REG (DImode, 255),
2116 gen_rtx_REG (DImode,
2117 MMIX_rO_REGNUM));
2118 emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2119 plus_constant (Pmode, stack_pointer_rtx,
2120 offset)),
d3310704 2121 gen_rtx_REG (DImode, 255));
2122 offset -= 8;
2123 }
2124
2125 /* After the return-address and the frame-pointer, we have the local
2126 variables. They're the ones that may have an "unaligned" size. */
2127 offset -= (locals_size + 7) & ~7;
2128
2129 /* Now store all registers that are global, i.e. not saved by the
2130 register file machinery.
2131
2132 It is assumed that the frame-pointer is one of these registers, so it
2133 is explicitly excluded in the count. */
2134
2135 for (regno = 255;
2136 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2137 regno--)
2138 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2139 && df_regs_ever_live_p (regno) && ! call_used_regs[regno])
d3310704 2140 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2141 {
2142 rtx insn;
2143
2144 if (offset < 0)
2145 {
2146 HOST_WIDE_INT stack_chunk
2147 = (stack_space_to_allocate > (256 - offset - 8)
2148 ? (256 - offset - 8) : stack_space_to_allocate);
2149
2150 mmix_emit_sp_add (-stack_chunk);
2151 offset += stack_chunk;
2152 stack_space_to_allocate -= stack_chunk;
2153 }
2154
2155 insn = emit_move_insn (gen_rtx_MEM (DImode,
29c05e22 2156 plus_constant (Pmode,
2157 stack_pointer_rtx,
d3310704 2158 offset)),
2159 gen_rtx_REG (DImode, regno));
2160 RTX_FRAME_RELATED_P (insn) = 1;
2161 offset -= 8;
2162 }
2163
2164 /* Finally, allocate room for outgoing args and local vars if room
2165 wasn't allocated above. */
2166 if (stack_space_to_allocate)
2167 mmix_emit_sp_add (-stack_space_to_allocate);
2168}
2169
2170/* Expands the function epilogue into RTX. */
2171
2172void
7585fcd5 2173mmix_expand_epilogue (void)
d3310704 2174{
2175 HOST_WIDE_INT locals_size = get_frame_size ();
2176 int regno;
2177 HOST_WIDE_INT stack_space_to_deallocate
abe32cce 2178 = (crtl->outgoing_args_size
2179 + crtl->args.pretend_args_size
d3310704 2180 + locals_size + 7) & ~7;
2181
d3310704 2182 /* The first address to access is beyond the outgoing_args area. */
abe32cce 2183 HOST_WIDE_INT offset = crtl->outgoing_args_size;
d3310704 2184
2185 /* Add the space for global non-register-stack registers.
2186 It is assumed that the frame-pointer register can be one of these
2187 registers, in which case it is excluded from the count when needed. */
2188 for (regno = 255;
2189 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2190 regno--)
2191 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2192 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2193 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2194 stack_space_to_deallocate += 8;
2195
2196 /* Add in the space for register stack-pointer. If so, always add room
2197 for the saved PC. */
2198 if (MMIX_CFUN_HAS_LANDING_PAD)
2199 stack_space_to_deallocate += 16;
2200 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2201 /* If we have a saved return-address slot, add it in. */
2202 stack_space_to_deallocate += 8;
2203
2204 /* Add in the frame-pointer. */
2205 if (frame_pointer_needed)
2206 stack_space_to_deallocate += 8;
2207
2208 /* Make sure we don't get an unaligned stack. */
2209 if ((stack_space_to_deallocate % 8) != 0)
7781aa77 2210 internal_error ("stack frame not a multiple of octabyte: %wd",
d3310704 2211 stack_space_to_deallocate);
2212
2213 /* We will add back small offsets to the stack pointer as we go.
2214 First, we restore all registers that are global, i.e. not saved by
2215 the register file machinery. */
2216
2217 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2218 regno <= 255;
2219 regno++)
2220 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
3072d30e 2221 && df_regs_ever_live_p (regno) && !call_used_regs[regno])
d3310704 2222 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2223 {
2224 if (offset > 255)
2225 {
2226 mmix_emit_sp_add (offset);
2227 stack_space_to_deallocate -= offset;
2228 offset = 0;
2229 }
2230
2231 emit_move_insn (gen_rtx_REG (DImode, regno),
2232 gen_rtx_MEM (DImode,
29c05e22 2233 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2234 offset)));
2235 offset += 8;
2236 }
2237
2238 /* Here is where the local variables were. As in the prologue, they
2239 might be of an unaligned size. */
2240 offset += (locals_size + 7) & ~7;
2241
d3310704 2242 /* The saved register stack pointer is just below the frame-pointer
2243 register. We don't need to restore it "manually"; the POP
2244 instruction does that. */
2245 if (MMIX_CFUN_HAS_LANDING_PAD)
2246 offset += 16;
2247 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2248 /* The return-address slot is just below the frame-pointer register.
2249 We don't need to restore it because we don't really use it. */
2250 offset += 8;
2251
2252 /* Get back the old frame-pointer-value. */
2253 if (frame_pointer_needed)
2254 {
2255 if (offset > 255)
2256 {
2257 mmix_emit_sp_add (offset);
2258
2259 stack_space_to_deallocate -= offset;
2260 offset = 0;
2261 }
2262
2263 emit_move_insn (hard_frame_pointer_rtx,
2264 gen_rtx_MEM (DImode,
29c05e22 2265 plus_constant (Pmode, stack_pointer_rtx,
d3310704 2266 offset)));
2267 offset += 8;
2268 }
2269
2270 /* We do not need to restore pretended incoming args, just add back
2271 offset to sp. */
2272 if (stack_space_to_deallocate != 0)
2273 mmix_emit_sp_add (stack_space_to_deallocate);
2274
18d50ae6 2275 if (crtl->calls_eh_return)
d3310704 2276 /* Adjust the (normal) stack-pointer to that of the receiver.
2277 FIXME: It would be nice if we could also adjust the register stack
2278 here, but we need to express it through DWARF 2 too. */
2279 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2280 gen_rtx_REG (DImode,
2281 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2282}
2283
68cbb7e3 2284/* Output an optimal sequence for setting a register to a specific
2285 constant. Used in an alternative for const_ints in movdi, and when
2286 using large stack-frame offsets.
2287
2288 Use do_begin_end to say if a line-starting TAB and newline before the
2289 first insn and after the last insn is wanted. */
2290
2291void
7585fcd5 2292mmix_output_register_setting (FILE *stream,
2293 int regno,
3a4303e7 2294 int64_t value,
7585fcd5 2295 int do_begin_end)
68cbb7e3 2296{
2297 if (do_begin_end)
2298 fprintf (stream, "\t");
2299
4d66cf01 2300 if (insn_const_int_ok_for_constraint (value, CONSTRAINT_K))
f03df321 2301 fprintf (stream, "NEGU %s,0,%" PRId64, reg_names[regno], -value);
3a4303e7 2302 else if (mmix_shiftable_wyde_value ((uint64_t) value))
68cbb7e3 2303 {
2304 /* First, the one-insn cases. */
2305 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2306 (uint64_t)
68cbb7e3 2307 value);
2308 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2309 mmix_output_shifted_value (stream, (uint64_t) value);
68cbb7e3 2310 }
3a4303e7 2311 else if (mmix_shiftable_wyde_value (-(uint64_t) value))
68cbb7e3 2312 {
2313 /* We do this to get a bit more legible assembly code. The next
2314 alternative is mostly redundant with this. */
2315
2316 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2317 -(uint64_t)
68cbb7e3 2318 value);
2319 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2320 mmix_output_shifted_value (stream, -(uint64_t) value);
68cbb7e3 2321 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2322 reg_names[regno]);
2323 }
3a4303e7 2324 else if (mmix_shiftable_wyde_value (~(uint64_t) value))
68cbb7e3 2325 {
2326 /* Slightly more expensive, the two-insn cases. */
2327
2328 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2329 is shiftable, or any other one-insn transformation of the value.
2330 FIXME: Check first if the value is "shiftable" by two loading
2331 with two insns, since it makes more readable assembly code (if
2332 anyone else cares). */
2333
2334 mmix_output_shiftvalue_op_from_str (stream, "SET",
3a4303e7 2335 ~(uint64_t)
68cbb7e3 2336 value);
2337 fprintf (stream, " %s,", reg_names[regno]);
3a4303e7 2338 mmix_output_shifted_value (stream, ~(uint64_t) value);
68cbb7e3 2339 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2340 reg_names[regno]);
2341 }
2342 else
2343 {
2344 /* The generic case. 2..4 insns. */
25037517 2345 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2346 const char *op = "SET";
2347 const char *line_begin = "";
f0b228a5 2348 int insns = 0;
68cbb7e3 2349 int i;
3a4303e7 2350 int64_t tmpvalue = value;
68cbb7e3 2351
f0b228a5 2352 /* Compute the number of insns needed to output this constant. */
2353 for (i = 0; i < 4 && tmpvalue != 0; i++)
2354 {
2355 if (tmpvalue & 65535)
2356 insns++;
2357 tmpvalue >>= 16;
2358 }
2359 if (TARGET_BASE_ADDRESSES && insns == 3)
2360 {
2361 /* The number three is based on a static observation on
2362 ghostscript-6.52. Two and four are excluded because there
2363 are too many such constants, and each unique constant (maybe
2364 offset by 1..255) were used few times compared to other uses,
2365 e.g. addresses.
2366
2367 We use base-plus-offset addressing to force it into a global
2368 register; we just use a "LDA reg,VALUE", which will cause the
2369 assembler and linker to DTRT (for constants as well as
2370 addresses). */
2371 fprintf (stream, "LDA %s,", reg_names[regno]);
2372 mmix_output_octa (stream, value, 0);
2373 }
2374 else
68cbb7e3 2375 {
f0b228a5 2376 /* Output pertinent parts of the 4-wyde sequence.
2377 Still more to do if we want this to be optimal, but hey...
2378 Note that the zero case has been handled above. */
2379 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2380 {
f0b228a5 2381 if (value & 65535)
2382 {
2383 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2384 higher_parts[i], reg_names[regno],
2385 (int) (value & 65535));
2386 /* The first one sets the rest of the bits to 0, the next
2387 ones add set bits. */
2388 op = "INC";
2389 line_begin = "\n\t";
2390 }
68cbb7e3 2391
f0b228a5 2392 value >>= 16;
2393 }
68cbb7e3 2394 }
2395 }
2396
2397 if (do_begin_end)
2398 fprintf (stream, "\n");
2399}
2400
2401/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2402 else return 0. */
2403
2404int
3a4303e7 2405mmix_shiftable_wyde_value (uint64_t value)
68cbb7e3 2406{
2407 /* Shift by 16 bits per group, stop when we've found two groups with
2408 nonzero bits. */
2409 int i;
2410 int has_candidate = 0;
2411
2412 for (i = 0; i < 4; i++)
2413 {
2414 if (value & 65535)
2415 {
2416 if (has_candidate)
2417 return 0;
2418 else
2419 has_candidate = 1;
2420 }
2421
2422 value >>= 16;
2423 }
2424
2425 return 1;
2426}
2427
74f4459c 2428/* X and Y are two things to compare using CODE. Return the rtx for
2429 the cc-reg in the proper mode. */
68cbb7e3 2430
2431rtx
7585fcd5 2432mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2433{
3754d046 2434 machine_mode ccmode = SELECT_CC_MODE (code, x, y);
74f4459c 2435 return gen_reg_rtx (ccmode);
68cbb7e3 2436}
2437
2438/* Local (static) helper functions. */
2439
d3310704 2440static void
7585fcd5 2441mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2442{
2443 rtx insn;
2444
2445 if (offset < 0)
2446 {
2447 /* Negative stack-pointer adjustments are allocations and appear in
2448 the prologue only. We mark them as frame-related so unwind and
2449 debug info is properly emitted for them. */
2450 if (offset > -255)
2451 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2452 stack_pointer_rtx,
2453 GEN_INT (offset)));
2454 else
2455 {
2456 rtx tmpr = gen_rtx_REG (DImode, 255);
2457 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2458 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2459 stack_pointer_rtx, tmpr));
2460 }
2461 RTX_FRAME_RELATED_P (insn) = 1;
2462 }
2463 else
2464 {
2465 /* Positive adjustments are in the epilogue only. Don't mark them
2466 as "frame-related" for unwind info. */
f105c84e 2467 if (insn_const_int_ok_for_constraint (offset, CONSTRAINT_L))
d3310704 2468 emit_insn (gen_adddi3 (stack_pointer_rtx,
2469 stack_pointer_rtx,
2470 GEN_INT (offset)));
2471 else
2472 {
2473 rtx tmpr = gen_rtx_REG (DImode, 255);
2474 emit_move_insn (tmpr, GEN_INT (offset));
2475 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2476 stack_pointer_rtx, tmpr));
2477 }
2478 }
2479}
2480
68cbb7e3 2481/* Print operator suitable for doing something with a shiftable
ebb11c7b 2482 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2483
2484static void
7585fcd5 2485mmix_output_shiftvalue_op_from_str (FILE *stream,
2486 const char *mainop,
3a4303e7 2487 int64_t value)
68cbb7e3 2488{
25037517 2489 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2490 int i;
2491
2492 if (! mmix_shiftable_wyde_value (value))
2493 {
2494 char s[sizeof ("0xffffffffffffffff")];
9d247a3d 2495 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2496 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2497 }
2498
2499 for (i = 0; i < 4; i++)
2500 {
2501 /* We know we're through when we find one-bits in the low
2502 16 bits. */
2503 if (value & 0xffff)
2504 {
2505 fprintf (stream, "%s%s", mainop, op_part[i]);
2506 return;
2507 }
2508 value >>= 16;
2509 }
2510
2511 /* No bits set? Then it must have been zero. */
2512 fprintf (stream, "%sL", mainop);
2513}
2514
2515/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2516
2517static void
3a4303e7 2518mmix_output_octa (FILE *stream, int64_t value, int do_begin_end)
68cbb7e3 2519{
68cbb7e3 2520 if (do_begin_end)
2521 fprintf (stream, "\tOCTA ");
2522
68cbb7e3 2523 /* Provide a few alternative output formats depending on the number, to
2524 improve legibility of assembler output. */
3a4303e7 2525 if ((value < (int64_t) 0 && value > (int64_t) -10000)
2526 || (value >= (int64_t) 0 && value <= (int64_t) 16384))
68cbb7e3 2527 fprintf (stream, "%d", (int) value);
3a4303e7 2528 else if (value > (int64_t) 0
2529 && value < ((int64_t) 1 << 31) * 2)
68cbb7e3 2530 fprintf (stream, "#%x", (unsigned int) value);
3a4303e7 2531 else if (sizeof (HOST_WIDE_INT) == sizeof (int64_t))
6996b123 2532 /* We need to avoid the not-so-universal "0x" prefix; we need the
2533 pure hex-digits together with the mmixal "#" hex prefix. */
2534 fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX_PURE,
2535 (HOST_WIDE_INT) value);
2536 else /* Need to avoid the hex output; there's no ...WIDEST...HEX_PURE. */
9d247a3d 2537 fprintf (stream, "%" PRIu64, value);
68cbb7e3 2538
2539 if (do_begin_end)
2540 fprintf (stream, "\n");
2541}
2542
2543/* Print the presumed shiftable wyde argument shifted into place (to
2544 be output with an operand). */
2545
2546static void
3a4303e7 2547mmix_output_shifted_value (FILE *stream, int64_t value)
68cbb7e3 2548{
2549 int i;
2550
2551 if (! mmix_shiftable_wyde_value (value))
2552 {
2553 char s[16+2+1];
9d247a3d 2554 sprintf (s, "%#" PRIx64, value);
68cbb7e3 2555 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2556 }
2557
2558 for (i = 0; i < 4; i++)
68cbb7e3 2559 {
7585fcd5 2560 /* We know we're through when we find one-bits in the low 16 bits. */
2561 if (value & 0xffff)
2562 {
2563 fprintf (stream, "#%x", (int) (value & 0xffff));
2564 return;
2565 }
68cbb7e3 2566
2567 value >>= 16;
2568 }
2569
2570 /* No bits set? Then it must have been zero. */
2571 fprintf (stream, "0");
2572}
2573
2574/* Output an MMIX condition name corresponding to an operator
2575 and operands:
2576 (comparison_operator [(comparison_operator ...) (const_int 0)])
2577 which means we have to look at *two* operators.
2578
2579 The argument "reversed" refers to reversal of the condition (not the
2580 same as swapping the arguments). */
2581
2582static void
7a7fb407 2583mmix_output_condition (FILE *stream, const_rtx x, int reversed)
68cbb7e3 2584{
2585 struct cc_conv
2586 {
2587 RTX_CODE cc;
2588
2589 /* The normal output cc-code. */
2590 const char *const normal;
2591
2592 /* The reversed cc-code, or NULL if invalid. */
2593 const char *const reversed;
2594 };
2595
2596 struct cc_type_conv
2597 {
3754d046 2598 machine_mode cc_mode;
68cbb7e3 2599
21f1e711 2600 /* Terminated with {UNKNOWN, NULL, NULL} */
68cbb7e3 2601 const struct cc_conv *const convs;
2602 };
2603
2604#undef CCEND
21f1e711 2605#define CCEND {UNKNOWN, NULL, NULL}
68cbb7e3 2606
2607 static const struct cc_conv cc_fun_convs[]
2608 = {{ORDERED, "Z", "P"},
2609 {UNORDERED, "P", "Z"},
2610 CCEND};
2611 static const struct cc_conv cc_fp_convs[]
2612 = {{GT, "P", NULL},
2613 {LT, "N", NULL},
2614 CCEND};
2615 static const struct cc_conv cc_fpeq_convs[]
2616 = {{NE, "Z", "P"},
2617 {EQ, "P", "Z"},
2618 CCEND};
2619 static const struct cc_conv cc_uns_convs[]
2620 = {{GEU, "NN", "N"},
2621 {GTU, "P", "NP"},
2622 {LEU, "NP", "P"},
2623 {LTU, "N", "NN"},
2624 CCEND};
2625 static const struct cc_conv cc_signed_convs[]
2626 = {{NE, "NZ", "Z"},
2627 {EQ, "Z", "NZ"},
2628 {GE, "NN", "N"},
2629 {GT, "P", "NP"},
2630 {LE, "NP", "P"},
2631 {LT, "N", "NN"},
2632 CCEND};
2633 static const struct cc_conv cc_di_convs[]
2634 = {{NE, "NZ", "Z"},
2635 {EQ, "Z", "NZ"},
2636 {GE, "NN", "N"},
2637 {GT, "P", "NP"},
2638 {LE, "NP", "P"},
2639 {LT, "N", "NN"},
2640 {GTU, "NZ", "Z"},
2641 {LEU, "Z", "NZ"},
2642 CCEND};
2643#undef CCEND
2644
2645 static const struct cc_type_conv cc_convs[]
2646 = {{CC_FUNmode, cc_fun_convs},
2647 {CC_FPmode, cc_fp_convs},
2648 {CC_FPEQmode, cc_fpeq_convs},
2649 {CC_UNSmode, cc_uns_convs},
2650 {CCmode, cc_signed_convs},
2651 {DImode, cc_di_convs}};
2652
3585dac7 2653 size_t i;
68cbb7e3 2654 int j;
2655
3754d046 2656 machine_mode mode = GET_MODE (XEXP (x, 0));
68cbb7e3 2657 RTX_CODE cc = GET_CODE (x);
2658
3585dac7 2659 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2660 {
2661 if (mode == cc_convs[i].cc_mode)
2662 {
21f1e711 2663 for (j = 0; cc_convs[i].convs[j].cc != UNKNOWN; j++)
68cbb7e3 2664 if (cc == cc_convs[i].convs[j].cc)
2665 {
2666 const char *mmix_cc
2667 = (reversed ? cc_convs[i].convs[j].reversed
2668 : cc_convs[i].convs[j].normal);
2669
2670 if (mmix_cc == NULL)
2671 fatal_insn ("MMIX Internal: Trying to output invalidly\
2672 reversed condition:", x);
2673
2674 fprintf (stream, "%s", mmix_cc);
2675 return;
2676 }
2677
2678 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2679 }
2680 }
2681
2682 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2683}
2684
2685/* Return the bit-value for a const_int or const_double. */
2686
3a4303e7 2687int64_t
7a7fb407 2688mmix_intval (const_rtx x)
68cbb7e3 2689{
68cbb7e3 2690 if (GET_CODE (x) == CONST_INT)
2691 return INTVAL (x);
2692
2693 /* We make a little song and dance because converting to long long in
2694 gcc-2.7.2 is broken. I still want people to be able to use it for
2695 cross-compilation to MMIX. */
2696 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
3a4303e7 2697 return CONST_DOUBLE_HIGH (x);
68cbb7e3 2698
2699 if (GET_CODE (x) == CONST_DOUBLE)
2700 {
68cbb7e3 2701 if (GET_MODE (x) == DFmode)
2702 {
2703 long bits[2];
dc8dc4ce 2704
945f7b03 2705 REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2706
ca2399d9 2707 /* The double cast is necessary to avoid getting the long
2708 sign-extended to unsigned long long(!) when they're of
2709 different size (usually 32-bit hosts). */
2710 return
3a4303e7 2711 ((uint64_t) (unsigned long) bits[0]
2712 << (uint64_t) 32U)
2713 | (uint64_t) (unsigned long) bits[1];
68cbb7e3 2714 }
2715 else if (GET_MODE (x) == SFmode)
2716 {
2717 long bits;
945f7b03 2718 REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (x), bits);
68cbb7e3 2719
2720 return (unsigned long) bits;
2721 }
2722 }
2723
2724 fatal_insn ("MMIX Internal: This is not a constant:", x);
2725}
2726
3b2411a8 2727/* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */
2728
3754d046 2729machine_mode
3b2411a8 2730mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
3754d046 2731 machine_mode mode,
3b2411a8 2732 int *punsignedp ATTRIBUTE_UNUSED,
2733 const_tree fntype ATTRIBUTE_UNUSED,
2734 int for_return)
2735{
2736 /* Apparently not doing TRT if int < register-size. FIXME: Perhaps
2737 FUNCTION_VALUE and LIBCALL_VALUE needs tweaking as some ports say. */
c879dbcf 2738 if (for_return == 1)
3b2411a8 2739 return mode;
2740
2741 /* Promotion of modes currently generates slow code, extending before
2742 operation, so we do it only for arguments. */
2743 if (GET_MODE_CLASS (mode) == MODE_INT
2744 && GET_MODE_SIZE (mode) < 8)
2745 return DImode;
2746 else
2747 return mode;
2748}
9e4a734a 2749/* Worker function for TARGET_STRUCT_VALUE_RTX. */
2750
2751static rtx
2752mmix_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
2753 int incoming ATTRIBUTE_UNUSED)
2754{
2755 return gen_rtx_REG (Pmode, MMIX_STRUCT_VALUE_REGNUM);
2756}
2757
5a1c68c3 2758/* Worker function for TARGET_FRAME_POINTER_REQUIRED.
2759
2760 FIXME: Is this requirement built-in? Anyway, we should try to get rid
2761 of it; we can deduce the value. */
2762
2763bool
2764mmix_frame_pointer_required (void)
2765{
2766 return (cfun->has_nonlocal_label);
2767}
2768
68cbb7e3 2769/*
2770 * Local variables:
2771 * eval: (c-set-style "gnu")
2772 * indent-tabs-mode: t
2773 * End:
2774 */