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68cbb7e3 1/* Definitions of target machine for GNU compiler, for MMIX.
7585fcd5 2 Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
68cbb7e3 3 Contributed by Hans-Peter Nilsson (hp@bitrange.com)
4
581084df 5This file is part of GCC.
68cbb7e3 6
581084df 7GCC is free software; you can redistribute it and/or modify
68cbb7e3 8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
581084df 12GCC is distributed in the hope that it will be useful,
68cbb7e3 13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
581084df 18along with GCC; see the file COPYING. If not, write to
68cbb7e3 19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
23#include "system.h"
805e22b2 24#include "coretypes.h"
25#include "tm.h"
68cbb7e3 26#include "rtl.h"
27#include "regs.h"
28#include "hard-reg-set.h"
29#include "hashtab.h"
30#include "insn-config.h"
31#include "output.h"
32#include "flags.h"
33#include "tree.h"
34#include "function.h"
35#include "expr.h"
36#include "toplev.h"
37#include "recog.h"
38#include "ggc.h"
39#include "dwarf2.h"
40#include "debug.h"
41#include "tm_p.h"
42#include "integrate.h"
43#include "target.h"
44#include "target-def.h"
b744252f 45#include "real.h"
68cbb7e3 46
47/* First some local helper definitions. */
48#define MMIX_FIRST_GLOBAL_REGNUM 32
49
50/* We'd need a current_function_has_landing_pad. It's marked as such when
51 a nonlocal_goto_receiver is expanded. Not just a C++ thing, but
52 mostly. */
53#define MMIX_CFUN_HAS_LANDING_PAD (cfun->machine->has_landing_pad != 0)
54
55/* We have no means to tell DWARF 2 about the register stack, so we need
56 to store the return address on the stack if an exception can get into
d3310704 57 this function. FIXME: Narrow condition. Before any whole-function
58 analysis, regs_ever_live[] isn't initialized. We know it's up-to-date
59 after reload_completed; it may contain incorrect information some time
60 before that. Within a RTL sequence (after a call to start_sequence,
61 such as in RTL expanders), leaf_function_p doesn't see all insns
62 (perhaps any insn). But regs_ever_live is up-to-date when
63 leaf_function_p () isn't, so we "or" them together to get accurate
64 information. FIXME: Some tweak to leaf_function_p might be
f024691d 65 preferable. */
d3310704 66#define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \
67 (flag_exceptions \
68 && ((reload_completed && regs_ever_live[MMIX_rJ_REGNUM]) \
69 || !leaf_function_p ()))
68cbb7e3 70
71#define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \
72 (current_function_calls_eh_return \
73 && (EH_RETURN_DATA_REGNO (0) == REGNO \
74 || EH_RETURN_DATA_REGNO (1) == REGNO \
75 || EH_RETURN_DATA_REGNO (2) == REGNO \
76 || EH_RETURN_DATA_REGNO (3) == REGNO))
77
d68ffc6f 78/* For the default ABI, we rename registers at output-time to fill the gap
79 between the (statically partitioned) saved registers and call-clobbered
80 registers. In effect this makes unused call-saved registers to be used
81 as call-clobbered registers. The benefit comes from keeping the number
82 of local registers (value of rL) low, since there's a cost of
d3310704 83 increasing rL and clearing unused (unset) registers with lower numbers.
84 Don't translate while outputting the prologue. */
d68ffc6f 85#define MMIX_OUTPUT_REGNO(N) \
86 (TARGET_ABI_GNU \
0b123c47 87 || (int) (N) < MMIX_RETURN_VALUE_REGNUM \
88 || (int) (N) > MMIX_LAST_STACK_REGISTER_REGNUM \
d3310704 89 || cfun == NULL \
90 || cfun->machine == NULL \
91 || cfun->machine->in_prologue \
d68ffc6f 92 ? (N) : ((N) - MMIX_RETURN_VALUE_REGNUM \
93 + cfun->machine->highest_saved_stack_register + 1))
94
0b123c47 95/* The %d in "POP %d,0". */
96#define MMIX_POP_ARGUMENT() \
97 ((! TARGET_ABI_GNU \
98 && current_function_return_rtx != NULL \
99 && ! current_function_returns_struct) \
100 ? (GET_CODE (current_function_return_rtx) == PARALLEL \
101 ? GET_NUM_ELEM (XVEC (current_function_return_rtx, 0)) : 1) \
102 : 0)
103
68cbb7e3 104/* The canonical saved comparison operands for non-cc0 machines, set in
105 the compare expander. */
106rtx mmix_compare_op0;
107rtx mmix_compare_op1;
108
109/* We ignore some options with arguments. They are passed to the linker,
110 but also ends up here because they start with "-m". We tell the driver
111 to store them in a variable we don't inspect. */
25037517 112const char *mmix_cc1_ignored_option;
68cbb7e3 113
114/* Declarations of locals. */
115
68cbb7e3 116/* Intermediate for insn output. */
117static int mmix_output_destination_register;
118
119static void mmix_output_shiftvalue_op_from_str
7585fcd5 120 (FILE *, const char *, HOST_WIDEST_INT);
121static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT);
122static void mmix_output_condition (FILE *, rtx, int);
123static HOST_WIDEST_INT mmix_intval (rtx);
124static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int);
125static bool mmix_assemble_integer (rtx, unsigned int, int);
126static struct machine_function *mmix_init_machine_status (void);
127static void mmix_encode_section_info (tree, rtx, int);
128static const char *mmix_strip_name_encoding (const char *);
129static void mmix_emit_sp_add (HOST_WIDE_INT offset);
130static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
131static void mmix_target_asm_function_end_prologue (FILE *);
132static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
133static void mmix_reorg (void);
6988553d 134static void mmix_asm_output_mi_thunk
7585fcd5 135 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
136static void mmix_file_start (void);
137static void mmix_file_end (void);
138static bool mmix_rtx_costs (rtx, int, int, int *);
68cbb7e3 139
140
141/* Target structure macros. Listed by node. See `Using and Porting GCC'
142 for a general description. */
143
144/* Node: Function Entry */
145
58356836 146#undef TARGET_ASM_BYTE_OP
147#define TARGET_ASM_BYTE_OP NULL
148#undef TARGET_ASM_ALIGNED_HI_OP
149#define TARGET_ASM_ALIGNED_HI_OP NULL
150#undef TARGET_ASM_ALIGNED_SI_OP
151#define TARGET_ASM_ALIGNED_SI_OP NULL
152#undef TARGET_ASM_ALIGNED_DI_OP
153#define TARGET_ASM_ALIGNED_DI_OP NULL
154#undef TARGET_ASM_INTEGER
155#define TARGET_ASM_INTEGER mmix_assemble_integer
156
68cbb7e3 157#undef TARGET_ASM_FUNCTION_PROLOGUE
158#define TARGET_ASM_FUNCTION_PROLOGUE mmix_target_asm_function_prologue
159
d3310704 160#undef TARGET_ASM_FUNCTION_END_PROLOGUE
161#define TARGET_ASM_FUNCTION_END_PROLOGUE mmix_target_asm_function_end_prologue
162
68cbb7e3 163#undef TARGET_ASM_FUNCTION_EPILOGUE
164#define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue
165
7811991d 166#undef TARGET_ENCODE_SECTION_INFO
167#define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info
7b4a38a6 168#undef TARGET_STRIP_NAME_ENCODING
169#define TARGET_STRIP_NAME_ENCODING mmix_strip_name_encoding
7811991d 170
6988553d 171#undef TARGET_ASM_OUTPUT_MI_THUNK
172#define TARGET_ASM_OUTPUT_MI_THUNK mmix_asm_output_mi_thunk
eb344f43 173#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
174#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
92c473b8 175#undef TARGET_ASM_FILE_START
176#define TARGET_ASM_FILE_START mmix_file_start
177#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
178#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
f6940372 179#undef TARGET_ASM_FILE_END
180#define TARGET_ASM_FILE_END mmix_file_end
6988553d 181
fab7adbf 182#undef TARGET_RTX_COSTS
183#define TARGET_RTX_COSTS mmix_rtx_costs
ec0457a8 184#undef TARGET_ADDRESS_COST
185#define TARGET_ADDRESS_COST hook_int_rtx_0
fab7adbf 186
2efea8c0 187#undef TARGET_MACHINE_DEPENDENT_REORG
188#define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg
189
68cbb7e3 190struct gcc_target targetm = TARGET_INITIALIZER;
191
192/* Functions that are expansions for target macros.
193 See Target Macros in `Using and Porting GCC'. */
194
195/* OVERRIDE_OPTIONS. */
196
197void
7585fcd5 198mmix_override_options (void)
68cbb7e3 199{
200 /* Should we err or should we warn? Hmm. At least we must neutralize
201 it. For example the wrong kind of case-tables will be generated with
202 PIC; we use absolute address items for mmixal compatibility. FIXME:
203 They could be relative if we just elide them to after all pertinent
204 labels. */
205 if (flag_pic)
206 {
207 warning ("-f%s not supported: ignored", (flag_pic > 1) ? "PIC" : "pic");
208 flag_pic = 0;
209 }
68cbb7e3 210}
211
212/* INIT_EXPANDERS. */
213
214void
7585fcd5 215mmix_init_expanders (void)
68cbb7e3 216{
217 init_machine_status = mmix_init_machine_status;
218}
219
220/* Set the per-function data. */
221
1f3233d1 222static struct machine_function *
7585fcd5 223mmix_init_machine_status (void)
68cbb7e3 224{
1f3233d1 225 return ggc_alloc_cleared (sizeof (struct machine_function));
68cbb7e3 226}
227
228/* DATA_ALIGNMENT.
229 We have trouble getting the address of stuff that is located at other
230 than 32-bit alignments (GETA requirements), so try to give everything
231 at least 32-bit alignment. */
232
233int
7585fcd5 234mmix_data_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 235{
236 if (basic_align < 32)
237 return 32;
238
239 return basic_align;
240}
241
242/* CONSTANT_ALIGNMENT. */
243
244int
7585fcd5 245mmix_constant_alignment (tree constant ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 246{
247 if (basic_align < 32)
248 return 32;
249
250 return basic_align;
251}
252
253/* LOCAL_ALIGNMENT. */
254
255int
7585fcd5 256mmix_local_alignment (tree type ATTRIBUTE_UNUSED, int basic_align)
68cbb7e3 257{
258 if (basic_align < 32)
259 return 32;
260
261 return basic_align;
262}
263
264/* CONDITIONAL_REGISTER_USAGE. */
265
266void
7585fcd5 267mmix_conditional_register_usage (void)
68cbb7e3 268{
269 int i;
270
271 if (TARGET_ABI_GNU)
272 {
273 static const int gnu_abi_reg_alloc_order[]
274 = MMIX_GNU_ABI_REG_ALLOC_ORDER;
275
276 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
277 reg_alloc_order[i] = gnu_abi_reg_alloc_order[i];
278
279 /* Change the default from the mmixware ABI. For the GNU ABI,
280 $15..$30 are call-saved just as $0..$14. There must be one
d3310704 281 call-clobbered local register for the "hole" that holds the
282 number of saved local registers saved by PUSHJ/PUSHGO during the
283 function call, receiving the return value at return. So best is
284 to use the highest, $31. It's already marked call-clobbered for
285 the mmixware ABI. */
68cbb7e3 286 for (i = 15; i <= 30; i++)
287 call_used_regs[i] = 0;
f0b228a5 288
289 /* "Unfix" the parameter registers. */
290 for (i = MMIX_RESERVED_GNU_ARG_0_REGNUM;
291 i < MMIX_RESERVED_GNU_ARG_0_REGNUM + MMIX_MAX_ARGS_IN_REGS;
292 i++)
293 fixed_regs[i] = 0;
68cbb7e3 294 }
295
296 /* Step over the ":" in special register names. */
297 if (! TARGET_TOPLEVEL_SYMBOLS)
298 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
299 if (reg_names[i][0] == ':')
300 reg_names[i]++;
301}
302
d3310704 303/* LOCAL_REGNO.
304 All registers that are part of the register stack and that will be
305 saved are local. */
306
307int
7585fcd5 308mmix_local_regno (int regno)
d3310704 309{
310 return regno <= MMIX_LAST_STACK_REGISTER_REGNUM && !call_used_regs[regno];
311}
312
68cbb7e3 313/* PREFERRED_RELOAD_CLASS.
314 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
315
316enum reg_class
7585fcd5 317mmix_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class class)
68cbb7e3 318{
319 /* FIXME: Revisit. */
320 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
321 ? REMAINDER_REG : class;
322}
323
324/* PREFERRED_OUTPUT_RELOAD_CLASS.
325 We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */
326
327enum reg_class
7585fcd5 328mmix_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED,
329 enum reg_class class)
68cbb7e3 330{
331 /* FIXME: Revisit. */
332 return GET_CODE (x) == MOD && GET_MODE (x) == DImode
333 ? REMAINDER_REG : class;
334}
335
336/* SECONDARY_RELOAD_CLASS.
337 We need to reload regs of REMAINDER_REG and HIMULT_REG elsewhere. */
338
339enum reg_class
7585fcd5 340mmix_secondary_reload_class (enum reg_class class,
341 enum machine_mode mode ATTRIBUTE_UNUSED,
342 rtx x ATTRIBUTE_UNUSED,
343 int in_p ATTRIBUTE_UNUSED)
68cbb7e3 344{
345 if (class == REMAINDER_REG
346 || class == HIMULT_REG
347 || class == SYSTEM_REGS)
348 return GENERAL_REGS;
349
68cbb7e3 350 return NO_REGS;
351}
352
353/* CONST_OK_FOR_LETTER_P. */
354
355int
7585fcd5 356mmix_const_ok_for_letter_p (HOST_WIDE_INT value, int c)
68cbb7e3 357{
358 return
359 (c == 'I' ? value >= 0 && value <= 255
360 : c == 'J' ? value >= 0 && value <= 65535
361 : c == 'K' ? value <= 0 && value >= -255
362 : c == 'L' ? mmix_shiftable_wyde_value (value)
363 : c == 'M' ? value == 0
364 : c == 'N' ? mmix_shiftable_wyde_value (~value)
365 : c == 'O' ? (value == 3 || value == 5 || value == 9
366 || value == 17)
367 : 0);
368}
369
370/* CONST_DOUBLE_OK_FOR_LETTER_P. */
371
372int
7585fcd5 373mmix_const_double_ok_for_letter_p (rtx value, int c)
68cbb7e3 374{
375 return
376 (c == 'G' ? value == CONST0_RTX (GET_MODE (value))
377 : 0);
378}
379
380/* EXTRA_CONSTRAINT.
381 We need this since our constants are not always expressible as
382 CONST_INT:s, but rather often as CONST_DOUBLE:s. */
383
384int
7585fcd5 385mmix_extra_constraint (rtx x, int c, int strict)
68cbb7e3 386{
387 HOST_WIDEST_INT value;
388
0103ffd2 389 /* When checking for an address, we need to handle strict vs. non-strict
390 register checks. Don't use address_operand, but instead its
391 equivalent (its callee, which it is just a wrapper for),
392 memory_operand_p and the strict-equivalent strict_memory_address_p. */
68cbb7e3 393 if (c == 'U')
0103ffd2 394 return
395 strict
396 ? strict_memory_address_p (Pmode, x)
397 : memory_address_p (Pmode, x);
68cbb7e3 398
f0b228a5 399 /* R asks whether x is to be loaded with GETA or something else. Right
400 now, only a SYMBOL_REF and LABEL_REF can fit for
401 TARGET_BASE_ADDRESSES.
402
403 Only constant symbolic addresses apply. With TARGET_BASE_ADDRESSES,
404 we just allow straight LABEL_REF or SYMBOL_REFs with SYMBOL_REF_FLAG
405 set right now; only function addresses and code labels. If we change
406 to let SYMBOL_REF_FLAG be set on other symbols, we have to check
407 inside CONST expressions. When TARGET_BASE_ADDRESSES is not in
408 effect, a "raw" constant check together with mmix_constant_address_p
409 is all that's needed; we want all constant addresses to be loaded
410 with GETA then. */
411 if (c == 'R')
412 return
413 GET_CODE (x) != CONST_INT && GET_CODE (x) != CONST_DOUBLE
414 && mmix_constant_address_p (x)
415 && (! TARGET_BASE_ADDRESSES
416 || (GET_CODE (x) == LABEL_REF
417 || (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_FLAG (x))));
418
68cbb7e3 419 if (GET_CODE (x) != CONST_DOUBLE || GET_MODE (x) != VOIDmode)
420 return 0;
421
422 value = mmix_intval (x);
423
424 /* We used to map Q->J, R->K, S->L, T->N, U->O, but we don't have to any
f0b228a5 425 more ('U' taken for address_operand, 'R' similarly). Some letters map
426 outside of CONST_INT, though; we still use 'S' and 'T'. */
68cbb7e3 427 if (c == 'S')
428 return mmix_shiftable_wyde_value (value);
429 else if (c == 'T')
430 return mmix_shiftable_wyde_value (~value);
431 return 0;
432}
433
434/* DYNAMIC_CHAIN_ADDRESS. */
435
436rtx
7585fcd5 437mmix_dynamic_chain_address (rtx frame)
68cbb7e3 438{
439 /* FIXME: the frame-pointer is stored at offset -8 from the current
440 frame-pointer. Unfortunately, the caller assumes that a
441 frame-pointer is present for *all* previous frames. There should be
442 a way to say that that cannot be done, like for RETURN_ADDR_RTX. */
443 return plus_constant (frame, -8);
444}
445
446/* STARTING_FRAME_OFFSET. */
447
448int
7585fcd5 449mmix_starting_frame_offset (void)
68cbb7e3 450{
451 /* The old frame pointer is in the slot below the new one, so
452 FIRST_PARM_OFFSET does not need to depend on whether the
453 frame-pointer is needed or not. We have to adjust for the register
454 stack pointer being located below the saved frame pointer.
455 Similarly, we store the return address on the stack too, for
456 exception handling, and always if we save the register stack pointer. */
457 return
458 (-8
459 + (MMIX_CFUN_HAS_LANDING_PAD
460 ? -16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? -8 : 0)));
461}
462
463/* RETURN_ADDR_RTX. */
464
465rtx
7585fcd5 466mmix_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
68cbb7e3 467{
468 return count == 0
469 ? (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS
af08e904 470 /* FIXME: Set frame_alias_set on the following. (Why?)
471 See mmix_initial_elimination_offset for the reason we can't use
472 get_hard_reg_initial_val for both. Always using a stack slot
473 and not a register would be suboptimal. */
68cbb7e3 474 ? validize_mem (gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, -16)))
475 : get_hard_reg_initial_val (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM))
476 : NULL_RTX;
477}
478
479/* SETUP_FRAME_ADDRESSES. */
480
481void
7585fcd5 482mmix_setup_frame_addresses (void)
68cbb7e3 483{
484 /* Nothing needed at the moment. */
485}
486
487/* The difference between the (imaginary) frame pointer and the stack
488 pointer. Used to eliminate the frame pointer. */
489
490int
7585fcd5 491mmix_initial_elimination_offset (int fromreg, int toreg)
68cbb7e3 492{
493 int regno;
494 int fp_sp_offset
495 = (get_frame_size () + current_function_outgoing_args_size + 7) & ~7;
496
af08e904 497 /* There is no actual offset between these two virtual values, but for
498 the frame-pointer, we have the old one in the stack position below
499 it, so the offset for the frame-pointer to the stack-pointer is one
500 octabyte larger. */
68cbb7e3 501 if (fromreg == MMIX_ARG_POINTER_REGNUM
502 && toreg == MMIX_FRAME_POINTER_REGNUM)
503 return 0;
504
505 /* The difference is the size of local variables plus the size of
506 outgoing function arguments that would normally be passed as
507 registers but must be passed on stack because we're out of
508 function-argument registers. Only global saved registers are
509 counted; the others go on the register stack.
510
511 The frame-pointer is counted too if it is what is eliminated, as we
512 need to balance the offset for it from STARTING_FRAME_OFFSET.
513
514 Also add in the slot for the register stack pointer we save if we
515 have a landing pad.
516
517 Unfortunately, we can't access $0..$14, from unwinder code easily, so
518 store the return address in a frame slot too. FIXME: Only for
519 non-leaf functions. FIXME: Always with a landing pad, because it's
520 hard to know whether we need the other at the time we know we need
521 the offset for one (and have to state it). It's a kludge until we
522 can express the register stack in the EH frame info.
523
524 We have to do alignment here; get_frame_size will not return a
525 multiple of STACK_BOUNDARY. FIXME: Add note in manual. */
526
527 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
528 regno <= 255;
529 regno++)
530 if ((regs_ever_live[regno] && ! call_used_regs[regno])
531 || IS_MMIX_EH_RETURN_DATA_REG (regno))
532 fp_sp_offset += 8;
533
534 return fp_sp_offset
535 + (MMIX_CFUN_HAS_LANDING_PAD
536 ? 16 : (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS ? 8 : 0))
537 + (fromreg == MMIX_ARG_POINTER_REGNUM ? 0 : 8);
538}
539
540/* Return an rtx for a function argument to go in a register, and 0 for
541 one that must go on stack. */
542
543rtx
7585fcd5 544mmix_function_arg (const CUMULATIVE_ARGS *argsp,
545 enum machine_mode mode,
546 tree type,
547 int named ATTRIBUTE_UNUSED,
548 int incoming)
68cbb7e3 549{
68cbb7e3 550 /* Last-argument marker. */
551 if (type == void_type_node)
552 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS)
553 ? gen_rtx_REG (mode,
554 (incoming
555 ? MMIX_FIRST_INCOMING_ARG_REGNUM
556 : MMIX_FIRST_ARG_REGNUM) + argsp->regs)
557 : NULL_RTX;
558
559 return (argsp->regs < MMIX_MAX_ARGS_IN_REGS
560 && !MUST_PASS_IN_STACK (mode, type)
561 && (GET_MODE_BITSIZE (mode) <= 64
562 || argsp->lib
563 || TARGET_LIBFUNC))
564 ? gen_rtx_REG (mode,
565 (incoming
566 ? MMIX_FIRST_INCOMING_ARG_REGNUM
567 : MMIX_FIRST_ARG_REGNUM)
568 + argsp->regs)
569 : NULL_RTX;
570}
571
572/* Returns nonzero for everything that goes by reference, 0 for
573 everything that goes by value. */
574
575int
7585fcd5 576mmix_function_arg_pass_by_reference (const CUMULATIVE_ARGS *argsp,
577 enum machine_mode mode,
578 tree type,
579 int named ATTRIBUTE_UNUSED)
68cbb7e3 580{
581 /* FIXME: Check: I'm not sure the MUST_PASS_IN_STACK check is
582 necessary. */
583 return
584 MUST_PASS_IN_STACK (mode, type)
585 || (MMIX_FUNCTION_ARG_SIZE (mode, type) > 8
586 && !TARGET_LIBFUNC
587 && !argsp->lib);
588}
589
590/* Return nonzero if regno is a register number where a parameter is
591 passed, and 0 otherwise. */
592
593int
7585fcd5 594mmix_function_arg_regno_p (int regno, int incoming)
68cbb7e3 595{
596 int first_arg_regnum
597 = incoming ? MMIX_FIRST_INCOMING_ARG_REGNUM : MMIX_FIRST_ARG_REGNUM;
598
599 return regno >= first_arg_regnum
600 && regno < first_arg_regnum + MMIX_MAX_ARGS_IN_REGS;
601}
602
603/* FUNCTION_OUTGOING_VALUE. */
604
605rtx
7585fcd5 606mmix_function_outgoing_value (tree valtype, tree func ATTRIBUTE_UNUSED)
68cbb7e3 607{
608 enum machine_mode mode = TYPE_MODE (valtype);
68cbb7e3 609 enum machine_mode cmode;
610 int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM;
611 rtx vec[MMIX_MAX_REGS_FOR_VALUE];
612 int i;
613 int nregs;
614
615 /* Return values that fit in a register need no special handling.
616 There's no register hole when parameters are passed in global
617 registers. */
618 if (TARGET_ABI_GNU
619 || GET_MODE_BITSIZE (mode) <= BITS_PER_WORD)
620 return
621 gen_rtx_REG (mode, MMIX_OUTGOING_RETURN_VALUE_REGNUM);
622
623 /* A complex type, made up of components. */
624 cmode = TYPE_MODE (TREE_TYPE (valtype));
625 nregs = ((GET_MODE_BITSIZE (mode) + BITS_PER_WORD - 1) / BITS_PER_WORD);
626
627 /* We need to take care of the effect of the register hole on return
628 values of large sizes; the last register will appear as the first
629 register, with the rest shifted. (For complex modes, this is just
630 swapped registers.) */
631
632 if (nregs > MMIX_MAX_REGS_FOR_VALUE)
68435912 633 internal_error ("too large function value type, needs %d registers,\
68cbb7e3 634 have only %d registers for this", nregs, MMIX_MAX_REGS_FOR_VALUE);
635
636 /* FIXME: Maybe we should handle structure values like this too
637 (adjusted for BLKmode), perhaps for both ABI:s. */
638 for (i = 0; i < nregs - 1; i++)
639 vec[i]
640 = gen_rtx_EXPR_LIST (VOIDmode,
641 gen_rtx_REG (cmode, first_val_regnum + i),
642 GEN_INT ((i + 1) * BITS_PER_UNIT));
643
644 vec[nregs - 1]
645 = gen_rtx_EXPR_LIST (VOIDmode,
646 gen_rtx_REG (cmode, first_val_regnum + nregs - 1),
647 GEN_INT (0));
648
649 return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs, vec));
650}
651
c715d549 652/* FUNCTION_VALUE_REGNO_P. */
653
654int
7585fcd5 655mmix_function_value_regno_p (int regno)
c715d549 656{
657 return regno == MMIX_RETURN_VALUE_REGNUM;
658}
659
68cbb7e3 660/* EH_RETURN_DATA_REGNO. */
661
662int
7585fcd5 663mmix_eh_return_data_regno (int n)
68cbb7e3 664{
665 if (n >= 0 && n < 4)
666 return MMIX_EH_RETURN_DATA_REGNO_START + n;
667
668 return INVALID_REGNUM;
669}
670
671/* EH_RETURN_STACKADJ_RTX. */
672
673rtx
7585fcd5 674mmix_eh_return_stackadj_rtx (void)
68cbb7e3 675{
676 return gen_rtx_REG (Pmode, MMIX_EH_RETURN_STACKADJ_REGNUM);
677}
678
679/* EH_RETURN_HANDLER_RTX. */
680
681rtx
7585fcd5 682mmix_eh_return_handler_rtx (void)
68cbb7e3 683{
7585fcd5 684 return gen_rtx_REG (Pmode, MMIX_INCOMING_RETURN_ADDRESS_REGNUM);
68cbb7e3 685}
686
687/* ASM_PREFERRED_EH_DATA_FORMAT. */
688
689int
7585fcd5 690mmix_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED,
691 int global ATTRIBUTE_UNUSED)
68cbb7e3 692{
693 /* This is the default (was at 2001-07-20). Revisit when needed. */
694 return DW_EH_PE_absptr;
695}
696
28c2d844 697/* Make a note that we've seen the beginning of the prologue. This
d3310704 698 matters to whether we'll translate register numbers as calculated by
2efea8c0 699 mmix_reorg. */
68cbb7e3 700
d3310704 701static void
7585fcd5 702mmix_target_asm_function_prologue (FILE *stream ATTRIBUTE_UNUSED,
703 HOST_WIDE_INT framesize ATTRIBUTE_UNUSED)
68cbb7e3 704{
d3310704 705 cfun->machine->in_prologue = 1;
706}
68cbb7e3 707
d3310704 708/* Make a note that we've seen the end of the prologue. */
68cbb7e3 709
d3310704 710static void
7585fcd5 711mmix_target_asm_function_end_prologue (FILE *stream ATTRIBUTE_UNUSED)
d3310704 712{
713 cfun->machine->in_prologue = 0;
d68ffc6f 714}
715
2efea8c0 716/* Implement TARGET_MACHINE_DEPENDENT_REORG. No actual rearrangements
717 done here; just virtually by calculating the highest saved stack
718 register number used to modify the register numbers at output time. */
d68ffc6f 719
2efea8c0 720static void
7585fcd5 721mmix_reorg (void)
d68ffc6f 722{
723 int regno;
68cbb7e3 724
725 /* We put the number of the highest saved register-file register in a
726 location convenient for the call-patterns to output. Note that we
727 don't tell dwarf2 about these registers, since it can't restore them
728 anyway. */
d68ffc6f 729 for (regno = MMIX_LAST_STACK_REGISTER_REGNUM;
68cbb7e3 730 regno >= 0;
731 regno--)
732 if ((regs_ever_live[regno] && !call_used_regs[regno])
733 || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed))
734 break;
735
d68ffc6f 736 /* Regardless of whether they're saved (they might be just read), we
737 mustn't include registers that carry parameters. We could scan the
738 insns to see whether they're actually used (and indeed do other less
739 trivial register usage analysis and transformations), but it seems
740 wasteful to optimize for unused parameter registers. As of
741 2002-04-30, regs_ever_live[n] seems to be set for only-reads too, but
742 that might change. */
743 if (!TARGET_ABI_GNU && regno < current_function_args_info.regs - 1)
744 {
745 regno = current_function_args_info.regs - 1;
746
747 /* We don't want to let this cause us to go over the limit and make
748 incoming parameter registers be misnumbered and treating the last
749 parameter register and incoming return value register call-saved.
750 Stop things at the unmodified scheme. */
751 if (regno > MMIX_RETURN_VALUE_REGNUM - 1)
752 regno = MMIX_RETURN_VALUE_REGNUM - 1;
753 }
754
755 cfun->machine->highest_saved_stack_register = regno;
68cbb7e3 756}
757
758/* TARGET_ASM_FUNCTION_EPILOGUE. */
759
4448bfa5 760static void
7585fcd5 761mmix_target_asm_function_epilogue (FILE *stream,
762 HOST_WIDE_INT locals_size ATTRIBUTE_UNUSED)
68cbb7e3 763{
d3310704 764 /* Emit an \n for readability of the generated assembly. */
765 fputc ('\n', stream);
766}
68cbb7e3 767
e7f5e241 768/* TARGET_ASM_OUTPUT_MI_THUNK. */
68cbb7e3 769
6988553d 770static void
7585fcd5 771mmix_asm_output_mi_thunk (FILE *stream,
772 tree fndecl ATTRIBUTE_UNUSED,
773 HOST_WIDE_INT delta,
774 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
775 tree func)
d3310704 776{
777 /* If you define STRUCT_VALUE to 0, rather than use STRUCT_VALUE_REGNUM,
778 (i.e. pass location of structure to return as invisible first
779 argument) you need to tweak this code too. */
780 const char *regname = reg_names[MMIX_FIRST_INCOMING_ARG_REGNUM];
68cbb7e3 781
d3310704 782 if (delta >= 0 && delta < 65536)
e7f5e241 783 fprintf (stream, "\tINCL %s,%d\n", regname, (int)delta);
d3310704 784 else if (delta < 0 && delta >= -255)
e7f5e241 785 fprintf (stream, "\tSUBU %s,%s,%d\n", regname, regname, (int)-delta);
d3310704 786 else
0b123c47 787 {
d3310704 788 mmix_output_register_setting (stream, 255, delta, 1);
7fe1d31c 789 fprintf (stream, "\tADDU %s,%s,$255\n", regname, regname);
0b123c47 790 }
791
d3310704 792 fprintf (stream, "\tJMP ");
793 assemble_name (stream, XSTR (XEXP (DECL_RTL (func), 0), 0));
794 fprintf (stream, "\n");
795}
68cbb7e3 796
d3310704 797/* FUNCTION_PROFILER. */
68cbb7e3 798
d3310704 799void
7585fcd5 800mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED,
801 int labelno ATTRIBUTE_UNUSED)
d3310704 802{
803 sorry ("function_profiler support for MMIX");
804}
68cbb7e3 805
68cbb7e3 806/* SETUP_INCOMING_VARARGS. */
807
808void
7585fcd5 809mmix_setup_incoming_varargs (CUMULATIVE_ARGS *args_so_farp,
810 enum machine_mode mode,
811 tree vartype,
812 int *pretend_sizep,
813 int second_time ATTRIBUTE_UNUSED)
68cbb7e3 814{
7ccc713a 815 /* The last named variable has been handled, but
816 args_so_farp has not been advanced for it. */
817 if (args_so_farp->regs + 1 < MMIX_MAX_ARGS_IN_REGS)
818 *pretend_sizep = (MMIX_MAX_ARGS_IN_REGS - (args_so_farp->regs + 1)) * 8;
68cbb7e3 819
820 /* We assume that one argument takes up one register here. That should
821 be true until we start messing with multi-reg parameters. */
822 if ((7 + (MMIX_FUNCTION_ARG_SIZE (mode, vartype))) / 8 != 1)
823 internal_error ("MMIX Internal: Last named vararg would not fit in a register");
824}
825
826/* EXPAND_BUILTIN_VA_ARG. */
827
828/* This is modified from the "standard" implementation of va_arg: read the
829 value from the current (padded) address and increment by the (padded)
830 size. The difference for MMIX is that if the type is
831 pass-by-reference, then perform an indirection. */
832
833rtx
7585fcd5 834mmix_expand_builtin_va_arg (tree valist, tree type)
68cbb7e3 835{
39e4b33f 836 tree ptr_size = size_int (BITS_PER_WORD / BITS_PER_UNIT);
837 tree addr_tree, type_size = NULL;
838 tree align, alignm1;
839 tree rounded_size;
68cbb7e3 840 rtx addr;
841
842 /* Compute the rounded size of the type. */
68cbb7e3 843
844 /* Get AP. */
845 addr_tree = valist;
39e4b33f 846 align = size_int (PARM_BOUNDARY / BITS_PER_UNIT);
847 alignm1 = size_int (PARM_BOUNDARY / BITS_PER_UNIT - 1);
848 if (type == error_mark_node
849 || (type_size = TYPE_SIZE_UNIT (TYPE_MAIN_VARIANT (type))) == NULL
850 || TREE_OVERFLOW (type_size))
adcdc3d7 851 /* Presumably an error; the size isn't computable. A message has
39e4b33f 852 supposedly been emitted elsewhere. */
853 rounded_size = size_zero_node;
854 else
855 rounded_size = fold (build (MULT_EXPR, sizetype,
856 fold (build (TRUNC_DIV_EXPR, sizetype,
857 fold (build (PLUS_EXPR, sizetype,
858 type_size, alignm1)),
859 align)),
860 align));
68cbb7e3 861
862 if (AGGREGATE_TYPE_P (type)
863 && GET_MODE_UNIT_SIZE (TYPE_MODE (type)) < 8
864 && GET_MODE_UNIT_SIZE (TYPE_MODE (type)) != 0)
865 {
866 /* Adjust for big-endian the location of aggregates passed in a
867 register, but where the aggregate is accessed in a shorter mode
868 than the natural register mode (i.e. it is accessed as SFmode(?),
869 SImode, HImode or QImode rather than DImode or DFmode(?)). FIXME:
870 Or should we adjust the mode in which the aggregate is read, to be
871 a register size mode? (Hum, nah, a small offset is generally
872 cheaper than a wider memory access on MMIX.) */
873 addr_tree
874 = build (PLUS_EXPR, TREE_TYPE (addr_tree), addr_tree,
39e4b33f 875 size_int ((BITS_PER_WORD / BITS_PER_UNIT)
876 - GET_MODE_UNIT_SIZE (TYPE_MODE (type))));
68cbb7e3 877 }
39e4b33f 878 else if (!integer_zerop (rounded_size))
68cbb7e3 879 {
adcdc3d7 880 if (!really_constant_p (type_size))
881 /* Varying-size types come in by reference. */
882 addr_tree
883 = build1 (INDIRECT_REF, build_pointer_type (type), addr_tree);
884 else
885 {
886 /* If the size is less than a register, then we need to pad the
887 address by adding the difference. */
888 tree addend
889 = fold (build (COND_EXPR, sizetype,
890 fold (build (GT_EXPR, sizetype,
891 rounded_size,
892 align)),
893 size_zero_node,
894 fold (build (MINUS_EXPR, sizetype,
895 rounded_size,
896 type_size))));
897 tree addr_tree1
898 = fold (build (PLUS_EXPR, TREE_TYPE (addr_tree), addr_tree,
899 addend));
900
901 /* If this type is larger than what fits in a register, then it
902 is passed by reference. */
903 addr_tree
904 = fold (build (COND_EXPR, TREE_TYPE (addr_tree1),
905 fold (build (GT_EXPR, sizetype,
906 rounded_size,
907 ptr_size)),
908 build1 (INDIRECT_REF, build_pointer_type (type),
909 addr_tree1),
910 addr_tree1));
911 }
39e4b33f 912 }
68cbb7e3 913
914 addr = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
915 addr = copy_to_reg (addr);
916
39e4b33f 917 if (!integer_zerop (rounded_size))
918 {
919 /* Compute new value for AP. For MMIX, it is always advanced by the
920 size of a register. */
921 tree t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
922 build (PLUS_EXPR, TREE_TYPE (valist), valist,
923 ptr_size));
924 TREE_SIDE_EFFECTS (t) = 1;
925 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
926 }
68cbb7e3 927
928 return addr;
929}
930
931/* TRAMPOLINE_SIZE. */
932/* Four 4-byte insns plus two 8-byte values. */
933int mmix_trampoline_size = 32;
934
935
936/* TRAMPOLINE_TEMPLATE. */
937
938void
7585fcd5 939mmix_trampoline_template (FILE *stream)
68cbb7e3 940{
af08e904 941 /* Read a value into the static-chain register and jump somewhere. The
942 static chain is stored at offset 16, and the function address is
943 stored at offset 24. */
68cbb7e3 944 /* FIXME: GCC copies this using *intsize* (tetra), when it should use
945 register size (octa). */
946 fprintf (stream, "\tGETA $255,1F\n\t");
947 fprintf (stream, "LDOU %s,$255,0\n\t",
948 reg_names[MMIX_STATIC_CHAIN_REGNUM]);
949 fprintf (stream, "LDOU $255,$255,8\n\t");
950 fprintf (stream, "GO $255,$255,0\n");
951 fprintf (stream, "1H\tOCTA 0\n\t");
952 fprintf (stream, "OCTA 0\n");
953}
954
955/* INITIALIZE_TRAMPOLINE. */
956/* Set the static chain and function pointer field in the trampoline.
957 We also SYNCID here to be sure (doesn't matter in the simulator, but
958 some day it will). */
959
960void
7585fcd5 961mmix_initialize_trampoline (rtx trampaddr, rtx fnaddr, rtx static_chain)
68cbb7e3 962{
963 emit_move_insn (gen_rtx_MEM (DImode, plus_constant (trampaddr, 16)),
964 static_chain);
965 emit_move_insn (gen_rtx_MEM (DImode,
966 plus_constant (trampaddr, 24)),
967 fnaddr);
968 emit_insn (gen_sync_icache (validize_mem (gen_rtx_MEM (DImode,
969 trampaddr)),
970 GEN_INT (mmix_trampoline_size - 1)));
971}
972
973/* We must exclude constant addresses that have an increment that is not a
974 multiple of four bytes because of restrictions of the GETA
f0b228a5 975 instruction, unless TARGET_BASE_ADDRESSES. */
68cbb7e3 976
977int
7585fcd5 978mmix_constant_address_p (rtx x)
68cbb7e3 979{
980 RTX_CODE code = GET_CODE (x);
981 int addend = 0;
f0b228a5 982 /* When using "base addresses", anything constant goes. */
983 int constant_ok = TARGET_BASE_ADDRESSES != 0;
68cbb7e3 984
68cbb7e3 985 switch (code)
986 {
987 case LABEL_REF:
988 case SYMBOL_REF:
989 return 1;
990
68cbb7e3 991 case CONSTANT_P_RTX:
992 case HIGH:
f0b228a5 993 /* FIXME: Don't know how to dissect these. Avoid them for now,
994 except we know they're constants. */
995 return constant_ok;
68cbb7e3 996
997 case CONST_INT:
998 addend = INTVAL (x);
999 break;
1000
1001 case CONST_DOUBLE:
1002 if (GET_MODE (x) != VOIDmode)
1003 /* Strange that we got here. FIXME: Check if we do. */
f0b228a5 1004 return constant_ok;
68cbb7e3 1005 addend = CONST_DOUBLE_LOW (x);
1006 break;
1007
1008 case CONST:
1009 /* Note that expressions with arithmetic on forward references don't
1010 work in mmixal. People using gcc assembly code with mmixal might
1011 need to move arrays and such to before the point of use. */
1012 if (GET_CODE (XEXP (x, 0)) == PLUS)
1013 {
1014 rtx x0 = XEXP (XEXP (x, 0), 0);
1015 rtx x1 = XEXP (XEXP (x, 0), 1);
1016
1017 if ((GET_CODE (x0) == SYMBOL_REF
1018 || GET_CODE (x0) == LABEL_REF)
1019 && (GET_CODE (x1) == CONST_INT
1020 || (GET_CODE (x1) == CONST_DOUBLE
1021 && GET_MODE (x1) == VOIDmode)))
1022 addend = mmix_intval (x1);
1023 else
f0b228a5 1024 return constant_ok;
68cbb7e3 1025 }
1026 else
f0b228a5 1027 return constant_ok;
68cbb7e3 1028 break;
1029
1030 default:
1031 return 0;
1032 }
1033
f0b228a5 1034 return constant_ok || (addend & 3) == 0;
68cbb7e3 1035}
1036
1037/* Return 1 if the address is OK, otherwise 0.
1038 Used by GO_IF_LEGITIMATE_ADDRESS. */
1039
1040int
7585fcd5 1041mmix_legitimate_address (enum machine_mode mode ATTRIBUTE_UNUSED,
1042 rtx x,
1043 int strict_checking)
68cbb7e3 1044{
1045#define MMIX_REG_OK(X) \
1046 ((strict_checking \
1047 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1048 || (reg_renumber[REGNO (X)] > 0 \
1049 && reg_renumber[REGNO (X)] <= MMIX_LAST_GENERAL_REGISTER))) \
1050 || (!strict_checking \
1051 && (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \
1052 || REGNO (X) >= FIRST_PSEUDO_REGISTER \
1053 || REGNO (X) == ARG_POINTER_REGNUM)))
1054
1055 /* We only accept:
1056 (mem reg)
1057 (mem (plus reg reg))
f0b228a5 1058 (mem (plus reg 0..255)).
1059 unless TARGET_BASE_ADDRESSES, in which case we accept all
1060 (mem constant_address) too. */
68cbb7e3 1061
1062
1063 /* (mem reg) */
1064 if (REG_P (x) && MMIX_REG_OK (x))
1065 return 1;
1066
1067 if (GET_CODE(x) == PLUS)
1068 {
1069 rtx x1 = XEXP (x, 0);
1070 rtx x2 = XEXP (x, 1);
1071
1072 /* Try swapping the order. FIXME: Do we need this? */
1073 if (! REG_P (x1))
1074 {
1075 rtx tem = x1;
1076 x1 = x2;
1077 x2 = tem;
1078 }
1079
f0b228a5 1080 /* (mem (plus (reg?) (?))) */
68cbb7e3 1081 if (!REG_P (x1) || !MMIX_REG_OK (x1))
f0b228a5 1082 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1083
f0b228a5 1084 /* (mem (plus (reg) (reg?))) */
68cbb7e3 1085 if (REG_P (x2) && MMIX_REG_OK (x2))
1086 return 1;
1087
f0b228a5 1088 /* (mem (plus (reg) (0..255?))) */
68cbb7e3 1089 if (GET_CODE (x2) == CONST_INT
1090 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1091 return 1;
f0b228a5 1092
1093 return 0;
68cbb7e3 1094 }
1095
f0b228a5 1096 return TARGET_BASE_ADDRESSES && mmix_constant_address_p (x);
68cbb7e3 1097}
1098
1099/* LEGITIMATE_CONSTANT_P. */
1100
1101int
7585fcd5 1102mmix_legitimate_constant_p (rtx x)
68cbb7e3 1103{
1104 RTX_CODE code = GET_CODE (x);
1105
1106 /* We must allow any number due to the way the cse passes works; if we
1107 do not allow any number here, general_operand will fail, and insns
1108 will fatally fail recognition instead of "softly". */
1109 if (code == CONST_INT || code == CONST_DOUBLE)
1110 return 1;
1111
1112 return CONSTANT_ADDRESS_P (x);
1113}
1114
1115/* SELECT_CC_MODE. */
1116
1117enum machine_mode
7585fcd5 1118mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED)
68cbb7e3 1119{
1120 /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to
1121 output different compare insns. Note that we do not check the
1122 validity of the comparison here. */
1123
1124 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1125 {
1126 if (op == ORDERED || op == UNORDERED || op == UNGE
1127 || op == UNGT || op == UNLE || op == UNLT)
1128 return CC_FUNmode;
1129
1130 if (op == EQ || op == NE)
1131 return CC_FPEQmode;
1132
1133 return CC_FPmode;
1134 }
1135
1136 if (op == GTU || op == LTU || op == GEU || op == LEU)
1137 return CC_UNSmode;
1138
1139 return CCmode;
1140}
1141
68cbb7e3 1142/* REVERSIBLE_CC_MODE. */
1143
1144int
7585fcd5 1145mmix_reversible_cc_mode (enum machine_mode mode)
68cbb7e3 1146{
1147 /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float
581084df 1148 compares. */
68cbb7e3 1149 return mode != CC_FPmode;
1150}
1151
fab7adbf 1152/* TARGET_RTX_COSTS. */
68cbb7e3 1153
fab7adbf 1154static bool
7585fcd5 1155mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED,
1156 int code ATTRIBUTE_UNUSED,
1157 int outer_code ATTRIBUTE_UNUSED,
1158 int *total ATTRIBUTE_UNUSED)
68cbb7e3 1159{
1160 /* For the time being, this is just a stub and we'll accept the
1161 generic calculations, until we can do measurements, at least.
1162 Say we did not modify any calculated costs. */
fab7adbf 1163 return false;
68cbb7e3 1164}
1165
68cbb7e3 1166/* REGISTER_MOVE_COST. */
1167
1168int
7585fcd5 1169mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
1170 enum reg_class from,
1171 enum reg_class to)
68cbb7e3 1172{
1173 return (from == GENERAL_REGS && from == to) ? 2 : 3;
1174}
1175
1176/* Note that we don't have a TEXT_SECTION_ASM_OP, because it has to be a
1177 compile-time constant; it's used in an asm in crtstuff.c, compiled for
1178 the target. */
1179
1180/* DATA_SECTION_ASM_OP. */
1181
1182const char *
7585fcd5 1183mmix_data_section_asm_op (void)
68cbb7e3 1184{
1185 return "\t.data ! mmixal:= 8H LOC 9B";
1186}
1187
7811991d 1188static void
7585fcd5 1189mmix_encode_section_info (tree decl, rtx rtl, int first)
68cbb7e3 1190{
1191 /* Test for an external declaration, and do nothing if it is one. */
1192 if ((TREE_CODE (decl) == VAR_DECL
91009d64 1193 && (DECL_EXTERNAL (decl) || TREE_PUBLIC (decl)))
1194 || (TREE_CODE (decl) == FUNCTION_DECL && TREE_PUBLIC (decl)))
68cbb7e3 1195 ;
ae484cc8 1196 else if (first && DECL_P (decl))
68cbb7e3 1197 {
1198 /* For non-visible declarations, add a "@" prefix, which we skip
1199 when the label is output. If the label does not have this
f0b228a5 1200 prefix, a ":" is output if -mtoplevel-symbols.
68cbb7e3 1201
1202 Note that this does not work for data that is declared extern and
1203 later defined as static. If there's code in between, that code
f0b228a5 1204 will refer to the extern declaration, and vice versa. This just
1205 means that when -mtoplevel-symbols is in use, we can just handle
1206 well-behaved ISO-compliant code. */
68cbb7e3 1207
2c129d70 1208 const char *str = XSTR (XEXP (rtl, 0), 0);
68cbb7e3 1209 int len = strlen (str);
1210 char *newstr;
1211
f0b228a5 1212 /* Why is the return type of ggc_alloc_string const? */
1213 newstr = (char *) ggc_alloc_string ("", len + 1);
68cbb7e3 1214
1215 strcpy (newstr + 1, str);
1216 *newstr = '@';
2c129d70 1217 XSTR (XEXP (rtl, 0), 0) = newstr;
68cbb7e3 1218 }
1219
f0b228a5 1220 /* Set SYMBOL_REF_FLAG for things that we want to access with GETA. We
1221 may need different options to reach for different things with GETA.
1222 For now, functions and things we know or have been told are constant. */
1223 if (TREE_CODE (decl) == FUNCTION_DECL
1224 || TREE_CONSTANT (decl)
1225 || (TREE_CODE (decl) == VAR_DECL
1226 && TREE_READONLY (decl)
1227 && !TREE_SIDE_EFFECTS (decl)
1228 && (!DECL_INITIAL (decl)
1229 || TREE_CONSTANT (DECL_INITIAL (decl)))))
2c129d70 1230 SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;
68cbb7e3 1231}
1232
7b4a38a6 1233static const char *
7585fcd5 1234mmix_strip_name_encoding (const char *name)
68cbb7e3 1235{
1236 for (; (*name == '@' || *name == '*'); name++)
1237 ;
1238
1239 return name;
1240}
1241
92c473b8 1242/* TARGET_ASM_FILE_START.
1243 We just emit a little comment for the time being. */
68cbb7e3 1244
92c473b8 1245static void
7585fcd5 1246mmix_file_start (void)
68cbb7e3 1247{
92c473b8 1248 default_file_start ();
68cbb7e3 1249
92c473b8 1250 fputs ("! mmixal:= 8H LOC Data_Section\n", asm_out_file);
68cbb7e3 1251
1252 /* Make sure each file starts with the text section. */
1253 text_section ();
1254}
1255
f6940372 1256/* TARGET_ASM_FILE_END. */
68cbb7e3 1257
f6940372 1258static void
7585fcd5 1259mmix_file_end (void)
68cbb7e3 1260{
1261 /* Make sure each file ends with the data section. */
1262 data_section ();
1263}
1264
68cbb7e3 1265/* ASM_OUTPUT_SOURCE_FILENAME. */
1266
1267void
7585fcd5 1268mmix_asm_output_source_filename (FILE *stream, const char *name)
68cbb7e3 1269{
1270 fprintf (stream, "# 1 ");
1271 OUTPUT_QUOTED_STRING (stream, name);
1272 fprintf (stream, "\n");
1273}
1274
1275/* OUTPUT_QUOTED_STRING. */
1276
1277void
7585fcd5 1278mmix_output_quoted_string (FILE *stream, const char *string, int length)
68cbb7e3 1279{
1280 const char * string_end = string + length;
25037517 1281 static const char *const unwanted_chars = "\"[]\\";
68cbb7e3 1282
1283 /* Output "any character except newline and double quote character". We
1284 play it safe and avoid all control characters too. We also do not
1285 want [] as characters, should input be passed through m4 with [] as
1286 quotes. Further, we avoid "\", because the GAS port handles it as a
1287 quoting character. */
1288 while (string < string_end)
1289 {
1290 if (*string
1291 && (unsigned char) *string < 128
1292 && !ISCNTRL (*string)
1293 && strchr (unwanted_chars, *string) == NULL)
1294 {
1295 fputc ('"', stream);
1296 while (*string
1297 && (unsigned char) *string < 128
1298 && !ISCNTRL (*string)
1299 && strchr (unwanted_chars, *string) == NULL
1300 && string < string_end)
1301 {
1302 fputc (*string, stream);
1303 string++;
1304 }
1305 fputc ('"', stream);
1306 if (string < string_end)
1307 fprintf (stream, ",");
1308 }
1309 if (string < string_end)
1310 {
1311 fprintf (stream, "#%x", *string & 255);
1312 string++;
1313 if (string < string_end)
1314 fprintf (stream, ",");
1315 }
1316 }
1317}
1318
1319/* ASM_OUTPUT_SOURCE_LINE. */
1320
1321void
7585fcd5 1322mmix_asm_output_source_line (FILE *stream, int lineno)
68cbb7e3 1323{
1324 fprintf (stream, "# %d ", lineno);
1325 OUTPUT_QUOTED_STRING (stream, main_input_filename);
1326 fprintf (stream, "\n");
1327}
1328
58356836 1329/* Target hook for assembling integer objects. Use mmix_print_operand
1330 for WYDE and TETRA. Use mmix_output_octa to output 8-byte
1331 CONST_DOUBLEs. */
68cbb7e3 1332
58356836 1333static bool
7585fcd5 1334mmix_assemble_integer (rtx x, unsigned int size, int aligned_p)
68cbb7e3 1335{
58356836 1336 if (aligned_p)
1337 switch (size)
1338 {
4f4e478d 1339 /* We handle a limited number of types of operands in here. But
1340 that's ok, because we can punt to generic functions. We then
5c3d1711 1341 pretend that aligned data isn't needed, so the usual .<pseudo>
1342 syntax is used (which works for aligned data too). We actually
1343 *must* do that, since we say we don't have simple aligned
1344 pseudos, causing this function to be called. We just try and
1345 keep as much compatibility as possible with mmixal syntax for
1346 normal cases (i.e. without GNU extensions and C only). */
58356836 1347 case 1:
4f4e478d 1348 if (GET_CODE (x) != CONST_INT)
1349 {
1350 aligned_p = 0;
1351 break;
1352 }
58356836 1353 fputs ("\tBYTE\t", asm_out_file);
1354 mmix_print_operand (asm_out_file, x, 'B');
1355 fputc ('\n', asm_out_file);
1356 return true;
1357
1358 case 2:
4f4e478d 1359 if (GET_CODE (x) != CONST_INT)
1360 {
1361 aligned_p = 0;
1362 break;
1363 }
58356836 1364 fputs ("\tWYDE\t", asm_out_file);
1365 mmix_print_operand (asm_out_file, x, 'W');
1366 fputc ('\n', asm_out_file);
1367 return true;
1368
1369 case 4:
60bb373d 1370 if (GET_CODE (x) != CONST_INT)
4f4e478d 1371 {
1372 aligned_p = 0;
1373 break;
1374 }
58356836 1375 fputs ("\tTETRA\t", asm_out_file);
1376 mmix_print_operand (asm_out_file, x, 'L');
1377 fputc ('\n', asm_out_file);
1378 return true;
1379
1380 case 8:
1381 if (GET_CODE (x) == CONST_DOUBLE)
4f4e478d 1382 /* We don't get here anymore for CONST_DOUBLE, because DImode
1383 isn't expressed as CONST_DOUBLE, and DFmode is handled
1384 elsewhere. */
1385 abort ();
1386 assemble_integer_with_op ("\tOCTA\t", x);
58356836 1387 return true;
1388 }
1389 return default_assemble_integer (x, size, aligned_p);
68cbb7e3 1390}
1391
1392/* ASM_OUTPUT_ASCII. */
1393
1394void
7585fcd5 1395mmix_asm_output_ascii (FILE *stream, const char *string, int length)
68cbb7e3 1396{
1397 while (length > 0)
1398 {
1399 int chunk_size = length > 60 ? 60 : length;
1400 fprintf (stream, "\tBYTE ");
1401 mmix_output_quoted_string (stream, string, chunk_size);
1402 string += chunk_size;
1403 length -= chunk_size;
1404 fprintf (stream, "\n");
1405 }
1406}
1407
1408/* ASM_OUTPUT_ALIGNED_COMMON. */
1409
1410void
7585fcd5 1411mmix_asm_output_aligned_common (FILE *stream,
1412 const char *name,
1413 int size,
1414 int align)
68cbb7e3 1415{
1416 /* This is mostly the elfos.h one. There doesn't seem to be a way to
1417 express this in a mmixal-compatible way. */
1418 fprintf (stream, "\t.comm\t");
1419 assemble_name (stream, name);
1420 fprintf (stream, ",%u,%u ! mmixal-incompatible COMMON\n",
1421 size, align / BITS_PER_UNIT);
1422}
1423
1424/* ASM_OUTPUT_ALIGNED_LOCAL. */
1425
1426void
7585fcd5 1427mmix_asm_output_aligned_local (FILE *stream,
1428 const char *name,
1429 int size,
1430 int align)
68cbb7e3 1431{
1432 data_section ();
1433
1434 ASM_OUTPUT_ALIGN (stream, exact_log2 (align/BITS_PER_UNIT));
1435 assemble_name (stream, name);
1436 fprintf (stream, "\tLOC @+%d\n", size);
1437}
1438
1439/* ASM_OUTPUT_LABEL. */
1440
1441void
7585fcd5 1442mmix_asm_output_label (FILE *stream, const char *name)
68cbb7e3 1443{
1444 assemble_name (stream, name);
1445 fprintf (stream, "\tIS @\n");
1446}
1447
1448/* ASM_DECLARE_REGISTER_GLOBAL. */
1449
1450void
7585fcd5 1451mmix_asm_declare_register_global (FILE *stream ATTRIBUTE_UNUSED,
1452 tree decl ATTRIBUTE_UNUSED,
1453 int regno ATTRIBUTE_UNUSED,
1454 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1455{
1456 /* Nothing to do here, but there *will* be, therefore the framework is
1457 here. */
1458}
1459
68cbb7e3 1460/* ASM_WEAKEN_LABEL. */
1461
1462void
7585fcd5 1463mmix_asm_weaken_label (FILE *stream ATTRIBUTE_UNUSED,
1464 const char *name ATTRIBUTE_UNUSED)
68cbb7e3 1465{
7fe1d31c 1466 fprintf (stream, "\t.weak ");
68cbb7e3 1467 assemble_name (stream, name);
7fe1d31c 1468 fprintf (stream, " ! mmixal-incompatible\n");
68cbb7e3 1469}
1470
1471/* MAKE_DECL_ONE_ONLY. */
1472
1473void
7585fcd5 1474mmix_make_decl_one_only (tree decl)
68cbb7e3 1475{
1476 DECL_WEAK (decl) = 1;
1477}
1478
1479/* ASM_OUTPUT_LABELREF.
1480 Strip GCC's '*' and our own '@'. No order is assumed. */
1481
1482void
7585fcd5 1483mmix_asm_output_labelref (FILE *stream, const char *name)
68cbb7e3 1484{
91009d64 1485 int is_extern = 1;
68cbb7e3 1486
1487 for (; (*name == '@' || *name == '*'); name++)
1488 if (*name == '@')
91009d64 1489 is_extern = 0;
68cbb7e3 1490
1491 asm_fprintf (stream, "%s%U%s",
1492 is_extern && TARGET_TOPLEVEL_SYMBOLS ? ":" : "",
1493 name);
1494}
1495
68cbb7e3 1496/* ASM_OUTPUT_DEF. */
1497
1498void
7585fcd5 1499mmix_asm_output_def (FILE *stream, const char *name, const char *value)
68cbb7e3 1500{
1501 assemble_name (stream, name);
1502 fprintf (stream, "\tIS ");
1503 assemble_name (stream, value);
1504 fputc ('\n', stream);
1505}
1506
68cbb7e3 1507/* PRINT_OPERAND. */
1508
1509void
7585fcd5 1510mmix_print_operand (FILE *stream, rtx x, int code)
68cbb7e3 1511{
1512 /* When we add support for different codes later, we can, when needed,
1513 drop through to the main handler with a modified operand. */
1514 rtx modified_x = x;
d68ffc6f 1515 int regno = x != NULL_RTX && REG_P (x) ? REGNO (x) : 0;
68cbb7e3 1516
1517 switch (code)
1518 {
1519 /* Unrelated codes are in alphabetic order. */
1520
91009d64 1521 case '+':
1522 /* For conditional branches, output "P" for a probable branch. */
1523 if (TARGET_BRANCH_PREDICT)
1524 {
1525 x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
1526 if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
1527 putc ('P', stream);
1528 }
1529 return;
1530
0b123c47 1531 case '.':
1532 /* For the %d in POP %d,0. */
1533 fprintf (stream, "%d", MMIX_POP_ARGUMENT ());
1534 return;
1535
68cbb7e3 1536 case 'B':
1537 if (GET_CODE (x) != CONST_INT)
1538 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1539 fprintf (stream, "%d", (int) (INTVAL (x) & 0xff));
1540 return;
1541
1542 case 'H':
1543 /* Highpart. Must be general register, and not the last one, as
1544 that one cannot be part of a consecutive register pair. */
d68ffc6f 1545 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1546 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1547
1548 /* This is big-endian, so the high-part is the first one. */
d68ffc6f 1549 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1550 return;
1551
1552 case 'L':
1553 /* Lowpart. Must be CONST_INT or general register, and not the last
1554 one, as that one cannot be part of a consecutive register pair. */
1555 if (GET_CODE (x) == CONST_INT)
1556 {
1557 fprintf (stream, "#%lx",
1558 (unsigned long) (INTVAL (x)
1559 & ((unsigned int) 0x7fffffff * 2 + 1)));
1560 return;
1561 }
1562
1563 if (GET_CODE (x) == SYMBOL_REF)
1564 {
1565 output_addr_const (stream, x);
1566 return;
1567 }
1568
d68ffc6f 1569 if (regno > MMIX_LAST_GENERAL_REGISTER - 1)
1570 internal_error ("MMIX Internal: Bad register: %d", regno);
68cbb7e3 1571
1572 /* This is big-endian, so the low-part is + 1. */
d68ffc6f 1573 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno) + 1]);
68cbb7e3 1574 return;
1575
1576 /* Can't use 'a' because that's a generic modifier for address
1577 output. */
1578 case 'A':
1579 mmix_output_shiftvalue_op_from_str (stream, "ANDN",
1580 ~(unsigned HOST_WIDEST_INT)
1581 mmix_intval (x));
1582 return;
1583
1584 case 'i':
1585 mmix_output_shiftvalue_op_from_str (stream, "INC",
1586 (unsigned HOST_WIDEST_INT)
1587 mmix_intval (x));
1588 return;
1589
1590 case 'o':
1591 mmix_output_shiftvalue_op_from_str (stream, "OR",
1592 (unsigned HOST_WIDEST_INT)
1593 mmix_intval (x));
1594 return;
1595
1596 case 's':
1597 mmix_output_shiftvalue_op_from_str (stream, "SET",
1598 (unsigned HOST_WIDEST_INT)
1599 mmix_intval (x));
1600 return;
1601
1602 case 'd':
1603 case 'D':
1604 mmix_output_condition (stream, x, (code == 'D'));
1605 return;
1606
1607 case 'e':
1608 /* Output an extra "e" to make fcmpe, fune. */
1609 if (TARGET_FCMP_EPSILON)
1610 fprintf (stream, "e");
1611 return;
1612
1613 case 'm':
1614 /* Output the number minus 1. */
1615 if (GET_CODE (x) != CONST_INT)
1616 {
1617 fatal_insn ("MMIX Internal: Bad value for 'm', not a CONST_INT",
1618 x);
1619 }
1620 fprintf (stream, HOST_WIDEST_INT_PRINT_DEC,
1621 (HOST_WIDEST_INT) (mmix_intval (x) - 1));
1622 return;
1623
1624 case 'p':
1625 /* Store the number of registers we want to save. This was setup
1626 by the prologue. The actual operand contains the number of
1627 registers to pass, but we don't use it currently. Anyway, we
1628 need to output the number of saved registers here. */
d68ffc6f 1629 fprintf (stream, "%d",
1630 cfun->machine->highest_saved_stack_register + 1);
68cbb7e3 1631 return;
1632
1633 case 'r':
1634 /* Store the register to output a constant to. */
1635 if (! REG_P (x))
68435912 1636 fatal_insn ("MMIX Internal: Expected a register, not this", x);
d68ffc6f 1637 mmix_output_destination_register = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1638 return;
1639
1640 case 'I':
1641 /* Output the constant. Note that we use this for floats as well. */
1642 if (GET_CODE (x) != CONST_INT
1643 && (GET_CODE (x) != CONST_DOUBLE
1644 || (GET_MODE (x) != VOIDmode && GET_MODE (x) != DFmode
1645 && GET_MODE (x) != SFmode)))
68435912 1646 fatal_insn ("MMIX Internal: Expected a constant, not this", x);
68cbb7e3 1647 mmix_output_register_setting (stream,
1648 mmix_output_destination_register,
1649 mmix_intval (x), 0);
1650 return;
1651
1652 case 'U':
1653 /* An U for unsigned, if TARGET_ZERO_EXTEND. Ignore the operand. */
1654 if (TARGET_ZERO_EXTEND)
1655 putc ('U', stream);
1656 return;
1657
1658 case 'v':
1659 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) mmix_intval (x));
1660 return;
1661
1662 case 'V':
1663 mmix_output_shifted_value (stream, (HOST_WIDEST_INT) ~mmix_intval (x));
1664 return;
1665
1666 case 'W':
1667 if (GET_CODE (x) != CONST_INT)
1668 fatal_insn ("MMIX Internal: Expected a CONST_INT, not this", x);
1669 fprintf (stream, "#%x", (int) (INTVAL (x) & 0xffff));
1670 return;
1671
1672 case 0:
1673 /* Nothing to do. */
1674 break;
1675
1676 default:
1677 /* Presumably there's a missing case above if we get here. */
1678 internal_error ("MMIX Internal: Missing `%c' case in mmix_print_operand", code);
1679 }
1680
1681 switch (GET_CODE (modified_x))
1682 {
1683 case REG:
d68ffc6f 1684 regno = REGNO (modified_x);
1685 if (regno >= FIRST_PSEUDO_REGISTER)
1686 internal_error ("MMIX Internal: Bad register: %d", regno);
1687 fprintf (stream, "%s", reg_names[MMIX_OUTPUT_REGNO (regno)]);
68cbb7e3 1688 return;
1689
1690 case MEM:
1691 output_address (XEXP (modified_x, 0));
1692 return;
1693
1694 case CONST_INT:
1695 /* For -2147483648, mmixal complains that the constant does not fit
1696 in 4 bytes, so let's output it as hex. Take care to handle hosts
1697 where HOST_WIDE_INT is longer than an int.
1698
1699 Print small constants +-255 using decimal. */
1700
1701 if (INTVAL (modified_x) > -256 && INTVAL (modified_x) < 256)
1702 fprintf (stream, "%d", (int) (INTVAL (modified_x)));
1703 else
1704 fprintf (stream, "#%x",
1705 (int) (INTVAL (modified_x)) & (unsigned int) ~0);
1706 return;
1707
1708 case CONST_DOUBLE:
1709 /* Do somewhat as CONST_INT. */
58356836 1710 mmix_output_octa (stream, mmix_intval (modified_x), 0);
68cbb7e3 1711 return;
1712
1713 case CONST:
1714 output_addr_const (stream, modified_x);
1715 return;
1716
1717 default:
1718 /* No need to test for all strange things. Let output_addr_const do
1719 it for us. */
1720 if (CONSTANT_P (modified_x)
1721 /* Strangely enough, this is not included in CONSTANT_P.
1722 FIXME: Ask/check about sanity here. */
1723 || GET_CODE (modified_x) == CODE_LABEL)
1724 {
1725 output_addr_const (stream, modified_x);
1726 return;
1727 }
1728
1729 /* We need the original here. */
1730 fatal_insn ("MMIX Internal: Cannot decode this operand", x);
1731 }
1732}
1733
1734/* PRINT_OPERAND_PUNCT_VALID_P. */
1735
1736int
7585fcd5 1737mmix_print_operand_punct_valid_p (int code ATTRIBUTE_UNUSED)
68cbb7e3 1738{
91009d64 1739 /* A '+' is used for branch prediction, similar to other ports. */
0b123c47 1740 return code == '+'
1741 /* A '.' is used for the %d in the POP %d,0 return insn. */
1742 || code == '.';
68cbb7e3 1743}
1744
1745/* PRINT_OPERAND_ADDRESS. */
1746
1747void
7585fcd5 1748mmix_print_operand_address (FILE *stream, rtx x)
68cbb7e3 1749{
1750 if (REG_P (x))
1751 {
1752 /* I find the generated assembly code harder to read without
1753 the ",0". */
d68ffc6f 1754 fprintf (stream, "%s,0", reg_names[MMIX_OUTPUT_REGNO (REGNO (x))]);
68cbb7e3 1755 return;
1756 }
1757 else if (GET_CODE (x) == PLUS)
1758 {
1759 rtx x1 = XEXP (x, 0);
1760 rtx x2 = XEXP (x, 1);
1761
68cbb7e3 1762 if (REG_P (x1))
1763 {
d68ffc6f 1764 fprintf (stream, "%s,", reg_names[MMIX_OUTPUT_REGNO (REGNO (x1))]);
68cbb7e3 1765
1766 if (REG_P (x2))
1767 {
d68ffc6f 1768 fprintf (stream, "%s",
1769 reg_names[MMIX_OUTPUT_REGNO (REGNO (x2))]);
68cbb7e3 1770 return;
1771 }
1772 else if (GET_CODE (x2) == CONST_INT
1773 && CONST_OK_FOR_LETTER_P (INTVAL (x2), 'I'))
1774 {
1775 output_addr_const (stream, x2);
1776 return;
1777 }
1778 }
1779 }
1780
f0b228a5 1781 if (TARGET_BASE_ADDRESSES && mmix_legitimate_constant_p (x))
1782 {
1783 output_addr_const (stream, x);
1784 return;
1785 }
1786
68cbb7e3 1787 fatal_insn ("MMIX Internal: This is not a recognized address", x);
1788}
1789
1790/* ASM_OUTPUT_REG_PUSH. */
1791
1792void
7585fcd5 1793mmix_asm_output_reg_push (FILE *stream, int regno)
68cbb7e3 1794{
1795 fprintf (stream, "\tSUBU %s,%s,8\n\tSTOU %s,%s,0\n",
1796 reg_names[MMIX_STACK_POINTER_REGNUM],
1797 reg_names[MMIX_STACK_POINTER_REGNUM],
d68ffc6f 1798 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1799 reg_names[MMIX_STACK_POINTER_REGNUM]);
1800}
1801
1802/* ASM_OUTPUT_REG_POP. */
1803
1804void
7585fcd5 1805mmix_asm_output_reg_pop (FILE *stream, int regno)
68cbb7e3 1806{
1807 fprintf (stream, "\tLDOU %s,%s,0\n\tINCL %s,8\n",
d68ffc6f 1808 reg_names[MMIX_OUTPUT_REGNO (regno)],
68cbb7e3 1809 reg_names[MMIX_STACK_POINTER_REGNUM],
1810 reg_names[MMIX_STACK_POINTER_REGNUM]);
1811}
1812
1813/* ASM_OUTPUT_ADDR_DIFF_ELT. */
1814
1815void
7585fcd5 1816mmix_asm_output_addr_diff_elt (FILE *stream,
1817 rtx body ATTRIBUTE_UNUSED,
1818 int value,
1819 int rel)
68cbb7e3 1820{
1821 fprintf (stream, "\tTETRA L%d-L%d\n", value, rel);
1822}
1823
1824/* ASM_OUTPUT_ADDR_VEC_ELT. */
1825
1826void
7585fcd5 1827mmix_asm_output_addr_vec_elt (FILE *stream, int value)
68cbb7e3 1828{
1829 fprintf (stream, "\tOCTA L:%d\n", value);
1830}
1831
1832/* ASM_OUTPUT_SKIP. */
1833
1834void
7585fcd5 1835mmix_asm_output_skip (FILE *stream, int nbytes)
68cbb7e3 1836{
1837 fprintf (stream, "\tLOC @+%d\n", nbytes);
1838}
1839
1840/* ASM_OUTPUT_ALIGN. */
1841
1842void
7585fcd5 1843mmix_asm_output_align (FILE *stream, int power)
68cbb7e3 1844{
1845 /* We need to record the needed alignment of this section in the object,
1846 so we have to output an alignment directive. Use a .p2align (not
1847 .align) so people will never have to wonder about whether the
1848 argument is in number of bytes or the log2 thereof. We do it in
1849 addition to the LOC directive, so nothing needs tweaking when
1850 copy-pasting assembly into mmixal. */
1851 fprintf (stream, "\t.p2align %d\n", power);
1852 fprintf (stream, "\tLOC @+(%d-@)&%d\n", 1 << power, (1 << power) - 1);
1853}
1854
1855/* DBX_REGISTER_NUMBER. */
1856
1857int
7585fcd5 1858mmix_dbx_register_number (int regno)
68cbb7e3 1859{
d68ffc6f 1860 /* Adjust the register number to the one it will be output as, dammit.
1861 It'd be nice if we could check the assumption that we're filling a
1862 gap, but every register between the last saved register and parameter
1863 registers might be a valid parameter register. */
1864 regno = MMIX_OUTPUT_REGNO (regno);
68cbb7e3 1865
1866 /* We need to renumber registers to get the number of the return address
1867 register in the range 0..255. It is also space-saving if registers
1868 mentioned in the call-frame information (which uses this function by
1869 defaulting DWARF_FRAME_REGNUM to DBX_REGISTER_NUMBER) are numbered
1870 0 .. 63. So map 224 .. 256+15 -> 0 .. 47 and 0 .. 223 -> 48..223+48. */
1871 return regno >= 224 ? (regno - 224) : (regno + 48);
1872}
1873
35a3065a 1874/* End of target macro support functions.
68cbb7e3 1875
7585fcd5 1876 Now the MMIX port's own functions. First the exported ones. */
68cbb7e3 1877
d3310704 1878/* Wrapper for get_hard_reg_initial_val since integrate.h isn't included
1879 from insn-emit.c. */
1880
1881rtx
7585fcd5 1882mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno)
d3310704 1883{
1884 return get_hard_reg_initial_val (mode, regno);
1885}
1886
e911aedf 1887/* Nonzero when the function epilogue is simple enough that a single
d3310704 1888 "POP %d,0" should be used even within the function. */
0b123c47 1889
1890int
7585fcd5 1891mmix_use_simple_return (void)
0b123c47 1892{
1893 int regno;
1894
1895 int stack_space_to_allocate
1896 = (current_function_outgoing_args_size
1897 + current_function_pretend_args_size
1898 + get_frame_size () + 7) & ~7;
1899
1900 if (!TARGET_USE_RETURN_INSN || !reload_completed)
1901 return 0;
1902
1903 for (regno = 255;
1904 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1905 regno--)
1906 /* Note that we assume that the frame-pointer-register is one of these
1907 registers, in which case we don't count it here. */
1908 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
1909 && regs_ever_live[regno] && !call_used_regs[regno]))
1910 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1911 return 0;
1912
1913 if (frame_pointer_needed)
1914 stack_space_to_allocate += 8;
1915
1916 if (MMIX_CFUN_HAS_LANDING_PAD)
1917 stack_space_to_allocate += 16;
1918 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1919 stack_space_to_allocate += 8;
1920
1921 return stack_space_to_allocate == 0;
1922}
1923
d3310704 1924
1925/* Expands the function prologue into RTX. */
1926
1927void
7585fcd5 1928mmix_expand_prologue (void)
d3310704 1929{
1930 HOST_WIDE_INT locals_size = get_frame_size ();
1931 int regno;
1932 HOST_WIDE_INT stack_space_to_allocate
1933 = (current_function_outgoing_args_size
1934 + current_function_pretend_args_size
1935 + locals_size + 7) & ~7;
1936 HOST_WIDE_INT offset = -8;
1937
1938 /* Add room needed to save global non-register-stack registers. */
1939 for (regno = 255;
1940 regno >= MMIX_FIRST_GLOBAL_REGNUM;
1941 regno--)
1942 /* Note that we assume that the frame-pointer-register is one of these
1943 registers, in which case we don't count it here. */
1944 if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
1945 && regs_ever_live[regno] && !call_used_regs[regno]))
1946 || IS_MMIX_EH_RETURN_DATA_REG (regno))
1947 stack_space_to_allocate += 8;
1948
1949 /* If we do have a frame-pointer, add room for it. */
1950 if (frame_pointer_needed)
1951 stack_space_to_allocate += 8;
1952
1953 /* If we have a non-local label, we need to be able to unwind to it, so
1954 store the current register stack pointer. Also store the return
1955 address if we do that. */
1956 if (MMIX_CFUN_HAS_LANDING_PAD)
1957 stack_space_to_allocate += 16;
1958 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
1959 /* If we do have a saved return-address slot, add room for it. */
1960 stack_space_to_allocate += 8;
1961
1962 /* Make sure we don't get an unaligned stack. */
1963 if ((stack_space_to_allocate % 8) != 0)
1964 internal_error ("stack frame not a multiple of 8 bytes: %d",
1965 stack_space_to_allocate);
1966
1967 if (current_function_pretend_args_size)
1968 {
1969 int mmix_first_vararg_reg
1970 = (MMIX_FIRST_INCOMING_ARG_REGNUM
1971 + (MMIX_MAX_ARGS_IN_REGS
1972 - current_function_pretend_args_size / 8));
1973
1974 for (regno
1975 = MMIX_FIRST_INCOMING_ARG_REGNUM + MMIX_MAX_ARGS_IN_REGS - 1;
1976 regno >= mmix_first_vararg_reg;
1977 regno--)
1978 {
1979 if (offset < 0)
1980 {
1981 HOST_WIDE_INT stack_chunk
1982 = stack_space_to_allocate > (256 - 8)
1983 ? (256 - 8) : stack_space_to_allocate;
1984
1985 mmix_emit_sp_add (-stack_chunk);
1986 offset += stack_chunk;
1987 stack_space_to_allocate -= stack_chunk;
1988 }
1989
1990 /* These registers aren't actually saved (as in "will be
1991 restored"), so don't tell DWARF2 they're saved. */
1992 emit_move_insn (gen_rtx_MEM (DImode,
1993 plus_constant (stack_pointer_rtx,
1994 offset)),
1995 gen_rtx_REG (DImode, regno));
1996 offset -= 8;
1997 }
1998 }
1999
2000 /* Store the frame-pointer. */
2001
2002 if (frame_pointer_needed)
2003 {
2004 rtx insn;
2005
2006 if (offset < 0)
2007 {
2008 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2009 HOST_WIDE_INT stack_chunk
2010 = stack_space_to_allocate > (256 - 8 - 8)
2011 ? (256 - 8 - 8) : stack_space_to_allocate;
2012
2013 mmix_emit_sp_add (-stack_chunk);
2014
2015 offset += stack_chunk;
2016 stack_space_to_allocate -= stack_chunk;
2017 }
2018
2019 insn = emit_move_insn (gen_rtx_MEM (DImode,
2020 plus_constant (stack_pointer_rtx,
2021 offset)),
2022 hard_frame_pointer_rtx);
2023 RTX_FRAME_RELATED_P (insn) = 1;
2024 insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
2025 stack_pointer_rtx,
2026 GEN_INT (offset + 8)));
2027 RTX_FRAME_RELATED_P (insn) = 1;
2028 offset -= 8;
2029 }
2030
2031 if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2032 {
2033 rtx tmpreg, retreg;
2034 rtx insn;
2035
2036 /* Store the return-address, if one is needed on the stack. We
2037 usually store it in a register when needed, but that doesn't work
2038 with -fexceptions. */
2039
2040 if (offset < 0)
2041 {
2042 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2043 HOST_WIDE_INT stack_chunk
2044 = stack_space_to_allocate > (256 - 8 - 8)
2045 ? (256 - 8 - 8) : stack_space_to_allocate;
2046
2047 mmix_emit_sp_add (-stack_chunk);
2048
2049 offset += stack_chunk;
2050 stack_space_to_allocate -= stack_chunk;
2051 }
2052
2053 tmpreg = gen_rtx_REG (DImode, 255);
2054 retreg = gen_rtx_REG (DImode, MMIX_rJ_REGNUM);
2055
2056 /* Dwarf2 code is confused by the use of a temporary register for
2057 storing the return address, so we have to express it as a note,
2058 which we attach to the actual store insn. */
2059 emit_move_insn (tmpreg, retreg);
2060
2061 insn = emit_move_insn (gen_rtx_MEM (DImode,
2062 plus_constant (stack_pointer_rtx,
2063 offset)),
2064 tmpreg);
2065 RTX_FRAME_RELATED_P (insn) = 1;
2066 REG_NOTES (insn)
2067 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
2068 gen_rtx_SET (VOIDmode,
2069 gen_rtx_MEM (DImode,
2070 plus_constant (stack_pointer_rtx,
2071 offset)),
2072 retreg),
2073 REG_NOTES (insn));
2074
2075 offset -= 8;
2076 }
2077 else if (MMIX_CFUN_HAS_LANDING_PAD)
2078 offset -= 8;
2079
2080 if (MMIX_CFUN_HAS_LANDING_PAD)
2081 {
2082 /* Store the register defining the numbering of local registers, so
2083 we know how long to unwind the register stack. */
2084
2085 if (offset < 0)
2086 {
2087 /* Get 8 less than otherwise, since we need to reach offset + 8. */
2088 HOST_WIDE_INT stack_chunk
2089 = stack_space_to_allocate > (256 - 8 - 8)
2090 ? (256 - 8 - 8) : stack_space_to_allocate;
2091
2092 mmix_emit_sp_add (-stack_chunk);
2093
2094 offset += stack_chunk;
2095 stack_space_to_allocate -= stack_chunk;
2096 }
2097
2098 /* We don't tell dwarf2 about this one; we just have it to unwind
2099 the register stack at landing pads. FIXME: It's a kludge because
2100 we can't describe the effect of the PUSHJ and PUSHGO insns on the
2101 register stack at the moment. Best thing would be to handle it
2102 like stack-pointer offsets. Better: some hook into dwarf2out.c
2103 to produce DW_CFA_expression:s that specify the increment of rO,
2104 and unwind it at eh_return (preferred) or at the landing pad.
2105 Then saves to $0..$G-1 could be specified through that register. */
2106
2107 emit_move_insn (gen_rtx_REG (DImode, 255),
2108 gen_rtx_REG (DImode,
2109 MMIX_rO_REGNUM));
2110 emit_move_insn (gen_rtx_MEM (DImode,
2111 plus_constant (stack_pointer_rtx, offset)),
2112 gen_rtx_REG (DImode, 255));
2113 offset -= 8;
2114 }
2115
2116 /* After the return-address and the frame-pointer, we have the local
2117 variables. They're the ones that may have an "unaligned" size. */
2118 offset -= (locals_size + 7) & ~7;
2119
2120 /* Now store all registers that are global, i.e. not saved by the
2121 register file machinery.
2122
2123 It is assumed that the frame-pointer is one of these registers, so it
2124 is explicitly excluded in the count. */
2125
2126 for (regno = 255;
2127 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2128 regno--)
2129 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
2130 && regs_ever_live[regno] && ! call_used_regs[regno])
2131 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2132 {
2133 rtx insn;
2134
2135 if (offset < 0)
2136 {
2137 HOST_WIDE_INT stack_chunk
2138 = (stack_space_to_allocate > (256 - offset - 8)
2139 ? (256 - offset - 8) : stack_space_to_allocate);
2140
2141 mmix_emit_sp_add (-stack_chunk);
2142 offset += stack_chunk;
2143 stack_space_to_allocate -= stack_chunk;
2144 }
2145
2146 insn = emit_move_insn (gen_rtx_MEM (DImode,
2147 plus_constant (stack_pointer_rtx,
2148 offset)),
2149 gen_rtx_REG (DImode, regno));
2150 RTX_FRAME_RELATED_P (insn) = 1;
2151 offset -= 8;
2152 }
2153
2154 /* Finally, allocate room for outgoing args and local vars if room
2155 wasn't allocated above. */
2156 if (stack_space_to_allocate)
2157 mmix_emit_sp_add (-stack_space_to_allocate);
2158}
2159
2160/* Expands the function epilogue into RTX. */
2161
2162void
7585fcd5 2163mmix_expand_epilogue (void)
d3310704 2164{
2165 HOST_WIDE_INT locals_size = get_frame_size ();
2166 int regno;
2167 HOST_WIDE_INT stack_space_to_deallocate
2168 = (current_function_outgoing_args_size
2169 + current_function_pretend_args_size
2170 + locals_size + 7) & ~7;
2171
2172 /* The assumption that locals_size fits in an int is asserted in
2173 mmix_expand_prologue. */
2174
2175 /* The first address to access is beyond the outgoing_args area. */
2176 int offset = current_function_outgoing_args_size;
2177
2178 /* Add the space for global non-register-stack registers.
2179 It is assumed that the frame-pointer register can be one of these
2180 registers, in which case it is excluded from the count when needed. */
2181 for (regno = 255;
2182 regno >= MMIX_FIRST_GLOBAL_REGNUM;
2183 regno--)
2184 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
2185 && regs_ever_live[regno] && !call_used_regs[regno])
2186 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2187 stack_space_to_deallocate += 8;
2188
2189 /* Add in the space for register stack-pointer. If so, always add room
2190 for the saved PC. */
2191 if (MMIX_CFUN_HAS_LANDING_PAD)
2192 stack_space_to_deallocate += 16;
2193 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2194 /* If we have a saved return-address slot, add it in. */
2195 stack_space_to_deallocate += 8;
2196
2197 /* Add in the frame-pointer. */
2198 if (frame_pointer_needed)
2199 stack_space_to_deallocate += 8;
2200
2201 /* Make sure we don't get an unaligned stack. */
2202 if ((stack_space_to_deallocate % 8) != 0)
2203 internal_error ("stack frame not a multiple of octabyte: %d",
2204 stack_space_to_deallocate);
2205
2206 /* We will add back small offsets to the stack pointer as we go.
2207 First, we restore all registers that are global, i.e. not saved by
2208 the register file machinery. */
2209
2210 for (regno = MMIX_FIRST_GLOBAL_REGNUM;
2211 regno <= 255;
2212 regno++)
2213 if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed)
2214 && regs_ever_live[regno] && !call_used_regs[regno])
2215 || IS_MMIX_EH_RETURN_DATA_REG (regno))
2216 {
2217 if (offset > 255)
2218 {
2219 mmix_emit_sp_add (offset);
2220 stack_space_to_deallocate -= offset;
2221 offset = 0;
2222 }
2223
2224 emit_move_insn (gen_rtx_REG (DImode, regno),
2225 gen_rtx_MEM (DImode,
2226 plus_constant (stack_pointer_rtx,
2227 offset)));
2228 offset += 8;
2229 }
2230
2231 /* Here is where the local variables were. As in the prologue, they
2232 might be of an unaligned size. */
2233 offset += (locals_size + 7) & ~7;
2234
2235
2236 /* The saved register stack pointer is just below the frame-pointer
2237 register. We don't need to restore it "manually"; the POP
2238 instruction does that. */
2239 if (MMIX_CFUN_HAS_LANDING_PAD)
2240 offset += 16;
2241 else if (MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS)
2242 /* The return-address slot is just below the frame-pointer register.
2243 We don't need to restore it because we don't really use it. */
2244 offset += 8;
2245
2246 /* Get back the old frame-pointer-value. */
2247 if (frame_pointer_needed)
2248 {
2249 if (offset > 255)
2250 {
2251 mmix_emit_sp_add (offset);
2252
2253 stack_space_to_deallocate -= offset;
2254 offset = 0;
2255 }
2256
2257 emit_move_insn (hard_frame_pointer_rtx,
2258 gen_rtx_MEM (DImode,
2259 plus_constant (stack_pointer_rtx,
2260 offset)));
2261 offset += 8;
2262 }
2263
2264 /* We do not need to restore pretended incoming args, just add back
2265 offset to sp. */
2266 if (stack_space_to_deallocate != 0)
2267 mmix_emit_sp_add (stack_space_to_deallocate);
2268
2269 if (current_function_calls_eh_return)
2270 /* Adjust the (normal) stack-pointer to that of the receiver.
2271 FIXME: It would be nice if we could also adjust the register stack
2272 here, but we need to express it through DWARF 2 too. */
2273 emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
2274 gen_rtx_REG (DImode,
2275 MMIX_EH_RETURN_STACKADJ_REGNUM)));
2276}
2277
68cbb7e3 2278/* Output an optimal sequence for setting a register to a specific
2279 constant. Used in an alternative for const_ints in movdi, and when
2280 using large stack-frame offsets.
2281
2282 Use do_begin_end to say if a line-starting TAB and newline before the
2283 first insn and after the last insn is wanted. */
2284
2285void
7585fcd5 2286mmix_output_register_setting (FILE *stream,
2287 int regno,
2288 HOST_WIDEST_INT value,
2289 int do_begin_end)
68cbb7e3 2290{
2291 if (do_begin_end)
2292 fprintf (stream, "\t");
2293
2294 if (mmix_shiftable_wyde_value ((unsigned HOST_WIDEST_INT) value))
2295 {
2296 /* First, the one-insn cases. */
2297 mmix_output_shiftvalue_op_from_str (stream, "SET",
2298 (unsigned HOST_WIDEST_INT)
2299 value);
2300 fprintf (stream, " %s,", reg_names[regno]);
2301 mmix_output_shifted_value (stream, (unsigned HOST_WIDEST_INT) value);
2302 }
2303 else if (mmix_shiftable_wyde_value (-(unsigned HOST_WIDEST_INT) value))
2304 {
2305 /* We do this to get a bit more legible assembly code. The next
2306 alternative is mostly redundant with this. */
2307
2308 mmix_output_shiftvalue_op_from_str (stream, "SET",
2309 -(unsigned HOST_WIDEST_INT)
2310 value);
2311 fprintf (stream, " %s,", reg_names[regno]);
2312 mmix_output_shifted_value (stream, -(unsigned HOST_WIDEST_INT) value);
2313 fprintf (stream, "\n\tNEGU %s,0,%s", reg_names[regno],
2314 reg_names[regno]);
2315 }
2316 else if (mmix_shiftable_wyde_value (~(unsigned HOST_WIDEST_INT) value))
2317 {
2318 /* Slightly more expensive, the two-insn cases. */
2319
2320 /* FIXME: We could of course also test if 0..255-N or ~(N | 1..255)
2321 is shiftable, or any other one-insn transformation of the value.
2322 FIXME: Check first if the value is "shiftable" by two loading
2323 with two insns, since it makes more readable assembly code (if
2324 anyone else cares). */
2325
2326 mmix_output_shiftvalue_op_from_str (stream, "SET",
2327 ~(unsigned HOST_WIDEST_INT)
2328 value);
2329 fprintf (stream, " %s,", reg_names[regno]);
2330 mmix_output_shifted_value (stream, ~(unsigned HOST_WIDEST_INT) value);
2331 fprintf (stream, "\n\tNOR %s,%s,0", reg_names[regno],
2332 reg_names[regno]);
2333 }
2334 else
2335 {
2336 /* The generic case. 2..4 insns. */
25037517 2337 static const char *const higher_parts[] = {"L", "ML", "MH", "H"};
68cbb7e3 2338 const char *op = "SET";
2339 const char *line_begin = "";
f0b228a5 2340 int insns = 0;
68cbb7e3 2341 int i;
f0b228a5 2342 HOST_WIDEST_INT tmpvalue = value;
68cbb7e3 2343
f0b228a5 2344 /* Compute the number of insns needed to output this constant. */
2345 for (i = 0; i < 4 && tmpvalue != 0; i++)
2346 {
2347 if (tmpvalue & 65535)
2348 insns++;
2349 tmpvalue >>= 16;
2350 }
2351 if (TARGET_BASE_ADDRESSES && insns == 3)
2352 {
2353 /* The number three is based on a static observation on
2354 ghostscript-6.52. Two and four are excluded because there
2355 are too many such constants, and each unique constant (maybe
2356 offset by 1..255) were used few times compared to other uses,
2357 e.g. addresses.
2358
2359 We use base-plus-offset addressing to force it into a global
2360 register; we just use a "LDA reg,VALUE", which will cause the
2361 assembler and linker to DTRT (for constants as well as
2362 addresses). */
2363 fprintf (stream, "LDA %s,", reg_names[regno]);
2364 mmix_output_octa (stream, value, 0);
2365 }
2366 else
68cbb7e3 2367 {
f0b228a5 2368 /* Output pertinent parts of the 4-wyde sequence.
2369 Still more to do if we want this to be optimal, but hey...
2370 Note that the zero case has been handled above. */
2371 for (i = 0; i < 4 && value != 0; i++)
68cbb7e3 2372 {
f0b228a5 2373 if (value & 65535)
2374 {
2375 fprintf (stream, "%s%s%s %s,#%x", line_begin, op,
2376 higher_parts[i], reg_names[regno],
2377 (int) (value & 65535));
2378 /* The first one sets the rest of the bits to 0, the next
2379 ones add set bits. */
2380 op = "INC";
2381 line_begin = "\n\t";
2382 }
68cbb7e3 2383
f0b228a5 2384 value >>= 16;
2385 }
68cbb7e3 2386 }
2387 }
2388
2389 if (do_begin_end)
2390 fprintf (stream, "\n");
2391}
2392
2393/* Return 1 if value is 0..65535*2**(16*N) for N=0..3.
2394 else return 0. */
2395
2396int
7585fcd5 2397mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value)
68cbb7e3 2398{
2399 /* Shift by 16 bits per group, stop when we've found two groups with
2400 nonzero bits. */
2401 int i;
2402 int has_candidate = 0;
2403
2404 for (i = 0; i < 4; i++)
2405 {
2406 if (value & 65535)
2407 {
2408 if (has_candidate)
2409 return 0;
2410 else
2411 has_candidate = 1;
2412 }
2413
2414 value >>= 16;
2415 }
2416
2417 return 1;
2418}
2419
2420/* True if this is an address_operand or a symbolic operand. */
2421
2422int
7585fcd5 2423mmix_symbolic_or_address_operand (rtx op, enum machine_mode mode)
68cbb7e3 2424{
2425 switch (GET_CODE (op))
2426 {
2427 case SYMBOL_REF:
2428 case LABEL_REF:
2429 return 1;
2430 case CONST:
2431 op = XEXP (op, 0);
2432 if ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
2433 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
2434 && (GET_CODE (XEXP (op, 1)) == CONST_INT
2435 || (GET_CODE (XEXP (op, 1)) == CONST_DOUBLE
2436 && GET_MODE (XEXP (op, 1)) == VOIDmode)))
2437 return 1;
2438 /* FALLTHROUGH */
2439 default:
2440 return address_operand (op, mode);
2441 }
2442}
2443
2444/* True if this is a register or CONST_INT (or CONST_DOUBLE for DImode).
2445 We could narrow the value down with a couple of predicated, but that
2446 doesn't seem to be worth it at the moment. */
2447
2448int
7585fcd5 2449mmix_reg_or_constant_operand (rtx op, enum machine_mode mode)
68cbb7e3 2450{
2451 return register_operand (op, mode)
2452 || (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
2453 || GET_CODE (op) == CONST_INT;
2454}
2455
2456/* True if this is a register with a condition-code mode. */
2457
2458int
7585fcd5 2459mmix_reg_cc_operand (rtx op, enum machine_mode mode)
68cbb7e3 2460{
2461 if (mode == VOIDmode)
2462 mode = GET_MODE (op);
2463
2464 return register_operand (op, mode)
2465 && (mode == CCmode || mode == CC_UNSmode || mode == CC_FPmode
2466 || mode == CC_FPEQmode || mode == CC_FUNmode);
2467}
2468
2469/* True if this is a foldable comparison operator
2470 - one where a the result of (compare:CC (reg) (const_int 0)) can be
2471 replaced by (reg). */
2472
2473int
7585fcd5 2474mmix_foldable_comparison_operator (rtx op, enum machine_mode mode)
68cbb7e3 2475{
2476 RTX_CODE code = GET_CODE (op);
2477
2478 if (mode == VOIDmode)
2479 mode = GET_MODE (op);
2480
2481 if (mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
2482 mode = GET_MODE (XEXP (op, 0));
2483
2484 return ((mode == CCmode || mode == DImode)
2485 && (code == NE || code == EQ || code == GE || code == GT
2486 || code == LE))
2487 /* FIXME: This may be a stupid trick. What happens when GCC wants to
2488 reverse the condition? Can it do that by itself? Maybe it can
2489 even reverse the condition to fit a foldable one in the first
2490 place? */
2491 || (mode == CC_UNSmode && (code == GTU || code == LEU));
2492}
2493
2494/* Like comparison_operator, but only true if this comparison operator is
2495 applied to a valid mode. Needed to avoid jump.c generating invalid
2496 code with -ffast-math (gcc.dg/20001228-1.c). */
2497
2498int
7585fcd5 2499mmix_comparison_operator (rtx op, enum machine_mode mode)
68cbb7e3 2500{
2501 RTX_CODE code = GET_CODE (op);
2502
2503 /* Comparison operators usually don't have a mode, but let's try and get
2504 one anyway for the day that changes. */
2505 if (mode == VOIDmode)
2506 mode = GET_MODE (op);
2507
2508 /* Get the mode from the first operand if we don't have one. */
2509 if (mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
2510 mode = GET_MODE (XEXP (op, 0));
2511
2512 /* FIXME: This needs to be kept in sync with the tables in
2513 mmix_output_condition. */
2514 return
2515 (mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
2516 || (mode == CC_FUNmode
2517 && (code == ORDERED || code == UNORDERED))
2518 || (mode == CC_FPmode
2519 && (code == GT || code == LT))
2520 || (mode == CC_FPEQmode
2521 && (code == NE || code == EQ))
2522 || (mode == CC_UNSmode
2523 && (code == GEU || code == GTU || code == LEU || code == LTU))
2524 || (mode == CCmode
2525 && (code == NE || code == EQ || code == GE || code == GT
2526 || code == LE || code == LT))
2527 || (mode == DImode
2528 && (code == NE || code == EQ || code == GE || code == GT
2529 || code == LE || code == LT || code == LEU || code == GTU));
2530}
2531
2532/* True if this is a register or 0 (int or float). */
2533
2534int
7585fcd5 2535mmix_reg_or_0_operand (rtx op, enum machine_mode mode)
68cbb7e3 2536{
2537 /* FIXME: Is mode calculation necessary and correct? */
2538 return
2539 op == CONST0_RTX (mode == VOIDmode ? GET_MODE (op) : mode)
2540 || register_operand (op, mode);
2541}
2542
2543/* True if this is a register or an int 0..255. */
2544
2545int
7585fcd5 2546mmix_reg_or_8bit_operand (rtx op, enum machine_mode mode)
68cbb7e3 2547{
2548 return register_operand (op, mode)
2549 || (GET_CODE (op) == CONST_INT
2550 && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'));
2551}
2552
68cbb7e3 2553/* Returns zero if code and mode is not a valid condition from a
2554 compare-type insn. Nonzero if it is. The parameter op, if non-NULL,
2555 is the comparison of mode is CC-somethingmode. */
2556
2557int
7585fcd5 2558mmix_valid_comparison (RTX_CODE code, enum machine_mode mode, rtx op)
68cbb7e3 2559{
2560 if (mode == VOIDmode && op != NULL_RTX)
2561 mode = GET_MODE (op);
2562
2563 /* We don't care to look at these, they should always be valid. */
2564 if (mode == CCmode || mode == CC_UNSmode || mode == DImode)
2565 return 1;
2566
2567 if ((mode == CC_FPmode || mode == DFmode)
2568 && (code == GT || code == LT))
2569 return 1;
2570
2571 if ((mode == CC_FPEQmode || mode == DFmode)
2572 && (code == EQ || code == NE))
2573 return 1;
2574
2575 if ((mode == CC_FUNmode || mode == DFmode)
2576 && (code == ORDERED || code == UNORDERED))
2577 return 1;
2578
2579 return 0;
2580}
2581
2582/* X and Y are two things to compare using CODE. Emit a compare insn if
2583 possible and return the rtx for the cc-reg in the proper mode, or
2584 NULL_RTX if this is not a valid comparison. */
2585
2586rtx
7585fcd5 2587mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y)
68cbb7e3 2588{
2589 enum machine_mode ccmode = SELECT_CC_MODE (code, x, y);
2590 rtx cc_reg;
2591
2592 /* FIXME: Do we get constants here? Of double mode? */
2593 enum machine_mode mode
2594 = GET_MODE (x) == VOIDmode
2595 ? GET_MODE (y)
2596 : GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT ? DFmode : DImode;
2597
2598 if (! mmix_valid_comparison (code, mode, x))
2599 return NULL_RTX;
2600
2601 cc_reg = gen_reg_rtx (ccmode);
2602
2603 /* FIXME: Can we avoid emitting a compare insn here? */
2604 if (! REG_P (x) && ! REG_P (y))
2605 x = force_reg (mode, x);
2606
68cbb7e3 2607 /* If it's not quite right yet, put y in a register. */
2608 if (! REG_P (y)
2609 && (GET_CODE (y) != CONST_INT
2610 || ! CONST_OK_FOR_LETTER_P (INTVAL (y), 'I')))
2611 y = force_reg (mode, y);
2612
2613 emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
2614 gen_rtx_COMPARE (ccmode, x, y)));
2615
2616 return cc_reg;
2617}
2618
2619/* Local (static) helper functions. */
2620
d3310704 2621static void
7585fcd5 2622mmix_emit_sp_add (HOST_WIDE_INT offset)
d3310704 2623{
2624 rtx insn;
2625
2626 if (offset < 0)
2627 {
2628 /* Negative stack-pointer adjustments are allocations and appear in
2629 the prologue only. We mark them as frame-related so unwind and
2630 debug info is properly emitted for them. */
2631 if (offset > -255)
2632 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2633 stack_pointer_rtx,
2634 GEN_INT (offset)));
2635 else
2636 {
2637 rtx tmpr = gen_rtx_REG (DImode, 255);
2638 RTX_FRAME_RELATED_P (emit_move_insn (tmpr, GEN_INT (offset))) = 1;
2639 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2640 stack_pointer_rtx, tmpr));
2641 }
2642 RTX_FRAME_RELATED_P (insn) = 1;
2643 }
2644 else
2645 {
2646 /* Positive adjustments are in the epilogue only. Don't mark them
2647 as "frame-related" for unwind info. */
2648 if (CONST_OK_FOR_LETTER_P (offset, 'L'))
2649 emit_insn (gen_adddi3 (stack_pointer_rtx,
2650 stack_pointer_rtx,
2651 GEN_INT (offset)));
2652 else
2653 {
2654 rtx tmpr = gen_rtx_REG (DImode, 255);
2655 emit_move_insn (tmpr, GEN_INT (offset));
2656 insn = emit_insn (gen_adddi3 (stack_pointer_rtx,
2657 stack_pointer_rtx, tmpr));
2658 }
2659 }
2660}
2661
68cbb7e3 2662/* Print operator suitable for doing something with a shiftable
ebb11c7b 2663 wyde. The type of operator is passed as an asm output modifier. */
68cbb7e3 2664
2665static void
7585fcd5 2666mmix_output_shiftvalue_op_from_str (FILE *stream,
2667 const char *mainop,
2668 HOST_WIDEST_INT value)
68cbb7e3 2669{
25037517 2670 static const char *const op_part[] = {"L", "ML", "MH", "H"};
68cbb7e3 2671 int i;
2672
2673 if (! mmix_shiftable_wyde_value (value))
2674 {
2675 char s[sizeof ("0xffffffffffffffff")];
2676 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2677 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2678 }
2679
2680 for (i = 0; i < 4; i++)
2681 {
2682 /* We know we're through when we find one-bits in the low
2683 16 bits. */
2684 if (value & 0xffff)
2685 {
2686 fprintf (stream, "%s%s", mainop, op_part[i]);
2687 return;
2688 }
2689 value >>= 16;
2690 }
2691
2692 /* No bits set? Then it must have been zero. */
2693 fprintf (stream, "%sL", mainop);
2694}
2695
2696/* Print a 64-bit value, optionally prefixed by assembly pseudo. */
2697
2698static void
7585fcd5 2699mmix_output_octa (FILE *stream, HOST_WIDEST_INT value, int do_begin_end)
68cbb7e3 2700{
2701 /* Snipped from final.c:output_addr_const. We need to avoid the
2702 presumed universal "0x" prefix. We can do it by replacing "0x" with
2703 "#0" here; we must avoid a space in the operands and no, the zero
2704 won't cause the number to be assumed in octal format. */
2705 char hex_format[sizeof (HOST_WIDEST_INT_PRINT_HEX)];
2706
2707 if (do_begin_end)
2708 fprintf (stream, "\tOCTA ");
2709
2710 strcpy (hex_format, HOST_WIDEST_INT_PRINT_HEX);
2711 hex_format[0] = '#';
2712 hex_format[1] = '0';
2713
2714 /* Provide a few alternative output formats depending on the number, to
2715 improve legibility of assembler output. */
2716 if ((value < (HOST_WIDEST_INT) 0 && value > (HOST_WIDEST_INT) -10000)
2717 || (value >= (HOST_WIDEST_INT) 0 && value <= (HOST_WIDEST_INT) 16384))
2718 fprintf (stream, "%d", (int) value);
2719 else if (value > (HOST_WIDEST_INT) 0
2720 && value < ((HOST_WIDEST_INT) 1 << 31) * 2)
2721 fprintf (stream, "#%x", (unsigned int) value);
2722 else
2723 fprintf (stream, hex_format, value);
2724
2725 if (do_begin_end)
2726 fprintf (stream, "\n");
2727}
2728
2729/* Print the presumed shiftable wyde argument shifted into place (to
2730 be output with an operand). */
2731
2732static void
7585fcd5 2733mmix_output_shifted_value (FILE *stream, HOST_WIDEST_INT value)
68cbb7e3 2734{
2735 int i;
2736
2737 if (! mmix_shiftable_wyde_value (value))
2738 {
2739 char s[16+2+1];
2740 sprintf (s, HOST_WIDEST_INT_PRINT_HEX, value);
2741 internal_error ("MMIX Internal: %s is not a shiftable int", s);
2742 }
2743
2744 for (i = 0; i < 4; i++)
68cbb7e3 2745 {
7585fcd5 2746 /* We know we're through when we find one-bits in the low 16 bits. */
2747 if (value & 0xffff)
2748 {
2749 fprintf (stream, "#%x", (int) (value & 0xffff));
2750 return;
2751 }
68cbb7e3 2752
2753 value >>= 16;
2754 }
2755
2756 /* No bits set? Then it must have been zero. */
2757 fprintf (stream, "0");
2758}
2759
2760/* Output an MMIX condition name corresponding to an operator
2761 and operands:
2762 (comparison_operator [(comparison_operator ...) (const_int 0)])
2763 which means we have to look at *two* operators.
2764
2765 The argument "reversed" refers to reversal of the condition (not the
2766 same as swapping the arguments). */
2767
2768static void
7585fcd5 2769mmix_output_condition (FILE *stream, rtx x, int reversed)
68cbb7e3 2770{
2771 struct cc_conv
2772 {
2773 RTX_CODE cc;
2774
2775 /* The normal output cc-code. */
2776 const char *const normal;
2777
2778 /* The reversed cc-code, or NULL if invalid. */
2779 const char *const reversed;
2780 };
2781
2782 struct cc_type_conv
2783 {
2784 enum machine_mode cc_mode;
2785
2786 /* Terminated with {NIL, NULL, NULL} */
2787 const struct cc_conv *const convs;
2788 };
2789
2790#undef CCEND
2791#define CCEND {NIL, NULL, NULL}
2792
2793 static const struct cc_conv cc_fun_convs[]
2794 = {{ORDERED, "Z", "P"},
2795 {UNORDERED, "P", "Z"},
2796 CCEND};
2797 static const struct cc_conv cc_fp_convs[]
2798 = {{GT, "P", NULL},
2799 {LT, "N", NULL},
2800 CCEND};
2801 static const struct cc_conv cc_fpeq_convs[]
2802 = {{NE, "Z", "P"},
2803 {EQ, "P", "Z"},
2804 CCEND};
2805 static const struct cc_conv cc_uns_convs[]
2806 = {{GEU, "NN", "N"},
2807 {GTU, "P", "NP"},
2808 {LEU, "NP", "P"},
2809 {LTU, "N", "NN"},
2810 CCEND};
2811 static const struct cc_conv cc_signed_convs[]
2812 = {{NE, "NZ", "Z"},
2813 {EQ, "Z", "NZ"},
2814 {GE, "NN", "N"},
2815 {GT, "P", "NP"},
2816 {LE, "NP", "P"},
2817 {LT, "N", "NN"},
2818 CCEND};
2819 static const struct cc_conv cc_di_convs[]
2820 = {{NE, "NZ", "Z"},
2821 {EQ, "Z", "NZ"},
2822 {GE, "NN", "N"},
2823 {GT, "P", "NP"},
2824 {LE, "NP", "P"},
2825 {LT, "N", "NN"},
2826 {GTU, "NZ", "Z"},
2827 {LEU, "Z", "NZ"},
2828 CCEND};
2829#undef CCEND
2830
2831 static const struct cc_type_conv cc_convs[]
2832 = {{CC_FUNmode, cc_fun_convs},
2833 {CC_FPmode, cc_fp_convs},
2834 {CC_FPEQmode, cc_fpeq_convs},
2835 {CC_UNSmode, cc_uns_convs},
2836 {CCmode, cc_signed_convs},
2837 {DImode, cc_di_convs}};
2838
3585dac7 2839 size_t i;
68cbb7e3 2840 int j;
2841
2842 enum machine_mode mode = GET_MODE (XEXP (x, 0));
2843 RTX_CODE cc = GET_CODE (x);
2844
3585dac7 2845 for (i = 0; i < ARRAY_SIZE (cc_convs); i++)
68cbb7e3 2846 {
2847 if (mode == cc_convs[i].cc_mode)
2848 {
2849 for (j = 0; cc_convs[i].convs[j].cc != NIL; j++)
2850 if (cc == cc_convs[i].convs[j].cc)
2851 {
2852 const char *mmix_cc
2853 = (reversed ? cc_convs[i].convs[j].reversed
2854 : cc_convs[i].convs[j].normal);
2855
2856 if (mmix_cc == NULL)
2857 fatal_insn ("MMIX Internal: Trying to output invalidly\
2858 reversed condition:", x);
2859
2860 fprintf (stream, "%s", mmix_cc);
2861 return;
2862 }
2863
2864 fatal_insn ("MMIX Internal: What's the CC of this?", x);
2865 }
2866 }
2867
2868 fatal_insn ("MMIX Internal: What is the CC of this?", x);
2869}
2870
2871/* Return the bit-value for a const_int or const_double. */
2872
2873static HOST_WIDEST_INT
7585fcd5 2874mmix_intval (rtx x)
68cbb7e3 2875{
2876 unsigned HOST_WIDEST_INT retval;
2877
2878 if (GET_CODE (x) == CONST_INT)
2879 return INTVAL (x);
2880
2881 /* We make a little song and dance because converting to long long in
2882 gcc-2.7.2 is broken. I still want people to be able to use it for
2883 cross-compilation to MMIX. */
2884 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == VOIDmode)
2885 {
2886 if (sizeof (HOST_WIDE_INT) < sizeof (HOST_WIDEST_INT))
2887 {
2888 retval = (unsigned) CONST_DOUBLE_LOW (x) / 2;
2889 retval *= 2;
2890 retval |= CONST_DOUBLE_LOW (x) & 1;
2891
2892 retval |=
2893 (unsigned HOST_WIDEST_INT) CONST_DOUBLE_HIGH (x)
2894 << (HOST_BITS_PER_LONG);
2895 }
2896 else
2897 retval = CONST_DOUBLE_HIGH (x);
2898
2899 return retval;
2900 }
2901
2902 if (GET_CODE (x) == CONST_DOUBLE)
2903 {
2904 REAL_VALUE_TYPE value;
2905
2906 /* FIXME: This macro is not in the manual but should be. */
2907 REAL_VALUE_FROM_CONST_DOUBLE (value, x);
2908
2909 if (GET_MODE (x) == DFmode)
2910 {
2911 long bits[2];
dc8dc4ce 2912
68cbb7e3 2913 REAL_VALUE_TO_TARGET_DOUBLE (value, bits);
2914
2915 if (sizeof (long) < sizeof (HOST_WIDEST_INT))
2916 {
2917 retval = (unsigned long) bits[1] / 2;
2918 retval *= 2;
2919 retval |= (unsigned long) bits[1] & 1;
2920 retval
2921 |= (unsigned HOST_WIDEST_INT) bits[0]
2922 << (sizeof (bits[0]) * 8);
2923 }
2924 else
2925 retval = (unsigned long) bits[1];
2926
2927 return retval;
2928 }
2929 else if (GET_MODE (x) == SFmode)
2930 {
2931 long bits;
2932 REAL_VALUE_TO_TARGET_SINGLE (value, bits);
2933
2934 return (unsigned long) bits;
2935 }
2936 }
2937
2938 fatal_insn ("MMIX Internal: This is not a constant:", x);
2939}
2940
2941/*
2942 * Local variables:
2943 * eval: (c-set-style "gnu")
2944 * indent-tabs-mode: t
2945 * End:
2946 */