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9526f064 | 1 | /* Definitions of target machine for GNU compiler. |
2 | Matsushita MN10300 series | |
038d1e19 | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
71e45bc2 | 4 | 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. |
29a404f9 | 5 | Contributed by Jeff Law (law@cygnus.com). |
6 | ||
3626e955 | 7 | This file is part of GCC. |
29a404f9 | 8 | |
3626e955 | 9 | GCC is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
29a404f9 | 13 | |
3626e955 | 14 | GCC is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
29a404f9 | 18 | |
3626e955 | 19 | You should have received a copy of the GNU General Public License |
20 | along with GCC; see the file COPYING3. If not see | |
21 | <http://www.gnu.org/licenses/>. */ | |
29a404f9 | 22 | |
23 | #undef ASM_SPEC | |
29a404f9 | 24 | #undef LIB_SPEC |
25 | #undef ENDFILE_SPEC | |
3626e955 | 26 | #undef LINK_SPEC |
1710ebef | 27 | #define LINK_SPEC "%{mrelax:%{!r:--relax}}" |
3626e955 | 28 | #undef STARTFILE_SPEC |
465707dd | 29 | #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}" |
29a404f9 | 30 | |
31 | /* Names to predefine in the preprocessor for this target machine. */ | |
32 | ||
6dfe8beb | 33 | #define TARGET_CPU_CPP_BUILTINS() \ |
34 | do \ | |
35 | { \ | |
36 | builtin_define ("__mn10300__"); \ | |
37 | builtin_define ("__MN10300__"); \ | |
c419de76 | 38 | builtin_assert ("cpu=mn10300"); \ |
39 | builtin_assert ("machine=mn10300"); \ | |
3626e955 | 40 | \ |
4879b320 | 41 | if (TARGET_AM34) \ |
42 | { \ | |
43 | builtin_define ("__AM33__=4"); \ | |
44 | builtin_define ("__AM34__"); \ | |
45 | } \ | |
46 | else if (TARGET_AM33_2) \ | |
3626e955 | 47 | { \ |
48 | builtin_define ("__AM33__=2"); \ | |
49 | builtin_define ("__AM33_2__"); \ | |
50 | } \ | |
51 | else if (TARGET_AM33) \ | |
52 | builtin_define ("__AM33__=1"); \ | |
f9e46c25 | 53 | \ |
54 | builtin_define (TARGET_ALLOW_LIW ? \ | |
55 | "__LIW__" : "__NO_LIW__");\ | |
56 | \ | |
f9b3e8f5 | 57 | builtin_define (TARGET_ALLOW_SETLB ? \ |
58 | "__SETLB__" : "__NO_SETLB__");\ | |
6dfe8beb | 59 | } \ |
60 | while (0) | |
29a404f9 | 61 | |
177dbc5b | 62 | #ifndef MN10300_OPTS_H |
63 | #include "config/mn10300/mn10300-opts.h" | |
64 | #endif | |
29a404f9 | 65 | |
4879b320 | 66 | extern enum processor_type mn10300_tune_cpu; |
b87a151a | 67 | |
8c2c40c5 | 68 | #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33) |
4879b320 | 69 | #define TARGET_AM33_2 (mn10300_processor >= PROCESSOR_AM33_2) |
70 | #define TARGET_AM34 (mn10300_processor >= PROCESSOR_AM34) | |
8c2c40c5 | 71 | |
72 | #ifndef PROCESSOR_DEFAULT | |
73 | #define PROCESSOR_DEFAULT PROCESSOR_MN10300 | |
29a404f9 | 74 | #endif |
75 | ||
29a404f9 | 76 | \f |
77 | /* Target machine storage layout */ | |
78 | ||
79 | /* Define this if most significant bit is lowest numbered | |
80 | in instructions that operate on numbered bit-fields. | |
81 | This is not true on the Matsushita MN1003. */ | |
82 | #define BITS_BIG_ENDIAN 0 | |
83 | ||
84 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
85 | /* This is not true on the Matsushita MN10300. */ | |
86 | #define BYTES_BIG_ENDIAN 0 | |
87 | ||
88 | /* Define this if most significant word of a multiword number is lowest | |
89 | numbered. | |
90 | This is not true on the Matsushita MN10300. */ | |
91 | #define WORDS_BIG_ENDIAN 0 | |
92 | ||
29a404f9 | 93 | /* Width of a word, in units (bytes). */ |
94 | #define UNITS_PER_WORD 4 | |
95 | ||
29a404f9 | 96 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ |
97 | #define PARM_BOUNDARY 32 | |
98 | ||
c910419d | 99 | /* The stack goes in 32-bit lumps. */ |
29a404f9 | 100 | #define STACK_BOUNDARY 32 |
101 | ||
102 | /* Allocation boundary (in *bits*) for the code of a function. | |
103 | 8 is the minimum boundary; it's unclear if bigger alignments | |
104 | would improve performance. */ | |
105 | #define FUNCTION_BOUNDARY 8 | |
106 | ||
09e5ce26 | 107 | /* No data type wants to be aligned rounder than this. */ |
29a404f9 | 108 | #define BIGGEST_ALIGNMENT 32 |
109 | ||
110 | /* Alignment of field after `int : 0' in a structure. */ | |
3626e955 | 111 | #define EMPTY_FIELD_BOUNDARY 32 |
29a404f9 | 112 | |
113 | /* Define this if move instructions will actually fail to work | |
114 | when given unaligned data. */ | |
115 | #define STRICT_ALIGNMENT 1 | |
116 | ||
117 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
118 | #define DEFAULT_SIGNED_CHAR 0 | |
05381348 | 119 | |
120 | #undef SIZE_TYPE | |
121 | #define SIZE_TYPE "unsigned int" | |
122 | ||
123 | #undef PTRDIFF_TYPE | |
124 | #define PTRDIFF_TYPE "int" | |
125 | ||
126 | #undef WCHAR_TYPE | |
127 | #define WCHAR_TYPE "long int" | |
128 | ||
129 | #undef WCHAR_TYPE_SIZE | |
130 | #define WCHAR_TYPE_SIZE BITS_PER_WORD | |
29a404f9 | 131 | \f |
132 | /* Standard register usage. */ | |
133 | ||
134 | /* Number of actual hardware registers. | |
135 | The hardware registers are assigned numbers for the compiler | |
136 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
137 | ||
138 | All registers that the compiler knows about must be given numbers, | |
139 | even those that are not normally considered general registers. */ | |
140 | ||
5574dbdd | 141 | #define FIRST_PSEUDO_REGISTER 52 |
142 | ||
143 | /* Specify machine-specific register numbers. The commented out entries | |
144 | are defined in mn10300.md. */ | |
145 | #define FIRST_DATA_REGNUM 0 | |
146 | #define LAST_DATA_REGNUM 3 | |
147 | #define FIRST_ADDRESS_REGNUM 4 | |
148 | /* #define PIC_REG 6 */ | |
149 | #define LAST_ADDRESS_REGNUM 8 | |
150 | /* #define SP_REG 9 */ | |
39b704c8 | 151 | #define FIRST_EXTENDED_REGNUM 10 |
5574dbdd | 152 | #define LAST_EXTENDED_REGNUM 17 |
153 | #define FIRST_FP_REGNUM 18 | |
154 | #define LAST_FP_REGNUM 49 | |
85a6eed4 | 155 | /* #define MDR_REG 50 */ |
5574dbdd | 156 | /* #define CC_REG 51 */ |
157 | #define FIRST_ARGUMENT_REGNUM 0 | |
39b704c8 | 158 | |
159 | /* Specify the registers used for certain standard purposes. | |
160 | The values of these macros are register numbers. */ | |
161 | ||
162 | /* Register to use for pushing function arguments. */ | |
5574dbdd | 163 | #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1) |
39b704c8 | 164 | |
165 | /* Base register for access to local variables of the function. */ | |
5574dbdd | 166 | #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1) |
39b704c8 | 167 | |
168 | /* Base register for access to arguments of the function. This | |
169 | is a fake register and will be eliminated into either the frame | |
170 | pointer or stack pointer. */ | |
171 | #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM | |
172 | ||
173 | /* Register in which static-chain is passed to a function. */ | |
5574dbdd | 174 | #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1) |
39b704c8 | 175 | |
29a404f9 | 176 | /* 1 for registers that have pervasive standard uses |
177 | and are not available for the register allocator. */ | |
178 | ||
179 | #define FIXED_REGISTERS \ | |
85a6eed4 | 180 | { 0, 0, 0, 0, /* data regs */ \ |
181 | 0, 0, 0, 0, /* addr regs */ \ | |
182 | 1, /* arg reg */ \ | |
183 | 1, /* sp reg */ \ | |
184 | 0, 0, 0, 0, 0, 0, 0, 0, /* extended regs */ \ | |
185 | 0, 0, /* fp regs (18-19) */ \ | |
186 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ | |
187 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (30-39) */ \ | |
188 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (40-49) */ \ | |
189 | 0, /* mdr reg */ \ | |
190 | 1 /* cc reg */ \ | |
b166356e | 191 | } |
29a404f9 | 192 | |
193 | /* 1 for registers not available across function calls. | |
194 | These must include the FIXED_REGISTERS and also any | |
195 | registers that can be used without being saved. | |
196 | The latter must include the registers where values are returned | |
197 | and the register where structure-value addresses are passed. | |
198 | Aside from that, you can include as many other registers as you | |
199 | like. */ | |
200 | ||
201 | #define CALL_USED_REGISTERS \ | |
85a6eed4 | 202 | { 1, 1, 0, 0, /* data regs */ \ |
203 | 1, 1, 0, 0, /* addr regs */ \ | |
204 | 1, /* arg reg */ \ | |
205 | 1, /* sp reg */ \ | |
206 | 1, 1, 1, 1, 0, 0, 0, 0, /* extended regs */ \ | |
207 | 1, 1, /* fp regs (18-19) */ \ | |
208 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /* fp regs (20-29) */ \ | |
209 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, /* fp regs (30-39) */ \ | |
210 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* fp regs (40-49) */ \ | |
211 | 1, /* mdr reg */ \ | |
212 | 1 /* cc reg */ \ | |
b166356e | 213 | } |
29a404f9 | 214 | |
d37e81ec | 215 | /* Note: The definition of CALL_REALLY_USED_REGISTERS is not |
216 | redundant. It is needed when compiling in PIC mode because | |
217 | the a2 register becomes fixed (and hence must be marked as | |
218 | call_used) but in order to preserve the ABI it is not marked | |
219 | as call_really_used. */ | |
220 | #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS | |
221 | ||
29a404f9 | 222 | #define REG_ALLOC_ORDER \ |
b166356e | 223 | { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \ |
224 | , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \ | |
85a6eed4 | 225 | , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 50, 51 \ |
b166356e | 226 | } |
911517ac | 227 | |
29a404f9 | 228 | /* Return number of consecutive hard regs needed starting at reg REGNO |
229 | to hold something of mode MODE. | |
230 | ||
231 | This is ordinarily the length in words of a value of mode MODE | |
232 | but can be less for certain modes in special long registers. */ | |
233 | ||
234 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
235 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
236 | ||
237 | /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
238 | MODE. */ | |
29a404f9 | 239 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
5574dbdd | 240 | mn10300_hard_regno_mode_ok ((REGNO), (MODE)) |
29a404f9 | 241 | |
242 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
243 | when one has mode MODE1 and one has mode MODE2. | |
244 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
245 | for any hard reg, then this must be 0 for correct output. */ | |
246 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
5574dbdd | 247 | mn10300_modes_tieable ((MODE1), (MODE2)) |
29a404f9 | 248 | |
b21218d6 | 249 | /* 4 data, and effectively 3 address registers is small as far as I'm |
250 | concerned. */ | |
ed5527ca | 251 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
29a404f9 | 252 | \f |
253 | /* Define the classes of registers for register constraints in the | |
254 | machine description. Also define ranges of constants. | |
255 | ||
256 | One of the classes must always be named ALL_REGS and include all hard regs. | |
257 | If there is more than one class, another class must be named NO_REGS | |
258 | and contain no registers. | |
259 | ||
260 | The name GENERAL_REGS must be the name of a class (or an alias for | |
261 | another name such as ALL_REGS). This is the class of registers | |
262 | that is allowed by "g" or "r" in a register constraint. | |
263 | Also, registers outside this class are allocated only when | |
264 | instructions express preferences for them. | |
265 | ||
266 | The classes must be numbered in nondecreasing order; that is, | |
267 | a larger-numbered class must never be contained completely | |
268 | in a smaller-numbered class. | |
269 | ||
270 | For any two classes, it is very desirable that there be another | |
271 | class that represents their union. */ | |
fb16c776 | 272 | |
3626e955 | 273 | enum reg_class |
274 | { | |
c8a596d6 | 275 | NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, SP_OR_ADDRESS_REGS, |
85a6eed4 | 276 | EXTENDED_REGS, FP_REGS, FP_ACC_REGS, CC_REGS, MDR_REGS, |
c8a596d6 | 277 | GENERAL_REGS, SP_OR_GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES |
29a404f9 | 278 | }; |
279 | ||
280 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
281 | ||
09e5ce26 | 282 | /* Give names of register classes as strings for dump file. */ |
29a404f9 | 283 | |
85a6eed4 | 284 | #define REG_CLASS_NAMES \ |
c8a596d6 | 285 | { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", "SP_REGS", "SP_OR_ADDRESS_REGS", \ |
85a6eed4 | 286 | "EXTENDED_REGS", "FP_REGS", "FP_ACC_REGS", "CC_REGS", "MDR_REGS", \ |
287 | "GENERAL_REGS", "SP_OR_GENERAL_REGS", "ALL_REGS", "LIM_REGS" \ | |
3626e955 | 288 | } |
29a404f9 | 289 | |
290 | /* Define which registers fit in which classes. | |
291 | This is an initializer for a vector of HARD_REG_SET | |
292 | of length N_REG_CLASSES. */ | |
293 | ||
5574dbdd | 294 | #define REG_CLASS_CONTENTS \ |
4879b320 | 295 | { { 0, 0 }, /* No regs */ \ |
5574dbdd | 296 | { 0x0000000f, 0 }, /* DATA_REGS */ \ |
297 | { 0x000001f0, 0 }, /* ADDRESS_REGS */ \ | |
298 | { 0x00000200, 0 }, /* SP_REGS */ \ | |
5574dbdd | 299 | { 0x000003f0, 0 }, /* SP_OR_ADDRESS_REGS */ \ |
300 | { 0x0003fc00, 0 }, /* EXTENDED_REGS */ \ | |
5574dbdd | 301 | { 0xfffc0000, 0x3ffff },/* FP_REGS */ \ |
302 | { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \ | |
303 | { 0x00000000, 0x80000 },/* CC_REGS */ \ | |
85a6eed4 | 304 | { 0x00000000, 0x40000 },/* MDR_REGS */ \ |
5574dbdd | 305 | { 0x0003fdff, 0 }, /* GENERAL_REGS */ \ |
c8a596d6 | 306 | { 0x0003ffff, 0 }, /* SP_OR_GENERAL_REGS */ \ |
4879b320 | 307 | { 0xffffffff, 0xfffff } /* ALL_REGS */ \ |
29a404f9 | 308 | } |
309 | ||
310 | /* The same information, inverted: | |
311 | Return the class number of the smallest class containing | |
312 | reg number REGNO. This could be a conditional expression | |
313 | or could index an array. */ | |
314 | ||
3626e955 | 315 | #define REGNO_REG_CLASS(REGNO) \ |
316 | ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \ | |
317 | (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \ | |
318 | (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \ | |
39b704c8 | 319 | (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \ |
3626e955 | 320 | (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \ |
85a6eed4 | 321 | (REGNO) == MDR_REG ? MDR_REGS : \ |
3626e955 | 322 | (REGNO) == CC_REG ? CC_REGS : \ |
15285b19 | 323 | NO_REGS) |
29a404f9 | 324 | |
325 | /* The class value for index registers, and the one for base regs. */ | |
c8a596d6 | 326 | #define INDEX_REG_CLASS \ |
327 | (TARGET_AM33 ? GENERAL_REGS : DATA_REGS) | |
328 | #define BASE_REG_CLASS \ | |
329 | (TARGET_AM33 ? SP_OR_GENERAL_REGS : SP_OR_ADDRESS_REGS) | |
29a404f9 | 330 | |
29a404f9 | 331 | /* Macros to check register numbers against specific register classes. */ |
332 | ||
27a43a94 | 333 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
334 | and check its validity for a certain class. | |
335 | We have two alternate definitions for each of them. | |
336 | The usual definition accepts all pseudo regs; the other rejects | |
337 | them unless they have been allocated suitable hard regs. | |
338 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
339 | ||
340 | Most source files want to accept pseudo regs in the hope that | |
341 | they will get allocated to the class that the insn wants them to be in. | |
342 | Source files for reload pass need to be strict. | |
343 | After reload, it makes no difference, since pseudo regs have | |
344 | been eliminated by then. */ | |
345 | ||
29a404f9 | 346 | /* These assume that REGNO is a hard or pseudo reg number. |
347 | They give nonzero only if REGNO is a hard reg of the suitable class | |
348 | or a pseudo reg currently allocated to a suitable hard reg. | |
349 | Since they use reg_renumber, they are safe only once reg_renumber | |
957b2bdc | 350 | has been allocated, which happens in reginfo.c during register |
351 | allocation. */ | |
27a43a94 | 352 | |
353 | #ifndef REG_OK_STRICT | |
5411aa8c | 354 | # define REG_STRICT 0 |
27a43a94 | 355 | #else |
5411aa8c | 356 | # define REG_STRICT 1 |
27a43a94 | 357 | #endif |
358 | ||
5411aa8c | 359 | #define REGNO_DATA_P(regno, strict) \ |
c8a596d6 | 360 | mn10300_regno_in_class_p (regno, DATA_REGS, strict) |
5411aa8c | 361 | #define REGNO_ADDRESS_P(regno, strict) \ |
c8a596d6 | 362 | mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
5411aa8c | 363 | #define REGNO_EXTENDED_P(regno, strict) \ |
c8a596d6 | 364 | mn10300_regno_in_class_p (regno, EXTENDED_REGS, strict) |
365 | #define REGNO_GENERAL_P(regno, strict) \ | |
366 | mn10300_regno_in_class_p (regno, GENERAL_REGS, strict) | |
5411aa8c | 367 | |
368 | #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \ | |
c8a596d6 | 369 | mn10300_regno_in_class_p (regno, BASE_REG_CLASS, strict) |
29a404f9 | 370 | #define REGNO_OK_FOR_BASE_P(regno) \ |
5411aa8c | 371 | (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT)) |
372 | #define REG_OK_FOR_BASE_P(X) \ | |
373 | (REGNO_OK_FOR_BASE_P (REGNO (X))) | |
29a404f9 | 374 | |
5411aa8c | 375 | #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \ |
c8a596d6 | 376 | mn10300_regno_in_class_p (regno, ADDRESS_REGS, strict) |
8ecf154e | 377 | #define REGNO_OK_FOR_BIT_BASE_P(regno) \ |
5411aa8c | 378 | (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT)) |
379 | #define REG_OK_FOR_BIT_BASE_P(X) \ | |
380 | (REGNO_OK_FOR_BIT_BASE_P (REGNO (X))) | |
8ecf154e | 381 | |
5411aa8c | 382 | #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \ |
c8a596d6 | 383 | mn10300_regno_in_class_p (regno, INDEX_REG_CLASS, strict) |
29a404f9 | 384 | #define REGNO_OK_FOR_INDEX_P(regno) \ |
5411aa8c | 385 | (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT)) |
386 | #define REG_OK_FOR_INDEX_P(X) \ | |
387 | (REGNO_OK_FOR_INDEX_P (REGNO (X))) | |
29a404f9 | 388 | |
29a404f9 | 389 | #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ |
911517ac | 390 | (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) |
29a404f9 | 391 | |
b166356e | 392 | /* A class that contains registers which the compiler must always |
393 | access in a mode that is the same size as the mode in which it | |
394 | loaded the register. */ | |
395 | #define CLASS_CANNOT_CHANGE_SIZE FP_REGS | |
396 | ||
fb16c776 | 397 | /* Return 1 if VALUE is in the range specified. */ |
29a404f9 | 398 | |
399 | #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) | |
400 | #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) | |
401 | ||
29a404f9 | 402 | \f |
403 | /* Stack layout; function entry, exit and calling. */ | |
404 | ||
405 | /* Define this if pushing a word on the stack | |
406 | makes the stack pointer a smaller address. */ | |
407 | ||
408 | #define STACK_GROWS_DOWNWARD | |
409 | ||
3ce7ff97 | 410 | /* Define this to nonzero if the nominal address of the stack frame |
29a404f9 | 411 | is at the high-address end of the local variables; |
412 | that is, each additional local variable allocated | |
413 | goes at a more negative offset in the frame. */ | |
414 | ||
d28d5017 | 415 | #define FRAME_GROWS_DOWNWARD 1 |
29a404f9 | 416 | |
417 | /* Offset within stack frame to start allocating local variables at. | |
418 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
419 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
420 | of the first local allocated. */ | |
421 | ||
014546df | 422 | #define STARTING_FRAME_OFFSET 0 |
29a404f9 | 423 | |
424 | /* Offset of first parameter from the argument pointer register value. */ | |
425 | /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
426 | saved since the value is used before we know. */ | |
427 | ||
bb4959a8 | 428 | #define FIRST_PARM_OFFSET(FNDECL) 4 |
29a404f9 | 429 | |
224cda8f | 430 | /* But the CFA is at the arg pointer directly, not at the first argument. */ |
431 | #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 | |
432 | ||
48cb86e3 | 433 | #define ELIMINABLE_REGS \ |
434 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
435 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
436 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
437 | ||
48cb86e3 | 438 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
3626e955 | 439 | OFFSET = mn10300_initial_offset (FROM, TO) |
29a404f9 | 440 | |
bb4959a8 | 441 | /* We use d0/d1 for passing parameters, so allocate 8 bytes of space |
442 | for a register flushback area. */ | |
443 | #define REG_PARM_STACK_SPACE(DECL) 8 | |
22c61100 | 444 | #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 |
4448f543 | 445 | #define ACCUMULATE_OUTGOING_ARGS 1 |
3626e955 | 446 | |
f1899bff | 447 | /* So we can allocate space for return pointers once for the function |
448 | instead of around every call. */ | |
449 | #define STACK_POINTER_OFFSET 4 | |
014546df | 450 | |
29a404f9 | 451 | /* 1 if N is a possible register number for function argument passing. |
e92d3ba8 | 452 | On the MN10300, d0 and d1 are used in this way. */ |
29a404f9 | 453 | |
90eb0bdc | 454 | #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) |
bb4959a8 | 455 | |
29a404f9 | 456 | \f |
457 | /* Define a data type for recording info about an argument list | |
458 | during the scan of that argument list. This data type should | |
459 | hold all necessary information about the function itself | |
460 | and about the args processed so far, enough to enable macros | |
461 | such as FUNCTION_ARG to determine where the next arg should go. | |
462 | ||
463 | On the MN10300, this is a single integer, which is a number of bytes | |
464 | of arguments scanned so far. */ | |
465 | ||
bb4959a8 | 466 | #define CUMULATIVE_ARGS struct cum_arg |
3626e955 | 467 | |
468 | struct cum_arg | |
469 | { | |
470 | int nbytes; | |
471 | }; | |
29a404f9 | 472 | |
473 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
474 | for a call to a function whose data type is FNTYPE. | |
475 | For a library call, FNTYPE is 0. | |
476 | ||
477 | On the MN10300, the offset starts at 0. */ | |
478 | ||
30c70355 | 479 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
bb4959a8 | 480 | ((CUM).nbytes = 0) |
29a404f9 | 481 | |
b6713ba6 | 482 | #define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N) |
29a404f9 | 483 | |
29a404f9 | 484 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
29a404f9 | 485 | |
486 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
487 | the stack pointer does not matter. The value is tested only in | |
488 | functions that have frame pointers. | |
489 | No definition is equivalent to always zero. */ | |
490 | ||
491 | #define EXIT_IGNORE_STACK 1 | |
492 | ||
493 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
494 | for profiling a function entry. */ | |
495 | ||
496 | #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
497 | ||
29a404f9 | 498 | /* Length in units of the trampoline for entering a nested function. */ |
499 | ||
3562cea7 | 500 | #define TRAMPOLINE_SIZE 16 |
501 | #define TRAMPOLINE_ALIGNMENT 32 | |
29a404f9 | 502 | |
6e90c6cd | 503 | /* A C expression whose value is RTL representing the value of the return |
504 | address for the frame COUNT steps up from the current frame. | |
505 | ||
506 | On the mn10300, the return address is not at a constant location | |
507 | due to the frame layout. Luckily, it is at a constant offset from | |
508 | the argument pointer, so we define RETURN_ADDR_RTX to return a | |
509 | MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx | |
510 | with a reference to the stack/frame pointer + an appropriate offset. */ | |
511 | ||
512 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
513 | ((COUNT == 0) \ | |
7014838c | 514 | ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ |
6e90c6cd | 515 | : (rtx) 0) |
5f2853dd | 516 | |
5d4ffb1c | 517 | /* The return address is saved both in the stack and in MDR. Using |
518 | the stack location is handiest for what unwinding needs. */ | |
519 | #define INCOMING_RETURN_ADDR_RTX \ | |
520 | gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) | |
29a404f9 | 521 | \f |
29a404f9 | 522 | /* Maximum number of registers that can appear in a valid memory address. */ |
523 | ||
524 | #define MAX_REGS_PER_ADDRESS 2 | |
525 | ||
29a404f9 | 526 | \f |
c8a596d6 | 527 | /* We have post-increments. */ |
528 | #define HAVE_POST_INCREMENT TARGET_AM33 | |
529 | #define HAVE_POST_MODIFY_DISP TARGET_AM33 | |
530 | ||
531 | /* ... But we don't want to use them for block moves. Small offsets are | |
532 | just as effective, at least for inline block move sizes, and appears | |
533 | to produce cleaner code. */ | |
534 | #define USE_LOAD_POST_INCREMENT(M) 0 | |
535 | #define USE_STORE_POST_INCREMENT(M) 0 | |
911517ac | 536 | |
29a404f9 | 537 | /* Accept either REG or SUBREG where a register is valid. */ |
fb16c776 | 538 | |
5411aa8c | 539 | #define RTX_OK_FOR_BASE_P(X, strict) \ |
540 | ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \ | |
541 | (strict))) \ | |
29a404f9 | 542 | || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ |
5411aa8c | 543 | && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \ |
544 | (strict)))) | |
29a404f9 | 545 | |
c8a596d6 | 546 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
547 | do { \ | |
548 | rtx new_x = mn10300_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ | |
549 | if (new_x) \ | |
550 | { \ | |
551 | X = new_x; \ | |
552 | goto WIN; \ | |
553 | } \ | |
554 | } while (0) | |
29a404f9 | 555 | \f |
29a404f9 | 556 | |
b87a151a | 557 | /* Zero if this needs fixing up to become PIC. */ |
558 | ||
3626e955 | 559 | #define LEGITIMATE_PIC_OPERAND_P(X) \ |
560 | mn10300_legitimate_pic_operand_p (X) | |
b87a151a | 561 | |
562 | /* Register to hold the addressing base for | |
563 | position independent code access to data items. */ | |
564 | #define PIC_OFFSET_TABLE_REGNUM PIC_REG | |
565 | ||
566 | /* The name of the pseudo-symbol representing the Global Offset Table. */ | |
567 | #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_" | |
568 | ||
569 | #define SYMBOLIC_CONST_P(X) \ | |
570 | ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \ | |
571 | && ! LEGITIMATE_PIC_OPERAND_P (X)) | |
572 | ||
573 | /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */ | |
574 | #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X)) | |
29a404f9 | 575 | \f |
990679af | 576 | #define SELECT_CC_MODE(OP, X, Y) mn10300_select_cc_mode (OP, X, Y) |
5574dbdd | 577 | #define REVERSIBLE_CC_MODE(MODE) 0 |
578 | \f | |
29a404f9 | 579 | /* Nonzero if access to memory by bytes or half words is no faster |
580 | than accessing full words. */ | |
581 | #define SLOW_BYTE_ACCESS 1 | |
582 | ||
bb4959a8 | 583 | #define NO_FUNCTION_CSE |
584 | ||
29a404f9 | 585 | /* According expr.c, a value of around 6 should minimize code size, and |
586 | for the MN10300 series, that's our primary concern. */ | |
f5733e7c | 587 | #define MOVE_RATIO(speed) 6 |
29a404f9 | 588 | |
589 | #define TEXT_SECTION_ASM_OP "\t.section .text" | |
590 | #define DATA_SECTION_ASM_OP "\t.section .data" | |
3626e955 | 591 | #define BSS_SECTION_ASM_OP "\t.section .bss" |
29a404f9 | 592 | |
29a404f9 | 593 | #define ASM_COMMENT_START "#" |
594 | ||
595 | /* Output to assembler file text saying following lines | |
596 | may contain character constants, extra white space, comments, etc. */ | |
597 | ||
598 | #define ASM_APP_ON "#APP\n" | |
599 | ||
600 | /* Output to assembler file text saying following lines | |
601 | no longer contain unusual constructs. */ | |
602 | ||
603 | #define ASM_APP_OFF "#NO_APP\n" | |
604 | ||
8d8c3735 | 605 | #undef USER_LABEL_PREFIX |
606 | #define USER_LABEL_PREFIX "_" | |
607 | ||
29a404f9 | 608 | /* This says how to output the assembler to define a global |
609 | uninitialized but not common symbol. | |
610 | Try to use asm_output_bss to implement this macro. */ | |
611 | ||
4a95b954 | 612 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
613 | asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | |
29a404f9 | 614 | |
0036ad94 | 615 | /* Globalizing directive for a label. */ |
616 | #define GLOBAL_ASM_OP "\t.global " | |
29a404f9 | 617 | |
618 | /* This is how to output a reference to a user-level label named NAME. | |
619 | `assemble_name' uses this. */ | |
620 | ||
3626e955 | 621 | #undef ASM_OUTPUT_LABELREF |
7b4a38a6 | 622 | #define ASM_OUTPUT_LABELREF(FILE, NAME) \ |
8d8c3735 | 623 | asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME)) |
29a404f9 | 624 | |
29a404f9 | 625 | /* This is how we tell the assembler that two symbols have the same value. */ |
626 | ||
627 | #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
3626e955 | 628 | do \ |
629 | { \ | |
630 | assemble_name (FILE, NAME1); \ | |
631 | fputs (" = ", FILE); \ | |
632 | assemble_name (FILE, NAME2); \ | |
633 | fputc ('\n', FILE); \ | |
634 | } \ | |
635 | while (0) | |
29a404f9 | 636 | |
637 | /* How to refer to registers in assembler output. | |
638 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
639 | ||
5574dbdd | 640 | #define REGISTER_NAMES \ |
641 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \ | |
642 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \ | |
643 | , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \ | |
644 | , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \ | |
645 | , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \ | |
646 | , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \ | |
647 | , "mdr", "EPSW" \ | |
4113a737 | 648 | } |
649 | ||
5574dbdd | 650 | #define ADDITIONAL_REGISTER_NAMES \ |
651 | { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \ | |
652 | {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \ | |
653 | {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \ | |
654 | {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \ | |
655 | , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \ | |
656 | , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \ | |
657 | , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \ | |
658 | , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \ | |
659 | , {"cc", CC_REG} \ | |
4113a737 | 660 | } |
29a404f9 | 661 | |
662 | /* Print an instruction operand X on file FILE. | |
663 | look in mn10300.c for details */ | |
664 | ||
3626e955 | 665 | #define PRINT_OPERAND(FILE, X, CODE) \ |
666 | mn10300_print_operand (FILE, X, CODE) | |
29a404f9 | 667 | |
668 | /* Print a memory operand whose address is X, on file FILE. | |
669 | This uses a function in output-vax.c. */ | |
670 | ||
3626e955 | 671 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
672 | mn10300_print_operand_address (FILE, ADDR) | |
29a404f9 | 673 | |
29a404f9 | 674 | /* This is how to output an element of a case-vector that is absolute. */ |
675 | ||
676 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
7fe1d31c | 677 | fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) |
29a404f9 | 678 | |
679 | /* This is how to output an element of a case-vector that is relative. */ | |
680 | ||
9eaab178 | 681 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
29a404f9 | 682 | fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) |
683 | ||
684 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
685 | if ((LOG) != 0) \ | |
686 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
687 | ||
ad87de1e | 688 | /* We don't have to worry about dbx compatibility for the mn10300. */ |
29a404f9 | 689 | #define DEFAULT_GDB_EXTENSIONS 1 |
690 | ||
f2bf5fae | 691 | /* Use dwarf2 debugging info by default. */ |
5f2853dd | 692 | #undef PREFERRED_DEBUGGING_TYPE |
f2bf5fae | 693 | #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
5f2853dd | 694 | #define DWARF2_DEBUGGING_INFO 1 |
f2bf5fae | 695 | #define DWARF2_ASM_LINE_DEBUG_INFO 1 |
696 | ||
29a404f9 | 697 | /* Specify the machine mode that this machine uses |
698 | for the index in the tablejump instruction. */ | |
699 | #define CASE_VECTOR_MODE Pmode | |
700 | ||
29a404f9 | 701 | /* Define if operations between registers always perform the operation |
702 | on the full register even if a narrower mode is specified. */ | |
703 | #define WORD_REGISTER_OPERATIONS | |
704 | ||
705 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
706 | ||
29a404f9 | 707 | /* Max number of bytes we can move from memory to memory |
708 | in one reasonably fast instruction. */ | |
709 | #define MOVE_MAX 4 | |
710 | ||
711 | /* Define if shifts truncate the shift count | |
712 | which implies one can omit a sign-extension or zero-extension | |
713 | of a shift count. */ | |
714 | #define SHIFT_COUNT_TRUNCATED 1 | |
715 | ||
716 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
717 | is done just by pretending it is already truncated. */ | |
718 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
719 | ||
29a404f9 | 720 | /* Specify the machine mode that pointers have. |
721 | After generation of rtl, the compiler makes no further distinction | |
722 | between pointers and any other objects of this machine mode. */ | |
723 | #define Pmode SImode | |
724 | ||
725 | /* A function address in a call instruction | |
726 | is a byte address (for indexing purposes) | |
727 | so give the MEM rtx a byte's mode. */ | |
728 | #define FUNCTION_MODE QImode | |
729 | ||
730 | /* The assembler op to get a word. */ | |
731 | ||
732 | #define FILE_ASM_OP "\t.file\n" | |
733 |