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956d6950 | 1 | /* Definitions of target machine for GNU compiler. Matsushita MN10300 series |
c5c76735 | 2 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. |
11bb1f11 JL |
3 | Contributed by Jeff Law (law@cygnus.com). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "svr4.h" | |
23 | ||
24 | #undef ASM_SPEC | |
25 | #undef ASM_FINAL_SPEC | |
26 | #undef LIB_SPEC | |
27 | #undef ENDFILE_SPEC | |
28 | #undef LINK_SPEC | |
29 | #undef STARTFILE_SPEC | |
30 | ||
31 | /* Names to predefine in the preprocessor for this target machine. */ | |
32 | ||
33 | #define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__" | |
34 | ||
35 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
36 | ||
37 | extern int target_flags; | |
38 | ||
39 | /* Macros used in the machine description to test the flags. */ | |
40 | ||
41 | /* Macro to define tables used to set the flags. | |
42 | This is a list in braces of pairs in braces, | |
43 | each pair being { "NAME", VALUE } | |
44 | where VALUE is the bits to set or minus the bits to clear. | |
45 | An empty string NAME is used to identify the default VALUE. */ | |
46 | ||
a6f7ba17 JL |
47 | /* Generate code to work around mul/mulq bugs on the mn10300. */ |
48 | #define TARGET_MULT_BUG (target_flags & 0x1) | |
11bb1f11 | 49 | #define TARGET_SWITCHES \ |
8ae4a315 JL |
50 | {{ "mult-bug", 0x1, "Work around hardware multiply bug"}, \ |
51 | { "no-mult-bug", -0x1, "Do not work around hardware multiply bug"},\ | |
880b8fb8 | 52 | { "", TARGET_DEFAULT, NULL}} |
11bb1f11 JL |
53 | |
54 | #ifndef TARGET_DEFAULT | |
a6f7ba17 | 55 | #define TARGET_DEFAULT 0x1 |
11bb1f11 JL |
56 | #endif |
57 | ||
58 | /* Print subsidiary information on the compiler version in use. */ | |
59 | ||
60 | #define TARGET_VERSION fprintf (stderr, " (MN10300)"); | |
61 | ||
62 | \f | |
63 | /* Target machine storage layout */ | |
64 | ||
65 | /* Define this if most significant bit is lowest numbered | |
66 | in instructions that operate on numbered bit-fields. | |
67 | This is not true on the Matsushita MN1003. */ | |
68 | #define BITS_BIG_ENDIAN 0 | |
69 | ||
70 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
71 | /* This is not true on the Matsushita MN10300. */ | |
72 | #define BYTES_BIG_ENDIAN 0 | |
73 | ||
74 | /* Define this if most significant word of a multiword number is lowest | |
75 | numbered. | |
76 | This is not true on the Matsushita MN10300. */ | |
77 | #define WORDS_BIG_ENDIAN 0 | |
78 | ||
79 | /* Number of bits in an addressable storage unit */ | |
80 | #define BITS_PER_UNIT 8 | |
81 | ||
82 | /* Width in bits of a "word", which is the contents of a machine register. | |
83 | Note that this is not necessarily the width of data type `int'; | |
84 | if using 16-bit ints on a 68000, this would still be 32. | |
85 | But on a machine with 16-bit registers, this would be 16. */ | |
86 | #define BITS_PER_WORD 32 | |
87 | ||
88 | /* Width of a word, in units (bytes). */ | |
89 | #define UNITS_PER_WORD 4 | |
90 | ||
91 | /* Width in bits of a pointer. | |
92 | See also the macro `Pmode' defined below. */ | |
93 | #define POINTER_SIZE 32 | |
94 | ||
95 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
96 | #define PARM_BOUNDARY 32 | |
97 | ||
98 | /* The stack goes in 32 bit lumps. */ | |
99 | #define STACK_BOUNDARY 32 | |
100 | ||
101 | /* Allocation boundary (in *bits*) for the code of a function. | |
102 | 8 is the minimum boundary; it's unclear if bigger alignments | |
103 | would improve performance. */ | |
104 | #define FUNCTION_BOUNDARY 8 | |
105 | ||
106 | /* No data type wants to be aligned rounder than this. */ | |
107 | #define BIGGEST_ALIGNMENT 32 | |
108 | ||
109 | /* Alignment of field after `int : 0' in a structure. */ | |
110 | #define EMPTY_FIELD_BOUNDARY 32 | |
111 | ||
112 | /* Define this if move instructions will actually fail to work | |
113 | when given unaligned data. */ | |
114 | #define STRICT_ALIGNMENT 1 | |
115 | ||
116 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
117 | #define DEFAULT_SIGNED_CHAR 0 | |
118 | ||
119 | /* Define results of standard character escape sequences. */ | |
120 | #define TARGET_BELL 007 | |
121 | #define TARGET_BS 010 | |
122 | #define TARGET_TAB 011 | |
123 | #define TARGET_NEWLINE 012 | |
124 | #define TARGET_VT 013 | |
125 | #define TARGET_FF 014 | |
126 | #define TARGET_CR 015 | |
127 | \f | |
128 | /* Standard register usage. */ | |
129 | ||
130 | /* Number of actual hardware registers. | |
131 | The hardware registers are assigned numbers for the compiler | |
132 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
133 | ||
134 | All registers that the compiler knows about must be given numbers, | |
135 | even those that are not normally considered general registers. */ | |
136 | ||
777fbf09 | 137 | #define FIRST_PSEUDO_REGISTER 10 |
11bb1f11 JL |
138 | |
139 | /* 1 for registers that have pervasive standard uses | |
140 | and are not available for the register allocator. */ | |
141 | ||
142 | #define FIXED_REGISTERS \ | |
777fbf09 | 143 | { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1} |
11bb1f11 JL |
144 | |
145 | /* 1 for registers not available across function calls. | |
146 | These must include the FIXED_REGISTERS and also any | |
147 | registers that can be used without being saved. | |
148 | The latter must include the registers where values are returned | |
149 | and the register where structure-value addresses are passed. | |
150 | Aside from that, you can include as many other registers as you | |
151 | like. */ | |
152 | ||
153 | #define CALL_USED_REGISTERS \ | |
777fbf09 | 154 | { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1} |
11bb1f11 JL |
155 | |
156 | #define REG_ALLOC_ORDER \ | |
777fbf09 | 157 | { 0, 1, 4, 5, 2, 3, 6, 7, 8, 9} |
11bb1f11 JL |
158 | |
159 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
160 | to hold something of mode MODE. | |
161 | ||
162 | This is ordinarily the length in words of a value of mode MODE | |
163 | but can be less for certain modes in special long registers. */ | |
164 | ||
165 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
166 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
167 | ||
168 | /* Value is 1 if hard register REGNO can hold a value of machine-mode | |
169 | MODE. */ | |
170 | ||
171 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
172 | (REGNO_REG_CLASS (REGNO) == DATA_REGS \ | |
173 | ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \ | |
174 | : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4) | |
175 | ||
176 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
177 | when one has mode MODE1 and one has mode MODE2. | |
178 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
179 | for any hard reg, then this must be 0 for correct output. */ | |
180 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
2fed503d | 181 | (MODE1 == MODE2 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)) |
11bb1f11 | 182 | |
4246e0c5 JL |
183 | /* 4 data, and effectively 3 address registers is small as far as I'm |
184 | concerned. */ | |
185 | #define SMALL_REGISTER_CLASSES 1 | |
11bb1f11 JL |
186 | \f |
187 | /* Define the classes of registers for register constraints in the | |
188 | machine description. Also define ranges of constants. | |
189 | ||
190 | One of the classes must always be named ALL_REGS and include all hard regs. | |
191 | If there is more than one class, another class must be named NO_REGS | |
192 | and contain no registers. | |
193 | ||
194 | The name GENERAL_REGS must be the name of a class (or an alias for | |
195 | another name such as ALL_REGS). This is the class of registers | |
196 | that is allowed by "g" or "r" in a register constraint. | |
197 | Also, registers outside this class are allocated only when | |
198 | instructions express preferences for them. | |
199 | ||
200 | The classes must be numbered in nondecreasing order; that is, | |
201 | a larger-numbered class must never be contained completely | |
202 | in a smaller-numbered class. | |
203 | ||
204 | For any two classes, it is very desirable that there be another | |
205 | class that represents their union. */ | |
206 | ||
207 | enum reg_class { | |
4d1a91c2 JL |
208 | NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, |
209 | DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, | |
210 | GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES | |
11bb1f11 JL |
211 | }; |
212 | ||
213 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
214 | ||
215 | /* Give names of register classes as strings for dump file. */ | |
216 | ||
217 | #define REG_CLASS_NAMES \ | |
218 | { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \ | |
777fbf09 JL |
219 | "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \ |
220 | "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } | |
11bb1f11 JL |
221 | |
222 | /* Define which registers fit in which classes. | |
223 | This is an initializer for a vector of HARD_REG_SET | |
224 | of length N_REG_CLASSES. */ | |
225 | ||
226 | #define REG_CLASS_CONTENTS \ | |
227 | { 0, /* No regs */ \ | |
228 | 0x00f, /* DATA_REGS */ \ | |
777fbf09 JL |
229 | 0x1f0, /* ADDRESS_REGS */ \ |
230 | 0x200, /* SP_REGS */ \ | |
231 | 0x1ff, /* DATA_OR_ADDRESS_REGS */\ | |
232 | 0x1f0, /* SP_OR_ADDRESS_REGS */\ | |
233 | 0x1ff, /* GENERAL_REGS */ \ | |
234 | 0x3ff, /* ALL_REGS */ \ | |
11bb1f11 JL |
235 | } |
236 | ||
237 | /* The same information, inverted: | |
238 | Return the class number of the smallest class containing | |
239 | reg number REGNO. This could be a conditional expression | |
240 | or could index an array. */ | |
241 | ||
242 | #define REGNO_REG_CLASS(REGNO) \ | |
243 | ((REGNO) < 4 ? DATA_REGS : \ | |
777fbf09 | 244 | (REGNO) < 9 ? ADDRESS_REGS : \ |
4d1a91c2 | 245 | (REGNO) == 9 ? SP_REGS : 0) |
11bb1f11 JL |
246 | |
247 | /* The class value for index registers, and the one for base regs. */ | |
11bb1f11 JL |
248 | #define INDEX_REG_CLASS DATA_REGS |
249 | #define BASE_REG_CLASS SP_OR_ADDRESS_REGS | |
250 | ||
251 | /* Get reg_class from a letter such as appears in the machine description. */ | |
252 | ||
253 | #define REG_CLASS_FROM_LETTER(C) \ | |
254 | ((C) == 'd' ? DATA_REGS : \ | |
255 | (C) == 'a' ? ADDRESS_REGS : \ | |
4d1a91c2 | 256 | (C) == 'y' ? SP_REGS : NO_REGS) |
11bb1f11 JL |
257 | |
258 | /* Macros to check register numbers against specific register classes. */ | |
259 | ||
260 | /* These assume that REGNO is a hard or pseudo reg number. | |
261 | They give nonzero only if REGNO is a hard reg of the suitable class | |
262 | or a pseudo reg currently allocated to a suitable hard reg. | |
263 | Since they use reg_renumber, they are safe only once reg_renumber | |
264 | has been allocated, which happens in local-alloc.c. */ | |
265 | ||
266 | #define REGNO_OK_FOR_BASE_P(regno) \ | |
267 | (((regno) > 3 && regno < FIRST_PSEUDO_REGISTER) \ | |
268 | || (reg_renumber[regno] > 3 && reg_renumber[regno] < FIRST_PSEUDO_REGISTER)) | |
269 | ||
4d1a91c2 JL |
270 | #define REGNO_OK_FOR_BIT_BASE_P(regno) \ |
271 | (((regno) > 3 && regno < 10) \ | |
272 | || (reg_renumber[regno] > 3 && reg_renumber[regno] < 10)) | |
273 | ||
11bb1f11 JL |
274 | #define REGNO_OK_FOR_INDEX_P(regno) \ |
275 | (((regno) >= 0 && regno < 4) \ | |
276 | || (reg_renumber[regno] >= 0 && reg_renumber[regno] < 4)) | |
277 | ||
278 | ||
279 | /* Given an rtx X being reloaded into a reg required to be | |
280 | in class CLASS, return the class of reg to actually use. | |
281 | In general this is just CLASS; but on some machines | |
282 | in some cases it is preferable to use a more restrictive class. */ | |
283 | ||
284 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
285 | (X == stack_pointer_rtx && CLASS != SP_REGS ? ADDRESS_REGS : CLASS) | |
286 | ||
777fbf09 JL |
287 | #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \ |
288 | (X == stack_pointer_rtx && CLASS != SP_REGS ? ADDRESS_REGS : CLASS) | |
289 | ||
11bb1f11 JL |
290 | #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ |
291 | ((MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) | |
292 | ||
293 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
294 | secondary_reload_class(CLASS,MODE,IN) | |
295 | ||
296 | /* Return the maximum number of consecutive registers | |
297 | needed to represent mode MODE in a register of class CLASS. */ | |
298 | ||
299 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
300 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
301 | ||
302 | /* The letters I, J, K, L, M, N, O, P in a register constraint string | |
303 | can be used to stand for particular ranges of immediate operands. | |
304 | This macro defines what the ranges are. | |
305 | C is the letter, and VALUE is a constant value. | |
306 | Return 1 if VALUE is in the range specified by C. */ | |
307 | ||
308 | #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) | |
309 | #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) | |
310 | ||
311 | #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) | |
312 | #define CONST_OK_FOR_J(VALUE) ((VALUE) == 1) | |
313 | #define CONST_OK_FOR_K(VALUE) ((VALUE) == 2) | |
314 | #define CONST_OK_FOR_L(VALUE) ((VALUE) == 4) | |
777fbf09 | 315 | #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3) |
38c37a0e | 316 | #define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535) |
11bb1f11 JL |
317 | |
318 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
319 | ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \ | |
320 | (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \ | |
321 | (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \ | |
777fbf09 | 322 | (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \ |
38c37a0e JL |
323 | (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \ |
324 | (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0) | |
11bb1f11 JL |
325 | |
326 | ||
327 | /* Similar, but for floating constants, and defining letters G and H. | |
328 | Here VALUE is the CONST_DOUBLE rtx itself. | |
329 | ||
330 | `G' is a floating-point zero. */ | |
331 | ||
38c37a0e JL |
332 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ |
333 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
334 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0) | |
11bb1f11 JL |
335 | |
336 | \f | |
337 | /* Stack layout; function entry, exit and calling. */ | |
338 | ||
339 | /* Define this if pushing a word on the stack | |
340 | makes the stack pointer a smaller address. */ | |
341 | ||
342 | #define STACK_GROWS_DOWNWARD | |
343 | ||
344 | /* Define this if the nominal address of the stack frame | |
345 | is at the high-address end of the local variables; | |
346 | that is, each additional local variable allocated | |
347 | goes at a more negative offset in the frame. */ | |
348 | ||
349 | #define FRAME_GROWS_DOWNWARD | |
350 | ||
351 | /* Offset within stack frame to start allocating local variables at. | |
352 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
353 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
354 | of the first local allocated. */ | |
355 | ||
6e86170d | 356 | #define STARTING_FRAME_OFFSET 0 |
11bb1f11 JL |
357 | |
358 | /* Offset of first parameter from the argument pointer register value. */ | |
359 | /* Is equal to the size of the saved fp + pc, even if an fp isn't | |
360 | saved since the value is used before we know. */ | |
361 | ||
22ef4e9b | 362 | #define FIRST_PARM_OFFSET(FNDECL) 4 |
11bb1f11 JL |
363 | |
364 | /* Specify the registers used for certain standard purposes. | |
365 | The values of these macros are register numbers. */ | |
366 | ||
367 | /* Register to use for pushing function arguments. */ | |
777fbf09 | 368 | #define STACK_POINTER_REGNUM 9 |
11bb1f11 JL |
369 | |
370 | /* Base register for access to local variables of the function. */ | |
371 | #define FRAME_POINTER_REGNUM 7 | |
372 | ||
777fbf09 JL |
373 | /* Base register for access to arguments of the function. This |
374 | is a fake register and will be eliminated into either the frame | |
375 | pointer or stack pointer. */ | |
376 | #define ARG_POINTER_REGNUM 8 | |
11bb1f11 JL |
377 | |
378 | /* Register in which static-chain is passed to a function. */ | |
379 | #define STATIC_CHAIN_REGNUM 5 | |
380 | ||
777fbf09 JL |
381 | #define ELIMINABLE_REGS \ |
382 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
383 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
384 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} | |
385 | ||
386 | #define CAN_ELIMINATE(FROM, TO) 1 | |
11bb1f11 | 387 | |
777fbf09 JL |
388 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ |
389 | OFFSET = initial_offset (FROM, TO) | |
11bb1f11 | 390 | |
460f4b9d JL |
391 | /* We can debug without frame pointers on the mn10300, so eliminate |
392 | them whenever possible. */ | |
393 | #define FRAME_POINTER_REQUIRED 0 | |
777fbf09 | 394 | #define CAN_DEBUG_WITHOUT_FP |
11bb1f11 JL |
395 | |
396 | /* A guess for the MN10300. */ | |
397 | #define PROMOTE_PROTOTYPES 1 | |
398 | ||
399 | /* Value is the number of bytes of arguments automatically | |
400 | popped when returning from a subroutine call. | |
401 | FUNDECL is the declaration node of the function (as a tree), | |
402 | FUNTYPE is the data type of the function (as a tree), | |
403 | or for a library call it is an identifier node for the subroutine name. | |
404 | SIZE is the number of bytes of arguments passed on the stack. */ | |
405 | ||
406 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 | |
407 | ||
22ef4e9b JL |
408 | /* We use d0/d1 for passing parameters, so allocate 8 bytes of space |
409 | for a register flushback area. */ | |
410 | #define REG_PARM_STACK_SPACE(DECL) 8 | |
460f4b9d JL |
411 | #define OUTGOING_REG_PARM_STACK_SPACE |
412 | #define ACCUMULATE_OUTGOING_ARGS | |
3dbc43d1 JL |
413 | |
414 | /* So we can allocate space for return pointers once for the function | |
415 | instead of around every call. */ | |
416 | #define STACK_POINTER_OFFSET 4 | |
6e86170d | 417 | |
11bb1f11 JL |
418 | /* 1 if N is a possible register number for function argument passing. |
419 | On the MN10300, no registers are used in this way. */ | |
420 | ||
22ef4e9b JL |
421 | #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) |
422 | ||
11bb1f11 JL |
423 | \f |
424 | /* Define a data type for recording info about an argument list | |
425 | during the scan of that argument list. This data type should | |
426 | hold all necessary information about the function itself | |
427 | and about the args processed so far, enough to enable macros | |
428 | such as FUNCTION_ARG to determine where the next arg should go. | |
429 | ||
430 | On the MN10300, this is a single integer, which is a number of bytes | |
431 | of arguments scanned so far. */ | |
432 | ||
22ef4e9b JL |
433 | #define CUMULATIVE_ARGS struct cum_arg |
434 | struct cum_arg {int nbytes; }; | |
11bb1f11 JL |
435 | |
436 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
437 | for a call to a function whose data type is FNTYPE. | |
438 | For a library call, FNTYPE is 0. | |
439 | ||
440 | On the MN10300, the offset starts at 0. */ | |
441 | ||
442 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ | |
22ef4e9b | 443 | ((CUM).nbytes = 0) |
11bb1f11 JL |
444 | |
445 | /* Update the data in CUM to advance over an argument | |
446 | of mode MODE and data type TYPE. | |
447 | (TYPE is null for libcalls where that information may not be available.) */ | |
448 | ||
449 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
22ef4e9b JL |
450 | ((CUM).nbytes += ((MODE) != BLKmode \ |
451 | ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ | |
452 | : (int_size_in_bytes (TYPE) + 3) & ~3)) | |
11bb1f11 JL |
453 | |
454 | /* Define where to put the arguments to a function. | |
455 | Value is zero to push the argument on the stack, | |
456 | or a hard register in which to store the argument. | |
457 | ||
458 | MODE is the argument's machine mode. | |
459 | TYPE is the data type of the argument (as a tree). | |
460 | This is null for libcalls where that information may | |
461 | not be available. | |
462 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
463 | the preceding args and about the function being called. | |
464 | NAMED is nonzero if this argument is a named parameter | |
465 | (otherwise it is an extra parameter matching an ellipsis). */ | |
466 | ||
467 | /* On the MN10300 all args are pushed. */ | |
468 | ||
22ef4e9b JL |
469 | extern struct rtx_def *function_arg (); |
470 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
471 | function_arg (&CUM, MODE, TYPE, NAMED) | |
472 | ||
473 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
474 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
11bb1f11 JL |
475 | \f |
476 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
477 | ((TYPE) && int_size_in_bytes (TYPE) > 8) | |
478 | ||
479 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ | |
480 | ((TYPE) && int_size_in_bytes (TYPE) > 8) | |
481 | ||
482 | /* Define how to find the value returned by a function. | |
483 | VALTYPE is the data type of the value (as a tree). | |
484 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
485 | otherwise, FUNC is 0. */ | |
460f4b9d JL |
486 | |
487 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
c5c76735 | 488 | gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0) |
11bb1f11 JL |
489 | |
490 | /* Define how to find the value returned by a library function | |
491 | assuming the value has mode MODE. */ | |
492 | ||
c5c76735 | 493 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) |
11bb1f11 JL |
494 | |
495 | /* 1 if N is a possible register number for a function value. */ | |
496 | ||
460f4b9d | 497 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 4) |
11bb1f11 JL |
498 | |
499 | /* Return values > 8 bytes in length in memory. */ | |
500 | #define DEFAULT_PCC_STRUCT_RETURN 0 | |
501 | #define RETURN_IN_MEMORY(TYPE) \ | |
502 | (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode) | |
503 | ||
504 | /* Register in which address to store a structure value | |
505 | is passed to a function. On the MN10300 it's passed as | |
506 | the first parameter. */ | |
507 | ||
508 | #define STRUCT_VALUE 0 | |
509 | ||
510 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
511 | the stack pointer does not matter. The value is tested only in | |
512 | functions that have frame pointers. | |
513 | No definition is equivalent to always zero. */ | |
514 | ||
515 | #define EXIT_IGNORE_STACK 1 | |
516 | ||
517 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
518 | for profiling a function entry. */ | |
519 | ||
520 | #define FUNCTION_PROFILER(FILE, LABELNO) ; | |
521 | ||
522 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
523 | do { \ | |
524 | fprintf (FILE, "\tadd -4,sp\n"); \ | |
22ef4e9b JL |
525 | fprintf (FILE, "\t.long 0x0004fffa\n"); \ |
526 | fprintf (FILE, "\tmov (0,sp),a0\n"); \ | |
11bb1f11 | 527 | fprintf (FILE, "\tadd 4,sp\n"); \ |
22ef4e9b JL |
528 | fprintf (FILE, "\tmov (13,a0),a1\n"); \ |
529 | fprintf (FILE, "\tmov (17,a0),a0\n"); \ | |
11bb1f11 JL |
530 | fprintf (FILE, "\tjmp (a0)\n"); \ |
531 | fprintf (FILE, "\t.long 0\n"); \ | |
532 | fprintf (FILE, "\t.long 0\n"); \ | |
533 | } while (0) | |
534 | ||
535 | /* Length in units of the trampoline for entering a nested function. */ | |
536 | ||
22ef4e9b | 537 | #define TRAMPOLINE_SIZE 0x1b |
11bb1f11 JL |
538 | |
539 | #define TRAMPOLINE_ALIGNMENT 32 | |
540 | ||
541 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
542 | FNADDR is an RTX for the address of the function's pure code. | |
543 | CXT is an RTX for the static chain value for the function. */ | |
544 | ||
545 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
546 | { \ | |
c5c76735 | 547 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \ |
11bb1f11 | 548 | (CXT)); \ |
c5c76735 | 549 | emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \ |
11bb1f11 JL |
550 | (FNADDR)); \ |
551 | } | |
74452ac3 JL |
552 | /* A C expression whose value is RTL representing the value of the return |
553 | address for the frame COUNT steps up from the current frame. | |
554 | ||
555 | On the mn10300, the return address is not at a constant location | |
556 | due to the frame layout. Luckily, it is at a constant offset from | |
557 | the argument pointer, so we define RETURN_ADDR_RTX to return a | |
558 | MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx | |
559 | with a reference to the stack/frame pointer + an appropriate offset. */ | |
560 | ||
561 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
562 | ((COUNT == 0) \ | |
c5c76735 | 563 | ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ |
74452ac3 JL |
564 | : (rtx) 0) |
565 | ||
22ef4e9b JL |
566 | /* Emit code for a call to builtin_saveregs. We must emit USE insns which |
567 | reference the 2 integer arg registers. | |
568 | Ordinarily they are not call used registers, but they are for | |
569 | _builtin_saveregs, so we must make this explicit. */ | |
570 | ||
571 | extern struct rtx_def *mn10300_builtin_saveregs (); | |
648d2ffc | 572 | #define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs () |
11bb1f11 | 573 | |
fc2acc87 RH |
574 | /* Implement `va_start' for varargs and stdarg. */ |
575 | extern void mn10300_va_start(); | |
576 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
577 | mn10300_va_start (stdarg, valist, nextarg) | |
578 | ||
579 | /* Implement `va_arg'. */ | |
580 | extern struct rtx_def *mn10300_va_arg(); | |
581 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
582 | mn10300_va_arg (valist, type) | |
583 | ||
11bb1f11 JL |
584 | /* Addressing modes, and classification of registers for them. */ |
585 | ||
586 | \f | |
587 | /* 1 if X is an rtx for a constant that is a valid address. */ | |
588 | ||
589 | #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) | |
590 | ||
591 | /* Extra constraints. */ | |
592 | ||
38c37a0e JL |
593 | #define OK_FOR_R(OP) \ |
594 | (GET_CODE (OP) == MEM \ | |
595 | && GET_MODE (OP) == QImode \ | |
596 | && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \ | |
597 | || (GET_CODE (XEXP (OP, 0)) == REG \ | |
4d1a91c2 | 598 | && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \ |
38c37a0e JL |
599 | && XEXP (OP, 0) != stack_pointer_rtx) \ |
600 | || (GET_CODE (XEXP (OP, 0)) == PLUS \ | |
601 | && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ | |
4d1a91c2 | 602 | && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \ |
38c37a0e JL |
603 | && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \ |
604 | && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \ | |
605 | && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1)))))) | |
606 | ||
11bb1f11 | 607 | #define EXTRA_CONSTRAINT(OP, C) \ |
38c37a0e | 608 | ((C) == 'R' ? OK_FOR_R (OP) : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : 0) |
11bb1f11 JL |
609 | |
610 | /* Maximum number of registers that can appear in a valid memory address. */ | |
611 | ||
612 | #define MAX_REGS_PER_ADDRESS 2 | |
613 | ||
614 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
615 | and check its validity for a certain class. | |
616 | We have two alternate definitions for each of them. | |
617 | The usual definition accepts all pseudo regs; the other rejects | |
618 | them unless they have been allocated suitable hard regs. | |
619 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
620 | ||
621 | Most source files want to accept pseudo regs in the hope that | |
622 | they will get allocated to the class that the insn wants them to be in. | |
623 | Source files for reload pass need to be strict. | |
624 | After reload, it makes no difference, since pseudo regs have | |
625 | been eliminated by then. */ | |
626 | ||
627 | #ifndef REG_OK_STRICT | |
628 | /* Nonzero if X is a hard reg that can be used as an index | |
629 | or if it is a pseudo reg. */ | |
630 | #define REG_OK_FOR_INDEX_P(X) \ | |
4d1a91c2 | 631 | ((REGNO (X) >= 0 && REGNO(X) <= 3) || REGNO (X) >= 10) |
11bb1f11 JL |
632 | /* Nonzero if X is a hard reg that can be used as a base reg |
633 | or if it is a pseudo reg. */ | |
634 | #define REG_OK_FOR_BASE_P(X) \ | |
4d1a91c2 JL |
635 | ((REGNO (X) >= 4 && REGNO(X) <= 9) || REGNO (X) >= 10) |
636 | #define REG_OK_FOR_BIT_BASE_P(X) \ | |
637 | ((REGNO (X) >= 4 && REGNO(X) <= 9)) | |
11bb1f11 JL |
638 | #else |
639 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
640 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
641 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
642 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
4d1a91c2 JL |
643 | /* Nonzero if X is a hard reg that can be used as a base reg. */ |
644 | #define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X)) | |
11bb1f11 JL |
645 | #endif |
646 | ||
647 | \f | |
648 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
649 | that is a valid memory address for an instruction. | |
650 | The MODE argument is the machine mode for the MEM expression | |
651 | that wants to use this address. | |
652 | ||
653 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
654 | except for CONSTANT_ADDRESS_P which is actually | |
0cecc190 JL |
655 | machine-independent. |
656 | ||
657 | On the mn10300, the value in the address register must be | |
658 | in the same memory space/segment as the effective address. | |
659 | ||
660 | This is problematical for reload since it does not understand | |
661 | that base+index != index+base in a memory reference. | |
662 | ||
663 | Note it is still possible to use reg+reg addressing modes, | |
664 | it's just much more difficult. For a discussion of a possible | |
665 | workaround and solution, see the comments in pa.c before the | |
666 | function record_unscaled_index_insn_codes. */ | |
11bb1f11 JL |
667 | |
668 | /* Accept either REG or SUBREG where a register is valid. */ | |
669 | ||
670 | #define RTX_OK_FOR_BASE_P(X) \ | |
671 | ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
672 | || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ | |
673 | && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) | |
674 | ||
675 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
676 | { \ | |
677 | if (CONSTANT_ADDRESS_P (X)) \ | |
678 | goto ADDR; \ | |
679 | if (RTX_OK_FOR_BASE_P (X)) \ | |
680 | goto ADDR; \ | |
681 | if (GET_CODE (X) == PLUS) \ | |
682 | { \ | |
683 | rtx base = 0, index = 0; \ | |
684 | if (REG_P (XEXP (X, 0)) \ | |
685 | && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
686 | base = XEXP (X, 0), index = XEXP (X, 1); \ | |
687 | if (REG_P (XEXP (X, 1)) \ | |
688 | && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
689 | base = XEXP (X, 1), index = XEXP (X, 0); \ | |
690 | if (base != 0 && index != 0) \ | |
691 | { \ | |
e9ad4573 | 692 | if (GET_CODE (index) == CONST_INT) \ |
11bb1f11 | 693 | goto ADDR; \ |
11bb1f11 JL |
694 | } \ |
695 | } \ | |
696 | } | |
697 | ||
698 | \f | |
699 | /* Try machine-dependent ways of modifying an illegitimate address | |
700 | to be legitimate. If we find one, return the new, valid address. | |
701 | This macro is used in only one place: `memory_address' in explow.c. | |
702 | ||
703 | OLDX is the address as it was before break_out_memory_refs was called. | |
704 | In some cases it is useful to look at this to decide what needs to be done. | |
705 | ||
706 | MODE and WIN are passed so that this macro can use | |
707 | GO_IF_LEGITIMATE_ADDRESS. | |
708 | ||
709 | It is always safe for this macro to do nothing. It exists to recognize | |
710 | opportunities to optimize the output. */ | |
711 | ||
e9ad4573 JL |
712 | extern struct rtx_def *legitimize_address (); |
713 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ | |
714 | { rtx orig_x = (X); \ | |
715 | (X) = legitimize_address (X, OLDX, MODE); \ | |
716 | if ((X) != orig_x && memory_address_p (MODE, X)) \ | |
717 | goto WIN; } | |
11bb1f11 JL |
718 | |
719 | /* Go to LABEL if ADDR (a legitimate address expression) | |
720 | has an effect that depends on the machine mode it is used for. */ | |
721 | ||
722 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {} | |
723 | ||
724 | /* Nonzero if the constant value X is a legitimate general operand. | |
725 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
726 | ||
38c37a0e | 727 | #define LEGITIMATE_CONSTANT_P(X) 1 |
11bb1f11 JL |
728 | |
729 | \f | |
730 | /* Tell final.c how to eliminate redundant test instructions. */ | |
731 | ||
732 | /* Here we define machine-dependent flags and fields in cc_status | |
733 | (see `conditions.h'). No extra ones are needed for the vax. */ | |
734 | ||
735 | /* Store in cc_status the expressions | |
736 | that the condition codes will describe | |
737 | after execution of an instruction whose pattern is EXP. | |
738 | Do not alter them if the instruction would not alter the cc's. */ | |
739 | ||
82c6faa8 | 740 | #define CC_OVERFLOW_UNUSABLE 0x200 |
d116300b | 741 | #define CC_NO_CARRY CC_NO_OVERFLOW |
11bb1f11 JL |
742 | #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) |
743 | ||
744 | /* Compute the cost of computing a constant rtl expression RTX | |
745 | whose rtx-code is CODE. The body of this macro is a portion | |
746 | of a switch statement. If the code is computed here, | |
747 | return it with a return statement. Otherwise, break from the switch. */ | |
748 | ||
749 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
38c37a0e JL |
750 | case CONST_INT: \ |
751 | /* Zeros are extremely cheap. */ \ | |
752 | if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \ | |
753 | return 0; \ | |
754 | /* If it fits in 8 bits, then it's still relatively cheap. */ \ | |
755 | if (INT_8_BITS (INTVAL (RTX))) \ | |
756 | return 1; \ | |
757 | /* This is the "base" cost, includes constants where either the \ | |
758 | upper or lower 16bits are all zeros. */ \ | |
759 | if (INT_16_BITS (INTVAL (RTX)) \ | |
760 | || (INTVAL (RTX) & 0xffff) == 0 \ | |
761 | || (INTVAL (RTX) & 0xffff0000) == 0) \ | |
762 | return 2; \ | |
763 | return 4; \ | |
764 | /* These are more costly than a CONST_INT, but we can relax them, \ | |
765 | so they're less costly than a CONST_DOUBLE. */ \ | |
766 | case CONST: \ | |
767 | case LABEL_REF: \ | |
768 | case SYMBOL_REF: \ | |
769 | return 6; \ | |
770 | /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \ | |
771 | so their cost is very high. */ \ | |
772 | case CONST_DOUBLE: \ | |
773 | return 8; | |
774 | ||
11bb1f11 | 775 | |
6c0870b8 | 776 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) (CLASS1 != CLASS2 ? 4 : 2) |
11bb1f11 JL |
777 | |
778 | /* A crude cut at RTX_COSTS for the MN10300. */ | |
779 | ||
780 | /* Provide the costs of a rtl expression. This is in the body of a | |
22ef4e9b | 781 | switch on CODE. */ |
11bb1f11 | 782 | #define RTX_COSTS(RTX,CODE,OUTER_CODE) \ |
6b7e236f JL |
783 | case UMOD: \ |
784 | case UDIV: \ | |
11bb1f11 JL |
785 | case MOD: \ |
786 | case DIV: \ | |
22ef4e9b | 787 | return 8; \ |
11bb1f11 | 788 | case MULT: \ |
22ef4e9b | 789 | return 8; |
11bb1f11 JL |
790 | |
791 | /* Nonzero if access to memory by bytes or half words is no faster | |
792 | than accessing full words. */ | |
793 | #define SLOW_BYTE_ACCESS 1 | |
794 | ||
22ef4e9b JL |
795 | /* Dispatch tables on the mn10300 are extremely expensive in terms of code |
796 | and readonly data size. So we crank up the case threshold value to | |
797 | encourage a series of if/else comparisons to implement many small switch | |
798 | statements. In theory, this value could be increased much more if we | |
799 | were solely optimizing for space, but we keep it "reasonable" to avoid | |
800 | serious code efficiency lossage. */ | |
801 | #define CASE_VALUES_THRESHOLD 6 | |
802 | ||
803 | #define NO_FUNCTION_CSE | |
804 | ||
11bb1f11 JL |
805 | /* According expr.c, a value of around 6 should minimize code size, and |
806 | for the MN10300 series, that's our primary concern. */ | |
807 | #define MOVE_RATIO 6 | |
808 | ||
809 | #define TEXT_SECTION_ASM_OP "\t.section .text" | |
810 | #define DATA_SECTION_ASM_OP "\t.section .data" | |
811 | #define BSS_SECTION_ASM_OP "\t.section .bss" | |
812 | ||
813 | /* Output at beginning/end of assembler file. */ | |
814 | #undef ASM_FILE_START | |
815 | #define ASM_FILE_START(FILE) asm_file_start(FILE) | |
816 | ||
817 | #define ASM_COMMENT_START "#" | |
818 | ||
819 | /* Output to assembler file text saying following lines | |
820 | may contain character constants, extra white space, comments, etc. */ | |
821 | ||
822 | #define ASM_APP_ON "#APP\n" | |
823 | ||
824 | /* Output to assembler file text saying following lines | |
825 | no longer contain unusual constructs. */ | |
826 | ||
827 | #define ASM_APP_OFF "#NO_APP\n" | |
828 | ||
829 | /* This is how to output an assembler line defining a `double' constant. | |
830 | It is .dfloat or .gfloat, depending. */ | |
831 | ||
832 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ | |
833 | do { char dstr[30]; \ | |
834 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \ | |
835 | fprintf (FILE, "\t.double %s\n", dstr); \ | |
836 | } while (0) | |
837 | ||
838 | ||
839 | /* This is how to output an assembler line defining a `float' constant. */ | |
840 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ | |
841 | do { char dstr[30]; \ | |
842 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \ | |
843 | fprintf (FILE, "\t.float %s\n", dstr); \ | |
844 | } while (0) | |
845 | ||
846 | /* This is how to output an assembler line defining an `int' constant. */ | |
847 | ||
848 | #define ASM_OUTPUT_INT(FILE, VALUE) \ | |
849 | ( fprintf (FILE, "\t.long "), \ | |
850 | output_addr_const (FILE, (VALUE)), \ | |
851 | fprintf (FILE, "\n")) | |
852 | ||
853 | /* Likewise for `char' and `short' constants. */ | |
854 | ||
855 | #define ASM_OUTPUT_SHORT(FILE, VALUE) \ | |
856 | ( fprintf (FILE, "\t.hword "), \ | |
857 | output_addr_const (FILE, (VALUE)), \ | |
858 | fprintf (FILE, "\n")) | |
859 | ||
860 | #define ASM_OUTPUT_CHAR(FILE, VALUE) \ | |
861 | ( fprintf (FILE, "\t.byte "), \ | |
862 | output_addr_const (FILE, (VALUE)), \ | |
863 | fprintf (FILE, "\n")) | |
864 | ||
865 | /* This is how to output an assembler line for a numeric constant byte. */ | |
866 | #define ASM_OUTPUT_BYTE(FILE, VALUE) \ | |
867 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
868 | ||
869 | /* Define the parentheses used to group arithmetic operations | |
870 | in assembler code. */ | |
871 | ||
872 | #define ASM_OPEN_PAREN "(" | |
873 | #define ASM_CLOSE_PAREN ")" | |
874 | ||
875 | /* This says how to output the assembler to define a global | |
876 | uninitialized but not common symbol. | |
877 | Try to use asm_output_bss to implement this macro. */ | |
878 | ||
f7620587 JL |
879 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ |
880 | asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) | |
11bb1f11 JL |
881 | |
882 | /* This is how to output the definition of a user-level label named NAME, | |
883 | such as the label on a static function or variable NAME. */ | |
884 | ||
885 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
886 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
887 | ||
888 | /* This is how to output a command to make the user-level label named NAME | |
889 | defined for reference from other files. */ | |
890 | ||
891 | #define ASM_GLOBALIZE_LABEL(FILE, NAME) \ | |
892 | do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
893 | ||
894 | /* This is how to output a reference to a user-level label named NAME. | |
895 | `assemble_name' uses this. */ | |
896 | ||
897 | #undef ASM_OUTPUT_LABELREF | |
898 | #define ASM_OUTPUT_LABELREF(FILE, NAME) \ | |
899 | do { \ | |
ec940faa | 900 | const char* real_name; \ |
11bb1f11 JL |
901 | STRIP_NAME_ENCODING (real_name, (NAME)); \ |
902 | fprintf (FILE, "_%s", real_name); \ | |
903 | } while (0) | |
904 | ||
905 | /* Store in OUTPUT a string (made with alloca) containing | |
906 | an assembler-name for a local static variable named NAME. | |
907 | LABELNO is an integer which is different for each call. */ | |
908 | ||
909 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
910 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
911 | sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) | |
912 | ||
913 | /* This is how we tell the assembler that two symbols have the same value. */ | |
914 | ||
915 | #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ | |
916 | do { assemble_name(FILE, NAME1); \ | |
917 | fputs(" = ", FILE); \ | |
918 | assemble_name(FILE, NAME2); \ | |
919 | fputc('\n', FILE); } while (0) | |
920 | ||
921 | ||
922 | /* How to refer to registers in assembler output. | |
923 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
924 | ||
925 | #define REGISTER_NAMES \ | |
777fbf09 | 926 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp" } |
11bb1f11 JL |
927 | |
928 | /* Print an instruction operand X on file FILE. | |
929 | look in mn10300.c for details */ | |
930 | ||
931 | #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE) | |
932 | ||
933 | /* Print a memory operand whose address is X, on file FILE. | |
934 | This uses a function in output-vax.c. */ | |
935 | ||
936 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
937 | ||
938 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) | |
939 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) | |
940 | ||
941 | /* This is how to output an element of a case-vector that is absolute. */ | |
942 | ||
943 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
944 | asm_fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) | |
945 | ||
946 | /* This is how to output an element of a case-vector that is relative. */ | |
947 | ||
33f7f353 | 948 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
11bb1f11 JL |
949 | fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) |
950 | ||
951 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
952 | if ((LOG) != 0) \ | |
953 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
954 | ||
956d6950 | 955 | /* We don't have to worry about dbx compatibility for the mn10300. */ |
11bb1f11 JL |
956 | #define DEFAULT_GDB_EXTENSIONS 1 |
957 | ||
958 | /* Use stabs debugging info by default. */ | |
959 | #undef PREFERRED_DEBUGGING_TYPE | |
960 | #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG | |
961 | ||
962 | #define DBX_REGISTER_NUMBER(REGNO) REGNO | |
963 | ||
4944f54f JL |
964 | /* GDB always assumes the current function's frame begins at the value |
965 | of the stack pointer upon entry to the current function. Accessing | |
966 | local variables and parameters passed on the stack is done using the | |
967 | base of the frame + an offset provided by GCC. | |
968 | ||
969 | For functions which have frame pointers this method works fine; | |
970 | the (frame pointer) == (stack pointer at function entry) and GCC provides | |
971 | an offset relative to the frame pointer. | |
972 | ||
973 | This loses for functions without a frame pointer; GCC provides an offset | |
974 | which is relative to the stack pointer after adjusting for the function's | |
975 | frame size. GDB would prefer the offset to be relative to the value of | |
976 | the stack pointer at the function's entry. Yuk! */ | |
977 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
978 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ | |
979 | + (frame_pointer_needed \ | |
980 | ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM))) | |
981 | ||
982 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ | |
983 | ((GET_CODE (X) == PLUS ? OFFSET : 0) \ | |
984 | + (frame_pointer_needed \ | |
985 | ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM))) | |
986 | ||
fa88e837 JL |
987 | /* We need to prepend underscores. */ |
988 | #define ASM_OUTPUT_DWARF2_ADDR_CONST(FILE,ADDR) \ | |
989 | fprintf ((FILE), "\t%s\t_%s", UNALIGNED_WORD_ASM_OP, (ADDR)) | |
990 | ||
11bb1f11 JL |
991 | /* Define to use software floating point emulator for REAL_ARITHMETIC and |
992 | decimal <-> binary conversion. */ | |
993 | #define REAL_ARITHMETIC | |
994 | ||
995 | /* Specify the machine mode that this machine uses | |
996 | for the index in the tablejump instruction. */ | |
997 | #define CASE_VECTOR_MODE Pmode | |
998 | ||
11bb1f11 JL |
999 | /* Define if operations between registers always perform the operation |
1000 | on the full register even if a narrower mode is specified. */ | |
1001 | #define WORD_REGISTER_OPERATIONS | |
1002 | ||
1003 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
1004 | ||
1005 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1006 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1007 | ||
1008 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1009 | also convert validly to an unsigned one. */ | |
1010 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1011 | ||
1012 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1013 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1014 | ||
1015 | /* Max number of bytes we can move from memory to memory | |
1016 | in one reasonably fast instruction. */ | |
1017 | #define MOVE_MAX 4 | |
1018 | ||
1019 | /* Define if shifts truncate the shift count | |
1020 | which implies one can omit a sign-extension or zero-extension | |
1021 | of a shift count. */ | |
1022 | #define SHIFT_COUNT_TRUNCATED 1 | |
1023 | ||
1024 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1025 | is done just by pretending it is already truncated. */ | |
1026 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1027 | ||
11bb1f11 JL |
1028 | /* Specify the machine mode that pointers have. |
1029 | After generation of rtl, the compiler makes no further distinction | |
1030 | between pointers and any other objects of this machine mode. */ | |
1031 | #define Pmode SImode | |
1032 | ||
1033 | /* A function address in a call instruction | |
1034 | is a byte address (for indexing purposes) | |
1035 | so give the MEM rtx a byte's mode. */ | |
1036 | #define FUNCTION_MODE QImode | |
1037 | ||
1038 | /* The assembler op to get a word. */ | |
1039 | ||
1040 | #define FILE_ASM_OP "\t.file\n" | |
1041 | ||
1042 | extern void asm_file_start (); | |
1043 | extern int const_costs (); | |
1044 | extern void print_operand (); | |
1045 | extern void print_operand_address (); | |
1046 | extern void expand_prologue (); | |
1047 | extern void expand_epilogue (); | |
1048 | extern void notice_update_cc (); | |
1049 | extern int call_address_operand (); | |
460f4b9d | 1050 | extern int impossible_plus_operand (); |
11bb1f11 | 1051 | extern enum reg_class secondary_reload_class (); |
777fbf09 | 1052 | extern int initial_offset (); |
22ef4e9b | 1053 | extern char *output_tst (); |
e9ad4573 | 1054 | int symbolic_operand (); |