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9304f876 | 1 | /* Prototypes for exported functions of Andes NDS32 cpu for GNU compiler |
85ec4feb | 2 | Copyright (C) 2012-2018 Free Software Foundation, Inc. |
9304f876 CJW |
3 | Contributed by Andes Technology Corporation. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published | |
9 | by the Free Software Foundation; either version 3, or (at your | |
10 | option) any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | ||
22 | /* ------------------------------------------------------------------------ */ | |
23 | \f | |
24 | /* Defining Data Structures for Per-function Information. */ | |
25 | ||
26 | extern void nds32_init_expanders (void); | |
27 | ||
9304f876 | 28 | \f |
5e6ae0cc CJW |
29 | /* Register Usage. */ |
30 | ||
31 | /* -- Order of Allocation of Registers. */ | |
32 | extern void nds32_adjust_reg_alloc_order (void); | |
33 | ||
9304f876 CJW |
34 | /* Register Classes. */ |
35 | ||
36 | extern enum reg_class nds32_regno_reg_class (int); | |
37 | ||
38 | \f | |
39 | /* Stack Layout and Calling Conventions. */ | |
40 | ||
41 | /* -- Basic Stack Layout. */ | |
42 | ||
ca3a4a55 | 43 | extern rtx nds32_dynamic_chain_address (rtx); |
9304f876 CJW |
44 | extern rtx nds32_return_addr_rtx (int, rtx); |
45 | ||
46 | /* -- Eliminating Frame Pointer and Arg Pointer. */ | |
47 | ||
48 | extern HOST_WIDE_INT nds32_initial_elimination_offset (unsigned int, | |
49 | unsigned int); | |
50 | ||
51 | /* -- Passing Arguments in Registers. */ | |
52 | ||
53 | extern void nds32_init_cumulative_args (CUMULATIVE_ARGS *, | |
54 | tree, rtx, tree, int); | |
55 | ||
56 | /* -- Function Entry and Exit. */ | |
57 | ||
58 | extern void nds32_expand_prologue (void); | |
d6529176 | 59 | extern void nds32_expand_epilogue (bool); |
9304f876 | 60 | extern void nds32_expand_prologue_v3push (void); |
d6529176 | 61 | extern void nds32_expand_epilogue_v3pop (bool); |
e2286268 MC |
62 | extern void nds32_emit_push_fpr_callee_saved (int); |
63 | extern void nds32_emit_pop_fpr_callee_saved (int); | |
64 | extern void nds32_emit_v3pop_fpr_callee_saved (int); | |
65 | ||
66 | /* Controlling Debugging Information Format. */ | |
67 | ||
68 | extern unsigned int nds32_dbx_register_number (unsigned int); | |
9304f876 CJW |
69 | |
70 | /* ------------------------------------------------------------------------ */ | |
71 | ||
72 | /* Auxiliary functions for auxiliary macros in nds32.h. */ | |
73 | ||
ef4bddc2 | 74 | extern bool nds32_ls_333_p (rtx, rtx, rtx, machine_mode); |
9304f876 | 75 | |
e576ddb5 KC |
76 | /* Auxiliary functions for lwm/smw. */ |
77 | ||
78 | extern bool nds32_valid_smw_lwm_base_p (rtx); | |
79 | ||
9304f876 CJW |
80 | /* Auxiliary functions for expanding rtl used in nds32-multiple.md. */ |
81 | ||
32a6f4f4 KC |
82 | extern rtx nds32_expand_load_multiple (int, int, rtx, rtx, bool, rtx *); |
83 | extern rtx nds32_expand_store_multiple (int, int, rtx, rtx, bool, rtx *); | |
eab7aaed | 84 | extern bool nds32_expand_movmemsi (rtx, rtx, rtx, rtx); |
142439c5 | 85 | extern bool nds32_expand_setmem (rtx, rtx, rtx, rtx, rtx, rtx); |
483c57af | 86 | extern bool nds32_expand_strlen (rtx, rtx, rtx, rtx); |
9304f876 | 87 | |
e576ddb5 KC |
88 | /* Auxiliary functions for expand unalign load instruction. */ |
89 | ||
90 | extern void nds32_expand_unaligned_load (rtx *, enum machine_mode); | |
91 | ||
92 | /* Auxiliary functions for expand unalign store instruction. */ | |
93 | ||
94 | extern void nds32_expand_unaligned_store (rtx *, enum machine_mode); | |
95 | ||
9304f876 CJW |
96 | /* Auxiliary functions for multiple load/store predicate checking. */ |
97 | ||
32a6f4f4 | 98 | extern bool nds32_valid_multiple_load_store_p (rtx, bool, bool); |
9304f876 | 99 | |
b99353a2 KC |
100 | /* Auxiliary functions for guard function checking in pipelines.md. */ |
101 | ||
63ab910d KC |
102 | extern bool nds32_n7_load_to_ii_p (rtx_insn *, rtx_insn *); |
103 | extern bool nds32_n7_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
104 | ||
8fd52141 KC |
105 | extern bool nds32_n8_load_to_ii_p (rtx_insn *, rtx_insn *); |
106 | extern bool nds32_n8_load_bi_to_ii_p (rtx_insn *, rtx_insn *); | |
107 | extern bool nds32_n8_load_to_ex_p (rtx_insn *, rtx_insn *); | |
108 | extern bool nds32_n8_ex_to_ii_p (rtx_insn *, rtx_insn *); | |
109 | extern bool nds32_n8_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
110 | extern bool nds32_n8_last_load_two_to_ii_p (rtx_insn *, rtx_insn *); | |
111 | extern bool nds32_n8_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
112 | ||
7c1583bd KC |
113 | extern bool nds32_e8_load_to_ii_p (rtx_insn *, rtx_insn *); |
114 | extern bool nds32_e8_load_to_ex_p (rtx_insn *, rtx_insn *); | |
115 | extern bool nds32_e8_ex_to_ii_p (rtx_insn *, rtx_insn *); | |
116 | extern bool nds32_e8_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
117 | extern bool nds32_e8_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
118 | ||
b99353a2 KC |
119 | extern bool nds32_n9_2r1w_mm_to_ex_p (rtx_insn *, rtx_insn *); |
120 | extern bool nds32_n9_3r2w_mm_to_ex_p (rtx_insn *, rtx_insn *); | |
121 | extern bool nds32_n9_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
122 | ||
123 | ||
9304f876 CJW |
124 | /* Auxiliary functions for stack operation predicate checking. */ |
125 | ||
1509ec03 | 126 | extern bool nds32_valid_stack_push_pop_p (rtx, bool); |
9304f876 CJW |
127 | |
128 | /* Auxiliary functions for bit operation detection. */ | |
129 | ||
130 | extern int nds32_can_use_bclr_p (int); | |
131 | extern int nds32_can_use_bset_p (int); | |
132 | extern int nds32_can_use_btgl_p (int); | |
133 | ||
134 | extern int nds32_can_use_bitci_p (int); | |
135 | ||
e2286268 MC |
136 | extern bool nds32_const_double_range_ok_p (rtx, machine_mode, |
137 | HOST_WIDE_INT, HOST_WIDE_INT); | |
138 | ||
9304f876 CJW |
139 | /* Auxiliary function for 'Computing the Length of an Insn'. */ |
140 | ||
ca009aee | 141 | extern int nds32_adjust_insn_length (rtx_insn *, int); |
9304f876 CJW |
142 | |
143 | /* Auxiliary functions for FP_AS_GP detection. */ | |
144 | ||
9304f876 CJW |
145 | extern int nds32_fp_as_gp_check_available (void); |
146 | ||
c4d8d050 CJW |
147 | extern bool nds32_symbol_load_store_p (rtx_insn *); |
148 | ||
9304f876 CJW |
149 | /* Auxiliary functions for jump table generation. */ |
150 | ||
151 | extern const char *nds32_output_casesi_pc_relative (rtx *); | |
152 | extern const char *nds32_output_casesi (rtx *); | |
153 | ||
6e9ca932 CJW |
154 | /* Auxiliary functions for conditional branch generation. */ |
155 | ||
156 | extern enum nds32_expand_result_type nds32_expand_cbranch (rtx *); | |
157 | extern enum nds32_expand_result_type nds32_expand_cstore (rtx *); | |
e2286268 MC |
158 | extern void nds32_expand_float_cbranch (rtx *); |
159 | extern void nds32_expand_float_cstore (rtx *); | |
6e9ca932 CJW |
160 | |
161 | /* Auxiliary functions for conditional move generation. */ | |
162 | ||
163 | extern enum nds32_expand_result_type nds32_expand_movcc (rtx *); | |
e2286268 | 164 | extern void nds32_expand_float_movcc (rtx *); |
6e9ca932 CJW |
165 | |
166 | ||
cc48a87f CJW |
167 | /* Auxiliary functions to identify long-call symbol. */ |
168 | extern bool nds32_long_call_p (rtx); | |
169 | ||
e2286268 MC |
170 | /* Auxiliary functions to identify conditional move comparison operand. */ |
171 | ||
172 | extern int nds32_cond_move_p (rtx); | |
173 | ||
9304f876 CJW |
174 | /* Auxiliary functions to identify 16 bit addresing mode. */ |
175 | ||
176 | extern enum nds32_16bit_address_type nds32_mem_format (rtx); | |
177 | ||
e2286268 MC |
178 | /* Auxiliary functions to identify floating-point addresing mode. */ |
179 | ||
180 | extern bool nds32_float_mem_operand_p (rtx); | |
181 | ||
9304f876 CJW |
182 | /* Auxiliary functions to output assembly code. */ |
183 | ||
184 | extern const char *nds32_output_16bit_store (rtx *, int); | |
185 | extern const char *nds32_output_16bit_load (rtx *, int); | |
186 | extern const char *nds32_output_32bit_store (rtx *, int); | |
187 | extern const char *nds32_output_32bit_load (rtx *, int); | |
188 | extern const char *nds32_output_32bit_load_s (rtx *, int); | |
e2286268 MC |
189 | extern const char *nds32_output_float_load(rtx *); |
190 | extern const char *nds32_output_float_store(rtx *); | |
e576ddb5 KC |
191 | extern const char *nds32_output_smw_single_word (rtx *); |
192 | extern const char *nds32_output_lmw_single_word (rtx *); | |
e2286268 | 193 | extern const char *nds32_output_double (rtx *, bool); |
6e9ca932 CJW |
194 | extern const char *nds32_output_cbranchsi4_equality_zero (rtx_insn *, rtx *); |
195 | extern const char *nds32_output_cbranchsi4_equality_reg (rtx_insn *, rtx *); | |
196 | extern const char *nds32_output_cbranchsi4_equality_reg_or_const_int (rtx_insn *, | |
197 | rtx *); | |
198 | extern const char *nds32_output_cbranchsi4_greater_less_zero (rtx_insn *, rtx *); | |
199 | ||
f4670673 CJW |
200 | extern const char *nds32_output_call (rtx, rtx *, rtx, |
201 | const char *, const char *, bool); | |
202 | ||
9304f876 CJW |
203 | |
204 | /* Auxiliary functions to output stack push/pop instruction. */ | |
205 | ||
6f3d3f9c CJW |
206 | extern const char *nds32_output_stack_push (rtx); |
207 | extern const char *nds32_output_stack_pop (rtx); | |
f4670673 | 208 | extern const char *nds32_output_return (void); |
9304f876 | 209 | |
e2286268 MC |
210 | /* Auxiliary functions to split double word RTX pattern. */ |
211 | ||
212 | extern void nds32_spilt_doubleword (rtx *, bool); | |
213 | ||
a3b13564 KC |
214 | /* Auxiliary functions to split large constant RTX pattern. */ |
215 | ||
216 | extern void nds32_expand_constant (machine_mode, | |
217 | HOST_WIDE_INT, rtx, rtx); | |
218 | ||
03390cda CJW |
219 | /* Auxiliary functions to check using return with null epilogue. */ |
220 | ||
221 | extern int nds32_can_use_return_insn (void); | |
222 | ||
9304f876 CJW |
223 | /* Auxiliary functions to decide output alignment or not. */ |
224 | ||
82082f65 | 225 | extern int nds32_target_alignment (rtx_insn *); |
9304f876 | 226 | |
aaa44d2d CJW |
227 | /* Auxiliary functions to expand builtin functions. */ |
228 | ||
229 | extern void nds32_init_builtins_impl (void); | |
230 | extern rtx nds32_expand_builtin_impl (tree, rtx, rtx, | |
ef4bddc2 | 231 | machine_mode, int); |
7a12ea32 | 232 | extern tree nds32_builtin_decl_impl (unsigned, bool); |
aaa44d2d | 233 | |
c23a919b CJW |
234 | /* Auxiliary functions for ISR implementation. */ |
235 | ||
236 | extern void nds32_check_isr_attrs_conflict (tree, tree); | |
237 | extern void nds32_construct_isr_vectors_information (tree, const char *); | |
238 | extern void nds32_asm_file_start_for_isr (void); | |
239 | extern void nds32_asm_file_end_for_isr (void); | |
126b11c6 | 240 | extern bool nds32_isr_function_p (tree); |
c23a919b | 241 | |
89a4b547 CJW |
242 | /* Auxiliary functions for cost calculation. */ |
243 | ||
e548c9df | 244 | extern bool nds32_rtx_costs_impl (rtx, machine_mode, int, int, int *, bool); |
ef4bddc2 | 245 | extern int nds32_address_cost_impl (rtx, machine_mode, addr_space_t, bool); |
89a4b547 | 246 | |
72b7e5e1 KC |
247 | /* Auxiliary functions for pre-define marco. */ |
248 | extern void nds32_cpu_cpp_builtins(struct cpp_reader *); | |
249 | ||
e2286268 MC |
250 | extern bool nds32_split_double_word_load_store_p (rtx *,bool); |
251 | ||
b99353a2 KC |
252 | namespace nds32 { |
253 | ||
254 | extern rtx extract_pattern_from_insn (rtx); | |
255 | ||
256 | size_t parallel_elements (rtx); | |
257 | rtx parallel_element (rtx, int); | |
258 | bool load_single_p (rtx_insn *); | |
259 | bool store_single_p (rtx_insn *); | |
260 | bool load_double_p (rtx_insn *); | |
261 | bool store_double_p (rtx_insn *); | |
262 | bool post_update_insn_p (rtx_insn *); | |
263 | bool immed_offset_p (rtx); | |
264 | int find_post_update_rtx (rtx_insn *); | |
265 | rtx extract_mem_rtx (rtx_insn *); | |
266 | rtx extract_base_reg (rtx_insn *); | |
267 | ||
268 | rtx extract_shift_reg (rtx); | |
269 | ||
270 | bool movd44_insn_p (rtx_insn *); | |
8fd52141 | 271 | rtx extract_movd44_odd_reg (rtx_insn *); |
b99353a2 KC |
272 | |
273 | rtx extract_mac_non_acc_rtx (rtx_insn *); | |
8fd52141 KC |
274 | |
275 | rtx extract_branch_target_rtx (rtx_insn *); | |
276 | rtx extract_branch_condition_rtx (rtx_insn *); | |
b99353a2 KC |
277 | } // namespace nds32 |
278 | ||
c4d8d050 CJW |
279 | /* Functions for create nds32 specific optimization pass. */ |
280 | extern rtl_opt_pass *make_pass_nds32_relax_opt (gcc::context *); | |
281 | ||
9304f876 | 282 | /* ------------------------------------------------------------------------ */ |