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9304f876 | 1 | /* Prototypes for exported functions of Andes NDS32 cpu for GNU compiler |
85ec4feb | 2 | Copyright (C) 2012-2018 Free Software Foundation, Inc. |
9304f876 CJW |
3 | Contributed by Andes Technology Corporation. |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published | |
9 | by the Free Software Foundation; either version 3, or (at your | |
10 | option) any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | ||
22 | /* ------------------------------------------------------------------------ */ | |
23 | \f | |
24 | /* Defining Data Structures for Per-function Information. */ | |
25 | ||
26 | extern void nds32_init_expanders (void); | |
27 | ||
9304f876 | 28 | \f |
5e6ae0cc CJW |
29 | /* Register Usage. */ |
30 | ||
31 | /* -- Order of Allocation of Registers. */ | |
32 | extern void nds32_adjust_reg_alloc_order (void); | |
33 | ||
9304f876 CJW |
34 | /* Register Classes. */ |
35 | ||
36 | extern enum reg_class nds32_regno_reg_class (int); | |
37 | ||
38 | \f | |
39 | /* Stack Layout and Calling Conventions. */ | |
40 | ||
41 | /* -- Basic Stack Layout. */ | |
42 | ||
ca3a4a55 | 43 | extern rtx nds32_dynamic_chain_address (rtx); |
9304f876 CJW |
44 | extern rtx nds32_return_addr_rtx (int, rtx); |
45 | ||
46 | /* -- Eliminating Frame Pointer and Arg Pointer. */ | |
47 | ||
48 | extern HOST_WIDE_INT nds32_initial_elimination_offset (unsigned int, | |
49 | unsigned int); | |
50 | ||
51 | /* -- Passing Arguments in Registers. */ | |
52 | ||
53 | extern void nds32_init_cumulative_args (CUMULATIVE_ARGS *, | |
54 | tree, rtx, tree, int); | |
55 | ||
56 | /* -- Function Entry and Exit. */ | |
57 | ||
58 | extern void nds32_expand_prologue (void); | |
d6529176 | 59 | extern void nds32_expand_epilogue (bool); |
9304f876 | 60 | extern void nds32_expand_prologue_v3push (void); |
d6529176 | 61 | extern void nds32_expand_epilogue_v3pop (bool); |
e2286268 MC |
62 | extern void nds32_emit_push_fpr_callee_saved (int); |
63 | extern void nds32_emit_pop_fpr_callee_saved (int); | |
64 | extern void nds32_emit_v3pop_fpr_callee_saved (int); | |
65 | ||
66 | /* Controlling Debugging Information Format. */ | |
67 | ||
68 | extern unsigned int nds32_dbx_register_number (unsigned int); | |
9304f876 CJW |
69 | |
70 | /* ------------------------------------------------------------------------ */ | |
71 | ||
e576ddb5 KC |
72 | /* Auxiliary functions for lwm/smw. */ |
73 | ||
74 | extern bool nds32_valid_smw_lwm_base_p (rtx); | |
75 | ||
9304f876 CJW |
76 | /* Auxiliary functions for expanding rtl used in nds32-multiple.md. */ |
77 | ||
32a6f4f4 KC |
78 | extern rtx nds32_expand_load_multiple (int, int, rtx, rtx, bool, rtx *); |
79 | extern rtx nds32_expand_store_multiple (int, int, rtx, rtx, bool, rtx *); | |
eab7aaed | 80 | extern bool nds32_expand_movmemsi (rtx, rtx, rtx, rtx); |
142439c5 | 81 | extern bool nds32_expand_setmem (rtx, rtx, rtx, rtx, rtx, rtx); |
483c57af | 82 | extern bool nds32_expand_strlen (rtx, rtx, rtx, rtx); |
9304f876 | 83 | |
e576ddb5 KC |
84 | /* Auxiliary functions for expand unalign load instruction. */ |
85 | ||
86 | extern void nds32_expand_unaligned_load (rtx *, enum machine_mode); | |
87 | ||
88 | /* Auxiliary functions for expand unalign store instruction. */ | |
89 | ||
90 | extern void nds32_expand_unaligned_store (rtx *, enum machine_mode); | |
91 | ||
9304f876 CJW |
92 | /* Auxiliary functions for multiple load/store predicate checking. */ |
93 | ||
32a6f4f4 | 94 | extern bool nds32_valid_multiple_load_store_p (rtx, bool, bool); |
9304f876 | 95 | |
b99353a2 KC |
96 | /* Auxiliary functions for guard function checking in pipelines.md. */ |
97 | ||
63ab910d KC |
98 | extern bool nds32_n7_load_to_ii_p (rtx_insn *, rtx_insn *); |
99 | extern bool nds32_n7_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
100 | ||
8fd52141 KC |
101 | extern bool nds32_n8_load_to_ii_p (rtx_insn *, rtx_insn *); |
102 | extern bool nds32_n8_load_bi_to_ii_p (rtx_insn *, rtx_insn *); | |
103 | extern bool nds32_n8_load_to_ex_p (rtx_insn *, rtx_insn *); | |
104 | extern bool nds32_n8_ex_to_ii_p (rtx_insn *, rtx_insn *); | |
105 | extern bool nds32_n8_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
106 | extern bool nds32_n8_last_load_two_to_ii_p (rtx_insn *, rtx_insn *); | |
107 | extern bool nds32_n8_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
108 | ||
7c1583bd KC |
109 | extern bool nds32_e8_load_to_ii_p (rtx_insn *, rtx_insn *); |
110 | extern bool nds32_e8_load_to_ex_p (rtx_insn *, rtx_insn *); | |
111 | extern bool nds32_e8_ex_to_ii_p (rtx_insn *, rtx_insn *); | |
112 | extern bool nds32_e8_last_load_to_ii_p (rtx_insn *, rtx_insn *); | |
113 | extern bool nds32_e8_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
114 | ||
b99353a2 KC |
115 | extern bool nds32_n9_2r1w_mm_to_ex_p (rtx_insn *, rtx_insn *); |
116 | extern bool nds32_n9_3r2w_mm_to_ex_p (rtx_insn *, rtx_insn *); | |
117 | extern bool nds32_n9_last_load_to_ex_p (rtx_insn *, rtx_insn *); | |
118 | ||
119 | ||
9304f876 CJW |
120 | /* Auxiliary functions for stack operation predicate checking. */ |
121 | ||
1509ec03 | 122 | extern bool nds32_valid_stack_push_pop_p (rtx, bool); |
9304f876 CJW |
123 | |
124 | /* Auxiliary functions for bit operation detection. */ | |
125 | ||
126 | extern int nds32_can_use_bclr_p (int); | |
127 | extern int nds32_can_use_bset_p (int); | |
128 | extern int nds32_can_use_btgl_p (int); | |
129 | ||
130 | extern int nds32_can_use_bitci_p (int); | |
131 | ||
e2286268 MC |
132 | extern bool nds32_const_double_range_ok_p (rtx, machine_mode, |
133 | HOST_WIDE_INT, HOST_WIDE_INT); | |
134 | ||
9304f876 CJW |
135 | /* Auxiliary function for 'Computing the Length of an Insn'. */ |
136 | ||
ca009aee | 137 | extern int nds32_adjust_insn_length (rtx_insn *, int); |
9304f876 CJW |
138 | |
139 | /* Auxiliary functions for FP_AS_GP detection. */ | |
140 | ||
9304f876 CJW |
141 | extern int nds32_fp_as_gp_check_available (void); |
142 | ||
c4d8d050 CJW |
143 | extern bool nds32_symbol_load_store_p (rtx_insn *); |
144 | ||
9304f876 CJW |
145 | /* Auxiliary functions for jump table generation. */ |
146 | ||
147 | extern const char *nds32_output_casesi_pc_relative (rtx *); | |
148 | extern const char *nds32_output_casesi (rtx *); | |
149 | ||
6e9ca932 CJW |
150 | /* Auxiliary functions for conditional branch generation. */ |
151 | ||
152 | extern enum nds32_expand_result_type nds32_expand_cbranch (rtx *); | |
153 | extern enum nds32_expand_result_type nds32_expand_cstore (rtx *); | |
e2286268 MC |
154 | extern void nds32_expand_float_cbranch (rtx *); |
155 | extern void nds32_expand_float_cstore (rtx *); | |
6e9ca932 CJW |
156 | |
157 | /* Auxiliary functions for conditional move generation. */ | |
158 | ||
159 | extern enum nds32_expand_result_type nds32_expand_movcc (rtx *); | |
e2286268 | 160 | extern void nds32_expand_float_movcc (rtx *); |
6e9ca932 CJW |
161 | |
162 | ||
cc48a87f CJW |
163 | /* Auxiliary functions to identify long-call symbol. */ |
164 | extern bool nds32_long_call_p (rtx); | |
165 | ||
e2286268 MC |
166 | /* Auxiliary functions to identify conditional move comparison operand. */ |
167 | ||
168 | extern int nds32_cond_move_p (rtx); | |
169 | ||
9304f876 CJW |
170 | /* Auxiliary functions to identify 16 bit addresing mode. */ |
171 | ||
172 | extern enum nds32_16bit_address_type nds32_mem_format (rtx); | |
173 | ||
e2286268 MC |
174 | /* Auxiliary functions to identify floating-point addresing mode. */ |
175 | ||
176 | extern bool nds32_float_mem_operand_p (rtx); | |
177 | ||
9304f876 CJW |
178 | /* Auxiliary functions to output assembly code. */ |
179 | ||
180 | extern const char *nds32_output_16bit_store (rtx *, int); | |
181 | extern const char *nds32_output_16bit_load (rtx *, int); | |
182 | extern const char *nds32_output_32bit_store (rtx *, int); | |
183 | extern const char *nds32_output_32bit_load (rtx *, int); | |
184 | extern const char *nds32_output_32bit_load_s (rtx *, int); | |
e2286268 MC |
185 | extern const char *nds32_output_float_load(rtx *); |
186 | extern const char *nds32_output_float_store(rtx *); | |
e576ddb5 KC |
187 | extern const char *nds32_output_smw_single_word (rtx *); |
188 | extern const char *nds32_output_lmw_single_word (rtx *); | |
e2286268 | 189 | extern const char *nds32_output_double (rtx *, bool); |
6e9ca932 CJW |
190 | extern const char *nds32_output_cbranchsi4_equality_zero (rtx_insn *, rtx *); |
191 | extern const char *nds32_output_cbranchsi4_equality_reg (rtx_insn *, rtx *); | |
192 | extern const char *nds32_output_cbranchsi4_equality_reg_or_const_int (rtx_insn *, | |
193 | rtx *); | |
194 | extern const char *nds32_output_cbranchsi4_greater_less_zero (rtx_insn *, rtx *); | |
195 | ||
f4670673 CJW |
196 | extern const char *nds32_output_call (rtx, rtx *, rtx, |
197 | const char *, const char *, bool); | |
198 | ||
9304f876 CJW |
199 | |
200 | /* Auxiliary functions to output stack push/pop instruction. */ | |
201 | ||
6f3d3f9c CJW |
202 | extern const char *nds32_output_stack_push (rtx); |
203 | extern const char *nds32_output_stack_pop (rtx); | |
f4670673 | 204 | extern const char *nds32_output_return (void); |
9304f876 | 205 | |
e2286268 MC |
206 | /* Auxiliary functions to split double word RTX pattern. */ |
207 | ||
208 | extern void nds32_spilt_doubleword (rtx *, bool); | |
209 | ||
a3b13564 KC |
210 | /* Auxiliary functions to split large constant RTX pattern. */ |
211 | ||
212 | extern void nds32_expand_constant (machine_mode, | |
213 | HOST_WIDE_INT, rtx, rtx); | |
214 | ||
03390cda CJW |
215 | /* Auxiliary functions to check using return with null epilogue. */ |
216 | ||
217 | extern int nds32_can_use_return_insn (void); | |
2f1bb3ca | 218 | extern scalar_int_mode nds32_case_vector_shorten_mode (int, int, rtx); |
03390cda | 219 | |
9304f876 CJW |
220 | /* Auxiliary functions to decide output alignment or not. */ |
221 | ||
82082f65 | 222 | extern int nds32_target_alignment (rtx_insn *); |
79498ad8 CJW |
223 | extern unsigned int nds32_data_alignment (tree, unsigned int); |
224 | extern unsigned int nds32_local_alignment (tree, unsigned int); | |
9304f876 | 225 | |
aaa44d2d CJW |
226 | /* Auxiliary functions to expand builtin functions. */ |
227 | ||
228 | extern void nds32_init_builtins_impl (void); | |
229 | extern rtx nds32_expand_builtin_impl (tree, rtx, rtx, | |
ef4bddc2 | 230 | machine_mode, int); |
7a12ea32 | 231 | extern tree nds32_builtin_decl_impl (unsigned, bool); |
aaa44d2d | 232 | |
c23a919b CJW |
233 | /* Auxiliary functions for ISR implementation. */ |
234 | ||
235 | extern void nds32_check_isr_attrs_conflict (tree, tree); | |
236 | extern void nds32_construct_isr_vectors_information (tree, const char *); | |
237 | extern void nds32_asm_file_start_for_isr (void); | |
238 | extern void nds32_asm_file_end_for_isr (void); | |
126b11c6 | 239 | extern bool nds32_isr_function_p (tree); |
c23a919b | 240 | |
89a4b547 CJW |
241 | /* Auxiliary functions for cost calculation. */ |
242 | ||
e548c9df | 243 | extern bool nds32_rtx_costs_impl (rtx, machine_mode, int, int, int *, bool); |
ef4bddc2 | 244 | extern int nds32_address_cost_impl (rtx, machine_mode, addr_space_t, bool); |
89a4b547 | 245 | |
72b7e5e1 KC |
246 | /* Auxiliary functions for pre-define marco. */ |
247 | extern void nds32_cpu_cpp_builtins(struct cpp_reader *); | |
248 | ||
e2286268 MC |
249 | extern bool nds32_split_double_word_load_store_p (rtx *,bool); |
250 | ||
b99353a2 KC |
251 | namespace nds32 { |
252 | ||
253 | extern rtx extract_pattern_from_insn (rtx); | |
254 | ||
255 | size_t parallel_elements (rtx); | |
256 | rtx parallel_element (rtx, int); | |
257 | bool load_single_p (rtx_insn *); | |
258 | bool store_single_p (rtx_insn *); | |
259 | bool load_double_p (rtx_insn *); | |
260 | bool store_double_p (rtx_insn *); | |
261 | bool post_update_insn_p (rtx_insn *); | |
262 | bool immed_offset_p (rtx); | |
263 | int find_post_update_rtx (rtx_insn *); | |
264 | rtx extract_mem_rtx (rtx_insn *); | |
265 | rtx extract_base_reg (rtx_insn *); | |
266 | ||
267 | rtx extract_shift_reg (rtx); | |
268 | ||
269 | bool movd44_insn_p (rtx_insn *); | |
8fd52141 | 270 | rtx extract_movd44_odd_reg (rtx_insn *); |
b99353a2 KC |
271 | |
272 | rtx extract_mac_non_acc_rtx (rtx_insn *); | |
8fd52141 KC |
273 | |
274 | rtx extract_branch_target_rtx (rtx_insn *); | |
275 | rtx extract_branch_condition_rtx (rtx_insn *); | |
b99353a2 KC |
276 | } // namespace nds32 |
277 | ||
c411e9aa SC |
278 | extern bool nds32_use_load_post_increment(machine_mode); |
279 | ||
c4d8d050 CJW |
280 | /* Functions for create nds32 specific optimization pass. */ |
281 | extern rtl_opt_pass *make_pass_nds32_relax_opt (gcc::context *); | |
282 | ||
9304f876 | 283 | /* ------------------------------------------------------------------------ */ |