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aa32db37 SL |
1 | /* Nios II R2 CDX ldwm/stwm/push.h/pop.n instruction patterns. |
2 | This file was automatically generated using nios2-ldstwm.sml. | |
3 | Please do not edit manually. | |
4 | ||
8d9254fc | 5 | Copyright (C) 2014-2020 Free Software Foundation, Inc. |
aa32db37 SL |
6 | Contributed by Mentor Graphics. |
7 | ||
8 | This file is part of GCC. | |
9 | ||
10 | GCC is free software; you can redistribute it and/or modify it | |
11 | under the terms of the GNU General Public License as published | |
12 | by the Free Software Foundation; either version 3, or (at your | |
13 | option) any later version. | |
14 | ||
15 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
18 | License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License and | |
21 | a copy of the GCC Runtime Library Exception along with this program; | |
22 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
23 | <http://www.gnu.org/licenses/>. */ | |
24 | ||
25 | (define_insn "*cdx_push_ra_fp" | |
26 | [(match_parallel 0 "" | |
27 | [(set (reg:SI SP_REGNO) | |
28 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
29 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
30 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO))])] | |
31 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3 | |
32 | && (-INTVAL (operands[1]) & 3) == 0 | |
33 | && (-INTVAL (operands[1]) - 8) <= 60" | |
34 | { | |
35 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 8); | |
36 | return "push.n\\t{ra, fp}, %2"; | |
37 | } | |
38 | [(set_attr "type" "push")]) | |
39 | ||
40 | (define_insn "*cdx_push_ra" | |
41 | [(match_parallel 0 "" | |
42 | [(set (reg:SI SP_REGNO) | |
43 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
44 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO))])] | |
45 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2 | |
46 | && (-INTVAL (operands[1]) & 3) == 0 | |
47 | && (-INTVAL (operands[1]) - 4) <= 60" | |
48 | { | |
49 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 4); | |
50 | return "push.n\\t{ra}, %2"; | |
51 | } | |
52 | [(set_attr "type" "push")]) | |
53 | ||
54 | (define_insn "*cdx_pop_fp_ra" | |
55 | [(match_parallel 0 "pop_operation" | |
56 | [(return) | |
57 | (set (reg:SI SP_REGNO) | |
58 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
59 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
60 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" ""))])] | |
61 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
62 | { | |
63 | rtx x = XEXP (operands[3], 0); | |
64 | operands[3] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
65 | return "pop.n\\t{fp, ra}, %3"; | |
66 | } | |
67 | [(set_attr "type" "pop")]) | |
68 | ||
69 | (define_insn "*cdx_pop_ra" | |
70 | [(match_parallel 0 "pop_operation" | |
71 | [(return) | |
72 | (set (reg:SI SP_REGNO) | |
73 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
74 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" ""))])] | |
75 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
76 | { | |
77 | rtx x = XEXP (operands[2], 0); | |
78 | operands[2] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
79 | return "pop.n\\t{ra}, %2"; | |
80 | } | |
81 | [(set_attr "type" "pop")]) | |
82 | ||
83 | (define_insn "*cdx_push_ra_fp_r16" | |
84 | [(match_parallel 0 "" | |
85 | [(set (reg:SI SP_REGNO) | |
86 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
87 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
88 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
89 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 16))])] | |
90 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4 | |
91 | && (-INTVAL (operands[1]) & 3) == 0 | |
92 | && (-INTVAL (operands[1]) - 12) <= 60" | |
93 | { | |
94 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 12); | |
95 | return "push.n\\t{ra, fp, r16}, %2"; | |
96 | } | |
97 | [(set_attr "type" "push")]) | |
98 | ||
99 | (define_insn "*cdx_push_ra_r16" | |
100 | [(match_parallel 0 "" | |
101 | [(set (reg:SI SP_REGNO) | |
102 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
103 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
104 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 16))])] | |
105 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3 | |
106 | && (-INTVAL (operands[1]) & 3) == 0 | |
107 | && (-INTVAL (operands[1]) - 8) <= 60" | |
108 | { | |
109 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 8); | |
110 | return "push.n\\t{ra, r16}, %2"; | |
111 | } | |
112 | [(set_attr "type" "push")]) | |
113 | ||
114 | (define_insn "*cdx_pop_r16_fp_ra" | |
115 | [(match_parallel 0 "pop_operation" | |
116 | [(return) | |
117 | (set (reg:SI SP_REGNO) | |
118 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
119 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
120 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
121 | (set (reg:SI 16) (match_operand:SI 4 "stack_memory_operand" ""))])] | |
122 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
123 | { | |
124 | rtx x = XEXP (operands[4], 0); | |
125 | operands[4] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
126 | return "pop.n\\t{r16, fp, ra}, %4"; | |
127 | } | |
128 | [(set_attr "type" "pop")]) | |
129 | ||
130 | (define_insn "*cdx_pop_r16_ra" | |
131 | [(match_parallel 0 "pop_operation" | |
132 | [(return) | |
133 | (set (reg:SI SP_REGNO) | |
134 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
135 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
136 | (set (reg:SI 16) (match_operand:SI 3 "stack_memory_operand" ""))])] | |
137 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
138 | { | |
139 | rtx x = XEXP (operands[3], 0); | |
140 | operands[3] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
141 | return "pop.n\\t{r16, ra}, %3"; | |
142 | } | |
143 | [(set_attr "type" "pop")]) | |
144 | ||
145 | (define_insn "*cdx_push_ra_fp_r17_r16" | |
146 | [(match_parallel 0 "" | |
147 | [(set (reg:SI SP_REGNO) | |
148 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
149 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
150 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
151 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 17)) | |
152 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 16))])] | |
153 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5 | |
154 | && (-INTVAL (operands[1]) & 3) == 0 | |
155 | && (-INTVAL (operands[1]) - 16) <= 60" | |
156 | { | |
157 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 16); | |
158 | return "push.n\\t{ra, fp, r17, r16}, %2"; | |
159 | } | |
160 | [(set_attr "type" "push")]) | |
161 | ||
162 | (define_insn "*cdx_push_ra_r17_r16" | |
163 | [(match_parallel 0 "" | |
164 | [(set (reg:SI SP_REGNO) | |
165 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
166 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
167 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 17)) | |
168 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 16))])] | |
169 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4 | |
170 | && (-INTVAL (operands[1]) & 3) == 0 | |
171 | && (-INTVAL (operands[1]) - 12) <= 60" | |
172 | { | |
173 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 12); | |
174 | return "push.n\\t{ra, r17, r16}, %2"; | |
175 | } | |
176 | [(set_attr "type" "push")]) | |
177 | ||
178 | (define_insn "*cdx_pop_r16_r17_fp_ra" | |
179 | [(match_parallel 0 "pop_operation" | |
180 | [(return) | |
181 | (set (reg:SI SP_REGNO) | |
182 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
183 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
184 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
185 | (set (reg:SI 17) (match_operand:SI 4 "stack_memory_operand" "")) | |
186 | (set (reg:SI 16) (match_operand:SI 5 "stack_memory_operand" ""))])] | |
187 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
188 | { | |
189 | rtx x = XEXP (operands[5], 0); | |
190 | operands[5] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
191 | return "pop.n\\t{r16, r17, fp, ra}, %5"; | |
192 | } | |
193 | [(set_attr "type" "pop")]) | |
194 | ||
195 | (define_insn "*cdx_pop_r16_r17_ra" | |
196 | [(match_parallel 0 "pop_operation" | |
197 | [(return) | |
198 | (set (reg:SI SP_REGNO) | |
199 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
200 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
201 | (set (reg:SI 17) (match_operand:SI 3 "stack_memory_operand" "")) | |
202 | (set (reg:SI 16) (match_operand:SI 4 "stack_memory_operand" ""))])] | |
203 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
204 | { | |
205 | rtx x = XEXP (operands[4], 0); | |
206 | operands[4] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
207 | return "pop.n\\t{r16, r17, ra}, %4"; | |
208 | } | |
209 | [(set_attr "type" "pop")]) | |
210 | ||
211 | (define_insn "*cdx_push_ra_fp_r18_r17_r16" | |
212 | [(match_parallel 0 "" | |
213 | [(set (reg:SI SP_REGNO) | |
214 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
215 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
216 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
217 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 18)) | |
218 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 17)) | |
219 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 16))])] | |
220 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6 | |
221 | && (-INTVAL (operands[1]) & 3) == 0 | |
222 | && (-INTVAL (operands[1]) - 20) <= 60" | |
223 | { | |
224 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 20); | |
225 | return "push.n\\t{ra, fp, r18, r17, r16}, %2"; | |
226 | } | |
227 | [(set_attr "type" "push")]) | |
228 | ||
229 | (define_insn "*cdx_push_ra_r18_r17_r16" | |
230 | [(match_parallel 0 "" | |
231 | [(set (reg:SI SP_REGNO) | |
232 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
233 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
234 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 18)) | |
235 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 17)) | |
236 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 16))])] | |
237 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5 | |
238 | && (-INTVAL (operands[1]) & 3) == 0 | |
239 | && (-INTVAL (operands[1]) - 16) <= 60" | |
240 | { | |
241 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 16); | |
242 | return "push.n\\t{ra, r18, r17, r16}, %2"; | |
243 | } | |
244 | [(set_attr "type" "push")]) | |
245 | ||
246 | (define_insn "*cdx_pop_r16_r17_r18_fp_ra" | |
247 | [(match_parallel 0 "pop_operation" | |
248 | [(return) | |
249 | (set (reg:SI SP_REGNO) | |
250 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
251 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
252 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
253 | (set (reg:SI 18) (match_operand:SI 4 "stack_memory_operand" "")) | |
254 | (set (reg:SI 17) (match_operand:SI 5 "stack_memory_operand" "")) | |
255 | (set (reg:SI 16) (match_operand:SI 6 "stack_memory_operand" ""))])] | |
256 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
257 | { | |
258 | rtx x = XEXP (operands[6], 0); | |
259 | operands[6] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
260 | return "pop.n\\t{r16, r17, r18, fp, ra}, %6"; | |
261 | } | |
262 | [(set_attr "type" "pop")]) | |
263 | ||
264 | (define_insn "*cdx_pop_r16_r17_r18_ra" | |
265 | [(match_parallel 0 "pop_operation" | |
266 | [(return) | |
267 | (set (reg:SI SP_REGNO) | |
268 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
269 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
270 | (set (reg:SI 18) (match_operand:SI 3 "stack_memory_operand" "")) | |
271 | (set (reg:SI 17) (match_operand:SI 4 "stack_memory_operand" "")) | |
272 | (set (reg:SI 16) (match_operand:SI 5 "stack_memory_operand" ""))])] | |
273 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
274 | { | |
275 | rtx x = XEXP (operands[5], 0); | |
276 | operands[5] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
277 | return "pop.n\\t{r16, r17, r18, ra}, %5"; | |
278 | } | |
279 | [(set_attr "type" "pop")]) | |
280 | ||
281 | (define_insn "*cdx_push_ra_fp_r19_r18_r17_r16" | |
282 | [(match_parallel 0 "" | |
283 | [(set (reg:SI SP_REGNO) | |
284 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
285 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
286 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
287 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 19)) | |
288 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 18)) | |
289 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 17)) | |
290 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 16))])] | |
291 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7 | |
292 | && (-INTVAL (operands[1]) & 3) == 0 | |
293 | && (-INTVAL (operands[1]) - 24) <= 60" | |
294 | { | |
295 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 24); | |
296 | return "push.n\\t{ra, fp, r19, r18, r17, r16}, %2"; | |
297 | } | |
298 | [(set_attr "type" "push")]) | |
299 | ||
300 | (define_insn "*cdx_push_ra_r19_r18_r17_r16" | |
301 | [(match_parallel 0 "" | |
302 | [(set (reg:SI SP_REGNO) | |
303 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
304 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
305 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 19)) | |
306 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 18)) | |
307 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 17)) | |
308 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 16))])] | |
309 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6 | |
310 | && (-INTVAL (operands[1]) & 3) == 0 | |
311 | && (-INTVAL (operands[1]) - 20) <= 60" | |
312 | { | |
313 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 20); | |
314 | return "push.n\\t{ra, r19, r18, r17, r16}, %2"; | |
315 | } | |
316 | [(set_attr "type" "push")]) | |
317 | ||
318 | (define_insn "*cdx_pop_r16_r17_r18_r19_fp_ra" | |
319 | [(match_parallel 0 "pop_operation" | |
320 | [(return) | |
321 | (set (reg:SI SP_REGNO) | |
322 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
323 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
324 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
325 | (set (reg:SI 19) (match_operand:SI 4 "stack_memory_operand" "")) | |
326 | (set (reg:SI 18) (match_operand:SI 5 "stack_memory_operand" "")) | |
327 | (set (reg:SI 17) (match_operand:SI 6 "stack_memory_operand" "")) | |
328 | (set (reg:SI 16) (match_operand:SI 7 "stack_memory_operand" ""))])] | |
329 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
330 | { | |
331 | rtx x = XEXP (operands[7], 0); | |
332 | operands[7] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
333 | return "pop.n\\t{r16, r17, r18, r19, fp, ra}, %7"; | |
334 | } | |
335 | [(set_attr "type" "pop")]) | |
336 | ||
337 | (define_insn "*cdx_pop_r16_r17_r18_r19_ra" | |
338 | [(match_parallel 0 "pop_operation" | |
339 | [(return) | |
340 | (set (reg:SI SP_REGNO) | |
341 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
342 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
343 | (set (reg:SI 19) (match_operand:SI 3 "stack_memory_operand" "")) | |
344 | (set (reg:SI 18) (match_operand:SI 4 "stack_memory_operand" "")) | |
345 | (set (reg:SI 17) (match_operand:SI 5 "stack_memory_operand" "")) | |
346 | (set (reg:SI 16) (match_operand:SI 6 "stack_memory_operand" ""))])] | |
347 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
348 | { | |
349 | rtx x = XEXP (operands[6], 0); | |
350 | operands[6] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
351 | return "pop.n\\t{r16, r17, r18, r19, ra}, %6"; | |
352 | } | |
353 | [(set_attr "type" "pop")]) | |
354 | ||
355 | (define_insn "*cdx_push_ra_fp_r20_r19_r18_r17_r16" | |
356 | [(match_parallel 0 "" | |
357 | [(set (reg:SI SP_REGNO) | |
358 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
359 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
360 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
361 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 20)) | |
362 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 19)) | |
363 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 18)) | |
364 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 17)) | |
365 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 16))])] | |
366 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8 | |
367 | && (-INTVAL (operands[1]) & 3) == 0 | |
368 | && (-INTVAL (operands[1]) - 28) <= 60" | |
369 | { | |
370 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 28); | |
371 | return "push.n\\t{ra, fp, r20, r19, r18, r17, r16}, %2"; | |
372 | } | |
373 | [(set_attr "type" "push")]) | |
374 | ||
375 | (define_insn "*cdx_push_ra_r20_r19_r18_r17_r16" | |
376 | [(match_parallel 0 "" | |
377 | [(set (reg:SI SP_REGNO) | |
378 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
379 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
380 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 20)) | |
381 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 19)) | |
382 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 18)) | |
383 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 17)) | |
384 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 16))])] | |
385 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7 | |
386 | && (-INTVAL (operands[1]) & 3) == 0 | |
387 | && (-INTVAL (operands[1]) - 24) <= 60" | |
388 | { | |
389 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 24); | |
390 | return "push.n\\t{ra, r20, r19, r18, r17, r16}, %2"; | |
391 | } | |
392 | [(set_attr "type" "push")]) | |
393 | ||
394 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_fp_ra" | |
395 | [(match_parallel 0 "pop_operation" | |
396 | [(return) | |
397 | (set (reg:SI SP_REGNO) | |
398 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
399 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
400 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
401 | (set (reg:SI 20) (match_operand:SI 4 "stack_memory_operand" "")) | |
402 | (set (reg:SI 19) (match_operand:SI 5 "stack_memory_operand" "")) | |
403 | (set (reg:SI 18) (match_operand:SI 6 "stack_memory_operand" "")) | |
404 | (set (reg:SI 17) (match_operand:SI 7 "stack_memory_operand" "")) | |
405 | (set (reg:SI 16) (match_operand:SI 8 "stack_memory_operand" ""))])] | |
406 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
407 | { | |
408 | rtx x = XEXP (operands[8], 0); | |
409 | operands[8] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
410 | return "pop.n\\t{r16, r17, r18, r19, r20, fp, ra}, %8"; | |
411 | } | |
412 | [(set_attr "type" "pop")]) | |
413 | ||
414 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_ra" | |
415 | [(match_parallel 0 "pop_operation" | |
416 | [(return) | |
417 | (set (reg:SI SP_REGNO) | |
418 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
419 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
420 | (set (reg:SI 20) (match_operand:SI 3 "stack_memory_operand" "")) | |
421 | (set (reg:SI 19) (match_operand:SI 4 "stack_memory_operand" "")) | |
422 | (set (reg:SI 18) (match_operand:SI 5 "stack_memory_operand" "")) | |
423 | (set (reg:SI 17) (match_operand:SI 6 "stack_memory_operand" "")) | |
424 | (set (reg:SI 16) (match_operand:SI 7 "stack_memory_operand" ""))])] | |
425 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
426 | { | |
427 | rtx x = XEXP (operands[7], 0); | |
428 | operands[7] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
429 | return "pop.n\\t{r16, r17, r18, r19, r20, ra}, %7"; | |
430 | } | |
431 | [(set_attr "type" "pop")]) | |
432 | ||
433 | (define_insn "*cdx_push_ra_fp_r21_r20_r19_r18_r17_r16" | |
434 | [(match_parallel 0 "" | |
435 | [(set (reg:SI SP_REGNO) | |
436 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
437 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
438 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
439 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 21)) | |
440 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 20)) | |
441 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 19)) | |
442 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 18)) | |
443 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 17)) | |
444 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 16))])] | |
445 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9 | |
446 | && (-INTVAL (operands[1]) & 3) == 0 | |
447 | && (-INTVAL (operands[1]) - 32) <= 60" | |
448 | { | |
449 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 32); | |
450 | return "push.n\\t{ra, fp, r21, r20, r19, r18, r17, r16}, %2"; | |
451 | } | |
452 | [(set_attr "type" "push")]) | |
453 | ||
454 | (define_insn "*cdx_push_ra_r21_r20_r19_r18_r17_r16" | |
455 | [(match_parallel 0 "" | |
456 | [(set (reg:SI SP_REGNO) | |
457 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
458 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
459 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 21)) | |
460 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 20)) | |
461 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 19)) | |
462 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 18)) | |
463 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 17)) | |
464 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 16))])] | |
465 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8 | |
466 | && (-INTVAL (operands[1]) & 3) == 0 | |
467 | && (-INTVAL (operands[1]) - 28) <= 60" | |
468 | { | |
469 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 28); | |
470 | return "push.n\\t{ra, r21, r20, r19, r18, r17, r16}, %2"; | |
471 | } | |
472 | [(set_attr "type" "push")]) | |
473 | ||
474 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_fp_ra" | |
475 | [(match_parallel 0 "pop_operation" | |
476 | [(return) | |
477 | (set (reg:SI SP_REGNO) | |
478 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
479 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
480 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
481 | (set (reg:SI 21) (match_operand:SI 4 "stack_memory_operand" "")) | |
482 | (set (reg:SI 20) (match_operand:SI 5 "stack_memory_operand" "")) | |
483 | (set (reg:SI 19) (match_operand:SI 6 "stack_memory_operand" "")) | |
484 | (set (reg:SI 18) (match_operand:SI 7 "stack_memory_operand" "")) | |
485 | (set (reg:SI 17) (match_operand:SI 8 "stack_memory_operand" "")) | |
486 | (set (reg:SI 16) (match_operand:SI 9 "stack_memory_operand" ""))])] | |
487 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
488 | { | |
489 | rtx x = XEXP (operands[9], 0); | |
490 | operands[9] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
491 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, fp, ra}, %9"; | |
492 | } | |
493 | [(set_attr "type" "pop")]) | |
494 | ||
495 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_ra" | |
496 | [(match_parallel 0 "pop_operation" | |
497 | [(return) | |
498 | (set (reg:SI SP_REGNO) | |
499 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
500 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
501 | (set (reg:SI 21) (match_operand:SI 3 "stack_memory_operand" "")) | |
502 | (set (reg:SI 20) (match_operand:SI 4 "stack_memory_operand" "")) | |
503 | (set (reg:SI 19) (match_operand:SI 5 "stack_memory_operand" "")) | |
504 | (set (reg:SI 18) (match_operand:SI 6 "stack_memory_operand" "")) | |
505 | (set (reg:SI 17) (match_operand:SI 7 "stack_memory_operand" "")) | |
506 | (set (reg:SI 16) (match_operand:SI 8 "stack_memory_operand" ""))])] | |
507 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
508 | { | |
509 | rtx x = XEXP (operands[8], 0); | |
510 | operands[8] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
511 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, ra}, %8"; | |
512 | } | |
513 | [(set_attr "type" "pop")]) | |
514 | ||
515 | (define_insn "*cdx_push_ra_fp_r22_r21_r20_r19_r18_r17_r16" | |
516 | [(match_parallel 0 "" | |
517 | [(set (reg:SI SP_REGNO) | |
518 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
519 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
520 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
521 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 22)) | |
522 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 21)) | |
523 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 20)) | |
524 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 19)) | |
525 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 18)) | |
526 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 17)) | |
527 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 16))])] | |
528 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10 | |
529 | && (-INTVAL (operands[1]) & 3) == 0 | |
530 | && (-INTVAL (operands[1]) - 36) <= 60" | |
531 | { | |
532 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 36); | |
533 | return "push.n\\t{ra, fp, r22, r21, r20, r19, r18, r17, r16}, %2"; | |
534 | } | |
535 | [(set_attr "type" "push")]) | |
536 | ||
537 | (define_insn "*cdx_push_ra_r22_r21_r20_r19_r18_r17_r16" | |
538 | [(match_parallel 0 "" | |
539 | [(set (reg:SI SP_REGNO) | |
540 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
541 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
542 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 22)) | |
543 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 21)) | |
544 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 20)) | |
545 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 19)) | |
546 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 18)) | |
547 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 17)) | |
548 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 16))])] | |
549 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9 | |
550 | && (-INTVAL (operands[1]) & 3) == 0 | |
551 | && (-INTVAL (operands[1]) - 32) <= 60" | |
552 | { | |
553 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 32); | |
554 | return "push.n\\t{ra, r22, r21, r20, r19, r18, r17, r16}, %2"; | |
555 | } | |
556 | [(set_attr "type" "push")]) | |
557 | ||
558 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_fp_ra" | |
559 | [(match_parallel 0 "pop_operation" | |
560 | [(return) | |
561 | (set (reg:SI SP_REGNO) | |
562 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
563 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
564 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
565 | (set (reg:SI 22) (match_operand:SI 4 "stack_memory_operand" "")) | |
566 | (set (reg:SI 21) (match_operand:SI 5 "stack_memory_operand" "")) | |
567 | (set (reg:SI 20) (match_operand:SI 6 "stack_memory_operand" "")) | |
568 | (set (reg:SI 19) (match_operand:SI 7 "stack_memory_operand" "")) | |
569 | (set (reg:SI 18) (match_operand:SI 8 "stack_memory_operand" "")) | |
570 | (set (reg:SI 17) (match_operand:SI 9 "stack_memory_operand" "")) | |
571 | (set (reg:SI 16) (match_operand:SI 10 "stack_memory_operand" ""))])] | |
572 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
573 | { | |
574 | rtx x = XEXP (operands[10], 0); | |
575 | operands[10] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
576 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, fp, ra}, %10"; | |
577 | } | |
578 | [(set_attr "type" "pop")]) | |
579 | ||
580 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_ra" | |
581 | [(match_parallel 0 "pop_operation" | |
582 | [(return) | |
583 | (set (reg:SI SP_REGNO) | |
584 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
585 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
586 | (set (reg:SI 22) (match_operand:SI 3 "stack_memory_operand" "")) | |
587 | (set (reg:SI 21) (match_operand:SI 4 "stack_memory_operand" "")) | |
588 | (set (reg:SI 20) (match_operand:SI 5 "stack_memory_operand" "")) | |
589 | (set (reg:SI 19) (match_operand:SI 6 "stack_memory_operand" "")) | |
590 | (set (reg:SI 18) (match_operand:SI 7 "stack_memory_operand" "")) | |
591 | (set (reg:SI 17) (match_operand:SI 8 "stack_memory_operand" "")) | |
592 | (set (reg:SI 16) (match_operand:SI 9 "stack_memory_operand" ""))])] | |
593 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
594 | { | |
595 | rtx x = XEXP (operands[9], 0); | |
596 | operands[9] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
597 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, ra}, %9"; | |
598 | } | |
599 | [(set_attr "type" "pop")]) | |
600 | ||
601 | (define_insn "*cdx_push_ra_fp_r23_r22_r21_r20_r19_r18_r17_r16" | |
602 | [(match_parallel 0 "" | |
603 | [(set (reg:SI SP_REGNO) | |
604 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
605 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
606 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) | |
607 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 23)) | |
608 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 22)) | |
609 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 21)) | |
610 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 20)) | |
611 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 19)) | |
612 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 18)) | |
613 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 17)) | |
614 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -40))) (reg:SI 16))])] | |
615 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11 | |
616 | && (-INTVAL (operands[1]) & 3) == 0 | |
617 | && (-INTVAL (operands[1]) - 40) <= 60" | |
618 | { | |
619 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 40); | |
620 | return "push.n\\t{ra, fp, r23, r22, r21, r20, r19, r18, r17, r16}, %2"; | |
621 | } | |
622 | [(set_attr "type" "push")]) | |
623 | ||
624 | (define_insn "*cdx_push_ra_r23_r22_r21_r20_r19_r18_r17_r16" | |
625 | [(match_parallel 0 "" | |
626 | [(set (reg:SI SP_REGNO) | |
627 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
628 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) | |
629 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 23)) | |
630 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 22)) | |
631 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 21)) | |
632 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 20)) | |
633 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 19)) | |
634 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 18)) | |
635 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 17)) | |
636 | (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 16))])] | |
637 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10 | |
638 | && (-INTVAL (operands[1]) & 3) == 0 | |
639 | && (-INTVAL (operands[1]) - 36) <= 60" | |
640 | { | |
641 | operands[2] = GEN_INT (-INTVAL (operands[1]) - 36); | |
642 | return "push.n\\t{ra, r23, r22, r21, r20, r19, r18, r17, r16}, %2"; | |
643 | } | |
644 | [(set_attr "type" "push")]) | |
645 | ||
646 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_r23_fp_ra" | |
647 | [(match_parallel 0 "pop_operation" | |
648 | [(return) | |
649 | (set (reg:SI SP_REGNO) | |
650 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
651 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
652 | (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) | |
653 | (set (reg:SI 23) (match_operand:SI 4 "stack_memory_operand" "")) | |
654 | (set (reg:SI 22) (match_operand:SI 5 "stack_memory_operand" "")) | |
655 | (set (reg:SI 21) (match_operand:SI 6 "stack_memory_operand" "")) | |
656 | (set (reg:SI 20) (match_operand:SI 7 "stack_memory_operand" "")) | |
657 | (set (reg:SI 19) (match_operand:SI 8 "stack_memory_operand" "")) | |
658 | (set (reg:SI 18) (match_operand:SI 9 "stack_memory_operand" "")) | |
659 | (set (reg:SI 17) (match_operand:SI 10 "stack_memory_operand" "")) | |
660 | (set (reg:SI 16) (match_operand:SI 11 "stack_memory_operand" ""))])] | |
661 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
662 | { | |
663 | rtx x = XEXP (operands[11], 0); | |
664 | operands[11] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
665 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, r23, fp, ra}, %11"; | |
666 | } | |
667 | [(set_attr "type" "pop")]) | |
668 | ||
669 | (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_r23_ra" | |
670 | [(match_parallel 0 "pop_operation" | |
671 | [(return) | |
672 | (set (reg:SI SP_REGNO) | |
673 | (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) | |
674 | (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) | |
675 | (set (reg:SI 23) (match_operand:SI 3 "stack_memory_operand" "")) | |
676 | (set (reg:SI 22) (match_operand:SI 4 "stack_memory_operand" "")) | |
677 | (set (reg:SI 21) (match_operand:SI 5 "stack_memory_operand" "")) | |
678 | (set (reg:SI 20) (match_operand:SI 6 "stack_memory_operand" "")) | |
679 | (set (reg:SI 19) (match_operand:SI 7 "stack_memory_operand" "")) | |
680 | (set (reg:SI 18) (match_operand:SI 8 "stack_memory_operand" "")) | |
681 | (set (reg:SI 17) (match_operand:SI 9 "stack_memory_operand" "")) | |
682 | (set (reg:SI 16) (match_operand:SI 10 "stack_memory_operand" ""))])] | |
683 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
684 | { | |
685 | rtx x = XEXP (operands[10], 0); | |
686 | operands[10] = REG_P (x) ? const0_rtx : XEXP (x, 1); | |
687 | return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, r23, ra}, %10"; | |
688 | } | |
689 | [(set_attr "type" "pop")]) | |
690 | ||
691 | (define_insn "*cdx_ldwm1_inc_wb_ret" | |
692 | [(match_parallel 0 "ldwm_operation" | |
693 | [(return) | |
694 | (set (match_operand:SI 2 "register_operand" "+&r") | |
695 | (plus:SI (match_dup 2) (const_int 4))) | |
696 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
697 | (mem:SI (match_dup 2)))])] | |
698 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
699 | "ldwm\\t{%1}, (%2)++, writeback, ret" | |
700 | [(set_attr "type" "ldwm")]) | |
701 | ||
702 | (define_insn "*cdx_ldwm1_inc_wb" | |
703 | [(match_parallel 0 "ldwm_operation" | |
704 | [(set (match_operand:SI 2 "register_operand" "+&r") | |
705 | (plus:SI (match_dup 2) (const_int 4))) | |
706 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
707 | (mem:SI (match_dup 2)))])] | |
708 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
709 | "ldwm\\t{%1}, (%2)++, writeback" | |
710 | [(set_attr "type" "ldwm")]) | |
711 | ||
712 | (define_insn "*cdx_ldwm1_inc_ret" | |
713 | [(match_parallel 0 "ldwm_operation" | |
714 | [(return) | |
715 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
716 | (mem:SI (match_operand:SI 2 "register_operand" "r")))])] | |
717 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
718 | "ldwm\\t{%1}, (%2)++, ret" | |
719 | [(set_attr "type" "ldwm")]) | |
720 | ||
721 | (define_insn "*cdx_ldwm1_inc" | |
722 | [(match_parallel 0 "ldwm_operation" | |
723 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
724 | (mem:SI (match_operand:SI 2 "register_operand" "r")))])] | |
725 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" | |
726 | "ldwm\\t{%1}, (%2)++" | |
727 | [(set_attr "type" "ldwm")]) | |
728 | ||
729 | (define_insn "*cdx_ldwm1_dec_wb_ret" | |
730 | [(match_parallel 0 "ldwm_operation" | |
731 | [(return) | |
732 | (set (match_operand:SI 2 "register_operand" "+&r") | |
733 | (plus:SI (match_dup 2) (const_int -4))) | |
734 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
735 | (mem:SI (plus:SI (match_dup 2) (const_int -4))))])] | |
736 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
737 | "ldwm\\t{%1}, --(%2), writeback, ret" | |
738 | [(set_attr "type" "ldwm")]) | |
739 | ||
740 | (define_insn "*cdx_ldwm1_dec_wb" | |
741 | [(match_parallel 0 "ldwm_operation" | |
742 | [(set (match_operand:SI 2 "register_operand" "+&r") | |
743 | (plus:SI (match_dup 2) (const_int -4))) | |
744 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
745 | (mem:SI (plus:SI (match_dup 2) (const_int -4))))])] | |
746 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
747 | "ldwm\\t{%1}, --(%2), writeback" | |
748 | [(set_attr "type" "ldwm")]) | |
749 | ||
750 | (define_insn "*cdx_ldwm1_dec_ret" | |
751 | [(match_parallel 0 "ldwm_operation" | |
752 | [(return) | |
753 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
754 | (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))))])] | |
755 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
756 | "ldwm\\t{%1}, --(%2), ret" | |
757 | [(set_attr "type" "ldwm")]) | |
758 | ||
759 | (define_insn "*cdx_ldwm1_dec" | |
760 | [(match_parallel 0 "ldwm_operation" | |
761 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
762 | (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))))])] | |
763 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" | |
764 | "ldwm\\t{%1}, --(%2)" | |
765 | [(set_attr "type" "ldwm")]) | |
766 | ||
767 | (define_insn "*cdx_ldwm2_inc_wb_ret" | |
768 | [(match_parallel 0 "ldwm_operation" | |
769 | [(return) | |
770 | (set (match_operand:SI 3 "register_operand" "+&r") | |
771 | (plus:SI (match_dup 3) (const_int 8))) | |
772 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
773 | (mem:SI (match_dup 3))) | |
774 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
775 | (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] | |
776 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
777 | "ldwm\\t{%1, %2}, (%3)++, writeback, ret" | |
778 | [(set_attr "type" "ldwm")]) | |
779 | ||
780 | (define_insn "*cdx_ldwm2_inc_wb" | |
781 | [(match_parallel 0 "ldwm_operation" | |
782 | [(set (match_operand:SI 3 "register_operand" "+&r") | |
783 | (plus:SI (match_dup 3) (const_int 8))) | |
784 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
785 | (mem:SI (match_dup 3))) | |
786 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
787 | (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] | |
788 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
789 | "ldwm\\t{%1, %2}, (%3)++, writeback" | |
790 | [(set_attr "type" "ldwm")]) | |
791 | ||
792 | (define_insn "*cdx_ldwm2_inc_ret" | |
793 | [(match_parallel 0 "ldwm_operation" | |
794 | [(return) | |
795 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
796 | (mem:SI (match_operand:SI 3 "register_operand" "r"))) | |
797 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
798 | (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] | |
799 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
800 | "ldwm\\t{%1, %2}, (%3)++, ret" | |
801 | [(set_attr "type" "ldwm")]) | |
802 | ||
803 | (define_insn "*cdx_ldwm2_inc" | |
804 | [(match_parallel 0 "ldwm_operation" | |
805 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
806 | (mem:SI (match_operand:SI 3 "register_operand" "r"))) | |
807 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
808 | (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] | |
809 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
810 | "ldwm\\t{%1, %2}, (%3)++" | |
811 | [(set_attr "type" "ldwm")]) | |
812 | ||
813 | (define_insn "*cdx_ldwm2_dec_wb_ret" | |
814 | [(match_parallel 0 "ldwm_operation" | |
815 | [(return) | |
816 | (set (match_operand:SI 3 "register_operand" "+&r") | |
817 | (plus:SI (match_dup 3) (const_int -8))) | |
818 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
819 | (mem:SI (plus:SI (match_dup 3) (const_int -4)))) | |
820 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
821 | (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] | |
822 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
823 | "ldwm\\t{%1, %2}, --(%3), writeback, ret" | |
824 | [(set_attr "type" "ldwm")]) | |
825 | ||
826 | (define_insn "*cdx_ldwm2_dec_wb" | |
827 | [(match_parallel 0 "ldwm_operation" | |
828 | [(set (match_operand:SI 3 "register_operand" "+&r") | |
829 | (plus:SI (match_dup 3) (const_int -8))) | |
830 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
831 | (mem:SI (plus:SI (match_dup 3) (const_int -4)))) | |
832 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
833 | (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] | |
834 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
835 | "ldwm\\t{%1, %2}, --(%3), writeback" | |
836 | [(set_attr "type" "ldwm")]) | |
837 | ||
838 | (define_insn "*cdx_ldwm2_dec_ret" | |
839 | [(match_parallel 0 "ldwm_operation" | |
840 | [(return) | |
841 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
842 | (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4)))) | |
843 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
844 | (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] | |
845 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
846 | "ldwm\\t{%1, %2}, --(%3), ret" | |
847 | [(set_attr "type" "ldwm")]) | |
848 | ||
849 | (define_insn "*cdx_ldwm2_dec" | |
850 | [(match_parallel 0 "ldwm_operation" | |
851 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
852 | (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4)))) | |
853 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
854 | (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] | |
855 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
856 | "ldwm\\t{%1, %2}, --(%3)" | |
857 | [(set_attr "type" "ldwm")]) | |
858 | ||
859 | (define_insn "*cdx_ldwm3_inc_wb_ret" | |
860 | [(match_parallel 0 "ldwm_operation" | |
861 | [(return) | |
862 | (set (match_operand:SI 4 "register_operand" "+&r") | |
863 | (plus:SI (match_dup 4) (const_int 12))) | |
864 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
865 | (mem:SI (match_dup 4))) | |
866 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
867 | (mem:SI (plus:SI (match_dup 4) (const_int 4)))) | |
868 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
869 | (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] | |
870 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
871 | "ldwm\\t{%1, %2, %3}, (%4)++, writeback, ret" | |
872 | [(set_attr "type" "ldwm")]) | |
873 | ||
874 | (define_insn "*cdx_ldwm3_inc_wb" | |
875 | [(match_parallel 0 "ldwm_operation" | |
876 | [(set (match_operand:SI 4 "register_operand" "+&r") | |
877 | (plus:SI (match_dup 4) (const_int 12))) | |
878 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
879 | (mem:SI (match_dup 4))) | |
880 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
881 | (mem:SI (plus:SI (match_dup 4) (const_int 4)))) | |
882 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
883 | (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] | |
884 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
885 | "ldwm\\t{%1, %2, %3}, (%4)++, writeback" | |
886 | [(set_attr "type" "ldwm")]) | |
887 | ||
888 | (define_insn "*cdx_ldwm3_inc_ret" | |
889 | [(match_parallel 0 "ldwm_operation" | |
890 | [(return) | |
891 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
892 | (mem:SI (match_operand:SI 4 "register_operand" "r"))) | |
893 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
894 | (mem:SI (plus:SI (match_dup 4) (const_int 4)))) | |
895 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
896 | (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] | |
897 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
898 | "ldwm\\t{%1, %2, %3}, (%4)++, ret" | |
899 | [(set_attr "type" "ldwm")]) | |
900 | ||
901 | (define_insn "*cdx_ldwm3_inc" | |
902 | [(match_parallel 0 "ldwm_operation" | |
903 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
904 | (mem:SI (match_operand:SI 4 "register_operand" "r"))) | |
905 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
906 | (mem:SI (plus:SI (match_dup 4) (const_int 4)))) | |
907 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
908 | (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] | |
909 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
910 | "ldwm\\t{%1, %2, %3}, (%4)++" | |
911 | [(set_attr "type" "ldwm")]) | |
912 | ||
913 | (define_insn "*cdx_ldwm3_dec_wb_ret" | |
914 | [(match_parallel 0 "ldwm_operation" | |
915 | [(return) | |
916 | (set (match_operand:SI 4 "register_operand" "+&r") | |
917 | (plus:SI (match_dup 4) (const_int -12))) | |
918 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
919 | (mem:SI (plus:SI (match_dup 4) (const_int -4)))) | |
920 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
921 | (mem:SI (plus:SI (match_dup 4) (const_int -8)))) | |
922 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
923 | (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] | |
924 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
925 | "ldwm\\t{%1, %2, %3}, --(%4), writeback, ret" | |
926 | [(set_attr "type" "ldwm")]) | |
927 | ||
928 | (define_insn "*cdx_ldwm3_dec_wb" | |
929 | [(match_parallel 0 "ldwm_operation" | |
930 | [(set (match_operand:SI 4 "register_operand" "+&r") | |
931 | (plus:SI (match_dup 4) (const_int -12))) | |
932 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
933 | (mem:SI (plus:SI (match_dup 4) (const_int -4)))) | |
934 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
935 | (mem:SI (plus:SI (match_dup 4) (const_int -8)))) | |
936 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
937 | (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] | |
938 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
939 | "ldwm\\t{%1, %2, %3}, --(%4), writeback" | |
940 | [(set_attr "type" "ldwm")]) | |
941 | ||
942 | (define_insn "*cdx_ldwm3_dec_ret" | |
943 | [(match_parallel 0 "ldwm_operation" | |
944 | [(return) | |
945 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
946 | (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4)))) | |
947 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
948 | (mem:SI (plus:SI (match_dup 4) (const_int -8)))) | |
949 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
950 | (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] | |
951 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
952 | "ldwm\\t{%1, %2, %3}, --(%4), ret" | |
953 | [(set_attr "type" "ldwm")]) | |
954 | ||
955 | (define_insn "*cdx_ldwm3_dec" | |
956 | [(match_parallel 0 "ldwm_operation" | |
957 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
958 | (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4)))) | |
959 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
960 | (mem:SI (plus:SI (match_dup 4) (const_int -8)))) | |
961 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
962 | (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] | |
963 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
964 | "ldwm\\t{%1, %2, %3}, --(%4)" | |
965 | [(set_attr "type" "ldwm")]) | |
966 | ||
967 | (define_insn "*cdx_ldwm4_inc_wb_ret" | |
968 | [(match_parallel 0 "ldwm_operation" | |
969 | [(return) | |
970 | (set (match_operand:SI 5 "register_operand" "+&r") | |
971 | (plus:SI (match_dup 5) (const_int 16))) | |
972 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
973 | (mem:SI (match_dup 5))) | |
974 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
975 | (mem:SI (plus:SI (match_dup 5) (const_int 4)))) | |
976 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
977 | (mem:SI (plus:SI (match_dup 5) (const_int 8)))) | |
978 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
979 | (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] | |
980 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
981 | "ldwm\\t{%1, %2, %3, %4}, (%5)++, writeback, ret" | |
982 | [(set_attr "type" "ldwm")]) | |
983 | ||
984 | (define_insn "*cdx_ldwm4_inc_wb" | |
985 | [(match_parallel 0 "ldwm_operation" | |
986 | [(set (match_operand:SI 5 "register_operand" "+&r") | |
987 | (plus:SI (match_dup 5) (const_int 16))) | |
988 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
989 | (mem:SI (match_dup 5))) | |
990 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
991 | (mem:SI (plus:SI (match_dup 5) (const_int 4)))) | |
992 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
993 | (mem:SI (plus:SI (match_dup 5) (const_int 8)))) | |
994 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
995 | (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] | |
996 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
997 | "ldwm\\t{%1, %2, %3, %4}, (%5)++, writeback" | |
998 | [(set_attr "type" "ldwm")]) | |
999 | ||
1000 | (define_insn "*cdx_ldwm4_inc_ret" | |
1001 | [(match_parallel 0 "ldwm_operation" | |
1002 | [(return) | |
1003 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1004 | (mem:SI (match_operand:SI 5 "register_operand" "r"))) | |
1005 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1006 | (mem:SI (plus:SI (match_dup 5) (const_int 4)))) | |
1007 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1008 | (mem:SI (plus:SI (match_dup 5) (const_int 8)))) | |
1009 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1010 | (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] | |
1011 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
1012 | "ldwm\\t{%1, %2, %3, %4}, (%5)++, ret" | |
1013 | [(set_attr "type" "ldwm")]) | |
1014 | ||
1015 | (define_insn "*cdx_ldwm4_inc" | |
1016 | [(match_parallel 0 "ldwm_operation" | |
1017 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1018 | (mem:SI (match_operand:SI 5 "register_operand" "r"))) | |
1019 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1020 | (mem:SI (plus:SI (match_dup 5) (const_int 4)))) | |
1021 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1022 | (mem:SI (plus:SI (match_dup 5) (const_int 8)))) | |
1023 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1024 | (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] | |
1025 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
1026 | "ldwm\\t{%1, %2, %3, %4}, (%5)++" | |
1027 | [(set_attr "type" "ldwm")]) | |
1028 | ||
1029 | (define_insn "*cdx_ldwm4_dec_wb_ret" | |
1030 | [(match_parallel 0 "ldwm_operation" | |
1031 | [(return) | |
1032 | (set (match_operand:SI 5 "register_operand" "+&r") | |
1033 | (plus:SI (match_dup 5) (const_int -16))) | |
1034 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1035 | (mem:SI (plus:SI (match_dup 5) (const_int -4)))) | |
1036 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1037 | (mem:SI (plus:SI (match_dup 5) (const_int -8)))) | |
1038 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1039 | (mem:SI (plus:SI (match_dup 5) (const_int -12)))) | |
1040 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1041 | (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] | |
1042 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1043 | "ldwm\\t{%1, %2, %3, %4}, --(%5), writeback, ret" | |
1044 | [(set_attr "type" "ldwm")]) | |
1045 | ||
1046 | (define_insn "*cdx_ldwm4_dec_wb" | |
1047 | [(match_parallel 0 "ldwm_operation" | |
1048 | [(set (match_operand:SI 5 "register_operand" "+&r") | |
1049 | (plus:SI (match_dup 5) (const_int -16))) | |
1050 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1051 | (mem:SI (plus:SI (match_dup 5) (const_int -4)))) | |
1052 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1053 | (mem:SI (plus:SI (match_dup 5) (const_int -8)))) | |
1054 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1055 | (mem:SI (plus:SI (match_dup 5) (const_int -12)))) | |
1056 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1057 | (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] | |
1058 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
1059 | "ldwm\\t{%1, %2, %3, %4}, --(%5), writeback" | |
1060 | [(set_attr "type" "ldwm")]) | |
1061 | ||
1062 | (define_insn "*cdx_ldwm4_dec_ret" | |
1063 | [(match_parallel 0 "ldwm_operation" | |
1064 | [(return) | |
1065 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1066 | (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4)))) | |
1067 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1068 | (mem:SI (plus:SI (match_dup 5) (const_int -8)))) | |
1069 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1070 | (mem:SI (plus:SI (match_dup 5) (const_int -12)))) | |
1071 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1072 | (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] | |
1073 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
1074 | "ldwm\\t{%1, %2, %3, %4}, --(%5), ret" | |
1075 | [(set_attr "type" "ldwm")]) | |
1076 | ||
1077 | (define_insn "*cdx_ldwm4_dec" | |
1078 | [(match_parallel 0 "ldwm_operation" | |
1079 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1080 | (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4)))) | |
1081 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1082 | (mem:SI (plus:SI (match_dup 5) (const_int -8)))) | |
1083 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1084 | (mem:SI (plus:SI (match_dup 5) (const_int -12)))) | |
1085 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1086 | (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] | |
1087 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
1088 | "ldwm\\t{%1, %2, %3, %4}, --(%5)" | |
1089 | [(set_attr "type" "ldwm")]) | |
1090 | ||
1091 | (define_insn "*cdx_ldwm5_inc_wb_ret" | |
1092 | [(match_parallel 0 "ldwm_operation" | |
1093 | [(return) | |
1094 | (set (match_operand:SI 6 "register_operand" "+&r") | |
1095 | (plus:SI (match_dup 6) (const_int 20))) | |
1096 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1097 | (mem:SI (match_dup 6))) | |
1098 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1099 | (mem:SI (plus:SI (match_dup 6) (const_int 4)))) | |
1100 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1101 | (mem:SI (plus:SI (match_dup 6) (const_int 8)))) | |
1102 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1103 | (mem:SI (plus:SI (match_dup 6) (const_int 12)))) | |
1104 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1105 | (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] | |
1106 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1107 | "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback, ret" | |
1108 | [(set_attr "type" "ldwm")]) | |
1109 | ||
1110 | (define_insn "*cdx_ldwm5_inc_wb" | |
1111 | [(match_parallel 0 "ldwm_operation" | |
1112 | [(set (match_operand:SI 6 "register_operand" "+&r") | |
1113 | (plus:SI (match_dup 6) (const_int 20))) | |
1114 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1115 | (mem:SI (match_dup 6))) | |
1116 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1117 | (mem:SI (plus:SI (match_dup 6) (const_int 4)))) | |
1118 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1119 | (mem:SI (plus:SI (match_dup 6) (const_int 8)))) | |
1120 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1121 | (mem:SI (plus:SI (match_dup 6) (const_int 12)))) | |
1122 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1123 | (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] | |
1124 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1125 | "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback" | |
1126 | [(set_attr "type" "ldwm")]) | |
1127 | ||
1128 | (define_insn "*cdx_ldwm5_inc_ret" | |
1129 | [(match_parallel 0 "ldwm_operation" | |
1130 | [(return) | |
1131 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1132 | (mem:SI (match_operand:SI 6 "register_operand" "r"))) | |
1133 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1134 | (mem:SI (plus:SI (match_dup 6) (const_int 4)))) | |
1135 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1136 | (mem:SI (plus:SI (match_dup 6) (const_int 8)))) | |
1137 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1138 | (mem:SI (plus:SI (match_dup 6) (const_int 12)))) | |
1139 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1140 | (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] | |
1141 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1142 | "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, ret" | |
1143 | [(set_attr "type" "ldwm")]) | |
1144 | ||
1145 | (define_insn "*cdx_ldwm5_inc" | |
1146 | [(match_parallel 0 "ldwm_operation" | |
1147 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1148 | (mem:SI (match_operand:SI 6 "register_operand" "r"))) | |
1149 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1150 | (mem:SI (plus:SI (match_dup 6) (const_int 4)))) | |
1151 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1152 | (mem:SI (plus:SI (match_dup 6) (const_int 8)))) | |
1153 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1154 | (mem:SI (plus:SI (match_dup 6) (const_int 12)))) | |
1155 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1156 | (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] | |
1157 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
1158 | "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++" | |
1159 | [(set_attr "type" "ldwm")]) | |
1160 | ||
1161 | (define_insn "*cdx_ldwm5_dec_wb_ret" | |
1162 | [(match_parallel 0 "ldwm_operation" | |
1163 | [(return) | |
1164 | (set (match_operand:SI 6 "register_operand" "+&r") | |
1165 | (plus:SI (match_dup 6) (const_int -20))) | |
1166 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1167 | (mem:SI (plus:SI (match_dup 6) (const_int -4)))) | |
1168 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1169 | (mem:SI (plus:SI (match_dup 6) (const_int -8)))) | |
1170 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1171 | (mem:SI (plus:SI (match_dup 6) (const_int -12)))) | |
1172 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1173 | (mem:SI (plus:SI (match_dup 6) (const_int -16)))) | |
1174 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1175 | (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] | |
1176 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1177 | "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback, ret" | |
1178 | [(set_attr "type" "ldwm")]) | |
1179 | ||
1180 | (define_insn "*cdx_ldwm5_dec_wb" | |
1181 | [(match_parallel 0 "ldwm_operation" | |
1182 | [(set (match_operand:SI 6 "register_operand" "+&r") | |
1183 | (plus:SI (match_dup 6) (const_int -20))) | |
1184 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1185 | (mem:SI (plus:SI (match_dup 6) (const_int -4)))) | |
1186 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1187 | (mem:SI (plus:SI (match_dup 6) (const_int -8)))) | |
1188 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1189 | (mem:SI (plus:SI (match_dup 6) (const_int -12)))) | |
1190 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1191 | (mem:SI (plus:SI (match_dup 6) (const_int -16)))) | |
1192 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1193 | (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] | |
1194 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1195 | "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback" | |
1196 | [(set_attr "type" "ldwm")]) | |
1197 | ||
1198 | (define_insn "*cdx_ldwm5_dec_ret" | |
1199 | [(match_parallel 0 "ldwm_operation" | |
1200 | [(return) | |
1201 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1202 | (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4)))) | |
1203 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1204 | (mem:SI (plus:SI (match_dup 6) (const_int -8)))) | |
1205 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1206 | (mem:SI (plus:SI (match_dup 6) (const_int -12)))) | |
1207 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1208 | (mem:SI (plus:SI (match_dup 6) (const_int -16)))) | |
1209 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1210 | (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] | |
1211 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1212 | "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), ret" | |
1213 | [(set_attr "type" "ldwm")]) | |
1214 | ||
1215 | (define_insn "*cdx_ldwm5_dec" | |
1216 | [(match_parallel 0 "ldwm_operation" | |
1217 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1218 | (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4)))) | |
1219 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1220 | (mem:SI (plus:SI (match_dup 6) (const_int -8)))) | |
1221 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1222 | (mem:SI (plus:SI (match_dup 6) (const_int -12)))) | |
1223 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1224 | (mem:SI (plus:SI (match_dup 6) (const_int -16)))) | |
1225 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1226 | (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] | |
1227 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
1228 | "ldwm\\t{%1, %2, %3, %4, %5}, --(%6)" | |
1229 | [(set_attr "type" "ldwm")]) | |
1230 | ||
1231 | (define_insn "*cdx_ldwm6_inc_wb_ret" | |
1232 | [(match_parallel 0 "ldwm_operation" | |
1233 | [(return) | |
1234 | (set (match_operand:SI 7 "register_operand" "+&r") | |
1235 | (plus:SI (match_dup 7) (const_int 24))) | |
1236 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1237 | (mem:SI (match_dup 7))) | |
1238 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1239 | (mem:SI (plus:SI (match_dup 7) (const_int 4)))) | |
1240 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1241 | (mem:SI (plus:SI (match_dup 7) (const_int 8)))) | |
1242 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1243 | (mem:SI (plus:SI (match_dup 7) (const_int 12)))) | |
1244 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1245 | (mem:SI (plus:SI (match_dup 7) (const_int 16)))) | |
1246 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1247 | (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] | |
1248 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1249 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback, ret" | |
1250 | [(set_attr "type" "ldwm")]) | |
1251 | ||
1252 | (define_insn "*cdx_ldwm6_inc_wb" | |
1253 | [(match_parallel 0 "ldwm_operation" | |
1254 | [(set (match_operand:SI 7 "register_operand" "+&r") | |
1255 | (plus:SI (match_dup 7) (const_int 24))) | |
1256 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1257 | (mem:SI (match_dup 7))) | |
1258 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1259 | (mem:SI (plus:SI (match_dup 7) (const_int 4)))) | |
1260 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1261 | (mem:SI (plus:SI (match_dup 7) (const_int 8)))) | |
1262 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1263 | (mem:SI (plus:SI (match_dup 7) (const_int 12)))) | |
1264 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1265 | (mem:SI (plus:SI (match_dup 7) (const_int 16)))) | |
1266 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1267 | (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] | |
1268 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1269 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback" | |
1270 | [(set_attr "type" "ldwm")]) | |
1271 | ||
1272 | (define_insn "*cdx_ldwm6_inc_ret" | |
1273 | [(match_parallel 0 "ldwm_operation" | |
1274 | [(return) | |
1275 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1276 | (mem:SI (match_operand:SI 7 "register_operand" "r"))) | |
1277 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1278 | (mem:SI (plus:SI (match_dup 7) (const_int 4)))) | |
1279 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1280 | (mem:SI (plus:SI (match_dup 7) (const_int 8)))) | |
1281 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1282 | (mem:SI (plus:SI (match_dup 7) (const_int 12)))) | |
1283 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1284 | (mem:SI (plus:SI (match_dup 7) (const_int 16)))) | |
1285 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1286 | (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] | |
1287 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1288 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, ret" | |
1289 | [(set_attr "type" "ldwm")]) | |
1290 | ||
1291 | (define_insn "*cdx_ldwm6_inc" | |
1292 | [(match_parallel 0 "ldwm_operation" | |
1293 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1294 | (mem:SI (match_operand:SI 7 "register_operand" "r"))) | |
1295 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1296 | (mem:SI (plus:SI (match_dup 7) (const_int 4)))) | |
1297 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1298 | (mem:SI (plus:SI (match_dup 7) (const_int 8)))) | |
1299 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1300 | (mem:SI (plus:SI (match_dup 7) (const_int 12)))) | |
1301 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1302 | (mem:SI (plus:SI (match_dup 7) (const_int 16)))) | |
1303 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1304 | (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] | |
1305 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1306 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++" | |
1307 | [(set_attr "type" "ldwm")]) | |
1308 | ||
1309 | (define_insn "*cdx_ldwm6_dec_wb_ret" | |
1310 | [(match_parallel 0 "ldwm_operation" | |
1311 | [(return) | |
1312 | (set (match_operand:SI 7 "register_operand" "+&r") | |
1313 | (plus:SI (match_dup 7) (const_int -24))) | |
1314 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1315 | (mem:SI (plus:SI (match_dup 7) (const_int -4)))) | |
1316 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1317 | (mem:SI (plus:SI (match_dup 7) (const_int -8)))) | |
1318 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1319 | (mem:SI (plus:SI (match_dup 7) (const_int -12)))) | |
1320 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1321 | (mem:SI (plus:SI (match_dup 7) (const_int -16)))) | |
1322 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1323 | (mem:SI (plus:SI (match_dup 7) (const_int -20)))) | |
1324 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1325 | (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] | |
1326 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1327 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback, ret" | |
1328 | [(set_attr "type" "ldwm")]) | |
1329 | ||
1330 | (define_insn "*cdx_ldwm6_dec_wb" | |
1331 | [(match_parallel 0 "ldwm_operation" | |
1332 | [(set (match_operand:SI 7 "register_operand" "+&r") | |
1333 | (plus:SI (match_dup 7) (const_int -24))) | |
1334 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1335 | (mem:SI (plus:SI (match_dup 7) (const_int -4)))) | |
1336 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1337 | (mem:SI (plus:SI (match_dup 7) (const_int -8)))) | |
1338 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1339 | (mem:SI (plus:SI (match_dup 7) (const_int -12)))) | |
1340 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1341 | (mem:SI (plus:SI (match_dup 7) (const_int -16)))) | |
1342 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1343 | (mem:SI (plus:SI (match_dup 7) (const_int -20)))) | |
1344 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1345 | (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] | |
1346 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1347 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback" | |
1348 | [(set_attr "type" "ldwm")]) | |
1349 | ||
1350 | (define_insn "*cdx_ldwm6_dec_ret" | |
1351 | [(match_parallel 0 "ldwm_operation" | |
1352 | [(return) | |
1353 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1354 | (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4)))) | |
1355 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1356 | (mem:SI (plus:SI (match_dup 7) (const_int -8)))) | |
1357 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1358 | (mem:SI (plus:SI (match_dup 7) (const_int -12)))) | |
1359 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1360 | (mem:SI (plus:SI (match_dup 7) (const_int -16)))) | |
1361 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1362 | (mem:SI (plus:SI (match_dup 7) (const_int -20)))) | |
1363 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1364 | (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] | |
1365 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1366 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), ret" | |
1367 | [(set_attr "type" "ldwm")]) | |
1368 | ||
1369 | (define_insn "*cdx_ldwm6_dec" | |
1370 | [(match_parallel 0 "ldwm_operation" | |
1371 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1372 | (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4)))) | |
1373 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1374 | (mem:SI (plus:SI (match_dup 7) (const_int -8)))) | |
1375 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1376 | (mem:SI (plus:SI (match_dup 7) (const_int -12)))) | |
1377 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1378 | (mem:SI (plus:SI (match_dup 7) (const_int -16)))) | |
1379 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1380 | (mem:SI (plus:SI (match_dup 7) (const_int -20)))) | |
1381 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1382 | (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] | |
1383 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
1384 | "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7)" | |
1385 | [(set_attr "type" "ldwm")]) | |
1386 | ||
1387 | (define_insn "*cdx_ldwm7_inc_wb_ret" | |
1388 | [(match_parallel 0 "ldwm_operation" | |
1389 | [(return) | |
1390 | (set (match_operand:SI 8 "register_operand" "+&r") | |
1391 | (plus:SI (match_dup 8) (const_int 28))) | |
1392 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1393 | (mem:SI (match_dup 8))) | |
1394 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1395 | (mem:SI (plus:SI (match_dup 8) (const_int 4)))) | |
1396 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1397 | (mem:SI (plus:SI (match_dup 8) (const_int 8)))) | |
1398 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1399 | (mem:SI (plus:SI (match_dup 8) (const_int 12)))) | |
1400 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1401 | (mem:SI (plus:SI (match_dup 8) (const_int 16)))) | |
1402 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1403 | (mem:SI (plus:SI (match_dup 8) (const_int 20)))) | |
1404 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1405 | (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] | |
1406 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1407 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback, ret" | |
1408 | [(set_attr "type" "ldwm")]) | |
1409 | ||
1410 | (define_insn "*cdx_ldwm7_inc_wb" | |
1411 | [(match_parallel 0 "ldwm_operation" | |
1412 | [(set (match_operand:SI 8 "register_operand" "+&r") | |
1413 | (plus:SI (match_dup 8) (const_int 28))) | |
1414 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1415 | (mem:SI (match_dup 8))) | |
1416 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1417 | (mem:SI (plus:SI (match_dup 8) (const_int 4)))) | |
1418 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1419 | (mem:SI (plus:SI (match_dup 8) (const_int 8)))) | |
1420 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1421 | (mem:SI (plus:SI (match_dup 8) (const_int 12)))) | |
1422 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1423 | (mem:SI (plus:SI (match_dup 8) (const_int 16)))) | |
1424 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1425 | (mem:SI (plus:SI (match_dup 8) (const_int 20)))) | |
1426 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1427 | (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] | |
1428 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1429 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback" | |
1430 | [(set_attr "type" "ldwm")]) | |
1431 | ||
1432 | (define_insn "*cdx_ldwm7_inc_ret" | |
1433 | [(match_parallel 0 "ldwm_operation" | |
1434 | [(return) | |
1435 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1436 | (mem:SI (match_operand:SI 8 "register_operand" "r"))) | |
1437 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1438 | (mem:SI (plus:SI (match_dup 8) (const_int 4)))) | |
1439 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1440 | (mem:SI (plus:SI (match_dup 8) (const_int 8)))) | |
1441 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1442 | (mem:SI (plus:SI (match_dup 8) (const_int 12)))) | |
1443 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1444 | (mem:SI (plus:SI (match_dup 8) (const_int 16)))) | |
1445 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1446 | (mem:SI (plus:SI (match_dup 8) (const_int 20)))) | |
1447 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1448 | (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] | |
1449 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1450 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, ret" | |
1451 | [(set_attr "type" "ldwm")]) | |
1452 | ||
1453 | (define_insn "*cdx_ldwm7_inc" | |
1454 | [(match_parallel 0 "ldwm_operation" | |
1455 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1456 | (mem:SI (match_operand:SI 8 "register_operand" "r"))) | |
1457 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1458 | (mem:SI (plus:SI (match_dup 8) (const_int 4)))) | |
1459 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1460 | (mem:SI (plus:SI (match_dup 8) (const_int 8)))) | |
1461 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1462 | (mem:SI (plus:SI (match_dup 8) (const_int 12)))) | |
1463 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1464 | (mem:SI (plus:SI (match_dup 8) (const_int 16)))) | |
1465 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1466 | (mem:SI (plus:SI (match_dup 8) (const_int 20)))) | |
1467 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1468 | (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] | |
1469 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1470 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++" | |
1471 | [(set_attr "type" "ldwm")]) | |
1472 | ||
1473 | (define_insn "*cdx_ldwm7_dec_wb_ret" | |
1474 | [(match_parallel 0 "ldwm_operation" | |
1475 | [(return) | |
1476 | (set (match_operand:SI 8 "register_operand" "+&r") | |
1477 | (plus:SI (match_dup 8) (const_int -28))) | |
1478 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1479 | (mem:SI (plus:SI (match_dup 8) (const_int -4)))) | |
1480 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1481 | (mem:SI (plus:SI (match_dup 8) (const_int -8)))) | |
1482 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1483 | (mem:SI (plus:SI (match_dup 8) (const_int -12)))) | |
1484 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1485 | (mem:SI (plus:SI (match_dup 8) (const_int -16)))) | |
1486 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1487 | (mem:SI (plus:SI (match_dup 8) (const_int -20)))) | |
1488 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1489 | (mem:SI (plus:SI (match_dup 8) (const_int -24)))) | |
1490 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1491 | (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] | |
1492 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1493 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback, ret" | |
1494 | [(set_attr "type" "ldwm")]) | |
1495 | ||
1496 | (define_insn "*cdx_ldwm7_dec_wb" | |
1497 | [(match_parallel 0 "ldwm_operation" | |
1498 | [(set (match_operand:SI 8 "register_operand" "+&r") | |
1499 | (plus:SI (match_dup 8) (const_int -28))) | |
1500 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1501 | (mem:SI (plus:SI (match_dup 8) (const_int -4)))) | |
1502 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1503 | (mem:SI (plus:SI (match_dup 8) (const_int -8)))) | |
1504 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1505 | (mem:SI (plus:SI (match_dup 8) (const_int -12)))) | |
1506 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1507 | (mem:SI (plus:SI (match_dup 8) (const_int -16)))) | |
1508 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1509 | (mem:SI (plus:SI (match_dup 8) (const_int -20)))) | |
1510 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1511 | (mem:SI (plus:SI (match_dup 8) (const_int -24)))) | |
1512 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1513 | (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] | |
1514 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1515 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback" | |
1516 | [(set_attr "type" "ldwm")]) | |
1517 | ||
1518 | (define_insn "*cdx_ldwm7_dec_ret" | |
1519 | [(match_parallel 0 "ldwm_operation" | |
1520 | [(return) | |
1521 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1522 | (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4)))) | |
1523 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1524 | (mem:SI (plus:SI (match_dup 8) (const_int -8)))) | |
1525 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1526 | (mem:SI (plus:SI (match_dup 8) (const_int -12)))) | |
1527 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1528 | (mem:SI (plus:SI (match_dup 8) (const_int -16)))) | |
1529 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1530 | (mem:SI (plus:SI (match_dup 8) (const_int -20)))) | |
1531 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1532 | (mem:SI (plus:SI (match_dup 8) (const_int -24)))) | |
1533 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1534 | (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] | |
1535 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1536 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), ret" | |
1537 | [(set_attr "type" "ldwm")]) | |
1538 | ||
1539 | (define_insn "*cdx_ldwm7_dec" | |
1540 | [(match_parallel 0 "ldwm_operation" | |
1541 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1542 | (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4)))) | |
1543 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1544 | (mem:SI (plus:SI (match_dup 8) (const_int -8)))) | |
1545 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1546 | (mem:SI (plus:SI (match_dup 8) (const_int -12)))) | |
1547 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1548 | (mem:SI (plus:SI (match_dup 8) (const_int -16)))) | |
1549 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1550 | (mem:SI (plus:SI (match_dup 8) (const_int -20)))) | |
1551 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1552 | (mem:SI (plus:SI (match_dup 8) (const_int -24)))) | |
1553 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1554 | (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] | |
1555 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
1556 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8)" | |
1557 | [(set_attr "type" "ldwm")]) | |
1558 | ||
1559 | (define_insn "*cdx_ldwm8_inc_wb_ret" | |
1560 | [(match_parallel 0 "ldwm_operation" | |
1561 | [(return) | |
1562 | (set (match_operand:SI 9 "register_operand" "+&r") | |
1563 | (plus:SI (match_dup 9) (const_int 32))) | |
1564 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1565 | (mem:SI (match_dup 9))) | |
1566 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1567 | (mem:SI (plus:SI (match_dup 9) (const_int 4)))) | |
1568 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1569 | (mem:SI (plus:SI (match_dup 9) (const_int 8)))) | |
1570 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1571 | (mem:SI (plus:SI (match_dup 9) (const_int 12)))) | |
1572 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1573 | (mem:SI (plus:SI (match_dup 9) (const_int 16)))) | |
1574 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1575 | (mem:SI (plus:SI (match_dup 9) (const_int 20)))) | |
1576 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1577 | (mem:SI (plus:SI (match_dup 9) (const_int 24)))) | |
1578 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1579 | (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] | |
1580 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1581 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback, ret" | |
1582 | [(set_attr "type" "ldwm")]) | |
1583 | ||
1584 | (define_insn "*cdx_ldwm8_inc_wb" | |
1585 | [(match_parallel 0 "ldwm_operation" | |
1586 | [(set (match_operand:SI 9 "register_operand" "+&r") | |
1587 | (plus:SI (match_dup 9) (const_int 32))) | |
1588 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1589 | (mem:SI (match_dup 9))) | |
1590 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1591 | (mem:SI (plus:SI (match_dup 9) (const_int 4)))) | |
1592 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1593 | (mem:SI (plus:SI (match_dup 9) (const_int 8)))) | |
1594 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1595 | (mem:SI (plus:SI (match_dup 9) (const_int 12)))) | |
1596 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1597 | (mem:SI (plus:SI (match_dup 9) (const_int 16)))) | |
1598 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1599 | (mem:SI (plus:SI (match_dup 9) (const_int 20)))) | |
1600 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1601 | (mem:SI (plus:SI (match_dup 9) (const_int 24)))) | |
1602 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1603 | (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] | |
1604 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1605 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback" | |
1606 | [(set_attr "type" "ldwm")]) | |
1607 | ||
1608 | (define_insn "*cdx_ldwm8_inc_ret" | |
1609 | [(match_parallel 0 "ldwm_operation" | |
1610 | [(return) | |
1611 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1612 | (mem:SI (match_operand:SI 9 "register_operand" "r"))) | |
1613 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1614 | (mem:SI (plus:SI (match_dup 9) (const_int 4)))) | |
1615 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1616 | (mem:SI (plus:SI (match_dup 9) (const_int 8)))) | |
1617 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1618 | (mem:SI (plus:SI (match_dup 9) (const_int 12)))) | |
1619 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1620 | (mem:SI (plus:SI (match_dup 9) (const_int 16)))) | |
1621 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1622 | (mem:SI (plus:SI (match_dup 9) (const_int 20)))) | |
1623 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1624 | (mem:SI (plus:SI (match_dup 9) (const_int 24)))) | |
1625 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1626 | (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] | |
1627 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1628 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, ret" | |
1629 | [(set_attr "type" "ldwm")]) | |
1630 | ||
1631 | (define_insn "*cdx_ldwm8_inc" | |
1632 | [(match_parallel 0 "ldwm_operation" | |
1633 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1634 | (mem:SI (match_operand:SI 9 "register_operand" "r"))) | |
1635 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1636 | (mem:SI (plus:SI (match_dup 9) (const_int 4)))) | |
1637 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1638 | (mem:SI (plus:SI (match_dup 9) (const_int 8)))) | |
1639 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1640 | (mem:SI (plus:SI (match_dup 9) (const_int 12)))) | |
1641 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1642 | (mem:SI (plus:SI (match_dup 9) (const_int 16)))) | |
1643 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1644 | (mem:SI (plus:SI (match_dup 9) (const_int 20)))) | |
1645 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1646 | (mem:SI (plus:SI (match_dup 9) (const_int 24)))) | |
1647 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1648 | (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] | |
1649 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1650 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++" | |
1651 | [(set_attr "type" "ldwm")]) | |
1652 | ||
1653 | (define_insn "*cdx_ldwm8_dec_wb_ret" | |
1654 | [(match_parallel 0 "ldwm_operation" | |
1655 | [(return) | |
1656 | (set (match_operand:SI 9 "register_operand" "+&r") | |
1657 | (plus:SI (match_dup 9) (const_int -32))) | |
1658 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1659 | (mem:SI (plus:SI (match_dup 9) (const_int -4)))) | |
1660 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1661 | (mem:SI (plus:SI (match_dup 9) (const_int -8)))) | |
1662 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1663 | (mem:SI (plus:SI (match_dup 9) (const_int -12)))) | |
1664 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1665 | (mem:SI (plus:SI (match_dup 9) (const_int -16)))) | |
1666 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1667 | (mem:SI (plus:SI (match_dup 9) (const_int -20)))) | |
1668 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1669 | (mem:SI (plus:SI (match_dup 9) (const_int -24)))) | |
1670 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1671 | (mem:SI (plus:SI (match_dup 9) (const_int -28)))) | |
1672 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1673 | (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] | |
1674 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1675 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback, ret" | |
1676 | [(set_attr "type" "ldwm")]) | |
1677 | ||
1678 | (define_insn "*cdx_ldwm8_dec_wb" | |
1679 | [(match_parallel 0 "ldwm_operation" | |
1680 | [(set (match_operand:SI 9 "register_operand" "+&r") | |
1681 | (plus:SI (match_dup 9) (const_int -32))) | |
1682 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1683 | (mem:SI (plus:SI (match_dup 9) (const_int -4)))) | |
1684 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1685 | (mem:SI (plus:SI (match_dup 9) (const_int -8)))) | |
1686 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1687 | (mem:SI (plus:SI (match_dup 9) (const_int -12)))) | |
1688 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1689 | (mem:SI (plus:SI (match_dup 9) (const_int -16)))) | |
1690 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1691 | (mem:SI (plus:SI (match_dup 9) (const_int -20)))) | |
1692 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1693 | (mem:SI (plus:SI (match_dup 9) (const_int -24)))) | |
1694 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1695 | (mem:SI (plus:SI (match_dup 9) (const_int -28)))) | |
1696 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1697 | (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] | |
1698 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1699 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback" | |
1700 | [(set_attr "type" "ldwm")]) | |
1701 | ||
1702 | (define_insn "*cdx_ldwm8_dec_ret" | |
1703 | [(match_parallel 0 "ldwm_operation" | |
1704 | [(return) | |
1705 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1706 | (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4)))) | |
1707 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1708 | (mem:SI (plus:SI (match_dup 9) (const_int -8)))) | |
1709 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1710 | (mem:SI (plus:SI (match_dup 9) (const_int -12)))) | |
1711 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1712 | (mem:SI (plus:SI (match_dup 9) (const_int -16)))) | |
1713 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1714 | (mem:SI (plus:SI (match_dup 9) (const_int -20)))) | |
1715 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1716 | (mem:SI (plus:SI (match_dup 9) (const_int -24)))) | |
1717 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1718 | (mem:SI (plus:SI (match_dup 9) (const_int -28)))) | |
1719 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1720 | (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] | |
1721 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1722 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), ret" | |
1723 | [(set_attr "type" "ldwm")]) | |
1724 | ||
1725 | (define_insn "*cdx_ldwm8_dec" | |
1726 | [(match_parallel 0 "ldwm_operation" | |
1727 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1728 | (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4)))) | |
1729 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1730 | (mem:SI (plus:SI (match_dup 9) (const_int -8)))) | |
1731 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1732 | (mem:SI (plus:SI (match_dup 9) (const_int -12)))) | |
1733 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1734 | (mem:SI (plus:SI (match_dup 9) (const_int -16)))) | |
1735 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1736 | (mem:SI (plus:SI (match_dup 9) (const_int -20)))) | |
1737 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1738 | (mem:SI (plus:SI (match_dup 9) (const_int -24)))) | |
1739 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1740 | (mem:SI (plus:SI (match_dup 9) (const_int -28)))) | |
1741 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1742 | (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] | |
1743 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
1744 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9)" | |
1745 | [(set_attr "type" "ldwm")]) | |
1746 | ||
1747 | (define_insn "*cdx_ldwm9_inc_wb_ret" | |
1748 | [(match_parallel 0 "ldwm_operation" | |
1749 | [(return) | |
1750 | (set (match_operand:SI 10 "register_operand" "+&r") | |
1751 | (plus:SI (match_dup 10) (const_int 36))) | |
1752 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1753 | (mem:SI (match_dup 10))) | |
1754 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1755 | (mem:SI (plus:SI (match_dup 10) (const_int 4)))) | |
1756 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1757 | (mem:SI (plus:SI (match_dup 10) (const_int 8)))) | |
1758 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1759 | (mem:SI (plus:SI (match_dup 10) (const_int 12)))) | |
1760 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1761 | (mem:SI (plus:SI (match_dup 10) (const_int 16)))) | |
1762 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1763 | (mem:SI (plus:SI (match_dup 10) (const_int 20)))) | |
1764 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1765 | (mem:SI (plus:SI (match_dup 10) (const_int 24)))) | |
1766 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1767 | (mem:SI (plus:SI (match_dup 10) (const_int 28)))) | |
1768 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1769 | (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] | |
1770 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
1771 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback, ret" | |
1772 | [(set_attr "type" "ldwm")]) | |
1773 | ||
1774 | (define_insn "*cdx_ldwm9_inc_wb" | |
1775 | [(match_parallel 0 "ldwm_operation" | |
1776 | [(set (match_operand:SI 10 "register_operand" "+&r") | |
1777 | (plus:SI (match_dup 10) (const_int 36))) | |
1778 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1779 | (mem:SI (match_dup 10))) | |
1780 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1781 | (mem:SI (plus:SI (match_dup 10) (const_int 4)))) | |
1782 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1783 | (mem:SI (plus:SI (match_dup 10) (const_int 8)))) | |
1784 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1785 | (mem:SI (plus:SI (match_dup 10) (const_int 12)))) | |
1786 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1787 | (mem:SI (plus:SI (match_dup 10) (const_int 16)))) | |
1788 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1789 | (mem:SI (plus:SI (match_dup 10) (const_int 20)))) | |
1790 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1791 | (mem:SI (plus:SI (match_dup 10) (const_int 24)))) | |
1792 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1793 | (mem:SI (plus:SI (match_dup 10) (const_int 28)))) | |
1794 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1795 | (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] | |
1796 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1797 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback" | |
1798 | [(set_attr "type" "ldwm")]) | |
1799 | ||
1800 | (define_insn "*cdx_ldwm9_inc_ret" | |
1801 | [(match_parallel 0 "ldwm_operation" | |
1802 | [(return) | |
1803 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1804 | (mem:SI (match_operand:SI 10 "register_operand" "r"))) | |
1805 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1806 | (mem:SI (plus:SI (match_dup 10) (const_int 4)))) | |
1807 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1808 | (mem:SI (plus:SI (match_dup 10) (const_int 8)))) | |
1809 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1810 | (mem:SI (plus:SI (match_dup 10) (const_int 12)))) | |
1811 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1812 | (mem:SI (plus:SI (match_dup 10) (const_int 16)))) | |
1813 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1814 | (mem:SI (plus:SI (match_dup 10) (const_int 20)))) | |
1815 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1816 | (mem:SI (plus:SI (match_dup 10) (const_int 24)))) | |
1817 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1818 | (mem:SI (plus:SI (match_dup 10) (const_int 28)))) | |
1819 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1820 | (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] | |
1821 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1822 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, ret" | |
1823 | [(set_attr "type" "ldwm")]) | |
1824 | ||
1825 | (define_insn "*cdx_ldwm9_inc" | |
1826 | [(match_parallel 0 "ldwm_operation" | |
1827 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1828 | (mem:SI (match_operand:SI 10 "register_operand" "r"))) | |
1829 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1830 | (mem:SI (plus:SI (match_dup 10) (const_int 4)))) | |
1831 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1832 | (mem:SI (plus:SI (match_dup 10) (const_int 8)))) | |
1833 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1834 | (mem:SI (plus:SI (match_dup 10) (const_int 12)))) | |
1835 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1836 | (mem:SI (plus:SI (match_dup 10) (const_int 16)))) | |
1837 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1838 | (mem:SI (plus:SI (match_dup 10) (const_int 20)))) | |
1839 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1840 | (mem:SI (plus:SI (match_dup 10) (const_int 24)))) | |
1841 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1842 | (mem:SI (plus:SI (match_dup 10) (const_int 28)))) | |
1843 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1844 | (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] | |
1845 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1846 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++" | |
1847 | [(set_attr "type" "ldwm")]) | |
1848 | ||
1849 | (define_insn "*cdx_ldwm9_dec_wb_ret" | |
1850 | [(match_parallel 0 "ldwm_operation" | |
1851 | [(return) | |
1852 | (set (match_operand:SI 10 "register_operand" "+&r") | |
1853 | (plus:SI (match_dup 10) (const_int -36))) | |
1854 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1855 | (mem:SI (plus:SI (match_dup 10) (const_int -4)))) | |
1856 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1857 | (mem:SI (plus:SI (match_dup 10) (const_int -8)))) | |
1858 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1859 | (mem:SI (plus:SI (match_dup 10) (const_int -12)))) | |
1860 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1861 | (mem:SI (plus:SI (match_dup 10) (const_int -16)))) | |
1862 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1863 | (mem:SI (plus:SI (match_dup 10) (const_int -20)))) | |
1864 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1865 | (mem:SI (plus:SI (match_dup 10) (const_int -24)))) | |
1866 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1867 | (mem:SI (plus:SI (match_dup 10) (const_int -28)))) | |
1868 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1869 | (mem:SI (plus:SI (match_dup 10) (const_int -32)))) | |
1870 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1871 | (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] | |
1872 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
1873 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback, ret" | |
1874 | [(set_attr "type" "ldwm")]) | |
1875 | ||
1876 | (define_insn "*cdx_ldwm9_dec_wb" | |
1877 | [(match_parallel 0 "ldwm_operation" | |
1878 | [(set (match_operand:SI 10 "register_operand" "+&r") | |
1879 | (plus:SI (match_dup 10) (const_int -36))) | |
1880 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1881 | (mem:SI (plus:SI (match_dup 10) (const_int -4)))) | |
1882 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1883 | (mem:SI (plus:SI (match_dup 10) (const_int -8)))) | |
1884 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1885 | (mem:SI (plus:SI (match_dup 10) (const_int -12)))) | |
1886 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1887 | (mem:SI (plus:SI (match_dup 10) (const_int -16)))) | |
1888 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1889 | (mem:SI (plus:SI (match_dup 10) (const_int -20)))) | |
1890 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1891 | (mem:SI (plus:SI (match_dup 10) (const_int -24)))) | |
1892 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1893 | (mem:SI (plus:SI (match_dup 10) (const_int -28)))) | |
1894 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1895 | (mem:SI (plus:SI (match_dup 10) (const_int -32)))) | |
1896 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1897 | (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] | |
1898 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1899 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback" | |
1900 | [(set_attr "type" "ldwm")]) | |
1901 | ||
1902 | (define_insn "*cdx_ldwm9_dec_ret" | |
1903 | [(match_parallel 0 "ldwm_operation" | |
1904 | [(return) | |
1905 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1906 | (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4)))) | |
1907 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1908 | (mem:SI (plus:SI (match_dup 10) (const_int -8)))) | |
1909 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1910 | (mem:SI (plus:SI (match_dup 10) (const_int -12)))) | |
1911 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1912 | (mem:SI (plus:SI (match_dup 10) (const_int -16)))) | |
1913 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1914 | (mem:SI (plus:SI (match_dup 10) (const_int -20)))) | |
1915 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1916 | (mem:SI (plus:SI (match_dup 10) (const_int -24)))) | |
1917 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1918 | (mem:SI (plus:SI (match_dup 10) (const_int -28)))) | |
1919 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1920 | (mem:SI (plus:SI (match_dup 10) (const_int -32)))) | |
1921 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1922 | (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] | |
1923 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
1924 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), ret" | |
1925 | [(set_attr "type" "ldwm")]) | |
1926 | ||
1927 | (define_insn "*cdx_ldwm9_dec" | |
1928 | [(match_parallel 0 "ldwm_operation" | |
1929 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1930 | (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4)))) | |
1931 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1932 | (mem:SI (plus:SI (match_dup 10) (const_int -8)))) | |
1933 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1934 | (mem:SI (plus:SI (match_dup 10) (const_int -12)))) | |
1935 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1936 | (mem:SI (plus:SI (match_dup 10) (const_int -16)))) | |
1937 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1938 | (mem:SI (plus:SI (match_dup 10) (const_int -20)))) | |
1939 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1940 | (mem:SI (plus:SI (match_dup 10) (const_int -24)))) | |
1941 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1942 | (mem:SI (plus:SI (match_dup 10) (const_int -28)))) | |
1943 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1944 | (mem:SI (plus:SI (match_dup 10) (const_int -32)))) | |
1945 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1946 | (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] | |
1947 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
1948 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10)" | |
1949 | [(set_attr "type" "ldwm")]) | |
1950 | ||
1951 | (define_insn "*cdx_ldwm10_inc_wb_ret" | |
1952 | [(match_parallel 0 "ldwm_operation" | |
1953 | [(return) | |
1954 | (set (match_operand:SI 11 "register_operand" "+&r") | |
1955 | (plus:SI (match_dup 11) (const_int 40))) | |
1956 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1957 | (mem:SI (match_dup 11))) | |
1958 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1959 | (mem:SI (plus:SI (match_dup 11) (const_int 4)))) | |
1960 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1961 | (mem:SI (plus:SI (match_dup 11) (const_int 8)))) | |
1962 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1963 | (mem:SI (plus:SI (match_dup 11) (const_int 12)))) | |
1964 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1965 | (mem:SI (plus:SI (match_dup 11) (const_int 16)))) | |
1966 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1967 | (mem:SI (plus:SI (match_dup 11) (const_int 20)))) | |
1968 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1969 | (mem:SI (plus:SI (match_dup 11) (const_int 24)))) | |
1970 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1971 | (mem:SI (plus:SI (match_dup 11) (const_int 28)))) | |
1972 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
1973 | (mem:SI (plus:SI (match_dup 11) (const_int 32)))) | |
1974 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
1975 | (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] | |
1976 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
1977 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback, ret" | |
1978 | [(set_attr "type" "ldwm")]) | |
1979 | ||
1980 | (define_insn "*cdx_ldwm10_inc_wb" | |
1981 | [(match_parallel 0 "ldwm_operation" | |
1982 | [(set (match_operand:SI 11 "register_operand" "+&r") | |
1983 | (plus:SI (match_dup 11) (const_int 40))) | |
1984 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
1985 | (mem:SI (match_dup 11))) | |
1986 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
1987 | (mem:SI (plus:SI (match_dup 11) (const_int 4)))) | |
1988 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
1989 | (mem:SI (plus:SI (match_dup 11) (const_int 8)))) | |
1990 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
1991 | (mem:SI (plus:SI (match_dup 11) (const_int 12)))) | |
1992 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
1993 | (mem:SI (plus:SI (match_dup 11) (const_int 16)))) | |
1994 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
1995 | (mem:SI (plus:SI (match_dup 11) (const_int 20)))) | |
1996 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
1997 | (mem:SI (plus:SI (match_dup 11) (const_int 24)))) | |
1998 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
1999 | (mem:SI (plus:SI (match_dup 11) (const_int 28)))) | |
2000 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2001 | (mem:SI (plus:SI (match_dup 11) (const_int 32)))) | |
2002 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2003 | (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] | |
2004 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2005 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback" | |
2006 | [(set_attr "type" "ldwm")]) | |
2007 | ||
2008 | (define_insn "*cdx_ldwm10_inc_ret" | |
2009 | [(match_parallel 0 "ldwm_operation" | |
2010 | [(return) | |
2011 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2012 | (mem:SI (match_operand:SI 11 "register_operand" "r"))) | |
2013 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2014 | (mem:SI (plus:SI (match_dup 11) (const_int 4)))) | |
2015 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2016 | (mem:SI (plus:SI (match_dup 11) (const_int 8)))) | |
2017 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2018 | (mem:SI (plus:SI (match_dup 11) (const_int 12)))) | |
2019 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2020 | (mem:SI (plus:SI (match_dup 11) (const_int 16)))) | |
2021 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2022 | (mem:SI (plus:SI (match_dup 11) (const_int 20)))) | |
2023 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2024 | (mem:SI (plus:SI (match_dup 11) (const_int 24)))) | |
2025 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2026 | (mem:SI (plus:SI (match_dup 11) (const_int 28)))) | |
2027 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2028 | (mem:SI (plus:SI (match_dup 11) (const_int 32)))) | |
2029 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2030 | (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] | |
2031 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2032 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, ret" | |
2033 | [(set_attr "type" "ldwm")]) | |
2034 | ||
2035 | (define_insn "*cdx_ldwm10_inc" | |
2036 | [(match_parallel 0 "ldwm_operation" | |
2037 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2038 | (mem:SI (match_operand:SI 11 "register_operand" "r"))) | |
2039 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2040 | (mem:SI (plus:SI (match_dup 11) (const_int 4)))) | |
2041 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2042 | (mem:SI (plus:SI (match_dup 11) (const_int 8)))) | |
2043 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2044 | (mem:SI (plus:SI (match_dup 11) (const_int 12)))) | |
2045 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2046 | (mem:SI (plus:SI (match_dup 11) (const_int 16)))) | |
2047 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2048 | (mem:SI (plus:SI (match_dup 11) (const_int 20)))) | |
2049 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2050 | (mem:SI (plus:SI (match_dup 11) (const_int 24)))) | |
2051 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2052 | (mem:SI (plus:SI (match_dup 11) (const_int 28)))) | |
2053 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2054 | (mem:SI (plus:SI (match_dup 11) (const_int 32)))) | |
2055 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2056 | (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] | |
2057 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
2058 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++" | |
2059 | [(set_attr "type" "ldwm")]) | |
2060 | ||
2061 | (define_insn "*cdx_ldwm10_dec_wb_ret" | |
2062 | [(match_parallel 0 "ldwm_operation" | |
2063 | [(return) | |
2064 | (set (match_operand:SI 11 "register_operand" "+&r") | |
2065 | (plus:SI (match_dup 11) (const_int -40))) | |
2066 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2067 | (mem:SI (plus:SI (match_dup 11) (const_int -4)))) | |
2068 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2069 | (mem:SI (plus:SI (match_dup 11) (const_int -8)))) | |
2070 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2071 | (mem:SI (plus:SI (match_dup 11) (const_int -12)))) | |
2072 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2073 | (mem:SI (plus:SI (match_dup 11) (const_int -16)))) | |
2074 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2075 | (mem:SI (plus:SI (match_dup 11) (const_int -20)))) | |
2076 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2077 | (mem:SI (plus:SI (match_dup 11) (const_int -24)))) | |
2078 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2079 | (mem:SI (plus:SI (match_dup 11) (const_int -28)))) | |
2080 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2081 | (mem:SI (plus:SI (match_dup 11) (const_int -32)))) | |
2082 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2083 | (mem:SI (plus:SI (match_dup 11) (const_int -36)))) | |
2084 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2085 | (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] | |
2086 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2087 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback, ret" | |
2088 | [(set_attr "type" "ldwm")]) | |
2089 | ||
2090 | (define_insn "*cdx_ldwm10_dec_wb" | |
2091 | [(match_parallel 0 "ldwm_operation" | |
2092 | [(set (match_operand:SI 11 "register_operand" "+&r") | |
2093 | (plus:SI (match_dup 11) (const_int -40))) | |
2094 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2095 | (mem:SI (plus:SI (match_dup 11) (const_int -4)))) | |
2096 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2097 | (mem:SI (plus:SI (match_dup 11) (const_int -8)))) | |
2098 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2099 | (mem:SI (plus:SI (match_dup 11) (const_int -12)))) | |
2100 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2101 | (mem:SI (plus:SI (match_dup 11) (const_int -16)))) | |
2102 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2103 | (mem:SI (plus:SI (match_dup 11) (const_int -20)))) | |
2104 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2105 | (mem:SI (plus:SI (match_dup 11) (const_int -24)))) | |
2106 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2107 | (mem:SI (plus:SI (match_dup 11) (const_int -28)))) | |
2108 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2109 | (mem:SI (plus:SI (match_dup 11) (const_int -32)))) | |
2110 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2111 | (mem:SI (plus:SI (match_dup 11) (const_int -36)))) | |
2112 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2113 | (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] | |
2114 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2115 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback" | |
2116 | [(set_attr "type" "ldwm")]) | |
2117 | ||
2118 | (define_insn "*cdx_ldwm10_dec_ret" | |
2119 | [(match_parallel 0 "ldwm_operation" | |
2120 | [(return) | |
2121 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2122 | (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4)))) | |
2123 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2124 | (mem:SI (plus:SI (match_dup 11) (const_int -8)))) | |
2125 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2126 | (mem:SI (plus:SI (match_dup 11) (const_int -12)))) | |
2127 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2128 | (mem:SI (plus:SI (match_dup 11) (const_int -16)))) | |
2129 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2130 | (mem:SI (plus:SI (match_dup 11) (const_int -20)))) | |
2131 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2132 | (mem:SI (plus:SI (match_dup 11) (const_int -24)))) | |
2133 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2134 | (mem:SI (plus:SI (match_dup 11) (const_int -28)))) | |
2135 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2136 | (mem:SI (plus:SI (match_dup 11) (const_int -32)))) | |
2137 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2138 | (mem:SI (plus:SI (match_dup 11) (const_int -36)))) | |
2139 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2140 | (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] | |
2141 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2142 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), ret" | |
2143 | [(set_attr "type" "ldwm")]) | |
2144 | ||
2145 | (define_insn "*cdx_ldwm10_dec" | |
2146 | [(match_parallel 0 "ldwm_operation" | |
2147 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2148 | (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4)))) | |
2149 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2150 | (mem:SI (plus:SI (match_dup 11) (const_int -8)))) | |
2151 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2152 | (mem:SI (plus:SI (match_dup 11) (const_int -12)))) | |
2153 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2154 | (mem:SI (plus:SI (match_dup 11) (const_int -16)))) | |
2155 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2156 | (mem:SI (plus:SI (match_dup 11) (const_int -20)))) | |
2157 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2158 | (mem:SI (plus:SI (match_dup 11) (const_int -24)))) | |
2159 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2160 | (mem:SI (plus:SI (match_dup 11) (const_int -28)))) | |
2161 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2162 | (mem:SI (plus:SI (match_dup 11) (const_int -32)))) | |
2163 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2164 | (mem:SI (plus:SI (match_dup 11) (const_int -36)))) | |
2165 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2166 | (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] | |
2167 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
2168 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11)" | |
2169 | [(set_attr "type" "ldwm")]) | |
2170 | ||
2171 | (define_insn "*cdx_ldwm11_inc_wb_ret" | |
2172 | [(match_parallel 0 "ldwm_operation" | |
2173 | [(return) | |
2174 | (set (match_operand:SI 12 "register_operand" "+&r") | |
2175 | (plus:SI (match_dup 12) (const_int 44))) | |
2176 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2177 | (mem:SI (match_dup 12))) | |
2178 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2179 | (mem:SI (plus:SI (match_dup 12) (const_int 4)))) | |
2180 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2181 | (mem:SI (plus:SI (match_dup 12) (const_int 8)))) | |
2182 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2183 | (mem:SI (plus:SI (match_dup 12) (const_int 12)))) | |
2184 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2185 | (mem:SI (plus:SI (match_dup 12) (const_int 16)))) | |
2186 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2187 | (mem:SI (plus:SI (match_dup 12) (const_int 20)))) | |
2188 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2189 | (mem:SI (plus:SI (match_dup 12) (const_int 24)))) | |
2190 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2191 | (mem:SI (plus:SI (match_dup 12) (const_int 28)))) | |
2192 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2193 | (mem:SI (plus:SI (match_dup 12) (const_int 32)))) | |
2194 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2195 | (mem:SI (plus:SI (match_dup 12) (const_int 36)))) | |
2196 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2197 | (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] | |
2198 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2199 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback, ret" | |
2200 | [(set_attr "type" "ldwm")]) | |
2201 | ||
2202 | (define_insn "*cdx_ldwm11_inc_wb" | |
2203 | [(match_parallel 0 "ldwm_operation" | |
2204 | [(set (match_operand:SI 12 "register_operand" "+&r") | |
2205 | (plus:SI (match_dup 12) (const_int 44))) | |
2206 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2207 | (mem:SI (match_dup 12))) | |
2208 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2209 | (mem:SI (plus:SI (match_dup 12) (const_int 4)))) | |
2210 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2211 | (mem:SI (plus:SI (match_dup 12) (const_int 8)))) | |
2212 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2213 | (mem:SI (plus:SI (match_dup 12) (const_int 12)))) | |
2214 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2215 | (mem:SI (plus:SI (match_dup 12) (const_int 16)))) | |
2216 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2217 | (mem:SI (plus:SI (match_dup 12) (const_int 20)))) | |
2218 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2219 | (mem:SI (plus:SI (match_dup 12) (const_int 24)))) | |
2220 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2221 | (mem:SI (plus:SI (match_dup 12) (const_int 28)))) | |
2222 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2223 | (mem:SI (plus:SI (match_dup 12) (const_int 32)))) | |
2224 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2225 | (mem:SI (plus:SI (match_dup 12) (const_int 36)))) | |
2226 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2227 | (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] | |
2228 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2229 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback" | |
2230 | [(set_attr "type" "ldwm")]) | |
2231 | ||
2232 | (define_insn "*cdx_ldwm11_inc_ret" | |
2233 | [(match_parallel 0 "ldwm_operation" | |
2234 | [(return) | |
2235 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2236 | (mem:SI (match_operand:SI 12 "register_operand" "r"))) | |
2237 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2238 | (mem:SI (plus:SI (match_dup 12) (const_int 4)))) | |
2239 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2240 | (mem:SI (plus:SI (match_dup 12) (const_int 8)))) | |
2241 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2242 | (mem:SI (plus:SI (match_dup 12) (const_int 12)))) | |
2243 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2244 | (mem:SI (plus:SI (match_dup 12) (const_int 16)))) | |
2245 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2246 | (mem:SI (plus:SI (match_dup 12) (const_int 20)))) | |
2247 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2248 | (mem:SI (plus:SI (match_dup 12) (const_int 24)))) | |
2249 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2250 | (mem:SI (plus:SI (match_dup 12) (const_int 28)))) | |
2251 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2252 | (mem:SI (plus:SI (match_dup 12) (const_int 32)))) | |
2253 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2254 | (mem:SI (plus:SI (match_dup 12) (const_int 36)))) | |
2255 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2256 | (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] | |
2257 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2258 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, ret" | |
2259 | [(set_attr "type" "ldwm")]) | |
2260 | ||
2261 | (define_insn "*cdx_ldwm11_inc" | |
2262 | [(match_parallel 0 "ldwm_operation" | |
2263 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2264 | (mem:SI (match_operand:SI 12 "register_operand" "r"))) | |
2265 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2266 | (mem:SI (plus:SI (match_dup 12) (const_int 4)))) | |
2267 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2268 | (mem:SI (plus:SI (match_dup 12) (const_int 8)))) | |
2269 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2270 | (mem:SI (plus:SI (match_dup 12) (const_int 12)))) | |
2271 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2272 | (mem:SI (plus:SI (match_dup 12) (const_int 16)))) | |
2273 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2274 | (mem:SI (plus:SI (match_dup 12) (const_int 20)))) | |
2275 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2276 | (mem:SI (plus:SI (match_dup 12) (const_int 24)))) | |
2277 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2278 | (mem:SI (plus:SI (match_dup 12) (const_int 28)))) | |
2279 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2280 | (mem:SI (plus:SI (match_dup 12) (const_int 32)))) | |
2281 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2282 | (mem:SI (plus:SI (match_dup 12) (const_int 36)))) | |
2283 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2284 | (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] | |
2285 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2286 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++" | |
2287 | [(set_attr "type" "ldwm")]) | |
2288 | ||
2289 | (define_insn "*cdx_ldwm11_dec_wb_ret" | |
2290 | [(match_parallel 0 "ldwm_operation" | |
2291 | [(return) | |
2292 | (set (match_operand:SI 12 "register_operand" "+&r") | |
2293 | (plus:SI (match_dup 12) (const_int -44))) | |
2294 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2295 | (mem:SI (plus:SI (match_dup 12) (const_int -4)))) | |
2296 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2297 | (mem:SI (plus:SI (match_dup 12) (const_int -8)))) | |
2298 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2299 | (mem:SI (plus:SI (match_dup 12) (const_int -12)))) | |
2300 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2301 | (mem:SI (plus:SI (match_dup 12) (const_int -16)))) | |
2302 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2303 | (mem:SI (plus:SI (match_dup 12) (const_int -20)))) | |
2304 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2305 | (mem:SI (plus:SI (match_dup 12) (const_int -24)))) | |
2306 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2307 | (mem:SI (plus:SI (match_dup 12) (const_int -28)))) | |
2308 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2309 | (mem:SI (plus:SI (match_dup 12) (const_int -32)))) | |
2310 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2311 | (mem:SI (plus:SI (match_dup 12) (const_int -36)))) | |
2312 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2313 | (mem:SI (plus:SI (match_dup 12) (const_int -40)))) | |
2314 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2315 | (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] | |
2316 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2317 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback, ret" | |
2318 | [(set_attr "type" "ldwm")]) | |
2319 | ||
2320 | (define_insn "*cdx_ldwm11_dec_wb" | |
2321 | [(match_parallel 0 "ldwm_operation" | |
2322 | [(set (match_operand:SI 12 "register_operand" "+&r") | |
2323 | (plus:SI (match_dup 12) (const_int -44))) | |
2324 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2325 | (mem:SI (plus:SI (match_dup 12) (const_int -4)))) | |
2326 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2327 | (mem:SI (plus:SI (match_dup 12) (const_int -8)))) | |
2328 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2329 | (mem:SI (plus:SI (match_dup 12) (const_int -12)))) | |
2330 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2331 | (mem:SI (plus:SI (match_dup 12) (const_int -16)))) | |
2332 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2333 | (mem:SI (plus:SI (match_dup 12) (const_int -20)))) | |
2334 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2335 | (mem:SI (plus:SI (match_dup 12) (const_int -24)))) | |
2336 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2337 | (mem:SI (plus:SI (match_dup 12) (const_int -28)))) | |
2338 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2339 | (mem:SI (plus:SI (match_dup 12) (const_int -32)))) | |
2340 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2341 | (mem:SI (plus:SI (match_dup 12) (const_int -36)))) | |
2342 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2343 | (mem:SI (plus:SI (match_dup 12) (const_int -40)))) | |
2344 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2345 | (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] | |
2346 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2347 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback" | |
2348 | [(set_attr "type" "ldwm")]) | |
2349 | ||
2350 | (define_insn "*cdx_ldwm11_dec_ret" | |
2351 | [(match_parallel 0 "ldwm_operation" | |
2352 | [(return) | |
2353 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2354 | (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4)))) | |
2355 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2356 | (mem:SI (plus:SI (match_dup 12) (const_int -8)))) | |
2357 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2358 | (mem:SI (plus:SI (match_dup 12) (const_int -12)))) | |
2359 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2360 | (mem:SI (plus:SI (match_dup 12) (const_int -16)))) | |
2361 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2362 | (mem:SI (plus:SI (match_dup 12) (const_int -20)))) | |
2363 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2364 | (mem:SI (plus:SI (match_dup 12) (const_int -24)))) | |
2365 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2366 | (mem:SI (plus:SI (match_dup 12) (const_int -28)))) | |
2367 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2368 | (mem:SI (plus:SI (match_dup 12) (const_int -32)))) | |
2369 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2370 | (mem:SI (plus:SI (match_dup 12) (const_int -36)))) | |
2371 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2372 | (mem:SI (plus:SI (match_dup 12) (const_int -40)))) | |
2373 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2374 | (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] | |
2375 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2376 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), ret" | |
2377 | [(set_attr "type" "ldwm")]) | |
2378 | ||
2379 | (define_insn "*cdx_ldwm11_dec" | |
2380 | [(match_parallel 0 "ldwm_operation" | |
2381 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2382 | (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4)))) | |
2383 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2384 | (mem:SI (plus:SI (match_dup 12) (const_int -8)))) | |
2385 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2386 | (mem:SI (plus:SI (match_dup 12) (const_int -12)))) | |
2387 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2388 | (mem:SI (plus:SI (match_dup 12) (const_int -16)))) | |
2389 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2390 | (mem:SI (plus:SI (match_dup 12) (const_int -20)))) | |
2391 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2392 | (mem:SI (plus:SI (match_dup 12) (const_int -24)))) | |
2393 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2394 | (mem:SI (plus:SI (match_dup 12) (const_int -28)))) | |
2395 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2396 | (mem:SI (plus:SI (match_dup 12) (const_int -32)))) | |
2397 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2398 | (mem:SI (plus:SI (match_dup 12) (const_int -36)))) | |
2399 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2400 | (mem:SI (plus:SI (match_dup 12) (const_int -40)))) | |
2401 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2402 | (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] | |
2403 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
2404 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12)" | |
2405 | [(set_attr "type" "ldwm")]) | |
2406 | ||
2407 | (define_insn "*cdx_ldwm12_inc_wb_ret" | |
2408 | [(match_parallel 0 "ldwm_operation" | |
2409 | [(return) | |
2410 | (set (match_operand:SI 13 "register_operand" "+&r") | |
2411 | (plus:SI (match_dup 13) (const_int 48))) | |
2412 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2413 | (mem:SI (match_dup 13))) | |
2414 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2415 | (mem:SI (plus:SI (match_dup 13) (const_int 4)))) | |
2416 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2417 | (mem:SI (plus:SI (match_dup 13) (const_int 8)))) | |
2418 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2419 | (mem:SI (plus:SI (match_dup 13) (const_int 12)))) | |
2420 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2421 | (mem:SI (plus:SI (match_dup 13) (const_int 16)))) | |
2422 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2423 | (mem:SI (plus:SI (match_dup 13) (const_int 20)))) | |
2424 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2425 | (mem:SI (plus:SI (match_dup 13) (const_int 24)))) | |
2426 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2427 | (mem:SI (plus:SI (match_dup 13) (const_int 28)))) | |
2428 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2429 | (mem:SI (plus:SI (match_dup 13) (const_int 32)))) | |
2430 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2431 | (mem:SI (plus:SI (match_dup 13) (const_int 36)))) | |
2432 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2433 | (mem:SI (plus:SI (match_dup 13) (const_int 40)))) | |
2434 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2435 | (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] | |
2436 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 14" | |
2437 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback, ret" | |
2438 | [(set_attr "type" "ldwm")]) | |
2439 | ||
2440 | (define_insn "*cdx_ldwm12_inc_wb" | |
2441 | [(match_parallel 0 "ldwm_operation" | |
2442 | [(set (match_operand:SI 13 "register_operand" "+&r") | |
2443 | (plus:SI (match_dup 13) (const_int 48))) | |
2444 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2445 | (mem:SI (match_dup 13))) | |
2446 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2447 | (mem:SI (plus:SI (match_dup 13) (const_int 4)))) | |
2448 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2449 | (mem:SI (plus:SI (match_dup 13) (const_int 8)))) | |
2450 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2451 | (mem:SI (plus:SI (match_dup 13) (const_int 12)))) | |
2452 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2453 | (mem:SI (plus:SI (match_dup 13) (const_int 16)))) | |
2454 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2455 | (mem:SI (plus:SI (match_dup 13) (const_int 20)))) | |
2456 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2457 | (mem:SI (plus:SI (match_dup 13) (const_int 24)))) | |
2458 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2459 | (mem:SI (plus:SI (match_dup 13) (const_int 28)))) | |
2460 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2461 | (mem:SI (plus:SI (match_dup 13) (const_int 32)))) | |
2462 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2463 | (mem:SI (plus:SI (match_dup 13) (const_int 36)))) | |
2464 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2465 | (mem:SI (plus:SI (match_dup 13) (const_int 40)))) | |
2466 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2467 | (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] | |
2468 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2469 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback" | |
2470 | [(set_attr "type" "ldwm")]) | |
2471 | ||
2472 | (define_insn "*cdx_ldwm12_inc_ret" | |
2473 | [(match_parallel 0 "ldwm_operation" | |
2474 | [(return) | |
2475 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2476 | (mem:SI (match_operand:SI 13 "register_operand" "r"))) | |
2477 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2478 | (mem:SI (plus:SI (match_dup 13) (const_int 4)))) | |
2479 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2480 | (mem:SI (plus:SI (match_dup 13) (const_int 8)))) | |
2481 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2482 | (mem:SI (plus:SI (match_dup 13) (const_int 12)))) | |
2483 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2484 | (mem:SI (plus:SI (match_dup 13) (const_int 16)))) | |
2485 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2486 | (mem:SI (plus:SI (match_dup 13) (const_int 20)))) | |
2487 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2488 | (mem:SI (plus:SI (match_dup 13) (const_int 24)))) | |
2489 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2490 | (mem:SI (plus:SI (match_dup 13) (const_int 28)))) | |
2491 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2492 | (mem:SI (plus:SI (match_dup 13) (const_int 32)))) | |
2493 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2494 | (mem:SI (plus:SI (match_dup 13) (const_int 36)))) | |
2495 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2496 | (mem:SI (plus:SI (match_dup 13) (const_int 40)))) | |
2497 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2498 | (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] | |
2499 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2500 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, ret" | |
2501 | [(set_attr "type" "ldwm")]) | |
2502 | ||
2503 | (define_insn "*cdx_ldwm12_inc" | |
2504 | [(match_parallel 0 "ldwm_operation" | |
2505 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2506 | (mem:SI (match_operand:SI 13 "register_operand" "r"))) | |
2507 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2508 | (mem:SI (plus:SI (match_dup 13) (const_int 4)))) | |
2509 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2510 | (mem:SI (plus:SI (match_dup 13) (const_int 8)))) | |
2511 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2512 | (mem:SI (plus:SI (match_dup 13) (const_int 12)))) | |
2513 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2514 | (mem:SI (plus:SI (match_dup 13) (const_int 16)))) | |
2515 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2516 | (mem:SI (plus:SI (match_dup 13) (const_int 20)))) | |
2517 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2518 | (mem:SI (plus:SI (match_dup 13) (const_int 24)))) | |
2519 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2520 | (mem:SI (plus:SI (match_dup 13) (const_int 28)))) | |
2521 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2522 | (mem:SI (plus:SI (match_dup 13) (const_int 32)))) | |
2523 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2524 | (mem:SI (plus:SI (match_dup 13) (const_int 36)))) | |
2525 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2526 | (mem:SI (plus:SI (match_dup 13) (const_int 40)))) | |
2527 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2528 | (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] | |
2529 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2530 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++" | |
2531 | [(set_attr "type" "ldwm")]) | |
2532 | ||
2533 | (define_insn "*cdx_ldwm12_dec_wb_ret" | |
2534 | [(match_parallel 0 "ldwm_operation" | |
2535 | [(return) | |
2536 | (set (match_operand:SI 13 "register_operand" "+&r") | |
2537 | (plus:SI (match_dup 13) (const_int -48))) | |
2538 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2539 | (mem:SI (plus:SI (match_dup 13) (const_int -4)))) | |
2540 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2541 | (mem:SI (plus:SI (match_dup 13) (const_int -8)))) | |
2542 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2543 | (mem:SI (plus:SI (match_dup 13) (const_int -12)))) | |
2544 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2545 | (mem:SI (plus:SI (match_dup 13) (const_int -16)))) | |
2546 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2547 | (mem:SI (plus:SI (match_dup 13) (const_int -20)))) | |
2548 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2549 | (mem:SI (plus:SI (match_dup 13) (const_int -24)))) | |
2550 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2551 | (mem:SI (plus:SI (match_dup 13) (const_int -28)))) | |
2552 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2553 | (mem:SI (plus:SI (match_dup 13) (const_int -32)))) | |
2554 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2555 | (mem:SI (plus:SI (match_dup 13) (const_int -36)))) | |
2556 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2557 | (mem:SI (plus:SI (match_dup 13) (const_int -40)))) | |
2558 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2559 | (mem:SI (plus:SI (match_dup 13) (const_int -44)))) | |
2560 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2561 | (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] | |
2562 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 14" | |
2563 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback, ret" | |
2564 | [(set_attr "type" "ldwm")]) | |
2565 | ||
2566 | (define_insn "*cdx_ldwm12_dec_wb" | |
2567 | [(match_parallel 0 "ldwm_operation" | |
2568 | [(set (match_operand:SI 13 "register_operand" "+&r") | |
2569 | (plus:SI (match_dup 13) (const_int -48))) | |
2570 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2571 | (mem:SI (plus:SI (match_dup 13) (const_int -4)))) | |
2572 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2573 | (mem:SI (plus:SI (match_dup 13) (const_int -8)))) | |
2574 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2575 | (mem:SI (plus:SI (match_dup 13) (const_int -12)))) | |
2576 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2577 | (mem:SI (plus:SI (match_dup 13) (const_int -16)))) | |
2578 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2579 | (mem:SI (plus:SI (match_dup 13) (const_int -20)))) | |
2580 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2581 | (mem:SI (plus:SI (match_dup 13) (const_int -24)))) | |
2582 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2583 | (mem:SI (plus:SI (match_dup 13) (const_int -28)))) | |
2584 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2585 | (mem:SI (plus:SI (match_dup 13) (const_int -32)))) | |
2586 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2587 | (mem:SI (plus:SI (match_dup 13) (const_int -36)))) | |
2588 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2589 | (mem:SI (plus:SI (match_dup 13) (const_int -40)))) | |
2590 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2591 | (mem:SI (plus:SI (match_dup 13) (const_int -44)))) | |
2592 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2593 | (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] | |
2594 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2595 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback" | |
2596 | [(set_attr "type" "ldwm")]) | |
2597 | ||
2598 | (define_insn "*cdx_ldwm12_dec_ret" | |
2599 | [(match_parallel 0 "ldwm_operation" | |
2600 | [(return) | |
2601 | (set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2602 | (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4)))) | |
2603 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2604 | (mem:SI (plus:SI (match_dup 13) (const_int -8)))) | |
2605 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2606 | (mem:SI (plus:SI (match_dup 13) (const_int -12)))) | |
2607 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2608 | (mem:SI (plus:SI (match_dup 13) (const_int -16)))) | |
2609 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2610 | (mem:SI (plus:SI (match_dup 13) (const_int -20)))) | |
2611 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2612 | (mem:SI (plus:SI (match_dup 13) (const_int -24)))) | |
2613 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2614 | (mem:SI (plus:SI (match_dup 13) (const_int -28)))) | |
2615 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2616 | (mem:SI (plus:SI (match_dup 13) (const_int -32)))) | |
2617 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2618 | (mem:SI (plus:SI (match_dup 13) (const_int -36)))) | |
2619 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2620 | (mem:SI (plus:SI (match_dup 13) (const_int -40)))) | |
2621 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2622 | (mem:SI (plus:SI (match_dup 13) (const_int -44)))) | |
2623 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2624 | (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] | |
2625 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
2626 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), ret" | |
2627 | [(set_attr "type" "ldwm")]) | |
2628 | ||
2629 | (define_insn "*cdx_ldwm12_dec" | |
2630 | [(match_parallel 0 "ldwm_operation" | |
2631 | [(set (match_operand:SI 1 "nios2_hard_register_operand" "") | |
2632 | (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4)))) | |
2633 | (set (match_operand:SI 2 "nios2_hard_register_operand" "") | |
2634 | (mem:SI (plus:SI (match_dup 13) (const_int -8)))) | |
2635 | (set (match_operand:SI 3 "nios2_hard_register_operand" "") | |
2636 | (mem:SI (plus:SI (match_dup 13) (const_int -12)))) | |
2637 | (set (match_operand:SI 4 "nios2_hard_register_operand" "") | |
2638 | (mem:SI (plus:SI (match_dup 13) (const_int -16)))) | |
2639 | (set (match_operand:SI 5 "nios2_hard_register_operand" "") | |
2640 | (mem:SI (plus:SI (match_dup 13) (const_int -20)))) | |
2641 | (set (match_operand:SI 6 "nios2_hard_register_operand" "") | |
2642 | (mem:SI (plus:SI (match_dup 13) (const_int -24)))) | |
2643 | (set (match_operand:SI 7 "nios2_hard_register_operand" "") | |
2644 | (mem:SI (plus:SI (match_dup 13) (const_int -28)))) | |
2645 | (set (match_operand:SI 8 "nios2_hard_register_operand" "") | |
2646 | (mem:SI (plus:SI (match_dup 13) (const_int -32)))) | |
2647 | (set (match_operand:SI 9 "nios2_hard_register_operand" "") | |
2648 | (mem:SI (plus:SI (match_dup 13) (const_int -36)))) | |
2649 | (set (match_operand:SI 10 "nios2_hard_register_operand" "") | |
2650 | (mem:SI (plus:SI (match_dup 13) (const_int -40)))) | |
2651 | (set (match_operand:SI 11 "nios2_hard_register_operand" "") | |
2652 | (mem:SI (plus:SI (match_dup 13) (const_int -44)))) | |
2653 | (set (match_operand:SI 12 "nios2_hard_register_operand" "") | |
2654 | (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] | |
2655 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
2656 | "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13)" | |
2657 | [(set_attr "type" "ldwm")]) | |
2658 | ||
2659 | (define_insn "*cdx_stwm1_inc_wb" | |
2660 | [(match_parallel 0 "stwm_operation" | |
2661 | [(set (match_operand:SI 2 "register_operand" "+&r") | |
2662 | (plus:SI (match_dup 2) (const_int 4))) | |
2663 | (set (mem:SI (match_dup 2)) | |
2664 | (match_operand:SI 1 "nios2_hard_register_operand" ""))])] | |
2665 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
2666 | "stwm\\t{%1}, (%2)++, writeback" | |
2667 | [(set_attr "type" "stwm")]) | |
2668 | ||
2669 | (define_insn "*cdx_stwm1_inc" | |
2670 | [(match_parallel 0 "stwm_operation" | |
2671 | [(set (mem:SI (match_operand:SI 2 "register_operand" "r")) | |
2672 | (match_operand:SI 1 "nios2_hard_register_operand" ""))])] | |
2673 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" | |
2674 | "stwm\\t{%1}, (%2)++" | |
2675 | [(set_attr "type" "stwm")]) | |
2676 | ||
2677 | (define_insn "*cdx_stwm1_dec_wb" | |
2678 | [(match_parallel 0 "stwm_operation" | |
2679 | [(set (match_operand:SI 2 "register_operand" "+&r") | |
2680 | (plus:SI (match_dup 2) (const_int -4))) | |
2681 | (set (mem:SI (plus:SI (match_dup 2) (const_int -4))) | |
2682 | (match_operand:SI 1 "nios2_hard_register_operand" ""))])] | |
2683 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
2684 | "stwm\\t{%1}, --(%2), writeback" | |
2685 | [(set_attr "type" "stwm")]) | |
2686 | ||
2687 | (define_insn "*cdx_stwm1_dec" | |
2688 | [(match_parallel 0 "stwm_operation" | |
2689 | [(set (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))) | |
2690 | (match_operand:SI 1 "nios2_hard_register_operand" ""))])] | |
2691 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" | |
2692 | "stwm\\t{%1}, --(%2)" | |
2693 | [(set_attr "type" "stwm")]) | |
2694 | ||
2695 | (define_insn "*cdx_stwm2_inc_wb" | |
2696 | [(match_parallel 0 "stwm_operation" | |
2697 | [(set (match_operand:SI 3 "register_operand" "+&r") | |
2698 | (plus:SI (match_dup 3) (const_int 8))) | |
2699 | (set (mem:SI (match_dup 3)) | |
2700 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2701 | (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) | |
2702 | (match_operand:SI 2 "nios2_hard_register_operand" ""))])] | |
2703 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
2704 | "stwm\\t{%1, %2}, (%3)++, writeback" | |
2705 | [(set_attr "type" "stwm")]) | |
2706 | ||
2707 | (define_insn "*cdx_stwm2_inc" | |
2708 | [(match_parallel 0 "stwm_operation" | |
2709 | [(set (mem:SI (match_operand:SI 3 "register_operand" "r")) | |
2710 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2711 | (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) | |
2712 | (match_operand:SI 2 "nios2_hard_register_operand" ""))])] | |
2713 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
2714 | "stwm\\t{%1, %2}, (%3)++" | |
2715 | [(set_attr "type" "stwm")]) | |
2716 | ||
2717 | (define_insn "*cdx_stwm2_dec_wb" | |
2718 | [(match_parallel 0 "stwm_operation" | |
2719 | [(set (match_operand:SI 3 "register_operand" "+&r") | |
2720 | (plus:SI (match_dup 3) (const_int -8))) | |
2721 | (set (mem:SI (plus:SI (match_dup 3) (const_int -4))) | |
2722 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2723 | (set (mem:SI (plus:SI (match_dup 3) (const_int -8))) | |
2724 | (match_operand:SI 2 "nios2_hard_register_operand" ""))])] | |
2725 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
2726 | "stwm\\t{%1, %2}, --(%3), writeback" | |
2727 | [(set_attr "type" "stwm")]) | |
2728 | ||
2729 | (define_insn "*cdx_stwm2_dec" | |
2730 | [(match_parallel 0 "stwm_operation" | |
2731 | [(set (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4))) | |
2732 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2733 | (set (mem:SI (plus:SI (match_dup 3) (const_int -8))) | |
2734 | (match_operand:SI 2 "nios2_hard_register_operand" ""))])] | |
2735 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" | |
2736 | "stwm\\t{%1, %2}, --(%3)" | |
2737 | [(set_attr "type" "stwm")]) | |
2738 | ||
2739 | (define_insn "*cdx_stwm3_inc_wb" | |
2740 | [(match_parallel 0 "stwm_operation" | |
2741 | [(set (match_operand:SI 4 "register_operand" "+&r") | |
2742 | (plus:SI (match_dup 4) (const_int 12))) | |
2743 | (set (mem:SI (match_dup 4)) | |
2744 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2745 | (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) | |
2746 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2747 | (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) | |
2748 | (match_operand:SI 3 "nios2_hard_register_operand" ""))])] | |
2749 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
2750 | "stwm\\t{%1, %2, %3}, (%4)++, writeback" | |
2751 | [(set_attr "type" "stwm")]) | |
2752 | ||
2753 | (define_insn "*cdx_stwm3_inc" | |
2754 | [(match_parallel 0 "stwm_operation" | |
2755 | [(set (mem:SI (match_operand:SI 4 "register_operand" "r")) | |
2756 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2757 | (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) | |
2758 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2759 | (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) | |
2760 | (match_operand:SI 3 "nios2_hard_register_operand" ""))])] | |
2761 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
2762 | "stwm\\t{%1, %2, %3}, (%4)++" | |
2763 | [(set_attr "type" "stwm")]) | |
2764 | ||
2765 | (define_insn "*cdx_stwm3_dec_wb" | |
2766 | [(match_parallel 0 "stwm_operation" | |
2767 | [(set (match_operand:SI 4 "register_operand" "+&r") | |
2768 | (plus:SI (match_dup 4) (const_int -12))) | |
2769 | (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) | |
2770 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2771 | (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) | |
2772 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2773 | (set (mem:SI (plus:SI (match_dup 4) (const_int -12))) | |
2774 | (match_operand:SI 3 "nios2_hard_register_operand" ""))])] | |
2775 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
2776 | "stwm\\t{%1, %2, %3}, --(%4), writeback" | |
2777 | [(set_attr "type" "stwm")]) | |
2778 | ||
2779 | (define_insn "*cdx_stwm3_dec" | |
2780 | [(match_parallel 0 "stwm_operation" | |
2781 | [(set (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4))) | |
2782 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2783 | (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) | |
2784 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2785 | (set (mem:SI (plus:SI (match_dup 4) (const_int -12))) | |
2786 | (match_operand:SI 3 "nios2_hard_register_operand" ""))])] | |
2787 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" | |
2788 | "stwm\\t{%1, %2, %3}, --(%4)" | |
2789 | [(set_attr "type" "stwm")]) | |
2790 | ||
2791 | (define_insn "*cdx_stwm4_inc_wb" | |
2792 | [(match_parallel 0 "stwm_operation" | |
2793 | [(set (match_operand:SI 5 "register_operand" "+&r") | |
2794 | (plus:SI (match_dup 5) (const_int 16))) | |
2795 | (set (mem:SI (match_dup 5)) | |
2796 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2797 | (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) | |
2798 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2799 | (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) | |
2800 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2801 | (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) | |
2802 | (match_operand:SI 4 "nios2_hard_register_operand" ""))])] | |
2803 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
2804 | "stwm\\t{%1, %2, %3, %4}, (%5)++, writeback" | |
2805 | [(set_attr "type" "stwm")]) | |
2806 | ||
2807 | (define_insn "*cdx_stwm4_inc" | |
2808 | [(match_parallel 0 "stwm_operation" | |
2809 | [(set (mem:SI (match_operand:SI 5 "register_operand" "r")) | |
2810 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2811 | (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) | |
2812 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2813 | (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) | |
2814 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2815 | (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) | |
2816 | (match_operand:SI 4 "nios2_hard_register_operand" ""))])] | |
2817 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
2818 | "stwm\\t{%1, %2, %3, %4}, (%5)++" | |
2819 | [(set_attr "type" "stwm")]) | |
2820 | ||
2821 | (define_insn "*cdx_stwm4_dec_wb" | |
2822 | [(match_parallel 0 "stwm_operation" | |
2823 | [(set (match_operand:SI 5 "register_operand" "+&r") | |
2824 | (plus:SI (match_dup 5) (const_int -16))) | |
2825 | (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) | |
2826 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2827 | (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) | |
2828 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2829 | (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) | |
2830 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2831 | (set (mem:SI (plus:SI (match_dup 5) (const_int -16))) | |
2832 | (match_operand:SI 4 "nios2_hard_register_operand" ""))])] | |
2833 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
2834 | "stwm\\t{%1, %2, %3, %4}, --(%5), writeback" | |
2835 | [(set_attr "type" "stwm")]) | |
2836 | ||
2837 | (define_insn "*cdx_stwm4_dec" | |
2838 | [(match_parallel 0 "stwm_operation" | |
2839 | [(set (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4))) | |
2840 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2841 | (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) | |
2842 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2843 | (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) | |
2844 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2845 | (set (mem:SI (plus:SI (match_dup 5) (const_int -16))) | |
2846 | (match_operand:SI 4 "nios2_hard_register_operand" ""))])] | |
2847 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" | |
2848 | "stwm\\t{%1, %2, %3, %4}, --(%5)" | |
2849 | [(set_attr "type" "stwm")]) | |
2850 | ||
2851 | (define_insn "*cdx_stwm5_inc_wb" | |
2852 | [(match_parallel 0 "stwm_operation" | |
2853 | [(set (match_operand:SI 6 "register_operand" "+&r") | |
2854 | (plus:SI (match_dup 6) (const_int 20))) | |
2855 | (set (mem:SI (match_dup 6)) | |
2856 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2857 | (set (mem:SI (plus:SI (match_dup 6) (const_int 4))) | |
2858 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2859 | (set (mem:SI (plus:SI (match_dup 6) (const_int 8))) | |
2860 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2861 | (set (mem:SI (plus:SI (match_dup 6) (const_int 12))) | |
2862 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2863 | (set (mem:SI (plus:SI (match_dup 6) (const_int 16))) | |
2864 | (match_operand:SI 5 "nios2_hard_register_operand" ""))])] | |
2865 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
2866 | "stwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback" | |
2867 | [(set_attr "type" "stwm")]) | |
2868 | ||
2869 | (define_insn "*cdx_stwm5_inc" | |
2870 | [(match_parallel 0 "stwm_operation" | |
2871 | [(set (mem:SI (match_operand:SI 6 "register_operand" "r")) | |
2872 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2873 | (set (mem:SI (plus:SI (match_dup 6) (const_int 4))) | |
2874 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2875 | (set (mem:SI (plus:SI (match_dup 6) (const_int 8))) | |
2876 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2877 | (set (mem:SI (plus:SI (match_dup 6) (const_int 12))) | |
2878 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2879 | (set (mem:SI (plus:SI (match_dup 6) (const_int 16))) | |
2880 | (match_operand:SI 5 "nios2_hard_register_operand" ""))])] | |
2881 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
2882 | "stwm\\t{%1, %2, %3, %4, %5}, (%6)++" | |
2883 | [(set_attr "type" "stwm")]) | |
2884 | ||
2885 | (define_insn "*cdx_stwm5_dec_wb" | |
2886 | [(match_parallel 0 "stwm_operation" | |
2887 | [(set (match_operand:SI 6 "register_operand" "+&r") | |
2888 | (plus:SI (match_dup 6) (const_int -20))) | |
2889 | (set (mem:SI (plus:SI (match_dup 6) (const_int -4))) | |
2890 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2891 | (set (mem:SI (plus:SI (match_dup 6) (const_int -8))) | |
2892 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2893 | (set (mem:SI (plus:SI (match_dup 6) (const_int -12))) | |
2894 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2895 | (set (mem:SI (plus:SI (match_dup 6) (const_int -16))) | |
2896 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2897 | (set (mem:SI (plus:SI (match_dup 6) (const_int -20))) | |
2898 | (match_operand:SI 5 "nios2_hard_register_operand" ""))])] | |
2899 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
2900 | "stwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback" | |
2901 | [(set_attr "type" "stwm")]) | |
2902 | ||
2903 | (define_insn "*cdx_stwm5_dec" | |
2904 | [(match_parallel 0 "stwm_operation" | |
2905 | [(set (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4))) | |
2906 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2907 | (set (mem:SI (plus:SI (match_dup 6) (const_int -8))) | |
2908 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2909 | (set (mem:SI (plus:SI (match_dup 6) (const_int -12))) | |
2910 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2911 | (set (mem:SI (plus:SI (match_dup 6) (const_int -16))) | |
2912 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2913 | (set (mem:SI (plus:SI (match_dup 6) (const_int -20))) | |
2914 | (match_operand:SI 5 "nios2_hard_register_operand" ""))])] | |
2915 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" | |
2916 | "stwm\\t{%1, %2, %3, %4, %5}, --(%6)" | |
2917 | [(set_attr "type" "stwm")]) | |
2918 | ||
2919 | (define_insn "*cdx_stwm6_inc_wb" | |
2920 | [(match_parallel 0 "stwm_operation" | |
2921 | [(set (match_operand:SI 7 "register_operand" "+&r") | |
2922 | (plus:SI (match_dup 7) (const_int 24))) | |
2923 | (set (mem:SI (match_dup 7)) | |
2924 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2925 | (set (mem:SI (plus:SI (match_dup 7) (const_int 4))) | |
2926 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2927 | (set (mem:SI (plus:SI (match_dup 7) (const_int 8))) | |
2928 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2929 | (set (mem:SI (plus:SI (match_dup 7) (const_int 12))) | |
2930 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2931 | (set (mem:SI (plus:SI (match_dup 7) (const_int 16))) | |
2932 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
2933 | (set (mem:SI (plus:SI (match_dup 7) (const_int 20))) | |
2934 | (match_operand:SI 6 "nios2_hard_register_operand" ""))])] | |
2935 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
2936 | "stwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback" | |
2937 | [(set_attr "type" "stwm")]) | |
2938 | ||
2939 | (define_insn "*cdx_stwm6_inc" | |
2940 | [(match_parallel 0 "stwm_operation" | |
2941 | [(set (mem:SI (match_operand:SI 7 "register_operand" "r")) | |
2942 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2943 | (set (mem:SI (plus:SI (match_dup 7) (const_int 4))) | |
2944 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2945 | (set (mem:SI (plus:SI (match_dup 7) (const_int 8))) | |
2946 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2947 | (set (mem:SI (plus:SI (match_dup 7) (const_int 12))) | |
2948 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2949 | (set (mem:SI (plus:SI (match_dup 7) (const_int 16))) | |
2950 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
2951 | (set (mem:SI (plus:SI (match_dup 7) (const_int 20))) | |
2952 | (match_operand:SI 6 "nios2_hard_register_operand" ""))])] | |
2953 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
2954 | "stwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++" | |
2955 | [(set_attr "type" "stwm")]) | |
2956 | ||
2957 | (define_insn "*cdx_stwm6_dec_wb" | |
2958 | [(match_parallel 0 "stwm_operation" | |
2959 | [(set (match_operand:SI 7 "register_operand" "+&r") | |
2960 | (plus:SI (match_dup 7) (const_int -24))) | |
2961 | (set (mem:SI (plus:SI (match_dup 7) (const_int -4))) | |
2962 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2963 | (set (mem:SI (plus:SI (match_dup 7) (const_int -8))) | |
2964 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2965 | (set (mem:SI (plus:SI (match_dup 7) (const_int -12))) | |
2966 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2967 | (set (mem:SI (plus:SI (match_dup 7) (const_int -16))) | |
2968 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2969 | (set (mem:SI (plus:SI (match_dup 7) (const_int -20))) | |
2970 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
2971 | (set (mem:SI (plus:SI (match_dup 7) (const_int -24))) | |
2972 | (match_operand:SI 6 "nios2_hard_register_operand" ""))])] | |
2973 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
2974 | "stwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback" | |
2975 | [(set_attr "type" "stwm")]) | |
2976 | ||
2977 | (define_insn "*cdx_stwm6_dec" | |
2978 | [(match_parallel 0 "stwm_operation" | |
2979 | [(set (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4))) | |
2980 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
2981 | (set (mem:SI (plus:SI (match_dup 7) (const_int -8))) | |
2982 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
2983 | (set (mem:SI (plus:SI (match_dup 7) (const_int -12))) | |
2984 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
2985 | (set (mem:SI (plus:SI (match_dup 7) (const_int -16))) | |
2986 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
2987 | (set (mem:SI (plus:SI (match_dup 7) (const_int -20))) | |
2988 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
2989 | (set (mem:SI (plus:SI (match_dup 7) (const_int -24))) | |
2990 | (match_operand:SI 6 "nios2_hard_register_operand" ""))])] | |
2991 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" | |
2992 | "stwm\\t{%1, %2, %3, %4, %5, %6}, --(%7)" | |
2993 | [(set_attr "type" "stwm")]) | |
2994 | ||
2995 | (define_insn "*cdx_stwm7_inc_wb" | |
2996 | [(match_parallel 0 "stwm_operation" | |
2997 | [(set (match_operand:SI 8 "register_operand" "+&r") | |
2998 | (plus:SI (match_dup 8) (const_int 28))) | |
2999 | (set (mem:SI (match_dup 8)) | |
3000 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3001 | (set (mem:SI (plus:SI (match_dup 8) (const_int 4))) | |
3002 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3003 | (set (mem:SI (plus:SI (match_dup 8) (const_int 8))) | |
3004 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3005 | (set (mem:SI (plus:SI (match_dup 8) (const_int 12))) | |
3006 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3007 | (set (mem:SI (plus:SI (match_dup 8) (const_int 16))) | |
3008 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3009 | (set (mem:SI (plus:SI (match_dup 8) (const_int 20))) | |
3010 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3011 | (set (mem:SI (plus:SI (match_dup 8) (const_int 24))) | |
3012 | (match_operand:SI 7 "nios2_hard_register_operand" ""))])] | |
3013 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
3014 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback" | |
3015 | [(set_attr "type" "stwm")]) | |
3016 | ||
3017 | (define_insn "*cdx_stwm7_inc" | |
3018 | [(match_parallel 0 "stwm_operation" | |
3019 | [(set (mem:SI (match_operand:SI 8 "register_operand" "r")) | |
3020 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3021 | (set (mem:SI (plus:SI (match_dup 8) (const_int 4))) | |
3022 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3023 | (set (mem:SI (plus:SI (match_dup 8) (const_int 8))) | |
3024 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3025 | (set (mem:SI (plus:SI (match_dup 8) (const_int 12))) | |
3026 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3027 | (set (mem:SI (plus:SI (match_dup 8) (const_int 16))) | |
3028 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3029 | (set (mem:SI (plus:SI (match_dup 8) (const_int 20))) | |
3030 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3031 | (set (mem:SI (plus:SI (match_dup 8) (const_int 24))) | |
3032 | (match_operand:SI 7 "nios2_hard_register_operand" ""))])] | |
3033 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
3034 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++" | |
3035 | [(set_attr "type" "stwm")]) | |
3036 | ||
3037 | (define_insn "*cdx_stwm7_dec_wb" | |
3038 | [(match_parallel 0 "stwm_operation" | |
3039 | [(set (match_operand:SI 8 "register_operand" "+&r") | |
3040 | (plus:SI (match_dup 8) (const_int -28))) | |
3041 | (set (mem:SI (plus:SI (match_dup 8) (const_int -4))) | |
3042 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3043 | (set (mem:SI (plus:SI (match_dup 8) (const_int -8))) | |
3044 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3045 | (set (mem:SI (plus:SI (match_dup 8) (const_int -12))) | |
3046 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3047 | (set (mem:SI (plus:SI (match_dup 8) (const_int -16))) | |
3048 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3049 | (set (mem:SI (plus:SI (match_dup 8) (const_int -20))) | |
3050 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3051 | (set (mem:SI (plus:SI (match_dup 8) (const_int -24))) | |
3052 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3053 | (set (mem:SI (plus:SI (match_dup 8) (const_int -28))) | |
3054 | (match_operand:SI 7 "nios2_hard_register_operand" ""))])] | |
3055 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
3056 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback" | |
3057 | [(set_attr "type" "stwm")]) | |
3058 | ||
3059 | (define_insn "*cdx_stwm7_dec" | |
3060 | [(match_parallel 0 "stwm_operation" | |
3061 | [(set (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4))) | |
3062 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3063 | (set (mem:SI (plus:SI (match_dup 8) (const_int -8))) | |
3064 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3065 | (set (mem:SI (plus:SI (match_dup 8) (const_int -12))) | |
3066 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3067 | (set (mem:SI (plus:SI (match_dup 8) (const_int -16))) | |
3068 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3069 | (set (mem:SI (plus:SI (match_dup 8) (const_int -20))) | |
3070 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3071 | (set (mem:SI (plus:SI (match_dup 8) (const_int -24))) | |
3072 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3073 | (set (mem:SI (plus:SI (match_dup 8) (const_int -28))) | |
3074 | (match_operand:SI 7 "nios2_hard_register_operand" ""))])] | |
3075 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" | |
3076 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8)" | |
3077 | [(set_attr "type" "stwm")]) | |
3078 | ||
3079 | (define_insn "*cdx_stwm8_inc_wb" | |
3080 | [(match_parallel 0 "stwm_operation" | |
3081 | [(set (match_operand:SI 9 "register_operand" "+&r") | |
3082 | (plus:SI (match_dup 9) (const_int 32))) | |
3083 | (set (mem:SI (match_dup 9)) | |
3084 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3085 | (set (mem:SI (plus:SI (match_dup 9) (const_int 4))) | |
3086 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3087 | (set (mem:SI (plus:SI (match_dup 9) (const_int 8))) | |
3088 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3089 | (set (mem:SI (plus:SI (match_dup 9) (const_int 12))) | |
3090 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3091 | (set (mem:SI (plus:SI (match_dup 9) (const_int 16))) | |
3092 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3093 | (set (mem:SI (plus:SI (match_dup 9) (const_int 20))) | |
3094 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3095 | (set (mem:SI (plus:SI (match_dup 9) (const_int 24))) | |
3096 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3097 | (set (mem:SI (plus:SI (match_dup 9) (const_int 28))) | |
3098 | (match_operand:SI 8 "nios2_hard_register_operand" ""))])] | |
3099 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
3100 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback" | |
3101 | [(set_attr "type" "stwm")]) | |
3102 | ||
3103 | (define_insn "*cdx_stwm8_inc" | |
3104 | [(match_parallel 0 "stwm_operation" | |
3105 | [(set (mem:SI (match_operand:SI 9 "register_operand" "r")) | |
3106 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3107 | (set (mem:SI (plus:SI (match_dup 9) (const_int 4))) | |
3108 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3109 | (set (mem:SI (plus:SI (match_dup 9) (const_int 8))) | |
3110 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3111 | (set (mem:SI (plus:SI (match_dup 9) (const_int 12))) | |
3112 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3113 | (set (mem:SI (plus:SI (match_dup 9) (const_int 16))) | |
3114 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3115 | (set (mem:SI (plus:SI (match_dup 9) (const_int 20))) | |
3116 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3117 | (set (mem:SI (plus:SI (match_dup 9) (const_int 24))) | |
3118 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3119 | (set (mem:SI (plus:SI (match_dup 9) (const_int 28))) | |
3120 | (match_operand:SI 8 "nios2_hard_register_operand" ""))])] | |
3121 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
3122 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++" | |
3123 | [(set_attr "type" "stwm")]) | |
3124 | ||
3125 | (define_insn "*cdx_stwm8_dec_wb" | |
3126 | [(match_parallel 0 "stwm_operation" | |
3127 | [(set (match_operand:SI 9 "register_operand" "+&r") | |
3128 | (plus:SI (match_dup 9) (const_int -32))) | |
3129 | (set (mem:SI (plus:SI (match_dup 9) (const_int -4))) | |
3130 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3131 | (set (mem:SI (plus:SI (match_dup 9) (const_int -8))) | |
3132 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3133 | (set (mem:SI (plus:SI (match_dup 9) (const_int -12))) | |
3134 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3135 | (set (mem:SI (plus:SI (match_dup 9) (const_int -16))) | |
3136 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3137 | (set (mem:SI (plus:SI (match_dup 9) (const_int -20))) | |
3138 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3139 | (set (mem:SI (plus:SI (match_dup 9) (const_int -24))) | |
3140 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3141 | (set (mem:SI (plus:SI (match_dup 9) (const_int -28))) | |
3142 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3143 | (set (mem:SI (plus:SI (match_dup 9) (const_int -32))) | |
3144 | (match_operand:SI 8 "nios2_hard_register_operand" ""))])] | |
3145 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
3146 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback" | |
3147 | [(set_attr "type" "stwm")]) | |
3148 | ||
3149 | (define_insn "*cdx_stwm8_dec" | |
3150 | [(match_parallel 0 "stwm_operation" | |
3151 | [(set (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4))) | |
3152 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3153 | (set (mem:SI (plus:SI (match_dup 9) (const_int -8))) | |
3154 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3155 | (set (mem:SI (plus:SI (match_dup 9) (const_int -12))) | |
3156 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3157 | (set (mem:SI (plus:SI (match_dup 9) (const_int -16))) | |
3158 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3159 | (set (mem:SI (plus:SI (match_dup 9) (const_int -20))) | |
3160 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3161 | (set (mem:SI (plus:SI (match_dup 9) (const_int -24))) | |
3162 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3163 | (set (mem:SI (plus:SI (match_dup 9) (const_int -28))) | |
3164 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3165 | (set (mem:SI (plus:SI (match_dup 9) (const_int -32))) | |
3166 | (match_operand:SI 8 "nios2_hard_register_operand" ""))])] | |
3167 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" | |
3168 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9)" | |
3169 | [(set_attr "type" "stwm")]) | |
3170 | ||
3171 | (define_insn "*cdx_stwm9_inc_wb" | |
3172 | [(match_parallel 0 "stwm_operation" | |
3173 | [(set (match_operand:SI 10 "register_operand" "+&r") | |
3174 | (plus:SI (match_dup 10) (const_int 36))) | |
3175 | (set (mem:SI (match_dup 10)) | |
3176 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3177 | (set (mem:SI (plus:SI (match_dup 10) (const_int 4))) | |
3178 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3179 | (set (mem:SI (plus:SI (match_dup 10) (const_int 8))) | |
3180 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3181 | (set (mem:SI (plus:SI (match_dup 10) (const_int 12))) | |
3182 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3183 | (set (mem:SI (plus:SI (match_dup 10) (const_int 16))) | |
3184 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3185 | (set (mem:SI (plus:SI (match_dup 10) (const_int 20))) | |
3186 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3187 | (set (mem:SI (plus:SI (match_dup 10) (const_int 24))) | |
3188 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3189 | (set (mem:SI (plus:SI (match_dup 10) (const_int 28))) | |
3190 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3191 | (set (mem:SI (plus:SI (match_dup 10) (const_int 32))) | |
3192 | (match_operand:SI 9 "nios2_hard_register_operand" ""))])] | |
3193 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
3194 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback" | |
3195 | [(set_attr "type" "stwm")]) | |
3196 | ||
3197 | (define_insn "*cdx_stwm9_inc" | |
3198 | [(match_parallel 0 "stwm_operation" | |
3199 | [(set (mem:SI (match_operand:SI 10 "register_operand" "r")) | |
3200 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3201 | (set (mem:SI (plus:SI (match_dup 10) (const_int 4))) | |
3202 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3203 | (set (mem:SI (plus:SI (match_dup 10) (const_int 8))) | |
3204 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3205 | (set (mem:SI (plus:SI (match_dup 10) (const_int 12))) | |
3206 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3207 | (set (mem:SI (plus:SI (match_dup 10) (const_int 16))) | |
3208 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3209 | (set (mem:SI (plus:SI (match_dup 10) (const_int 20))) | |
3210 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3211 | (set (mem:SI (plus:SI (match_dup 10) (const_int 24))) | |
3212 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3213 | (set (mem:SI (plus:SI (match_dup 10) (const_int 28))) | |
3214 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3215 | (set (mem:SI (plus:SI (match_dup 10) (const_int 32))) | |
3216 | (match_operand:SI 9 "nios2_hard_register_operand" ""))])] | |
3217 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
3218 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++" | |
3219 | [(set_attr "type" "stwm")]) | |
3220 | ||
3221 | (define_insn "*cdx_stwm9_dec_wb" | |
3222 | [(match_parallel 0 "stwm_operation" | |
3223 | [(set (match_operand:SI 10 "register_operand" "+&r") | |
3224 | (plus:SI (match_dup 10) (const_int -36))) | |
3225 | (set (mem:SI (plus:SI (match_dup 10) (const_int -4))) | |
3226 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3227 | (set (mem:SI (plus:SI (match_dup 10) (const_int -8))) | |
3228 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3229 | (set (mem:SI (plus:SI (match_dup 10) (const_int -12))) | |
3230 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3231 | (set (mem:SI (plus:SI (match_dup 10) (const_int -16))) | |
3232 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3233 | (set (mem:SI (plus:SI (match_dup 10) (const_int -20))) | |
3234 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3235 | (set (mem:SI (plus:SI (match_dup 10) (const_int -24))) | |
3236 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3237 | (set (mem:SI (plus:SI (match_dup 10) (const_int -28))) | |
3238 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3239 | (set (mem:SI (plus:SI (match_dup 10) (const_int -32))) | |
3240 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3241 | (set (mem:SI (plus:SI (match_dup 10) (const_int -36))) | |
3242 | (match_operand:SI 9 "nios2_hard_register_operand" ""))])] | |
3243 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
3244 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback" | |
3245 | [(set_attr "type" "stwm")]) | |
3246 | ||
3247 | (define_insn "*cdx_stwm9_dec" | |
3248 | [(match_parallel 0 "stwm_operation" | |
3249 | [(set (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4))) | |
3250 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3251 | (set (mem:SI (plus:SI (match_dup 10) (const_int -8))) | |
3252 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3253 | (set (mem:SI (plus:SI (match_dup 10) (const_int -12))) | |
3254 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3255 | (set (mem:SI (plus:SI (match_dup 10) (const_int -16))) | |
3256 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3257 | (set (mem:SI (plus:SI (match_dup 10) (const_int -20))) | |
3258 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3259 | (set (mem:SI (plus:SI (match_dup 10) (const_int -24))) | |
3260 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3261 | (set (mem:SI (plus:SI (match_dup 10) (const_int -28))) | |
3262 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3263 | (set (mem:SI (plus:SI (match_dup 10) (const_int -32))) | |
3264 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3265 | (set (mem:SI (plus:SI (match_dup 10) (const_int -36))) | |
3266 | (match_operand:SI 9 "nios2_hard_register_operand" ""))])] | |
3267 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" | |
3268 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10)" | |
3269 | [(set_attr "type" "stwm")]) | |
3270 | ||
3271 | (define_insn "*cdx_stwm10_inc_wb" | |
3272 | [(match_parallel 0 "stwm_operation" | |
3273 | [(set (match_operand:SI 11 "register_operand" "+&r") | |
3274 | (plus:SI (match_dup 11) (const_int 40))) | |
3275 | (set (mem:SI (match_dup 11)) | |
3276 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3277 | (set (mem:SI (plus:SI (match_dup 11) (const_int 4))) | |
3278 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3279 | (set (mem:SI (plus:SI (match_dup 11) (const_int 8))) | |
3280 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3281 | (set (mem:SI (plus:SI (match_dup 11) (const_int 12))) | |
3282 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3283 | (set (mem:SI (plus:SI (match_dup 11) (const_int 16))) | |
3284 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3285 | (set (mem:SI (plus:SI (match_dup 11) (const_int 20))) | |
3286 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3287 | (set (mem:SI (plus:SI (match_dup 11) (const_int 24))) | |
3288 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3289 | (set (mem:SI (plus:SI (match_dup 11) (const_int 28))) | |
3290 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3291 | (set (mem:SI (plus:SI (match_dup 11) (const_int 32))) | |
3292 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3293 | (set (mem:SI (plus:SI (match_dup 11) (const_int 36))) | |
3294 | (match_operand:SI 10 "nios2_hard_register_operand" ""))])] | |
3295 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
3296 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback" | |
3297 | [(set_attr "type" "stwm")]) | |
3298 | ||
3299 | (define_insn "*cdx_stwm10_inc" | |
3300 | [(match_parallel 0 "stwm_operation" | |
3301 | [(set (mem:SI (match_operand:SI 11 "register_operand" "r")) | |
3302 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3303 | (set (mem:SI (plus:SI (match_dup 11) (const_int 4))) | |
3304 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3305 | (set (mem:SI (plus:SI (match_dup 11) (const_int 8))) | |
3306 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3307 | (set (mem:SI (plus:SI (match_dup 11) (const_int 12))) | |
3308 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3309 | (set (mem:SI (plus:SI (match_dup 11) (const_int 16))) | |
3310 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3311 | (set (mem:SI (plus:SI (match_dup 11) (const_int 20))) | |
3312 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3313 | (set (mem:SI (plus:SI (match_dup 11) (const_int 24))) | |
3314 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3315 | (set (mem:SI (plus:SI (match_dup 11) (const_int 28))) | |
3316 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3317 | (set (mem:SI (plus:SI (match_dup 11) (const_int 32))) | |
3318 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3319 | (set (mem:SI (plus:SI (match_dup 11) (const_int 36))) | |
3320 | (match_operand:SI 10 "nios2_hard_register_operand" ""))])] | |
3321 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
3322 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++" | |
3323 | [(set_attr "type" "stwm")]) | |
3324 | ||
3325 | (define_insn "*cdx_stwm10_dec_wb" | |
3326 | [(match_parallel 0 "stwm_operation" | |
3327 | [(set (match_operand:SI 11 "register_operand" "+&r") | |
3328 | (plus:SI (match_dup 11) (const_int -40))) | |
3329 | (set (mem:SI (plus:SI (match_dup 11) (const_int -4))) | |
3330 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3331 | (set (mem:SI (plus:SI (match_dup 11) (const_int -8))) | |
3332 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3333 | (set (mem:SI (plus:SI (match_dup 11) (const_int -12))) | |
3334 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3335 | (set (mem:SI (plus:SI (match_dup 11) (const_int -16))) | |
3336 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3337 | (set (mem:SI (plus:SI (match_dup 11) (const_int -20))) | |
3338 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3339 | (set (mem:SI (plus:SI (match_dup 11) (const_int -24))) | |
3340 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3341 | (set (mem:SI (plus:SI (match_dup 11) (const_int -28))) | |
3342 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3343 | (set (mem:SI (plus:SI (match_dup 11) (const_int -32))) | |
3344 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3345 | (set (mem:SI (plus:SI (match_dup 11) (const_int -36))) | |
3346 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3347 | (set (mem:SI (plus:SI (match_dup 11) (const_int -40))) | |
3348 | (match_operand:SI 10 "nios2_hard_register_operand" ""))])] | |
3349 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
3350 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback" | |
3351 | [(set_attr "type" "stwm")]) | |
3352 | ||
3353 | (define_insn "*cdx_stwm10_dec" | |
3354 | [(match_parallel 0 "stwm_operation" | |
3355 | [(set (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4))) | |
3356 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3357 | (set (mem:SI (plus:SI (match_dup 11) (const_int -8))) | |
3358 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3359 | (set (mem:SI (plus:SI (match_dup 11) (const_int -12))) | |
3360 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3361 | (set (mem:SI (plus:SI (match_dup 11) (const_int -16))) | |
3362 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3363 | (set (mem:SI (plus:SI (match_dup 11) (const_int -20))) | |
3364 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3365 | (set (mem:SI (plus:SI (match_dup 11) (const_int -24))) | |
3366 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3367 | (set (mem:SI (plus:SI (match_dup 11) (const_int -28))) | |
3368 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3369 | (set (mem:SI (plus:SI (match_dup 11) (const_int -32))) | |
3370 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3371 | (set (mem:SI (plus:SI (match_dup 11) (const_int -36))) | |
3372 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3373 | (set (mem:SI (plus:SI (match_dup 11) (const_int -40))) | |
3374 | (match_operand:SI 10 "nios2_hard_register_operand" ""))])] | |
3375 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" | |
3376 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11)" | |
3377 | [(set_attr "type" "stwm")]) | |
3378 | ||
3379 | (define_insn "*cdx_stwm11_inc_wb" | |
3380 | [(match_parallel 0 "stwm_operation" | |
3381 | [(set (match_operand:SI 12 "register_operand" "+&r") | |
3382 | (plus:SI (match_dup 12) (const_int 44))) | |
3383 | (set (mem:SI (match_dup 12)) | |
3384 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3385 | (set (mem:SI (plus:SI (match_dup 12) (const_int 4))) | |
3386 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3387 | (set (mem:SI (plus:SI (match_dup 12) (const_int 8))) | |
3388 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3389 | (set (mem:SI (plus:SI (match_dup 12) (const_int 12))) | |
3390 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3391 | (set (mem:SI (plus:SI (match_dup 12) (const_int 16))) | |
3392 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3393 | (set (mem:SI (plus:SI (match_dup 12) (const_int 20))) | |
3394 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3395 | (set (mem:SI (plus:SI (match_dup 12) (const_int 24))) | |
3396 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3397 | (set (mem:SI (plus:SI (match_dup 12) (const_int 28))) | |
3398 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3399 | (set (mem:SI (plus:SI (match_dup 12) (const_int 32))) | |
3400 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3401 | (set (mem:SI (plus:SI (match_dup 12) (const_int 36))) | |
3402 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3403 | (set (mem:SI (plus:SI (match_dup 12) (const_int 40))) | |
3404 | (match_operand:SI 11 "nios2_hard_register_operand" ""))])] | |
3405 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
3406 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback" | |
3407 | [(set_attr "type" "stwm")]) | |
3408 | ||
3409 | (define_insn "*cdx_stwm11_inc" | |
3410 | [(match_parallel 0 "stwm_operation" | |
3411 | [(set (mem:SI (match_operand:SI 12 "register_operand" "r")) | |
3412 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3413 | (set (mem:SI (plus:SI (match_dup 12) (const_int 4))) | |
3414 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3415 | (set (mem:SI (plus:SI (match_dup 12) (const_int 8))) | |
3416 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3417 | (set (mem:SI (plus:SI (match_dup 12) (const_int 12))) | |
3418 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3419 | (set (mem:SI (plus:SI (match_dup 12) (const_int 16))) | |
3420 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3421 | (set (mem:SI (plus:SI (match_dup 12) (const_int 20))) | |
3422 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3423 | (set (mem:SI (plus:SI (match_dup 12) (const_int 24))) | |
3424 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3425 | (set (mem:SI (plus:SI (match_dup 12) (const_int 28))) | |
3426 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3427 | (set (mem:SI (plus:SI (match_dup 12) (const_int 32))) | |
3428 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3429 | (set (mem:SI (plus:SI (match_dup 12) (const_int 36))) | |
3430 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3431 | (set (mem:SI (plus:SI (match_dup 12) (const_int 40))) | |
3432 | (match_operand:SI 11 "nios2_hard_register_operand" ""))])] | |
3433 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
3434 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++" | |
3435 | [(set_attr "type" "stwm")]) | |
3436 | ||
3437 | (define_insn "*cdx_stwm11_dec_wb" | |
3438 | [(match_parallel 0 "stwm_operation" | |
3439 | [(set (match_operand:SI 12 "register_operand" "+&r") | |
3440 | (plus:SI (match_dup 12) (const_int -44))) | |
3441 | (set (mem:SI (plus:SI (match_dup 12) (const_int -4))) | |
3442 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3443 | (set (mem:SI (plus:SI (match_dup 12) (const_int -8))) | |
3444 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3445 | (set (mem:SI (plus:SI (match_dup 12) (const_int -12))) | |
3446 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3447 | (set (mem:SI (plus:SI (match_dup 12) (const_int -16))) | |
3448 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3449 | (set (mem:SI (plus:SI (match_dup 12) (const_int -20))) | |
3450 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3451 | (set (mem:SI (plus:SI (match_dup 12) (const_int -24))) | |
3452 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3453 | (set (mem:SI (plus:SI (match_dup 12) (const_int -28))) | |
3454 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3455 | (set (mem:SI (plus:SI (match_dup 12) (const_int -32))) | |
3456 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3457 | (set (mem:SI (plus:SI (match_dup 12) (const_int -36))) | |
3458 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3459 | (set (mem:SI (plus:SI (match_dup 12) (const_int -40))) | |
3460 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3461 | (set (mem:SI (plus:SI (match_dup 12) (const_int -44))) | |
3462 | (match_operand:SI 11 "nios2_hard_register_operand" ""))])] | |
3463 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
3464 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback" | |
3465 | [(set_attr "type" "stwm")]) | |
3466 | ||
3467 | (define_insn "*cdx_stwm11_dec" | |
3468 | [(match_parallel 0 "stwm_operation" | |
3469 | [(set (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4))) | |
3470 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3471 | (set (mem:SI (plus:SI (match_dup 12) (const_int -8))) | |
3472 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3473 | (set (mem:SI (plus:SI (match_dup 12) (const_int -12))) | |
3474 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3475 | (set (mem:SI (plus:SI (match_dup 12) (const_int -16))) | |
3476 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3477 | (set (mem:SI (plus:SI (match_dup 12) (const_int -20))) | |
3478 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3479 | (set (mem:SI (plus:SI (match_dup 12) (const_int -24))) | |
3480 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3481 | (set (mem:SI (plus:SI (match_dup 12) (const_int -28))) | |
3482 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3483 | (set (mem:SI (plus:SI (match_dup 12) (const_int -32))) | |
3484 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3485 | (set (mem:SI (plus:SI (match_dup 12) (const_int -36))) | |
3486 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3487 | (set (mem:SI (plus:SI (match_dup 12) (const_int -40))) | |
3488 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3489 | (set (mem:SI (plus:SI (match_dup 12) (const_int -44))) | |
3490 | (match_operand:SI 11 "nios2_hard_register_operand" ""))])] | |
3491 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" | |
3492 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12)" | |
3493 | [(set_attr "type" "stwm")]) | |
3494 | ||
3495 | (define_insn "*cdx_stwm12_inc_wb" | |
3496 | [(match_parallel 0 "stwm_operation" | |
3497 | [(set (match_operand:SI 13 "register_operand" "+&r") | |
3498 | (plus:SI (match_dup 13) (const_int 48))) | |
3499 | (set (mem:SI (match_dup 13)) | |
3500 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3501 | (set (mem:SI (plus:SI (match_dup 13) (const_int 4))) | |
3502 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3503 | (set (mem:SI (plus:SI (match_dup 13) (const_int 8))) | |
3504 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3505 | (set (mem:SI (plus:SI (match_dup 13) (const_int 12))) | |
3506 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3507 | (set (mem:SI (plus:SI (match_dup 13) (const_int 16))) | |
3508 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3509 | (set (mem:SI (plus:SI (match_dup 13) (const_int 20))) | |
3510 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3511 | (set (mem:SI (plus:SI (match_dup 13) (const_int 24))) | |
3512 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3513 | (set (mem:SI (plus:SI (match_dup 13) (const_int 28))) | |
3514 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3515 | (set (mem:SI (plus:SI (match_dup 13) (const_int 32))) | |
3516 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3517 | (set (mem:SI (plus:SI (match_dup 13) (const_int 36))) | |
3518 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3519 | (set (mem:SI (plus:SI (match_dup 13) (const_int 40))) | |
3520 | (match_operand:SI 11 "nios2_hard_register_operand" "")) | |
3521 | (set (mem:SI (plus:SI (match_dup 13) (const_int 44))) | |
3522 | (match_operand:SI 12 "nios2_hard_register_operand" ""))])] | |
3523 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
3524 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback" | |
3525 | [(set_attr "type" "stwm")]) | |
3526 | ||
3527 | (define_insn "*cdx_stwm12_inc" | |
3528 | [(match_parallel 0 "stwm_operation" | |
3529 | [(set (mem:SI (match_operand:SI 13 "register_operand" "r")) | |
3530 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3531 | (set (mem:SI (plus:SI (match_dup 13) (const_int 4))) | |
3532 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3533 | (set (mem:SI (plus:SI (match_dup 13) (const_int 8))) | |
3534 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3535 | (set (mem:SI (plus:SI (match_dup 13) (const_int 12))) | |
3536 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3537 | (set (mem:SI (plus:SI (match_dup 13) (const_int 16))) | |
3538 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3539 | (set (mem:SI (plus:SI (match_dup 13) (const_int 20))) | |
3540 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3541 | (set (mem:SI (plus:SI (match_dup 13) (const_int 24))) | |
3542 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3543 | (set (mem:SI (plus:SI (match_dup 13) (const_int 28))) | |
3544 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3545 | (set (mem:SI (plus:SI (match_dup 13) (const_int 32))) | |
3546 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3547 | (set (mem:SI (plus:SI (match_dup 13) (const_int 36))) | |
3548 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3549 | (set (mem:SI (plus:SI (match_dup 13) (const_int 40))) | |
3550 | (match_operand:SI 11 "nios2_hard_register_operand" "")) | |
3551 | (set (mem:SI (plus:SI (match_dup 13) (const_int 44))) | |
3552 | (match_operand:SI 12 "nios2_hard_register_operand" ""))])] | |
3553 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
3554 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++" | |
3555 | [(set_attr "type" "stwm")]) | |
3556 | ||
3557 | (define_insn "*cdx_stwm12_dec_wb" | |
3558 | [(match_parallel 0 "stwm_operation" | |
3559 | [(set (match_operand:SI 13 "register_operand" "+&r") | |
3560 | (plus:SI (match_dup 13) (const_int -48))) | |
3561 | (set (mem:SI (plus:SI (match_dup 13) (const_int -4))) | |
3562 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3563 | (set (mem:SI (plus:SI (match_dup 13) (const_int -8))) | |
3564 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3565 | (set (mem:SI (plus:SI (match_dup 13) (const_int -12))) | |
3566 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3567 | (set (mem:SI (plus:SI (match_dup 13) (const_int -16))) | |
3568 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3569 | (set (mem:SI (plus:SI (match_dup 13) (const_int -20))) | |
3570 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3571 | (set (mem:SI (plus:SI (match_dup 13) (const_int -24))) | |
3572 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3573 | (set (mem:SI (plus:SI (match_dup 13) (const_int -28))) | |
3574 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3575 | (set (mem:SI (plus:SI (match_dup 13) (const_int -32))) | |
3576 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3577 | (set (mem:SI (plus:SI (match_dup 13) (const_int -36))) | |
3578 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3579 | (set (mem:SI (plus:SI (match_dup 13) (const_int -40))) | |
3580 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3581 | (set (mem:SI (plus:SI (match_dup 13) (const_int -44))) | |
3582 | (match_operand:SI 11 "nios2_hard_register_operand" "")) | |
3583 | (set (mem:SI (plus:SI (match_dup 13) (const_int -48))) | |
3584 | (match_operand:SI 12 "nios2_hard_register_operand" ""))])] | |
3585 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" | |
3586 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback" | |
3587 | [(set_attr "type" "stwm")]) | |
3588 | ||
3589 | (define_insn "*cdx_stwm12_dec" | |
3590 | [(match_parallel 0 "stwm_operation" | |
3591 | [(set (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4))) | |
3592 | (match_operand:SI 1 "nios2_hard_register_operand" "")) | |
3593 | (set (mem:SI (plus:SI (match_dup 13) (const_int -8))) | |
3594 | (match_operand:SI 2 "nios2_hard_register_operand" "")) | |
3595 | (set (mem:SI (plus:SI (match_dup 13) (const_int -12))) | |
3596 | (match_operand:SI 3 "nios2_hard_register_operand" "")) | |
3597 | (set (mem:SI (plus:SI (match_dup 13) (const_int -16))) | |
3598 | (match_operand:SI 4 "nios2_hard_register_operand" "")) | |
3599 | (set (mem:SI (plus:SI (match_dup 13) (const_int -20))) | |
3600 | (match_operand:SI 5 "nios2_hard_register_operand" "")) | |
3601 | (set (mem:SI (plus:SI (match_dup 13) (const_int -24))) | |
3602 | (match_operand:SI 6 "nios2_hard_register_operand" "")) | |
3603 | (set (mem:SI (plus:SI (match_dup 13) (const_int -28))) | |
3604 | (match_operand:SI 7 "nios2_hard_register_operand" "")) | |
3605 | (set (mem:SI (plus:SI (match_dup 13) (const_int -32))) | |
3606 | (match_operand:SI 8 "nios2_hard_register_operand" "")) | |
3607 | (set (mem:SI (plus:SI (match_dup 13) (const_int -36))) | |
3608 | (match_operand:SI 9 "nios2_hard_register_operand" "")) | |
3609 | (set (mem:SI (plus:SI (match_dup 13) (const_int -40))) | |
3610 | (match_operand:SI 10 "nios2_hard_register_operand" "")) | |
3611 | (set (mem:SI (plus:SI (match_dup 13) (const_int -44))) | |
3612 | (match_operand:SI 11 "nios2_hard_register_operand" "")) | |
3613 | (set (mem:SI (plus:SI (match_dup 13) (const_int -48))) | |
3614 | (match_operand:SI 12 "nios2_hard_register_operand" ""))])] | |
3615 | "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" | |
3616 | "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13)" | |
3617 | [(set_attr "type" "stwm")]) | |
3618 | ||
3619 | (define_peephole2 | |
3620 | [(match_scratch:SI 24 "r") | |
3621 | (set (match_operand:SI 0 "register_operand" "") | |
3622 | (match_operand:SI 12 "memory_operand" "")) | |
3623 | (set (match_operand:SI 1 "register_operand" "") | |
3624 | (match_operand:SI 13 "memory_operand" "")) | |
3625 | (set (match_operand:SI 2 "register_operand" "") | |
3626 | (match_operand:SI 14 "memory_operand" "")) | |
3627 | (set (match_operand:SI 3 "register_operand" "") | |
3628 | (match_operand:SI 15 "memory_operand" "")) | |
3629 | (set (match_operand:SI 4 "register_operand" "") | |
3630 | (match_operand:SI 16 "memory_operand" "")) | |
3631 | (set (match_operand:SI 5 "register_operand" "") | |
3632 | (match_operand:SI 17 "memory_operand" "")) | |
3633 | (set (match_operand:SI 6 "register_operand" "") | |
3634 | (match_operand:SI 18 "memory_operand" "")) | |
3635 | (set (match_operand:SI 7 "register_operand" "") | |
3636 | (match_operand:SI 19 "memory_operand" "")) | |
3637 | (set (match_operand:SI 8 "register_operand" "") | |
3638 | (match_operand:SI 20 "memory_operand" "")) | |
3639 | (set (match_operand:SI 9 "register_operand" "") | |
3640 | (match_operand:SI 21 "memory_operand" "")) | |
3641 | (set (match_operand:SI 10 "register_operand" "") | |
3642 | (match_operand:SI 22 "memory_operand" "")) | |
3643 | (set (match_operand:SI 11 "register_operand" "") | |
3644 | (match_operand:SI 23 "memory_operand" "")) | |
3645 | (match_dup 24)] | |
3646 | "TARGET_HAS_CDX" | |
3647 | [(const_int 0)] | |
3648 | { | |
3649 | if (gen_ldstwm_peep (true, 12, operands[24], operands)) | |
3650 | DONE; | |
3651 | else | |
3652 | FAIL; | |
3653 | }) | |
3654 | ||
3655 | (define_peephole2 | |
3656 | [(match_scratch:SI 22 "r") | |
3657 | (set (match_operand:SI 0 "register_operand" "") | |
3658 | (match_operand:SI 11 "memory_operand" "")) | |
3659 | (set (match_operand:SI 1 "register_operand" "") | |
3660 | (match_operand:SI 12 "memory_operand" "")) | |
3661 | (set (match_operand:SI 2 "register_operand" "") | |
3662 | (match_operand:SI 13 "memory_operand" "")) | |
3663 | (set (match_operand:SI 3 "register_operand" "") | |
3664 | (match_operand:SI 14 "memory_operand" "")) | |
3665 | (set (match_operand:SI 4 "register_operand" "") | |
3666 | (match_operand:SI 15 "memory_operand" "")) | |
3667 | (set (match_operand:SI 5 "register_operand" "") | |
3668 | (match_operand:SI 16 "memory_operand" "")) | |
3669 | (set (match_operand:SI 6 "register_operand" "") | |
3670 | (match_operand:SI 17 "memory_operand" "")) | |
3671 | (set (match_operand:SI 7 "register_operand" "") | |
3672 | (match_operand:SI 18 "memory_operand" "")) | |
3673 | (set (match_operand:SI 8 "register_operand" "") | |
3674 | (match_operand:SI 19 "memory_operand" "")) | |
3675 | (set (match_operand:SI 9 "register_operand" "") | |
3676 | (match_operand:SI 20 "memory_operand" "")) | |
3677 | (set (match_operand:SI 10 "register_operand" "") | |
3678 | (match_operand:SI 21 "memory_operand" "")) | |
3679 | (match_dup 22)] | |
3680 | "TARGET_HAS_CDX" | |
3681 | [(const_int 0)] | |
3682 | { | |
3683 | if (gen_ldstwm_peep (true, 11, operands[22], operands)) | |
3684 | DONE; | |
3685 | else | |
3686 | FAIL; | |
3687 | }) | |
3688 | ||
3689 | (define_peephole2 | |
3690 | [(match_scratch:SI 20 "r") | |
3691 | (set (match_operand:SI 0 "register_operand" "") | |
3692 | (match_operand:SI 10 "memory_operand" "")) | |
3693 | (set (match_operand:SI 1 "register_operand" "") | |
3694 | (match_operand:SI 11 "memory_operand" "")) | |
3695 | (set (match_operand:SI 2 "register_operand" "") | |
3696 | (match_operand:SI 12 "memory_operand" "")) | |
3697 | (set (match_operand:SI 3 "register_operand" "") | |
3698 | (match_operand:SI 13 "memory_operand" "")) | |
3699 | (set (match_operand:SI 4 "register_operand" "") | |
3700 | (match_operand:SI 14 "memory_operand" "")) | |
3701 | (set (match_operand:SI 5 "register_operand" "") | |
3702 | (match_operand:SI 15 "memory_operand" "")) | |
3703 | (set (match_operand:SI 6 "register_operand" "") | |
3704 | (match_operand:SI 16 "memory_operand" "")) | |
3705 | (set (match_operand:SI 7 "register_operand" "") | |
3706 | (match_operand:SI 17 "memory_operand" "")) | |
3707 | (set (match_operand:SI 8 "register_operand" "") | |
3708 | (match_operand:SI 18 "memory_operand" "")) | |
3709 | (set (match_operand:SI 9 "register_operand" "") | |
3710 | (match_operand:SI 19 "memory_operand" "")) | |
3711 | (match_dup 20)] | |
3712 | "TARGET_HAS_CDX" | |
3713 | [(const_int 0)] | |
3714 | { | |
3715 | if (gen_ldstwm_peep (true, 10, operands[20], operands)) | |
3716 | DONE; | |
3717 | else | |
3718 | FAIL; | |
3719 | }) | |
3720 | ||
3721 | (define_peephole2 | |
3722 | [(match_scratch:SI 18 "r") | |
3723 | (set (match_operand:SI 0 "register_operand" "") | |
3724 | (match_operand:SI 9 "memory_operand" "")) | |
3725 | (set (match_operand:SI 1 "register_operand" "") | |
3726 | (match_operand:SI 10 "memory_operand" "")) | |
3727 | (set (match_operand:SI 2 "register_operand" "") | |
3728 | (match_operand:SI 11 "memory_operand" "")) | |
3729 | (set (match_operand:SI 3 "register_operand" "") | |
3730 | (match_operand:SI 12 "memory_operand" "")) | |
3731 | (set (match_operand:SI 4 "register_operand" "") | |
3732 | (match_operand:SI 13 "memory_operand" "")) | |
3733 | (set (match_operand:SI 5 "register_operand" "") | |
3734 | (match_operand:SI 14 "memory_operand" "")) | |
3735 | (set (match_operand:SI 6 "register_operand" "") | |
3736 | (match_operand:SI 15 "memory_operand" "")) | |
3737 | (set (match_operand:SI 7 "register_operand" "") | |
3738 | (match_operand:SI 16 "memory_operand" "")) | |
3739 | (set (match_operand:SI 8 "register_operand" "") | |
3740 | (match_operand:SI 17 "memory_operand" "")) | |
3741 | (match_dup 18)] | |
3742 | "TARGET_HAS_CDX" | |
3743 | [(const_int 0)] | |
3744 | { | |
3745 | if (gen_ldstwm_peep (true, 9, operands[18], operands)) | |
3746 | DONE; | |
3747 | else | |
3748 | FAIL; | |
3749 | }) | |
3750 | ||
3751 | (define_peephole2 | |
3752 | [(match_scratch:SI 16 "r") | |
3753 | (set (match_operand:SI 0 "register_operand" "") | |
3754 | (match_operand:SI 8 "memory_operand" "")) | |
3755 | (set (match_operand:SI 1 "register_operand" "") | |
3756 | (match_operand:SI 9 "memory_operand" "")) | |
3757 | (set (match_operand:SI 2 "register_operand" "") | |
3758 | (match_operand:SI 10 "memory_operand" "")) | |
3759 | (set (match_operand:SI 3 "register_operand" "") | |
3760 | (match_operand:SI 11 "memory_operand" "")) | |
3761 | (set (match_operand:SI 4 "register_operand" "") | |
3762 | (match_operand:SI 12 "memory_operand" "")) | |
3763 | (set (match_operand:SI 5 "register_operand" "") | |
3764 | (match_operand:SI 13 "memory_operand" "")) | |
3765 | (set (match_operand:SI 6 "register_operand" "") | |
3766 | (match_operand:SI 14 "memory_operand" "")) | |
3767 | (set (match_operand:SI 7 "register_operand" "") | |
3768 | (match_operand:SI 15 "memory_operand" "")) | |
3769 | (match_dup 16)] | |
3770 | "TARGET_HAS_CDX" | |
3771 | [(const_int 0)] | |
3772 | { | |
3773 | if (gen_ldstwm_peep (true, 8, operands[16], operands)) | |
3774 | DONE; | |
3775 | else | |
3776 | FAIL; | |
3777 | }) | |
3778 | ||
3779 | (define_peephole2 | |
3780 | [(match_scratch:SI 14 "r") | |
3781 | (set (match_operand:SI 0 "register_operand" "") | |
3782 | (match_operand:SI 7 "memory_operand" "")) | |
3783 | (set (match_operand:SI 1 "register_operand" "") | |
3784 | (match_operand:SI 8 "memory_operand" "")) | |
3785 | (set (match_operand:SI 2 "register_operand" "") | |
3786 | (match_operand:SI 9 "memory_operand" "")) | |
3787 | (set (match_operand:SI 3 "register_operand" "") | |
3788 | (match_operand:SI 10 "memory_operand" "")) | |
3789 | (set (match_operand:SI 4 "register_operand" "") | |
3790 | (match_operand:SI 11 "memory_operand" "")) | |
3791 | (set (match_operand:SI 5 "register_operand" "") | |
3792 | (match_operand:SI 12 "memory_operand" "")) | |
3793 | (set (match_operand:SI 6 "register_operand" "") | |
3794 | (match_operand:SI 13 "memory_operand" "")) | |
3795 | (match_dup 14)] | |
3796 | "TARGET_HAS_CDX" | |
3797 | [(const_int 0)] | |
3798 | { | |
3799 | if (gen_ldstwm_peep (true, 7, operands[14], operands)) | |
3800 | DONE; | |
3801 | else | |
3802 | FAIL; | |
3803 | }) | |
3804 | ||
3805 | (define_peephole2 | |
3806 | [(match_scratch:SI 12 "r") | |
3807 | (set (match_operand:SI 0 "register_operand" "") | |
3808 | (match_operand:SI 6 "memory_operand" "")) | |
3809 | (set (match_operand:SI 1 "register_operand" "") | |
3810 | (match_operand:SI 7 "memory_operand" "")) | |
3811 | (set (match_operand:SI 2 "register_operand" "") | |
3812 | (match_operand:SI 8 "memory_operand" "")) | |
3813 | (set (match_operand:SI 3 "register_operand" "") | |
3814 | (match_operand:SI 9 "memory_operand" "")) | |
3815 | (set (match_operand:SI 4 "register_operand" "") | |
3816 | (match_operand:SI 10 "memory_operand" "")) | |
3817 | (set (match_operand:SI 5 "register_operand" "") | |
3818 | (match_operand:SI 11 "memory_operand" "")) | |
3819 | (match_dup 12)] | |
3820 | "TARGET_HAS_CDX" | |
3821 | [(const_int 0)] | |
3822 | { | |
3823 | if (gen_ldstwm_peep (true, 6, operands[12], operands)) | |
3824 | DONE; | |
3825 | else | |
3826 | FAIL; | |
3827 | }) | |
3828 | ||
3829 | (define_peephole2 | |
3830 | [(match_scratch:SI 10 "r") | |
3831 | (set (match_operand:SI 0 "register_operand" "") | |
3832 | (match_operand:SI 5 "memory_operand" "")) | |
3833 | (set (match_operand:SI 1 "register_operand" "") | |
3834 | (match_operand:SI 6 "memory_operand" "")) | |
3835 | (set (match_operand:SI 2 "register_operand" "") | |
3836 | (match_operand:SI 7 "memory_operand" "")) | |
3837 | (set (match_operand:SI 3 "register_operand" "") | |
3838 | (match_operand:SI 8 "memory_operand" "")) | |
3839 | (set (match_operand:SI 4 "register_operand" "") | |
3840 | (match_operand:SI 9 "memory_operand" "")) | |
3841 | (match_dup 10)] | |
3842 | "TARGET_HAS_CDX" | |
3843 | [(const_int 0)] | |
3844 | { | |
3845 | if (gen_ldstwm_peep (true, 5, operands[10], operands)) | |
3846 | DONE; | |
3847 | else | |
3848 | FAIL; | |
3849 | }) | |
3850 | ||
3851 | (define_peephole2 | |
3852 | [(match_scratch:SI 8 "r") | |
3853 | (set (match_operand:SI 0 "register_operand" "") | |
3854 | (match_operand:SI 4 "memory_operand" "")) | |
3855 | (set (match_operand:SI 1 "register_operand" "") | |
3856 | (match_operand:SI 5 "memory_operand" "")) | |
3857 | (set (match_operand:SI 2 "register_operand" "") | |
3858 | (match_operand:SI 6 "memory_operand" "")) | |
3859 | (set (match_operand:SI 3 "register_operand" "") | |
3860 | (match_operand:SI 7 "memory_operand" "")) | |
3861 | (match_dup 8)] | |
3862 | "TARGET_HAS_CDX" | |
3863 | [(const_int 0)] | |
3864 | { | |
3865 | if (gen_ldstwm_peep (true, 4, operands[8], operands)) | |
3866 | DONE; | |
3867 | else | |
3868 | FAIL; | |
3869 | }) | |
3870 | ||
3871 | (define_peephole2 | |
3872 | [(match_scratch:SI 6 "r") | |
3873 | (set (match_operand:SI 0 "register_operand" "") | |
3874 | (match_operand:SI 3 "memory_operand" "")) | |
3875 | (set (match_operand:SI 1 "register_operand" "") | |
3876 | (match_operand:SI 4 "memory_operand" "")) | |
3877 | (set (match_operand:SI 2 "register_operand" "") | |
3878 | (match_operand:SI 5 "memory_operand" "")) | |
3879 | (match_dup 6)] | |
3880 | "TARGET_HAS_CDX" | |
3881 | [(const_int 0)] | |
3882 | { | |
3883 | if (gen_ldstwm_peep (true, 3, operands[6], operands)) | |
3884 | DONE; | |
3885 | else | |
3886 | FAIL; | |
3887 | }) | |
3888 | ||
3889 | (define_peephole2 | |
3890 | [(match_scratch:SI 4 "r") | |
3891 | (set (match_operand:SI 0 "register_operand" "") | |
3892 | (match_operand:SI 2 "memory_operand" "")) | |
3893 | (set (match_operand:SI 1 "register_operand" "") | |
3894 | (match_operand:SI 3 "memory_operand" "")) | |
3895 | (match_dup 4)] | |
3896 | "TARGET_HAS_CDX" | |
3897 | [(const_int 0)] | |
3898 | { | |
3899 | if (gen_ldstwm_peep (true, 2, operands[4], operands)) | |
3900 | DONE; | |
3901 | else | |
3902 | FAIL; | |
3903 | }) | |
3904 | ||
3905 | (define_peephole2 | |
3906 | [(match_scratch:SI 24 "r") | |
3907 | (set (match_operand:SI 12 "memory_operand" "") | |
3908 | (match_operand:SI 0 "register_operand" "")) | |
3909 | (set (match_operand:SI 13 "memory_operand" "") | |
3910 | (match_operand:SI 1 "register_operand" "")) | |
3911 | (set (match_operand:SI 14 "memory_operand" "") | |
3912 | (match_operand:SI 2 "register_operand" "")) | |
3913 | (set (match_operand:SI 15 "memory_operand" "") | |
3914 | (match_operand:SI 3 "register_operand" "")) | |
3915 | (set (match_operand:SI 16 "memory_operand" "") | |
3916 | (match_operand:SI 4 "register_operand" "")) | |
3917 | (set (match_operand:SI 17 "memory_operand" "") | |
3918 | (match_operand:SI 5 "register_operand" "")) | |
3919 | (set (match_operand:SI 18 "memory_operand" "") | |
3920 | (match_operand:SI 6 "register_operand" "")) | |
3921 | (set (match_operand:SI 19 "memory_operand" "") | |
3922 | (match_operand:SI 7 "register_operand" "")) | |
3923 | (set (match_operand:SI 20 "memory_operand" "") | |
3924 | (match_operand:SI 8 "register_operand" "")) | |
3925 | (set (match_operand:SI 21 "memory_operand" "") | |
3926 | (match_operand:SI 9 "register_operand" "")) | |
3927 | (set (match_operand:SI 22 "memory_operand" "") | |
3928 | (match_operand:SI 10 "register_operand" "")) | |
3929 | (set (match_operand:SI 23 "memory_operand" "") | |
3930 | (match_operand:SI 11 "register_operand" "")) | |
3931 | (match_dup 24)] | |
3932 | "TARGET_HAS_CDX" | |
3933 | [(const_int 0)] | |
3934 | { | |
3935 | if (gen_ldstwm_peep (false, 12, operands[24], operands)) | |
3936 | DONE; | |
3937 | else | |
3938 | FAIL; | |
3939 | }) | |
3940 | ||
3941 | (define_peephole2 | |
3942 | [(match_scratch:SI 22 "r") | |
3943 | (set (match_operand:SI 11 "memory_operand" "") | |
3944 | (match_operand:SI 0 "register_operand" "")) | |
3945 | (set (match_operand:SI 12 "memory_operand" "") | |
3946 | (match_operand:SI 1 "register_operand" "")) | |
3947 | (set (match_operand:SI 13 "memory_operand" "") | |
3948 | (match_operand:SI 2 "register_operand" "")) | |
3949 | (set (match_operand:SI 14 "memory_operand" "") | |
3950 | (match_operand:SI 3 "register_operand" "")) | |
3951 | (set (match_operand:SI 15 "memory_operand" "") | |
3952 | (match_operand:SI 4 "register_operand" "")) | |
3953 | (set (match_operand:SI 16 "memory_operand" "") | |
3954 | (match_operand:SI 5 "register_operand" "")) | |
3955 | (set (match_operand:SI 17 "memory_operand" "") | |
3956 | (match_operand:SI 6 "register_operand" "")) | |
3957 | (set (match_operand:SI 18 "memory_operand" "") | |
3958 | (match_operand:SI 7 "register_operand" "")) | |
3959 | (set (match_operand:SI 19 "memory_operand" "") | |
3960 | (match_operand:SI 8 "register_operand" "")) | |
3961 | (set (match_operand:SI 20 "memory_operand" "") | |
3962 | (match_operand:SI 9 "register_operand" "")) | |
3963 | (set (match_operand:SI 21 "memory_operand" "") | |
3964 | (match_operand:SI 10 "register_operand" "")) | |
3965 | (match_dup 22)] | |
3966 | "TARGET_HAS_CDX" | |
3967 | [(const_int 0)] | |
3968 | { | |
3969 | if (gen_ldstwm_peep (false, 11, operands[22], operands)) | |
3970 | DONE; | |
3971 | else | |
3972 | FAIL; | |
3973 | }) | |
3974 | ||
3975 | (define_peephole2 | |
3976 | [(match_scratch:SI 20 "r") | |
3977 | (set (match_operand:SI 10 "memory_operand" "") | |
3978 | (match_operand:SI 0 "register_operand" "")) | |
3979 | (set (match_operand:SI 11 "memory_operand" "") | |
3980 | (match_operand:SI 1 "register_operand" "")) | |
3981 | (set (match_operand:SI 12 "memory_operand" "") | |
3982 | (match_operand:SI 2 "register_operand" "")) | |
3983 | (set (match_operand:SI 13 "memory_operand" "") | |
3984 | (match_operand:SI 3 "register_operand" "")) | |
3985 | (set (match_operand:SI 14 "memory_operand" "") | |
3986 | (match_operand:SI 4 "register_operand" "")) | |
3987 | (set (match_operand:SI 15 "memory_operand" "") | |
3988 | (match_operand:SI 5 "register_operand" "")) | |
3989 | (set (match_operand:SI 16 "memory_operand" "") | |
3990 | (match_operand:SI 6 "register_operand" "")) | |
3991 | (set (match_operand:SI 17 "memory_operand" "") | |
3992 | (match_operand:SI 7 "register_operand" "")) | |
3993 | (set (match_operand:SI 18 "memory_operand" "") | |
3994 | (match_operand:SI 8 "register_operand" "")) | |
3995 | (set (match_operand:SI 19 "memory_operand" "") | |
3996 | (match_operand:SI 9 "register_operand" "")) | |
3997 | (match_dup 20)] | |
3998 | "TARGET_HAS_CDX" | |
3999 | [(const_int 0)] | |
4000 | { | |
4001 | if (gen_ldstwm_peep (false, 10, operands[20], operands)) | |
4002 | DONE; | |
4003 | else | |
4004 | FAIL; | |
4005 | }) | |
4006 | ||
4007 | (define_peephole2 | |
4008 | [(match_scratch:SI 18 "r") | |
4009 | (set (match_operand:SI 9 "memory_operand" "") | |
4010 | (match_operand:SI 0 "register_operand" "")) | |
4011 | (set (match_operand:SI 10 "memory_operand" "") | |
4012 | (match_operand:SI 1 "register_operand" "")) | |
4013 | (set (match_operand:SI 11 "memory_operand" "") | |
4014 | (match_operand:SI 2 "register_operand" "")) | |
4015 | (set (match_operand:SI 12 "memory_operand" "") | |
4016 | (match_operand:SI 3 "register_operand" "")) | |
4017 | (set (match_operand:SI 13 "memory_operand" "") | |
4018 | (match_operand:SI 4 "register_operand" "")) | |
4019 | (set (match_operand:SI 14 "memory_operand" "") | |
4020 | (match_operand:SI 5 "register_operand" "")) | |
4021 | (set (match_operand:SI 15 "memory_operand" "") | |
4022 | (match_operand:SI 6 "register_operand" "")) | |
4023 | (set (match_operand:SI 16 "memory_operand" "") | |
4024 | (match_operand:SI 7 "register_operand" "")) | |
4025 | (set (match_operand:SI 17 "memory_operand" "") | |
4026 | (match_operand:SI 8 "register_operand" "")) | |
4027 | (match_dup 18)] | |
4028 | "TARGET_HAS_CDX" | |
4029 | [(const_int 0)] | |
4030 | { | |
4031 | if (gen_ldstwm_peep (false, 9, operands[18], operands)) | |
4032 | DONE; | |
4033 | else | |
4034 | FAIL; | |
4035 | }) | |
4036 | ||
4037 | (define_peephole2 | |
4038 | [(match_scratch:SI 16 "r") | |
4039 | (set (match_operand:SI 8 "memory_operand" "") | |
4040 | (match_operand:SI 0 "register_operand" "")) | |
4041 | (set (match_operand:SI 9 "memory_operand" "") | |
4042 | (match_operand:SI 1 "register_operand" "")) | |
4043 | (set (match_operand:SI 10 "memory_operand" "") | |
4044 | (match_operand:SI 2 "register_operand" "")) | |
4045 | (set (match_operand:SI 11 "memory_operand" "") | |
4046 | (match_operand:SI 3 "register_operand" "")) | |
4047 | (set (match_operand:SI 12 "memory_operand" "") | |
4048 | (match_operand:SI 4 "register_operand" "")) | |
4049 | (set (match_operand:SI 13 "memory_operand" "") | |
4050 | (match_operand:SI 5 "register_operand" "")) | |
4051 | (set (match_operand:SI 14 "memory_operand" "") | |
4052 | (match_operand:SI 6 "register_operand" "")) | |
4053 | (set (match_operand:SI 15 "memory_operand" "") | |
4054 | (match_operand:SI 7 "register_operand" "")) | |
4055 | (match_dup 16)] | |
4056 | "TARGET_HAS_CDX" | |
4057 | [(const_int 0)] | |
4058 | { | |
4059 | if (gen_ldstwm_peep (false, 8, operands[16], operands)) | |
4060 | DONE; | |
4061 | else | |
4062 | FAIL; | |
4063 | }) | |
4064 | ||
4065 | (define_peephole2 | |
4066 | [(match_scratch:SI 14 "r") | |
4067 | (set (match_operand:SI 7 "memory_operand" "") | |
4068 | (match_operand:SI 0 "register_operand" "")) | |
4069 | (set (match_operand:SI 8 "memory_operand" "") | |
4070 | (match_operand:SI 1 "register_operand" "")) | |
4071 | (set (match_operand:SI 9 "memory_operand" "") | |
4072 | (match_operand:SI 2 "register_operand" "")) | |
4073 | (set (match_operand:SI 10 "memory_operand" "") | |
4074 | (match_operand:SI 3 "register_operand" "")) | |
4075 | (set (match_operand:SI 11 "memory_operand" "") | |
4076 | (match_operand:SI 4 "register_operand" "")) | |
4077 | (set (match_operand:SI 12 "memory_operand" "") | |
4078 | (match_operand:SI 5 "register_operand" "")) | |
4079 | (set (match_operand:SI 13 "memory_operand" "") | |
4080 | (match_operand:SI 6 "register_operand" "")) | |
4081 | (match_dup 14)] | |
4082 | "TARGET_HAS_CDX" | |
4083 | [(const_int 0)] | |
4084 | { | |
4085 | if (gen_ldstwm_peep (false, 7, operands[14], operands)) | |
4086 | DONE; | |
4087 | else | |
4088 | FAIL; | |
4089 | }) | |
4090 | ||
4091 | (define_peephole2 | |
4092 | [(match_scratch:SI 12 "r") | |
4093 | (set (match_operand:SI 6 "memory_operand" "") | |
4094 | (match_operand:SI 0 "register_operand" "")) | |
4095 | (set (match_operand:SI 7 "memory_operand" "") | |
4096 | (match_operand:SI 1 "register_operand" "")) | |
4097 | (set (match_operand:SI 8 "memory_operand" "") | |
4098 | (match_operand:SI 2 "register_operand" "")) | |
4099 | (set (match_operand:SI 9 "memory_operand" "") | |
4100 | (match_operand:SI 3 "register_operand" "")) | |
4101 | (set (match_operand:SI 10 "memory_operand" "") | |
4102 | (match_operand:SI 4 "register_operand" "")) | |
4103 | (set (match_operand:SI 11 "memory_operand" "") | |
4104 | (match_operand:SI 5 "register_operand" "")) | |
4105 | (match_dup 12)] | |
4106 | "TARGET_HAS_CDX" | |
4107 | [(const_int 0)] | |
4108 | { | |
4109 | if (gen_ldstwm_peep (false, 6, operands[12], operands)) | |
4110 | DONE; | |
4111 | else | |
4112 | FAIL; | |
4113 | }) | |
4114 | ||
4115 | (define_peephole2 | |
4116 | [(match_scratch:SI 10 "r") | |
4117 | (set (match_operand:SI 5 "memory_operand" "") | |
4118 | (match_operand:SI 0 "register_operand" "")) | |
4119 | (set (match_operand:SI 6 "memory_operand" "") | |
4120 | (match_operand:SI 1 "register_operand" "")) | |
4121 | (set (match_operand:SI 7 "memory_operand" "") | |
4122 | (match_operand:SI 2 "register_operand" "")) | |
4123 | (set (match_operand:SI 8 "memory_operand" "") | |
4124 | (match_operand:SI 3 "register_operand" "")) | |
4125 | (set (match_operand:SI 9 "memory_operand" "") | |
4126 | (match_operand:SI 4 "register_operand" "")) | |
4127 | (match_dup 10)] | |
4128 | "TARGET_HAS_CDX" | |
4129 | [(const_int 0)] | |
4130 | { | |
4131 | if (gen_ldstwm_peep (false, 5, operands[10], operands)) | |
4132 | DONE; | |
4133 | else | |
4134 | FAIL; | |
4135 | }) | |
4136 | ||
4137 | (define_peephole2 | |
4138 | [(match_scratch:SI 8 "r") | |
4139 | (set (match_operand:SI 4 "memory_operand" "") | |
4140 | (match_operand:SI 0 "register_operand" "")) | |
4141 | (set (match_operand:SI 5 "memory_operand" "") | |
4142 | (match_operand:SI 1 "register_operand" "")) | |
4143 | (set (match_operand:SI 6 "memory_operand" "") | |
4144 | (match_operand:SI 2 "register_operand" "")) | |
4145 | (set (match_operand:SI 7 "memory_operand" "") | |
4146 | (match_operand:SI 3 "register_operand" "")) | |
4147 | (match_dup 8)] | |
4148 | "TARGET_HAS_CDX" | |
4149 | [(const_int 0)] | |
4150 | { | |
4151 | if (gen_ldstwm_peep (false, 4, operands[8], operands)) | |
4152 | DONE; | |
4153 | else | |
4154 | FAIL; | |
4155 | }) | |
4156 | ||
4157 | (define_peephole2 | |
4158 | [(match_scratch:SI 6 "r") | |
4159 | (set (match_operand:SI 3 "memory_operand" "") | |
4160 | (match_operand:SI 0 "register_operand" "")) | |
4161 | (set (match_operand:SI 4 "memory_operand" "") | |
4162 | (match_operand:SI 1 "register_operand" "")) | |
4163 | (set (match_operand:SI 5 "memory_operand" "") | |
4164 | (match_operand:SI 2 "register_operand" "")) | |
4165 | (match_dup 6)] | |
4166 | "TARGET_HAS_CDX" | |
4167 | [(const_int 0)] | |
4168 | { | |
4169 | if (gen_ldstwm_peep (false, 3, operands[6], operands)) | |
4170 | DONE; | |
4171 | else | |
4172 | FAIL; | |
4173 | }) | |
4174 | ||
4175 | (define_peephole2 | |
4176 | [(match_scratch:SI 4 "r") | |
4177 | (set (match_operand:SI 2 "memory_operand" "") | |
4178 | (match_operand:SI 0 "register_operand" "")) | |
4179 | (set (match_operand:SI 3 "memory_operand" "") | |
4180 | (match_operand:SI 1 "register_operand" "")) | |
4181 | (match_dup 4)] | |
4182 | "TARGET_HAS_CDX" | |
4183 | [(const_int 0)] | |
4184 | { | |
4185 | if (gen_ldstwm_peep (false, 2, operands[4], operands)) | |
4186 | DONE; | |
4187 | else | |
4188 | FAIL; | |
4189 | }) | |
4190 |