]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/nios2/predicates.md
Update copyright years.
[thirdparty/gcc.git] / gcc / config / nios2 / predicates.md
CommitLineData
e430824f 1;; Predicate definitions for Altera Nios II.
a945c346 2;; Copyright (C) 2012-2024 Free Software Foundation, Inc.
e430824f
CLT
3;; Contributed by Chung-Lin Tang <cltang@codesourcery.com>
4;;
5;; This file is part of GCC.
6;;
7;; GCC is free software; you can redistribute it and/or modify
8;; it under the terms of the GNU General Public License as published by
9;; the Free Software Foundation; either version 3, or (at your option)
10;; any later version.
11;;
12;; GCC is distributed in the hope that it will be useful,
13;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15;; GNU General Public License for more details.
16;;
17;; You should have received a copy of the GNU General Public License
18;; along with GCC; see the file COPYING3. If not see
19;; <http://www.gnu.org/licenses/>.
20
21(define_predicate "const_0_operand"
22 (and (match_code "const_int,const_double,const_vector")
23 (match_test "op == CONST0_RTX (GET_MODE (op))")))
24
25(define_predicate "reg_or_0_operand"
26 (ior (match_operand 0 "const_0_operand")
27 (match_operand 0 "register_operand")))
28
29(define_predicate "const_uns_arith_operand"
30 (and (match_code "const_int")
31 (match_test "SMALL_INT_UNSIGNED (INTVAL (op))")))
32
33(define_predicate "uns_arith_operand"
34 (ior (match_operand 0 "const_uns_arith_operand")
35 (match_operand 0 "register_operand")))
36
37(define_predicate "const_arith_operand"
38 (and (match_code "const_int")
39 (match_test "SMALL_INT (INTVAL (op))")))
40
41(define_predicate "arith_operand"
42 (ior (match_operand 0 "const_arith_operand")
43 (match_operand 0 "register_operand")))
44
45(define_predicate "add_regimm_operand"
46 (ior (match_operand 0 "arith_operand")
47 (match_test "nios2_unspec_reloc_p (op)")))
48
49(define_predicate "const_logical_operand"
50 (and (match_code "const_int")
51 (match_test "(INTVAL (op) & 0xffff) == 0
52 || (INTVAL (op) & 0xffff0000) == 0")))
53
54(define_predicate "logical_operand"
55 (ior (match_operand 0 "const_logical_operand")
56 (match_operand 0 "register_operand")))
57
3bbbe009
SL
58(define_predicate "const_and_operand"
59 (and (match_code "const_int")
60 (match_test "SMALL_INT_UNSIGNED (INTVAL (op))
61 || UPPER16_INT (INTVAL (op))
62 || (TARGET_ARCH_R2 && ANDCLEAR_INT (INTVAL (op)))")))
63
64(define_predicate "and_operand"
65 (ior (match_operand 0 "const_and_operand")
66 (match_operand 0 "register_operand")))
67
e430824f
CLT
68(define_predicate "const_shift_operand"
69 (and (match_code "const_int")
70 (match_test "SHIFT_INT (INTVAL (op))")))
71
72(define_predicate "shift_operand"
73 (ior (match_operand 0 "const_shift_operand")
74 (match_operand 0 "register_operand")))
75
76(define_predicate "call_operand"
77 (ior (match_operand 0 "immediate_operand")
78 (match_operand 0 "register_operand")))
79
80(define_predicate "rdwrctl_operand"
81 (and (match_code "const_int")
82 (match_test "RDWRCTL_INT (INTVAL (op))")))
83
524d2e49
SL
84(define_predicate "rdprs_dcache_operand"
85 (and (match_code "const_int")
86 (if_then_else (match_test "TARGET_ARCH_R2")
87 (match_test "SMALL_INT12 (INTVAL (op))")
88 (match_test "SMALL_INT (INTVAL (op))"))))
89
e430824f
CLT
90(define_predicate "custom_insn_opcode"
91 (and (match_code "const_int")
92 (match_test "CUSTOM_INSN_OPCODE (INTVAL (op))")))
93
94(define_special_predicate "expandable_comparison_operator"
95 (match_operand 0 "ordered_comparison_operator")
96{
97 return (GET_MODE_CLASS (GET_MODE (XEXP (op, 0))) != MODE_FLOAT
98 || nios2_validate_fpu_compare (GET_MODE (XEXP (op, 0)), &op,
99 &XEXP (op, 0), &XEXP (op, 1),
100 false));
101})
42e6ab74 102
aa32db37
SL
103(define_special_predicate "pop_operation"
104 (match_code "parallel")
105{
106 return pop_operation_p (op);
107})
108
109(define_special_predicate "ldwm_operation"
110 (match_code "parallel")
111{
112 return ldstwm_operation_p (op, /*load_p=*/true);
113})
114
115(define_special_predicate "stwm_operation"
116 (match_code "parallel")
117{
118 return ldstwm_operation_p (op, /*load_p=*/false);
119})
120
121(define_predicate "nios2_hard_register_operand"
122 (match_code "reg")
123{
124 return GP_REG_P (REGNO (op));
125})
126
3bbbe009
SL
127(define_predicate "stack_memory_operand"
128 (match_code "mem")
129{
130 rtx addr = XEXP (op, 0);
131 return ((REG_P (addr) && REGNO (addr) == SP_REGNO)
132 || (GET_CODE (addr) == PLUS
133 && REG_P (XEXP (addr, 0)) && REGNO (XEXP (addr, 0)) == SP_REGNO
134 && CONST_INT_P (XEXP (addr, 1))));
135})
136
42e6ab74
SL
137(define_predicate "ldstio_memory_operand"
138 (match_code "mem")
139{
140 if (TARGET_ARCH_R2)
141 {
142 rtx addr = XEXP (op, 0);
143 if (REG_P (addr))
144 return true;
145 else if (GET_CODE (addr) == PLUS)
146 return (REG_P (XEXP (addr, 0))
147 && CONST_INT_P (XEXP (addr, 1))
148 && SMALL_INT12 (INTVAL (XEXP (addr, 1))));
e0727ae5
SL
149 else if (CONST_INT_P (addr))
150 return SMALL_INT12 (INTVAL (addr));
42e6ab74
SL
151 return false;
152 }
153 return memory_operand (op, mode);
154})
524d2e49
SL
155
156(define_predicate "ldstex_memory_operand"
157 (match_code "mem")
158{
159 /* ldex/ldsex/stex/stsex cannot handle memory addresses with offsets. */
160 return GET_CODE (XEXP (op, 0)) == REG;
161})