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738f2522 | 1 | /* Target code for NVPTX. |
85ec4feb | 2 | Copyright (C) 2014-2018 Free Software Foundation, Inc. |
738f2522 BS |
3 | Contributed by Bernd Schmidt <bernds@codesourcery.com> |
4 | ||
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published | |
9 | by the Free Software Foundation; either version 3, or (at your | |
10 | option) any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
8fcc61f8 RS |
21 | #define IN_TARGET_CODE 1 |
22 | ||
738f2522 | 23 | #include "config.h" |
3a4d1cb1 | 24 | #include <sstream> |
738f2522 BS |
25 | #include "system.h" |
26 | #include "coretypes.h" | |
c7131fb2 | 27 | #include "backend.h" |
e11c4407 | 28 | #include "target.h" |
738f2522 | 29 | #include "rtl.h" |
e11c4407 AM |
30 | #include "tree.h" |
31 | #include "cfghooks.h" | |
c7131fb2 | 32 | #include "df.h" |
4d0cdd0c | 33 | #include "memmodel.h" |
e11c4407 AM |
34 | #include "tm_p.h" |
35 | #include "expmed.h" | |
36 | #include "optabs.h" | |
37 | #include "regs.h" | |
38 | #include "emit-rtl.h" | |
39 | #include "recog.h" | |
40 | #include "diagnostic.h" | |
40e23961 | 41 | #include "alias.h" |
738f2522 BS |
42 | #include "insn-flags.h" |
43 | #include "output.h" | |
44 | #include "insn-attr.h" | |
36566b39 | 45 | #include "flags.h" |
36566b39 PK |
46 | #include "dojump.h" |
47 | #include "explow.h" | |
48 | #include "calls.h" | |
36566b39 PK |
49 | #include "varasm.h" |
50 | #include "stmt.h" | |
738f2522 | 51 | #include "expr.h" |
738f2522 BS |
52 | #include "tm-preds.h" |
53 | #include "tm-constrs.h" | |
738f2522 BS |
54 | #include "langhooks.h" |
55 | #include "dbxout.h" | |
738f2522 | 56 | #include "cfgrtl.h" |
d88cd9c4 | 57 | #include "gimple.h" |
738f2522 | 58 | #include "stor-layout.h" |
738f2522 | 59 | #include "builtins.h" |
629b3d75 | 60 | #include "omp-general.h" |
3e32ee19 NS |
61 | #include "omp-low.h" |
62 | #include "gomp-constants.h" | |
d88cd9c4 | 63 | #include "dumpfile.h" |
f3552158 NS |
64 | #include "internal-fn.h" |
65 | #include "gimple-iterator.h" | |
66 | #include "stringpool.h" | |
314e6352 | 67 | #include "attribs.h" |
f2d4d839 | 68 | #include "tree-vrp.h" |
f3552158 NS |
69 | #include "tree-ssa-operands.h" |
70 | #include "tree-ssanames.h" | |
71 | #include "gimplify.h" | |
72 | #include "tree-phinodes.h" | |
73 | #include "cfgloop.h" | |
74 | #include "fold-const.h" | |
50c620ca | 75 | #include "intl.h" |
738f2522 | 76 | |
994c5d85 | 77 | /* This file should be included last. */ |
d58627a0 RS |
78 | #include "target-def.h" |
79 | ||
43c371e8 | 80 | #define WORKAROUND_PTXJIT_BUG 1 |
3dede32b | 81 | #define WORKAROUND_PTXJIT_BUG_2 1 |
21251395 | 82 | #define WORKAROUND_PTXJIT_BUG_3 1 |
43c371e8 | 83 | |
9a863523 NS |
84 | /* The various PTX memory areas an object might reside in. */ |
85 | enum nvptx_data_area | |
86 | { | |
87 | DATA_AREA_GENERIC, | |
88 | DATA_AREA_GLOBAL, | |
89 | DATA_AREA_SHARED, | |
90 | DATA_AREA_LOCAL, | |
91 | DATA_AREA_CONST, | |
92 | DATA_AREA_PARAM, | |
93 | DATA_AREA_MAX | |
94 | }; | |
95 | ||
96 | /* We record the data area in the target symbol flags. */ | |
97 | #define SYMBOL_DATA_AREA(SYM) \ | |
98 | (nvptx_data_area)((SYMBOL_REF_FLAGS (SYM) >> SYMBOL_FLAG_MACH_DEP_SHIFT) \ | |
99 | & 7) | |
100 | #define SET_SYMBOL_DATA_AREA(SYM,AREA) \ | |
101 | (SYMBOL_REF_FLAGS (SYM) |= (AREA) << SYMBOL_FLAG_MACH_DEP_SHIFT) | |
102 | ||
738f2522 BS |
103 | /* Record the function decls we've written, and the libfuncs and function |
104 | decls corresponding to them. */ | |
105 | static std::stringstream func_decls; | |
f3dba894 | 106 | |
6c907cff | 107 | struct declared_libfunc_hasher : ggc_cache_ptr_hash<rtx_def> |
f3dba894 TS |
108 | { |
109 | static hashval_t hash (rtx x) { return htab_hash_pointer (x); } | |
110 | static bool equal (rtx a, rtx b) { return a == b; } | |
111 | }; | |
112 | ||
113 | static GTY((cache)) | |
114 | hash_table<declared_libfunc_hasher> *declared_libfuncs_htab; | |
115 | ||
6c907cff | 116 | struct tree_hasher : ggc_cache_ptr_hash<tree_node> |
f3dba894 TS |
117 | { |
118 | static hashval_t hash (tree t) { return htab_hash_pointer (t); } | |
119 | static bool equal (tree a, tree b) { return a == b; } | |
120 | }; | |
121 | ||
122 | static GTY((cache)) hash_table<tree_hasher> *declared_fndecls_htab; | |
123 | static GTY((cache)) hash_table<tree_hasher> *needed_fndecls_htab; | |
738f2522 | 124 | |
f3552158 NS |
125 | /* Buffer needed to broadcast across workers. This is used for both |
126 | worker-neutering and worker broadcasting. It is shared by all | |
127 | functions emitted. The buffer is placed in shared memory. It'd be | |
128 | nice if PTX supported common blocks, because then this could be | |
129 | shared across TUs (taking the largest size). */ | |
d88cd9c4 NS |
130 | static unsigned worker_bcast_size; |
131 | static unsigned worker_bcast_align; | |
d88cd9c4 NS |
132 | static GTY(()) rtx worker_bcast_sym; |
133 | ||
f3552158 NS |
134 | /* Buffer needed for worker reductions. This has to be distinct from |
135 | the worker broadcast array, as both may be live concurrently. */ | |
136 | static unsigned worker_red_size; | |
137 | static unsigned worker_red_align; | |
f3552158 NS |
138 | static GTY(()) rtx worker_red_sym; |
139 | ||
33f47f42 NS |
140 | /* Global lock variable, needed for 128bit worker & gang reductions. */ |
141 | static GTY(()) tree global_lock_var; | |
142 | ||
5012919d AM |
143 | /* True if any function references __nvptx_stacks. */ |
144 | static bool need_softstack_decl; | |
145 | ||
146 | /* True if any function references __nvptx_uni. */ | |
147 | static bool need_unisimt_decl; | |
148 | ||
738f2522 BS |
149 | /* Allocate a new, cleared machine_function structure. */ |
150 | ||
151 | static struct machine_function * | |
152 | nvptx_init_machine_status (void) | |
153 | { | |
154 | struct machine_function *p = ggc_cleared_alloc<machine_function> (); | |
44c068ae | 155 | p->return_mode = VOIDmode; |
738f2522 BS |
156 | return p; |
157 | } | |
158 | ||
5012919d AM |
159 | /* Issue a diagnostic when option OPTNAME is enabled (as indicated by OPTVAL) |
160 | and -fopenacc is also enabled. */ | |
161 | ||
162 | static void | |
163 | diagnose_openacc_conflict (bool optval, const char *optname) | |
164 | { | |
165 | if (flag_openacc && optval) | |
166 | error ("option %s is not supported together with -fopenacc", optname); | |
167 | } | |
168 | ||
738f2522 BS |
169 | /* Implement TARGET_OPTION_OVERRIDE. */ |
170 | ||
171 | static void | |
172 | nvptx_option_override (void) | |
173 | { | |
174 | init_machine_status = nvptx_init_machine_status; | |
ae578943 | 175 | |
3d339d5e AM |
176 | /* Set toplevel_reorder, unless explicitly disabled. We need |
177 | reordering so that we emit necessary assembler decls of | |
178 | undeclared variables. */ | |
179 | if (!global_options_set.x_flag_toplevel_reorder) | |
180 | flag_toplevel_reorder = 1; | |
181 | ||
fa9afdc3 TV |
182 | debug_nonbind_markers_p = 0; |
183 | ||
ae578943 NS |
184 | /* Set flag_no_common, unless explicitly disabled. We fake common |
185 | using .weak, and that's not entirely accurate, so avoid it | |
186 | unless forced. */ | |
187 | if (!global_options_set.x_flag_no_common) | |
188 | flag_no_common = 1; | |
189 | ||
cad136a4 TV |
190 | /* The patch area requires nops, which we don't have. */ |
191 | if (function_entry_patch_area_size > 0) | |
192 | sorry ("not generating patch area, nops not supported"); | |
193 | ||
738f2522 BS |
194 | /* Assumes that it will see only hard registers. */ |
195 | flag_var_tracking = 0; | |
1e5154e7 | 196 | |
dba619f3 NS |
197 | if (nvptx_optimize < 0) |
198 | nvptx_optimize = optimize > 0; | |
199 | ||
f3dba894 TS |
200 | declared_fndecls_htab = hash_table<tree_hasher>::create_ggc (17); |
201 | needed_fndecls_htab = hash_table<tree_hasher>::create_ggc (17); | |
738f2522 | 202 | declared_libfuncs_htab |
f3dba894 | 203 | = hash_table<declared_libfunc_hasher>::create_ggc (17); |
d88cd9c4 | 204 | |
15ab6f00 | 205 | worker_bcast_sym = gen_rtx_SYMBOL_REF (Pmode, "__worker_bcast"); |
9a863523 | 206 | SET_SYMBOL_DATA_AREA (worker_bcast_sym, DATA_AREA_SHARED); |
d88cd9c4 | 207 | worker_bcast_align = GET_MODE_ALIGNMENT (SImode) / BITS_PER_UNIT; |
f3552158 | 208 | |
15ab6f00 | 209 | worker_red_sym = gen_rtx_SYMBOL_REF (Pmode, "__worker_red"); |
9a863523 | 210 | SET_SYMBOL_DATA_AREA (worker_red_sym, DATA_AREA_SHARED); |
f3552158 | 211 | worker_red_align = GET_MODE_ALIGNMENT (SImode) / BITS_PER_UNIT; |
5012919d AM |
212 | |
213 | diagnose_openacc_conflict (TARGET_GOMP, "-mgomp"); | |
214 | diagnose_openacc_conflict (TARGET_SOFT_STACK, "-msoft-stack"); | |
215 | diagnose_openacc_conflict (TARGET_UNIFORM_SIMT, "-muniform-simt"); | |
216 | ||
217 | if (TARGET_GOMP) | |
218 | target_flags |= MASK_SOFT_STACK | MASK_UNIFORM_SIMT; | |
738f2522 BS |
219 | } |
220 | ||
738f2522 BS |
221 | /* Return a ptx type for MODE. If PROMOTE, then use .u32 for QImode to |
222 | deal with ptx ideosyncracies. */ | |
223 | ||
224 | const char * | |
225 | nvptx_ptx_type_from_mode (machine_mode mode, bool promote) | |
226 | { | |
227 | switch (mode) | |
228 | { | |
4e10a5a7 | 229 | case E_BLKmode: |
738f2522 | 230 | return ".b8"; |
4e10a5a7 | 231 | case E_BImode: |
738f2522 | 232 | return ".pred"; |
4e10a5a7 | 233 | case E_QImode: |
738f2522 BS |
234 | if (promote) |
235 | return ".u32"; | |
236 | else | |
237 | return ".u8"; | |
4e10a5a7 | 238 | case E_HImode: |
738f2522 | 239 | return ".u16"; |
4e10a5a7 | 240 | case E_SImode: |
738f2522 | 241 | return ".u32"; |
4e10a5a7 | 242 | case E_DImode: |
738f2522 BS |
243 | return ".u64"; |
244 | ||
4e10a5a7 | 245 | case E_SFmode: |
738f2522 | 246 | return ".f32"; |
4e10a5a7 | 247 | case E_DFmode: |
738f2522 BS |
248 | return ".f64"; |
249 | ||
4e10a5a7 | 250 | case E_V2SImode: |
b98b34b7 | 251 | return ".v2.u32"; |
4e10a5a7 | 252 | case E_V2DImode: |
3717fbe3 | 253 | return ".v2.u64"; |
b98b34b7 | 254 | |
738f2522 BS |
255 | default: |
256 | gcc_unreachable (); | |
257 | } | |
258 | } | |
259 | ||
9a863523 NS |
260 | /* Encode the PTX data area that DECL (which might not actually be a |
261 | _DECL) should reside in. */ | |
7b8edc29 | 262 | |
9a863523 NS |
263 | static void |
264 | nvptx_encode_section_info (tree decl, rtx rtl, int first) | |
7b8edc29 | 265 | { |
9a863523 NS |
266 | default_encode_section_info (decl, rtl, first); |
267 | if (first && MEM_P (rtl)) | |
268 | { | |
269 | nvptx_data_area area = DATA_AREA_GENERIC; | |
7b8edc29 | 270 | |
9a863523 NS |
271 | if (TREE_CONSTANT (decl)) |
272 | area = DATA_AREA_CONST; | |
273 | else if (TREE_CODE (decl) == VAR_DECL) | |
5012919d AM |
274 | { |
275 | if (lookup_attribute ("shared", DECL_ATTRIBUTES (decl))) | |
276 | { | |
277 | area = DATA_AREA_SHARED; | |
278 | if (DECL_INITIAL (decl)) | |
279 | error ("static initialization of variable %q+D in %<.shared%>" | |
280 | " memory is not supported", decl); | |
281 | } | |
282 | else | |
283 | area = TREE_READONLY (decl) ? DATA_AREA_CONST : DATA_AREA_GLOBAL; | |
284 | } | |
7b8edc29 | 285 | |
9a863523 NS |
286 | SET_SYMBOL_DATA_AREA (XEXP (rtl, 0), area); |
287 | } | |
288 | } | |
289 | ||
290 | /* Return the PTX name of the data area in which SYM should be | |
291 | placed. The symbol must have already been processed by | |
292 | nvptx_encode_seciton_info, or equivalent. */ | |
293 | ||
294 | static const char * | |
295 | section_for_sym (rtx sym) | |
296 | { | |
297 | nvptx_data_area area = SYMBOL_DATA_AREA (sym); | |
298 | /* Same order as nvptx_data_area enum. */ | |
299 | static char const *const areas[] = | |
300 | {"", ".global", ".shared", ".local", ".const", ".param"}; | |
301 | ||
302 | return areas[area]; | |
303 | } | |
304 | ||
305 | /* Similarly for a decl. */ | |
306 | ||
307 | static const char * | |
308 | section_for_decl (const_tree decl) | |
309 | { | |
310 | return section_for_sym (XEXP (DECL_RTL (CONST_CAST (tree, decl)), 0)); | |
7b8edc29 NS |
311 | } |
312 | ||
b4346107 NS |
313 | /* Check NAME for special function names and redirect them by returning a |
314 | replacement. This applies to malloc, free and realloc, for which we | |
315 | want to use libgcc wrappers, and call, which triggers a bug in | |
316 | ptxas. We can't use TARGET_MANGLE_DECL_ASSEMBLER_NAME, as that's | |
317 | not active in an offload compiler -- the names are all set by the | |
318 | host-side compiler. */ | |
319 | ||
320 | static const char * | |
321 | nvptx_name_replacement (const char *name) | |
322 | { | |
323 | if (strcmp (name, "call") == 0) | |
324 | return "__nvptx_call"; | |
325 | if (strcmp (name, "malloc") == 0) | |
326 | return "__nvptx_malloc"; | |
327 | if (strcmp (name, "free") == 0) | |
328 | return "__nvptx_free"; | |
329 | if (strcmp (name, "realloc") == 0) | |
330 | return "__nvptx_realloc"; | |
331 | return name; | |
332 | } | |
333 | ||
d7479262 NS |
334 | /* If MODE should be treated as two registers of an inner mode, return |
335 | that inner mode. Otherwise return VOIDmode. */ | |
738f2522 | 336 | |
d7479262 NS |
337 | static machine_mode |
338 | maybe_split_mode (machine_mode mode) | |
738f2522 | 339 | { |
738f2522 | 340 | if (COMPLEX_MODE_P (mode)) |
d7479262 | 341 | return GET_MODE_INNER (mode); |
738f2522 | 342 | |
738f2522 | 343 | if (mode == TImode) |
d7479262 NS |
344 | return DImode; |
345 | ||
346 | return VOIDmode; | |
738f2522 BS |
347 | } |
348 | ||
38827811 TV |
349 | /* Return true if mode should be treated as two registers. */ |
350 | ||
351 | static bool | |
352 | split_mode_p (machine_mode mode) | |
353 | { | |
354 | return maybe_split_mode (mode) != VOIDmode; | |
355 | } | |
356 | ||
f313d112 NS |
357 | /* Output a register, subreg, or register pair (with optional |
358 | enclosing braces). */ | |
359 | ||
360 | static void | |
361 | output_reg (FILE *file, unsigned regno, machine_mode inner_mode, | |
362 | int subreg_offset = -1) | |
363 | { | |
364 | if (inner_mode == VOIDmode) | |
365 | { | |
366 | if (HARD_REGISTER_NUM_P (regno)) | |
367 | fprintf (file, "%s", reg_names[regno]); | |
368 | else | |
369 | fprintf (file, "%%r%d", regno); | |
370 | } | |
371 | else if (subreg_offset >= 0) | |
372 | { | |
373 | output_reg (file, regno, VOIDmode); | |
374 | fprintf (file, "$%d", subreg_offset); | |
375 | } | |
376 | else | |
377 | { | |
378 | if (subreg_offset == -1) | |
379 | fprintf (file, "{"); | |
380 | output_reg (file, regno, inner_mode, GET_MODE_SIZE (inner_mode)); | |
381 | fprintf (file, ","); | |
382 | output_reg (file, regno, inner_mode, 0); | |
383 | if (subreg_offset == -1) | |
384 | fprintf (file, "}"); | |
385 | } | |
386 | } | |
387 | ||
d88cd9c4 NS |
388 | /* Emit forking instructions for MASK. */ |
389 | ||
390 | static void | |
391 | nvptx_emit_forking (unsigned mask, bool is_call) | |
392 | { | |
393 | mask &= (GOMP_DIM_MASK (GOMP_DIM_WORKER) | |
394 | | GOMP_DIM_MASK (GOMP_DIM_VECTOR)); | |
395 | if (mask) | |
396 | { | |
397 | rtx op = GEN_INT (mask | (is_call << GOMP_DIM_MAX)); | |
398 | ||
399 | /* Emit fork at all levels. This helps form SESE regions, as | |
400 | it creates a block with a single successor before entering a | |
401 | partitooned region. That is a good candidate for the end of | |
402 | an SESE region. */ | |
e91eba31 | 403 | emit_insn (gen_nvptx_fork (op)); |
d88cd9c4 NS |
404 | emit_insn (gen_nvptx_forked (op)); |
405 | } | |
406 | } | |
407 | ||
408 | /* Emit joining instructions for MASK. */ | |
409 | ||
410 | static void | |
411 | nvptx_emit_joining (unsigned mask, bool is_call) | |
412 | { | |
413 | mask &= (GOMP_DIM_MASK (GOMP_DIM_WORKER) | |
414 | | GOMP_DIM_MASK (GOMP_DIM_VECTOR)); | |
415 | if (mask) | |
416 | { | |
417 | rtx op = GEN_INT (mask | (is_call << GOMP_DIM_MAX)); | |
418 | ||
419 | /* Emit joining for all non-call pars to ensure there's a single | |
420 | predecessor for the block the join insn ends up in. This is | |
421 | needed for skipping entire loops. */ | |
e91eba31 | 422 | emit_insn (gen_nvptx_joining (op)); |
d88cd9c4 NS |
423 | emit_insn (gen_nvptx_join (op)); |
424 | } | |
425 | } | |
426 | ||
738f2522 | 427 | \f |
44eba92d NS |
428 | /* Determine whether MODE and TYPE (possibly NULL) should be passed or |
429 | returned in memory. Integer and floating types supported by the | |
430 | machine are passed in registers, everything else is passed in | |
431 | memory. Complex types are split. */ | |
432 | ||
433 | static bool | |
434 | pass_in_memory (machine_mode mode, const_tree type, bool for_return) | |
435 | { | |
436 | if (type) | |
437 | { | |
438 | if (AGGREGATE_TYPE_P (type)) | |
439 | return true; | |
440 | if (TREE_CODE (type) == VECTOR_TYPE) | |
441 | return true; | |
442 | } | |
443 | ||
444 | if (!for_return && COMPLEX_MODE_P (mode)) | |
445 | /* Complex types are passed as two underlying args. */ | |
446 | mode = GET_MODE_INNER (mode); | |
447 | ||
448 | if (GET_MODE_CLASS (mode) != MODE_INT | |
449 | && GET_MODE_CLASS (mode) != MODE_FLOAT) | |
450 | return true; | |
451 | ||
452 | if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
453 | return true; | |
454 | ||
455 | return false; | |
456 | } | |
457 | ||
458 | /* A non-memory argument of mode MODE is being passed, determine the mode it | |
459 | should be promoted to. This is also used for determining return | |
460 | type promotion. */ | |
461 | ||
462 | static machine_mode | |
463 | promote_arg (machine_mode mode, bool prototyped) | |
464 | { | |
465 | if (!prototyped && mode == SFmode) | |
466 | /* K&R float promotion for unprototyped functions. */ | |
467 | mode = DFmode; | |
468 | else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)) | |
469 | mode = SImode; | |
470 | ||
471 | return mode; | |
472 | } | |
473 | ||
474 | /* A non-memory return type of MODE is being returned. Determine the | |
475 | mode it should be promoted to. */ | |
476 | ||
477 | static machine_mode | |
478 | promote_return (machine_mode mode) | |
479 | { | |
480 | return promote_arg (mode, true); | |
481 | } | |
482 | ||
e74f7152 | 483 | /* Implement TARGET_FUNCTION_ARG. */ |
dc3d2aeb | 484 | |
e74f7152 | 485 | static rtx |
b49e35a9 | 486 | nvptx_function_arg (cumulative_args_t ARG_UNUSED (cum_v), machine_mode mode, |
e74f7152 NS |
487 | const_tree, bool named) |
488 | { | |
b49e35a9 | 489 | if (mode == VOIDmode || !named) |
e74f7152 | 490 | return NULL_RTX; |
738f2522 | 491 | |
b49e35a9 | 492 | return gen_reg_rtx (mode); |
e74f7152 NS |
493 | } |
494 | ||
495 | /* Implement TARGET_FUNCTION_INCOMING_ARG. */ | |
496 | ||
497 | static rtx | |
498 | nvptx_function_incoming_arg (cumulative_args_t cum_v, machine_mode mode, | |
499 | const_tree, bool named) | |
738f2522 | 500 | { |
e74f7152 | 501 | CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); |
dc3d2aeb | 502 | |
b49e35a9 | 503 | if (mode == VOIDmode || !named) |
e74f7152 | 504 | return NULL_RTX; |
738f2522 | 505 | |
e74f7152 NS |
506 | /* No need to deal with split modes here, the only case that can |
507 | happen is complex modes and those are dealt with by | |
508 | TARGET_SPLIT_COMPLEX_ARG. */ | |
509 | return gen_rtx_UNSPEC (mode, | |
510 | gen_rtvec (1, GEN_INT (cum->count)), | |
511 | UNSPEC_ARG_REG); | |
512 | } | |
513 | ||
514 | /* Implement TARGET_FUNCTION_ARG_ADVANCE. */ | |
515 | ||
516 | static void | |
517 | nvptx_function_arg_advance (cumulative_args_t cum_v, | |
518 | machine_mode ARG_UNUSED (mode), | |
519 | const_tree ARG_UNUSED (type), | |
520 | bool ARG_UNUSED (named)) | |
521 | { | |
522 | CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); | |
b49e35a9 | 523 | |
e74f7152 NS |
524 | cum->count++; |
525 | } | |
526 | ||
1988b2c2 NS |
527 | /* Implement TARGET_FUNCTION_ARG_BOUNDARY. |
528 | ||
529 | For nvptx This is only used for varadic args. The type has already | |
530 | been promoted and/or converted to invisible reference. */ | |
531 | ||
532 | static unsigned | |
533 | nvptx_function_arg_boundary (machine_mode mode, const_tree ARG_UNUSED (type)) | |
534 | { | |
535 | return GET_MODE_ALIGNMENT (mode); | |
536 | } | |
537 | ||
e74f7152 NS |
538 | /* Handle the TARGET_STRICT_ARGUMENT_NAMING target hook. |
539 | ||
540 | For nvptx, we know how to handle functions declared as stdarg: by | |
541 | passing an extra pointer to the unnamed arguments. However, the | |
542 | Fortran frontend can produce a different situation, where a | |
543 | function pointer is declared with no arguments, but the actual | |
544 | function and calls to it take more arguments. In that case, we | |
545 | want to ensure the call matches the definition of the function. */ | |
546 | ||
547 | static bool | |
548 | nvptx_strict_argument_naming (cumulative_args_t cum_v) | |
549 | { | |
550 | CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); | |
b49e35a9 | 551 | |
e74f7152 NS |
552 | return cum->fntype == NULL_TREE || stdarg_p (cum->fntype); |
553 | } | |
554 | ||
e74f7152 NS |
555 | /* Implement TARGET_LIBCALL_VALUE. */ |
556 | ||
557 | static rtx | |
558 | nvptx_libcall_value (machine_mode mode, const_rtx) | |
559 | { | |
e91cacae | 560 | if (!cfun || !cfun->machine->doing_call) |
e74f7152 NS |
561 | /* Pretend to return in a hard reg for early uses before pseudos can be |
562 | generated. */ | |
563 | return gen_rtx_REG (mode, NVPTX_RETURN_REGNUM); | |
b49e35a9 | 564 | |
e74f7152 NS |
565 | return gen_reg_rtx (mode); |
566 | } | |
567 | ||
568 | /* TARGET_FUNCTION_VALUE implementation. Returns an RTX representing the place | |
569 | where function FUNC returns or receives a value of data type TYPE. */ | |
570 | ||
571 | static rtx | |
44eba92d | 572 | nvptx_function_value (const_tree type, const_tree ARG_UNUSED (func), |
e74f7152 NS |
573 | bool outgoing) |
574 | { | |
44eba92d NS |
575 | machine_mode mode = promote_return (TYPE_MODE (type)); |
576 | ||
e74f7152 | 577 | if (outgoing) |
5c036f3f | 578 | { |
e91cacae | 579 | gcc_assert (cfun); |
44c068ae | 580 | cfun->machine->return_mode = mode; |
5c036f3f NS |
581 | return gen_rtx_REG (mode, NVPTX_RETURN_REGNUM); |
582 | } | |
b49e35a9 NS |
583 | |
584 | return nvptx_libcall_value (mode, NULL_RTX); | |
e74f7152 NS |
585 | } |
586 | ||
587 | /* Implement TARGET_FUNCTION_VALUE_REGNO_P. */ | |
588 | ||
589 | static bool | |
590 | nvptx_function_value_regno_p (const unsigned int regno) | |
591 | { | |
592 | return regno == NVPTX_RETURN_REGNUM; | |
593 | } | |
594 | ||
595 | /* Types with a mode other than those supported by the machine are passed by | |
596 | reference in memory. */ | |
597 | ||
598 | static bool | |
5563d5c0 NS |
599 | nvptx_pass_by_reference (cumulative_args_t ARG_UNUSED (cum), |
600 | machine_mode mode, const_tree type, | |
601 | bool ARG_UNUSED (named)) | |
e74f7152 | 602 | { |
44eba92d | 603 | return pass_in_memory (mode, type, false); |
e74f7152 NS |
604 | } |
605 | ||
606 | /* Implement TARGET_RETURN_IN_MEMORY. */ | |
607 | ||
608 | static bool | |
609 | nvptx_return_in_memory (const_tree type, const_tree) | |
610 | { | |
44eba92d | 611 | return pass_in_memory (TYPE_MODE (type), type, true); |
e74f7152 NS |
612 | } |
613 | ||
614 | /* Implement TARGET_PROMOTE_FUNCTION_MODE. */ | |
615 | ||
616 | static machine_mode | |
617 | nvptx_promote_function_mode (const_tree type, machine_mode mode, | |
44eba92d | 618 | int *ARG_UNUSED (punsignedp), |
e74f7152 NS |
619 | const_tree funtype, int for_return) |
620 | { | |
44eba92d | 621 | return promote_arg (mode, for_return || !type || TYPE_ARG_TYPES (funtype)); |
e74f7152 NS |
622 | } |
623 | ||
e74f7152 NS |
624 | /* Helper for write_arg. Emit a single PTX argument of MODE, either |
625 | in a prototype, or as copy in a function prologue. ARGNO is the | |
626 | index of this argument in the PTX function. FOR_REG is negative, | |
627 | if we're emitting the PTX prototype. It is zero if we're copying | |
628 | to an argument register and it is greater than zero if we're | |
629 | copying to a specific hard register. */ | |
630 | ||
631 | static int | |
1f065954 NS |
632 | write_arg_mode (std::stringstream &s, int for_reg, int argno, |
633 | machine_mode mode) | |
e74f7152 NS |
634 | { |
635 | const char *ptx_type = nvptx_ptx_type_from_mode (mode, false); | |
636 | ||
dc3d2aeb NS |
637 | if (for_reg < 0) |
638 | { | |
639 | /* Writing PTX prototype. */ | |
640 | s << (argno ? ", " : " ("); | |
e74f7152 | 641 | s << ".param" << ptx_type << " %in_ar" << argno; |
dc3d2aeb NS |
642 | } |
643 | else | |
644 | { | |
e74f7152 | 645 | s << "\t.reg" << ptx_type << " "; |
dc3d2aeb NS |
646 | if (for_reg) |
647 | s << reg_names[for_reg]; | |
648 | else | |
649 | s << "%ar" << argno; | |
650 | s << ";\n"; | |
5563d5c0 NS |
651 | if (argno >= 0) |
652 | { | |
653 | s << "\tld.param" << ptx_type << " "; | |
654 | if (for_reg) | |
655 | s << reg_names[for_reg]; | |
656 | else | |
657 | s << "%ar" << argno; | |
658 | s << ", [%in_ar" << argno << "];\n"; | |
659 | } | |
dc3d2aeb NS |
660 | } |
661 | return argno + 1; | |
738f2522 BS |
662 | } |
663 | ||
e74f7152 | 664 | /* Process function parameter TYPE to emit one or more PTX |
1f065954 | 665 | arguments. S, FOR_REG and ARGNO as for write_arg_mode. PROTOTYPED |
44eba92d NS |
666 | is true, if this is a prototyped function, rather than an old-style |
667 | C declaration. Returns the next argument number to use. | |
e74f7152 | 668 | |
9c582551 | 669 | The promotion behavior here must match the regular GCC function |
e74f7152 NS |
670 | parameter marshalling machinery. */ |
671 | ||
672 | static int | |
1f065954 NS |
673 | write_arg_type (std::stringstream &s, int for_reg, int argno, |
674 | tree type, bool prototyped) | |
e74f7152 NS |
675 | { |
676 | machine_mode mode = TYPE_MODE (type); | |
677 | ||
678 | if (mode == VOIDmode) | |
679 | return argno; | |
680 | ||
44eba92d | 681 | if (pass_in_memory (mode, type, false)) |
e74f7152 | 682 | mode = Pmode; |
44eba92d NS |
683 | else |
684 | { | |
685 | bool split = TREE_CODE (type) == COMPLEX_TYPE; | |
e74f7152 | 686 | |
44eba92d NS |
687 | if (split) |
688 | { | |
689 | /* Complex types are sent as two separate args. */ | |
690 | type = TREE_TYPE (type); | |
5563d5c0 | 691 | mode = TYPE_MODE (type); |
44eba92d NS |
692 | prototyped = true; |
693 | } | |
e74f7152 | 694 | |
44eba92d NS |
695 | mode = promote_arg (mode, prototyped); |
696 | if (split) | |
1f065954 | 697 | argno = write_arg_mode (s, for_reg, argno, mode); |
e74f7152 | 698 | } |
e74f7152 | 699 | |
1f065954 NS |
700 | return write_arg_mode (s, for_reg, argno, mode); |
701 | } | |
702 | ||
703 | /* Emit a PTX return as a prototype or function prologue declaration | |
704 | for MODE. */ | |
705 | ||
706 | static void | |
707 | write_return_mode (std::stringstream &s, bool for_proto, machine_mode mode) | |
708 | { | |
709 | const char *ptx_type = nvptx_ptx_type_from_mode (mode, false); | |
710 | const char *pfx = "\t.reg"; | |
711 | const char *sfx = ";\n"; | |
712 | ||
713 | if (for_proto) | |
714 | pfx = "(.param", sfx = "_out) "; | |
715 | ||
716 | s << pfx << ptx_type << " " << reg_names[NVPTX_RETURN_REGNUM] << sfx; | |
e74f7152 NS |
717 | } |
718 | ||
44eba92d | 719 | /* Process a function return TYPE to emit a PTX return as a prototype |
1f065954 | 720 | or function prologue declaration. Returns true if return is via an |
9c582551 | 721 | additional pointer parameter. The promotion behavior here must |
1f065954 | 722 | match the regular GCC function return mashalling. */ |
44eba92d | 723 | |
0beb7c71 | 724 | static bool |
1f065954 | 725 | write_return_type (std::stringstream &s, bool for_proto, tree type) |
0beb7c71 NS |
726 | { |
727 | machine_mode mode = TYPE_MODE (type); | |
0beb7c71 | 728 | |
44eba92d NS |
729 | if (mode == VOIDmode) |
730 | return false; | |
731 | ||
732 | bool return_in_mem = pass_in_memory (mode, type, true); | |
733 | ||
734 | if (return_in_mem) | |
0beb7c71 | 735 | { |
44eba92d NS |
736 | if (for_proto) |
737 | return return_in_mem; | |
738 | ||
739 | /* Named return values can cause us to return a pointer as well | |
740 | as expect an argument for the return location. This is | |
741 | optimization-level specific, so no caller can make use of | |
742 | this data, but more importantly for us, we must ensure it | |
743 | doesn't change the PTX prototype. */ | |
44c068ae | 744 | mode = (machine_mode) cfun->machine->return_mode; |
5c036f3f | 745 | |
44eba92d NS |
746 | if (mode == VOIDmode) |
747 | return return_in_mem; | |
748 | ||
44c068ae | 749 | /* Clear return_mode to inhibit copy of retval to non-existent |
44eba92d | 750 | retval parameter. */ |
44c068ae | 751 | cfun->machine->return_mode = VOIDmode; |
0beb7c71 NS |
752 | } |
753 | else | |
44eba92d NS |
754 | mode = promote_return (mode); |
755 | ||
1f065954 | 756 | write_return_mode (s, for_proto, mode); |
0beb7c71 NS |
757 | |
758 | return return_in_mem; | |
759 | } | |
760 | ||
738f2522 BS |
761 | /* Look for attributes in ATTRS that would indicate we must write a function |
762 | as a .entry kernel rather than a .func. Return true if one is found. */ | |
763 | ||
764 | static bool | |
765 | write_as_kernel (tree attrs) | |
766 | { | |
767 | return (lookup_attribute ("kernel", attrs) != NULL_TREE | |
5012919d AM |
768 | || (lookup_attribute ("omp target entrypoint", attrs) != NULL_TREE |
769 | && lookup_attribute ("oacc function", attrs) != NULL_TREE)); | |
770 | /* For OpenMP target regions, the corresponding kernel entry is emitted from | |
771 | write_omp_entry as a separate function. */ | |
738f2522 BS |
772 | } |
773 | ||
69823d76 NS |
774 | /* Emit a linker marker for a function decl or defn. */ |
775 | ||
776 | static void | |
777 | write_fn_marker (std::stringstream &s, bool is_defn, bool globalize, | |
778 | const char *name) | |
779 | { | |
780 | s << "\n// BEGIN"; | |
781 | if (globalize) | |
782 | s << " GLOBAL"; | |
783 | s << " FUNCTION " << (is_defn ? "DEF: " : "DECL: "); | |
784 | s << name << "\n"; | |
785 | } | |
786 | ||
787 | /* Emit a linker marker for a variable decl or defn. */ | |
788 | ||
789 | static void | |
790 | write_var_marker (FILE *file, bool is_defn, bool globalize, const char *name) | |
791 | { | |
792 | fprintf (file, "\n// BEGIN%s VAR %s: ", | |
793 | globalize ? " GLOBAL" : "", | |
794 | is_defn ? "DEF" : "DECL"); | |
795 | assemble_name_raw (file, name); | |
796 | fputs ("\n", file); | |
797 | } | |
798 | ||
b699adcc NS |
799 | /* Write a .func or .kernel declaration or definition along with |
800 | a helper comment for use by ld. S is the stream to write to, DECL | |
801 | the decl for the function with name NAME. For definitions, emit | |
802 | a declaration too. */ | |
738f2522 | 803 | |
b699adcc NS |
804 | static const char * |
805 | write_fn_proto (std::stringstream &s, bool is_defn, | |
806 | const char *name, const_tree decl) | |
738f2522 | 807 | { |
b699adcc NS |
808 | if (is_defn) |
809 | /* Emit a declaration. The PTX assembler gets upset without it. */ | |
810 | name = write_fn_proto (s, false, name, decl); | |
b4346107 NS |
811 | else |
812 | { | |
813 | /* Avoid repeating the name replacement. */ | |
814 | name = nvptx_name_replacement (name); | |
815 | if (name[0] == '*') | |
816 | name++; | |
817 | } | |
738f2522 | 818 | |
69823d76 | 819 | write_fn_marker (s, is_defn, TREE_PUBLIC (decl), name); |
b699adcc NS |
820 | |
821 | /* PTX declaration. */ | |
738f2522 BS |
822 | if (DECL_EXTERNAL (decl)) |
823 | s << ".extern "; | |
824 | else if (TREE_PUBLIC (decl)) | |
0766660b | 825 | s << (DECL_WEAK (decl) ? ".weak " : ".visible "); |
b699adcc | 826 | s << (write_as_kernel (DECL_ATTRIBUTES (decl)) ? ".entry " : ".func "); |
738f2522 | 827 | |
b699adcc NS |
828 | tree fntype = TREE_TYPE (decl); |
829 | tree result_type = TREE_TYPE (fntype); | |
738f2522 | 830 | |
ac3d02e2 NS |
831 | /* atomic_compare_exchange_$n builtins have an exceptional calling |
832 | convention. */ | |
833 | int not_atomic_weak_arg = -1; | |
834 | if (DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL) | |
835 | switch (DECL_FUNCTION_CODE (decl)) | |
836 | { | |
837 | case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_1: | |
838 | case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_2: | |
839 | case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_4: | |
840 | case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_8: | |
841 | case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_16: | |
842 | /* These atomics skip the 'weak' parm in an actual library | |
843 | call. We must skip it in the prototype too. */ | |
844 | not_atomic_weak_arg = 3; | |
845 | break; | |
846 | ||
847 | default: | |
848 | break; | |
849 | } | |
850 | ||
738f2522 | 851 | /* Declare the result. */ |
1f065954 | 852 | bool return_in_mem = write_return_type (s, true, result_type); |
738f2522 | 853 | |
b699adcc NS |
854 | s << name; |
855 | ||
dc3d2aeb | 856 | int argno = 0; |
b699adcc NS |
857 | |
858 | /* Emit argument list. */ | |
859 | if (return_in_mem) | |
1f065954 | 860 | argno = write_arg_type (s, -1, argno, ptr_type_node, true); |
df1bdded | 861 | |
b699adcc NS |
862 | /* We get: |
863 | NULL in TYPE_ARG_TYPES, for old-style functions | |
864 | NULL in DECL_ARGUMENTS, for builtin functions without another | |
865 | declaration. | |
866 | So we have to pick the best one we have. */ | |
867 | tree args = TYPE_ARG_TYPES (fntype); | |
dc3d2aeb NS |
868 | bool prototyped = true; |
869 | if (!args) | |
870 | { | |
871 | args = DECL_ARGUMENTS (decl); | |
872 | prototyped = false; | |
873 | } | |
738f2522 | 874 | |
ac3d02e2 | 875 | for (; args; args = TREE_CHAIN (args), not_atomic_weak_arg--) |
b699adcc | 876 | { |
dc3d2aeb | 877 | tree type = prototyped ? TREE_VALUE (args) : TREE_TYPE (args); |
ac3d02e2 NS |
878 | |
879 | if (not_atomic_weak_arg) | |
880 | argno = write_arg_type (s, -1, argno, type, prototyped); | |
881 | else | |
882 | gcc_assert (type == boolean_type_node); | |
738f2522 | 883 | } |
738f2522 | 884 | |
b699adcc | 885 | if (stdarg_p (fntype)) |
1f065954 | 886 | argno = write_arg_type (s, -1, argno, ptr_type_node, true); |
738f2522 | 887 | |
b699adcc | 888 | if (DECL_STATIC_CHAIN (decl)) |
1f065954 | 889 | argno = write_arg_type (s, -1, argno, ptr_type_node, true); |
b699adcc | 890 | |
dc3d2aeb | 891 | if (!argno && strcmp (name, "main") == 0) |
b699adcc | 892 | { |
1f065954 NS |
893 | argno = write_arg_type (s, -1, argno, integer_type_node, true); |
894 | argno = write_arg_type (s, -1, argno, ptr_type_node, true); | |
b699adcc NS |
895 | } |
896 | ||
dc3d2aeb | 897 | if (argno) |
b699adcc NS |
898 | s << ")"; |
899 | ||
900 | s << (is_defn ? "\n" : ";\n"); | |
901 | ||
902 | return name; | |
738f2522 BS |
903 | } |
904 | ||
00e52418 NS |
905 | /* Construct a function declaration from a call insn. This can be |
906 | necessary for two reasons - either we have an indirect call which | |
907 | requires a .callprototype declaration, or we have a libcall | |
908 | generated by emit_library_call for which no decl exists. */ | |
909 | ||
910 | static void | |
b699adcc NS |
911 | write_fn_proto_from_insn (std::stringstream &s, const char *name, |
912 | rtx result, rtx pat) | |
00e52418 NS |
913 | { |
914 | if (!name) | |
915 | { | |
916 | s << "\t.callprototype "; | |
917 | name = "_"; | |
918 | } | |
919 | else | |
920 | { | |
b4346107 | 921 | name = nvptx_name_replacement (name); |
69823d76 | 922 | write_fn_marker (s, false, true, name); |
00e52418 NS |
923 | s << "\t.extern .func "; |
924 | } | |
925 | ||
926 | if (result != NULL_RTX) | |
1f065954 | 927 | write_return_mode (s, true, GET_MODE (result)); |
00e52418 NS |
928 | |
929 | s << name; | |
930 | ||
00e52418 NS |
931 | int arg_end = XVECLEN (pat, 0); |
932 | for (int i = 1; i < arg_end; i++) | |
933 | { | |
1f065954 NS |
934 | /* We don't have to deal with mode splitting & promotion here, |
935 | as that was already done when generating the call | |
936 | sequence. */ | |
00e52418 NS |
937 | machine_mode mode = GET_MODE (XEXP (XVECEXP (pat, 0, i), 0)); |
938 | ||
1f065954 | 939 | write_arg_mode (s, -1, i - 1, mode); |
00e52418 NS |
940 | } |
941 | if (arg_end != 1) | |
942 | s << ")"; | |
943 | s << ";\n"; | |
944 | } | |
945 | ||
00e52418 NS |
946 | /* DECL is an external FUNCTION_DECL, make sure its in the fndecl hash |
947 | table and and write a ptx prototype. These are emitted at end of | |
948 | compilation. */ | |
738f2522 | 949 | |
00e52418 NS |
950 | static void |
951 | nvptx_record_fndecl (tree decl) | |
738f2522 | 952 | { |
f3dba894 | 953 | tree *slot = declared_fndecls_htab->find_slot (decl, INSERT); |
738f2522 BS |
954 | if (*slot == NULL) |
955 | { | |
956 | *slot = decl; | |
957 | const char *name = get_fnname_from_decl (decl); | |
b699adcc | 958 | write_fn_proto (func_decls, false, name, decl); |
738f2522 | 959 | } |
738f2522 BS |
960 | } |
961 | ||
00e52418 NS |
962 | /* Record a libcall or unprototyped external function. CALLEE is the |
963 | SYMBOL_REF. Insert into the libfunc hash table and emit a ptx | |
964 | declaration for it. */ | |
965 | ||
966 | static void | |
967 | nvptx_record_libfunc (rtx callee, rtx retval, rtx pat) | |
968 | { | |
969 | rtx *slot = declared_libfuncs_htab->find_slot (callee, INSERT); | |
970 | if (*slot == NULL) | |
971 | { | |
972 | *slot = callee; | |
973 | ||
974 | const char *name = XSTR (callee, 0); | |
b699adcc | 975 | write_fn_proto_from_insn (func_decls, name, retval, pat); |
00e52418 NS |
976 | } |
977 | } | |
978 | ||
979 | /* DECL is an external FUNCTION_DECL, that we're referencing. If it | |
980 | is prototyped, record it now. Otherwise record it as needed at end | |
981 | of compilation, when we might have more information about it. */ | |
738f2522 BS |
982 | |
983 | void | |
984 | nvptx_record_needed_fndecl (tree decl) | |
985 | { | |
00e52418 NS |
986 | if (TYPE_ARG_TYPES (TREE_TYPE (decl)) == NULL_TREE) |
987 | { | |
988 | tree *slot = needed_fndecls_htab->find_slot (decl, INSERT); | |
989 | if (*slot == NULL) | |
990 | *slot = decl; | |
991 | } | |
992 | else | |
993 | nvptx_record_fndecl (decl); | |
994 | } | |
738f2522 | 995 | |
00e52418 NS |
996 | /* SYM is a SYMBOL_REF. If it refers to an external function, record |
997 | it as needed. */ | |
998 | ||
999 | static void | |
1000 | nvptx_maybe_record_fnsym (rtx sym) | |
1001 | { | |
1002 | tree decl = SYMBOL_REF_DECL (sym); | |
1003 | ||
1004 | if (decl && TREE_CODE (decl) == FUNCTION_DECL && DECL_EXTERNAL (decl)) | |
1005 | nvptx_record_needed_fndecl (decl); | |
738f2522 BS |
1006 | } |
1007 | ||
1f065954 | 1008 | /* Emit a local array to hold some part of a conventional stack frame |
5563d5c0 NS |
1009 | and initialize REGNO to point to it. If the size is zero, it'll |
1010 | never be valid to dereference, so we can simply initialize to | |
1011 | zero. */ | |
1f065954 NS |
1012 | |
1013 | static void | |
1014 | init_frame (FILE *file, int regno, unsigned align, unsigned size) | |
1015 | { | |
5563d5c0 NS |
1016 | if (size) |
1017 | fprintf (file, "\t.local .align %d .b8 %s_ar[%u];\n", | |
1018 | align, reg_names[regno], size); | |
1019 | fprintf (file, "\t.reg.u%d %s;\n", | |
1020 | POINTER_SIZE, reg_names[regno]); | |
1021 | fprintf (file, (size ? "\tcvta.local.u%d %s, %s_ar;\n" | |
1022 | : "\tmov.u%d %s, 0;\n"), | |
1f065954 NS |
1023 | POINTER_SIZE, reg_names[regno], reg_names[regno]); |
1024 | } | |
1025 | ||
5012919d AM |
1026 | /* Emit soft stack frame setup sequence. */ |
1027 | ||
1028 | static void | |
1029 | init_softstack_frame (FILE *file, unsigned alignment, HOST_WIDE_INT size) | |
1030 | { | |
1031 | /* Maintain 64-bit stack alignment. */ | |
1032 | unsigned keep_align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
1033 | size = ROUND_UP (size, keep_align); | |
1034 | int bits = POINTER_SIZE; | |
1035 | const char *reg_stack = reg_names[STACK_POINTER_REGNUM]; | |
1036 | const char *reg_frame = reg_names[FRAME_POINTER_REGNUM]; | |
1037 | const char *reg_sspslot = reg_names[SOFTSTACK_SLOT_REGNUM]; | |
1038 | const char *reg_sspprev = reg_names[SOFTSTACK_PREV_REGNUM]; | |
1039 | fprintf (file, "\t.reg.u%d %s;\n", bits, reg_stack); | |
1040 | fprintf (file, "\t.reg.u%d %s;\n", bits, reg_frame); | |
1041 | fprintf (file, "\t.reg.u%d %s;\n", bits, reg_sspslot); | |
1042 | fprintf (file, "\t.reg.u%d %s;\n", bits, reg_sspprev); | |
1043 | fprintf (file, "\t{\n"); | |
1044 | fprintf (file, "\t\t.reg.u32 %%fstmp0;\n"); | |
1045 | fprintf (file, "\t\t.reg.u%d %%fstmp1;\n", bits); | |
1046 | fprintf (file, "\t\t.reg.u%d %%fstmp2;\n", bits); | |
1047 | fprintf (file, "\t\tmov.u32 %%fstmp0, %%tid.y;\n"); | |
1048 | fprintf (file, "\t\tmul%s.u32 %%fstmp1, %%fstmp0, %d;\n", | |
1049 | bits == 64 ? ".wide" : ".lo", bits / 8); | |
1050 | fprintf (file, "\t\tmov.u%d %%fstmp2, __nvptx_stacks;\n", bits); | |
1051 | ||
1052 | /* Initialize %sspslot = &__nvptx_stacks[tid.y]. */ | |
1053 | fprintf (file, "\t\tadd.u%d %s, %%fstmp2, %%fstmp1;\n", bits, reg_sspslot); | |
1054 | ||
1055 | /* Initialize %sspprev = __nvptx_stacks[tid.y]. */ | |
1056 | fprintf (file, "\t\tld.shared.u%d %s, [%s];\n", | |
1057 | bits, reg_sspprev, reg_sspslot); | |
1058 | ||
1059 | /* Initialize %frame = %sspprev - size. */ | |
1060 | fprintf (file, "\t\tsub.u%d %s, %s, " HOST_WIDE_INT_PRINT_DEC ";\n", | |
1061 | bits, reg_frame, reg_sspprev, size); | |
1062 | ||
1063 | /* Apply alignment, if larger than 64. */ | |
1064 | if (alignment > keep_align) | |
1065 | fprintf (file, "\t\tand.b%d %s, %s, %d;\n", | |
1066 | bits, reg_frame, reg_frame, -alignment); | |
1067 | ||
1068 | size = crtl->outgoing_args_size; | |
1069 | gcc_assert (size % keep_align == 0); | |
1070 | ||
1071 | /* Initialize %stack. */ | |
1072 | fprintf (file, "\t\tsub.u%d %s, %s, " HOST_WIDE_INT_PRINT_DEC ";\n", | |
1073 | bits, reg_stack, reg_frame, size); | |
1074 | ||
5012919d AM |
1075 | if (!crtl->is_leaf) |
1076 | fprintf (file, "\t\tst.shared.u%d [%s], %s;\n", | |
1077 | bits, reg_sspslot, reg_stack); | |
1078 | fprintf (file, "\t}\n"); | |
1079 | cfun->machine->has_softstack = true; | |
1080 | need_softstack_decl = true; | |
1081 | } | |
1082 | ||
d88cd9c4 NS |
1083 | /* Emit code to initialize the REGNO predicate register to indicate |
1084 | whether we are not lane zero on the NAME axis. */ | |
1085 | ||
1086 | static void | |
1087 | nvptx_init_axis_predicate (FILE *file, int regno, const char *name) | |
1088 | { | |
1089 | fprintf (file, "\t{\n"); | |
1090 | fprintf (file, "\t\t.reg.u32\t%%%s;\n", name); | |
1091 | fprintf (file, "\t\tmov.u32\t%%%s, %%tid.%s;\n", name, name); | |
1092 | fprintf (file, "\t\tsetp.ne.u32\t%%r%d, %%%s, 0;\n", regno, name); | |
1093 | fprintf (file, "\t}\n"); | |
1094 | } | |
1095 | ||
5012919d AM |
1096 | /* Emit code to initialize predicate and master lane index registers for |
1097 | -muniform-simt code generation variant. */ | |
1098 | ||
1099 | static void | |
1100 | nvptx_init_unisimt_predicate (FILE *file) | |
1101 | { | |
0c6b03b5 AM |
1102 | cfun->machine->unisimt_location = gen_reg_rtx (Pmode); |
1103 | int loc = REGNO (cfun->machine->unisimt_location); | |
5012919d | 1104 | int bits = POINTER_SIZE; |
0c6b03b5 | 1105 | fprintf (file, "\t.reg.u%d %%r%d;\n", bits, loc); |
5012919d AM |
1106 | fprintf (file, "\t{\n"); |
1107 | fprintf (file, "\t\t.reg.u32 %%ustmp0;\n"); | |
1108 | fprintf (file, "\t\t.reg.u%d %%ustmp1;\n", bits); | |
5012919d AM |
1109 | fprintf (file, "\t\tmov.u32 %%ustmp0, %%tid.y;\n"); |
1110 | fprintf (file, "\t\tmul%s.u32 %%ustmp1, %%ustmp0, 4;\n", | |
1111 | bits == 64 ? ".wide" : ".lo"); | |
0c6b03b5 AM |
1112 | fprintf (file, "\t\tmov.u%d %%r%d, __nvptx_uni;\n", bits, loc); |
1113 | fprintf (file, "\t\tadd.u%d %%r%d, %%r%d, %%ustmp1;\n", bits, loc, loc); | |
1114 | if (cfun->machine->unisimt_predicate) | |
1115 | { | |
1116 | int master = REGNO (cfun->machine->unisimt_master); | |
1117 | int pred = REGNO (cfun->machine->unisimt_predicate); | |
1118 | fprintf (file, "\t\tld.shared.u32 %%r%d, [%%r%d];\n", master, loc); | |
1119 | fprintf (file, "\t\tmov.u32 %%ustmp0, %%laneid;\n"); | |
1120 | /* Compute 'master lane index' as 'laneid & __nvptx_uni[tid.y]'. */ | |
1121 | fprintf (file, "\t\tand.b32 %%r%d, %%r%d, %%ustmp0;\n", master, master); | |
1122 | /* Compute predicate as 'tid.x == master'. */ | |
1123 | fprintf (file, "\t\tsetp.eq.u32 %%r%d, %%r%d, %%ustmp0;\n", pred, master); | |
1124 | } | |
5012919d AM |
1125 | fprintf (file, "\t}\n"); |
1126 | need_unisimt_decl = true; | |
1127 | } | |
1128 | ||
1129 | /* Emit kernel NAME for function ORIG outlined for an OpenMP 'target' region: | |
1130 | ||
1131 | extern void gomp_nvptx_main (void (*fn)(void*), void *fnarg); | |
1132 | void __attribute__((kernel)) NAME (void *arg, char *stack, size_t stacksize) | |
1133 | { | |
1134 | __nvptx_stacks[tid.y] = stack + stacksize * (ctaid.x * ntid.y + tid.y + 1); | |
1135 | __nvptx_uni[tid.y] = 0; | |
1136 | gomp_nvptx_main (ORIG, arg); | |
1137 | } | |
1138 | ORIG itself should not be emitted as a PTX .entry function. */ | |
1139 | ||
1140 | static void | |
1141 | write_omp_entry (FILE *file, const char *name, const char *orig) | |
1142 | { | |
1143 | static bool gomp_nvptx_main_declared; | |
1144 | if (!gomp_nvptx_main_declared) | |
1145 | { | |
1146 | gomp_nvptx_main_declared = true; | |
1147 | write_fn_marker (func_decls, false, true, "gomp_nvptx_main"); | |
1148 | func_decls << ".extern .func gomp_nvptx_main (.param.u" << POINTER_SIZE | |
1149 | << " %in_ar1, .param.u" << POINTER_SIZE << " %in_ar2);\n"; | |
1150 | } | |
3c5b4c6d TS |
1151 | /* PR79332. Single out this string; it confuses gcc.pot generation. */ |
1152 | #define NTID_Y "%ntid.y" | |
5012919d AM |
1153 | #define ENTRY_TEMPLATE(PS, PS_BYTES, MAD_PS_32) "\ |
1154 | (.param.u" PS " %arg, .param.u" PS " %stack, .param.u" PS " %sz)\n\ | |
1155 | {\n\ | |
1156 | .reg.u32 %r<3>;\n\ | |
1157 | .reg.u" PS " %R<4>;\n\ | |
1158 | mov.u32 %r0, %tid.y;\n\ | |
3c5b4c6d | 1159 | mov.u32 %r1, " NTID_Y ";\n\ |
5012919d AM |
1160 | mov.u32 %r2, %ctaid.x;\n\ |
1161 | cvt.u" PS ".u32 %R1, %r0;\n\ | |
1162 | " MAD_PS_32 " %R1, %r1, %r2, %R1;\n\ | |
1163 | mov.u" PS " %R0, __nvptx_stacks;\n\ | |
1164 | " MAD_PS_32 " %R0, %r0, " PS_BYTES ", %R0;\n\ | |
1165 | ld.param.u" PS " %R2, [%stack];\n\ | |
1166 | ld.param.u" PS " %R3, [%sz];\n\ | |
1167 | add.u" PS " %R2, %R2, %R3;\n\ | |
1168 | mad.lo.u" PS " %R2, %R1, %R3, %R2;\n\ | |
1169 | st.shared.u" PS " [%R0], %R2;\n\ | |
1170 | mov.u" PS " %R0, __nvptx_uni;\n\ | |
1171 | " MAD_PS_32 " %R0, %r0, 4, %R0;\n\ | |
1172 | mov.u32 %r0, 0;\n\ | |
1173 | st.shared.u32 [%R0], %r0;\n\ | |
1174 | mov.u" PS " %R0, \0;\n\ | |
1175 | ld.param.u" PS " %R1, [%arg];\n\ | |
1176 | {\n\ | |
1177 | .param.u" PS " %P<2>;\n\ | |
1178 | st.param.u" PS " [%P0], %R0;\n\ | |
1179 | st.param.u" PS " [%P1], %R1;\n\ | |
1180 | call.uni gomp_nvptx_main, (%P0, %P1);\n\ | |
1181 | }\n\ | |
1182 | ret.uni;\n\ | |
1183 | }\n" | |
1184 | static const char entry64[] = ENTRY_TEMPLATE ("64", "8", "mad.wide.u32"); | |
1185 | static const char entry32[] = ENTRY_TEMPLATE ("32", "4", "mad.lo.u32 "); | |
1186 | #undef ENTRY_TEMPLATE | |
3c5b4c6d | 1187 | #undef NTID_Y |
5012919d AM |
1188 | const char *entry_1 = TARGET_ABI64 ? entry64 : entry32; |
1189 | /* Position ENTRY_2 after the embedded nul using strlen of the prefix. */ | |
1190 | const char *entry_2 = entry_1 + strlen (entry64) + 1; | |
1191 | fprintf (file, ".visible .entry %s%s%s%s", name, entry_1, orig, entry_2); | |
1192 | need_softstack_decl = need_unisimt_decl = true; | |
1193 | } | |
1194 | ||
738f2522 BS |
1195 | /* Implement ASM_DECLARE_FUNCTION_NAME. Writes the start of a ptx |
1196 | function, including local var decls and copies from the arguments to | |
1197 | local regs. */ | |
1198 | ||
1199 | void | |
1200 | nvptx_declare_function_name (FILE *file, const char *name, const_tree decl) | |
1201 | { | |
1202 | tree fntype = TREE_TYPE (decl); | |
1203 | tree result_type = TREE_TYPE (fntype); | |
dc3d2aeb | 1204 | int argno = 0; |
738f2522 | 1205 | |
5012919d AM |
1206 | if (lookup_attribute ("omp target entrypoint", DECL_ATTRIBUTES (decl)) |
1207 | && !lookup_attribute ("oacc function", DECL_ATTRIBUTES (decl))) | |
1208 | { | |
1209 | char *buf = (char *) alloca (strlen (name) + sizeof ("$impl")); | |
1210 | sprintf (buf, "%s$impl", name); | |
1211 | write_omp_entry (file, name, buf); | |
1212 | name = buf; | |
1213 | } | |
dc3d2aeb NS |
1214 | /* We construct the initial part of the function into a string |
1215 | stream, in order to share the prototype writing code. */ | |
738f2522 | 1216 | std::stringstream s; |
b699adcc | 1217 | write_fn_proto (s, true, name, decl); |
dc3d2aeb | 1218 | s << "{\n"; |
738f2522 | 1219 | |
1f065954 | 1220 | bool return_in_mem = write_return_type (s, false, result_type); |
738f2522 | 1221 | if (return_in_mem) |
1f065954 | 1222 | argno = write_arg_type (s, 0, argno, ptr_type_node, true); |
dc3d2aeb | 1223 | |
5ab662d5 | 1224 | /* Declare and initialize incoming arguments. */ |
dc3d2aeb NS |
1225 | tree args = TYPE_ARG_TYPES (fntype); |
1226 | bool prototyped = true; | |
1227 | if (!args) | |
5ab662d5 | 1228 | { |
dc3d2aeb NS |
1229 | args = DECL_ARGUMENTS (decl); |
1230 | prototyped = false; | |
5ab662d5 NS |
1231 | } |
1232 | ||
1233 | for (; args != NULL_TREE; args = TREE_CHAIN (args)) | |
1234 | { | |
1235 | tree type = prototyped ? TREE_VALUE (args) : TREE_TYPE (args); | |
5ab662d5 | 1236 | |
1f065954 | 1237 | argno = write_arg_type (s, 0, argno, type, prototyped); |
dc3d2aeb | 1238 | } |
5ab662d5 | 1239 | |
dc3d2aeb | 1240 | if (stdarg_p (fntype)) |
5563d5c0 | 1241 | argno = write_arg_type (s, ARG_POINTER_REGNUM, argno, ptr_type_node, |
1f065954 | 1242 | true); |
5ab662d5 | 1243 | |
5563d5c0 NS |
1244 | if (DECL_STATIC_CHAIN (decl) || cfun->machine->has_chain) |
1245 | write_arg_type (s, STATIC_CHAIN_REGNUM, | |
1246 | DECL_STATIC_CHAIN (decl) ? argno : -1, ptr_type_node, | |
1247 | true); | |
1248 | ||
dc3d2aeb | 1249 | fprintf (file, "%s", s.str().c_str()); |
25662751 | 1250 | |
0c6b03b5 AM |
1251 | /* Usually 'crtl->is_leaf' is computed during register allocator |
1252 | initialization (which is not done on NVPTX) or for pressure-sensitive | |
1253 | optimizations. Initialize it here, except if already set. */ | |
1254 | if (!crtl->is_leaf) | |
1255 | crtl->is_leaf = leaf_function_p (); | |
1256 | ||
44c068ae | 1257 | HOST_WIDE_INT sz = get_frame_size (); |
5012919d AM |
1258 | bool need_frameptr = sz || cfun->machine->has_chain; |
1259 | int alignment = crtl->stack_alignment_needed / BITS_PER_UNIT; | |
1260 | if (!TARGET_SOFT_STACK) | |
1261 | { | |
1262 | /* Declare a local var for outgoing varargs. */ | |
1263 | if (cfun->machine->has_varadic) | |
1264 | init_frame (file, STACK_POINTER_REGNUM, | |
1265 | UNITS_PER_WORD, crtl->outgoing_args_size); | |
1266 | ||
1267 | /* Declare a local variable for the frame. Force its size to be | |
1268 | DImode-compatible. */ | |
1269 | if (need_frameptr) | |
1270 | init_frame (file, FRAME_POINTER_REGNUM, alignment, | |
1271 | ROUND_UP (sz, GET_MODE_SIZE (DImode))); | |
1272 | } | |
0c6b03b5 AM |
1273 | else if (need_frameptr || cfun->machine->has_varadic || cfun->calls_alloca |
1274 | || (cfun->machine->has_simtreg && !crtl->is_leaf)) | |
5012919d | 1275 | init_softstack_frame (file, alignment, sz); |
44c068ae | 1276 | |
0c6b03b5 AM |
1277 | if (cfun->machine->has_simtreg) |
1278 | { | |
1279 | unsigned HOST_WIDE_INT &simtsz = cfun->machine->simt_stack_size; | |
1280 | unsigned HOST_WIDE_INT &align = cfun->machine->simt_stack_align; | |
1281 | align = MAX (align, GET_MODE_SIZE (DImode)); | |
1282 | if (!crtl->is_leaf || cfun->calls_alloca) | |
1283 | simtsz = HOST_WIDE_INT_M1U; | |
1284 | if (simtsz == HOST_WIDE_INT_M1U) | |
1285 | simtsz = nvptx_softstack_size; | |
1286 | if (cfun->machine->has_softstack) | |
1287 | simtsz += POINTER_SIZE / 8; | |
1288 | simtsz = ROUND_UP (simtsz, GET_MODE_SIZE (DImode)); | |
1289 | if (align > GET_MODE_SIZE (DImode)) | |
1290 | simtsz += align - GET_MODE_SIZE (DImode); | |
1291 | if (simtsz) | |
1292 | fprintf (file, "\t.local.align 8 .b8 %%simtstack_ar[" | |
1293 | HOST_WIDE_INT_PRINT_DEC "];\n", simtsz); | |
1294 | } | |
738f2522 BS |
1295 | /* Declare the pseudos we have as ptx registers. */ |
1296 | int maxregs = max_reg_num (); | |
1297 | for (int i = LAST_VIRTUAL_REGISTER + 1; i < maxregs; i++) | |
1298 | { | |
1299 | if (regno_reg_rtx[i] != const0_rtx) | |
1300 | { | |
1301 | machine_mode mode = PSEUDO_REGNO_MODE (i); | |
d7479262 | 1302 | machine_mode split = maybe_split_mode (mode); |
f313d112 | 1303 | |
38827811 | 1304 | if (split_mode_p (mode)) |
f313d112 NS |
1305 | mode = split; |
1306 | fprintf (file, "\t.reg%s ", nvptx_ptx_type_from_mode (mode, true)); | |
1307 | output_reg (file, i, split, -2); | |
1308 | fprintf (file, ";\n"); | |
738f2522 BS |
1309 | } |
1310 | } | |
1311 | ||
d88cd9c4 NS |
1312 | /* Emit axis predicates. */ |
1313 | if (cfun->machine->axis_predicate[0]) | |
1314 | nvptx_init_axis_predicate (file, | |
1315 | REGNO (cfun->machine->axis_predicate[0]), "y"); | |
1316 | if (cfun->machine->axis_predicate[1]) | |
1317 | nvptx_init_axis_predicate (file, | |
1318 | REGNO (cfun->machine->axis_predicate[1]), "x"); | |
0c6b03b5 AM |
1319 | if (cfun->machine->unisimt_predicate |
1320 | || (cfun->machine->has_simtreg && !crtl->is_leaf)) | |
5012919d | 1321 | nvptx_init_unisimt_predicate (file); |
738f2522 BS |
1322 | } |
1323 | ||
0c6b03b5 AM |
1324 | /* Output code for switching uniform-simt state. ENTERING indicates whether |
1325 | we are entering or leaving non-uniform execution region. */ | |
1326 | ||
1327 | static void | |
1328 | nvptx_output_unisimt_switch (FILE *file, bool entering) | |
1329 | { | |
1330 | if (crtl->is_leaf && !cfun->machine->unisimt_predicate) | |
1331 | return; | |
1332 | fprintf (file, "\t{\n"); | |
1333 | fprintf (file, "\t\t.reg.u32 %%ustmp2;\n"); | |
1334 | fprintf (file, "\t\tmov.u32 %%ustmp2, %d;\n", entering ? -1 : 0); | |
1335 | if (!crtl->is_leaf) | |
1336 | { | |
1337 | int loc = REGNO (cfun->machine->unisimt_location); | |
1338 | fprintf (file, "\t\tst.shared.u32 [%%r%d], %%ustmp2;\n", loc); | |
1339 | } | |
1340 | if (cfun->machine->unisimt_predicate) | |
1341 | { | |
1342 | int master = REGNO (cfun->machine->unisimt_master); | |
1343 | int pred = REGNO (cfun->machine->unisimt_predicate); | |
1344 | fprintf (file, "\t\tmov.u32 %%ustmp2, %%laneid;\n"); | |
1345 | fprintf (file, "\t\tmov.u32 %%r%d, %s;\n", | |
1346 | master, entering ? "%ustmp2" : "0"); | |
1347 | fprintf (file, "\t\tsetp.eq.u32 %%r%d, %%r%d, %%ustmp2;\n", pred, master); | |
1348 | } | |
1349 | fprintf (file, "\t}\n"); | |
1350 | } | |
1351 | ||
1352 | /* Output code for allocating per-lane storage and switching soft-stack pointer. | |
1353 | ENTERING indicates whether we are entering or leaving non-uniform execution. | |
1354 | PTR is the register pointing to allocated storage, it is assigned to on | |
1355 | entering and used to restore state on leaving. SIZE and ALIGN are used only | |
1356 | on entering. */ | |
1357 | ||
1358 | static void | |
1359 | nvptx_output_softstack_switch (FILE *file, bool entering, | |
1360 | rtx ptr, rtx size, rtx align) | |
1361 | { | |
1362 | gcc_assert (REG_P (ptr) && !HARD_REGISTER_P (ptr)); | |
1363 | if (crtl->is_leaf && !cfun->machine->simt_stack_size) | |
1364 | return; | |
1365 | int bits = POINTER_SIZE, regno = REGNO (ptr); | |
1366 | fprintf (file, "\t{\n"); | |
1367 | if (entering) | |
1368 | { | |
1369 | fprintf (file, "\t\tcvta.local.u%d %%r%d, %%simtstack_ar + " | |
1370 | HOST_WIDE_INT_PRINT_DEC ";\n", bits, regno, | |
1371 | cfun->machine->simt_stack_size); | |
1372 | fprintf (file, "\t\tsub.u%d %%r%d, %%r%d, ", bits, regno, regno); | |
1373 | if (CONST_INT_P (size)) | |
1374 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, | |
1375 | ROUND_UP (UINTVAL (size), GET_MODE_SIZE (DImode))); | |
1376 | else | |
1377 | output_reg (file, REGNO (size), VOIDmode); | |
1378 | fputs (";\n", file); | |
1379 | if (!CONST_INT_P (size) || UINTVAL (align) > GET_MODE_SIZE (DImode)) | |
77734296 AM |
1380 | fprintf (file, |
1381 | "\t\tand.u%d %%r%d, %%r%d, -" HOST_WIDE_INT_PRINT_DEC ";\n", | |
0c6b03b5 AM |
1382 | bits, regno, regno, UINTVAL (align)); |
1383 | } | |
1384 | if (cfun->machine->has_softstack) | |
1385 | { | |
1386 | const char *reg_stack = reg_names[STACK_POINTER_REGNUM]; | |
1387 | if (entering) | |
1388 | { | |
1389 | fprintf (file, "\t\tst.u%d [%%r%d + -%d], %s;\n", | |
1390 | bits, regno, bits / 8, reg_stack); | |
1391 | fprintf (file, "\t\tsub.u%d %s, %%r%d, %d;\n", | |
1392 | bits, reg_stack, regno, bits / 8); | |
1393 | } | |
1394 | else | |
1395 | { | |
1396 | fprintf (file, "\t\tld.u%d %s, [%%r%d + -%d];\n", | |
1397 | bits, reg_stack, regno, bits / 8); | |
1398 | } | |
1399 | nvptx_output_set_softstack (REGNO (stack_pointer_rtx)); | |
1400 | } | |
1401 | fprintf (file, "\t}\n"); | |
1402 | } | |
1403 | ||
1404 | /* Output code to enter non-uniform execution region. DEST is a register | |
1405 | to hold a per-lane allocation given by SIZE and ALIGN. */ | |
1406 | ||
1407 | const char * | |
1408 | nvptx_output_simt_enter (rtx dest, rtx size, rtx align) | |
1409 | { | |
1410 | nvptx_output_unisimt_switch (asm_out_file, true); | |
1411 | nvptx_output_softstack_switch (asm_out_file, true, dest, size, align); | |
1412 | return ""; | |
1413 | } | |
1414 | ||
1415 | /* Output code to leave non-uniform execution region. SRC is the register | |
1416 | holding per-lane storage previously allocated by omp_simt_enter insn. */ | |
1417 | ||
1418 | const char * | |
1419 | nvptx_output_simt_exit (rtx src) | |
1420 | { | |
1421 | nvptx_output_unisimt_switch (asm_out_file, false); | |
1422 | nvptx_output_softstack_switch (asm_out_file, false, src, NULL_RTX, NULL_RTX); | |
1423 | return ""; | |
1424 | } | |
1425 | ||
5012919d AM |
1426 | /* Output instruction that sets soft stack pointer in shared memory to the |
1427 | value in register given by SRC_REGNO. */ | |
1428 | ||
1429 | const char * | |
1430 | nvptx_output_set_softstack (unsigned src_regno) | |
1431 | { | |
1432 | if (cfun->machine->has_softstack && !crtl->is_leaf) | |
1433 | { | |
1434 | fprintf (asm_out_file, "\tst.shared.u%d\t[%s], ", | |
1435 | POINTER_SIZE, reg_names[SOFTSTACK_SLOT_REGNUM]); | |
1436 | output_reg (asm_out_file, src_regno, VOIDmode); | |
1437 | fprintf (asm_out_file, ";\n"); | |
1438 | } | |
1439 | return ""; | |
1440 | } | |
738f2522 BS |
1441 | /* Output a return instruction. Also copy the return value to its outgoing |
1442 | location. */ | |
1443 | ||
1444 | const char * | |
1445 | nvptx_output_return (void) | |
1446 | { | |
44c068ae | 1447 | machine_mode mode = (machine_mode)cfun->machine->return_mode; |
25662751 NS |
1448 | |
1449 | if (mode != VOIDmode) | |
1f065954 NS |
1450 | fprintf (asm_out_file, "\tst.param%s\t[%s_out], %s;\n", |
1451 | nvptx_ptx_type_from_mode (mode, false), | |
1452 | reg_names[NVPTX_RETURN_REGNUM], | |
1453 | reg_names[NVPTX_RETURN_REGNUM]); | |
738f2522 BS |
1454 | |
1455 | return "ret;"; | |
1456 | } | |
1457 | ||
738f2522 BS |
1458 | /* Terminate a function by writing a closing brace to FILE. */ |
1459 | ||
1460 | void | |
1461 | nvptx_function_end (FILE *file) | |
1462 | { | |
cf08c344 | 1463 | fprintf (file, "}\n"); |
738f2522 BS |
1464 | } |
1465 | \f | |
1466 | /* Decide whether we can make a sibling call to a function. For ptx, we | |
1467 | can't. */ | |
1468 | ||
1469 | static bool | |
1470 | nvptx_function_ok_for_sibcall (tree, tree) | |
1471 | { | |
1472 | return false; | |
1473 | } | |
1474 | ||
18c05628 NS |
1475 | /* Return Dynamic ReAlignment Pointer RTX. For PTX there isn't any. */ |
1476 | ||
1477 | static rtx | |
1478 | nvptx_get_drap_rtx (void) | |
1479 | { | |
5012919d AM |
1480 | if (TARGET_SOFT_STACK && stack_realign_drap) |
1481 | return arg_pointer_rtx; | |
18c05628 NS |
1482 | return NULL_RTX; |
1483 | } | |
1484 | ||
738f2522 BS |
1485 | /* Implement the TARGET_CALL_ARGS hook. Record information about one |
1486 | argument to the next call. */ | |
1487 | ||
1488 | static void | |
44c068ae | 1489 | nvptx_call_args (rtx arg, tree fntype) |
738f2522 | 1490 | { |
44c068ae | 1491 | if (!cfun->machine->doing_call) |
738f2522 | 1492 | { |
44c068ae NS |
1493 | cfun->machine->doing_call = true; |
1494 | cfun->machine->is_varadic = false; | |
1495 | cfun->machine->num_args = 0; | |
1496 | ||
1497 | if (fntype && stdarg_p (fntype)) | |
1498 | { | |
1499 | cfun->machine->is_varadic = true; | |
1500 | cfun->machine->has_varadic = true; | |
1501 | cfun->machine->num_args++; | |
1502 | } | |
738f2522 | 1503 | } |
738f2522 | 1504 | |
44c068ae NS |
1505 | if (REG_P (arg) && arg != pc_rtx) |
1506 | { | |
1507 | cfun->machine->num_args++; | |
1508 | cfun->machine->call_args = alloc_EXPR_LIST (VOIDmode, arg, | |
1509 | cfun->machine->call_args); | |
1510 | } | |
738f2522 BS |
1511 | } |
1512 | ||
1513 | /* Implement the corresponding END_CALL_ARGS hook. Clear and free the | |
1514 | information we recorded. */ | |
1515 | ||
1516 | static void | |
1517 | nvptx_end_call_args (void) | |
1518 | { | |
44c068ae | 1519 | cfun->machine->doing_call = false; |
738f2522 BS |
1520 | free_EXPR_LIST_list (&cfun->machine->call_args); |
1521 | } | |
1522 | ||
ecf6e535 BS |
1523 | /* Emit the sequence for a call to ADDRESS, setting RETVAL. Keep |
1524 | track of whether calls involving static chains or varargs were seen | |
1525 | in the current function. | |
1526 | For libcalls, maintain a hash table of decls we have seen, and | |
1527 | record a function decl for later when encountering a new one. */ | |
738f2522 BS |
1528 | |
1529 | void | |
1530 | nvptx_expand_call (rtx retval, rtx address) | |
1531 | { | |
738f2522 | 1532 | rtx callee = XEXP (address, 0); |
f324806d | 1533 | rtx varargs = NULL_RTX; |
d88cd9c4 | 1534 | unsigned parallel = 0; |
738f2522 | 1535 | |
738f2522 BS |
1536 | if (!call_insn_operand (callee, Pmode)) |
1537 | { | |
1538 | callee = force_reg (Pmode, callee); | |
1539 | address = change_address (address, QImode, callee); | |
1540 | } | |
1541 | ||
1542 | if (GET_CODE (callee) == SYMBOL_REF) | |
1543 | { | |
1544 | tree decl = SYMBOL_REF_DECL (callee); | |
1545 | if (decl != NULL_TREE) | |
1546 | { | |
738f2522 | 1547 | if (DECL_STATIC_CHAIN (decl)) |
44c068ae | 1548 | cfun->machine->has_chain = true; |
00e52418 | 1549 | |
629b3d75 | 1550 | tree attr = oacc_get_fn_attrib (decl); |
d88cd9c4 NS |
1551 | if (attr) |
1552 | { | |
1553 | tree dims = TREE_VALUE (attr); | |
1554 | ||
1555 | parallel = GOMP_DIM_MASK (GOMP_DIM_MAX) - 1; | |
1556 | for (int ix = 0; ix != GOMP_DIM_MAX; ix++) | |
1557 | { | |
1558 | if (TREE_PURPOSE (dims) | |
1559 | && !integer_zerop (TREE_PURPOSE (dims))) | |
1560 | break; | |
1561 | /* Not on this axis. */ | |
1562 | parallel ^= GOMP_DIM_MASK (ix); | |
1563 | dims = TREE_CHAIN (dims); | |
1564 | } | |
1565 | } | |
738f2522 BS |
1566 | } |
1567 | } | |
c38f0d8c | 1568 | |
44c068ae NS |
1569 | unsigned nargs = cfun->machine->num_args; |
1570 | if (cfun->machine->is_varadic) | |
738f2522 | 1571 | { |
f324806d | 1572 | varargs = gen_reg_rtx (Pmode); |
863af9a4 | 1573 | emit_move_insn (varargs, stack_pointer_rtx); |
738f2522 BS |
1574 | } |
1575 | ||
44c068ae NS |
1576 | rtvec vec = rtvec_alloc (nargs + 1); |
1577 | rtx pat = gen_rtx_PARALLEL (VOIDmode, vec); | |
f324806d | 1578 | int vec_pos = 0; |
44c068ae NS |
1579 | |
1580 | rtx call = gen_rtx_CALL (VOIDmode, address, const0_rtx); | |
738f2522 | 1581 | rtx tmp_retval = retval; |
44c068ae | 1582 | if (retval) |
738f2522 BS |
1583 | { |
1584 | if (!nvptx_register_operand (retval, GET_MODE (retval))) | |
1585 | tmp_retval = gen_reg_rtx (GET_MODE (retval)); | |
44c068ae | 1586 | call = gen_rtx_SET (tmp_retval, call); |
738f2522 | 1587 | } |
44c068ae | 1588 | XVECEXP (pat, 0, vec_pos++) = call; |
f324806d NS |
1589 | |
1590 | /* Construct the call insn, including a USE for each argument pseudo | |
1591 | register. These will be used when printing the insn. */ | |
1592 | for (rtx arg = cfun->machine->call_args; arg; arg = XEXP (arg, 1)) | |
44c068ae | 1593 | XVECEXP (pat, 0, vec_pos++) = gen_rtx_USE (VOIDmode, XEXP (arg, 0)); |
f324806d NS |
1594 | |
1595 | if (varargs) | |
cf08c344 | 1596 | XVECEXP (pat, 0, vec_pos++) = gen_rtx_USE (VOIDmode, varargs); |
f324806d NS |
1597 | |
1598 | gcc_assert (vec_pos = XVECLEN (pat, 0)); | |
ecf6e535 | 1599 | |
d88cd9c4 | 1600 | nvptx_emit_forking (parallel, true); |
738f2522 | 1601 | emit_call_insn (pat); |
d88cd9c4 NS |
1602 | nvptx_emit_joining (parallel, true); |
1603 | ||
738f2522 BS |
1604 | if (tmp_retval != retval) |
1605 | emit_move_insn (retval, tmp_retval); | |
1606 | } | |
44eba92d | 1607 | |
738f2522 BS |
1608 | /* Emit a comparison COMPARE, and return the new test to be used in the |
1609 | jump. */ | |
1610 | ||
1611 | rtx | |
1612 | nvptx_expand_compare (rtx compare) | |
1613 | { | |
1614 | rtx pred = gen_reg_rtx (BImode); | |
1615 | rtx cmp = gen_rtx_fmt_ee (GET_CODE (compare), BImode, | |
1616 | XEXP (compare, 0), XEXP (compare, 1)); | |
f7df4a84 | 1617 | emit_insn (gen_rtx_SET (pred, cmp)); |
738f2522 BS |
1618 | return gen_rtx_NE (BImode, pred, const0_rtx); |
1619 | } | |
1620 | ||
d88cd9c4 NS |
1621 | /* Expand the oacc fork & join primitive into ptx-required unspecs. */ |
1622 | ||
1623 | void | |
1624 | nvptx_expand_oacc_fork (unsigned mode) | |
1625 | { | |
1626 | nvptx_emit_forking (GOMP_DIM_MASK (mode), false); | |
1627 | } | |
1628 | ||
1629 | void | |
1630 | nvptx_expand_oacc_join (unsigned mode) | |
1631 | { | |
1632 | nvptx_emit_joining (GOMP_DIM_MASK (mode), false); | |
1633 | } | |
1634 | ||
1635 | /* Generate instruction(s) to unpack a 64 bit object into 2 32 bit | |
1636 | objects. */ | |
1637 | ||
1638 | static rtx | |
1639 | nvptx_gen_unpack (rtx dst0, rtx dst1, rtx src) | |
1640 | { | |
1641 | rtx res; | |
1642 | ||
1643 | switch (GET_MODE (src)) | |
1644 | { | |
4e10a5a7 | 1645 | case E_DImode: |
d88cd9c4 NS |
1646 | res = gen_unpackdisi2 (dst0, dst1, src); |
1647 | break; | |
4e10a5a7 | 1648 | case E_DFmode: |
d88cd9c4 NS |
1649 | res = gen_unpackdfsi2 (dst0, dst1, src); |
1650 | break; | |
1651 | default: gcc_unreachable (); | |
1652 | } | |
1653 | return res; | |
1654 | } | |
1655 | ||
1656 | /* Generate instruction(s) to pack 2 32 bit objects into a 64 bit | |
1657 | object. */ | |
1658 | ||
1659 | static rtx | |
1660 | nvptx_gen_pack (rtx dst, rtx src0, rtx src1) | |
1661 | { | |
1662 | rtx res; | |
1663 | ||
1664 | switch (GET_MODE (dst)) | |
1665 | { | |
4e10a5a7 | 1666 | case E_DImode: |
d88cd9c4 NS |
1667 | res = gen_packsidi2 (dst, src0, src1); |
1668 | break; | |
4e10a5a7 | 1669 | case E_DFmode: |
d88cd9c4 NS |
1670 | res = gen_packsidf2 (dst, src0, src1); |
1671 | break; | |
1672 | default: gcc_unreachable (); | |
1673 | } | |
1674 | return res; | |
1675 | } | |
1676 | ||
1677 | /* Generate an instruction or sequence to broadcast register REG | |
1678 | across the vectors of a single warp. */ | |
1679 | ||
5012919d | 1680 | rtx |
59263259 | 1681 | nvptx_gen_shuffle (rtx dst, rtx src, rtx idx, nvptx_shuffle_kind kind) |
d88cd9c4 NS |
1682 | { |
1683 | rtx res; | |
1684 | ||
1685 | switch (GET_MODE (dst)) | |
1686 | { | |
4e10a5a7 | 1687 | case E_SImode: |
d88cd9c4 NS |
1688 | res = gen_nvptx_shufflesi (dst, src, idx, GEN_INT (kind)); |
1689 | break; | |
4e10a5a7 | 1690 | case E_SFmode: |
d88cd9c4 NS |
1691 | res = gen_nvptx_shufflesf (dst, src, idx, GEN_INT (kind)); |
1692 | break; | |
4e10a5a7 RS |
1693 | case E_DImode: |
1694 | case E_DFmode: | |
d88cd9c4 NS |
1695 | { |
1696 | rtx tmp0 = gen_reg_rtx (SImode); | |
1697 | rtx tmp1 = gen_reg_rtx (SImode); | |
1698 | ||
1699 | start_sequence (); | |
1700 | emit_insn (nvptx_gen_unpack (tmp0, tmp1, src)); | |
1701 | emit_insn (nvptx_gen_shuffle (tmp0, tmp0, idx, kind)); | |
1702 | emit_insn (nvptx_gen_shuffle (tmp1, tmp1, idx, kind)); | |
1703 | emit_insn (nvptx_gen_pack (dst, tmp0, tmp1)); | |
1704 | res = get_insns (); | |
1705 | end_sequence (); | |
1706 | } | |
1707 | break; | |
4e10a5a7 | 1708 | case E_BImode: |
d88cd9c4 NS |
1709 | { |
1710 | rtx tmp = gen_reg_rtx (SImode); | |
1711 | ||
1712 | start_sequence (); | |
1713 | emit_insn (gen_sel_truesi (tmp, src, GEN_INT (1), const0_rtx)); | |
1714 | emit_insn (nvptx_gen_shuffle (tmp, tmp, idx, kind)); | |
1715 | emit_insn (gen_rtx_SET (dst, gen_rtx_NE (BImode, tmp, const0_rtx))); | |
1716 | res = get_insns (); | |
1717 | end_sequence (); | |
1718 | } | |
1719 | break; | |
4e10a5a7 RS |
1720 | case E_QImode: |
1721 | case E_HImode: | |
d5ace3b5 CP |
1722 | { |
1723 | rtx tmp = gen_reg_rtx (SImode); | |
1724 | ||
1725 | start_sequence (); | |
1726 | emit_insn (gen_rtx_SET (tmp, gen_rtx_fmt_e (ZERO_EXTEND, SImode, src))); | |
1727 | emit_insn (nvptx_gen_shuffle (tmp, tmp, idx, kind)); | |
1728 | emit_insn (gen_rtx_SET (dst, gen_rtx_fmt_e (TRUNCATE, GET_MODE (dst), | |
1729 | tmp))); | |
1730 | res = get_insns (); | |
1731 | end_sequence (); | |
1732 | } | |
1733 | break; | |
d88cd9c4 NS |
1734 | |
1735 | default: | |
1736 | gcc_unreachable (); | |
1737 | } | |
1738 | return res; | |
1739 | } | |
1740 | ||
1741 | /* Generate an instruction or sequence to broadcast register REG | |
1742 | across the vectors of a single warp. */ | |
1743 | ||
1744 | static rtx | |
1745 | nvptx_gen_vcast (rtx reg) | |
1746 | { | |
1747 | return nvptx_gen_shuffle (reg, reg, const0_rtx, SHUFFLE_IDX); | |
1748 | } | |
1749 | ||
1750 | /* Structure used when generating a worker-level spill or fill. */ | |
1751 | ||
1752 | struct wcast_data_t | |
1753 | { | |
1754 | rtx base; /* Register holding base addr of buffer. */ | |
1755 | rtx ptr; /* Iteration var, if needed. */ | |
1756 | unsigned offset; /* Offset into worker buffer. */ | |
1757 | }; | |
1758 | ||
1759 | /* Direction of the spill/fill and looping setup/teardown indicator. */ | |
1760 | ||
1761 | enum propagate_mask | |
1762 | { | |
1763 | PM_read = 1 << 0, | |
1764 | PM_write = 1 << 1, | |
1765 | PM_loop_begin = 1 << 2, | |
1766 | PM_loop_end = 1 << 3, | |
1767 | ||
1768 | PM_read_write = PM_read | PM_write | |
1769 | }; | |
1770 | ||
1771 | /* Generate instruction(s) to spill or fill register REG to/from the | |
1772 | worker broadcast array. PM indicates what is to be done, REP | |
1773 | how many loop iterations will be executed (0 for not a loop). */ | |
1774 | ||
1775 | static rtx | |
1776 | nvptx_gen_wcast (rtx reg, propagate_mask pm, unsigned rep, wcast_data_t *data) | |
1777 | { | |
1778 | rtx res; | |
1779 | machine_mode mode = GET_MODE (reg); | |
1780 | ||
1781 | switch (mode) | |
1782 | { | |
4e10a5a7 | 1783 | case E_BImode: |
d88cd9c4 NS |
1784 | { |
1785 | rtx tmp = gen_reg_rtx (SImode); | |
1786 | ||
1787 | start_sequence (); | |
1788 | if (pm & PM_read) | |
1789 | emit_insn (gen_sel_truesi (tmp, reg, GEN_INT (1), const0_rtx)); | |
1790 | emit_insn (nvptx_gen_wcast (tmp, pm, rep, data)); | |
1791 | if (pm & PM_write) | |
1792 | emit_insn (gen_rtx_SET (reg, gen_rtx_NE (BImode, tmp, const0_rtx))); | |
1793 | res = get_insns (); | |
1794 | end_sequence (); | |
1795 | } | |
1796 | break; | |
1797 | ||
1798 | default: | |
1799 | { | |
1800 | rtx addr = data->ptr; | |
1801 | ||
1802 | if (!addr) | |
1803 | { | |
1804 | unsigned align = GET_MODE_ALIGNMENT (mode) / BITS_PER_UNIT; | |
1805 | ||
1806 | if (align > worker_bcast_align) | |
1807 | worker_bcast_align = align; | |
1808 | data->offset = (data->offset + align - 1) & ~(align - 1); | |
1809 | addr = data->base; | |
1810 | if (data->offset) | |
1811 | addr = gen_rtx_PLUS (Pmode, addr, GEN_INT (data->offset)); | |
1812 | } | |
1813 | ||
1814 | addr = gen_rtx_MEM (mode, addr); | |
d88cd9c4 NS |
1815 | if (pm == PM_read) |
1816 | res = gen_rtx_SET (addr, reg); | |
1817 | else if (pm == PM_write) | |
1818 | res = gen_rtx_SET (reg, addr); | |
1819 | else | |
1820 | gcc_unreachable (); | |
1821 | ||
1822 | if (data->ptr) | |
1823 | { | |
1824 | /* We're using a ptr, increment it. */ | |
1825 | start_sequence (); | |
1826 | ||
1827 | emit_insn (res); | |
1828 | emit_insn (gen_adddi3 (data->ptr, data->ptr, | |
1829 | GEN_INT (GET_MODE_SIZE (GET_MODE (reg))))); | |
1830 | res = get_insns (); | |
1831 | end_sequence (); | |
1832 | } | |
1833 | else | |
1834 | rep = 1; | |
1835 | data->offset += rep * GET_MODE_SIZE (GET_MODE (reg)); | |
1836 | } | |
1837 | break; | |
1838 | } | |
1839 | return res; | |
1840 | } | |
738f2522 BS |
1841 | \f |
1842 | /* Returns true if X is a valid address for use in a memory reference. */ | |
1843 | ||
1844 | static bool | |
1845 | nvptx_legitimate_address_p (machine_mode, rtx x, bool) | |
1846 | { | |
1847 | enum rtx_code code = GET_CODE (x); | |
1848 | ||
1849 | switch (code) | |
1850 | { | |
1851 | case REG: | |
1852 | return true; | |
1853 | ||
1854 | case PLUS: | |
1855 | if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))) | |
1856 | return true; | |
1857 | return false; | |
1858 | ||
1859 | case CONST: | |
1860 | case SYMBOL_REF: | |
1861 | case LABEL_REF: | |
1862 | return true; | |
1863 | ||
1864 | default: | |
1865 | return false; | |
1866 | } | |
1867 | } | |
738f2522 | 1868 | \f |
4d5438cd NS |
1869 | /* Machinery to output constant initializers. When beginning an |
1870 | initializer, we decide on a fragment size (which is visible in ptx | |
1871 | in the type used), and then all initializer data is buffered until | |
1872 | a fragment is filled and ready to be written out. */ | |
1873 | ||
1874 | static struct | |
1875 | { | |
1876 | unsigned HOST_WIDE_INT mask; /* Mask for storing fragment. */ | |
1877 | unsigned HOST_WIDE_INT val; /* Current fragment value. */ | |
1878 | unsigned HOST_WIDE_INT remaining; /* Remaining bytes to be written | |
1879 | out. */ | |
1880 | unsigned size; /* Fragment size to accumulate. */ | |
1881 | unsigned offset; /* Offset within current fragment. */ | |
1882 | bool started; /* Whether we've output any initializer. */ | |
1883 | } init_frag; | |
1884 | ||
1885 | /* The current fragment is full, write it out. SYM may provide a | |
1886 | symbolic reference we should output, in which case the fragment | |
1887 | value is the addend. */ | |
738f2522 BS |
1888 | |
1889 | static void | |
4d5438cd | 1890 | output_init_frag (rtx sym) |
738f2522 | 1891 | { |
4d5438cd NS |
1892 | fprintf (asm_out_file, init_frag.started ? ", " : " = { "); |
1893 | unsigned HOST_WIDE_INT val = init_frag.val; | |
738f2522 | 1894 | |
4d5438cd NS |
1895 | init_frag.started = true; |
1896 | init_frag.val = 0; | |
1897 | init_frag.offset = 0; | |
1898 | init_frag.remaining--; | |
1899 | ||
1900 | if (sym) | |
1901 | { | |
6c7c4708 CP |
1902 | bool function = (SYMBOL_REF_DECL (sym) |
1903 | && (TREE_CODE (SYMBOL_REF_DECL (sym)) == FUNCTION_DECL)); | |
1904 | if (!function) | |
1905 | fprintf (asm_out_file, "generic("); | |
4d5438cd | 1906 | output_address (VOIDmode, sym); |
6c7c4708 CP |
1907 | if (!function) |
1908 | fprintf (asm_out_file, ")"); | |
1909 | if (val) | |
1910 | fprintf (asm_out_file, " + "); | |
4d5438cd | 1911 | } |
738f2522 | 1912 | |
4d5438cd NS |
1913 | if (!sym || val) |
1914 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, val); | |
738f2522 BS |
1915 | } |
1916 | ||
4d5438cd NS |
1917 | /* Add value VAL of size SIZE to the data we're emitting, and keep |
1918 | writing out chunks as they fill up. */ | |
738f2522 BS |
1919 | |
1920 | static void | |
4d5438cd | 1921 | nvptx_assemble_value (unsigned HOST_WIDE_INT val, unsigned size) |
738f2522 | 1922 | { |
4d5438cd NS |
1923 | val &= ((unsigned HOST_WIDE_INT)2 << (size * BITS_PER_UNIT - 1)) - 1; |
1924 | ||
1925 | for (unsigned part = 0; size; size -= part) | |
738f2522 | 1926 | { |
4d5438cd NS |
1927 | val >>= part * BITS_PER_UNIT; |
1928 | part = init_frag.size - init_frag.offset; | |
1929 | if (part > size) | |
1930 | part = size; | |
1931 | ||
1932 | unsigned HOST_WIDE_INT partial | |
1933 | = val << (init_frag.offset * BITS_PER_UNIT); | |
1934 | init_frag.val |= partial & init_frag.mask; | |
1935 | init_frag.offset += part; | |
1936 | ||
1937 | if (init_frag.offset == init_frag.size) | |
1938 | output_init_frag (NULL); | |
738f2522 BS |
1939 | } |
1940 | } | |
1941 | ||
1942 | /* Target hook for assembling integer object X of size SIZE. */ | |
1943 | ||
1944 | static bool | |
1945 | nvptx_assemble_integer (rtx x, unsigned int size, int ARG_UNUSED (aligned_p)) | |
1946 | { | |
00e52418 NS |
1947 | HOST_WIDE_INT val = 0; |
1948 | ||
1949 | switch (GET_CODE (x)) | |
738f2522 | 1950 | { |
00e52418 | 1951 | default: |
a9000e1e NS |
1952 | /* Let the generic machinery figure it out, usually for a |
1953 | CONST_WIDE_INT. */ | |
1954 | return false; | |
00e52418 NS |
1955 | |
1956 | case CONST_INT: | |
4d5438cd | 1957 | nvptx_assemble_value (INTVAL (x), size); |
00e52418 NS |
1958 | break; |
1959 | ||
1960 | case CONST: | |
1961 | x = XEXP (x, 0); | |
1962 | gcc_assert (GET_CODE (x) == PLUS); | |
1963 | val = INTVAL (XEXP (x, 1)); | |
1964 | x = XEXP (x, 0); | |
1965 | gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
1966 | /* FALLTHROUGH */ | |
1967 | ||
1968 | case SYMBOL_REF: | |
4d5438cd NS |
1969 | gcc_assert (size == init_frag.size); |
1970 | if (init_frag.offset) | |
738f2522 | 1971 | sorry ("cannot emit unaligned pointers in ptx assembly"); |
738f2522 | 1972 | |
00e52418 | 1973 | nvptx_maybe_record_fnsym (x); |
4d5438cd NS |
1974 | init_frag.val = val; |
1975 | output_init_frag (x); | |
738f2522 | 1976 | break; |
738f2522 BS |
1977 | } |
1978 | ||
738f2522 BS |
1979 | return true; |
1980 | } | |
1981 | ||
1982 | /* Output SIZE zero bytes. We ignore the FILE argument since the | |
1983 | functions we're calling to perform the output just use | |
1984 | asm_out_file. */ | |
1985 | ||
1986 | void | |
1987 | nvptx_output_skip (FILE *, unsigned HOST_WIDE_INT size) | |
1988 | { | |
4d5438cd NS |
1989 | /* Finish the current fragment, if it's started. */ |
1990 | if (init_frag.offset) | |
738f2522 | 1991 | { |
4d5438cd NS |
1992 | unsigned part = init_frag.size - init_frag.offset; |
1993 | if (part > size) | |
1994 | part = (unsigned) size; | |
1995 | size -= part; | |
1996 | nvptx_assemble_value (0, part); | |
738f2522 BS |
1997 | } |
1998 | ||
4d5438cd NS |
1999 | /* If this skip doesn't terminate the initializer, write as many |
2000 | remaining pieces as possible directly. */ | |
2001 | if (size < init_frag.remaining * init_frag.size) | |
738f2522 | 2002 | { |
4d5438cd NS |
2003 | while (size >= init_frag.size) |
2004 | { | |
2005 | size -= init_frag.size; | |
2006 | output_init_frag (NULL_RTX); | |
2007 | } | |
2008 | if (size) | |
2009 | nvptx_assemble_value (0, size); | |
738f2522 | 2010 | } |
738f2522 BS |
2011 | } |
2012 | ||
2013 | /* Output a string STR with length SIZE. As in nvptx_output_skip we | |
2014 | ignore the FILE arg. */ | |
2015 | ||
2016 | void | |
2017 | nvptx_output_ascii (FILE *, const char *str, unsigned HOST_WIDE_INT size) | |
2018 | { | |
2019 | for (unsigned HOST_WIDE_INT i = 0; i < size; i++) | |
2020 | nvptx_assemble_value (str[i], 1); | |
2021 | } | |
2022 | ||
bf398920 TV |
2023 | /* Return true if TYPE is a record type where the last field is an array without |
2024 | given dimension. */ | |
2025 | ||
2026 | static bool | |
2027 | flexible_array_member_type_p (const_tree type) | |
2028 | { | |
2029 | if (TREE_CODE (type) != RECORD_TYPE) | |
2030 | return false; | |
2031 | ||
2032 | const_tree last_field = NULL_TREE; | |
2033 | for (const_tree f = TYPE_FIELDS (type); f; f = TREE_CHAIN (f)) | |
2034 | last_field = f; | |
2035 | ||
2036 | if (!last_field) | |
2037 | return false; | |
2038 | ||
2039 | const_tree last_field_type = TREE_TYPE (last_field); | |
2040 | if (TREE_CODE (last_field_type) != ARRAY_TYPE) | |
2041 | return false; | |
2042 | ||
2043 | return (! TYPE_DOMAIN (last_field_type) | |
2044 | || ! TYPE_MAX_VALUE (TYPE_DOMAIN (last_field_type))); | |
2045 | } | |
2046 | ||
4ff3145a NS |
2047 | /* Emit a PTX variable decl and prepare for emission of its |
2048 | initializer. NAME is the symbol name and SETION the PTX data | |
2049 | area. The type is TYPE, object size SIZE and alignment is ALIGN. | |
2050 | The caller has already emitted any indentation and linkage | |
2051 | specifier. It is responsible for any initializer, terminating ; | |
2052 | and newline. SIZE is in bytes, ALIGN is in bits -- confusingly | |
2053 | this is the opposite way round that PTX wants them! */ | |
2054 | ||
2055 | static void | |
2056 | nvptx_assemble_decl_begin (FILE *file, const char *name, const char *section, | |
bf398920 TV |
2057 | const_tree type, HOST_WIDE_INT size, unsigned align, |
2058 | bool undefined = false) | |
4ff3145a | 2059 | { |
59d2d238 CP |
2060 | bool atype = (TREE_CODE (type) == ARRAY_TYPE) |
2061 | && (TYPE_DOMAIN (type) == NULL_TREE); | |
2062 | ||
bf398920 TV |
2063 | if (undefined && flexible_array_member_type_p (type)) |
2064 | { | |
2065 | size = 0; | |
2066 | atype = true; | |
2067 | } | |
2068 | ||
4ff3145a NS |
2069 | while (TREE_CODE (type) == ARRAY_TYPE) |
2070 | type = TREE_TYPE (type); | |
2071 | ||
fc0efeea NS |
2072 | if (TREE_CODE (type) == VECTOR_TYPE |
2073 | || TREE_CODE (type) == COMPLEX_TYPE) | |
2074 | /* Neither vector nor complex types can contain the other. */ | |
2075 | type = TREE_TYPE (type); | |
2076 | ||
4ff3145a | 2077 | unsigned elt_size = int_size_in_bytes (type); |
fc0efeea NS |
2078 | |
2079 | /* Largest mode we're prepared to accept. For BLKmode types we | |
2080 | don't know if it'll contain pointer constants, so have to choose | |
2081 | pointer size, otherwise we can choose DImode. */ | |
2082 | machine_mode elt_mode = TYPE_MODE (type) == BLKmode ? Pmode : DImode; | |
2083 | ||
2084 | elt_size |= GET_MODE_SIZE (elt_mode); | |
2085 | elt_size &= -elt_size; /* Extract LSB set. */ | |
4ff3145a | 2086 | |
4d5438cd | 2087 | init_frag.size = elt_size; |
9c582551 | 2088 | /* Avoid undefined shift behavior by using '2'. */ |
4d5438cd NS |
2089 | init_frag.mask = ((unsigned HOST_WIDE_INT)2 |
2090 | << (elt_size * BITS_PER_UNIT - 1)) - 1; | |
2091 | init_frag.val = 0; | |
2092 | init_frag.offset = 0; | |
2093 | init_frag.started = false; | |
2094 | /* Size might not be a multiple of elt size, if there's an | |
2095 | initialized trailing struct array with smaller type than | |
2096 | elt_size. */ | |
2097 | init_frag.remaining = (size + elt_size - 1) / elt_size; | |
4ff3145a NS |
2098 | |
2099 | fprintf (file, "%s .align %d .u%d ", | |
2100 | section, align / BITS_PER_UNIT, | |
2101 | elt_size * BITS_PER_UNIT); | |
2102 | assemble_name (file, name); | |
2103 | ||
2104 | if (size) | |
2105 | /* We make everything an array, to simplify any initialization | |
2106 | emission. */ | |
4d5438cd | 2107 | fprintf (file, "[" HOST_WIDE_INT_PRINT_DEC "]", init_frag.remaining); |
59d2d238 CP |
2108 | else if (atype) |
2109 | fprintf (file, "[]"); | |
4ff3145a NS |
2110 | } |
2111 | ||
738f2522 BS |
2112 | /* Called when the initializer for a decl has been completely output through |
2113 | combinations of the three functions above. */ | |
2114 | ||
2115 | static void | |
2116 | nvptx_assemble_decl_end (void) | |
2117 | { | |
4d5438cd NS |
2118 | if (init_frag.offset) |
2119 | /* This can happen with a packed struct with trailing array member. */ | |
2120 | nvptx_assemble_value (0, init_frag.size - init_frag.offset); | |
2121 | fprintf (asm_out_file, init_frag.started ? " };\n" : ";\n"); | |
738f2522 BS |
2122 | } |
2123 | ||
69823d76 NS |
2124 | /* Output an uninitialized common or file-scope variable. */ |
2125 | ||
2126 | void | |
2127 | nvptx_output_aligned_decl (FILE *file, const char *name, | |
2128 | const_tree decl, HOST_WIDE_INT size, unsigned align) | |
2129 | { | |
2130 | write_var_marker (file, true, TREE_PUBLIC (decl), name); | |
2131 | ||
2132 | /* If this is public, it is common. The nearest thing we have to | |
2133 | common is weak. */ | |
4ff3145a NS |
2134 | fprintf (file, "\t%s", TREE_PUBLIC (decl) ? ".weak " : ""); |
2135 | ||
2136 | nvptx_assemble_decl_begin (file, name, section_for_decl (decl), | |
2137 | TREE_TYPE (decl), size, align); | |
4d5438cd | 2138 | nvptx_assemble_decl_end (); |
69823d76 NS |
2139 | } |
2140 | ||
738f2522 BS |
2141 | /* Implement TARGET_ASM_DECLARE_CONSTANT_NAME. Begin the process of |
2142 | writing a constant variable EXP with NAME and SIZE and its | |
2143 | initializer to FILE. */ | |
2144 | ||
2145 | static void | |
2146 | nvptx_asm_declare_constant_name (FILE *file, const char *name, | |
4ff3145a | 2147 | const_tree exp, HOST_WIDE_INT obj_size) |
738f2522 | 2148 | { |
4ff3145a NS |
2149 | write_var_marker (file, true, false, name); |
2150 | ||
2151 | fprintf (file, "\t"); | |
2152 | ||
738f2522 | 2153 | tree type = TREE_TYPE (exp); |
4ff3145a NS |
2154 | nvptx_assemble_decl_begin (file, name, ".const", type, obj_size, |
2155 | TYPE_ALIGN (type)); | |
738f2522 BS |
2156 | } |
2157 | ||
2158 | /* Implement the ASM_DECLARE_OBJECT_NAME macro. Used to start writing | |
2159 | a variable DECL with NAME to FILE. */ | |
2160 | ||
2161 | void | |
2162 | nvptx_declare_object_name (FILE *file, const char *name, const_tree decl) | |
2163 | { | |
4ff3145a | 2164 | write_var_marker (file, true, TREE_PUBLIC (decl), name); |
9a863523 | 2165 | |
4ff3145a NS |
2166 | fprintf (file, "\t%s", (!TREE_PUBLIC (decl) ? "" |
2167 | : DECL_WEAK (decl) ? ".weak " : ".visible ")); | |
9a863523 | 2168 | |
4ff3145a NS |
2169 | tree type = TREE_TYPE (decl); |
2170 | HOST_WIDE_INT obj_size = tree_to_shwi (DECL_SIZE_UNIT (decl)); | |
2171 | nvptx_assemble_decl_begin (file, name, section_for_decl (decl), | |
2172 | type, obj_size, DECL_ALIGN (decl)); | |
738f2522 BS |
2173 | } |
2174 | ||
2175 | /* Implement TARGET_ASM_GLOBALIZE_LABEL by doing nothing. */ | |
2176 | ||
2177 | static void | |
2178 | nvptx_globalize_label (FILE *, const char *) | |
2179 | { | |
2180 | } | |
2181 | ||
2182 | /* Implement TARGET_ASM_ASSEMBLE_UNDEFINED_DECL. Write an extern | |
2183 | declaration only for variable DECL with NAME to FILE. */ | |
f313d112 | 2184 | |
738f2522 BS |
2185 | static void |
2186 | nvptx_assemble_undefined_decl (FILE *file, const char *name, const_tree decl) | |
2187 | { | |
0a0f74aa NS |
2188 | /* The middle end can place constant pool decls into the varpool as |
2189 | undefined. Until that is fixed, catch the problem here. */ | |
2190 | if (DECL_IN_CONSTANT_POOL (decl)) | |
2191 | return; | |
2192 | ||
721547cd NS |
2193 | /* We support weak defintions, and hence have the right |
2194 | ASM_WEAKEN_DECL definition. Diagnose the problem here. */ | |
2195 | if (DECL_WEAK (decl)) | |
2196 | error_at (DECL_SOURCE_LOCATION (decl), | |
2197 | "PTX does not support weak declarations" | |
2198 | " (only weak definitions)"); | |
69823d76 NS |
2199 | write_var_marker (file, false, TREE_PUBLIC (decl), name); |
2200 | ||
4ff3145a NS |
2201 | fprintf (file, "\t.extern "); |
2202 | tree size = DECL_SIZE_UNIT (decl); | |
2203 | nvptx_assemble_decl_begin (file, name, section_for_decl (decl), | |
2204 | TREE_TYPE (decl), size ? tree_to_shwi (size) : 0, | |
bf398920 | 2205 | DECL_ALIGN (decl), true); |
1e5154e7 | 2206 | nvptx_assemble_decl_end (); |
738f2522 BS |
2207 | } |
2208 | ||
f313d112 NS |
2209 | /* Output a pattern for a move instruction. */ |
2210 | ||
2211 | const char * | |
2212 | nvptx_output_mov_insn (rtx dst, rtx src) | |
2213 | { | |
2214 | machine_mode dst_mode = GET_MODE (dst); | |
2215 | machine_mode dst_inner = (GET_CODE (dst) == SUBREG | |
2216 | ? GET_MODE (XEXP (dst, 0)) : dst_mode); | |
2217 | machine_mode src_inner = (GET_CODE (src) == SUBREG | |
2218 | ? GET_MODE (XEXP (src, 0)) : dst_mode); | |
2219 | ||
15113b03 NS |
2220 | rtx sym = src; |
2221 | if (GET_CODE (sym) == CONST) | |
2222 | sym = XEXP (XEXP (sym, 0), 0); | |
bd602b7f NS |
2223 | if (SYMBOL_REF_P (sym)) |
2224 | { | |
2225 | if (SYMBOL_DATA_AREA (sym) != DATA_AREA_GENERIC) | |
2226 | return "%.\tcvta%D1%t0\t%0, %1;"; | |
2227 | nvptx_maybe_record_fnsym (sym); | |
2228 | } | |
15113b03 | 2229 | |
f313d112 NS |
2230 | if (src_inner == dst_inner) |
2231 | return "%.\tmov%t0\t%0, %1;"; | |
2232 | ||
2233 | if (CONSTANT_P (src)) | |
2234 | return (GET_MODE_CLASS (dst_inner) == MODE_INT | |
2235 | && GET_MODE_CLASS (src_inner) != MODE_FLOAT | |
2236 | ? "%.\tmov%t0\t%0, %1;" : "%.\tmov.b%T0\t%0, %1;"); | |
2237 | ||
2238 | if (GET_MODE_SIZE (dst_inner) == GET_MODE_SIZE (src_inner)) | |
3717fbe3 TV |
2239 | { |
2240 | if (GET_MODE_BITSIZE (dst_mode) == 128 | |
2241 | && GET_MODE_BITSIZE (GET_MODE (src)) == 128) | |
2242 | { | |
2243 | /* mov.b128 is not supported. */ | |
2244 | if (dst_inner == V2DImode && src_inner == TImode) | |
2245 | return "%.\tmov.u64\t%0.x, %L1;\n\t%.\tmov.u64\t%0.y, %H1;"; | |
2246 | else if (dst_inner == TImode && src_inner == V2DImode) | |
2247 | return "%.\tmov.u64\t%L0, %1.x;\n\t%.\tmov.u64\t%H0, %1.y;"; | |
2248 | ||
2249 | gcc_unreachable (); | |
2250 | } | |
2251 | return "%.\tmov.b%T0\t%0, %1;"; | |
2252 | } | |
f313d112 NS |
2253 | |
2254 | return "%.\tcvt%t0%t1\t%0, %1;"; | |
2255 | } | |
2256 | ||
5012919d AM |
2257 | static void nvptx_print_operand (FILE *, rtx, int); |
2258 | ||
738f2522 | 2259 | /* Output INSN, which is a call to CALLEE with result RESULT. For ptx, this |
ecf6e535 BS |
2260 | involves writing .param declarations and in/out copies into them. For |
2261 | indirect calls, also write the .callprototype. */ | |
738f2522 BS |
2262 | |
2263 | const char * | |
2264 | nvptx_output_call_insn (rtx_insn *insn, rtx result, rtx callee) | |
2265 | { | |
863af9a4 | 2266 | char buf[16]; |
738f2522 BS |
2267 | static int labelno; |
2268 | bool needs_tgt = register_operand (callee, Pmode); | |
2269 | rtx pat = PATTERN (insn); | |
5012919d AM |
2270 | if (GET_CODE (pat) == COND_EXEC) |
2271 | pat = COND_EXEC_CODE (pat); | |
f324806d | 2272 | int arg_end = XVECLEN (pat, 0); |
738f2522 BS |
2273 | tree decl = NULL_TREE; |
2274 | ||
2275 | fprintf (asm_out_file, "\t{\n"); | |
2276 | if (result != NULL) | |
1f065954 NS |
2277 | fprintf (asm_out_file, "\t\t.param%s %s_in;\n", |
2278 | nvptx_ptx_type_from_mode (GET_MODE (result), false), | |
2279 | reg_names[NVPTX_RETURN_REGNUM]); | |
738f2522 | 2280 | |
ecf6e535 | 2281 | /* Ensure we have a ptx declaration in the output if necessary. */ |
738f2522 BS |
2282 | if (GET_CODE (callee) == SYMBOL_REF) |
2283 | { | |
2284 | decl = SYMBOL_REF_DECL (callee); | |
00e52418 NS |
2285 | if (!decl |
2286 | || (DECL_EXTERNAL (decl) && !TYPE_ARG_TYPES (TREE_TYPE (decl)))) | |
2287 | nvptx_record_libfunc (callee, result, pat); | |
2288 | else if (DECL_EXTERNAL (decl)) | |
738f2522 BS |
2289 | nvptx_record_fndecl (decl); |
2290 | } | |
2291 | ||
2292 | if (needs_tgt) | |
2293 | { | |
2294 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCT", labelno); | |
2295 | labelno++; | |
2296 | ASM_OUTPUT_LABEL (asm_out_file, buf); | |
2297 | std::stringstream s; | |
b699adcc | 2298 | write_fn_proto_from_insn (s, NULL, result, pat); |
738f2522 BS |
2299 | fputs (s.str().c_str(), asm_out_file); |
2300 | } | |
2301 | ||
863af9a4 | 2302 | for (int argno = 1; argno < arg_end; argno++) |
738f2522 | 2303 | { |
863af9a4 | 2304 | rtx t = XEXP (XVECEXP (pat, 0, argno), 0); |
738f2522 | 2305 | machine_mode mode = GET_MODE (t); |
a02d84b6 | 2306 | const char *ptx_type = nvptx_ptx_type_from_mode (mode, false); |
738f2522 | 2307 | |
863af9a4 | 2308 | /* Mode splitting has already been done. */ |
a02d84b6 NS |
2309 | fprintf (asm_out_file, "\t\t.param%s %%out_arg%d;\n" |
2310 | "\t\tst.param%s [%%out_arg%d], ", | |
2311 | ptx_type, argno, ptx_type, argno); | |
2312 | output_reg (asm_out_file, REGNO (t), VOIDmode); | |
2313 | fprintf (asm_out_file, ";\n"); | |
738f2522 BS |
2314 | } |
2315 | ||
5012919d AM |
2316 | /* The '.' stands for the call's predicate, if any. */ |
2317 | nvptx_print_operand (asm_out_file, NULL_RTX, '.'); | |
738f2522 BS |
2318 | fprintf (asm_out_file, "\t\tcall "); |
2319 | if (result != NULL_RTX) | |
1f065954 NS |
2320 | fprintf (asm_out_file, "(%s_in), ", reg_names[NVPTX_RETURN_REGNUM]); |
2321 | ||
738f2522 BS |
2322 | if (decl) |
2323 | { | |
2324 | const char *name = get_fnname_from_decl (decl); | |
b4346107 | 2325 | name = nvptx_name_replacement (name); |
738f2522 BS |
2326 | assemble_name (asm_out_file, name); |
2327 | } | |
2328 | else | |
cc8ca59e | 2329 | output_address (VOIDmode, callee); |
738f2522 | 2330 | |
863af9a4 NS |
2331 | const char *open = "("; |
2332 | for (int argno = 1; argno < arg_end; argno++) | |
738f2522 | 2333 | { |
863af9a4 NS |
2334 | fprintf (asm_out_file, ", %s%%out_arg%d", open, argno); |
2335 | open = ""; | |
738f2522 | 2336 | } |
863af9a4 NS |
2337 | if (decl && DECL_STATIC_CHAIN (decl)) |
2338 | { | |
5563d5c0 | 2339 | fprintf (asm_out_file, ", %s%s", open, reg_names [STATIC_CHAIN_REGNUM]); |
863af9a4 NS |
2340 | open = ""; |
2341 | } | |
2342 | if (!open[0]) | |
2343 | fprintf (asm_out_file, ")"); | |
f324806d | 2344 | |
738f2522 BS |
2345 | if (needs_tgt) |
2346 | { | |
2347 | fprintf (asm_out_file, ", "); | |
2348 | assemble_name (asm_out_file, buf); | |
2349 | } | |
2350 | fprintf (asm_out_file, ";\n"); | |
738f2522 | 2351 | |
51baf85a | 2352 | if (find_reg_note (insn, REG_NORETURN, NULL)) |
fb202364 TV |
2353 | { |
2354 | /* No return functions confuse the PTX JIT, as it doesn't realize | |
2355 | the flow control barrier they imply. It can seg fault if it | |
2356 | encounters what looks like an unexitable loop. Emit a trailing | |
2357 | trap and exit, which it does grok. */ | |
2358 | fprintf (asm_out_file, "\t\ttrap; // (noreturn)\n"); | |
2359 | fprintf (asm_out_file, "\t\texit; // (noreturn)\n"); | |
2360 | } | |
51baf85a | 2361 | |
1f065954 NS |
2362 | if (result) |
2363 | { | |
2364 | static char rval[sizeof ("\tld.param%%t0\t%%0, [%%%s_in];\n\t}") + 8]; | |
2365 | ||
2366 | if (!rval[0]) | |
2367 | /* We must escape the '%' that starts RETURN_REGNUM. */ | |
2368 | sprintf (rval, "\tld.param%%t0\t%%0, [%%%s_in];\n\t}", | |
2369 | reg_names[NVPTX_RETURN_REGNUM]); | |
2370 | return rval; | |
2371 | } | |
2372 | ||
2373 | return "}"; | |
738f2522 BS |
2374 | } |
2375 | ||
2376 | /* Implement TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ | |
2377 | ||
2378 | static bool | |
2379 | nvptx_print_operand_punct_valid_p (unsigned char c) | |
2380 | { | |
2381 | return c == '.' || c== '#'; | |
2382 | } | |
2383 | ||
738f2522 BS |
2384 | /* Subroutine of nvptx_print_operand; used to print a memory reference X to FILE. */ |
2385 | ||
2386 | static void | |
2387 | nvptx_print_address_operand (FILE *file, rtx x, machine_mode) | |
2388 | { | |
2389 | rtx off; | |
2390 | if (GET_CODE (x) == CONST) | |
2391 | x = XEXP (x, 0); | |
2392 | switch (GET_CODE (x)) | |
2393 | { | |
2394 | case PLUS: | |
2395 | off = XEXP (x, 1); | |
cc8ca59e | 2396 | output_address (VOIDmode, XEXP (x, 0)); |
738f2522 | 2397 | fprintf (file, "+"); |
cc8ca59e | 2398 | output_address (VOIDmode, off); |
738f2522 BS |
2399 | break; |
2400 | ||
2401 | case SYMBOL_REF: | |
2402 | case LABEL_REF: | |
2403 | output_addr_const (file, x); | |
2404 | break; | |
2405 | ||
2406 | default: | |
2407 | gcc_assert (GET_CODE (x) != MEM); | |
2408 | nvptx_print_operand (file, x, 0); | |
2409 | break; | |
2410 | } | |
2411 | } | |
2412 | ||
2413 | /* Write assembly language output for the address ADDR to FILE. */ | |
2414 | ||
2415 | static void | |
cc8ca59e | 2416 | nvptx_print_operand_address (FILE *file, machine_mode mode, rtx addr) |
738f2522 | 2417 | { |
cc8ca59e | 2418 | nvptx_print_address_operand (file, addr, mode); |
738f2522 BS |
2419 | } |
2420 | ||
2421 | /* Print an operand, X, to FILE, with an optional modifier in CODE. | |
2422 | ||
2423 | Meaning of CODE: | |
2424 | . -- print the predicate for the instruction or an emptry string for an | |
2425 | unconditional one. | |
2426 | # -- print a rounding mode for the instruction | |
2427 | ||
9a863523 | 2428 | A -- print a data area for a MEM |
738f2522 | 2429 | c -- print an opcode suffix for a comparison operator, including a type code |
9a863523 | 2430 | D -- print a data area for a MEM operand |
d88cd9c4 | 2431 | S -- print a shuffle kind specified by CONST_INT |
738f2522 BS |
2432 | t -- print a type opcode suffix, promoting QImode to 32 bits |
2433 | T -- print a type size in bits | |
2434 | u -- print a type opcode suffix without promotions. */ | |
2435 | ||
2436 | static void | |
2437 | nvptx_print_operand (FILE *file, rtx x, int code) | |
2438 | { | |
738f2522 BS |
2439 | if (code == '.') |
2440 | { | |
2441 | x = current_insn_predicate; | |
2442 | if (x) | |
2443 | { | |
5012919d | 2444 | fputs ("@", file); |
738f2522 BS |
2445 | if (GET_CODE (x) == EQ) |
2446 | fputs ("!", file); | |
5012919d | 2447 | output_reg (file, REGNO (XEXP (x, 0)), VOIDmode); |
738f2522 BS |
2448 | } |
2449 | return; | |
2450 | } | |
2451 | else if (code == '#') | |
2452 | { | |
2453 | fputs (".rn", file); | |
2454 | return; | |
2455 | } | |
2456 | ||
2457 | enum rtx_code x_code = GET_CODE (x); | |
f313d112 | 2458 | machine_mode mode = GET_MODE (x); |
738f2522 BS |
2459 | |
2460 | switch (code) | |
2461 | { | |
2462 | case 'A': | |
9a863523 NS |
2463 | x = XEXP (x, 0); |
2464 | /* FALLTHROUGH. */ | |
7b8edc29 | 2465 | |
9a863523 NS |
2466 | case 'D': |
2467 | if (GET_CODE (x) == CONST) | |
2468 | x = XEXP (x, 0); | |
2469 | if (GET_CODE (x) == PLUS) | |
2470 | x = XEXP (x, 0); | |
7b8edc29 | 2471 | |
9a863523 NS |
2472 | if (GET_CODE (x) == SYMBOL_REF) |
2473 | fputs (section_for_sym (x), file); | |
738f2522 BS |
2474 | break; |
2475 | ||
738f2522 | 2476 | case 't': |
738f2522 | 2477 | case 'u': |
f313d112 NS |
2478 | if (x_code == SUBREG) |
2479 | { | |
1310ff03 TV |
2480 | machine_mode inner_mode = GET_MODE (SUBREG_REG (x)); |
2481 | if (VECTOR_MODE_P (inner_mode) | |
2482 | && (GET_MODE_SIZE (mode) | |
2483 | <= GET_MODE_SIZE (GET_MODE_INNER (inner_mode)))) | |
2484 | mode = GET_MODE_INNER (inner_mode); | |
2485 | else if (split_mode_p (inner_mode)) | |
2486 | mode = maybe_split_mode (inner_mode); | |
2487 | else | |
2488 | mode = inner_mode; | |
f313d112 NS |
2489 | } |
2490 | fprintf (file, "%s", nvptx_ptx_type_from_mode (mode, code == 't')); | |
738f2522 BS |
2491 | break; |
2492 | ||
3717fbe3 TV |
2493 | case 'H': |
2494 | case 'L': | |
2495 | { | |
2496 | rtx inner_x = SUBREG_REG (x); | |
2497 | machine_mode inner_mode = GET_MODE (inner_x); | |
2498 | machine_mode split = maybe_split_mode (inner_mode); | |
2499 | ||
2500 | output_reg (file, REGNO (inner_x), split, | |
2501 | (code == 'H' | |
2502 | ? GET_MODE_SIZE (inner_mode) / 2 | |
2503 | : 0)); | |
2504 | } | |
2505 | break; | |
2506 | ||
d88cd9c4 NS |
2507 | case 'S': |
2508 | { | |
59263259 NS |
2509 | nvptx_shuffle_kind kind = (nvptx_shuffle_kind) UINTVAL (x); |
2510 | /* Same order as nvptx_shuffle_kind. */ | |
d88cd9c4 | 2511 | static const char *const kinds[] = |
59263259 NS |
2512 | {".up", ".down", ".bfly", ".idx"}; |
2513 | fputs (kinds[kind], file); | |
d88cd9c4 NS |
2514 | } |
2515 | break; | |
2516 | ||
738f2522 | 2517 | case 'T': |
f313d112 | 2518 | fprintf (file, "%d", GET_MODE_BITSIZE (mode)); |
738f2522 BS |
2519 | break; |
2520 | ||
2521 | case 'j': | |
2522 | fprintf (file, "@"); | |
2523 | goto common; | |
2524 | ||
2525 | case 'J': | |
2526 | fprintf (file, "@!"); | |
2527 | goto common; | |
2528 | ||
2529 | case 'c': | |
f313d112 | 2530 | mode = GET_MODE (XEXP (x, 0)); |
738f2522 BS |
2531 | switch (x_code) |
2532 | { | |
2533 | case EQ: | |
2534 | fputs (".eq", file); | |
2535 | break; | |
2536 | case NE: | |
f313d112 | 2537 | if (FLOAT_MODE_P (mode)) |
738f2522 BS |
2538 | fputs (".neu", file); |
2539 | else | |
2540 | fputs (".ne", file); | |
2541 | break; | |
2542 | case LE: | |
578fb225 | 2543 | case LEU: |
738f2522 BS |
2544 | fputs (".le", file); |
2545 | break; | |
2546 | case GE: | |
578fb225 | 2547 | case GEU: |
738f2522 BS |
2548 | fputs (".ge", file); |
2549 | break; | |
2550 | case LT: | |
578fb225 | 2551 | case LTU: |
738f2522 BS |
2552 | fputs (".lt", file); |
2553 | break; | |
2554 | case GT: | |
738f2522 | 2555 | case GTU: |
578fb225 | 2556 | fputs (".gt", file); |
738f2522 BS |
2557 | break; |
2558 | case LTGT: | |
2559 | fputs (".ne", file); | |
2560 | break; | |
2561 | case UNEQ: | |
2562 | fputs (".equ", file); | |
2563 | break; | |
2564 | case UNLE: | |
2565 | fputs (".leu", file); | |
2566 | break; | |
2567 | case UNGE: | |
2568 | fputs (".geu", file); | |
2569 | break; | |
2570 | case UNLT: | |
2571 | fputs (".ltu", file); | |
2572 | break; | |
2573 | case UNGT: | |
2574 | fputs (".gtu", file); | |
2575 | break; | |
2576 | case UNORDERED: | |
2577 | fputs (".nan", file); | |
2578 | break; | |
2579 | case ORDERED: | |
2580 | fputs (".num", file); | |
2581 | break; | |
2582 | default: | |
2583 | gcc_unreachable (); | |
2584 | } | |
f313d112 | 2585 | if (FLOAT_MODE_P (mode) |
738f2522 BS |
2586 | || x_code == EQ || x_code == NE |
2587 | || x_code == GEU || x_code == GTU | |
2588 | || x_code == LEU || x_code == LTU) | |
f313d112 | 2589 | fputs (nvptx_ptx_type_from_mode (mode, true), file); |
738f2522 | 2590 | else |
f313d112 | 2591 | fprintf (file, ".s%d", GET_MODE_BITSIZE (mode)); |
738f2522 BS |
2592 | break; |
2593 | default: | |
2594 | common: | |
2595 | switch (x_code) | |
2596 | { | |
2597 | case SUBREG: | |
f313d112 NS |
2598 | { |
2599 | rtx inner_x = SUBREG_REG (x); | |
2600 | machine_mode inner_mode = GET_MODE (inner_x); | |
2601 | machine_mode split = maybe_split_mode (inner_mode); | |
2602 | ||
1310ff03 TV |
2603 | if (VECTOR_MODE_P (inner_mode) |
2604 | && (GET_MODE_SIZE (mode) | |
2605 | <= GET_MODE_SIZE (GET_MODE_INNER (inner_mode)))) | |
2606 | { | |
2607 | output_reg (file, REGNO (inner_x), VOIDmode); | |
2608 | fprintf (file, ".%s", SUBREG_BYTE (x) == 0 ? "x" : "y"); | |
2609 | } | |
2610 | else if (split_mode_p (inner_mode) | |
f313d112 NS |
2611 | && (GET_MODE_SIZE (inner_mode) == GET_MODE_SIZE (mode))) |
2612 | output_reg (file, REGNO (inner_x), split); | |
2613 | else | |
2614 | output_reg (file, REGNO (inner_x), split, SUBREG_BYTE (x)); | |
2615 | } | |
2616 | break; | |
738f2522 BS |
2617 | |
2618 | case REG: | |
f313d112 | 2619 | output_reg (file, REGNO (x), maybe_split_mode (mode)); |
738f2522 BS |
2620 | break; |
2621 | ||
2622 | case MEM: | |
2623 | fputc ('[', file); | |
f313d112 | 2624 | nvptx_print_address_operand (file, XEXP (x, 0), mode); |
738f2522 BS |
2625 | fputc (']', file); |
2626 | break; | |
2627 | ||
2628 | case CONST_INT: | |
2629 | output_addr_const (file, x); | |
2630 | break; | |
2631 | ||
2632 | case CONST: | |
2633 | case SYMBOL_REF: | |
2634 | case LABEL_REF: | |
2635 | /* We could use output_addr_const, but that can print things like | |
2636 | "x-8", which breaks ptxas. Need to ensure it is output as | |
2637 | "x+-8". */ | |
2638 | nvptx_print_address_operand (file, x, VOIDmode); | |
2639 | break; | |
2640 | ||
2641 | case CONST_DOUBLE: | |
2642 | long vals[2]; | |
f313d112 | 2643 | real_to_target (vals, CONST_DOUBLE_REAL_VALUE (x), mode); |
738f2522 BS |
2644 | vals[0] &= 0xffffffff; |
2645 | vals[1] &= 0xffffffff; | |
f313d112 | 2646 | if (mode == SFmode) |
738f2522 BS |
2647 | fprintf (file, "0f%08lx", vals[0]); |
2648 | else | |
2649 | fprintf (file, "0d%08lx%08lx", vals[1], vals[0]); | |
2650 | break; | |
2651 | ||
1310ff03 TV |
2652 | case CONST_VECTOR: |
2653 | { | |
2654 | unsigned n = CONST_VECTOR_NUNITS (x); | |
2655 | fprintf (file, "{ "); | |
2656 | for (unsigned i = 0; i < n; ++i) | |
2657 | { | |
2658 | if (i != 0) | |
2659 | fprintf (file, ", "); | |
2660 | ||
2661 | rtx elem = CONST_VECTOR_ELT (x, i); | |
2662 | output_addr_const (file, elem); | |
2663 | } | |
2664 | fprintf (file, " }"); | |
2665 | } | |
2666 | break; | |
2667 | ||
738f2522 BS |
2668 | default: |
2669 | output_addr_const (file, x); | |
2670 | } | |
2671 | } | |
2672 | } | |
2673 | \f | |
2674 | /* Record replacement regs used to deal with subreg operands. */ | |
2675 | struct reg_replace | |
2676 | { | |
2677 | rtx replacement[MAX_RECOG_OPERANDS]; | |
2678 | machine_mode mode; | |
2679 | int n_allocated; | |
2680 | int n_in_use; | |
2681 | }; | |
2682 | ||
2683 | /* Allocate or reuse a replacement in R and return the rtx. */ | |
2684 | ||
2685 | static rtx | |
2686 | get_replacement (struct reg_replace *r) | |
2687 | { | |
2688 | if (r->n_allocated == r->n_in_use) | |
2689 | r->replacement[r->n_allocated++] = gen_reg_rtx (r->mode); | |
2690 | return r->replacement[r->n_in_use++]; | |
2691 | } | |
2692 | ||
2693 | /* Clean up subreg operands. In ptx assembly, everything is typed, and | |
2694 | the presence of subregs would break the rules for most instructions. | |
2695 | Replace them with a suitable new register of the right size, plus | |
2696 | conversion copyin/copyout instructions. */ | |
2697 | ||
2698 | static void | |
517665b3 | 2699 | nvptx_reorg_subreg (void) |
738f2522 BS |
2700 | { |
2701 | struct reg_replace qiregs, hiregs, siregs, diregs; | |
2702 | rtx_insn *insn, *next; | |
2703 | ||
738f2522 BS |
2704 | qiregs.n_allocated = 0; |
2705 | hiregs.n_allocated = 0; | |
2706 | siregs.n_allocated = 0; | |
2707 | diregs.n_allocated = 0; | |
2708 | qiregs.mode = QImode; | |
2709 | hiregs.mode = HImode; | |
2710 | siregs.mode = SImode; | |
2711 | diregs.mode = DImode; | |
2712 | ||
2713 | for (insn = get_insns (); insn; insn = next) | |
2714 | { | |
2715 | next = NEXT_INSN (insn); | |
2716 | if (!NONDEBUG_INSN_P (insn) | |
1fe6befc | 2717 | || asm_noperands (PATTERN (insn)) >= 0 |
738f2522 BS |
2718 | || GET_CODE (PATTERN (insn)) == USE |
2719 | || GET_CODE (PATTERN (insn)) == CLOBBER) | |
2720 | continue; | |
f324806d | 2721 | |
738f2522 BS |
2722 | qiregs.n_in_use = 0; |
2723 | hiregs.n_in_use = 0; | |
2724 | siregs.n_in_use = 0; | |
2725 | diregs.n_in_use = 0; | |
2726 | extract_insn (insn); | |
2727 | enum attr_subregs_ok s_ok = get_attr_subregs_ok (insn); | |
f324806d | 2728 | |
738f2522 BS |
2729 | for (int i = 0; i < recog_data.n_operands; i++) |
2730 | { | |
2731 | rtx op = recog_data.operand[i]; | |
2732 | if (GET_CODE (op) != SUBREG) | |
2733 | continue; | |
2734 | ||
2735 | rtx inner = SUBREG_REG (op); | |
2736 | ||
2737 | machine_mode outer_mode = GET_MODE (op); | |
2738 | machine_mode inner_mode = GET_MODE (inner); | |
2739 | gcc_assert (s_ok); | |
2740 | if (s_ok | |
2741 | && (GET_MODE_PRECISION (inner_mode) | |
2742 | >= GET_MODE_PRECISION (outer_mode))) | |
2743 | continue; | |
2744 | gcc_assert (SCALAR_INT_MODE_P (outer_mode)); | |
2745 | struct reg_replace *r = (outer_mode == QImode ? &qiregs | |
2746 | : outer_mode == HImode ? &hiregs | |
2747 | : outer_mode == SImode ? &siregs | |
2748 | : &diregs); | |
2749 | rtx new_reg = get_replacement (r); | |
2750 | ||
2751 | if (recog_data.operand_type[i] != OP_OUT) | |
2752 | { | |
2753 | enum rtx_code code; | |
2754 | if (GET_MODE_PRECISION (inner_mode) | |
2755 | < GET_MODE_PRECISION (outer_mode)) | |
2756 | code = ZERO_EXTEND; | |
2757 | else | |
2758 | code = TRUNCATE; | |
2759 | ||
f7df4a84 | 2760 | rtx pat = gen_rtx_SET (new_reg, |
738f2522 BS |
2761 | gen_rtx_fmt_e (code, outer_mode, inner)); |
2762 | emit_insn_before (pat, insn); | |
2763 | } | |
2764 | ||
2765 | if (recog_data.operand_type[i] != OP_IN) | |
2766 | { | |
2767 | enum rtx_code code; | |
2768 | if (GET_MODE_PRECISION (inner_mode) | |
2769 | < GET_MODE_PRECISION (outer_mode)) | |
2770 | code = TRUNCATE; | |
2771 | else | |
2772 | code = ZERO_EXTEND; | |
2773 | ||
f7df4a84 | 2774 | rtx pat = gen_rtx_SET (inner, |
738f2522 BS |
2775 | gen_rtx_fmt_e (code, inner_mode, new_reg)); |
2776 | emit_insn_after (pat, insn); | |
2777 | } | |
2778 | validate_change (insn, recog_data.operand_loc[i], new_reg, false); | |
2779 | } | |
2780 | } | |
517665b3 | 2781 | } |
738f2522 | 2782 | |
5012919d AM |
2783 | /* Return a SImode "master lane index" register for uniform-simt, allocating on |
2784 | first use. */ | |
2785 | ||
2786 | static rtx | |
2787 | nvptx_get_unisimt_master () | |
2788 | { | |
2789 | rtx &master = cfun->machine->unisimt_master; | |
2790 | return master ? master : master = gen_reg_rtx (SImode); | |
2791 | } | |
2792 | ||
2793 | /* Return a BImode "predicate" register for uniform-simt, similar to above. */ | |
2794 | ||
2795 | static rtx | |
2796 | nvptx_get_unisimt_predicate () | |
2797 | { | |
2798 | rtx &pred = cfun->machine->unisimt_predicate; | |
2799 | return pred ? pred : pred = gen_reg_rtx (BImode); | |
2800 | } | |
2801 | ||
2802 | /* Return true if given call insn references one of the functions provided by | |
2803 | the CUDA runtime: malloc, free, vprintf. */ | |
2804 | ||
2805 | static bool | |
2806 | nvptx_call_insn_is_syscall_p (rtx_insn *insn) | |
2807 | { | |
2808 | rtx pat = PATTERN (insn); | |
2809 | gcc_checking_assert (GET_CODE (pat) == PARALLEL); | |
2810 | pat = XVECEXP (pat, 0, 0); | |
2811 | if (GET_CODE (pat) == SET) | |
2812 | pat = SET_SRC (pat); | |
2813 | gcc_checking_assert (GET_CODE (pat) == CALL | |
2814 | && GET_CODE (XEXP (pat, 0)) == MEM); | |
2815 | rtx addr = XEXP (XEXP (pat, 0), 0); | |
2816 | if (GET_CODE (addr) != SYMBOL_REF) | |
2817 | return false; | |
2818 | const char *name = XSTR (addr, 0); | |
2819 | /* Ordinary malloc/free are redirected to __nvptx_{malloc,free), so only the | |
2820 | references with forced assembler name refer to PTX syscalls. For vprintf, | |
2821 | accept both normal and forced-assembler-name references. */ | |
2822 | return (!strcmp (name, "vprintf") || !strcmp (name, "*vprintf") | |
2823 | || !strcmp (name, "*malloc") | |
2824 | || !strcmp (name, "*free")); | |
2825 | } | |
2826 | ||
2827 | /* If SET subexpression of INSN sets a register, emit a shuffle instruction to | |
2828 | propagate its value from lane MASTER to current lane. */ | |
2829 | ||
2830 | static void | |
2831 | nvptx_unisimt_handle_set (rtx set, rtx_insn *insn, rtx master) | |
2832 | { | |
2833 | rtx reg; | |
2834 | if (GET_CODE (set) == SET && REG_P (reg = SET_DEST (set))) | |
2835 | emit_insn_after (nvptx_gen_shuffle (reg, reg, master, SHUFFLE_IDX), insn); | |
2836 | } | |
2837 | ||
2838 | /* Adjust code for uniform-simt code generation variant by making atomics and | |
2839 | "syscalls" conditionally executed, and inserting shuffle-based propagation | |
2840 | for registers being set. */ | |
2841 | ||
2842 | static void | |
2843 | nvptx_reorg_uniform_simt () | |
2844 | { | |
2845 | rtx_insn *insn, *next; | |
2846 | ||
2847 | for (insn = get_insns (); insn; insn = next) | |
2848 | { | |
2849 | next = NEXT_INSN (insn); | |
2850 | if (!(CALL_P (insn) && nvptx_call_insn_is_syscall_p (insn)) | |
2851 | && !(NONJUMP_INSN_P (insn) | |
2852 | && GET_CODE (PATTERN (insn)) == PARALLEL | |
2853 | && get_attr_atomic (insn))) | |
2854 | continue; | |
2855 | rtx pat = PATTERN (insn); | |
2856 | rtx master = nvptx_get_unisimt_master (); | |
2857 | for (int i = 0; i < XVECLEN (pat, 0); i++) | |
2858 | nvptx_unisimt_handle_set (XVECEXP (pat, 0, i), insn, master); | |
2859 | rtx pred = nvptx_get_unisimt_predicate (); | |
2860 | pred = gen_rtx_NE (BImode, pred, const0_rtx); | |
2861 | pat = gen_rtx_COND_EXEC (VOIDmode, pred, pat); | |
2862 | validate_change (insn, &PATTERN (insn), pat, false); | |
2863 | } | |
2864 | } | |
2865 | ||
d2d47a28 NS |
2866 | /* Loop structure of the function. The entire function is described as |
2867 | a NULL loop. */ | |
d88cd9c4 NS |
2868 | |
2869 | struct parallel | |
2870 | { | |
2871 | /* Parent parallel. */ | |
2872 | parallel *parent; | |
2873 | ||
2874 | /* Next sibling parallel. */ | |
2875 | parallel *next; | |
2876 | ||
2877 | /* First child parallel. */ | |
2878 | parallel *inner; | |
2879 | ||
2880 | /* Partitioning mask of the parallel. */ | |
2881 | unsigned mask; | |
2882 | ||
2883 | /* Partitioning used within inner parallels. */ | |
2884 | unsigned inner_mask; | |
2885 | ||
2886 | /* Location of parallel forked and join. The forked is the first | |
2887 | block in the parallel and the join is the first block after of | |
2888 | the partition. */ | |
2889 | basic_block forked_block; | |
2890 | basic_block join_block; | |
2891 | ||
2892 | rtx_insn *forked_insn; | |
2893 | rtx_insn *join_insn; | |
2894 | ||
2895 | rtx_insn *fork_insn; | |
2896 | rtx_insn *joining_insn; | |
2897 | ||
2898 | /* Basic blocks in this parallel, but not in child parallels. The | |
2899 | FORKED and JOINING blocks are in the partition. The FORK and JOIN | |
2900 | blocks are not. */ | |
2901 | auto_vec<basic_block> blocks; | |
2902 | ||
2903 | public: | |
2904 | parallel (parallel *parent, unsigned mode); | |
2905 | ~parallel (); | |
2906 | }; | |
2907 | ||
2908 | /* Constructor links the new parallel into it's parent's chain of | |
2909 | children. */ | |
2910 | ||
2911 | parallel::parallel (parallel *parent_, unsigned mask_) | |
2912 | :parent (parent_), next (0), inner (0), mask (mask_), inner_mask (0) | |
2913 | { | |
2914 | forked_block = join_block = 0; | |
2915 | forked_insn = join_insn = 0; | |
2916 | fork_insn = joining_insn = 0; | |
2917 | ||
2918 | if (parent) | |
2919 | { | |
2920 | next = parent->inner; | |
2921 | parent->inner = this; | |
2922 | } | |
2923 | } | |
2924 | ||
2925 | parallel::~parallel () | |
2926 | { | |
2927 | delete inner; | |
2928 | delete next; | |
2929 | } | |
2930 | ||
2931 | /* Map of basic blocks to insns */ | |
2932 | typedef hash_map<basic_block, rtx_insn *> bb_insn_map_t; | |
2933 | ||
2934 | /* A tuple of an insn of interest and the BB in which it resides. */ | |
2935 | typedef std::pair<rtx_insn *, basic_block> insn_bb_t; | |
2936 | typedef auto_vec<insn_bb_t> insn_bb_vec_t; | |
2937 | ||
2938 | /* Split basic blocks such that each forked and join unspecs are at | |
2939 | the start of their basic blocks. Thus afterwards each block will | |
2940 | have a single partitioning mode. We also do the same for return | |
2941 | insns, as they are executed by every thread. Return the | |
2942 | partitioning mode of the function as a whole. Populate MAP with | |
2943 | head and tail blocks. We also clear the BB visited flag, which is | |
2944 | used when finding partitions. */ | |
2945 | ||
2946 | static void | |
2947 | nvptx_split_blocks (bb_insn_map_t *map) | |
2948 | { | |
2949 | insn_bb_vec_t worklist; | |
2950 | basic_block block; | |
2951 | rtx_insn *insn; | |
2952 | ||
2953 | /* Locate all the reorg instructions of interest. */ | |
2954 | FOR_ALL_BB_FN (block, cfun) | |
2955 | { | |
2956 | bool seen_insn = false; | |
2957 | ||
2958 | /* Clear visited flag, for use by parallel locator */ | |
2959 | block->flags &= ~BB_VISITED; | |
2960 | ||
2961 | FOR_BB_INSNS (block, insn) | |
2962 | { | |
2963 | if (!INSN_P (insn)) | |
2964 | continue; | |
2965 | switch (recog_memoized (insn)) | |
2966 | { | |
2967 | default: | |
2968 | seen_insn = true; | |
2969 | continue; | |
2970 | case CODE_FOR_nvptx_forked: | |
2971 | case CODE_FOR_nvptx_join: | |
2972 | break; | |
2973 | ||
2974 | case CODE_FOR_return: | |
2975 | /* We also need to split just before return insns, as | |
2976 | that insn needs executing by all threads, but the | |
2977 | block it is in probably does not. */ | |
2978 | break; | |
2979 | } | |
2980 | ||
2981 | if (seen_insn) | |
2982 | /* We've found an instruction that must be at the start of | |
2983 | a block, but isn't. Add it to the worklist. */ | |
2984 | worklist.safe_push (insn_bb_t (insn, block)); | |
2985 | else | |
2986 | /* It was already the first instruction. Just add it to | |
2987 | the map. */ | |
2988 | map->get_or_insert (block) = insn; | |
2989 | seen_insn = true; | |
2990 | } | |
2991 | } | |
2992 | ||
2993 | /* Split blocks on the worklist. */ | |
2994 | unsigned ix; | |
2995 | insn_bb_t *elt; | |
2996 | basic_block remap = 0; | |
2997 | for (ix = 0; worklist.iterate (ix, &elt); ix++) | |
2998 | { | |
2999 | if (remap != elt->second) | |
3000 | { | |
3001 | block = elt->second; | |
3002 | remap = block; | |
3003 | } | |
3004 | ||
3005 | /* Split block before insn. The insn is in the new block */ | |
3006 | edge e = split_block (block, PREV_INSN (elt->first)); | |
3007 | ||
3008 | block = e->dest; | |
3009 | map->get_or_insert (block) = elt->first; | |
3010 | } | |
3011 | } | |
3012 | ||
3013 | /* BLOCK is a basic block containing a head or tail instruction. | |
3014 | Locate the associated prehead or pretail instruction, which must be | |
3015 | in the single predecessor block. */ | |
3016 | ||
3017 | static rtx_insn * | |
3018 | nvptx_discover_pre (basic_block block, int expected) | |
3019 | { | |
3020 | gcc_assert (block->preds->length () == 1); | |
3021 | basic_block pre_block = (*block->preds)[0]->src; | |
3022 | rtx_insn *pre_insn; | |
3023 | ||
3024 | for (pre_insn = BB_END (pre_block); !INSN_P (pre_insn); | |
3025 | pre_insn = PREV_INSN (pre_insn)) | |
3026 | gcc_assert (pre_insn != BB_HEAD (pre_block)); | |
3027 | ||
3028 | gcc_assert (recog_memoized (pre_insn) == expected); | |
3029 | return pre_insn; | |
3030 | } | |
3031 | ||
3032 | /* Dump this parallel and all its inner parallels. */ | |
3033 | ||
3034 | static void | |
3035 | nvptx_dump_pars (parallel *par, unsigned depth) | |
3036 | { | |
3037 | fprintf (dump_file, "%u: mask %d head=%d, tail=%d\n", | |
3038 | depth, par->mask, | |
3039 | par->forked_block ? par->forked_block->index : -1, | |
3040 | par->join_block ? par->join_block->index : -1); | |
3041 | ||
3042 | fprintf (dump_file, " blocks:"); | |
3043 | ||
3044 | basic_block block; | |
3045 | for (unsigned ix = 0; par->blocks.iterate (ix, &block); ix++) | |
3046 | fprintf (dump_file, " %d", block->index); | |
3047 | fprintf (dump_file, "\n"); | |
3048 | if (par->inner) | |
3049 | nvptx_dump_pars (par->inner, depth + 1); | |
3050 | ||
3051 | if (par->next) | |
3052 | nvptx_dump_pars (par->next, depth); | |
3053 | } | |
3054 | ||
3055 | /* If BLOCK contains a fork/join marker, process it to create or | |
3056 | terminate a loop structure. Add this block to the current loop, | |
3057 | and then walk successor blocks. */ | |
3058 | ||
3059 | static parallel * | |
3060 | nvptx_find_par (bb_insn_map_t *map, parallel *par, basic_block block) | |
3061 | { | |
3062 | if (block->flags & BB_VISITED) | |
3063 | return par; | |
3064 | block->flags |= BB_VISITED; | |
3065 | ||
3066 | if (rtx_insn **endp = map->get (block)) | |
3067 | { | |
3068 | rtx_insn *end = *endp; | |
3069 | ||
3070 | /* This is a block head or tail, or return instruction. */ | |
3071 | switch (recog_memoized (end)) | |
3072 | { | |
3073 | case CODE_FOR_return: | |
3074 | /* Return instructions are in their own block, and we | |
3075 | don't need to do anything more. */ | |
3076 | return par; | |
3077 | ||
3078 | case CODE_FOR_nvptx_forked: | |
3079 | /* Loop head, create a new inner loop and add it into | |
3080 | our parent's child list. */ | |
3081 | { | |
3082 | unsigned mask = UINTVAL (XVECEXP (PATTERN (end), 0, 0)); | |
3083 | ||
3084 | gcc_assert (mask); | |
3085 | par = new parallel (par, mask); | |
3086 | par->forked_block = block; | |
3087 | par->forked_insn = end; | |
e91eba31 | 3088 | if (mask & GOMP_DIM_MASK (GOMP_DIM_WORKER)) |
d88cd9c4 NS |
3089 | par->fork_insn |
3090 | = nvptx_discover_pre (block, CODE_FOR_nvptx_fork); | |
3091 | } | |
3092 | break; | |
3093 | ||
3094 | case CODE_FOR_nvptx_join: | |
3095 | /* A loop tail. Finish the current loop and return to | |
3096 | parent. */ | |
3097 | { | |
3098 | unsigned mask = UINTVAL (XVECEXP (PATTERN (end), 0, 0)); | |
3099 | ||
3100 | gcc_assert (par->mask == mask); | |
3101 | par->join_block = block; | |
3102 | par->join_insn = end; | |
e91eba31 | 3103 | if (mask & GOMP_DIM_MASK (GOMP_DIM_WORKER)) |
d88cd9c4 NS |
3104 | par->joining_insn |
3105 | = nvptx_discover_pre (block, CODE_FOR_nvptx_joining); | |
3106 | par = par->parent; | |
3107 | } | |
3108 | break; | |
3109 | ||
3110 | default: | |
3111 | gcc_unreachable (); | |
3112 | } | |
3113 | } | |
3114 | ||
3115 | if (par) | |
3116 | /* Add this block onto the current loop's list of blocks. */ | |
3117 | par->blocks.safe_push (block); | |
3118 | else | |
3119 | /* This must be the entry block. Create a NULL parallel. */ | |
3120 | par = new parallel (0, 0); | |
3121 | ||
3122 | /* Walk successor blocks. */ | |
3123 | edge e; | |
3124 | edge_iterator ei; | |
3125 | ||
3126 | FOR_EACH_EDGE (e, ei, block->succs) | |
3127 | nvptx_find_par (map, par, e->dest); | |
3128 | ||
3129 | return par; | |
3130 | } | |
3131 | ||
3132 | /* DFS walk the CFG looking for fork & join markers. Construct | |
3133 | loop structures as we go. MAP is a mapping of basic blocks | |
3134 | to head & tail markers, discovered when splitting blocks. This | |
3135 | speeds up the discovery. We rely on the BB visited flag having | |
3136 | been cleared when splitting blocks. */ | |
3137 | ||
3138 | static parallel * | |
3139 | nvptx_discover_pars (bb_insn_map_t *map) | |
3140 | { | |
3141 | basic_block block; | |
3142 | ||
3143 | /* Mark exit blocks as visited. */ | |
3144 | block = EXIT_BLOCK_PTR_FOR_FN (cfun); | |
3145 | block->flags |= BB_VISITED; | |
3146 | ||
3147 | /* And entry block as not. */ | |
3148 | block = ENTRY_BLOCK_PTR_FOR_FN (cfun); | |
3149 | block->flags &= ~BB_VISITED; | |
3150 | ||
3151 | parallel *par = nvptx_find_par (map, 0, block); | |
3152 | ||
3153 | if (dump_file) | |
3154 | { | |
3155 | fprintf (dump_file, "\nLoops\n"); | |
3156 | nvptx_dump_pars (par, 0); | |
3157 | fprintf (dump_file, "\n"); | |
3158 | } | |
3159 | ||
3160 | return par; | |
3161 | } | |
3162 | ||
912442c2 NS |
3163 | /* Analyse a group of BBs within a partitioned region and create N |
3164 | Single-Entry-Single-Exit regions. Some of those regions will be | |
3165 | trivial ones consisting of a single BB. The blocks of a | |
3166 | partitioned region might form a set of disjoint graphs -- because | |
3167 | the region encloses a differently partitoned sub region. | |
3168 | ||
3169 | We use the linear time algorithm described in 'Finding Regions Fast: | |
3170 | Single Entry Single Exit and control Regions in Linear Time' | |
3171 | Johnson, Pearson & Pingali. That algorithm deals with complete | |
3172 | CFGs, where a back edge is inserted from END to START, and thus the | |
3173 | problem becomes one of finding equivalent loops. | |
3174 | ||
3175 | In this case we have a partial CFG. We complete it by redirecting | |
3176 | any incoming edge to the graph to be from an arbitrary external BB, | |
3177 | and similarly redirecting any outgoing edge to be to that BB. | |
3178 | Thus we end up with a closed graph. | |
3179 | ||
3180 | The algorithm works by building a spanning tree of an undirected | |
3181 | graph and keeping track of back edges from nodes further from the | |
3182 | root in the tree to nodes nearer to the root in the tree. In the | |
3183 | description below, the root is up and the tree grows downwards. | |
3184 | ||
3185 | We avoid having to deal with degenerate back-edges to the same | |
3186 | block, by splitting each BB into 3 -- one for input edges, one for | |
3187 | the node itself and one for the output edges. Such back edges are | |
3188 | referred to as 'Brackets'. Cycle equivalent nodes will have the | |
3189 | same set of brackets. | |
3190 | ||
3191 | Determining bracket equivalency is done by maintaining a list of | |
3192 | brackets in such a manner that the list length and final bracket | |
3193 | uniquely identify the set. | |
3194 | ||
3195 | We use coloring to mark all BBs with cycle equivalency with the | |
3196 | same color. This is the output of the 'Finding Regions Fast' | |
3197 | algorithm. Notice it doesn't actually find the set of nodes within | |
3198 | a particular region, just unorderd sets of nodes that are the | |
3199 | entries and exits of SESE regions. | |
3200 | ||
3201 | After determining cycle equivalency, we need to find the minimal | |
3202 | set of SESE regions. Do this with a DFS coloring walk of the | |
3203 | complete graph. We're either 'looking' or 'coloring'. When | |
3204 | looking, and we're in the subgraph, we start coloring the color of | |
3205 | the current node, and remember that node as the start of the | |
3206 | current color's SESE region. Every time we go to a new node, we | |
3207 | decrement the count of nodes with thet color. If it reaches zero, | |
3208 | we remember that node as the end of the current color's SESE region | |
3209 | and return to 'looking'. Otherwise we color the node the current | |
3210 | color. | |
3211 | ||
3212 | This way we end up with coloring the inside of non-trivial SESE | |
3213 | regions with the color of that region. */ | |
3214 | ||
3215 | /* A pair of BBs. We use this to represent SESE regions. */ | |
3216 | typedef std::pair<basic_block, basic_block> bb_pair_t; | |
3217 | typedef auto_vec<bb_pair_t> bb_pair_vec_t; | |
3218 | ||
3219 | /* A node in the undirected CFG. The discriminator SECOND indicates just | |
3220 | above or just below the BB idicated by FIRST. */ | |
3221 | typedef std::pair<basic_block, int> pseudo_node_t; | |
3222 | ||
3223 | /* A bracket indicates an edge towards the root of the spanning tree of the | |
3224 | undirected graph. Each bracket has a color, determined | |
3225 | from the currrent set of brackets. */ | |
3226 | struct bracket | |
3227 | { | |
3228 | pseudo_node_t back; /* Back target */ | |
3229 | ||
3230 | /* Current color and size of set. */ | |
3231 | unsigned color; | |
3232 | unsigned size; | |
3233 | ||
3234 | bracket (pseudo_node_t back_) | |
3235 | : back (back_), color (~0u), size (~0u) | |
3236 | { | |
3237 | } | |
3238 | ||
3239 | unsigned get_color (auto_vec<unsigned> &color_counts, unsigned length) | |
3240 | { | |
3241 | if (length != size) | |
3242 | { | |
3243 | size = length; | |
3244 | color = color_counts.length (); | |
3245 | color_counts.quick_push (0); | |
3246 | } | |
3247 | color_counts[color]++; | |
3248 | return color; | |
3249 | } | |
3250 | }; | |
3251 | ||
3252 | typedef auto_vec<bracket> bracket_vec_t; | |
3253 | ||
3254 | /* Basic block info for finding SESE regions. */ | |
3255 | ||
3256 | struct bb_sese | |
3257 | { | |
3258 | int node; /* Node number in spanning tree. */ | |
3259 | int parent; /* Parent node number. */ | |
3260 | ||
3261 | /* The algorithm splits each node A into Ai, A', Ao. The incoming | |
3262 | edges arrive at pseudo-node Ai and the outgoing edges leave at | |
3263 | pseudo-node Ao. We have to remember which way we arrived at a | |
3264 | particular node when generating the spanning tree. dir > 0 means | |
3265 | we arrived at Ai, dir < 0 means we arrived at Ao. */ | |
3266 | int dir; | |
3267 | ||
3268 | /* Lowest numbered pseudo-node reached via a backedge from thsis | |
3269 | node, or any descendant. */ | |
3270 | pseudo_node_t high; | |
3271 | ||
3272 | int color; /* Cycle-equivalence color */ | |
3273 | ||
3274 | /* Stack of brackets for this node. */ | |
3275 | bracket_vec_t brackets; | |
3276 | ||
3277 | bb_sese (unsigned node_, unsigned p, int dir_) | |
3278 | :node (node_), parent (p), dir (dir_) | |
3279 | { | |
3280 | } | |
3281 | ~bb_sese (); | |
3282 | ||
3283 | /* Push a bracket ending at BACK. */ | |
3284 | void push (const pseudo_node_t &back) | |
3285 | { | |
3286 | if (dump_file) | |
3287 | fprintf (dump_file, "Pushing backedge %d:%+d\n", | |
3288 | back.first ? back.first->index : 0, back.second); | |
3289 | brackets.safe_push (bracket (back)); | |
3290 | } | |
3291 | ||
3292 | void append (bb_sese *child); | |
3293 | void remove (const pseudo_node_t &); | |
3294 | ||
3295 | /* Set node's color. */ | |
3296 | void set_color (auto_vec<unsigned> &color_counts) | |
3297 | { | |
3298 | color = brackets.last ().get_color (color_counts, brackets.length ()); | |
3299 | } | |
3300 | }; | |
3301 | ||
3302 | bb_sese::~bb_sese () | |
3303 | { | |
3304 | } | |
3305 | ||
3306 | /* Destructively append CHILD's brackets. */ | |
3307 | ||
3308 | void | |
3309 | bb_sese::append (bb_sese *child) | |
3310 | { | |
3311 | if (int len = child->brackets.length ()) | |
3312 | { | |
3313 | int ix; | |
3314 | ||
3315 | if (dump_file) | |
3316 | { | |
3317 | for (ix = 0; ix < len; ix++) | |
3318 | { | |
3319 | const pseudo_node_t &pseudo = child->brackets[ix].back; | |
3320 | fprintf (dump_file, "Appending (%d)'s backedge %d:%+d\n", | |
3321 | child->node, pseudo.first ? pseudo.first->index : 0, | |
3322 | pseudo.second); | |
3323 | } | |
3324 | } | |
3325 | if (!brackets.length ()) | |
3326 | std::swap (brackets, child->brackets); | |
3327 | else | |
3328 | { | |
3329 | brackets.reserve (len); | |
3330 | for (ix = 0; ix < len; ix++) | |
3331 | brackets.quick_push (child->brackets[ix]); | |
3332 | } | |
3333 | } | |
3334 | } | |
3335 | ||
3336 | /* Remove brackets that terminate at PSEUDO. */ | |
3337 | ||
3338 | void | |
3339 | bb_sese::remove (const pseudo_node_t &pseudo) | |
3340 | { | |
3341 | unsigned removed = 0; | |
3342 | int len = brackets.length (); | |
3343 | ||
3344 | for (int ix = 0; ix < len; ix++) | |
3345 | { | |
3346 | if (brackets[ix].back == pseudo) | |
3347 | { | |
3348 | if (dump_file) | |
3349 | fprintf (dump_file, "Removing backedge %d:%+d\n", | |
3350 | pseudo.first ? pseudo.first->index : 0, pseudo.second); | |
3351 | removed++; | |
3352 | } | |
3353 | else if (removed) | |
3354 | brackets[ix-removed] = brackets[ix]; | |
3355 | } | |
3356 | while (removed--) | |
3357 | brackets.pop (); | |
3358 | } | |
3359 | ||
3360 | /* Accessors for BB's aux pointer. */ | |
3361 | #define BB_SET_SESE(B, S) ((B)->aux = (S)) | |
3362 | #define BB_GET_SESE(B) ((bb_sese *)(B)->aux) | |
3363 | ||
3364 | /* DFS walk creating SESE data structures. Only cover nodes with | |
3365 | BB_VISITED set. Append discovered blocks to LIST. We number in | |
3366 | increments of 3 so that the above and below pseudo nodes can be | |
3367 | implicitly numbered too. */ | |
3368 | ||
3369 | static int | |
3370 | nvptx_sese_number (int n, int p, int dir, basic_block b, | |
3371 | auto_vec<basic_block> *list) | |
3372 | { | |
3373 | if (BB_GET_SESE (b)) | |
3374 | return n; | |
3375 | ||
3376 | if (dump_file) | |
3377 | fprintf (dump_file, "Block %d(%d), parent (%d), orientation %+d\n", | |
3378 | b->index, n, p, dir); | |
3379 | ||
3380 | BB_SET_SESE (b, new bb_sese (n, p, dir)); | |
3381 | p = n; | |
3382 | ||
3383 | n += 3; | |
3384 | list->quick_push (b); | |
3385 | ||
3386 | /* First walk the nodes on the 'other side' of this node, then walk | |
3387 | the nodes on the same side. */ | |
3388 | for (unsigned ix = 2; ix; ix--) | |
3389 | { | |
3390 | vec<edge, va_gc> *edges = dir > 0 ? b->succs : b->preds; | |
3391 | size_t offset = (dir > 0 ? offsetof (edge_def, dest) | |
3392 | : offsetof (edge_def, src)); | |
3393 | edge e; | |
3394 | edge_iterator (ei); | |
3395 | ||
3396 | FOR_EACH_EDGE (e, ei, edges) | |
3397 | { | |
3398 | basic_block target = *(basic_block *)((char *)e + offset); | |
3399 | ||
3400 | if (target->flags & BB_VISITED) | |
3401 | n = nvptx_sese_number (n, p, dir, target, list); | |
3402 | } | |
3403 | dir = -dir; | |
3404 | } | |
3405 | return n; | |
3406 | } | |
3407 | ||
3408 | /* Process pseudo node above (DIR < 0) or below (DIR > 0) ME. | |
3409 | EDGES are the outgoing edges and OFFSET is the offset to the src | |
3410 | or dst block on the edges. */ | |
3411 | ||
3412 | static void | |
3413 | nvptx_sese_pseudo (basic_block me, bb_sese *sese, int depth, int dir, | |
3414 | vec<edge, va_gc> *edges, size_t offset) | |
3415 | { | |
3416 | edge e; | |
3417 | edge_iterator (ei); | |
3418 | int hi_back = depth; | |
3419 | pseudo_node_t node_back (0, depth); | |
3420 | int hi_child = depth; | |
3421 | pseudo_node_t node_child (0, depth); | |
3422 | basic_block child = NULL; | |
3423 | unsigned num_children = 0; | |
3424 | int usd = -dir * sese->dir; | |
3425 | ||
3426 | if (dump_file) | |
3427 | fprintf (dump_file, "\nProcessing %d(%d) %+d\n", | |
3428 | me->index, sese->node, dir); | |
3429 | ||
3430 | if (dir < 0) | |
3431 | { | |
3432 | /* This is the above pseudo-child. It has the BB itself as an | |
3433 | additional child node. */ | |
3434 | node_child = sese->high; | |
3435 | hi_child = node_child.second; | |
3436 | if (node_child.first) | |
3437 | hi_child += BB_GET_SESE (node_child.first)->node; | |
3438 | num_children++; | |
3439 | } | |
3440 | ||
3441 | /* Examine each edge. | |
3442 | - if it is a child (a) append its bracket list and (b) record | |
3443 | whether it is the child with the highest reaching bracket. | |
3444 | - if it is an edge to ancestor, record whether it's the highest | |
3445 | reaching backlink. */ | |
3446 | FOR_EACH_EDGE (e, ei, edges) | |
3447 | { | |
3448 | basic_block target = *(basic_block *)((char *)e + offset); | |
3449 | ||
3450 | if (bb_sese *t_sese = BB_GET_SESE (target)) | |
3451 | { | |
3452 | if (t_sese->parent == sese->node && !(t_sese->dir + usd)) | |
3453 | { | |
3454 | /* Child node. Append its bracket list. */ | |
3455 | num_children++; | |
3456 | sese->append (t_sese); | |
3457 | ||
3458 | /* Compare it's hi value. */ | |
3459 | int t_hi = t_sese->high.second; | |
3460 | ||
3461 | if (basic_block child_hi_block = t_sese->high.first) | |
3462 | t_hi += BB_GET_SESE (child_hi_block)->node; | |
3463 | ||
3464 | if (hi_child > t_hi) | |
3465 | { | |
3466 | hi_child = t_hi; | |
3467 | node_child = t_sese->high; | |
3468 | child = target; | |
3469 | } | |
3470 | } | |
3471 | else if (t_sese->node < sese->node + dir | |
3472 | && !(dir < 0 && sese->parent == t_sese->node)) | |
3473 | { | |
3474 | /* Non-parental ancestor node -- a backlink. */ | |
3475 | int d = usd * t_sese->dir; | |
3476 | int back = t_sese->node + d; | |
3477 | ||
3478 | if (hi_back > back) | |
3479 | { | |
3480 | hi_back = back; | |
3481 | node_back = pseudo_node_t (target, d); | |
3482 | } | |
3483 | } | |
3484 | } | |
3485 | else | |
3486 | { /* Fallen off graph, backlink to entry node. */ | |
3487 | hi_back = 0; | |
3488 | node_back = pseudo_node_t (0, 0); | |
3489 | } | |
3490 | } | |
3491 | ||
3492 | /* Remove any brackets that terminate at this pseudo node. */ | |
3493 | sese->remove (pseudo_node_t (me, dir)); | |
3494 | ||
3495 | /* Now push any backlinks from this pseudo node. */ | |
3496 | FOR_EACH_EDGE (e, ei, edges) | |
3497 | { | |
3498 | basic_block target = *(basic_block *)((char *)e + offset); | |
3499 | if (bb_sese *t_sese = BB_GET_SESE (target)) | |
3500 | { | |
3501 | if (t_sese->node < sese->node + dir | |
3502 | && !(dir < 0 && sese->parent == t_sese->node)) | |
3503 | /* Non-parental ancestor node - backedge from me. */ | |
3504 | sese->push (pseudo_node_t (target, usd * t_sese->dir)); | |
3505 | } | |
3506 | else | |
3507 | { | |
3508 | /* back edge to entry node */ | |
3509 | sese->push (pseudo_node_t (0, 0)); | |
3510 | } | |
3511 | } | |
3512 | ||
3513 | /* If this node leads directly or indirectly to a no-return region of | |
3514 | the graph, then fake a backedge to entry node. */ | |
3515 | if (!sese->brackets.length () || !edges || !edges->length ()) | |
3516 | { | |
3517 | hi_back = 0; | |
3518 | node_back = pseudo_node_t (0, 0); | |
3519 | sese->push (node_back); | |
3520 | } | |
3521 | ||
3522 | /* Record the highest reaching backedge from us or a descendant. */ | |
3523 | sese->high = hi_back < hi_child ? node_back : node_child; | |
3524 | ||
3525 | if (num_children > 1) | |
3526 | { | |
3527 | /* There is more than one child -- this is a Y shaped piece of | |
3528 | spanning tree. We have to insert a fake backedge from this | |
3529 | node to the highest ancestor reached by not-the-highest | |
3530 | reaching child. Note that there may be multiple children | |
3531 | with backedges to the same highest node. That's ok and we | |
3532 | insert the edge to that highest node. */ | |
3533 | hi_child = depth; | |
3534 | if (dir < 0 && child) | |
3535 | { | |
3536 | node_child = sese->high; | |
3537 | hi_child = node_child.second; | |
3538 | if (node_child.first) | |
3539 | hi_child += BB_GET_SESE (node_child.first)->node; | |
3540 | } | |
3541 | ||
3542 | FOR_EACH_EDGE (e, ei, edges) | |
3543 | { | |
3544 | basic_block target = *(basic_block *)((char *)e + offset); | |
3545 | ||
3546 | if (target == child) | |
3547 | /* Ignore the highest child. */ | |
3548 | continue; | |
3549 | ||
3550 | bb_sese *t_sese = BB_GET_SESE (target); | |
3551 | if (!t_sese) | |
3552 | continue; | |
3553 | if (t_sese->parent != sese->node) | |
3554 | /* Not a child. */ | |
3555 | continue; | |
3556 | ||
3557 | /* Compare its hi value. */ | |
3558 | int t_hi = t_sese->high.second; | |
3559 | ||
3560 | if (basic_block child_hi_block = t_sese->high.first) | |
3561 | t_hi += BB_GET_SESE (child_hi_block)->node; | |
3562 | ||
3563 | if (hi_child > t_hi) | |
3564 | { | |
3565 | hi_child = t_hi; | |
3566 | node_child = t_sese->high; | |
3567 | } | |
3568 | } | |
3569 | ||
3570 | sese->push (node_child); | |
3571 | } | |
3572 | } | |
3573 | ||
3574 | ||
3575 | /* DFS walk of BB graph. Color node BLOCK according to COLORING then | |
3576 | proceed to successors. Set SESE entry and exit nodes of | |
3577 | REGIONS. */ | |
3578 | ||
3579 | static void | |
3580 | nvptx_sese_color (auto_vec<unsigned> &color_counts, bb_pair_vec_t ®ions, | |
3581 | basic_block block, int coloring) | |
3582 | { | |
3583 | bb_sese *sese = BB_GET_SESE (block); | |
3584 | ||
3585 | if (block->flags & BB_VISITED) | |
3586 | { | |
3587 | /* If we've already encountered this block, either we must not | |
3588 | be coloring, or it must have been colored the current color. */ | |
3589 | gcc_assert (coloring < 0 || (sese && coloring == sese->color)); | |
3590 | return; | |
3591 | } | |
3592 | ||
3593 | block->flags |= BB_VISITED; | |
3594 | ||
3595 | if (sese) | |
3596 | { | |
3597 | if (coloring < 0) | |
3598 | { | |
3599 | /* Start coloring a region. */ | |
3600 | regions[sese->color].first = block; | |
3601 | coloring = sese->color; | |
3602 | } | |
3603 | ||
3604 | if (!--color_counts[sese->color] && sese->color == coloring) | |
3605 | { | |
3606 | /* Found final block of SESE region. */ | |
3607 | regions[sese->color].second = block; | |
3608 | coloring = -1; | |
3609 | } | |
3610 | else | |
3611 | /* Color the node, so we can assert on revisiting the node | |
3612 | that the graph is indeed SESE. */ | |
3613 | sese->color = coloring; | |
3614 | } | |
3615 | else | |
3616 | /* Fallen off the subgraph, we cannot be coloring. */ | |
3617 | gcc_assert (coloring < 0); | |
3618 | ||
3619 | /* Walk each successor block. */ | |
3620 | if (block->succs && block->succs->length ()) | |
3621 | { | |
3622 | edge e; | |
3623 | edge_iterator ei; | |
3624 | ||
3625 | FOR_EACH_EDGE (e, ei, block->succs) | |
3626 | nvptx_sese_color (color_counts, regions, e->dest, coloring); | |
3627 | } | |
3628 | else | |
3629 | gcc_assert (coloring < 0); | |
3630 | } | |
3631 | ||
3632 | /* Find minimal set of SESE regions covering BLOCKS. REGIONS might | |
3633 | end up with NULL entries in it. */ | |
3634 | ||
3635 | static void | |
3636 | nvptx_find_sese (auto_vec<basic_block> &blocks, bb_pair_vec_t ®ions) | |
3637 | { | |
3638 | basic_block block; | |
3639 | int ix; | |
3640 | ||
3641 | /* First clear each BB of the whole function. */ | |
2300c332 | 3642 | FOR_ALL_BB_FN (block, cfun) |
912442c2 NS |
3643 | { |
3644 | block->flags &= ~BB_VISITED; | |
3645 | BB_SET_SESE (block, 0); | |
3646 | } | |
912442c2 NS |
3647 | |
3648 | /* Mark blocks in the function that are in this graph. */ | |
3649 | for (ix = 0; blocks.iterate (ix, &block); ix++) | |
3650 | block->flags |= BB_VISITED; | |
3651 | ||
3652 | /* Counts of nodes assigned to each color. There cannot be more | |
3653 | colors than blocks (and hopefully there will be fewer). */ | |
3654 | auto_vec<unsigned> color_counts; | |
3655 | color_counts.reserve (blocks.length ()); | |
3656 | ||
3657 | /* Worklist of nodes in the spanning tree. Again, there cannot be | |
3658 | more nodes in the tree than blocks (there will be fewer if the | |
3659 | CFG of blocks is disjoint). */ | |
3660 | auto_vec<basic_block> spanlist; | |
3661 | spanlist.reserve (blocks.length ()); | |
3662 | ||
3663 | /* Make sure every block has its cycle class determined. */ | |
3664 | for (ix = 0; blocks.iterate (ix, &block); ix++) | |
3665 | { | |
3666 | if (BB_GET_SESE (block)) | |
3667 | /* We already met this block in an earlier graph solve. */ | |
3668 | continue; | |
3669 | ||
3670 | if (dump_file) | |
3671 | fprintf (dump_file, "Searching graph starting at %d\n", block->index); | |
3672 | ||
3673 | /* Number the nodes reachable from block initial DFS order. */ | |
3674 | int depth = nvptx_sese_number (2, 0, +1, block, &spanlist); | |
3675 | ||
3676 | /* Now walk in reverse DFS order to find cycle equivalents. */ | |
3677 | while (spanlist.length ()) | |
3678 | { | |
3679 | block = spanlist.pop (); | |
3680 | bb_sese *sese = BB_GET_SESE (block); | |
3681 | ||
3682 | /* Do the pseudo node below. */ | |
3683 | nvptx_sese_pseudo (block, sese, depth, +1, | |
3684 | sese->dir > 0 ? block->succs : block->preds, | |
3685 | (sese->dir > 0 ? offsetof (edge_def, dest) | |
3686 | : offsetof (edge_def, src))); | |
3687 | sese->set_color (color_counts); | |
3688 | /* Do the pseudo node above. */ | |
3689 | nvptx_sese_pseudo (block, sese, depth, -1, | |
3690 | sese->dir < 0 ? block->succs : block->preds, | |
3691 | (sese->dir < 0 ? offsetof (edge_def, dest) | |
3692 | : offsetof (edge_def, src))); | |
3693 | } | |
3694 | if (dump_file) | |
3695 | fprintf (dump_file, "\n"); | |
3696 | } | |
3697 | ||
3698 | if (dump_file) | |
3699 | { | |
3700 | unsigned count; | |
3701 | const char *comma = ""; | |
3702 | ||
3703 | fprintf (dump_file, "Found %d cycle equivalents\n", | |
3704 | color_counts.length ()); | |
3705 | for (ix = 0; color_counts.iterate (ix, &count); ix++) | |
3706 | { | |
3707 | fprintf (dump_file, "%s%d[%d]={", comma, ix, count); | |
3708 | ||
3709 | comma = ""; | |
3710 | for (unsigned jx = 0; blocks.iterate (jx, &block); jx++) | |
3711 | if (BB_GET_SESE (block)->color == ix) | |
3712 | { | |
3713 | block->flags |= BB_VISITED; | |
3714 | fprintf (dump_file, "%s%d", comma, block->index); | |
3715 | comma=","; | |
3716 | } | |
3717 | fprintf (dump_file, "}"); | |
3718 | comma = ", "; | |
3719 | } | |
3720 | fprintf (dump_file, "\n"); | |
3721 | } | |
3722 | ||
3723 | /* Now we've colored every block in the subgraph. We now need to | |
3724 | determine the minimal set of SESE regions that cover that | |
3725 | subgraph. Do this with a DFS walk of the complete function. | |
3726 | During the walk we're either 'looking' or 'coloring'. When we | |
3727 | reach the last node of a particular color, we stop coloring and | |
3728 | return to looking. */ | |
3729 | ||
3730 | /* There cannot be more SESE regions than colors. */ | |
3731 | regions.reserve (color_counts.length ()); | |
3732 | for (ix = color_counts.length (); ix--;) | |
3733 | regions.quick_push (bb_pair_t (0, 0)); | |
3734 | ||
3735 | for (ix = 0; blocks.iterate (ix, &block); ix++) | |
3736 | block->flags &= ~BB_VISITED; | |
3737 | ||
3738 | nvptx_sese_color (color_counts, regions, ENTRY_BLOCK_PTR_FOR_FN (cfun), -1); | |
3739 | ||
3740 | if (dump_file) | |
3741 | { | |
3742 | const char *comma = ""; | |
3743 | int len = regions.length (); | |
3744 | ||
3745 | fprintf (dump_file, "SESE regions:"); | |
3746 | for (ix = 0; ix != len; ix++) | |
3747 | { | |
3748 | basic_block from = regions[ix].first; | |
3749 | basic_block to = regions[ix].second; | |
3750 | ||
3751 | if (from) | |
3752 | { | |
3753 | fprintf (dump_file, "%s %d{%d", comma, ix, from->index); | |
3754 | if (to != from) | |
3755 | fprintf (dump_file, "->%d", to->index); | |
3756 | ||
3757 | int color = BB_GET_SESE (from)->color; | |
3758 | ||
3759 | /* Print the blocks within the region (excluding ends). */ | |
3760 | FOR_EACH_BB_FN (block, cfun) | |
3761 | { | |
3762 | bb_sese *sese = BB_GET_SESE (block); | |
3763 | ||
3764 | if (sese && sese->color == color | |
3765 | && block != from && block != to) | |
3766 | fprintf (dump_file, ".%d", block->index); | |
3767 | } | |
3768 | fprintf (dump_file, "}"); | |
3769 | } | |
3770 | comma = ","; | |
3771 | } | |
3772 | fprintf (dump_file, "\n\n"); | |
3773 | } | |
3774 | ||
3775 | for (ix = 0; blocks.iterate (ix, &block); ix++) | |
3776 | delete BB_GET_SESE (block); | |
3777 | } | |
3778 | ||
3779 | #undef BB_SET_SESE | |
3780 | #undef BB_GET_SESE | |
3781 | ||
e91eba31 NS |
3782 | /* Propagate live state at the start of a partitioned region. IS_CALL |
3783 | indicates whether the propagation is for a (partitioned) call | |
3784 | instruction. BLOCK provides the live register information, and | |
3785 | might not contain INSN. Propagation is inserted just after INSN. RW | |
3786 | indicates whether we are reading and/or writing state. This | |
d88cd9c4 NS |
3787 | separation is needed for worker-level proppagation where we |
3788 | essentially do a spill & fill. FN is the underlying worker | |
3789 | function to generate the propagation instructions for single | |
3790 | register. DATA is user data. | |
3791 | ||
e91eba31 NS |
3792 | Returns true if we didn't emit any instructions. |
3793 | ||
3794 | We propagate the live register set for non-calls and the entire | |
3795 | frame for calls and non-calls. We could do better by (a) | |
3796 | propagating just the live set that is used within the partitioned | |
3797 | regions and (b) only propagating stack entries that are used. The | |
3798 | latter might be quite hard to determine. */ | |
d88cd9c4 NS |
3799 | |
3800 | typedef rtx (*propagator_fn) (rtx, propagate_mask, unsigned, void *); | |
3801 | ||
e91eba31 NS |
3802 | static bool |
3803 | nvptx_propagate (bool is_call, basic_block block, rtx_insn *insn, | |
3804 | propagate_mask rw, propagator_fn fn, void *data) | |
d88cd9c4 NS |
3805 | { |
3806 | bitmap live = DF_LIVE_IN (block); | |
3807 | bitmap_iterator iterator; | |
3808 | unsigned ix; | |
e91eba31 | 3809 | bool empty = true; |
d88cd9c4 NS |
3810 | |
3811 | /* Copy the frame array. */ | |
3812 | HOST_WIDE_INT fs = get_frame_size (); | |
3813 | if (fs) | |
3814 | { | |
3815 | rtx tmp = gen_reg_rtx (DImode); | |
3816 | rtx idx = NULL_RTX; | |
3817 | rtx ptr = gen_reg_rtx (Pmode); | |
3818 | rtx pred = NULL_RTX; | |
3819 | rtx_code_label *label = NULL; | |
3820 | ||
e91eba31 | 3821 | empty = false; |
c1311c86 NS |
3822 | /* The frame size might not be DImode compatible, but the frame |
3823 | array's declaration will be. So it's ok to round up here. */ | |
3824 | fs = (fs + GET_MODE_SIZE (DImode) - 1) / GET_MODE_SIZE (DImode); | |
d88cd9c4 NS |
3825 | /* Detect single iteration loop. */ |
3826 | if (fs == 1) | |
3827 | fs = 0; | |
3828 | ||
3829 | start_sequence (); | |
3830 | emit_insn (gen_rtx_SET (ptr, frame_pointer_rtx)); | |
3831 | if (fs) | |
3832 | { | |
3833 | idx = gen_reg_rtx (SImode); | |
3834 | pred = gen_reg_rtx (BImode); | |
3835 | label = gen_label_rtx (); | |
3836 | ||
3837 | emit_insn (gen_rtx_SET (idx, GEN_INT (fs))); | |
3838 | /* Allow worker function to initialize anything needed. */ | |
3839 | rtx init = fn (tmp, PM_loop_begin, fs, data); | |
3840 | if (init) | |
3841 | emit_insn (init); | |
3842 | emit_label (label); | |
3843 | LABEL_NUSES (label)++; | |
3844 | emit_insn (gen_addsi3 (idx, idx, GEN_INT (-1))); | |
3845 | } | |
3846 | if (rw & PM_read) | |
3847 | emit_insn (gen_rtx_SET (tmp, gen_rtx_MEM (DImode, ptr))); | |
3848 | emit_insn (fn (tmp, rw, fs, data)); | |
3849 | if (rw & PM_write) | |
3850 | emit_insn (gen_rtx_SET (gen_rtx_MEM (DImode, ptr), tmp)); | |
3851 | if (fs) | |
3852 | { | |
3853 | emit_insn (gen_rtx_SET (pred, gen_rtx_NE (BImode, idx, const0_rtx))); | |
3854 | emit_insn (gen_adddi3 (ptr, ptr, GEN_INT (GET_MODE_SIZE (DImode)))); | |
3855 | emit_insn (gen_br_true_uni (pred, label)); | |
3856 | rtx fini = fn (tmp, PM_loop_end, fs, data); | |
3857 | if (fini) | |
3858 | emit_insn (fini); | |
3859 | emit_insn (gen_rtx_CLOBBER (GET_MODE (idx), idx)); | |
3860 | } | |
3861 | emit_insn (gen_rtx_CLOBBER (GET_MODE (tmp), tmp)); | |
3862 | emit_insn (gen_rtx_CLOBBER (GET_MODE (ptr), ptr)); | |
3863 | rtx cpy = get_insns (); | |
3864 | end_sequence (); | |
3865 | insn = emit_insn_after (cpy, insn); | |
3866 | } | |
3867 | ||
e91eba31 NS |
3868 | if (!is_call) |
3869 | /* Copy live registers. */ | |
3870 | EXECUTE_IF_SET_IN_BITMAP (live, 0, ix, iterator) | |
3871 | { | |
3872 | rtx reg = regno_reg_rtx[ix]; | |
d88cd9c4 | 3873 | |
e91eba31 NS |
3874 | if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) |
3875 | { | |
3876 | rtx bcast = fn (reg, rw, 0, data); | |
d88cd9c4 | 3877 | |
e91eba31 NS |
3878 | insn = emit_insn_after (bcast, insn); |
3879 | empty = false; | |
3880 | } | |
3881 | } | |
3882 | return empty; | |
d88cd9c4 NS |
3883 | } |
3884 | ||
3885 | /* Worker for nvptx_vpropagate. */ | |
3886 | ||
3887 | static rtx | |
3888 | vprop_gen (rtx reg, propagate_mask pm, | |
3889 | unsigned ARG_UNUSED (count), void *ARG_UNUSED (data)) | |
3890 | { | |
3891 | if (!(pm & PM_read_write)) | |
3892 | return 0; | |
3893 | ||
3894 | return nvptx_gen_vcast (reg); | |
3895 | } | |
3896 | ||
3897 | /* Propagate state that is live at start of BLOCK across the vectors | |
e91eba31 NS |
3898 | of a single warp. Propagation is inserted just after INSN. |
3899 | IS_CALL and return as for nvptx_propagate. */ | |
d88cd9c4 | 3900 | |
e91eba31 NS |
3901 | static bool |
3902 | nvptx_vpropagate (bool is_call, basic_block block, rtx_insn *insn) | |
d88cd9c4 | 3903 | { |
e91eba31 | 3904 | return nvptx_propagate (is_call, block, insn, PM_read_write, vprop_gen, 0); |
d88cd9c4 NS |
3905 | } |
3906 | ||
3907 | /* Worker for nvptx_wpropagate. */ | |
3908 | ||
3909 | static rtx | |
3910 | wprop_gen (rtx reg, propagate_mask pm, unsigned rep, void *data_) | |
3911 | { | |
3912 | wcast_data_t *data = (wcast_data_t *)data_; | |
3913 | ||
3914 | if (pm & PM_loop_begin) | |
3915 | { | |
3916 | /* Starting a loop, initialize pointer. */ | |
3917 | unsigned align = GET_MODE_ALIGNMENT (GET_MODE (reg)) / BITS_PER_UNIT; | |
3918 | ||
3919 | if (align > worker_bcast_align) | |
3920 | worker_bcast_align = align; | |
3921 | data->offset = (data->offset + align - 1) & ~(align - 1); | |
3922 | ||
3923 | data->ptr = gen_reg_rtx (Pmode); | |
3924 | ||
3925 | return gen_adddi3 (data->ptr, data->base, GEN_INT (data->offset)); | |
3926 | } | |
3927 | else if (pm & PM_loop_end) | |
3928 | { | |
3929 | rtx clobber = gen_rtx_CLOBBER (GET_MODE (data->ptr), data->ptr); | |
3930 | data->ptr = NULL_RTX; | |
3931 | return clobber; | |
3932 | } | |
3933 | else | |
3934 | return nvptx_gen_wcast (reg, pm, rep, data); | |
3935 | } | |
3936 | ||
3937 | /* Spill or fill live state that is live at start of BLOCK. PRE_P | |
3938 | indicates if this is just before partitioned mode (do spill), or | |
3939 | just after it starts (do fill). Sequence is inserted just after | |
e91eba31 | 3940 | INSN. IS_CALL and return as for nvptx_propagate. */ |
d88cd9c4 | 3941 | |
e91eba31 NS |
3942 | static bool |
3943 | nvptx_wpropagate (bool pre_p, bool is_call, basic_block block, rtx_insn *insn) | |
d88cd9c4 NS |
3944 | { |
3945 | wcast_data_t data; | |
3946 | ||
3947 | data.base = gen_reg_rtx (Pmode); | |
3948 | data.offset = 0; | |
3949 | data.ptr = NULL_RTX; | |
3950 | ||
e91eba31 NS |
3951 | bool empty = nvptx_propagate (is_call, block, insn, |
3952 | pre_p ? PM_read : PM_write, wprop_gen, &data); | |
3953 | gcc_assert (empty == !data.offset); | |
d88cd9c4 NS |
3954 | if (data.offset) |
3955 | { | |
3956 | /* Stuff was emitted, initialize the base pointer now. */ | |
bd602b7f | 3957 | rtx init = gen_rtx_SET (data.base, worker_bcast_sym); |
d88cd9c4 | 3958 | emit_insn_after (init, insn); |
15ab6f00 | 3959 | |
d88cd9c4 NS |
3960 | if (worker_bcast_size < data.offset) |
3961 | worker_bcast_size = data.offset; | |
3962 | } | |
e91eba31 | 3963 | return empty; |
d88cd9c4 NS |
3964 | } |
3965 | ||
3966 | /* Emit a worker-level synchronization barrier. We use different | |
3967 | markers for before and after synchronizations. */ | |
3968 | ||
3969 | static rtx | |
3970 | nvptx_wsync (bool after) | |
3971 | { | |
3972 | return gen_nvptx_barsync (GEN_INT (after)); | |
3973 | } | |
3974 | ||
43c371e8 TV |
3975 | #if WORKAROUND_PTXJIT_BUG |
3976 | /* Return first real insn in BB, or return NULL_RTX if BB does not contain | |
3977 | real insns. */ | |
3978 | ||
3979 | static rtx_insn * | |
3980 | bb_first_real_insn (basic_block bb) | |
3981 | { | |
3982 | rtx_insn *insn; | |
3983 | ||
3984 | /* Find first insn of from block. */ | |
3985 | FOR_BB_INSNS (bb, insn) | |
3986 | if (INSN_P (insn)) | |
3987 | return insn; | |
3988 | ||
3989 | return 0; | |
3990 | } | |
3991 | #endif | |
3992 | ||
6beefdbd TV |
3993 | /* Return true if INSN needs neutering. */ |
3994 | ||
3995 | static bool | |
3996 | needs_neutering_p (rtx_insn *insn) | |
3997 | { | |
3998 | if (!INSN_P (insn)) | |
3999 | return false; | |
4000 | ||
4001 | switch (recog_memoized (insn)) | |
4002 | { | |
4003 | case CODE_FOR_nvptx_fork: | |
4004 | case CODE_FOR_nvptx_forked: | |
4005 | case CODE_FOR_nvptx_joining: | |
4006 | case CODE_FOR_nvptx_join: | |
4007 | case CODE_FOR_nvptx_barsync: | |
4008 | return false; | |
4009 | default: | |
4010 | return true; | |
4011 | } | |
4012 | } | |
4013 | ||
a874808c TV |
4014 | /* Verify position of VECTOR_{JUMP,LABEL} and WORKER_{JUMP,LABEL} in FROM. */ |
4015 | ||
4016 | static bool | |
4017 | verify_neutering_jumps (basic_block from, | |
4018 | rtx_insn *vector_jump, rtx_insn *worker_jump, | |
4019 | rtx_insn *vector_label, rtx_insn *worker_label) | |
4020 | { | |
4021 | basic_block bb = from; | |
4022 | rtx_insn *insn = BB_HEAD (bb); | |
4023 | bool seen_worker_jump = false; | |
4024 | bool seen_vector_jump = false; | |
4025 | bool seen_worker_label = false; | |
4026 | bool seen_vector_label = false; | |
4027 | bool worker_neutered = false; | |
4028 | bool vector_neutered = false; | |
4029 | while (true) | |
4030 | { | |
4031 | if (insn == worker_jump) | |
4032 | { | |
4033 | seen_worker_jump = true; | |
4034 | worker_neutered = true; | |
4035 | gcc_assert (!vector_neutered); | |
4036 | } | |
4037 | else if (insn == vector_jump) | |
4038 | { | |
4039 | seen_vector_jump = true; | |
4040 | vector_neutered = true; | |
4041 | } | |
4042 | else if (insn == worker_label) | |
4043 | { | |
4044 | seen_worker_label = true; | |
4045 | gcc_assert (worker_neutered); | |
4046 | worker_neutered = false; | |
4047 | } | |
4048 | else if (insn == vector_label) | |
4049 | { | |
4050 | seen_vector_label = true; | |
4051 | gcc_assert (vector_neutered); | |
4052 | vector_neutered = false; | |
4053 | } | |
4054 | else if (INSN_P (insn)) | |
4055 | switch (recog_memoized (insn)) | |
4056 | { | |
4057 | case CODE_FOR_nvptx_barsync: | |
4058 | gcc_assert (!vector_neutered && !worker_neutered); | |
4059 | break; | |
4060 | default: | |
4061 | break; | |
4062 | } | |
4063 | ||
4064 | if (insn != BB_END (bb)) | |
4065 | insn = NEXT_INSN (insn); | |
4066 | else if (JUMP_P (insn) && single_succ_p (bb) | |
4067 | && !seen_vector_jump && !seen_worker_jump) | |
4068 | { | |
4069 | bb = single_succ (bb); | |
4070 | insn = BB_HEAD (bb); | |
4071 | } | |
4072 | else | |
4073 | break; | |
4074 | } | |
4075 | ||
4076 | gcc_assert (!(vector_jump && !seen_vector_jump)); | |
4077 | gcc_assert (!(worker_jump && !seen_worker_jump)); | |
4078 | ||
4079 | if (seen_vector_label || seen_worker_label) | |
4080 | { | |
4081 | gcc_assert (!(vector_label && !seen_vector_label)); | |
4082 | gcc_assert (!(worker_label && !seen_worker_label)); | |
4083 | ||
4084 | return true; | |
4085 | } | |
4086 | ||
4087 | return false; | |
4088 | } | |
4089 | ||
4090 | /* Verify position of VECTOR_LABEL and WORKER_LABEL in TO. */ | |
4091 | ||
4092 | static void | |
4093 | verify_neutering_labels (basic_block to, rtx_insn *vector_label, | |
4094 | rtx_insn *worker_label) | |
4095 | { | |
4096 | basic_block bb = to; | |
4097 | rtx_insn *insn = BB_END (bb); | |
4098 | bool seen_worker_label = false; | |
4099 | bool seen_vector_label = false; | |
4100 | while (true) | |
4101 | { | |
4102 | if (insn == worker_label) | |
4103 | { | |
4104 | seen_worker_label = true; | |
4105 | gcc_assert (!seen_vector_label); | |
4106 | } | |
4107 | else if (insn == vector_label) | |
4108 | seen_vector_label = true; | |
4109 | else if (INSN_P (insn)) | |
4110 | switch (recog_memoized (insn)) | |
4111 | { | |
4112 | case CODE_FOR_nvptx_barsync: | |
4113 | gcc_assert (!seen_vector_label && !seen_worker_label); | |
4114 | break; | |
4115 | } | |
4116 | ||
4117 | if (insn != BB_HEAD (bb)) | |
4118 | insn = PREV_INSN (insn); | |
4119 | else | |
4120 | break; | |
4121 | } | |
4122 | ||
4123 | gcc_assert (!(vector_label && !seen_vector_label)); | |
4124 | gcc_assert (!(worker_label && !seen_worker_label)); | |
4125 | } | |
4126 | ||
d88cd9c4 NS |
4127 | /* Single neutering according to MASK. FROM is the incoming block and |
4128 | TO is the outgoing block. These may be the same block. Insert at | |
4129 | start of FROM: | |
4130 | ||
4131 | if (tid.<axis>) goto end. | |
4132 | ||
4133 | and insert before ending branch of TO (if there is such an insn): | |
4134 | ||
4135 | end: | |
4136 | <possibly-broadcast-cond> | |
4137 | <branch> | |
4138 | ||
4139 | We currently only use differnt FROM and TO when skipping an entire | |
4140 | loop. We could do more if we detected superblocks. */ | |
4141 | ||
4142 | static void | |
4143 | nvptx_single (unsigned mask, basic_block from, basic_block to) | |
4144 | { | |
4145 | rtx_insn *head = BB_HEAD (from); | |
4146 | rtx_insn *tail = BB_END (to); | |
4147 | unsigned skip_mask = mask; | |
4148 | ||
ed9091b2 TV |
4149 | while (true) |
4150 | { | |
4151 | /* Find first insn of from block. */ | |
6beefdbd | 4152 | while (head != BB_END (from) && !needs_neutering_p (head)) |
ed9091b2 TV |
4153 | head = NEXT_INSN (head); |
4154 | ||
4155 | if (from == to) | |
4156 | break; | |
4157 | ||
4158 | if (!(JUMP_P (head) && single_succ_p (from))) | |
4159 | break; | |
4160 | ||
4161 | basic_block jump_target = single_succ (from); | |
4162 | if (!single_pred_p (jump_target)) | |
4163 | break; | |
4164 | ||
4165 | from = jump_target; | |
4166 | head = BB_HEAD (from); | |
4167 | } | |
d88cd9c4 NS |
4168 | |
4169 | /* Find last insn of to block */ | |
4170 | rtx_insn *limit = from == to ? head : BB_HEAD (to); | |
4171 | while (tail != limit && !INSN_P (tail) && !LABEL_P (tail)) | |
4172 | tail = PREV_INSN (tail); | |
4173 | ||
4174 | /* Detect if tail is a branch. */ | |
4175 | rtx tail_branch = NULL_RTX; | |
4176 | rtx cond_branch = NULL_RTX; | |
4177 | if (tail && INSN_P (tail)) | |
4178 | { | |
4179 | tail_branch = PATTERN (tail); | |
4180 | if (GET_CODE (tail_branch) != SET || SET_DEST (tail_branch) != pc_rtx) | |
4181 | tail_branch = NULL_RTX; | |
4182 | else | |
4183 | { | |
4184 | cond_branch = SET_SRC (tail_branch); | |
4185 | if (GET_CODE (cond_branch) != IF_THEN_ELSE) | |
4186 | cond_branch = NULL_RTX; | |
4187 | } | |
4188 | } | |
4189 | ||
4190 | if (tail == head) | |
4191 | { | |
4192 | /* If this is empty, do nothing. */ | |
6beefdbd | 4193 | if (!head || !needs_neutering_p (head)) |
d88cd9c4 NS |
4194 | return; |
4195 | ||
d88cd9c4 NS |
4196 | if (cond_branch) |
4197 | { | |
4198 | /* If we're only doing vector single, there's no need to | |
4199 | emit skip code because we'll not insert anything. */ | |
4200 | if (!(mask & GOMP_DIM_MASK (GOMP_DIM_VECTOR))) | |
4201 | skip_mask = 0; | |
4202 | } | |
4203 | else if (tail_branch) | |
4204 | /* Block with only unconditional branch. Nothing to do. */ | |
4205 | return; | |
4206 | } | |
4207 | ||
4208 | /* Insert the vector test inside the worker test. */ | |
4209 | unsigned mode; | |
4210 | rtx_insn *before = tail; | |
2ba16fd2 | 4211 | rtx_insn *neuter_start = NULL; |
a874808c TV |
4212 | rtx_insn *worker_label = NULL, *vector_label = NULL; |
4213 | rtx_insn *worker_jump = NULL, *vector_jump = NULL; | |
d88cd9c4 NS |
4214 | for (mode = GOMP_DIM_WORKER; mode <= GOMP_DIM_VECTOR; mode++) |
4215 | if (GOMP_DIM_MASK (mode) & skip_mask) | |
4216 | { | |
4217 | rtx_code_label *label = gen_label_rtx (); | |
4218 | rtx pred = cfun->machine->axis_predicate[mode - GOMP_DIM_WORKER]; | |
a874808c TV |
4219 | rtx_insn **mode_jump = mode == GOMP_DIM_VECTOR ? &vector_jump : &worker_jump; |
4220 | rtx_insn **mode_label = mode == GOMP_DIM_VECTOR ? &vector_label : &worker_label; | |
d88cd9c4 NS |
4221 | |
4222 | if (!pred) | |
4223 | { | |
4224 | pred = gen_reg_rtx (BImode); | |
4225 | cfun->machine->axis_predicate[mode - GOMP_DIM_WORKER] = pred; | |
4226 | } | |
4227 | ||
4228 | rtx br; | |
4229 | if (mode == GOMP_DIM_VECTOR) | |
4230 | br = gen_br_true (pred, label); | |
4231 | else | |
4232 | br = gen_br_true_uni (pred, label); | |
2ba16fd2 TV |
4233 | if (neuter_start) |
4234 | neuter_start = emit_insn_after (br, neuter_start); | |
4235 | else | |
4236 | neuter_start = emit_insn_before (br, head); | |
a874808c | 4237 | *mode_jump = neuter_start; |
d88cd9c4 NS |
4238 | |
4239 | LABEL_NUSES (label)++; | |
a874808c | 4240 | rtx_insn *label_insn; |
d88cd9c4 | 4241 | if (tail_branch) |
a874808c TV |
4242 | { |
4243 | label_insn = emit_label_before (label, before); | |
4244 | before = label_insn; | |
4245 | } | |
d88cd9c4 | 4246 | else |
be606483 | 4247 | { |
a874808c | 4248 | label_insn = emit_label_after (label, tail); |
e77a1236 TV |
4249 | if ((mode == GOMP_DIM_VECTOR || mode == GOMP_DIM_WORKER) |
4250 | && CALL_P (tail) && find_reg_note (tail, REG_NORETURN, NULL)) | |
be606483 TV |
4251 | emit_insn_after (gen_exit (), label_insn); |
4252 | } | |
a874808c TV |
4253 | |
4254 | if (mode == GOMP_DIM_VECTOR) | |
4255 | vector_label = label_insn; | |
4256 | else | |
4257 | worker_label = label_insn; | |
d88cd9c4 NS |
4258 | } |
4259 | ||
4260 | /* Now deal with propagating the branch condition. */ | |
4261 | if (cond_branch) | |
4262 | { | |
4263 | rtx pvar = XEXP (XEXP (cond_branch, 0), 0); | |
4264 | ||
4265 | if (GOMP_DIM_MASK (GOMP_DIM_VECTOR) == mask) | |
4266 | { | |
4267 | /* Vector mode only, do a shuffle. */ | |
43c371e8 TV |
4268 | #if WORKAROUND_PTXJIT_BUG |
4269 | /* The branch condition %rcond is propagated like this: | |
4270 | ||
4271 | { | |
4272 | .reg .u32 %x; | |
4273 | mov.u32 %x,%tid.x; | |
4274 | setp.ne.u32 %rnotvzero,%x,0; | |
4275 | } | |
4276 | ||
4277 | @%rnotvzero bra Lskip; | |
4278 | setp.<op>.<type> %rcond,op1,op2; | |
4279 | Lskip: | |
4280 | selp.u32 %rcondu32,1,0,%rcond; | |
4281 | shfl.idx.b32 %rcondu32,%rcondu32,0,31; | |
4282 | setp.ne.u32 %rcond,%rcondu32,0; | |
4283 | ||
4284 | There seems to be a bug in the ptx JIT compiler (observed at driver | |
4285 | version 381.22, at -O1 and higher for sm_61), that drops the shfl | |
4286 | unless %rcond is initialized to something before 'bra Lskip'. The | |
4287 | bug is not observed with ptxas from cuda 8.0.61. | |
4288 | ||
4289 | It is true that the code is non-trivial: at Lskip, %rcond is | |
4290 | uninitialized in threads 1-31, and after the selp the same holds | |
4291 | for %rcondu32. But shfl propagates the defined value in thread 0 | |
4292 | to threads 1-31, so after the shfl %rcondu32 is defined in threads | |
4293 | 0-31, and after the setp.ne %rcond is defined in threads 0-31. | |
4294 | ||
4295 | There is nothing in the PTX spec to suggest that this is wrong, or | |
4296 | to explain why the extra initialization is needed. So, we classify | |
8c8e9a6b TV |
4297 | it as a JIT bug, and the extra initialization as workaround: |
4298 | ||
4299 | { | |
4300 | .reg .u32 %x; | |
4301 | mov.u32 %x,%tid.x; | |
4302 | setp.ne.u32 %rnotvzero,%x,0; | |
4303 | } | |
4304 | ||
4305 | +.reg .pred %rcond2; | |
4306 | +setp.eq.u32 %rcond2, 1, 0; | |
4307 | ||
4308 | @%rnotvzero bra Lskip; | |
4309 | setp.<op>.<type> %rcond,op1,op2; | |
4310 | +mov.pred %rcond2, %rcond; | |
4311 | Lskip: | |
4312 | +mov.pred %rcond, %rcond2; | |
4313 | selp.u32 %rcondu32,1,0,%rcond; | |
4314 | shfl.idx.b32 %rcondu32,%rcondu32,0,31; | |
4315 | setp.ne.u32 %rcond,%rcondu32,0; | |
4316 | */ | |
4317 | rtx_insn *label = PREV_INSN (tail); | |
4318 | gcc_assert (label && LABEL_P (label)); | |
4319 | rtx tmp = gen_reg_rtx (BImode); | |
4320 | emit_insn_before (gen_movbi (tmp, const0_rtx), | |
43c371e8 | 4321 | bb_first_real_insn (from)); |
8c8e9a6b TV |
4322 | emit_insn_before (gen_rtx_SET (tmp, pvar), label); |
4323 | emit_insn_before (gen_rtx_SET (pvar, tmp), tail); | |
43c371e8 | 4324 | #endif |
d88cd9c4 NS |
4325 | emit_insn_before (nvptx_gen_vcast (pvar), tail); |
4326 | } | |
4327 | else | |
4328 | { | |
4329 | /* Includes worker mode, do spill & fill. By construction | |
4330 | we should never have worker mode only. */ | |
4331 | wcast_data_t data; | |
4332 | ||
4333 | data.base = worker_bcast_sym; | |
4334 | data.ptr = 0; | |
4335 | ||
4336 | if (worker_bcast_size < GET_MODE_SIZE (SImode)) | |
4337 | worker_bcast_size = GET_MODE_SIZE (SImode); | |
4338 | ||
4339 | data.offset = 0; | |
4340 | emit_insn_before (nvptx_gen_wcast (pvar, PM_read, 0, &data), | |
4341 | before); | |
4342 | /* Barrier so other workers can see the write. */ | |
4343 | emit_insn_before (nvptx_wsync (false), tail); | |
4344 | data.offset = 0; | |
4345 | emit_insn_before (nvptx_gen_wcast (pvar, PM_write, 0, &data), tail); | |
4346 | /* This barrier is needed to avoid worker zero clobbering | |
4347 | the broadcast buffer before all the other workers have | |
4348 | had a chance to read this instance of it. */ | |
4349 | emit_insn_before (nvptx_wsync (true), tail); | |
4350 | } | |
4351 | ||
4352 | extract_insn (tail); | |
4353 | rtx unsp = gen_rtx_UNSPEC (BImode, gen_rtvec (1, pvar), | |
4354 | UNSPEC_BR_UNIFIED); | |
4355 | validate_change (tail, recog_data.operand_loc[0], unsp, false); | |
4356 | } | |
a874808c TV |
4357 | |
4358 | bool seen_label = verify_neutering_jumps (from, vector_jump, worker_jump, | |
4359 | vector_label, worker_label); | |
4360 | if (!seen_label) | |
4361 | verify_neutering_labels (to, vector_label, worker_label); | |
d88cd9c4 NS |
4362 | } |
4363 | ||
4364 | /* PAR is a parallel that is being skipped in its entirety according to | |
4365 | MASK. Treat this as skipping a superblock starting at forked | |
4366 | and ending at joining. */ | |
4367 | ||
4368 | static void | |
4369 | nvptx_skip_par (unsigned mask, parallel *par) | |
4370 | { | |
4371 | basic_block tail = par->join_block; | |
4372 | gcc_assert (tail->preds->length () == 1); | |
4373 | ||
4374 | basic_block pre_tail = (*tail->preds)[0]->src; | |
4375 | gcc_assert (pre_tail->succs->length () == 1); | |
4376 | ||
4377 | nvptx_single (mask, par->forked_block, pre_tail); | |
4378 | } | |
4379 | ||
dba619f3 NS |
4380 | /* If PAR has a single inner parallel and PAR itself only contains |
4381 | empty entry and exit blocks, swallow the inner PAR. */ | |
4382 | ||
4383 | static void | |
4384 | nvptx_optimize_inner (parallel *par) | |
4385 | { | |
4386 | parallel *inner = par->inner; | |
4387 | ||
4388 | /* We mustn't be the outer dummy par. */ | |
4389 | if (!par->mask) | |
4390 | return; | |
4391 | ||
4392 | /* We must have a single inner par. */ | |
4393 | if (!inner || inner->next) | |
4394 | return; | |
4395 | ||
4396 | /* We must only contain 2 blocks ourselves -- the head and tail of | |
4397 | the inner par. */ | |
4398 | if (par->blocks.length () != 2) | |
4399 | return; | |
4400 | ||
4401 | /* We must be disjoint partitioning. As we only have vector and | |
4402 | worker partitioning, this is sufficient to guarantee the pars | |
4403 | have adjacent partitioning. */ | |
4404 | if ((par->mask & inner->mask) & (GOMP_DIM_MASK (GOMP_DIM_MAX) - 1)) | |
4405 | /* This indicates malformed code generation. */ | |
4406 | return; | |
4407 | ||
4408 | /* The outer forked insn should be immediately followed by the inner | |
4409 | fork insn. */ | |
4410 | rtx_insn *forked = par->forked_insn; | |
4411 | rtx_insn *fork = BB_END (par->forked_block); | |
4412 | ||
4413 | if (NEXT_INSN (forked) != fork) | |
4414 | return; | |
4415 | gcc_checking_assert (recog_memoized (fork) == CODE_FOR_nvptx_fork); | |
4416 | ||
4417 | /* The outer joining insn must immediately follow the inner join | |
4418 | insn. */ | |
4419 | rtx_insn *joining = par->joining_insn; | |
4420 | rtx_insn *join = inner->join_insn; | |
4421 | if (NEXT_INSN (join) != joining) | |
4422 | return; | |
4423 | ||
4424 | /* Preconditions met. Swallow the inner par. */ | |
4425 | if (dump_file) | |
4426 | fprintf (dump_file, "Merging loop %x [%d,%d] into %x [%d,%d]\n", | |
4427 | inner->mask, inner->forked_block->index, | |
4428 | inner->join_block->index, | |
4429 | par->mask, par->forked_block->index, par->join_block->index); | |
4430 | ||
4431 | par->mask |= inner->mask & (GOMP_DIM_MASK (GOMP_DIM_MAX) - 1); | |
4432 | ||
4433 | par->blocks.reserve (inner->blocks.length ()); | |
4434 | while (inner->blocks.length ()) | |
4435 | par->blocks.quick_push (inner->blocks.pop ()); | |
4436 | ||
4437 | par->inner = inner->inner; | |
4438 | inner->inner = NULL; | |
4439 | ||
4440 | delete inner; | |
4441 | } | |
4442 | ||
d88cd9c4 NS |
4443 | /* Process the parallel PAR and all its contained |
4444 | parallels. We do everything but the neutering. Return mask of | |
4445 | partitioned modes used within this parallel. */ | |
4446 | ||
4447 | static unsigned | |
4448 | nvptx_process_pars (parallel *par) | |
4449 | { | |
dba619f3 NS |
4450 | if (nvptx_optimize) |
4451 | nvptx_optimize_inner (par); | |
4452 | ||
d88cd9c4 NS |
4453 | unsigned inner_mask = par->mask; |
4454 | ||
4455 | /* Do the inner parallels first. */ | |
4456 | if (par->inner) | |
4457 | { | |
4458 | par->inner_mask = nvptx_process_pars (par->inner); | |
4459 | inner_mask |= par->inner_mask; | |
4460 | } | |
4461 | ||
e91eba31 NS |
4462 | bool is_call = (par->mask & GOMP_DIM_MASK (GOMP_DIM_MAX)) != 0; |
4463 | ||
4464 | if (par->mask & GOMP_DIM_MASK (GOMP_DIM_WORKER)) | |
d88cd9c4 | 4465 | { |
e91eba31 NS |
4466 | nvptx_wpropagate (false, is_call, par->forked_block, par->forked_insn); |
4467 | bool empty = nvptx_wpropagate (true, is_call, | |
4468 | par->forked_block, par->fork_insn); | |
4469 | ||
4470 | if (!empty || !is_call) | |
4471 | { | |
4472 | /* Insert begin and end synchronizations. */ | |
4473 | emit_insn_before (nvptx_wsync (false), par->forked_insn); | |
4474 | emit_insn_before (nvptx_wsync (true), par->join_insn); | |
4475 | } | |
d88cd9c4 NS |
4476 | } |
4477 | else if (par->mask & GOMP_DIM_MASK (GOMP_DIM_VECTOR)) | |
e91eba31 | 4478 | nvptx_vpropagate (is_call, par->forked_block, par->forked_insn); |
d88cd9c4 NS |
4479 | |
4480 | /* Now do siblings. */ | |
4481 | if (par->next) | |
4482 | inner_mask |= nvptx_process_pars (par->next); | |
4483 | return inner_mask; | |
4484 | } | |
4485 | ||
4486 | /* Neuter the parallel described by PAR. We recurse in depth-first | |
4487 | order. MODES are the partitioning of the execution and OUTER is | |
4488 | the partitioning of the parallels we are contained in. */ | |
4489 | ||
4490 | static void | |
4491 | nvptx_neuter_pars (parallel *par, unsigned modes, unsigned outer) | |
4492 | { | |
4493 | unsigned me = (par->mask | |
4494 | & (GOMP_DIM_MASK (GOMP_DIM_WORKER) | |
4495 | | GOMP_DIM_MASK (GOMP_DIM_VECTOR))); | |
4496 | unsigned skip_mask = 0, neuter_mask = 0; | |
4497 | ||
4498 | if (par->inner) | |
4499 | nvptx_neuter_pars (par->inner, modes, outer | me); | |
4500 | ||
4501 | for (unsigned mode = GOMP_DIM_WORKER; mode <= GOMP_DIM_VECTOR; mode++) | |
4502 | { | |
4503 | if ((outer | me) & GOMP_DIM_MASK (mode)) | |
4504 | {} /* Mode is partitioned: no neutering. */ | |
4505 | else if (!(modes & GOMP_DIM_MASK (mode))) | |
5d306e55 | 4506 | {} /* Mode is not used: nothing to do. */ |
d88cd9c4 NS |
4507 | else if (par->inner_mask & GOMP_DIM_MASK (mode) |
4508 | || !par->forked_insn) | |
4509 | /* Partitioned in inner parallels, or we're not a partitioned | |
4510 | at all: neuter individual blocks. */ | |
4511 | neuter_mask |= GOMP_DIM_MASK (mode); | |
4512 | else if (!par->parent || !par->parent->forked_insn | |
4513 | || par->parent->inner_mask & GOMP_DIM_MASK (mode)) | |
4514 | /* Parent isn't a parallel or contains this paralleling: skip | |
4515 | parallel at this level. */ | |
4516 | skip_mask |= GOMP_DIM_MASK (mode); | |
4517 | else | |
4518 | {} /* Parent will skip this parallel itself. */ | |
4519 | } | |
4520 | ||
4521 | if (neuter_mask) | |
4522 | { | |
912442c2 | 4523 | int ix, len; |
d88cd9c4 | 4524 | |
912442c2 NS |
4525 | if (nvptx_optimize) |
4526 | { | |
4527 | /* Neuter whole SESE regions. */ | |
4528 | bb_pair_vec_t regions; | |
4529 | ||
4530 | nvptx_find_sese (par->blocks, regions); | |
4531 | len = regions.length (); | |
4532 | for (ix = 0; ix != len; ix++) | |
4533 | { | |
4534 | basic_block from = regions[ix].first; | |
4535 | basic_block to = regions[ix].second; | |
4536 | ||
4537 | if (from) | |
4538 | nvptx_single (neuter_mask, from, to); | |
4539 | else | |
4540 | gcc_assert (!to); | |
4541 | } | |
4542 | } | |
4543 | else | |
d88cd9c4 | 4544 | { |
912442c2 NS |
4545 | /* Neuter each BB individually. */ |
4546 | len = par->blocks.length (); | |
4547 | for (ix = 0; ix != len; ix++) | |
4548 | { | |
4549 | basic_block block = par->blocks[ix]; | |
d88cd9c4 | 4550 | |
912442c2 NS |
4551 | nvptx_single (neuter_mask, block, block); |
4552 | } | |
d88cd9c4 NS |
4553 | } |
4554 | } | |
4555 | ||
4556 | if (skip_mask) | |
4557 | nvptx_skip_par (skip_mask, par); | |
4558 | ||
4559 | if (par->next) | |
4560 | nvptx_neuter_pars (par->next, modes, outer); | |
4561 | } | |
4562 | ||
3dede32b TV |
4563 | #if WORKAROUND_PTXJIT_BUG_2 |
4564 | /* Variant of pc_set that only requires JUMP_P (INSN) if STRICT. This variant | |
4565 | is needed in the nvptx target because the branches generated for | |
4566 | parititioning are NONJUMP_INSN_P, not JUMP_P. */ | |
4567 | ||
4568 | static rtx | |
4569 | nvptx_pc_set (const rtx_insn *insn, bool strict = true) | |
4570 | { | |
4571 | rtx pat; | |
4572 | if ((strict && !JUMP_P (insn)) | |
4573 | || (!strict && !INSN_P (insn))) | |
4574 | return NULL_RTX; | |
4575 | pat = PATTERN (insn); | |
4576 | ||
4577 | /* The set is allowed to appear either as the insn pattern or | |
4578 | the first set in a PARALLEL. */ | |
4579 | if (GET_CODE (pat) == PARALLEL) | |
4580 | pat = XVECEXP (pat, 0, 0); | |
4581 | if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == PC) | |
4582 | return pat; | |
4583 | ||
4584 | return NULL_RTX; | |
4585 | } | |
4586 | ||
4587 | /* Variant of condjump_label that only requires JUMP_P (INSN) if STRICT. */ | |
4588 | ||
4589 | static rtx | |
4590 | nvptx_condjump_label (const rtx_insn *insn, bool strict = true) | |
4591 | { | |
4592 | rtx x = nvptx_pc_set (insn, strict); | |
4593 | ||
4594 | if (!x) | |
4595 | return NULL_RTX; | |
4596 | x = SET_SRC (x); | |
4597 | if (GET_CODE (x) == LABEL_REF) | |
4598 | return x; | |
4599 | if (GET_CODE (x) != IF_THEN_ELSE) | |
4600 | return NULL_RTX; | |
4601 | if (XEXP (x, 2) == pc_rtx && GET_CODE (XEXP (x, 1)) == LABEL_REF) | |
4602 | return XEXP (x, 1); | |
4603 | if (XEXP (x, 1) == pc_rtx && GET_CODE (XEXP (x, 2)) == LABEL_REF) | |
4604 | return XEXP (x, 2); | |
4605 | return NULL_RTX; | |
4606 | } | |
4607 | ||
4608 | /* Insert a dummy ptx insn when encountering a branch to a label with no ptx | |
4609 | insn inbetween the branch and the label. This works around a JIT bug | |
4610 | observed at driver version 384.111, at -O0 for sm_50. */ | |
4611 | ||
4612 | static void | |
4613 | prevent_branch_around_nothing (void) | |
4614 | { | |
4615 | rtx_insn *seen_label = NULL; | |
4616 | for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4617 | { | |
b0b592fc | 4618 | if (INSN_P (insn) && condjump_p (insn)) |
3dede32b | 4619 | { |
b0b592fc | 4620 | seen_label = label_ref_label (nvptx_condjump_label (insn, false)); |
3dede32b TV |
4621 | continue; |
4622 | } | |
4623 | ||
b0b592fc TV |
4624 | if (seen_label == NULL) |
4625 | continue; | |
4626 | ||
3dede32b TV |
4627 | if (NOTE_P (insn) || DEBUG_INSN_P (insn)) |
4628 | continue; | |
4629 | ||
4630 | if (INSN_P (insn)) | |
4631 | switch (recog_memoized (insn)) | |
4632 | { | |
4633 | case CODE_FOR_nvptx_fork: | |
4634 | case CODE_FOR_nvptx_forked: | |
4635 | case CODE_FOR_nvptx_joining: | |
4636 | case CODE_FOR_nvptx_join: | |
4637 | continue; | |
4638 | default: | |
4639 | seen_label = NULL; | |
4640 | continue; | |
4641 | } | |
4642 | ||
4643 | if (LABEL_P (insn) && insn == seen_label) | |
4644 | emit_insn_before (gen_fake_nop (), insn); | |
4645 | ||
4646 | seen_label = NULL; | |
4647 | } | |
4648 | } | |
4649 | #endif | |
4650 | ||
21251395 TV |
4651 | #ifdef WORKAROUND_PTXJIT_BUG_3 |
4652 | /* Insert two membar.cta insns inbetween two subsequent bar.sync insns. This | |
4653 | works around a hang observed at driver version 390.48 for sm_50. */ | |
4654 | ||
4655 | static void | |
4656 | workaround_barsyncs (void) | |
4657 | { | |
4658 | bool seen_barsync = false; | |
4659 | for (rtx_insn *insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4660 | { | |
4661 | if (INSN_P (insn) && recog_memoized (insn) == CODE_FOR_nvptx_barsync) | |
4662 | { | |
4663 | if (seen_barsync) | |
4664 | { | |
4665 | emit_insn_before (gen_nvptx_membar_cta (), insn); | |
4666 | emit_insn_before (gen_nvptx_membar_cta (), insn); | |
4667 | } | |
4668 | ||
4669 | seen_barsync = true; | |
4670 | continue; | |
4671 | } | |
4672 | ||
4673 | if (!seen_barsync) | |
4674 | continue; | |
4675 | ||
4676 | if (NOTE_P (insn) || DEBUG_INSN_P (insn)) | |
4677 | continue; | |
4678 | else if (INSN_P (insn)) | |
4679 | switch (recog_memoized (insn)) | |
4680 | { | |
4681 | case CODE_FOR_nvptx_fork: | |
4682 | case CODE_FOR_nvptx_forked: | |
4683 | case CODE_FOR_nvptx_joining: | |
4684 | case CODE_FOR_nvptx_join: | |
4685 | continue; | |
4686 | default: | |
4687 | break; | |
4688 | } | |
4689 | ||
4690 | seen_barsync = false; | |
4691 | } | |
4692 | } | |
4693 | #endif | |
4694 | ||
517665b3 | 4695 | /* PTX-specific reorganization |
d88cd9c4 | 4696 | - Split blocks at fork and join instructions |
c38f0d8c NS |
4697 | - Compute live registers |
4698 | - Mark now-unused registers, so function begin doesn't declare | |
517665b3 | 4699 | unused registers. |
d88cd9c4 NS |
4700 | - Insert state propagation when entering partitioned mode |
4701 | - Insert neutering instructions when in single mode | |
c38f0d8c | 4702 | - Replace subregs with suitable sequences. |
517665b3 NS |
4703 | */ |
4704 | ||
4705 | static void | |
4706 | nvptx_reorg (void) | |
4707 | { | |
517665b3 NS |
4708 | /* We are freeing block_for_insn in the toplev to keep compatibility |
4709 | with old MDEP_REORGS that are not CFG based. Recompute it now. */ | |
4710 | compute_bb_for_insn (); | |
4711 | ||
4712 | thread_prologue_and_epilogue_insns (); | |
4713 | ||
d88cd9c4 NS |
4714 | /* Split blocks and record interesting unspecs. */ |
4715 | bb_insn_map_t bb_insn_map; | |
4716 | ||
4717 | nvptx_split_blocks (&bb_insn_map); | |
4718 | ||
c38f0d8c | 4719 | /* Compute live regs */ |
517665b3 NS |
4720 | df_clear_flags (DF_LR_RUN_DCE); |
4721 | df_set_flags (DF_NO_INSN_RESCAN | DF_NO_HARD_REGS); | |
d88cd9c4 NS |
4722 | df_live_add_problem (); |
4723 | df_live_set_all_dirty (); | |
517665b3 | 4724 | df_analyze (); |
738f2522 BS |
4725 | regstat_init_n_sets_and_refs (); |
4726 | ||
d88cd9c4 NS |
4727 | if (dump_file) |
4728 | df_dump (dump_file); | |
4729 | ||
517665b3 | 4730 | /* Mark unused regs as unused. */ |
d88cd9c4 | 4731 | int max_regs = max_reg_num (); |
44c068ae | 4732 | for (int i = LAST_VIRTUAL_REGISTER + 1; i < max_regs; i++) |
738f2522 BS |
4733 | if (REG_N_SETS (i) == 0 && REG_N_REFS (i) == 0) |
4734 | regno_reg_rtx[i] = const0_rtx; | |
517665b3 | 4735 | |
d88cd9c4 NS |
4736 | /* Determine launch dimensions of the function. If it is not an |
4737 | offloaded function (i.e. this is a regular compiler), the | |
4738 | function has no neutering. */ | |
629b3d75 | 4739 | tree attr = oacc_get_fn_attrib (current_function_decl); |
d88cd9c4 NS |
4740 | if (attr) |
4741 | { | |
4742 | /* If we determined this mask before RTL expansion, we could | |
4743 | elide emission of some levels of forks and joins. */ | |
4744 | unsigned mask = 0; | |
4745 | tree dims = TREE_VALUE (attr); | |
4746 | unsigned ix; | |
4747 | ||
4748 | for (ix = 0; ix != GOMP_DIM_MAX; ix++, dims = TREE_CHAIN (dims)) | |
4749 | { | |
4750 | int size = TREE_INT_CST_LOW (TREE_VALUE (dims)); | |
4751 | tree allowed = TREE_PURPOSE (dims); | |
4752 | ||
4753 | if (size != 1 && !(allowed && integer_zerop (allowed))) | |
4754 | mask |= GOMP_DIM_MASK (ix); | |
4755 | } | |
4756 | /* If there is worker neutering, there must be vector | |
4757 | neutering. Otherwise the hardware will fail. */ | |
4758 | gcc_assert (!(mask & GOMP_DIM_MASK (GOMP_DIM_WORKER)) | |
4759 | || (mask & GOMP_DIM_MASK (GOMP_DIM_VECTOR))); | |
4760 | ||
4761 | /* Discover & process partitioned regions. */ | |
4762 | parallel *pars = nvptx_discover_pars (&bb_insn_map); | |
4763 | nvptx_process_pars (pars); | |
4764 | nvptx_neuter_pars (pars, mask, 0); | |
4765 | delete pars; | |
4766 | } | |
4767 | ||
517665b3 | 4768 | /* Replace subregs. */ |
c03b0416 | 4769 | nvptx_reorg_subreg (); |
517665b3 | 4770 | |
5012919d AM |
4771 | if (TARGET_UNIFORM_SIMT) |
4772 | nvptx_reorg_uniform_simt (); | |
4773 | ||
3dede32b TV |
4774 | #if WORKAROUND_PTXJIT_BUG_2 |
4775 | prevent_branch_around_nothing (); | |
4776 | #endif | |
4777 | ||
21251395 TV |
4778 | #ifdef WORKAROUND_PTXJIT_BUG_3 |
4779 | workaround_barsyncs (); | |
4780 | #endif | |
4781 | ||
738f2522 | 4782 | regstat_free_n_sets_and_refs (); |
517665b3 NS |
4783 | |
4784 | df_finish_pass (true); | |
738f2522 BS |
4785 | } |
4786 | \f | |
4787 | /* Handle a "kernel" attribute; arguments as in | |
4788 | struct attribute_spec.handler. */ | |
4789 | ||
4790 | static tree | |
4791 | nvptx_handle_kernel_attribute (tree *node, tree name, tree ARG_UNUSED (args), | |
4792 | int ARG_UNUSED (flags), bool *no_add_attrs) | |
4793 | { | |
4794 | tree decl = *node; | |
4795 | ||
4796 | if (TREE_CODE (decl) != FUNCTION_DECL) | |
4797 | { | |
4798 | error ("%qE attribute only applies to functions", name); | |
4799 | *no_add_attrs = true; | |
4800 | } | |
b49e35a9 | 4801 | else if (!VOID_TYPE_P (TREE_TYPE (TREE_TYPE (decl)))) |
738f2522 BS |
4802 | { |
4803 | error ("%qE attribute requires a void return type", name); | |
4804 | *no_add_attrs = true; | |
4805 | } | |
4806 | ||
4807 | return NULL_TREE; | |
4808 | } | |
4809 | ||
5012919d AM |
4810 | /* Handle a "shared" attribute; arguments as in |
4811 | struct attribute_spec.handler. */ | |
4812 | ||
4813 | static tree | |
4814 | nvptx_handle_shared_attribute (tree *node, tree name, tree ARG_UNUSED (args), | |
4815 | int ARG_UNUSED (flags), bool *no_add_attrs) | |
4816 | { | |
4817 | tree decl = *node; | |
4818 | ||
4819 | if (TREE_CODE (decl) != VAR_DECL) | |
4820 | { | |
4821 | error ("%qE attribute only applies to variables", name); | |
4822 | *no_add_attrs = true; | |
4823 | } | |
4824 | else if (!(TREE_PUBLIC (decl) || TREE_STATIC (decl))) | |
4825 | { | |
4826 | error ("%qE attribute not allowed with auto storage class", name); | |
4827 | *no_add_attrs = true; | |
4828 | } | |
4829 | ||
4830 | return NULL_TREE; | |
4831 | } | |
4832 | ||
738f2522 BS |
4833 | /* Table of valid machine attributes. */ |
4834 | static const struct attribute_spec nvptx_attribute_table[] = | |
4835 | { | |
4849deb1 JJ |
4836 | /* { name, min_len, max_len, decl_req, type_req, fn_type_req, |
4837 | affects_type_identity, handler, exclude } */ | |
4838 | { "kernel", 0, 0, true, false, false, false, nvptx_handle_kernel_attribute, | |
5d9ae53d | 4839 | NULL }, |
4849deb1 | 4840 | { "shared", 0, 0, true, false, false, false, nvptx_handle_shared_attribute, |
5d9ae53d | 4841 | NULL }, |
4849deb1 | 4842 | { NULL, 0, 0, false, false, false, false, NULL, NULL } |
738f2522 BS |
4843 | }; |
4844 | \f | |
4845 | /* Limit vector alignments to BIGGEST_ALIGNMENT. */ | |
4846 | ||
4847 | static HOST_WIDE_INT | |
4848 | nvptx_vector_alignment (const_tree type) | |
4849 | { | |
4850 | HOST_WIDE_INT align = tree_to_shwi (TYPE_SIZE (type)); | |
4851 | ||
4852 | return MIN (align, BIGGEST_ALIGNMENT); | |
4853 | } | |
d88cd9c4 NS |
4854 | |
4855 | /* Indicate that INSN cannot be duplicated. */ | |
4856 | ||
4857 | static bool | |
4858 | nvptx_cannot_copy_insn_p (rtx_insn *insn) | |
4859 | { | |
4860 | switch (recog_memoized (insn)) | |
4861 | { | |
4862 | case CODE_FOR_nvptx_shufflesi: | |
4863 | case CODE_FOR_nvptx_shufflesf: | |
4864 | case CODE_FOR_nvptx_barsync: | |
4865 | case CODE_FOR_nvptx_fork: | |
4866 | case CODE_FOR_nvptx_forked: | |
4867 | case CODE_FOR_nvptx_joining: | |
4868 | case CODE_FOR_nvptx_join: | |
4869 | return true; | |
4870 | default: | |
4871 | return false; | |
4872 | } | |
4873 | } | |
a794bd20 NS |
4874 | |
4875 | /* Section anchors do not work. Initialization for flag_section_anchor | |
4876 | probes the existence of the anchoring target hooks and prevents | |
4877 | anchoring if they don't exist. However, we may be being used with | |
4878 | a host-side compiler that does support anchoring, and hence see | |
4879 | the anchor flag set (as it's not recalculated). So provide an | |
4880 | implementation denying anchoring. */ | |
4881 | ||
4882 | static bool | |
4883 | nvptx_use_anchors_for_symbol_p (const_rtx ARG_UNUSED (a)) | |
4884 | { | |
4885 | return false; | |
4886 | } | |
738f2522 | 4887 | \f |
1f83528e TS |
4888 | /* Record a symbol for mkoffload to enter into the mapping table. */ |
4889 | ||
4890 | static void | |
4891 | nvptx_record_offload_symbol (tree decl) | |
4892 | { | |
3e32ee19 NS |
4893 | switch (TREE_CODE (decl)) |
4894 | { | |
4895 | case VAR_DECL: | |
4896 | fprintf (asm_out_file, "//:VAR_MAP \"%s\"\n", | |
4897 | IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))); | |
4898 | break; | |
4899 | ||
4900 | case FUNCTION_DECL: | |
4901 | { | |
629b3d75 | 4902 | tree attr = oacc_get_fn_attrib (decl); |
5012919d AM |
4903 | /* OpenMP offloading does not set this attribute. */ |
4904 | tree dims = attr ? TREE_VALUE (attr) : NULL_TREE; | |
3e32ee19 | 4905 | |
3e32ee19 NS |
4906 | fprintf (asm_out_file, "//:FUNC_MAP \"%s\"", |
4907 | IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))); | |
4908 | ||
5012919d | 4909 | for (; dims; dims = TREE_CHAIN (dims)) |
3e32ee19 | 4910 | { |
5d306e55 | 4911 | int size = TREE_INT_CST_LOW (TREE_VALUE (dims)); |
3e32ee19 | 4912 | |
5d306e55 | 4913 | gcc_assert (!TREE_PURPOSE (dims)); |
3e32ee19 NS |
4914 | fprintf (asm_out_file, ", %#x", size); |
4915 | } | |
d2d47a28 | 4916 | |
3e32ee19 NS |
4917 | fprintf (asm_out_file, "\n"); |
4918 | } | |
4919 | break; | |
d2d47a28 | 4920 | |
3e32ee19 NS |
4921 | default: |
4922 | gcc_unreachable (); | |
4923 | } | |
1f83528e TS |
4924 | } |
4925 | ||
738f2522 BS |
4926 | /* Implement TARGET_ASM_FILE_START. Write the kinds of things ptxas expects |
4927 | at the start of a file. */ | |
4928 | ||
4929 | static void | |
4930 | nvptx_file_start (void) | |
4931 | { | |
4932 | fputs ("// BEGIN PREAMBLE\n", asm_out_file); | |
4933 | fputs ("\t.version\t3.1\n", asm_out_file); | |
4934 | fputs ("\t.target\tsm_30\n", asm_out_file); | |
4935 | fprintf (asm_out_file, "\t.address_size %d\n", GET_MODE_BITSIZE (Pmode)); | |
4936 | fputs ("// END PREAMBLE\n", asm_out_file); | |
4937 | } | |
4938 | ||
15ab6f00 NS |
4939 | /* Emit a declaration for a worker-level buffer in .shared memory. */ |
4940 | ||
4941 | static void | |
4942 | write_worker_buffer (FILE *file, rtx sym, unsigned align, unsigned size) | |
4943 | { | |
4944 | const char *name = XSTR (sym, 0); | |
4945 | ||
4946 | write_var_marker (file, true, false, name); | |
4947 | fprintf (file, ".shared .align %d .u8 %s[%d];\n", | |
4948 | align, name, size); | |
4949 | } | |
4950 | ||
ecf6e535 BS |
4951 | /* Write out the function declarations we've collected and declare storage |
4952 | for the broadcast buffer. */ | |
738f2522 BS |
4953 | |
4954 | static void | |
4955 | nvptx_file_end (void) | |
4956 | { | |
f3dba894 TS |
4957 | hash_table<tree_hasher>::iterator iter; |
4958 | tree decl; | |
4959 | FOR_EACH_HASH_TABLE_ELEMENT (*needed_fndecls_htab, decl, tree, iter) | |
00e52418 | 4960 | nvptx_record_fndecl (decl); |
738f2522 | 4961 | fputs (func_decls.str().c_str(), asm_out_file); |
d88cd9c4 NS |
4962 | |
4963 | if (worker_bcast_size) | |
15ab6f00 NS |
4964 | write_worker_buffer (asm_out_file, worker_bcast_sym, |
4965 | worker_bcast_align, worker_bcast_size); | |
f3552158 NS |
4966 | |
4967 | if (worker_red_size) | |
15ab6f00 NS |
4968 | write_worker_buffer (asm_out_file, worker_red_sym, |
4969 | worker_red_align, worker_red_size); | |
5012919d AM |
4970 | |
4971 | if (need_softstack_decl) | |
4972 | { | |
4973 | write_var_marker (asm_out_file, false, true, "__nvptx_stacks"); | |
4974 | /* 32 is the maximum number of warps in a block. Even though it's an | |
4975 | external declaration, emit the array size explicitly; otherwise, it | |
4976 | may fail at PTX JIT time if the definition is later in link order. */ | |
4977 | fprintf (asm_out_file, ".extern .shared .u%d __nvptx_stacks[32];\n", | |
4978 | POINTER_SIZE); | |
4979 | } | |
4980 | if (need_unisimt_decl) | |
4981 | { | |
4982 | write_var_marker (asm_out_file, false, true, "__nvptx_uni"); | |
4983 | fprintf (asm_out_file, ".extern .shared .u32 __nvptx_uni[32];\n"); | |
4984 | } | |
f3552158 NS |
4985 | } |
4986 | ||
4987 | /* Expander for the shuffle builtins. */ | |
4988 | ||
4989 | static rtx | |
4990 | nvptx_expand_shuffle (tree exp, rtx target, machine_mode mode, int ignore) | |
4991 | { | |
4992 | if (ignore) | |
4993 | return target; | |
4994 | ||
4995 | rtx src = expand_expr (CALL_EXPR_ARG (exp, 0), | |
4996 | NULL_RTX, mode, EXPAND_NORMAL); | |
4997 | if (!REG_P (src)) | |
4998 | src = copy_to_mode_reg (mode, src); | |
4999 | ||
5000 | rtx idx = expand_expr (CALL_EXPR_ARG (exp, 1), | |
5001 | NULL_RTX, SImode, EXPAND_NORMAL); | |
5002 | rtx op = expand_expr (CALL_EXPR_ARG (exp, 2), | |
5003 | NULL_RTX, SImode, EXPAND_NORMAL); | |
5004 | ||
5005 | if (!REG_P (idx) && GET_CODE (idx) != CONST_INT) | |
5006 | idx = copy_to_mode_reg (SImode, idx); | |
5007 | ||
59263259 NS |
5008 | rtx pat = nvptx_gen_shuffle (target, src, idx, |
5009 | (nvptx_shuffle_kind) INTVAL (op)); | |
f3552158 NS |
5010 | if (pat) |
5011 | emit_insn (pat); | |
5012 | ||
5013 | return target; | |
5014 | } | |
5015 | ||
5016 | /* Worker reduction address expander. */ | |
5017 | ||
5018 | static rtx | |
5019 | nvptx_expand_worker_addr (tree exp, rtx target, | |
5020 | machine_mode ARG_UNUSED (mode), int ignore) | |
5021 | { | |
5022 | if (ignore) | |
5023 | return target; | |
5024 | ||
5025 | unsigned align = TREE_INT_CST_LOW (CALL_EXPR_ARG (exp, 2)); | |
5026 | if (align > worker_red_align) | |
5027 | worker_red_align = align; | |
5028 | ||
5029 | unsigned offset = TREE_INT_CST_LOW (CALL_EXPR_ARG (exp, 0)); | |
5030 | unsigned size = TREE_INT_CST_LOW (CALL_EXPR_ARG (exp, 1)); | |
5031 | if (size + offset > worker_red_size) | |
5032 | worker_red_size = size + offset; | |
5033 | ||
9a863523 | 5034 | rtx addr = worker_red_sym; |
f3552158 | 5035 | if (offset) |
9a863523 NS |
5036 | { |
5037 | addr = gen_rtx_PLUS (Pmode, addr, GEN_INT (offset)); | |
5038 | addr = gen_rtx_CONST (Pmode, addr); | |
5039 | } | |
f3552158 | 5040 | |
9a863523 | 5041 | emit_move_insn (target, addr); |
f3552158 NS |
5042 | |
5043 | return target; | |
5044 | } | |
5045 | ||
5046 | /* Expand the CMP_SWAP PTX builtins. We have our own versions that do | |
5047 | not require taking the address of any object, other than the memory | |
5048 | cell being operated on. */ | |
5049 | ||
5050 | static rtx | |
5051 | nvptx_expand_cmp_swap (tree exp, rtx target, | |
5052 | machine_mode ARG_UNUSED (m), int ARG_UNUSED (ignore)) | |
5053 | { | |
5054 | machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); | |
5055 | ||
5056 | if (!target) | |
5057 | target = gen_reg_rtx (mode); | |
5058 | ||
5059 | rtx mem = expand_expr (CALL_EXPR_ARG (exp, 0), | |
5060 | NULL_RTX, Pmode, EXPAND_NORMAL); | |
5061 | rtx cmp = expand_expr (CALL_EXPR_ARG (exp, 1), | |
5062 | NULL_RTX, mode, EXPAND_NORMAL); | |
5063 | rtx src = expand_expr (CALL_EXPR_ARG (exp, 2), | |
5064 | NULL_RTX, mode, EXPAND_NORMAL); | |
5065 | rtx pat; | |
5066 | ||
5067 | mem = gen_rtx_MEM (mode, mem); | |
5068 | if (!REG_P (cmp)) | |
5069 | cmp = copy_to_mode_reg (mode, cmp); | |
5070 | if (!REG_P (src)) | |
5071 | src = copy_to_mode_reg (mode, src); | |
5072 | ||
5073 | if (mode == SImode) | |
5074 | pat = gen_atomic_compare_and_swapsi_1 (target, mem, cmp, src, const0_rtx); | |
5075 | else | |
5076 | pat = gen_atomic_compare_and_swapdi_1 (target, mem, cmp, src, const0_rtx); | |
5077 | ||
5078 | emit_insn (pat); | |
5079 | ||
5080 | return target; | |
5081 | } | |
5082 | ||
5083 | ||
5084 | /* Codes for all the NVPTX builtins. */ | |
5085 | enum nvptx_builtins | |
5086 | { | |
5087 | NVPTX_BUILTIN_SHUFFLE, | |
5088 | NVPTX_BUILTIN_SHUFFLELL, | |
5089 | NVPTX_BUILTIN_WORKER_ADDR, | |
5090 | NVPTX_BUILTIN_CMP_SWAP, | |
5091 | NVPTX_BUILTIN_CMP_SWAPLL, | |
5092 | NVPTX_BUILTIN_MAX | |
5093 | }; | |
5094 | ||
5095 | static GTY(()) tree nvptx_builtin_decls[NVPTX_BUILTIN_MAX]; | |
5096 | ||
5097 | /* Return the NVPTX builtin for CODE. */ | |
5098 | ||
5099 | static tree | |
5100 | nvptx_builtin_decl (unsigned code, bool ARG_UNUSED (initialize_p)) | |
5101 | { | |
5102 | if (code >= NVPTX_BUILTIN_MAX) | |
5103 | return error_mark_node; | |
5104 | ||
5105 | return nvptx_builtin_decls[code]; | |
5106 | } | |
5107 | ||
5108 | /* Set up all builtin functions for this target. */ | |
5109 | ||
5110 | static void | |
5111 | nvptx_init_builtins (void) | |
5112 | { | |
5113 | #define DEF(ID, NAME, T) \ | |
5114 | (nvptx_builtin_decls[NVPTX_BUILTIN_ ## ID] \ | |
5115 | = add_builtin_function ("__builtin_nvptx_" NAME, \ | |
5116 | build_function_type_list T, \ | |
5117 | NVPTX_BUILTIN_ ## ID, BUILT_IN_MD, NULL, NULL)) | |
5118 | #define ST sizetype | |
5119 | #define UINT unsigned_type_node | |
5120 | #define LLUINT long_long_unsigned_type_node | |
5121 | #define PTRVOID ptr_type_node | |
5122 | ||
5123 | DEF (SHUFFLE, "shuffle", (UINT, UINT, UINT, UINT, NULL_TREE)); | |
5124 | DEF (SHUFFLELL, "shufflell", (LLUINT, LLUINT, UINT, UINT, NULL_TREE)); | |
5125 | DEF (WORKER_ADDR, "worker_addr", | |
5126 | (PTRVOID, ST, UINT, UINT, NULL_TREE)); | |
5127 | DEF (CMP_SWAP, "cmp_swap", (UINT, PTRVOID, UINT, UINT, NULL_TREE)); | |
5128 | DEF (CMP_SWAPLL, "cmp_swapll", (LLUINT, PTRVOID, LLUINT, LLUINT, NULL_TREE)); | |
5129 | ||
5130 | #undef DEF | |
5131 | #undef ST | |
5132 | #undef UINT | |
5133 | #undef LLUINT | |
5134 | #undef PTRVOID | |
5135 | } | |
5136 | ||
5137 | /* Expand an expression EXP that calls a built-in function, | |
5138 | with result going to TARGET if that's convenient | |
5139 | (and in mode MODE if that's convenient). | |
5140 | SUBTARGET may be used as the target for computing one of EXP's operands. | |
5141 | IGNORE is nonzero if the value is to be ignored. */ | |
5142 | ||
5143 | static rtx | |
5144 | nvptx_expand_builtin (tree exp, rtx target, rtx ARG_UNUSED (subtarget), | |
5145 | machine_mode mode, int ignore) | |
5146 | { | |
5147 | tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); | |
5148 | switch (DECL_FUNCTION_CODE (fndecl)) | |
5149 | { | |
5150 | case NVPTX_BUILTIN_SHUFFLE: | |
5151 | case NVPTX_BUILTIN_SHUFFLELL: | |
5152 | return nvptx_expand_shuffle (exp, target, mode, ignore); | |
5153 | ||
5154 | case NVPTX_BUILTIN_WORKER_ADDR: | |
5155 | return nvptx_expand_worker_addr (exp, target, mode, ignore); | |
5156 | ||
5157 | case NVPTX_BUILTIN_CMP_SWAP: | |
5158 | case NVPTX_BUILTIN_CMP_SWAPLL: | |
5159 | return nvptx_expand_cmp_swap (exp, target, mode, ignore); | |
5160 | ||
5161 | default: gcc_unreachable (); | |
5162 | } | |
738f2522 BS |
5163 | } |
5164 | \f | |
f3552158 NS |
5165 | /* Define dimension sizes for known hardware. */ |
5166 | #define PTX_VECTOR_LENGTH 32 | |
5167 | #define PTX_WORKER_LENGTH 32 | |
605219e7 | 5168 | #define PTX_DEFAULT_RUNTIME_DIM 0 /* Defer to runtime. */ |
f3552158 | 5169 | |
5012919d AM |
5170 | /* Implement TARGET_SIMT_VF target hook: number of threads in a warp. */ |
5171 | ||
5172 | static int | |
5173 | nvptx_simt_vf () | |
5174 | { | |
5175 | return PTX_VECTOR_LENGTH; | |
5176 | } | |
5177 | ||
94829f87 NS |
5178 | /* Validate compute dimensions of an OpenACC offload or routine, fill |
5179 | in non-unity defaults. FN_LEVEL indicates the level at which a | |
b6adbb9f NS |
5180 | routine might spawn a loop. It is negative for non-routines. If |
5181 | DECL is null, we are validating the default dimensions. */ | |
94829f87 NS |
5182 | |
5183 | static bool | |
5d306e55 | 5184 | nvptx_goacc_validate_dims (tree decl, int dims[], int fn_level) |
94829f87 NS |
5185 | { |
5186 | bool changed = false; | |
5187 | ||
ccc8282b | 5188 | /* The vector size must be 32, unless this is a SEQ routine. */ |
b6adbb9f NS |
5189 | if (fn_level <= GOMP_DIM_VECTOR && fn_level >= -1 |
5190 | && dims[GOMP_DIM_VECTOR] >= 0 | |
ccc8282b NS |
5191 | && dims[GOMP_DIM_VECTOR] != PTX_VECTOR_LENGTH) |
5192 | { | |
b6adbb9f NS |
5193 | if (fn_level < 0 && dims[GOMP_DIM_VECTOR] >= 0) |
5194 | warning_at (decl ? DECL_SOURCE_LOCATION (decl) : UNKNOWN_LOCATION, 0, | |
ccc8282b | 5195 | dims[GOMP_DIM_VECTOR] |
324ff1a0 JJ |
5196 | ? G_("using vector_length (%d), ignoring %d") |
5197 | : G_("using vector_length (%d), ignoring runtime setting"), | |
ccc8282b NS |
5198 | PTX_VECTOR_LENGTH, dims[GOMP_DIM_VECTOR]); |
5199 | dims[GOMP_DIM_VECTOR] = PTX_VECTOR_LENGTH; | |
5200 | changed = true; | |
5201 | } | |
5202 | ||
5203 | /* Check the num workers is not too large. */ | |
5204 | if (dims[GOMP_DIM_WORKER] > PTX_WORKER_LENGTH) | |
5205 | { | |
b6adbb9f | 5206 | warning_at (decl ? DECL_SOURCE_LOCATION (decl) : UNKNOWN_LOCATION, 0, |
ccc8282b NS |
5207 | "using num_workers (%d), ignoring %d", |
5208 | PTX_WORKER_LENGTH, dims[GOMP_DIM_WORKER]); | |
5209 | dims[GOMP_DIM_WORKER] = PTX_WORKER_LENGTH; | |
5210 | changed = true; | |
5211 | } | |
94829f87 | 5212 | |
b6adbb9f NS |
5213 | if (!decl) |
5214 | { | |
5215 | dims[GOMP_DIM_VECTOR] = PTX_VECTOR_LENGTH; | |
5216 | if (dims[GOMP_DIM_WORKER] < 0) | |
605219e7 | 5217 | dims[GOMP_DIM_WORKER] = PTX_DEFAULT_RUNTIME_DIM; |
b6adbb9f | 5218 | if (dims[GOMP_DIM_GANG] < 0) |
605219e7 | 5219 | dims[GOMP_DIM_GANG] = PTX_DEFAULT_RUNTIME_DIM; |
b6adbb9f NS |
5220 | changed = true; |
5221 | } | |
5222 | ||
94829f87 NS |
5223 | return changed; |
5224 | } | |
d88cd9c4 | 5225 | |
bd751975 NS |
5226 | /* Return maximum dimension size, or zero for unbounded. */ |
5227 | ||
5228 | static int | |
5229 | nvptx_dim_limit (int axis) | |
5230 | { | |
5231 | switch (axis) | |
5232 | { | |
bd751975 NS |
5233 | case GOMP_DIM_VECTOR: |
5234 | return PTX_VECTOR_LENGTH; | |
5235 | ||
5236 | default: | |
5237 | break; | |
5238 | } | |
5239 | return 0; | |
5240 | } | |
5241 | ||
d88cd9c4 NS |
5242 | /* Determine whether fork & joins are needed. */ |
5243 | ||
5244 | static bool | |
5245 | nvptx_goacc_fork_join (gcall *call, const int dims[], | |
5246 | bool ARG_UNUSED (is_fork)) | |
5247 | { | |
5248 | tree arg = gimple_call_arg (call, 2); | |
5249 | unsigned axis = TREE_INT_CST_LOW (arg); | |
5250 | ||
5251 | /* We only care about worker and vector partitioning. */ | |
5252 | if (axis < GOMP_DIM_WORKER) | |
5253 | return false; | |
5254 | ||
5255 | /* If the size is 1, there's no partitioning. */ | |
5256 | if (dims[axis] == 1) | |
5257 | return false; | |
5258 | ||
5259 | return true; | |
5260 | } | |
5261 | ||
f3552158 NS |
5262 | /* Generate a PTX builtin function call that returns the address in |
5263 | the worker reduction buffer at OFFSET. TYPE is the type of the | |
5264 | data at that location. */ | |
5265 | ||
5266 | static tree | |
5267 | nvptx_get_worker_red_addr (tree type, tree offset) | |
5268 | { | |
5269 | machine_mode mode = TYPE_MODE (type); | |
5270 | tree fndecl = nvptx_builtin_decl (NVPTX_BUILTIN_WORKER_ADDR, true); | |
5271 | tree size = build_int_cst (unsigned_type_node, GET_MODE_SIZE (mode)); | |
5272 | tree align = build_int_cst (unsigned_type_node, | |
5273 | GET_MODE_ALIGNMENT (mode) / BITS_PER_UNIT); | |
5274 | tree call = build_call_expr (fndecl, 3, offset, size, align); | |
5275 | ||
5276 | return fold_convert (build_pointer_type (type), call); | |
5277 | } | |
5278 | ||
5279 | /* Emit a SHFL.DOWN using index SHFL of VAR into DEST_VAR. This function | |
5280 | will cast the variable if necessary. */ | |
5281 | ||
5282 | static void | |
5283 | nvptx_generate_vector_shuffle (location_t loc, | |
5284 | tree dest_var, tree var, unsigned shift, | |
5285 | gimple_seq *seq) | |
5286 | { | |
5287 | unsigned fn = NVPTX_BUILTIN_SHUFFLE; | |
5288 | tree_code code = NOP_EXPR; | |
dd3c1b14 NS |
5289 | tree arg_type = unsigned_type_node; |
5290 | tree var_type = TREE_TYPE (var); | |
5291 | tree dest_type = var_type; | |
f3552158 | 5292 | |
dd3c1b14 NS |
5293 | if (TREE_CODE (var_type) == COMPLEX_TYPE) |
5294 | var_type = TREE_TYPE (var_type); | |
5295 | ||
5296 | if (TREE_CODE (var_type) == REAL_TYPE) | |
f3552158 | 5297 | code = VIEW_CONVERT_EXPR; |
dd3c1b14 NS |
5298 | |
5299 | if (TYPE_SIZE (var_type) | |
5300 | == TYPE_SIZE (long_long_unsigned_type_node)) | |
f3552158 NS |
5301 | { |
5302 | fn = NVPTX_BUILTIN_SHUFFLELL; | |
dd3c1b14 | 5303 | arg_type = long_long_unsigned_type_node; |
f3552158 | 5304 | } |
dd3c1b14 | 5305 | |
f3552158 | 5306 | tree call = nvptx_builtin_decl (fn, true); |
dd3c1b14 NS |
5307 | tree bits = build_int_cst (unsigned_type_node, shift); |
5308 | tree kind = build_int_cst (unsigned_type_node, SHUFFLE_DOWN); | |
5309 | tree expr; | |
5310 | ||
5311 | if (var_type != dest_type) | |
5312 | { | |
5313 | /* Do real and imaginary parts separately. */ | |
5314 | tree real = fold_build1 (REALPART_EXPR, var_type, var); | |
5315 | real = fold_build1 (code, arg_type, real); | |
5316 | real = build_call_expr_loc (loc, call, 3, real, bits, kind); | |
5317 | real = fold_build1 (code, var_type, real); | |
f3552158 | 5318 | |
dd3c1b14 NS |
5319 | tree imag = fold_build1 (IMAGPART_EXPR, var_type, var); |
5320 | imag = fold_build1 (code, arg_type, imag); | |
5321 | imag = build_call_expr_loc (loc, call, 3, imag, bits, kind); | |
5322 | imag = fold_build1 (code, var_type, imag); | |
5323 | ||
5324 | expr = fold_build2 (COMPLEX_EXPR, dest_type, real, imag); | |
5325 | } | |
5326 | else | |
5327 | { | |
5328 | expr = fold_build1 (code, arg_type, var); | |
5329 | expr = build_call_expr_loc (loc, call, 3, expr, bits, kind); | |
5330 | expr = fold_build1 (code, dest_type, expr); | |
5331 | } | |
f3552158 | 5332 | |
dd3c1b14 | 5333 | gimplify_assign (dest_var, expr, seq); |
f3552158 NS |
5334 | } |
5335 | ||
33f47f42 NS |
5336 | /* Lazily generate the global lock var decl and return its address. */ |
5337 | ||
5338 | static tree | |
5339 | nvptx_global_lock_addr () | |
5340 | { | |
5341 | tree v = global_lock_var; | |
5342 | ||
5343 | if (!v) | |
5344 | { | |
5345 | tree name = get_identifier ("__reduction_lock"); | |
5346 | tree type = build_qualified_type (unsigned_type_node, | |
5347 | TYPE_QUAL_VOLATILE); | |
5348 | v = build_decl (BUILTINS_LOCATION, VAR_DECL, name, type); | |
5349 | global_lock_var = v; | |
5350 | DECL_ARTIFICIAL (v) = 1; | |
5351 | DECL_EXTERNAL (v) = 1; | |
5352 | TREE_STATIC (v) = 1; | |
5353 | TREE_PUBLIC (v) = 1; | |
5354 | TREE_USED (v) = 1; | |
5355 | mark_addressable (v); | |
5356 | mark_decl_referenced (v); | |
5357 | } | |
5358 | ||
5359 | return build_fold_addr_expr (v); | |
5360 | } | |
5361 | ||
5362 | /* Insert code to locklessly update *PTR with *PTR OP VAR just before | |
5363 | GSI. We use a lockless scheme for nearly all case, which looks | |
5364 | like: | |
5365 | actual = initval(OP); | |
5366 | do { | |
5367 | guess = actual; | |
5368 | write = guess OP myval; | |
5369 | actual = cmp&swap (ptr, guess, write) | |
5370 | } while (actual bit-different-to guess); | |
5371 | return write; | |
5372 | ||
5373 | This relies on a cmp&swap instruction, which is available for 32- | |
5374 | and 64-bit types. Larger types must use a locking scheme. */ | |
f3552158 NS |
5375 | |
5376 | static tree | |
5377 | nvptx_lockless_update (location_t loc, gimple_stmt_iterator *gsi, | |
5378 | tree ptr, tree var, tree_code op) | |
5379 | { | |
5380 | unsigned fn = NVPTX_BUILTIN_CMP_SWAP; | |
5381 | tree_code code = NOP_EXPR; | |
33f47f42 NS |
5382 | tree arg_type = unsigned_type_node; |
5383 | tree var_type = TREE_TYPE (var); | |
f3552158 | 5384 | |
33f47f42 NS |
5385 | if (TREE_CODE (var_type) == COMPLEX_TYPE |
5386 | || TREE_CODE (var_type) == REAL_TYPE) | |
f3552158 | 5387 | code = VIEW_CONVERT_EXPR; |
33f47f42 NS |
5388 | |
5389 | if (TYPE_SIZE (var_type) == TYPE_SIZE (long_long_unsigned_type_node)) | |
f3552158 | 5390 | { |
33f47f42 | 5391 | arg_type = long_long_unsigned_type_node; |
f3552158 | 5392 | fn = NVPTX_BUILTIN_CMP_SWAPLL; |
f3552158 NS |
5393 | } |
5394 | ||
33f47f42 NS |
5395 | tree swap_fn = nvptx_builtin_decl (fn, true); |
5396 | ||
f3552158 | 5397 | gimple_seq init_seq = NULL; |
33f47f42 NS |
5398 | tree init_var = make_ssa_name (arg_type); |
5399 | tree init_expr = omp_reduction_init_op (loc, op, var_type); | |
5400 | init_expr = fold_build1 (code, arg_type, init_expr); | |
f3552158 NS |
5401 | gimplify_assign (init_var, init_expr, &init_seq); |
5402 | gimple *init_end = gimple_seq_last (init_seq); | |
5403 | ||
5404 | gsi_insert_seq_before (gsi, init_seq, GSI_SAME_STMT); | |
5405 | ||
f3552158 NS |
5406 | /* Split the block just after the init stmts. */ |
5407 | basic_block pre_bb = gsi_bb (*gsi); | |
5408 | edge pre_edge = split_block (pre_bb, init_end); | |
5409 | basic_block loop_bb = pre_edge->dest; | |
5410 | pre_bb = pre_edge->src; | |
5411 | /* Reset the iterator. */ | |
5412 | *gsi = gsi_for_stmt (gsi_stmt (*gsi)); | |
5413 | ||
33f47f42 NS |
5414 | tree expect_var = make_ssa_name (arg_type); |
5415 | tree actual_var = make_ssa_name (arg_type); | |
5416 | tree write_var = make_ssa_name (arg_type); | |
5417 | ||
5418 | /* Build and insert the reduction calculation. */ | |
5419 | gimple_seq red_seq = NULL; | |
5420 | tree write_expr = fold_build1 (code, var_type, expect_var); | |
5421 | write_expr = fold_build2 (op, var_type, write_expr, var); | |
5422 | write_expr = fold_build1 (code, arg_type, write_expr); | |
5423 | gimplify_assign (write_var, write_expr, &red_seq); | |
5424 | ||
5425 | gsi_insert_seq_before (gsi, red_seq, GSI_SAME_STMT); | |
5426 | ||
5427 | /* Build & insert the cmp&swap sequence. */ | |
5428 | gimple_seq latch_seq = NULL; | |
5429 | tree swap_expr = build_call_expr_loc (loc, swap_fn, 3, | |
5430 | ptr, expect_var, write_var); | |
5431 | gimplify_assign (actual_var, swap_expr, &latch_seq); | |
5432 | ||
5433 | gcond *cond = gimple_build_cond (EQ_EXPR, actual_var, expect_var, | |
5434 | NULL_TREE, NULL_TREE); | |
5435 | gimple_seq_add_stmt (&latch_seq, cond); | |
5436 | ||
5437 | gimple *latch_end = gimple_seq_last (latch_seq); | |
5438 | gsi_insert_seq_before (gsi, latch_seq, GSI_SAME_STMT); | |
f3552158 | 5439 | |
33f47f42 NS |
5440 | /* Split the block just after the latch stmts. */ |
5441 | edge post_edge = split_block (loop_bb, latch_end); | |
f3552158 NS |
5442 | basic_block post_bb = post_edge->dest; |
5443 | loop_bb = post_edge->src; | |
5444 | *gsi = gsi_for_stmt (gsi_stmt (*gsi)); | |
5445 | ||
5446 | post_edge->flags ^= EDGE_TRUE_VALUE | EDGE_FALLTHRU; | |
72270bb5 | 5447 | post_edge->probability = profile_probability::even (); |
f3552158 | 5448 | edge loop_edge = make_edge (loop_bb, loop_bb, EDGE_FALSE_VALUE); |
72270bb5 | 5449 | loop_edge->probability = profile_probability::even (); |
f3552158 NS |
5450 | set_immediate_dominator (CDI_DOMINATORS, loop_bb, pre_bb); |
5451 | set_immediate_dominator (CDI_DOMINATORS, post_bb, loop_bb); | |
5452 | ||
5453 | gphi *phi = create_phi_node (expect_var, loop_bb); | |
5454 | add_phi_arg (phi, init_var, pre_edge, loc); | |
5455 | add_phi_arg (phi, actual_var, loop_edge, loc); | |
5456 | ||
5457 | loop *loop = alloc_loop (); | |
5458 | loop->header = loop_bb; | |
5459 | loop->latch = loop_bb; | |
5460 | add_loop (loop, loop_bb->loop_father); | |
5461 | ||
33f47f42 NS |
5462 | return fold_build1 (code, var_type, write_var); |
5463 | } | |
5464 | ||
5465 | /* Insert code to lockfully update *PTR with *PTR OP VAR just before | |
5466 | GSI. This is necessary for types larger than 64 bits, where there | |
5467 | is no cmp&swap instruction to implement a lockless scheme. We use | |
5468 | a lock variable in global memory. | |
5469 | ||
5470 | while (cmp&swap (&lock_var, 0, 1)) | |
5471 | continue; | |
5472 | T accum = *ptr; | |
5473 | accum = accum OP var; | |
5474 | *ptr = accum; | |
5475 | cmp&swap (&lock_var, 1, 0); | |
5476 | return accum; | |
5477 | ||
5478 | A lock in global memory is necessary to force execution engine | |
5479 | descheduling and avoid resource starvation that can occur if the | |
5480 | lock is in .shared memory. */ | |
5481 | ||
5482 | static tree | |
5483 | nvptx_lockfull_update (location_t loc, gimple_stmt_iterator *gsi, | |
5484 | tree ptr, tree var, tree_code op) | |
5485 | { | |
5486 | tree var_type = TREE_TYPE (var); | |
5487 | tree swap_fn = nvptx_builtin_decl (NVPTX_BUILTIN_CMP_SWAP, true); | |
5488 | tree uns_unlocked = build_int_cst (unsigned_type_node, 0); | |
5489 | tree uns_locked = build_int_cst (unsigned_type_node, 1); | |
5490 | ||
5491 | /* Split the block just before the gsi. Insert a gimple nop to make | |
5492 | this easier. */ | |
5493 | gimple *nop = gimple_build_nop (); | |
5494 | gsi_insert_before (gsi, nop, GSI_SAME_STMT); | |
5495 | basic_block entry_bb = gsi_bb (*gsi); | |
5496 | edge entry_edge = split_block (entry_bb, nop); | |
5497 | basic_block lock_bb = entry_edge->dest; | |
5498 | /* Reset the iterator. */ | |
5499 | *gsi = gsi_for_stmt (gsi_stmt (*gsi)); | |
5500 | ||
5501 | /* Build and insert the locking sequence. */ | |
5502 | gimple_seq lock_seq = NULL; | |
5503 | tree lock_var = make_ssa_name (unsigned_type_node); | |
5504 | tree lock_expr = nvptx_global_lock_addr (); | |
5505 | lock_expr = build_call_expr_loc (loc, swap_fn, 3, lock_expr, | |
5506 | uns_unlocked, uns_locked); | |
5507 | gimplify_assign (lock_var, lock_expr, &lock_seq); | |
5508 | gcond *cond = gimple_build_cond (EQ_EXPR, lock_var, uns_unlocked, | |
5509 | NULL_TREE, NULL_TREE); | |
5510 | gimple_seq_add_stmt (&lock_seq, cond); | |
5511 | gimple *lock_end = gimple_seq_last (lock_seq); | |
5512 | gsi_insert_seq_before (gsi, lock_seq, GSI_SAME_STMT); | |
5513 | ||
5514 | /* Split the block just after the lock sequence. */ | |
5515 | edge locked_edge = split_block (lock_bb, lock_end); | |
5516 | basic_block update_bb = locked_edge->dest; | |
5517 | lock_bb = locked_edge->src; | |
5518 | *gsi = gsi_for_stmt (gsi_stmt (*gsi)); | |
5519 | ||
5520 | /* Create the lock loop ... */ | |
5521 | locked_edge->flags ^= EDGE_TRUE_VALUE | EDGE_FALLTHRU; | |
72270bb5 TV |
5522 | locked_edge->probability = profile_probability::even (); |
5523 | edge loop_edge = make_edge (lock_bb, lock_bb, EDGE_FALSE_VALUE); | |
5524 | loop_edge->probability = profile_probability::even (); | |
33f47f42 NS |
5525 | set_immediate_dominator (CDI_DOMINATORS, lock_bb, entry_bb); |
5526 | set_immediate_dominator (CDI_DOMINATORS, update_bb, lock_bb); | |
5527 | ||
5528 | /* ... and the loop structure. */ | |
5529 | loop *lock_loop = alloc_loop (); | |
5530 | lock_loop->header = lock_bb; | |
5531 | lock_loop->latch = lock_bb; | |
5532 | lock_loop->nb_iterations_estimate = 1; | |
5533 | lock_loop->any_estimate = true; | |
5534 | add_loop (lock_loop, entry_bb->loop_father); | |
5535 | ||
5536 | /* Build and insert the reduction calculation. */ | |
5537 | gimple_seq red_seq = NULL; | |
5538 | tree acc_in = make_ssa_name (var_type); | |
5539 | tree ref_in = build_simple_mem_ref (ptr); | |
5540 | TREE_THIS_VOLATILE (ref_in) = 1; | |
5541 | gimplify_assign (acc_in, ref_in, &red_seq); | |
5542 | ||
5543 | tree acc_out = make_ssa_name (var_type); | |
5544 | tree update_expr = fold_build2 (op, var_type, ref_in, var); | |
5545 | gimplify_assign (acc_out, update_expr, &red_seq); | |
5546 | ||
5547 | tree ref_out = build_simple_mem_ref (ptr); | |
5548 | TREE_THIS_VOLATILE (ref_out) = 1; | |
5549 | gimplify_assign (ref_out, acc_out, &red_seq); | |
5550 | ||
5551 | gsi_insert_seq_before (gsi, red_seq, GSI_SAME_STMT); | |
5552 | ||
5553 | /* Build & insert the unlock sequence. */ | |
5554 | gimple_seq unlock_seq = NULL; | |
5555 | tree unlock_expr = nvptx_global_lock_addr (); | |
5556 | unlock_expr = build_call_expr_loc (loc, swap_fn, 3, unlock_expr, | |
5557 | uns_locked, uns_unlocked); | |
5558 | gimplify_and_add (unlock_expr, &unlock_seq); | |
5559 | gsi_insert_seq_before (gsi, unlock_seq, GSI_SAME_STMT); | |
5560 | ||
5561 | return acc_out; | |
5562 | } | |
5563 | ||
5564 | /* Emit a sequence to update a reduction accumlator at *PTR with the | |
5565 | value held in VAR using operator OP. Return the updated value. | |
5566 | ||
5567 | TODO: optimize for atomic ops and indepedent complex ops. */ | |
5568 | ||
5569 | static tree | |
5570 | nvptx_reduction_update (location_t loc, gimple_stmt_iterator *gsi, | |
5571 | tree ptr, tree var, tree_code op) | |
5572 | { | |
5573 | tree type = TREE_TYPE (var); | |
5574 | tree size = TYPE_SIZE (type); | |
5575 | ||
5576 | if (size == TYPE_SIZE (unsigned_type_node) | |
5577 | || size == TYPE_SIZE (long_long_unsigned_type_node)) | |
5578 | return nvptx_lockless_update (loc, gsi, ptr, var, op); | |
5579 | else | |
5580 | return nvptx_lockfull_update (loc, gsi, ptr, var, op); | |
f3552158 NS |
5581 | } |
5582 | ||
5583 | /* NVPTX implementation of GOACC_REDUCTION_SETUP. */ | |
5584 | ||
5585 | static void | |
5586 | nvptx_goacc_reduction_setup (gcall *call) | |
5587 | { | |
5588 | gimple_stmt_iterator gsi = gsi_for_stmt (call); | |
5589 | tree lhs = gimple_call_lhs (call); | |
5590 | tree var = gimple_call_arg (call, 2); | |
5591 | int level = TREE_INT_CST_LOW (gimple_call_arg (call, 3)); | |
5592 | gimple_seq seq = NULL; | |
5593 | ||
5594 | push_gimplify_context (true); | |
5595 | ||
5596 | if (level != GOMP_DIM_GANG) | |
5597 | { | |
5598 | /* Copy the receiver object. */ | |
5599 | tree ref_to_res = gimple_call_arg (call, 1); | |
5600 | ||
5601 | if (!integer_zerop (ref_to_res)) | |
5602 | var = build_simple_mem_ref (ref_to_res); | |
5603 | } | |
5604 | ||
5605 | if (level == GOMP_DIM_WORKER) | |
5606 | { | |
5607 | /* Store incoming value to worker reduction buffer. */ | |
5608 | tree offset = gimple_call_arg (call, 5); | |
5609 | tree call = nvptx_get_worker_red_addr (TREE_TYPE (var), offset); | |
5610 | tree ptr = make_ssa_name (TREE_TYPE (call)); | |
5611 | ||
5612 | gimplify_assign (ptr, call, &seq); | |
5613 | tree ref = build_simple_mem_ref (ptr); | |
5614 | TREE_THIS_VOLATILE (ref) = 1; | |
5615 | gimplify_assign (ref, var, &seq); | |
5616 | } | |
5617 | ||
5618 | if (lhs) | |
5619 | gimplify_assign (lhs, var, &seq); | |
5620 | ||
5621 | pop_gimplify_context (NULL); | |
5622 | gsi_replace_with_seq (&gsi, seq, true); | |
5623 | } | |
5624 | ||
5625 | /* NVPTX implementation of GOACC_REDUCTION_INIT. */ | |
5626 | ||
5627 | static void | |
5628 | nvptx_goacc_reduction_init (gcall *call) | |
5629 | { | |
5630 | gimple_stmt_iterator gsi = gsi_for_stmt (call); | |
5631 | tree lhs = gimple_call_lhs (call); | |
5632 | tree var = gimple_call_arg (call, 2); | |
5633 | int level = TREE_INT_CST_LOW (gimple_call_arg (call, 3)); | |
5634 | enum tree_code rcode | |
5635 | = (enum tree_code)TREE_INT_CST_LOW (gimple_call_arg (call, 4)); | |
5636 | tree init = omp_reduction_init_op (gimple_location (call), rcode, | |
5637 | TREE_TYPE (var)); | |
5638 | gimple_seq seq = NULL; | |
5639 | ||
5640 | push_gimplify_context (true); | |
5641 | ||
5642 | if (level == GOMP_DIM_VECTOR) | |
5643 | { | |
5644 | /* Initialize vector-non-zeroes to INIT_VAL (OP). */ | |
5645 | tree tid = make_ssa_name (integer_type_node); | |
5646 | tree dim_vector = gimple_call_arg (call, 3); | |
5647 | gimple *tid_call = gimple_build_call_internal (IFN_GOACC_DIM_POS, 1, | |
5648 | dim_vector); | |
5649 | gimple *cond_stmt = gimple_build_cond (NE_EXPR, tid, integer_zero_node, | |
5650 | NULL_TREE, NULL_TREE); | |
5651 | ||
5652 | gimple_call_set_lhs (tid_call, tid); | |
5653 | gimple_seq_add_stmt (&seq, tid_call); | |
5654 | gimple_seq_add_stmt (&seq, cond_stmt); | |
5655 | ||
5656 | /* Split the block just after the call. */ | |
5657 | edge init_edge = split_block (gsi_bb (gsi), call); | |
5658 | basic_block init_bb = init_edge->dest; | |
5659 | basic_block call_bb = init_edge->src; | |
5660 | ||
5661 | /* Fixup flags from call_bb to init_bb. */ | |
5662 | init_edge->flags ^= EDGE_FALLTHRU | EDGE_TRUE_VALUE; | |
8c38aed7 | 5663 | init_edge->probability = profile_probability::even (); |
f3552158 NS |
5664 | |
5665 | /* Set the initialization stmts. */ | |
5666 | gimple_seq init_seq = NULL; | |
5667 | tree init_var = make_ssa_name (TREE_TYPE (var)); | |
5668 | gimplify_assign (init_var, init, &init_seq); | |
5669 | gsi = gsi_start_bb (init_bb); | |
5670 | gsi_insert_seq_before (&gsi, init_seq, GSI_SAME_STMT); | |
5671 | ||
5672 | /* Split block just after the init stmt. */ | |
5673 | gsi_prev (&gsi); | |
5674 | edge inited_edge = split_block (gsi_bb (gsi), gsi_stmt (gsi)); | |
5675 | basic_block dst_bb = inited_edge->dest; | |
5676 | ||
5677 | /* Create false edge from call_bb to dst_bb. */ | |
5678 | edge nop_edge = make_edge (call_bb, dst_bb, EDGE_FALSE_VALUE); | |
8c38aed7 | 5679 | nop_edge->probability = profile_probability::even (); |
f3552158 NS |
5680 | |
5681 | /* Create phi node in dst block. */ | |
5682 | gphi *phi = create_phi_node (lhs, dst_bb); | |
5683 | add_phi_arg (phi, init_var, inited_edge, gimple_location (call)); | |
5684 | add_phi_arg (phi, var, nop_edge, gimple_location (call)); | |
5685 | ||
5686 | /* Reset dominator of dst bb. */ | |
5687 | set_immediate_dominator (CDI_DOMINATORS, dst_bb, call_bb); | |
5688 | ||
5689 | /* Reset the gsi. */ | |
5690 | gsi = gsi_for_stmt (call); | |
5691 | } | |
5692 | else | |
5693 | { | |
5694 | if (level == GOMP_DIM_GANG) | |
5695 | { | |
5696 | /* If there's no receiver object, propagate the incoming VAR. */ | |
5697 | tree ref_to_res = gimple_call_arg (call, 1); | |
5698 | if (integer_zerop (ref_to_res)) | |
5699 | init = var; | |
5700 | } | |
5701 | ||
5702 | gimplify_assign (lhs, init, &seq); | |
5703 | } | |
5704 | ||
5705 | pop_gimplify_context (NULL); | |
5706 | gsi_replace_with_seq (&gsi, seq, true); | |
5707 | } | |
5708 | ||
5709 | /* NVPTX implementation of GOACC_REDUCTION_FINI. */ | |
5710 | ||
5711 | static void | |
5712 | nvptx_goacc_reduction_fini (gcall *call) | |
5713 | { | |
5714 | gimple_stmt_iterator gsi = gsi_for_stmt (call); | |
5715 | tree lhs = gimple_call_lhs (call); | |
5716 | tree ref_to_res = gimple_call_arg (call, 1); | |
5717 | tree var = gimple_call_arg (call, 2); | |
5718 | int level = TREE_INT_CST_LOW (gimple_call_arg (call, 3)); | |
5719 | enum tree_code op | |
5720 | = (enum tree_code)TREE_INT_CST_LOW (gimple_call_arg (call, 4)); | |
5721 | gimple_seq seq = NULL; | |
5722 | tree r = NULL_TREE;; | |
5723 | ||
5724 | push_gimplify_context (true); | |
5725 | ||
5726 | if (level == GOMP_DIM_VECTOR) | |
5727 | { | |
5728 | /* Emit binary shuffle tree. TODO. Emit this as an actual loop, | |
5729 | but that requires a method of emitting a unified jump at the | |
5730 | gimple level. */ | |
5731 | for (int shfl = PTX_VECTOR_LENGTH / 2; shfl > 0; shfl = shfl >> 1) | |
5732 | { | |
5733 | tree other_var = make_ssa_name (TREE_TYPE (var)); | |
5734 | nvptx_generate_vector_shuffle (gimple_location (call), | |
5735 | other_var, var, shfl, &seq); | |
5736 | ||
5737 | r = make_ssa_name (TREE_TYPE (var)); | |
5738 | gimplify_assign (r, fold_build2 (op, TREE_TYPE (var), | |
5739 | var, other_var), &seq); | |
5740 | var = r; | |
5741 | } | |
5742 | } | |
5743 | else | |
5744 | { | |
5745 | tree accum = NULL_TREE; | |
5746 | ||
5747 | if (level == GOMP_DIM_WORKER) | |
5748 | { | |
5749 | /* Get reduction buffer address. */ | |
5750 | tree offset = gimple_call_arg (call, 5); | |
5751 | tree call = nvptx_get_worker_red_addr (TREE_TYPE (var), offset); | |
5752 | tree ptr = make_ssa_name (TREE_TYPE (call)); | |
5753 | ||
5754 | gimplify_assign (ptr, call, &seq); | |
5755 | accum = ptr; | |
5756 | } | |
5757 | else if (integer_zerop (ref_to_res)) | |
5758 | r = var; | |
5759 | else | |
5760 | accum = ref_to_res; | |
5761 | ||
5762 | if (accum) | |
5763 | { | |
33f47f42 | 5764 | /* UPDATE the accumulator. */ |
f3552158 NS |
5765 | gsi_insert_seq_before (&gsi, seq, GSI_SAME_STMT); |
5766 | seq = NULL; | |
33f47f42 NS |
5767 | r = nvptx_reduction_update (gimple_location (call), &gsi, |
5768 | accum, var, op); | |
f3552158 NS |
5769 | } |
5770 | } | |
5771 | ||
5772 | if (lhs) | |
5773 | gimplify_assign (lhs, r, &seq); | |
5774 | pop_gimplify_context (NULL); | |
5775 | ||
5776 | gsi_replace_with_seq (&gsi, seq, true); | |
5777 | } | |
5778 | ||
5779 | /* NVPTX implementation of GOACC_REDUCTION_TEARDOWN. */ | |
5780 | ||
5781 | static void | |
5782 | nvptx_goacc_reduction_teardown (gcall *call) | |
5783 | { | |
5784 | gimple_stmt_iterator gsi = gsi_for_stmt (call); | |
5785 | tree lhs = gimple_call_lhs (call); | |
5786 | tree var = gimple_call_arg (call, 2); | |
5787 | int level = TREE_INT_CST_LOW (gimple_call_arg (call, 3)); | |
5788 | gimple_seq seq = NULL; | |
5789 | ||
5790 | push_gimplify_context (true); | |
5791 | if (level == GOMP_DIM_WORKER) | |
5792 | { | |
5793 | /* Read the worker reduction buffer. */ | |
5794 | tree offset = gimple_call_arg (call, 5); | |
5795 | tree call = nvptx_get_worker_red_addr(TREE_TYPE (var), offset); | |
5796 | tree ptr = make_ssa_name (TREE_TYPE (call)); | |
5797 | ||
5798 | gimplify_assign (ptr, call, &seq); | |
5799 | var = build_simple_mem_ref (ptr); | |
5800 | TREE_THIS_VOLATILE (var) = 1; | |
5801 | } | |
5802 | ||
5803 | if (level != GOMP_DIM_GANG) | |
5804 | { | |
5805 | /* Write to the receiver object. */ | |
5806 | tree ref_to_res = gimple_call_arg (call, 1); | |
5807 | ||
5808 | if (!integer_zerop (ref_to_res)) | |
5809 | gimplify_assign (build_simple_mem_ref (ref_to_res), var, &seq); | |
5810 | } | |
5811 | ||
5812 | if (lhs) | |
5813 | gimplify_assign (lhs, var, &seq); | |
5814 | ||
5815 | pop_gimplify_context (NULL); | |
5816 | ||
5817 | gsi_replace_with_seq (&gsi, seq, true); | |
5818 | } | |
5819 | ||
5820 | /* NVPTX reduction expander. */ | |
5821 | ||
5563d5c0 | 5822 | static void |
f3552158 NS |
5823 | nvptx_goacc_reduction (gcall *call) |
5824 | { | |
5825 | unsigned code = (unsigned)TREE_INT_CST_LOW (gimple_call_arg (call, 0)); | |
5826 | ||
5827 | switch (code) | |
5828 | { | |
5829 | case IFN_GOACC_REDUCTION_SETUP: | |
5830 | nvptx_goacc_reduction_setup (call); | |
5831 | break; | |
5832 | ||
5833 | case IFN_GOACC_REDUCTION_INIT: | |
5834 | nvptx_goacc_reduction_init (call); | |
5835 | break; | |
5836 | ||
5837 | case IFN_GOACC_REDUCTION_FINI: | |
5838 | nvptx_goacc_reduction_fini (call); | |
5839 | break; | |
5840 | ||
5841 | case IFN_GOACC_REDUCTION_TEARDOWN: | |
5842 | nvptx_goacc_reduction_teardown (call); | |
5843 | break; | |
5844 | ||
5845 | default: | |
5846 | gcc_unreachable (); | |
5847 | } | |
5848 | } | |
5849 | ||
e053f710 TV |
5850 | static bool |
5851 | nvptx_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, | |
5852 | rtx x ATTRIBUTE_UNUSED) | |
5853 | { | |
5854 | return true; | |
5855 | } | |
5856 | ||
b98b34b7 TV |
5857 | static bool |
5858 | nvptx_vector_mode_supported (machine_mode mode) | |
5859 | { | |
3717fbe3 TV |
5860 | return (mode == V2SImode |
5861 | || mode == V2DImode); | |
5862 | } | |
5863 | ||
5864 | /* Return the preferred mode for vectorizing scalar MODE. */ | |
5865 | ||
5866 | static machine_mode | |
005ba29c | 5867 | nvptx_preferred_simd_mode (scalar_mode mode) |
3717fbe3 TV |
5868 | { |
5869 | switch (mode) | |
5870 | { | |
4e10a5a7 | 5871 | case E_DImode: |
3717fbe3 | 5872 | return V2DImode; |
4e10a5a7 | 5873 | case E_SImode: |
3717fbe3 TV |
5874 | return V2SImode; |
5875 | ||
5876 | default: | |
5877 | return default_preferred_simd_mode (mode); | |
5878 | } | |
5879 | } | |
5880 | ||
5881 | unsigned int | |
5882 | nvptx_data_alignment (const_tree type, unsigned int basic_align) | |
5883 | { | |
5884 | if (TREE_CODE (type) == INTEGER_TYPE) | |
5885 | { | |
5886 | unsigned HOST_WIDE_INT size = tree_to_uhwi (TYPE_SIZE_UNIT (type)); | |
5887 | if (size == GET_MODE_SIZE (TImode)) | |
5888 | return GET_MODE_BITSIZE (maybe_split_mode (TImode)); | |
5889 | } | |
5890 | ||
5891 | return basic_align; | |
b98b34b7 TV |
5892 | } |
5893 | ||
99e1629f RS |
5894 | /* Implement TARGET_MODES_TIEABLE_P. */ |
5895 | ||
5896 | static bool | |
5897 | nvptx_modes_tieable_p (machine_mode, machine_mode) | |
5898 | { | |
5899 | return false; | |
5900 | } | |
5901 | ||
c43f4279 RS |
5902 | /* Implement TARGET_HARD_REGNO_NREGS. */ |
5903 | ||
5904 | static unsigned int | |
5905 | nvptx_hard_regno_nregs (unsigned int, machine_mode) | |
5906 | { | |
5907 | return 1; | |
5908 | } | |
5909 | ||
0d803030 RS |
5910 | /* Implement TARGET_CAN_CHANGE_MODE_CLASS. */ |
5911 | ||
5912 | static bool | |
5913 | nvptx_can_change_mode_class (machine_mode, machine_mode, reg_class_t) | |
5914 | { | |
5915 | return false; | |
5916 | } | |
5917 | ||
738f2522 BS |
5918 | #undef TARGET_OPTION_OVERRIDE |
5919 | #define TARGET_OPTION_OVERRIDE nvptx_option_override | |
5920 | ||
5921 | #undef TARGET_ATTRIBUTE_TABLE | |
5922 | #define TARGET_ATTRIBUTE_TABLE nvptx_attribute_table | |
5923 | ||
d81db636 SB |
5924 | #undef TARGET_LRA_P |
5925 | #define TARGET_LRA_P hook_bool_void_false | |
5926 | ||
738f2522 BS |
5927 | #undef TARGET_LEGITIMATE_ADDRESS_P |
5928 | #define TARGET_LEGITIMATE_ADDRESS_P nvptx_legitimate_address_p | |
5929 | ||
5930 | #undef TARGET_PROMOTE_FUNCTION_MODE | |
5931 | #define TARGET_PROMOTE_FUNCTION_MODE nvptx_promote_function_mode | |
5932 | ||
5933 | #undef TARGET_FUNCTION_ARG | |
5934 | #define TARGET_FUNCTION_ARG nvptx_function_arg | |
5935 | #undef TARGET_FUNCTION_INCOMING_ARG | |
5936 | #define TARGET_FUNCTION_INCOMING_ARG nvptx_function_incoming_arg | |
5937 | #undef TARGET_FUNCTION_ARG_ADVANCE | |
5938 | #define TARGET_FUNCTION_ARG_ADVANCE nvptx_function_arg_advance | |
1988b2c2 NS |
5939 | #undef TARGET_FUNCTION_ARG_BOUNDARY |
5940 | #define TARGET_FUNCTION_ARG_BOUNDARY nvptx_function_arg_boundary | |
738f2522 BS |
5941 | #undef TARGET_PASS_BY_REFERENCE |
5942 | #define TARGET_PASS_BY_REFERENCE nvptx_pass_by_reference | |
5943 | #undef TARGET_FUNCTION_VALUE_REGNO_P | |
5944 | #define TARGET_FUNCTION_VALUE_REGNO_P nvptx_function_value_regno_p | |
5945 | #undef TARGET_FUNCTION_VALUE | |
5946 | #define TARGET_FUNCTION_VALUE nvptx_function_value | |
5947 | #undef TARGET_LIBCALL_VALUE | |
5948 | #define TARGET_LIBCALL_VALUE nvptx_libcall_value | |
5949 | #undef TARGET_FUNCTION_OK_FOR_SIBCALL | |
5950 | #define TARGET_FUNCTION_OK_FOR_SIBCALL nvptx_function_ok_for_sibcall | |
18c05628 NS |
5951 | #undef TARGET_GET_DRAP_RTX |
5952 | #define TARGET_GET_DRAP_RTX nvptx_get_drap_rtx | |
738f2522 BS |
5953 | #undef TARGET_SPLIT_COMPLEX_ARG |
5954 | #define TARGET_SPLIT_COMPLEX_ARG hook_bool_const_tree_true | |
5955 | #undef TARGET_RETURN_IN_MEMORY | |
5956 | #define TARGET_RETURN_IN_MEMORY nvptx_return_in_memory | |
5957 | #undef TARGET_OMIT_STRUCT_RETURN_REG | |
5958 | #define TARGET_OMIT_STRUCT_RETURN_REG true | |
5959 | #undef TARGET_STRICT_ARGUMENT_NAMING | |
5960 | #define TARGET_STRICT_ARGUMENT_NAMING nvptx_strict_argument_naming | |
738f2522 BS |
5961 | #undef TARGET_CALL_ARGS |
5962 | #define TARGET_CALL_ARGS nvptx_call_args | |
5963 | #undef TARGET_END_CALL_ARGS | |
5964 | #define TARGET_END_CALL_ARGS nvptx_end_call_args | |
5965 | ||
5966 | #undef TARGET_ASM_FILE_START | |
5967 | #define TARGET_ASM_FILE_START nvptx_file_start | |
5968 | #undef TARGET_ASM_FILE_END | |
5969 | #define TARGET_ASM_FILE_END nvptx_file_end | |
5970 | #undef TARGET_ASM_GLOBALIZE_LABEL | |
5971 | #define TARGET_ASM_GLOBALIZE_LABEL nvptx_globalize_label | |
5972 | #undef TARGET_ASM_ASSEMBLE_UNDEFINED_DECL | |
5973 | #define TARGET_ASM_ASSEMBLE_UNDEFINED_DECL nvptx_assemble_undefined_decl | |
5974 | #undef TARGET_PRINT_OPERAND | |
5975 | #define TARGET_PRINT_OPERAND nvptx_print_operand | |
5976 | #undef TARGET_PRINT_OPERAND_ADDRESS | |
5977 | #define TARGET_PRINT_OPERAND_ADDRESS nvptx_print_operand_address | |
5978 | #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P | |
5979 | #define TARGET_PRINT_OPERAND_PUNCT_VALID_P nvptx_print_operand_punct_valid_p | |
5980 | #undef TARGET_ASM_INTEGER | |
5981 | #define TARGET_ASM_INTEGER nvptx_assemble_integer | |
5982 | #undef TARGET_ASM_DECL_END | |
5983 | #define TARGET_ASM_DECL_END nvptx_assemble_decl_end | |
5984 | #undef TARGET_ASM_DECLARE_CONSTANT_NAME | |
5985 | #define TARGET_ASM_DECLARE_CONSTANT_NAME nvptx_asm_declare_constant_name | |
5986 | #undef TARGET_USE_BLOCKS_FOR_CONSTANT_P | |
5987 | #define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_const_rtx_true | |
5988 | #undef TARGET_ASM_NEED_VAR_DECL_BEFORE_USE | |
5989 | #define TARGET_ASM_NEED_VAR_DECL_BEFORE_USE true | |
5990 | ||
5991 | #undef TARGET_MACHINE_DEPENDENT_REORG | |
5992 | #define TARGET_MACHINE_DEPENDENT_REORG nvptx_reorg | |
5993 | #undef TARGET_NO_REGISTER_ALLOCATION | |
5994 | #define TARGET_NO_REGISTER_ALLOCATION true | |
5995 | ||
9a863523 NS |
5996 | #undef TARGET_ENCODE_SECTION_INFO |
5997 | #define TARGET_ENCODE_SECTION_INFO nvptx_encode_section_info | |
1f83528e TS |
5998 | #undef TARGET_RECORD_OFFLOAD_SYMBOL |
5999 | #define TARGET_RECORD_OFFLOAD_SYMBOL nvptx_record_offload_symbol | |
6000 | ||
738f2522 BS |
6001 | #undef TARGET_VECTOR_ALIGNMENT |
6002 | #define TARGET_VECTOR_ALIGNMENT nvptx_vector_alignment | |
6003 | ||
d88cd9c4 NS |
6004 | #undef TARGET_CANNOT_COPY_INSN_P |
6005 | #define TARGET_CANNOT_COPY_INSN_P nvptx_cannot_copy_insn_p | |
6006 | ||
a794bd20 NS |
6007 | #undef TARGET_USE_ANCHORS_FOR_SYMBOL_P |
6008 | #define TARGET_USE_ANCHORS_FOR_SYMBOL_P nvptx_use_anchors_for_symbol_p | |
6009 | ||
f3552158 NS |
6010 | #undef TARGET_INIT_BUILTINS |
6011 | #define TARGET_INIT_BUILTINS nvptx_init_builtins | |
6012 | #undef TARGET_EXPAND_BUILTIN | |
6013 | #define TARGET_EXPAND_BUILTIN nvptx_expand_builtin | |
6014 | #undef TARGET_BUILTIN_DECL | |
6015 | #define TARGET_BUILTIN_DECL nvptx_builtin_decl | |
6016 | ||
5012919d AM |
6017 | #undef TARGET_SIMT_VF |
6018 | #define TARGET_SIMT_VF nvptx_simt_vf | |
6019 | ||
94829f87 NS |
6020 | #undef TARGET_GOACC_VALIDATE_DIMS |
6021 | #define TARGET_GOACC_VALIDATE_DIMS nvptx_goacc_validate_dims | |
6022 | ||
bd751975 NS |
6023 | #undef TARGET_GOACC_DIM_LIMIT |
6024 | #define TARGET_GOACC_DIM_LIMIT nvptx_dim_limit | |
6025 | ||
d88cd9c4 NS |
6026 | #undef TARGET_GOACC_FORK_JOIN |
6027 | #define TARGET_GOACC_FORK_JOIN nvptx_goacc_fork_join | |
6028 | ||
f3552158 NS |
6029 | #undef TARGET_GOACC_REDUCTION |
6030 | #define TARGET_GOACC_REDUCTION nvptx_goacc_reduction | |
6031 | ||
e053f710 TV |
6032 | #undef TARGET_CANNOT_FORCE_CONST_MEM |
6033 | #define TARGET_CANNOT_FORCE_CONST_MEM nvptx_cannot_force_const_mem | |
6034 | ||
b98b34b7 TV |
6035 | #undef TARGET_VECTOR_MODE_SUPPORTED_P |
6036 | #define TARGET_VECTOR_MODE_SUPPORTED_P nvptx_vector_mode_supported | |
6037 | ||
3717fbe3 TV |
6038 | #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE |
6039 | #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE \ | |
6040 | nvptx_preferred_simd_mode | |
6041 | ||
99e1629f RS |
6042 | #undef TARGET_MODES_TIEABLE_P |
6043 | #define TARGET_MODES_TIEABLE_P nvptx_modes_tieable_p | |
6044 | ||
c43f4279 RS |
6045 | #undef TARGET_HARD_REGNO_NREGS |
6046 | #define TARGET_HARD_REGNO_NREGS nvptx_hard_regno_nregs | |
6047 | ||
0d803030 RS |
6048 | #undef TARGET_CAN_CHANGE_MODE_CLASS |
6049 | #define TARGET_CAN_CHANGE_MODE_CLASS nvptx_can_change_mode_class | |
6050 | ||
e335138d TV |
6051 | #undef TARGET_HAVE_SPECULATION_SAFE_VALUE |
6052 | #define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed | |
6053 | ||
738f2522 BS |
6054 | struct gcc_target targetm = TARGET_INITIALIZER; |
6055 | ||
6056 | #include "gt-nvptx.h" |