]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/nvptx/nvptx.h
PR c++/87109, wrong overload with ref-qualifiers.
[thirdparty/gcc.git] / gcc / config / nvptx / nvptx.h
CommitLineData
738f2522 1/* Target Definitions for NVPTX.
85ec4feb 2 Copyright (C) 2014-2018 Free Software Foundation, Inc.
738f2522
BS
3 Contributed by Bernd Schmidt <bernds@codesourcery.com>
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21#ifndef GCC_NVPTX_H
22#define GCC_NVPTX_H
23
24/* Run-time Target. */
25
26#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"
27
28#define TARGET_CPU_CPP_BUILTINS() \
29 do \
30 { \
31 builtin_assert ("machine=nvptx"); \
32 builtin_assert ("cpu=nvptx"); \
33 builtin_define ("__nvptx__"); \
5012919d
AM
34 if (TARGET_SOFT_STACK) \
35 builtin_define ("__nvptx_softstack__"); \
36 if (TARGET_UNIFORM_SIMT) \
37 builtin_define ("__nvptx_unisimt__"); \
738f2522
BS
38 } while (0)
39
8747dd6e
TS
40/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
41 supported for nvptx. */
42#define GOMP_SELF_SPECS ""
43
738f2522
BS
44/* Storage Layout. */
45
46#define BITS_BIG_ENDIAN 0
47#define BYTES_BIG_ENDIAN 0
48#define WORDS_BIG_ENDIAN 0
49
50/* Chosen such that we won't have to deal with multi-word subregs. */
51#define UNITS_PER_WORD 8
52
44eba92d
NS
53/* Alignments in bits. */
54#define PARM_BOUNDARY 32
3717fbe3 55#define STACK_BOUNDARY 128
738f2522 56#define FUNCTION_BOUNDARY 32
3717fbe3 57#define BIGGEST_ALIGNMENT 128
738f2522
BS
58#define STRICT_ALIGNMENT 1
59
18c05628
NS
60#define MAX_STACK_ALIGNMENT (1024 * 8)
61
3717fbe3
TV
62#define DATA_ALIGNMENT nvptx_data_alignment
63
738f2522
BS
64/* Copied from elf.h and other places. We'd otherwise use
65 BIGGEST_ALIGNMENT and fail a number of testcases. */
66#define MAX_OFILE_ALIGNMENT (32768 * 8)
67
68/* Type Layout. */
69
70#define DEFAULT_SIGNED_CHAR 1
71
72#define SHORT_TYPE_SIZE 16
73#define INT_TYPE_SIZE 32
74#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
75#define LONG_LONG_TYPE_SIZE 64
76#define FLOAT_TYPE_SIZE 32
77#define DOUBLE_TYPE_SIZE 64
78#define LONG_DOUBLE_TYPE_SIZE 64
a9000e1e 79#define TARGET_SUPPORTS_WIDE_INT 1
738f2522
BS
80
81#undef SIZE_TYPE
82#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
83#undef PTRDIFF_TYPE
84#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")
85
86#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
738f2522 87#define Pmode (TARGET_ABI64 ? DImode : SImode)
5012919d 88#define STACK_SIZE_MODE Pmode
738f2522
BS
89
90/* Registers. Since ptx is a virtual target, we just define a few
a2e2a4e4
NS
91 hard registers for special purposes and leave pseudos unallocated.
92 We have to have some available hard registers, to keep gcc setup
bd5d4b65 93 happy. */
a2e2a4e4 94#define FIRST_PSEUDO_REGISTER 16
5012919d 95#define FIXED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
a2e2a4e4 96#define CALL_USED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
738f2522 97
738f2522 98/* Register Classes. */
a2e2a4e4
NS
99enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
100#define REG_CLASS_NAMES { "NO_REGS", "ALL_REGS" }
101#define REG_CLASS_CONTENTS { { 0x0000 }, { 0xFFFF } }
738f2522
BS
102#define N_REG_CLASSES (int) LIM_REG_CLASSES
103
738f2522 104#define GENERAL_REGS ALL_REGS
bd5d4b65 105#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
738f2522
BS
106#define BASE_REG_CLASS ALL_REGS
107#define INDEX_REG_CLASS NO_REGS
108
109#define REGNO_OK_FOR_BASE_P(X) true
110#define REGNO_OK_FOR_INDEX_P(X) false
111
112#define CLASS_MAX_NREGS(class, mode) \
113 ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
114
738f2522 115#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
bd5d4b65 116 if ((MODE) == QImode || (MODE) == HImode) \
738f2522
BS
117 { \
118 (MODE) = SImode; \
bd5d4b65
NS
119 (void)(UNSIGNEDP); \
120 (void)(TYPE); \
738f2522
BS
121 }
122
738f2522
BS
123/* Stack and Calling. */
124
738f2522 125#define FRAME_GROWS_DOWNWARD 0
62f9f30b 126#define STACK_GROWS_DOWNWARD 1
738f2522 127
a2e2a4e4 128#define NVPTX_RETURN_REGNUM 0
738f2522 129#define STACK_POINTER_REGNUM 1
a2e2a4e4
NS
130#define FRAME_POINTER_REGNUM 2
131#define ARG_POINTER_REGNUM 3
132#define STATIC_CHAIN_REGNUM 4
5012919d
AM
133/* This register points to the shared memory location with the current warp's
134 soft stack pointer (__nvptx_stacks[tid.y]). */
135#define SOFTSTACK_SLOT_REGNUM 5
136/* This register is used to save the previous value of the soft stack pointer
137 in the prologue and restore it when returning. */
138#define SOFTSTACK_PREV_REGNUM 6
738f2522 139
bd5d4b65
NS
140#define REGISTER_NAMES \
141 { \
5012919d
AM
142 "%value", "%stack", "%frame", "%args", \
143 "%chain", "%sspslot", "%sspprev", "%hr7", \
a2e2a4e4 144 "%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%hr14", "%hr15" \
bd5d4b65
NS
145 }
146
01be5855 147#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
738f2522 148#define PUSH_ARGS_REVERSED 1
738f2522
BS
149#define ACCUMULATE_OUTGOING_ARGS 1
150
01be5855
NS
151/* Avoid using the argument pointer for frame-related things. */
152#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)
153
738f2522
BS
154#ifdef HOST_WIDE_INT
155struct nvptx_args {
01be5855 156 tree fntype;
738f2522
BS
157 /* Number of arguments passed in registers so far. */
158 int count;
738f2522
BS
159};
160#endif
161
162#define CUMULATIVE_ARGS struct nvptx_args
163
164#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
bd5d4b65 165 ((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)
738f2522
BS
166
167#define FUNCTION_ARG_REGNO_P(r) 0
168
169#define DEFAULT_PCC_STRUCT_RETURN 0
170
171#define FUNCTION_PROFILER(file, labelno) \
40fecdd6
JM
172 fatal_error (input_location, \
173 "profiling is not yet implemented for this architecture")
738f2522
BS
174
175#define TRAMPOLINE_SIZE 32
176#define TRAMPOLINE_ALIGNMENT 256
177\f
178/* We don't run reload, so this isn't actually used, but it still needs to be
179 defined. Showing an argp->fp elimination also stops
180 expand_builtin_setjmp_receiver from generating invalid insns. */
181#define ELIMINABLE_REGS \
182 { \
bd5d4b65 183 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} \
738f2522
BS
184 }
185
186/* Define the offset between two registers, one to be eliminated, and the other
187 its replacement, at the start of a routine. */
188
189#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
190 ((OFFSET) = 0)
191\f
192/* Addressing Modes. */
193
194#define MAX_REGS_PER_ADDRESS 1
195
196#define LEGITIMATE_PIC_OPERAND_P(X) 1
197\f
198
738f2522
BS
199#if defined HOST_WIDE_INT
200struct GTY(()) machine_function
201{
44c068ae
NS
202 rtx_expr_list *call_args; /* Arg list for the current call. */
203 bool doing_call; /* Within a CALL_ARGS ... CALL_ARGS_END sequence. */
204 bool is_varadic; /* This call is varadic */
205 bool has_varadic; /* Current function has a varadic call. */
206 bool has_chain; /* Current function has outgoing static chain. */
5012919d 207 bool has_softstack; /* Current function has a soft stack frame. */
0c6b03b5 208 bool has_simtreg; /* Current function has an OpenMP SIMD region. */
44c068ae
NS
209 int num_args; /* Number of args of current call. */
210 int return_mode; /* Return mode of current fn.
211 (machine_mode not defined yet.) */
212 rtx axis_predicate[2]; /* Neutering predicates. */
5012919d
AM
213 rtx unisimt_master; /* 'Master lane index' for -muniform-simt. */
214 rtx unisimt_predicate; /* Predicate for -muniform-simt. */
0c6b03b5
AM
215 rtx unisimt_location; /* Mask location for -muniform-simt. */
216 /* The following two fields hold the maximum size resp. alignment required
217 for per-lane storage in OpenMP SIMD regions. */
218 unsigned HOST_WIDE_INT simt_stack_size;
219 unsigned HOST_WIDE_INT simt_stack_align;
738f2522
BS
220};
221#endif
222\f
223/* Costs. */
224
225#define NO_FUNCTION_CSE 1
226#define SLOW_BYTE_ACCESS 0
227#define BRANCH_COST(speed_p, predictable_p) 6
228\f
229/* Assembler Format. */
230
231#undef ASM_DECLARE_FUNCTION_NAME
232#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
233 nvptx_declare_function_name (FILE, NAME, DECL)
234
235#undef ASM_DECLARE_FUNCTION_SIZE
236#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
237 nvptx_function_end (STREAM)
238
239#define DWARF2_ASM_LINE_DEBUG_INFO 1
240
241#undef ASM_APP_ON
242#define ASM_APP_ON "\t// #APP \n"
243#undef ASM_APP_OFF
244#define ASM_APP_OFF "\t// #NO_APP \n"
245
738f2522
BS
246#define DBX_REGISTER_NUMBER(N) N
247
248#define TEXT_SECTION_ASM_OP ""
249#define DATA_SECTION_ASM_OP ""
250
251#undef ASM_GENERATE_INTERNAL_LABEL
252#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
253 do \
254 { \
255 char *__p; \
256 __p = stpcpy (&(LABEL)[1], PREFIX); \
257 (LABEL)[0] = '$'; \
258 sprint_ul (__p, (unsigned long) (NUM)); \
259 } \
260 while (0)
261
e0dd6391
TS
262#define ASM_OUTPUT_ALIGN(FILE, POWER) \
263 do \
264 { \
265 (void) (FILE); \
266 (void) (POWER); \
267 } \
268 while (0)
269
738f2522
BS
270#define ASM_OUTPUT_SKIP(FILE, N) \
271 nvptx_output_skip (FILE, N)
e0dd6391 272
738f2522
BS
273#undef ASM_OUTPUT_ASCII
274#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
275 nvptx_output_ascii (FILE, STR, LENGTH);
276
277#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
278 nvptx_declare_object_name (FILE, NAME, DECL)
279
280#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
281#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76 282 nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522
BS
283
284#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
285#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76 286 nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522
BS
287
288#define CASE_VECTOR_PC_RELATIVE flag_pic
289#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
290
291#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)
292
293/* Misc. */
294
c9665100 295#define DWARF2_LINENO_DEBUGGING_INFO 1
738f2522
BS
296
297#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
298 ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
299#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
300 ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
301
0766660b 302#define SUPPORTS_WEAK 1
738f2522
BS
303#define NO_DOT_IN_LABEL
304#define ASM_COMMENT_START "//"
305
306#define STORE_FLAG_VALUE -1
307#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))
308
309#define CASE_VECTOR_MODE SImode
9251aec6 310#define MOVE_MAX 8
738f2522 311#define MOVE_RATIO(SPEED) 4
738f2522
BS
312#define FUNCTION_MODE QImode
313#define HAS_INIT_SECTION 1
314
d94fae04
TS
315/* The C++ front end insists to link against libstdc++ -- which we don't build.
316 Tell it to instead link against the innocuous libgcc. */
317#define LIBSTDCXX "gcc"
318
738f2522 319#endif /* GCC_NVPTX_H */