[thirdparty/gcc.git] / gcc / config / nvptx / nvptx.h

/* Target Definitions for NVPTX.
   Copyright (C) 2014 Free Software Foundation, Inc.
   Contributed by Bernd Schmidt <bernds@codesourcery.com>

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

#ifndef GCC_NVPTX_H
#define GCC_NVPTX_H

/* Run-time Target.  */

#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"

#define TARGET_CPU_CPP_BUILTINS()		\
  do						\
    {						\
      builtin_assert ("machine=nvptx");		\
      builtin_assert ("cpu=nvptx");		\
      builtin_define ("__nvptx__");		\
    } while (0)

/* Storage Layout.  */

#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
#define WORDS_BIG_ENDIAN 0

/* Chosen such that we won't have to deal with multi-word subregs.  */
#define UNITS_PER_WORD 8

#define PARM_BOUNDARY 8
#define STACK_BOUNDARY 64
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 64
#define STRICT_ALIGNMENT 1

/* Copied from elf.h and other places.  We'd otherwise use
   BIGGEST_ALIGNMENT and fail a number of testcases.  */
#define MAX_OFILE_ALIGNMENT (32768 * 8)

/* Type Layout.  */

#define DEFAULT_SIGNED_CHAR 1

#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64

#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")

#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)

#define Pmode (TARGET_ABI64 ? DImode : SImode)

/* Registers.  Since ptx is a virtual target, we just define a few
   hard registers for special purposes and leave pseudos unallocated.  */

#define FIRST_PSEUDO_REGISTER 16
#define FIXED_REGISTERS					\
  { 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1 }
#define CALL_USED_REGISTERS				\
  { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

#define HARD_REGNO_NREGS(regno, mode)	1
#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS) ((CLS) == RETURN_REG)
#define HARD_REGNO_MODE_OK(REG, MODE) nvptx_hard_regno_mode_ok (REG, MODE)

/* Register Classes.  */

enum reg_class
  {
    NO_REGS,
    RETURN_REG,
    ALL_REGS,
    LIM_REG_CLASSES
  };

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES {	  \
    "RETURN_REG",		  \
    "NO_REGS",			  \
    "ALL_REGS" }

#define REG_CLASS_CONTENTS	\
{				\
  /* NO_REGS.  */		\
  { 0x0000 },			\
  /* RETURN_REG.  */		\
  { 0x0008 },			\
  /* ALL_REGS.  */		\
  { 0xFFFF },			\
}

#define GENERAL_REGS ALL_REGS

#define REGNO_REG_CLASS(R) ((R) == 4 ? RETURN_REG : ALL_REGS)

#define BASE_REG_CLASS ALL_REGS
#define INDEX_REG_CLASS NO_REGS

#define REGNO_OK_FOR_BASE_P(X) true
#define REGNO_OK_FOR_INDEX_P(X) false

#define CLASS_MAX_NREGS(class, mode) \
  ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define MODES_TIEABLE_P(M1, M2) false

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)		\
  if (GET_MODE_CLASS (MODE) == MODE_INT			\
      && GET_MODE_SIZE (MODE) < GET_MODE_SIZE (SImode))	\
    {							\
      (MODE) = SImode;					\
    }

/* Address spaces.  */
#define ADDR_SPACE_GLOBAL 1
#define ADDR_SPACE_SHARED 3
#define ADDR_SPACE_CONST 4
#define ADDR_SPACE_LOCAL 5
#define ADDR_SPACE_PARAM 101

/* Stack and Calling.  */

#define STARTING_FRAME_OFFSET 0
#define FRAME_GROWS_DOWNWARD 0
#define STACK_GROWS_DOWNWARD

#define STACK_POINTER_REGNUM 1
#define HARD_FRAME_POINTER_REGNUM 2
#define NVPTX_PUNNING_BUFFER_REGNUM 3
#define NVPTX_RETURN_REGNUM 4
#define FRAME_POINTER_REGNUM 15
#define ARG_POINTER_REGNUM 14
#define RETURN_ADDR_REGNO 13

#define STATIC_CHAIN_REGNUM 12
#define OUTGOING_ARG_POINTER_REGNUM 11
#define OUTGOING_STATIC_CHAIN_REGNUM 10

#define FIRST_PARM_OFFSET(FNDECL) 0
#define PUSH_ARGS_REVERSED 1

#define ACCUMULATE_OUTGOING_ARGS 1

#ifdef HOST_WIDE_INT
struct nvptx_args {
  union tree_node *fntype;
  /* Number of arguments passed in registers so far.  */
  int count;
  /* Offset into the stdarg area so far.  */
  HOST_WIDE_INT off;
};
#endif

#define CUMULATIVE_ARGS struct nvptx_args

#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
  do { (CUM).fntype = (FNTYPE); (CUM).count = 0; (CUM).off = 0; } while (0)

#define FUNCTION_ARG_REGNO_P(r) 0

#define DEFAULT_PCC_STRUCT_RETURN 0

#define FUNCTION_PROFILER(file, labelno) \
  fatal_error ("profiling is not yet implemented for this architecture")

#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
\f
/* We don't run reload, so this isn't actually used, but it still needs to be
   defined.  Showing an argp->fp elimination also stops
   expand_builtin_setjmp_receiver from generating invalid insns.  */
#define ELIMINABLE_REGS					\
  {							\
    { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},	\
    { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}	\
  }

/* Define the offset between two registers, one to be eliminated, and the other
   its replacement, at the start of a routine.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
  ((OFFSET) = 0)
\f
/* Addressing Modes.  */

#define MAX_REGS_PER_ADDRESS 1

#define LEGITIMATE_PIC_OPERAND_P(X) 1
\f

struct nvptx_pseudo_info
{
  int true_size;
  int renumber;
};

#if defined HOST_WIDE_INT
struct GTY(()) machine_function
{
  rtx_expr_list *call_args;
  rtx start_call;
  tree funtype;
  bool has_call_with_varargs;
  bool has_call_with_sc;
  struct GTY((skip)) nvptx_pseudo_info *pseudos;
  HOST_WIDE_INT outgoing_stdarg_size;
  int ret_reg_mode;
  int punning_buffer_size;
};
#endif
\f
/* Costs.  */

#define NO_FUNCTION_CSE 1
#define SLOW_BYTE_ACCESS 0
#define BRANCH_COST(speed_p, predictable_p) 6
\f
/* Assembler Format.  */

#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)		\
  nvptx_declare_function_name (FILE, NAME, DECL)

#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
  nvptx_function_end (STREAM)

#define DWARF2_ASM_LINE_DEBUG_INFO 1

#undef ASM_APP_ON
#define ASM_APP_ON "\t// #APP \n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "\t// #NO_APP \n"

#define ASM_OUTPUT_COMMON(stream, name, size, rounded)
#define ASM_OUTPUT_LOCAL(stream, name, size, rounded)

#define REGISTER_NAMES							\
  {									\
    "%hr0", "%outargs", "%hfp", "%punbuffer", "%retval", "%retval_in", "%hr6", "%hr7",	\
    "%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%argp", "%frame" \
  }

#define DBX_REGISTER_NUMBER(N) N

#define TEXT_SECTION_ASM_OP ""
#define DATA_SECTION_ASM_OP ""

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)		\
  do								\
    {								\
      char *__p;						\
      __p = stpcpy (&(LABEL)[1], PREFIX);			\
      (LABEL)[0] = '$';						\
      sprint_ul (__p, (unsigned long) (NUM));			\
    }								\
  while (0)

#define ASM_OUTPUT_ALIGN(FILE, POWER)
#define ASM_OUTPUT_SKIP(FILE, N)		\
  nvptx_output_skip (FILE, N)
#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)			\
  nvptx_output_ascii (FILE, STR, LENGTH);

#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)	\
  nvptx_declare_object_name (FILE, NAME, DECL)

#undef  ASM_OUTPUT_ALIGNED_DECL_COMMON
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN)	\
  do									\
    {									\
      fprintf (FILE, "// BEGIN%s VAR DEF: ",				\
	       TREE_PUBLIC (DECL) ? " GLOBAL" : "");			\
      assemble_name_raw (FILE, NAME);					\
      fputc ('\n', FILE);						\
      const char *sec = nvptx_section_for_decl (DECL);			\
      fprintf (FILE, ".visible%s.align %d .b8 ", sec,			\
	       (ALIGN) / BITS_PER_UNIT);				\
      assemble_name ((FILE), (NAME));					\
      if ((SIZE) > 0)							\
	fprintf (FILE, "["HOST_WIDE_INT_PRINT_DEC"]", (SIZE));		\
      fprintf (FILE, ";\n");						\
    }									\
  while (0)

#undef  ASM_OUTPUT_ALIGNED_DECL_LOCAL
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN)	\
  do									\
    {									\
      fprintf (FILE, "// BEGIN VAR DEF: ");				\
      assemble_name_raw (FILE, NAME);					\
      fputc ('\n', FILE);						\
      const char *sec = nvptx_section_for_decl (DECL);			\
      fprintf (FILE, ".visible%s.align %d .b8 ", sec,			\
	       (ALIGN) / BITS_PER_UNIT);				\
      assemble_name ((FILE), (NAME));					\
      if ((SIZE) > 0)							\
	fprintf (FILE, "["HOST_WIDE_INT_PRINT_DEC"]", (SIZE));		\
      fprintf (FILE, ";\n");						\
    }									\
  while (0)

#define CASE_VECTOR_PC_RELATIVE flag_pic
#define JUMP_TABLES_IN_TEXT_SECTION flag_pic

#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)

/* Misc.  */

#define DWARF2_DEBUGGING_INFO 1

#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)

#define NO_DOT_IN_LABEL
#define ASM_COMMENT_START "//"

#define STORE_FLAG_VALUE -1
#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))

#define CASE_VECTOR_MODE SImode
#define MOVE_MAX 4
#define MOVE_RATIO(SPEED) 4
#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
#define FUNCTION_MODE QImode
#define HAS_INIT_SECTION 1

#endif /* GCC_NVPTX_H */
Commit	Line	Data
738f2522 BS	1	/* Target Definitions for NVPTX.
	2	Copyright (C) 2014 Free Software Foundation, Inc.
	3	Contributed by Bernd Schmidt <bernds@codesourcery.com>
	4
	5	This file is part of GCC.
	6
	7	GCC is free software; you can redistribute it and/or modify it
	8	under the terms of the GNU General Public License as published
	9	by the Free Software Foundation; either version 3, or (at your
	10	option) any later version.
	11
	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with GCC; see the file COPYING3. If not see
	19	<http://www.gnu.org/licenses/>. */
	20
	21	#ifndef GCC_NVPTX_H
	22	#define GCC_NVPTX_H
	23
	24	/* Run-time Target. */
	25
	26	#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"
	27
	28	#define TARGET_CPU_CPP_BUILTINS() \
	29	do \
	30	{ \
	31	builtin_assert ("machine=nvptx"); \
	32	builtin_assert ("cpu=nvptx"); \
	33	builtin_define ("__nvptx__"); \
	34	} while (0)
	35
	36	/* Storage Layout. */
	37
	38	#define BITS_BIG_ENDIAN 0
	39	#define BYTES_BIG_ENDIAN 0
	40	#define WORDS_BIG_ENDIAN 0
	41
	42	/* Chosen such that we won't have to deal with multi-word subregs. */
	43	#define UNITS_PER_WORD 8
	44
	45	#define PARM_BOUNDARY 8
	46	#define STACK_BOUNDARY 64
	47	#define FUNCTION_BOUNDARY 32
	48	#define BIGGEST_ALIGNMENT 64
	49	#define STRICT_ALIGNMENT 1
	50
	51	/* Copied from elf.h and other places. We'd otherwise use
	52	BIGGEST_ALIGNMENT and fail a number of testcases. */
	53	#define MAX_OFILE_ALIGNMENT (32768 * 8)
	54
	55	/* Type Layout. */
	56
	57	#define DEFAULT_SIGNED_CHAR 1
	58
	59	#define SHORT_TYPE_SIZE 16
	60	#define INT_TYPE_SIZE 32
	61	#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
	62	#define LONG_LONG_TYPE_SIZE 64
	63	#define FLOAT_TYPE_SIZE 32
	64	#define DOUBLE_TYPE_SIZE 64
65	#define LONG_DOUBLE_TYPE_SIZE 64
66
67	#undef SIZE_TYPE
68	#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
69	#undef PTRDIFF_TYPE
70	#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")
71
72	#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
73
74	#define Pmode (TARGET_ABI64 ? DImode : SImode)
75
76	/* Registers. Since ptx is a virtual target, we just define a few
77	hard registers for special purposes and leave pseudos unallocated. */
78
79	#define FIRST_PSEUDO_REGISTER 16
80	#define FIXED_REGISTERS \
81	{ 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1 }
82	#define CALL_USED_REGISTERS \
83	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
84
85	#define HARD_REGNO_NREGS(regno, mode) 1
86	#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS) ((CLS) == RETURN_REG)
87	#define HARD_REGNO_MODE_OK(REG, MODE) nvptx_hard_regno_mode_ok (REG, MODE)
88
89	/* Register Classes. */
90
91	enum reg_class
92	{
93	NO_REGS,
94	RETURN_REG,
95	ALL_REGS,
96	LIM_REG_CLASSES
97	};
98
99	#define N_REG_CLASSES (int) LIM_REG_CLASSES
100
101	#define REG_CLASS_NAMES { \
102	"RETURN_REG", \
103	"NO_REGS", \
104	"ALL_REGS" }
105
106	#define REG_CLASS_CONTENTS \
107	{ \
108	/* NO_REGS. */ \
109	{ 0x0000 }, \
110	/* RETURN_REG. */ \
111	{ 0x0008 }, \
112	/* ALL_REGS. */ \
113	{ 0xFFFF }, \
114	}
115
116	#define GENERAL_REGS ALL_REGS
117
118	#define REGNO_REG_CLASS(R) ((R) == 4 ? RETURN_REG : ALL_REGS)
119
120	#define BASE_REG_CLASS ALL_REGS
121	#define INDEX_REG_CLASS NO_REGS
122
123	#define REGNO_OK_FOR_BASE_P(X) true
124	#define REGNO_OK_FOR_INDEX_P(X) false
125
126	#define CLASS_MAX_NREGS(class, mode) \
127	((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
128
129	#define MODES_TIEABLE_P(M1, M2) false
130
131	#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
132	if (GET_MODE_CLASS (MODE) == MODE_INT \
133	&& GET_MODE_SIZE (MODE) < GET_MODE_SIZE (SImode)) \
134	{ \
135	(MODE) = SImode; \
136	}
137
138	/* Address spaces. */
139	#define ADDR_SPACE_GLOBAL 1
140	#define ADDR_SPACE_SHARED 3
141	#define ADDR_SPACE_CONST 4
142	#define ADDR_SPACE_LOCAL 5
143	#define ADDR_SPACE_PARAM 101
144
145	/* Stack and Calling. */
146
147	#define STARTING_FRAME_OFFSET 0
148	#define FRAME_GROWS_DOWNWARD 0
149	#define STACK_GROWS_DOWNWARD
150
151	#define STACK_POINTER_REGNUM 1
152	#define HARD_FRAME_POINTER_REGNUM 2
153	#define NVPTX_PUNNING_BUFFER_REGNUM 3
154	#define NVPTX_RETURN_REGNUM 4
155	#define FRAME_POINTER_REGNUM 15
156	#define ARG_POINTER_REGNUM 14
157	#define RETURN_ADDR_REGNO 13
158
159	#define STATIC_CHAIN_REGNUM 12
160	#define OUTGOING_ARG_POINTER_REGNUM 11
161	#define OUTGOING_STATIC_CHAIN_REGNUM 10
162
163	#define FIRST_PARM_OFFSET(FNDECL) 0
164	#define PUSH_ARGS_REVERSED 1
165
166	#define ACCUMULATE_OUTGOING_ARGS 1
167
168	#ifdef HOST_WIDE_INT
169	struct nvptx_args {
170	union tree_node *fntype;
171	/* Number of arguments passed in registers so far. */
172	int count;
173	/* Offset into the stdarg area so far. */
174	HOST_WIDE_INT off;
175	};
176	#endif
177
178	#define CUMULATIVE_ARGS struct nvptx_args
179
180	#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
181	do { (CUM).fntype = (FNTYPE); (CUM).count = 0; (CUM).off = 0; } while (0)
182
183	#define FUNCTION_ARG_REGNO_P(r) 0
184
185	#define DEFAULT_PCC_STRUCT_RETURN 0
186
187	#define FUNCTION_PROFILER(file, labelno) \
188	fatal_error ("profiling is not yet implemented for this architecture")
189
190	#define TRAMPOLINE_SIZE 32
191	#define TRAMPOLINE_ALIGNMENT 256
192	\f
193	/* We don't run reload, so this isn't actually used, but it still needs to be
194	defined. Showing an argp->fp elimination also stops
195	expand_builtin_setjmp_receiver from generating invalid insns. */
196	#define ELIMINABLE_REGS \
197	{ \
198	{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
199	{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} \
200	}
201
202	/* Define the offset between two registers, one to be eliminated, and the other
203	its replacement, at the start of a routine. */
204
205	#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
206	((OFFSET) = 0)
207	\f
208	/* Addressing Modes. */
209
210	#define MAX_REGS_PER_ADDRESS 1
211
212	#define LEGITIMATE_PIC_OPERAND_P(X) 1
213	\f
214
215	struct nvptx_pseudo_info
216	{
217	int true_size;
218	int renumber;
219	};
220
221	#if defined HOST_WIDE_INT
222	struct GTY(()) machine_function
223	{
224	rtx_expr_list *call_args;
225	rtx start_call;
226	tree funtype;
227	bool has_call_with_varargs;
228	bool has_call_with_sc;
229	struct GTY((skip)) nvptx_pseudo_info *pseudos;
230	HOST_WIDE_INT outgoing_stdarg_size;
231	int ret_reg_mode;
232	int punning_buffer_size;
233	};
234	#endif
235	\f
236	/* Costs. */
237
238	#define NO_FUNCTION_CSE 1
239	#define SLOW_BYTE_ACCESS 0
240	#define BRANCH_COST(speed_p, predictable_p) 6
241	\f
242	/* Assembler Format. */
243
244	#undef ASM_DECLARE_FUNCTION_NAME
245	#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
246	nvptx_declare_function_name (FILE, NAME, DECL)
247
248	#undef ASM_DECLARE_FUNCTION_SIZE
249	#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
250	nvptx_function_end (STREAM)
251
252	#define DWARF2_ASM_LINE_DEBUG_INFO 1
253
254	#undef ASM_APP_ON
255	#define ASM_APP_ON "\t// #APP \n"
256	#undef ASM_APP_OFF
257	#define ASM_APP_OFF "\t// #NO_APP \n"
258
259	#define ASM_OUTPUT_COMMON(stream, name, size, rounded)
260	#define ASM_OUTPUT_LOCAL(stream, name, size, rounded)
261
262	#define REGISTER_NAMES \
263	{ \
264	"%hr0", "%outargs", "%hfp", "%punbuffer", "%retval", "%retval_in", "%hr6", "%hr7", \
265	"%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%argp", "%frame" \
266	}
267
268	#define DBX_REGISTER_NUMBER(N) N
269
270	#define TEXT_SECTION_ASM_OP ""
271	#define DATA_SECTION_ASM_OP ""
272
273	#undef ASM_GENERATE_INTERNAL_LABEL
274	#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
275	do \
276	{ \
277	char *__p; \
278	__p = stpcpy (&(LABEL)[1], PREFIX); \
279	(LABEL)[0] = '$'; \
280	sprint_ul (__p, (unsigned long) (NUM)); \
281	} \
282	while (0)
283
284	#define ASM_OUTPUT_ALIGN(FILE, POWER)
285	#define ASM_OUTPUT_SKIP(FILE, N) \
286	nvptx_output_skip (FILE, N)
287	#undef ASM_OUTPUT_ASCII
288	#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
289	nvptx_output_ascii (FILE, STR, LENGTH);
290
291	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
292	nvptx_declare_object_name (FILE, NAME, DECL)
293
294	#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
295	#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
296	do \
297	{ \
298	fprintf (FILE, "// BEGIN%s VAR DEF: ", \
299	TREE_PUBLIC (DECL) ? " GLOBAL" : ""); \
300	assemble_name_raw (FILE, NAME); \
301	fputc ('\n', FILE); \
302	const char *sec = nvptx_section_for_decl (DECL); \
303	fprintf (FILE, ".visible%s.align %d .b8 ", sec, \
304	(ALIGN) / BITS_PER_UNIT); \
305	assemble_name ((FILE), (NAME)); \
306	if ((SIZE) > 0) \
307	fprintf (FILE, "["HOST_WIDE_INT_PRINT_DEC"]", (SIZE)); \
308	fprintf (FILE, ";\n"); \
309	} \
310	while (0)
311
312	#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
313	#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
314	do \
315	{ \
316	fprintf (FILE, "// BEGIN VAR DEF: "); \
317	assemble_name_raw (FILE, NAME); \
318	fputc ('\n', FILE); \
319	const char *sec = nvptx_section_for_decl (DECL); \
320	fprintf (FILE, ".visible%s.align %d .b8 ", sec, \
321	(ALIGN) / BITS_PER_UNIT); \
322	assemble_name ((FILE), (NAME)); \
323	if ((SIZE) > 0) \
324	fprintf (FILE, "["HOST_WIDE_INT_PRINT_DEC"]", (SIZE)); \
325	fprintf (FILE, ";\n"); \
326	} \
327	while (0)
328
329	#define CASE_VECTOR_PC_RELATIVE flag_pic
330	#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
331
332	#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)
333
334	/* Misc. */
335
336	#define DWARF2_DEBUGGING_INFO 1
337
338	#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
339	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
340	#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
341	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
342
343	#define NO_DOT_IN_LABEL
344	#define ASM_COMMENT_START "//"
345
346	#define STORE_FLAG_VALUE -1
347	#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))
348
349	#define CASE_VECTOR_MODE SImode
350	#define MOVE_MAX 4
351	#define MOVE_RATIO(SPEED) 4
352	#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
353	#define FUNCTION_MODE QImode
354	#define HAS_INIT_SECTION 1
355
356	#endif /* GCC_NVPTX_H */