[thirdparty/gcc.git] / gcc / config / nvptx / nvptx.h

/* Target Definitions for NVPTX.
   Copyright (C) 2014-2022 Free Software Foundation, Inc.
   Contributed by Bernd Schmidt <bernds@codesourcery.com>

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

#ifndef GCC_NVPTX_H
#define GCC_NVPTX_H

#ifndef NVPTX_OPTS_H
#include "config/nvptx/nvptx-opts.h"
#endif

/* Run-time Target.  */

#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"

/* Default needs to be in sync with default for misa in nvptx.opt.
   We add a default here to work around a hard-coded sm_30 default in
   nvptx-as.  */
#define ASM_SPEC "%{misa=*:-m %*; :-m sm_35}"

#define TARGET_CPU_CPP_BUILTINS() nvptx_cpu_cpp_builtins ()

/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
   supported for nvptx.  */
#define GOMP_SELF_SPECS ""

/* Storage Layout.  */

#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
#define WORDS_BIG_ENDIAN 0

/* Chosen such that we won't have to deal with multi-word subregs.  */
#define UNITS_PER_WORD 8

/* Alignments in bits.  */
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 128
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 128
#define STRICT_ALIGNMENT 1

#define MAX_STACK_ALIGNMENT (1024 * 8)

#define DATA_ALIGNMENT nvptx_data_alignment

/* Copied from elf.h and other places.  We'd otherwise use
   BIGGEST_ALIGNMENT and fail a number of testcases.  */
#define MAX_OFILE_ALIGNMENT (32768 * 8)

/* Type Layout.  */

#define DEFAULT_SIGNED_CHAR 1

#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define TARGET_SUPPORTS_WIDE_INT 1

#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")

#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
#define Pmode (TARGET_ABI64 ? DImode : SImode)
#define STACK_SIZE_MODE Pmode

#define TARGET_SM35 (ptx_isa_option >= PTX_ISA_SM35)
#define TARGET_SM53 (ptx_isa_option >= PTX_ISA_SM53)
#define TARGET_SM75 (ptx_isa_option >= PTX_ISA_SM75)
#define TARGET_SM80 (ptx_isa_option >= PTX_ISA_SM80)

#define TARGET_PTX_6_3 (ptx_version_option >= PTX_VERSION_6_3)
#define TARGET_PTX_7_0 (ptx_version_option >= PTX_VERSION_7_0)

/* Registers.  Since ptx is a virtual target, we just define a few
   hard registers for special purposes and leave pseudos unallocated.
   We have to have some available hard registers, to keep gcc setup
   happy.  */
#define FIRST_PSEUDO_REGISTER 16
#define FIXED_REGISTERS	    { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
#define CALL_USED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

/* Register Classes.  */
enum reg_class             {  NO_REGS,    ALL_REGS,	LIM_REG_CLASSES };
#define REG_CLASS_NAMES    { "NO_REGS",  "ALL_REGS" }
#define REG_CLASS_CONTENTS { { 0x0000 }, { 0xFFFF } }
#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define GENERAL_REGS ALL_REGS
#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
#define BASE_REG_CLASS ALL_REGS
#define INDEX_REG_CLASS NO_REGS

#define REGNO_OK_FOR_BASE_P(X) true
#define REGNO_OK_FOR_INDEX_P(X) false

#define CLASS_MAX_NREGS(class, mode) \
  ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)		\
  if ((MODE) == QImode || (MODE) == HImode)		\
    {							\
      (MODE) = SImode;					\
      (void)(UNSIGNEDP);				\
      (void)(TYPE);					\
    }

/* Stack and Calling.  */

#define FRAME_GROWS_DOWNWARD 0
#define STACK_GROWS_DOWNWARD 1

#define NVPTX_RETURN_REGNUM 0
#define STACK_POINTER_REGNUM 1
#define FRAME_POINTER_REGNUM 2
#define ARG_POINTER_REGNUM 3
#define STATIC_CHAIN_REGNUM 4
/* This register points to the shared memory location with the current warp's
   soft stack pointer (__nvptx_stacks[tid.y]).  */
#define SOFTSTACK_SLOT_REGNUM 5
/* This register is used to save the previous value of the soft stack pointer
   in the prologue and restore it when returning.  */
#define SOFTSTACK_PREV_REGNUM 6

#define REGISTER_NAMES							\
  {									\
    "%value", "%stack", "%frame", "%args",                              \
    "%chain", "%sspslot", "%sspprev", "%hr7",                           \
    "%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%hr14", "%hr15" \
  }

#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
#define PUSH_ARGS_REVERSED 1
#define ACCUMULATE_OUTGOING_ARGS 1

/* Avoid using the argument pointer for frame-related things.  */
#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)

#ifdef HOST_WIDE_INT
struct nvptx_args {
  tree fntype;
  /* Number of arguments passed in registers so far.  */
  int count;
};
#endif

#define CUMULATIVE_ARGS struct nvptx_args

#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
  ((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)

#define FUNCTION_ARG_REGNO_P(r) 0

#define DEFAULT_PCC_STRUCT_RETURN 0

#define FUNCTION_PROFILER(file, labelno) \
  fatal_error (input_location, \
	       "profiling is not yet implemented for this architecture")

#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
\f
/* We don't run reload, so this isn't actually used, but it still needs to be
   defined.  Showing an argp->fp elimination also stops
   expand_builtin_setjmp_receiver from generating invalid insns.  */
#define ELIMINABLE_REGS					\
  {							\
    { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}	\
  }

/* Define the offset between two registers, one to be eliminated, and the other
   its replacement, at the start of a routine.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
  ((OFFSET) = 0)
\f
/* Addressing Modes.  */

#define MAX_REGS_PER_ADDRESS 1

#define LEGITIMATE_PIC_OPERAND_P(X) 1
\f

#if defined HOST_WIDE_INT
struct GTY(()) machine_function
{
  rtx_expr_list *call_args;  /* Arg list for the current call.  */
  bool doing_call; /* Within a CALL_ARGS ... CALL_ARGS_END sequence.  */
  bool is_varadic;  /* This call is varadic  */
  bool has_varadic;  /* Current function has a varadic call.  */
  bool has_chain; /* Current function has outgoing static chain.  */
  bool has_softstack; /* Current function has a soft stack frame.  */
  bool has_simtreg; /* Current function has an OpenMP SIMD region.  */
  int num_args;	/* Number of args of current call.  */
  int return_mode; /* Return mode of current fn.
		      (machine_mode not defined yet.) */
  rtx axis_predicate[2]; /* Neutering predicates.  */
  int axis_dim[2]; /* Maximum number of threads on each axis, dim[0] is
		      vector_length, dim[1] is num_workers.  */
  bool axis_dim_init_p;
  rtx bcast_partition; /* Register containing the size of each
			  vector's partition of share-memory used to
			  broadcast state.  */
  rtx red_partition; /* Similar to bcast_partition, except for vector
			reductions.  */
  rtx sync_bar; /* Synchronization barrier ID for vectors.  */
  rtx unisimt_master; /* 'Master lane index' for -muniform-simt.  */
  rtx unisimt_predicate; /* Predicate for -muniform-simt.  */
  rtx unisimt_location; /* Mask location for -muniform-simt.  */
  /* The following two fields hold the maximum size resp. alignment required
     for per-lane storage in OpenMP SIMD regions.  */
  unsigned HOST_WIDE_INT simt_stack_size;
  unsigned HOST_WIDE_INT simt_stack_align;
};
#endif
\f
/* Costs.  */

#define NO_FUNCTION_CSE 1
#define SLOW_BYTE_ACCESS 0
#define BRANCH_COST(speed_p, predictable_p) 6
\f
/* Assembler Format.  */

#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)		\
  nvptx_declare_function_name (FILE, NAME, DECL)

#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
  nvptx_function_end (STREAM)

#define DWARF2_ASM_LINE_DEBUG_INFO 1

#undef ASM_APP_ON
#define ASM_APP_ON "\t// #APP \n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "\t// #NO_APP \n"

#define DBX_REGISTER_NUMBER(N) N

#define TEXT_SECTION_ASM_OP ""
#define DATA_SECTION_ASM_OP ""

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)		\
  do								\
    {								\
      char *__p;						\
      __p = stpcpy (&(LABEL)[1], PREFIX);			\
      (LABEL)[0] = '$';						\
      sprint_ul (__p, (unsigned long) (NUM));			\
    }								\
  while (0)

#define ASM_OUTPUT_ALIGN(FILE, POWER)		\
  do						\
    {						\
      (void) (FILE);				\
      (void) (POWER);				\
    }						\
  while (0)

#define ASM_OUTPUT_SKIP(FILE, N)		\
  nvptx_output_skip (FILE, N)

#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)			\
  nvptx_output_ascii (FILE, STR, LENGTH);

#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)	\
  nvptx_declare_object_name (FILE, NAME, DECL)

#undef  ASM_OUTPUT_ALIGNED_DECL_COMMON
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#undef  ASM_OUTPUT_ALIGNED_DECL_LOCAL
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#define CASE_VECTOR_PC_RELATIVE flag_pic
#define JUMP_TABLES_IN_TEXT_SECTION flag_pic

#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)

/* Misc.  */

#define DWARF2_LINENO_DEBUGGING_INFO 1

#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)

#define SUPPORTS_WEAK 1
#define NO_DOT_IN_LABEL
#define ASM_COMMENT_START "//"

#define STORE_FLAG_VALUE -1
#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))

#define CASE_VECTOR_MODE SImode
#define MOVE_MAX 8
#define MOVE_RATIO(SPEED) 4
#define FUNCTION_MODE QImode
#define HAS_INIT_SECTION 1

/* The C++ front end insists to link against libstdc++ -- which we don't build.
   Tell it to instead link against the innocuous libgcc.  */
#define LIBSTDCXX "gcc"

#endif /* GCC_NVPTX_H */
Commit	Line	Data
738f2522	1	/* Target Definitions for NVPTX.
7adcbafe	2	Copyright (C) 2014-2022 Free Software Foundation, Inc.
738f2522 BS	3	Contributed by Bernd Schmidt <bernds@codesourcery.com>
	4
	5	This file is part of GCC.
	6
	7	GCC is free software; you can redistribute it and/or modify it
	8	under the terms of the GNU General Public License as published
	9	by the Free Software Foundation; either version 3, or (at your
	10	option) any later version.
	11
	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with GCC; see the file COPYING3. If not see
	19	<http://www.gnu.org/licenses/>. */
	20
	21	#ifndef GCC_NVPTX_H
	22	#define GCC_NVPTX_H
	23
53ceb8b5 CP	24	#ifndef NVPTX_OPTS_H
	25	#include "config/nvptx/nvptx-opts.h"
	26	#endif
	27
738f2522 BS	28	/* Run-time Target. */
	29
	30	#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"
	31
383400a6 TV	32	/* Default needs to be in sync with default for misa in nvptx.opt.
	33	We add a default here to work around a hard-coded sm_30 default in
	34	nvptx-as. */
	35	#define ASM_SPEC "%{misa=:-m %; :-m sm_35}"
53ceb8b5	36
3c496e92	37	#define TARGET_CPU_CPP_BUILTINS() nvptx_cpu_cpp_builtins ()
738f2522	38
8747dd6e TS	39	/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
	40	supported for nvptx. */
	41	#define GOMP_SELF_SPECS ""
	42
738f2522 BS	43	/* Storage Layout. */
	44
	45	#define BITS_BIG_ENDIAN 0
	46	#define BYTES_BIG_ENDIAN 0
	47	#define WORDS_BIG_ENDIAN 0
	48
	49	/* Chosen such that we won't have to deal with multi-word subregs. */
	50	#define UNITS_PER_WORD 8
	51
44eba92d NS	52	/* Alignments in bits. */
44eba92d NS	53	#define PARM_BOUNDARY 32
3717fbe3	54	#define STACK_BOUNDARY 128
738f2522	55	#define FUNCTION_BOUNDARY 32
3717fbe3	56	#define BIGGEST_ALIGNMENT 128
738f2522 BS	57	#define STRICT_ALIGNMENT 1
738f2522 BS	58
18c05628 NS	59	#define MAX_STACK_ALIGNMENT (1024 * 8)
18c05628 NS	60
3717fbe3 TV	61	#define DATA_ALIGNMENT nvptx_data_alignment
3717fbe3 TV	62
738f2522 BS	63	/* Copied from elf.h and other places. We'd otherwise use
	64	BIGGEST_ALIGNMENT and fail a number of testcases. */
	65	#define MAX_OFILE_ALIGNMENT (32768 * 8)
	66
	67	/* Type Layout. */
	68
	69	#define DEFAULT_SIGNED_CHAR 1
	70
	71	#define SHORT_TYPE_SIZE 16
	72	#define INT_TYPE_SIZE 32
	73	#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
	74	#define LONG_LONG_TYPE_SIZE 64
	75	#define FLOAT_TYPE_SIZE 32
	76	#define DOUBLE_TYPE_SIZE 64
	77	#define LONG_DOUBLE_TYPE_SIZE 64
a9000e1e	78	#define TARGET_SUPPORTS_WIDE_INT 1
738f2522 BS	79
	80	#undef SIZE_TYPE
	81	#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
	82	#undef PTRDIFF_TYPE
	83	#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")
	84
	85	#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
738f2522	86	#define Pmode (TARGET_ABI64 ? DImode : SImode)
5012919d	87	#define STACK_SIZE_MODE Pmode
738f2522	88
53ceb8b5	89	#define TARGET_SM35 (ptx_isa_option >= PTX_ISA_SM35)
aeedb00a	90	#define TARGET_SM53 (ptx_isa_option >= PTX_ISA_SM53)
308d688b RS	91	#define TARGET_SM75 (ptx_isa_option >= PTX_ISA_SM75)
308d688b RS	92	#define TARGET_SM80 (ptx_isa_option >= PTX_ISA_SM80)
53ceb8b5	93
2a158640	94	#define TARGET_PTX_6_3 (ptx_version_option >= PTX_VERSION_6_3)
eede2498	95	#define TARGET_PTX_7_0 (ptx_version_option >= PTX_VERSION_7_0)
2a158640	96
738f2522	97	/* Registers. Since ptx is a virtual target, we just define a few
a2e2a4e4 NS	98	hard registers for special purposes and leave pseudos unallocated.
a2e2a4e4 NS	99	We have to have some available hard registers, to keep gcc setup
bd5d4b65	100	happy. */
a2e2a4e4	101	#define FIRST_PSEUDO_REGISTER 16
5012919d	102	#define FIXED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
a2e2a4e4	103	#define CALL_USED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
738f2522	104
738f2522	105	/* Register Classes. */
a2e2a4e4 NS	106	enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
	107	#define REG_CLASS_NAMES { "NO_REGS", "ALL_REGS" }
	108	#define REG_CLASS_CONTENTS { { 0x0000 }, { 0xFFFF } }
738f2522 BS	109	#define N_REG_CLASSES (int) LIM_REG_CLASSES
738f2522 BS	110
738f2522	111	#define GENERAL_REGS ALL_REGS
bd5d4b65	112	#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
738f2522 BS	113	#define BASE_REG_CLASS ALL_REGS
	114	#define INDEX_REG_CLASS NO_REGS
	115
	116	#define REGNO_OK_FOR_BASE_P(X) true
	117	#define REGNO_OK_FOR_INDEX_P(X) false
	118
	119	#define CLASS_MAX_NREGS(class, mode) \
	120	((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
	121
738f2522	122	#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
bd5d4b65	123	if ((MODE) == QImode \|\| (MODE) == HImode) \
738f2522 BS	124	{ \
738f2522 BS	125	(MODE) = SImode; \
bd5d4b65 NS	126	(void)(UNSIGNEDP); \
bd5d4b65 NS	127	(void)(TYPE); \
738f2522 BS	128	}
738f2522 BS	129
738f2522 BS	130	/* Stack and Calling. */
738f2522 BS	131
738f2522	132	#define FRAME_GROWS_DOWNWARD 0
62f9f30b	133	#define STACK_GROWS_DOWNWARD 1
738f2522	134
a2e2a4e4	135	#define NVPTX_RETURN_REGNUM 0
738f2522	136	#define STACK_POINTER_REGNUM 1
a2e2a4e4 NS	137	#define FRAME_POINTER_REGNUM 2
	138	#define ARG_POINTER_REGNUM 3
	139	#define STATIC_CHAIN_REGNUM 4
5012919d AM	140	/* This register points to the shared memory location with the current warp's
	141	soft stack pointer (__nvptx_stacks[tid.y]). */
	142	#define SOFTSTACK_SLOT_REGNUM 5
	143	/* This register is used to save the previous value of the soft stack pointer
	144	in the prologue and restore it when returning. */
	145	#define SOFTSTACK_PREV_REGNUM 6
738f2522	146
bd5d4b65 NS	147	#define REGISTER_NAMES \
bd5d4b65 NS	148	{ \
5012919d AM	149	"%value", "%stack", "%frame", "%args", \
5012919d AM	150	"%chain", "%sspslot", "%sspprev", "%hr7", \
a2e2a4e4	151	"%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%hr14", "%hr15" \
bd5d4b65 NS	152	}
bd5d4b65 NS	153
01be5855	154	#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
738f2522	155	#define PUSH_ARGS_REVERSED 1
738f2522 BS	156	#define ACCUMULATE_OUTGOING_ARGS 1
738f2522 BS	157
01be5855 NS	158	/* Avoid using the argument pointer for frame-related things. */
	159	#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)
	160
738f2522 BS	161	#ifdef HOST_WIDE_INT
738f2522 BS	162	struct nvptx_args {
01be5855	163	tree fntype;
738f2522 BS	164	/* Number of arguments passed in registers so far. */
738f2522 BS	165	int count;
738f2522 BS	166	};
	167	#endif
	168
	169	#define CUMULATIVE_ARGS struct nvptx_args
	170
	171	#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
bd5d4b65	172	((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)
738f2522 BS	173
	174	#define FUNCTION_ARG_REGNO_P(r) 0
	175
	176	#define DEFAULT_PCC_STRUCT_RETURN 0
	177
	178	#define FUNCTION_PROFILER(file, labelno) \
40fecdd6 JM	179	fatal_error (input_location, \
40fecdd6 JM	180	"profiling is not yet implemented for this architecture")
738f2522 BS	181
	182	#define TRAMPOLINE_SIZE 32
	183	#define TRAMPOLINE_ALIGNMENT 256
	184	\f
	185	/* We don't run reload, so this isn't actually used, but it still needs to be
	186	defined. Showing an argp->fp elimination also stops
	187	expand_builtin_setjmp_receiver from generating invalid insns. */
	188	#define ELIMINABLE_REGS \
	189	{ \
bd5d4b65	190	{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} \
738f2522 BS	191	}
	192
	193	/* Define the offset between two registers, one to be eliminated, and the other
	194	its replacement, at the start of a routine. */
	195
	196	#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
	197	((OFFSET) = 0)
	198	\f
	199	/* Addressing Modes. */
	200
	201	#define MAX_REGS_PER_ADDRESS 1
	202
	203	#define LEGITIMATE_PIC_OPERAND_P(X) 1
	204	\f
	205
738f2522 BS	206	#if defined HOST_WIDE_INT
	207	struct GTY(()) machine_function
	208	{
44c068ae NS	209	rtx_expr_list call_args; / Arg list for the current call. */
	210	bool doing_call; /* Within a CALL_ARGS ... CALL_ARGS_END sequence. */
	211	bool is_varadic; /* This call is varadic */
	212	bool has_varadic; /* Current function has a varadic call. */
	213	bool has_chain; /* Current function has outgoing static chain. */
5012919d	214	bool has_softstack; /* Current function has a soft stack frame. */
0c6b03b5	215	bool has_simtreg; /* Current function has an OpenMP SIMD region. */
44c068ae NS	216	int num_args; /* Number of args of current call. */
	217	int return_mode; /* Return mode of current fn.
	218	(machine_mode not defined yet.) */
	219	rtx axis_predicate[2]; /* Neutering predicates. */
0d06e8c7 TV	220	int axis_dim[2]; /* Maximum number of threads on each axis, dim[0] is
	221	vector_length, dim[1] is num_workers. */
	222	bool axis_dim_init_p;
0024c320 TV	223	rtx bcast_partition; /* Register containing the size of each
	224	vector's partition of share-memory used to
	225	broadcast state. */
f881693c TV	226	rtx red_partition; /* Similar to bcast_partition, except for vector
f881693c TV	227	reductions. */
0024c320	228	rtx sync_bar; /* Synchronization barrier ID for vectors. */
5012919d AM	229	rtx unisimt_master; /* 'Master lane index' for -muniform-simt. */
5012919d AM	230	rtx unisimt_predicate; /* Predicate for -muniform-simt. */
0c6b03b5 AM	231	rtx unisimt_location; /* Mask location for -muniform-simt. */
	232	/* The following two fields hold the maximum size resp. alignment required
	233	for per-lane storage in OpenMP SIMD regions. */
	234	unsigned HOST_WIDE_INT simt_stack_size;
	235	unsigned HOST_WIDE_INT simt_stack_align;
738f2522 BS	236	};
	237	#endif
	238	\f
	239	/* Costs. */
	240
	241	#define NO_FUNCTION_CSE 1
	242	#define SLOW_BYTE_ACCESS 0
	243	#define BRANCH_COST(speed_p, predictable_p) 6
	244	\f
	245	/* Assembler Format. */
	246
	247	#undef ASM_DECLARE_FUNCTION_NAME
	248	#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
	249	nvptx_declare_function_name (FILE, NAME, DECL)
	250
	251	#undef ASM_DECLARE_FUNCTION_SIZE
	252	#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
	253	nvptx_function_end (STREAM)
	254
	255	#define DWARF2_ASM_LINE_DEBUG_INFO 1
	256
	257	#undef ASM_APP_ON
	258	#define ASM_APP_ON "\t// #APP \n"
	259	#undef ASM_APP_OFF
	260	#define ASM_APP_OFF "\t// #NO_APP \n"
	261
738f2522 BS	262	#define DBX_REGISTER_NUMBER(N) N
	263
	264	#define TEXT_SECTION_ASM_OP ""
	265	#define DATA_SECTION_ASM_OP ""
	266
	267	#undef ASM_GENERATE_INTERNAL_LABEL
	268	#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
	269	do \
	270	{ \
	271	char *__p; \
	272	__p = stpcpy (&(LABEL)[1], PREFIX); \
	273	(LABEL)[0] = '$'; \
	274	sprint_ul (__p, (unsigned long) (NUM)); \
	275	} \
	276	while (0)
	277
e0dd6391 TS	278	#define ASM_OUTPUT_ALIGN(FILE, POWER) \
	279	do \
	280	{ \
	281	(void) (FILE); \
	282	(void) (POWER); \
	283	} \
	284	while (0)
	285
738f2522 BS	286	#define ASM_OUTPUT_SKIP(FILE, N) \
738f2522 BS	287	nvptx_output_skip (FILE, N)
e0dd6391	288
738f2522 BS	289	#undef ASM_OUTPUT_ASCII
	290	#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
	291	nvptx_output_ascii (FILE, STR, LENGTH);
	292
	293	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
	294	nvptx_declare_object_name (FILE, NAME, DECL)
	295
	296	#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
	297	#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	298	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	299
	300	#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
	301	#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	302	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	303
	304	#define CASE_VECTOR_PC_RELATIVE flag_pic
	305	#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
	306
	307	#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)
	308
	309	/* Misc. */
	310
c9665100	311	#define DWARF2_LINENO_DEBUGGING_INFO 1
738f2522 BS	312
	313	#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	314	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	315	#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	316	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	317
0766660b	318	#define SUPPORTS_WEAK 1
738f2522 BS	319	#define NO_DOT_IN_LABEL
	320	#define ASM_COMMENT_START "//"
	321
	322	#define STORE_FLAG_VALUE -1
	323	#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))
	324
	325	#define CASE_VECTOR_MODE SImode
9251aec6	326	#define MOVE_MAX 8
738f2522	327	#define MOVE_RATIO(SPEED) 4
738f2522 BS	328	#define FUNCTION_MODE QImode
	329	#define HAS_INIT_SECTION 1
	330
d94fae04 TS	331	/* The C++ front end insists to link against libstdc++ -- which we don't build.
	332	Tell it to instead link against the innocuous libgcc. */
	333	#define LIBSTDCXX "gcc"
	334
738f2522	335	#endif /* GCC_NVPTX_H */