[thirdparty/gcc.git] / gcc / config / nvptx / nvptx.h

/* Target Definitions for NVPTX.
   Copyright (C) 2014-2017 Free Software Foundation, Inc.
   Contributed by Bernd Schmidt <bernds@codesourcery.com>

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

#ifndef GCC_NVPTX_H
#define GCC_NVPTX_H

/* Run-time Target.  */

#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"

#define TARGET_CPU_CPP_BUILTINS()		\
  do						\
    {						\
      builtin_assert ("machine=nvptx");		\
      builtin_assert ("cpu=nvptx");		\
      builtin_define ("__nvptx__");		\
      if (TARGET_SOFT_STACK)			\
        builtin_define ("__nvptx_softstack__");	\
      if (TARGET_UNIFORM_SIMT)			\
        builtin_define ("__nvptx_unisimt__");	\
    } while (0)

/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
   supported for nvptx.  */
#define GOMP_SELF_SPECS ""

/* Storage Layout.  */

#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
#define WORDS_BIG_ENDIAN 0

/* Chosen such that we won't have to deal with multi-word subregs.  */
#define UNITS_PER_WORD 8

/* Alignments in bits.  */
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 64
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 64
#define STRICT_ALIGNMENT 1

#define MAX_STACK_ALIGNMENT (1024 * 8)

/* Copied from elf.h and other places.  We'd otherwise use
   BIGGEST_ALIGNMENT and fail a number of testcases.  */
#define MAX_OFILE_ALIGNMENT (32768 * 8)

/* Type Layout.  */

#define DEFAULT_SIGNED_CHAR 1

#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64
#define TARGET_SUPPORTS_WIDE_INT 1

#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")

#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
#define Pmode (TARGET_ABI64 ? DImode : SImode)
#define STACK_SIZE_MODE Pmode

/* Registers.  Since ptx is a virtual target, we just define a few
   hard registers for special purposes and leave pseudos unallocated.
   We have to have some available hard registers, to keep gcc setup
   happy.  */
#define FIRST_PSEUDO_REGISTER 16
#define FIXED_REGISTERS	    { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
#define CALL_USED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

#define HARD_REGNO_NREGS(REG, MODE)		\
  ((void)(REG), (void)(MODE), 1)
#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS)	\
  ((void)(M1), (void)(M2), (void)(CLS), true)
#define HARD_REGNO_MODE_OK(REG, MODE)		\
     ((void)(REG), (void)(MODE), true)

/* Register Classes.  */
enum reg_class             {  NO_REGS,    ALL_REGS,	LIM_REG_CLASSES };
#define REG_CLASS_NAMES    { "NO_REGS",  "ALL_REGS" }
#define REG_CLASS_CONTENTS { { 0x0000 }, { 0xFFFF } }
#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define GENERAL_REGS ALL_REGS
#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
#define BASE_REG_CLASS ALL_REGS
#define INDEX_REG_CLASS NO_REGS

#define REGNO_OK_FOR_BASE_P(X) true
#define REGNO_OK_FOR_INDEX_P(X) false

#define CLASS_MAX_NREGS(class, mode) \
  ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define MODES_TIEABLE_P(M1, M2) false

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)		\
  if ((MODE) == QImode || (MODE) == HImode)		\
    {							\
      (MODE) = SImode;					\
      (void)(UNSIGNEDP);				\
      (void)(TYPE);					\
    }

/* Stack and Calling.  */

#define STARTING_FRAME_OFFSET 0
#define FRAME_GROWS_DOWNWARD 0
#define STACK_GROWS_DOWNWARD 1

#define NVPTX_RETURN_REGNUM 0
#define STACK_POINTER_REGNUM 1
#define FRAME_POINTER_REGNUM 2
#define ARG_POINTER_REGNUM 3
#define STATIC_CHAIN_REGNUM 4
/* This register points to the shared memory location with the current warp's
   soft stack pointer (__nvptx_stacks[tid.y]).  */
#define SOFTSTACK_SLOT_REGNUM 5
/* This register is used to save the previous value of the soft stack pointer
   in the prologue and restore it when returning.  */
#define SOFTSTACK_PREV_REGNUM 6

#define REGISTER_NAMES							\
  {									\
    "%value", "%stack", "%frame", "%args",                              \
    "%chain", "%sspslot", "%sspprev", "%hr7",                           \
    "%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%hr14", "%hr15" \
  }

#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
#define PUSH_ARGS_REVERSED 1
#define ACCUMULATE_OUTGOING_ARGS 1

/* Avoid using the argument pointer for frame-related things.  */
#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)

#ifdef HOST_WIDE_INT
struct nvptx_args {
  tree fntype;
  /* Number of arguments passed in registers so far.  */
  int count;
};
#endif

#define CUMULATIVE_ARGS struct nvptx_args

#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
  ((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)

#define FUNCTION_ARG_REGNO_P(r) 0

#define DEFAULT_PCC_STRUCT_RETURN 0

#define FUNCTION_PROFILER(file, labelno) \
  fatal_error (input_location, \
	       "profiling is not yet implemented for this architecture")

#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
\f
/* We don't run reload, so this isn't actually used, but it still needs to be
   defined.  Showing an argp->fp elimination also stops
   expand_builtin_setjmp_receiver from generating invalid insns.  */
#define ELIMINABLE_REGS					\
  {							\
    { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}	\
  }

/* Define the offset between two registers, one to be eliminated, and the other
   its replacement, at the start of a routine.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
  ((OFFSET) = 0)
\f
/* Addressing Modes.  */

#define MAX_REGS_PER_ADDRESS 1

#define LEGITIMATE_PIC_OPERAND_P(X) 1
\f

#if defined HOST_WIDE_INT
struct GTY(()) machine_function
{
  rtx_expr_list *call_args;  /* Arg list for the current call.  */
  bool doing_call; /* Within a CALL_ARGS ... CALL_ARGS_END sequence.  */
  bool is_varadic;  /* This call is varadic  */
  bool has_varadic;  /* Current function has a varadic call.  */
  bool has_chain; /* Current function has outgoing static chain.  */
  bool has_softstack; /* Current function has a soft stack frame.  */
  int num_args;	/* Number of args of current call.  */
  int return_mode; /* Return mode of current fn.
		      (machine_mode not defined yet.) */
  rtx axis_predicate[2]; /* Neutering predicates.  */
  rtx unisimt_master; /* 'Master lane index' for -muniform-simt.  */
  rtx unisimt_predicate; /* Predicate for -muniform-simt.  */
};
#endif
\f
/* Costs.  */

#define NO_FUNCTION_CSE 1
#define SLOW_BYTE_ACCESS 0
#define BRANCH_COST(speed_p, predictable_p) 6
\f
/* Assembler Format.  */

#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)		\
  nvptx_declare_function_name (FILE, NAME, DECL)

#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
  nvptx_function_end (STREAM)

#define DWARF2_ASM_LINE_DEBUG_INFO 1

#undef ASM_APP_ON
#define ASM_APP_ON "\t// #APP \n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "\t// #NO_APP \n"

#define DBX_REGISTER_NUMBER(N) N

#define TEXT_SECTION_ASM_OP ""
#define DATA_SECTION_ASM_OP ""

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)		\
  do								\
    {								\
      char *__p;						\
      __p = stpcpy (&(LABEL)[1], PREFIX);			\
      (LABEL)[0] = '$';						\
      sprint_ul (__p, (unsigned long) (NUM));			\
    }								\
  while (0)

#define ASM_OUTPUT_ALIGN(FILE, POWER)		\
  do						\
    {						\
      (void) (FILE);				\
      (void) (POWER);				\
    }						\
  while (0)

#define ASM_OUTPUT_SKIP(FILE, N)		\
  nvptx_output_skip (FILE, N)

#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)			\
  nvptx_output_ascii (FILE, STR, LENGTH);

#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)	\
  nvptx_declare_object_name (FILE, NAME, DECL)

#undef  ASM_OUTPUT_ALIGNED_DECL_COMMON
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#undef  ASM_OUTPUT_ALIGNED_DECL_LOCAL
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#define CASE_VECTOR_PC_RELATIVE flag_pic
#define JUMP_TABLES_IN_TEXT_SECTION flag_pic

#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)

/* Misc.  */

#define DWARF2_LINENO_DEBUGGING_INFO 1

#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)

#define SUPPORTS_WEAK 1
#define NO_DOT_IN_LABEL
#define ASM_COMMENT_START "//"

#define STORE_FLAG_VALUE -1
#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))

#define CASE_VECTOR_MODE SImode
#define MOVE_MAX 8
#define MOVE_RATIO(SPEED) 4
#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
#define FUNCTION_MODE QImode
#define HAS_INIT_SECTION 1

/* The C++ front end insists to link against libstdc++ -- which we don't build.
   Tell it to instead link against the innocuous libgcc.  */
#define LIBSTDCXX "gcc"

#endif /* GCC_NVPTX_H */
Commit	Line	Data
738f2522	1	/* Target Definitions for NVPTX.
cbe34bb5	2	Copyright (C) 2014-2017 Free Software Foundation, Inc.
738f2522 BS	3	Contributed by Bernd Schmidt <bernds@codesourcery.com>
	4
	5	This file is part of GCC.
	6
	7	GCC is free software; you can redistribute it and/or modify it
	8	under the terms of the GNU General Public License as published
	9	by the Free Software Foundation; either version 3, or (at your
	10	option) any later version.
	11
	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with GCC; see the file COPYING3. If not see
	19	<http://www.gnu.org/licenses/>. */
	20
	21	#ifndef GCC_NVPTX_H
	22	#define GCC_NVPTX_H
	23
	24	/* Run-time Target. */
	25
	26	#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"
	27
	28	#define TARGET_CPU_CPP_BUILTINS() \
	29	do \
	30	{ \
	31	builtin_assert ("machine=nvptx"); \
	32	builtin_assert ("cpu=nvptx"); \
	33	builtin_define ("__nvptx__"); \
5012919d AM	34	if (TARGET_SOFT_STACK) \
	35	builtin_define ("__nvptx_softstack__"); \
	36	if (TARGET_UNIFORM_SIMT) \
	37	builtin_define ("__nvptx_unisimt__"); \
738f2522 BS	38	} while (0)
738f2522 BS	39
8747dd6e TS	40	/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
	41	supported for nvptx. */
	42	#define GOMP_SELF_SPECS ""
	43
738f2522 BS	44	/* Storage Layout. */
	45
	46	#define BITS_BIG_ENDIAN 0
	47	#define BYTES_BIG_ENDIAN 0
	48	#define WORDS_BIG_ENDIAN 0
	49
	50	/* Chosen such that we won't have to deal with multi-word subregs. */
	51	#define UNITS_PER_WORD 8
	52
44eba92d NS	53	/* Alignments in bits. */
44eba92d NS	54	#define PARM_BOUNDARY 32
738f2522 BS	55	#define STACK_BOUNDARY 64
	56	#define FUNCTION_BOUNDARY 32
	57	#define BIGGEST_ALIGNMENT 64
	58	#define STRICT_ALIGNMENT 1
	59
18c05628 NS	60	#define MAX_STACK_ALIGNMENT (1024 * 8)
18c05628 NS	61
738f2522 BS	62	/* Copied from elf.h and other places. We'd otherwise use
	63	BIGGEST_ALIGNMENT and fail a number of testcases. */
	64	#define MAX_OFILE_ALIGNMENT (32768 * 8)
	65
	66	/* Type Layout. */
	67
	68	#define DEFAULT_SIGNED_CHAR 1
	69
	70	#define SHORT_TYPE_SIZE 16
	71	#define INT_TYPE_SIZE 32
	72	#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
	73	#define LONG_LONG_TYPE_SIZE 64
	74	#define FLOAT_TYPE_SIZE 32
	75	#define DOUBLE_TYPE_SIZE 64
	76	#define LONG_DOUBLE_TYPE_SIZE 64
a9000e1e	77	#define TARGET_SUPPORTS_WIDE_INT 1
738f2522 BS	78
	79	#undef SIZE_TYPE
	80	#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
	81	#undef PTRDIFF_TYPE
	82	#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")
	83
	84	#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
738f2522	85	#define Pmode (TARGET_ABI64 ? DImode : SImode)
5012919d	86	#define STACK_SIZE_MODE Pmode
738f2522 BS	87
738f2522 BS	88	/* Registers. Since ptx is a virtual target, we just define a few
a2e2a4e4 NS	89	hard registers for special purposes and leave pseudos unallocated.
a2e2a4e4 NS	90	We have to have some available hard registers, to keep gcc setup
bd5d4b65	91	happy. */
a2e2a4e4	92	#define FIRST_PSEUDO_REGISTER 16
5012919d	93	#define FIXED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
a2e2a4e4	94	#define CALL_USED_REGISTERS { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
738f2522	95
5c036f3f NS	96	#define HARD_REGNO_NREGS(REG, MODE) \
	97	((void)(REG), (void)(MODE), 1)
	98	#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS) \
	99	((void)(M1), (void)(M2), (void)(CLS), true)
	100	#define HARD_REGNO_MODE_OK(REG, MODE) \
	101	((void)(REG), (void)(MODE), true)
738f2522 BS	102
738f2522 BS	103	/* Register Classes. */
a2e2a4e4 NS	104	enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
	105	#define REG_CLASS_NAMES { "NO_REGS", "ALL_REGS" }
	106	#define REG_CLASS_CONTENTS { { 0x0000 }, { 0xFFFF } }
738f2522 BS	107	#define N_REG_CLASSES (int) LIM_REG_CLASSES
738f2522 BS	108
738f2522	109	#define GENERAL_REGS ALL_REGS
bd5d4b65	110	#define REGNO_REG_CLASS(R) ((void)(R), ALL_REGS)
738f2522 BS	111	#define BASE_REG_CLASS ALL_REGS
	112	#define INDEX_REG_CLASS NO_REGS
	113
	114	#define REGNO_OK_FOR_BASE_P(X) true
	115	#define REGNO_OK_FOR_INDEX_P(X) false
	116
	117	#define CLASS_MAX_NREGS(class, mode) \
	118	((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
	119
	120	#define MODES_TIEABLE_P(M1, M2) false
	121
	122	#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
bd5d4b65	123	if ((MODE) == QImode \|\| (MODE) == HImode) \
738f2522 BS	124	{ \
738f2522 BS	125	(MODE) = SImode; \
bd5d4b65 NS	126	(void)(UNSIGNEDP); \
bd5d4b65 NS	127	(void)(TYPE); \
738f2522 BS	128	}
738f2522 BS	129
738f2522 BS	130	/* Stack and Calling. */
	131
	132	#define STARTING_FRAME_OFFSET 0
	133	#define FRAME_GROWS_DOWNWARD 0
62f9f30b	134	#define STACK_GROWS_DOWNWARD 1
738f2522	135
a2e2a4e4	136	#define NVPTX_RETURN_REGNUM 0
738f2522	137	#define STACK_POINTER_REGNUM 1
a2e2a4e4 NS	138	#define FRAME_POINTER_REGNUM 2
	139	#define ARG_POINTER_REGNUM 3
	140	#define STATIC_CHAIN_REGNUM 4
5012919d AM	141	/* This register points to the shared memory location with the current warp's
	142	soft stack pointer (__nvptx_stacks[tid.y]). */
	143	#define SOFTSTACK_SLOT_REGNUM 5
	144	/* This register is used to save the previous value of the soft stack pointer
	145	in the prologue and restore it when returning. */
	146	#define SOFTSTACK_PREV_REGNUM 6
738f2522	147
bd5d4b65 NS	148	#define REGISTER_NAMES \
bd5d4b65 NS	149	{ \
5012919d AM	150	"%value", "%stack", "%frame", "%args", \
5012919d AM	151	"%chain", "%sspslot", "%sspprev", "%hr7", \
a2e2a4e4	152	"%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%hr14", "%hr15" \
bd5d4b65 NS	153	}
bd5d4b65 NS	154
01be5855	155	#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
738f2522	156	#define PUSH_ARGS_REVERSED 1
738f2522 BS	157	#define ACCUMULATE_OUTGOING_ARGS 1
738f2522 BS	158
01be5855 NS	159	/* Avoid using the argument pointer for frame-related things. */
	160	#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)
	161
738f2522 BS	162	#ifdef HOST_WIDE_INT
738f2522 BS	163	struct nvptx_args {
01be5855	164	tree fntype;
738f2522 BS	165	/* Number of arguments passed in registers so far. */
738f2522 BS	166	int count;
738f2522 BS	167	};
	168	#endif
	169
	170	#define CUMULATIVE_ARGS struct nvptx_args
	171
	172	#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
bd5d4b65	173	((CUM).fntype = (FNTYPE), (CUM).count = 0, (void)0)
738f2522 BS	174
	175	#define FUNCTION_ARG_REGNO_P(r) 0
	176
	177	#define DEFAULT_PCC_STRUCT_RETURN 0
	178
	179	#define FUNCTION_PROFILER(file, labelno) \
40fecdd6 JM	180	fatal_error (input_location, \
40fecdd6 JM	181	"profiling is not yet implemented for this architecture")
738f2522 BS	182
	183	#define TRAMPOLINE_SIZE 32
	184	#define TRAMPOLINE_ALIGNMENT 256
	185	\f
	186	/* We don't run reload, so this isn't actually used, but it still needs to be
	187	defined. Showing an argp->fp elimination also stops
	188	expand_builtin_setjmp_receiver from generating invalid insns. */
	189	#define ELIMINABLE_REGS \
	190	{ \
bd5d4b65	191	{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM} \
738f2522 BS	192	}
	193
	194	/* Define the offset between two registers, one to be eliminated, and the other
	195	its replacement, at the start of a routine. */
	196
	197	#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
	198	((OFFSET) = 0)
	199	\f
	200	/* Addressing Modes. */
	201
	202	#define MAX_REGS_PER_ADDRESS 1
	203
	204	#define LEGITIMATE_PIC_OPERAND_P(X) 1
	205	\f
	206
738f2522 BS	207	#if defined HOST_WIDE_INT
	208	struct GTY(()) machine_function
	209	{
44c068ae NS	210	rtx_expr_list call_args; / Arg list for the current call. */
	211	bool doing_call; /* Within a CALL_ARGS ... CALL_ARGS_END sequence. */
	212	bool is_varadic; /* This call is varadic */
	213	bool has_varadic; /* Current function has a varadic call. */
	214	bool has_chain; /* Current function has outgoing static chain. */
5012919d	215	bool has_softstack; /* Current function has a soft stack frame. */
44c068ae NS	216	int num_args; /* Number of args of current call. */
	217	int return_mode; /* Return mode of current fn.
	218	(machine_mode not defined yet.) */
	219	rtx axis_predicate[2]; /* Neutering predicates. */
5012919d AM	220	rtx unisimt_master; /* 'Master lane index' for -muniform-simt. */
5012919d AM	221	rtx unisimt_predicate; /* Predicate for -muniform-simt. */
738f2522 BS	222	};
	223	#endif
	224	\f
	225	/* Costs. */
	226
	227	#define NO_FUNCTION_CSE 1
	228	#define SLOW_BYTE_ACCESS 0
	229	#define BRANCH_COST(speed_p, predictable_p) 6
	230	\f
	231	/* Assembler Format. */
	232
	233	#undef ASM_DECLARE_FUNCTION_NAME
	234	#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
	235	nvptx_declare_function_name (FILE, NAME, DECL)
	236
	237	#undef ASM_DECLARE_FUNCTION_SIZE
	238	#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
	239	nvptx_function_end (STREAM)
	240
	241	#define DWARF2_ASM_LINE_DEBUG_INFO 1
	242
	243	#undef ASM_APP_ON
	244	#define ASM_APP_ON "\t// #APP \n"
	245	#undef ASM_APP_OFF
	246	#define ASM_APP_OFF "\t// #NO_APP \n"
	247
738f2522 BS	248	#define DBX_REGISTER_NUMBER(N) N
	249
	250	#define TEXT_SECTION_ASM_OP ""
	251	#define DATA_SECTION_ASM_OP ""
	252
	253	#undef ASM_GENERATE_INTERNAL_LABEL
	254	#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
	255	do \
	256	{ \
	257	char *__p; \
	258	__p = stpcpy (&(LABEL)[1], PREFIX); \
	259	(LABEL)[0] = '$'; \
	260	sprint_ul (__p, (unsigned long) (NUM)); \
	261	} \
	262	while (0)
	263
e0dd6391 TS	264	#define ASM_OUTPUT_ALIGN(FILE, POWER) \
	265	do \
	266	{ \
	267	(void) (FILE); \
	268	(void) (POWER); \
	269	} \
	270	while (0)
	271
738f2522 BS	272	#define ASM_OUTPUT_SKIP(FILE, N) \
738f2522 BS	273	nvptx_output_skip (FILE, N)
e0dd6391	274
738f2522 BS	275	#undef ASM_OUTPUT_ASCII
	276	#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
	277	nvptx_output_ascii (FILE, STR, LENGTH);
	278
	279	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
	280	nvptx_declare_object_name (FILE, NAME, DECL)
	281
	282	#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
	283	#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	284	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	285
	286	#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
	287	#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	288	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	289
	290	#define CASE_VECTOR_PC_RELATIVE flag_pic
	291	#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
	292
	293	#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)
	294
	295	/* Misc. */
	296
c9665100	297	#define DWARF2_LINENO_DEBUGGING_INFO 1
738f2522 BS	298
	299	#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	300	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	301	#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	302	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	303
0766660b	304	#define SUPPORTS_WEAK 1
738f2522 BS	305	#define NO_DOT_IN_LABEL
	306	#define ASM_COMMENT_START "//"
	307
	308	#define STORE_FLAG_VALUE -1
	309	#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))
	310
	311	#define CASE_VECTOR_MODE SImode
9251aec6	312	#define MOVE_MAX 8
738f2522 BS	313	#define MOVE_RATIO(SPEED) 4
	314	#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
	315	#define FUNCTION_MODE QImode
	316	#define HAS_INIT_SECTION 1
	317
d94fae04 TS	318	/* The C++ front end insists to link against libstdc++ -- which we don't build.
	319	Tell it to instead link against the innocuous libgcc. */
	320	#define LIBSTDCXX "gcc"
	321
738f2522	322	#endif /* GCC_NVPTX_H */