[thirdparty/gcc.git] / gcc / config / nvptx / nvptx.h

/* Target Definitions for NVPTX.
   Copyright (C) 2014-2015 Free Software Foundation, Inc.
   Contributed by Bernd Schmidt <bernds@codesourcery.com>

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

#ifndef GCC_NVPTX_H
#define GCC_NVPTX_H

/* Run-time Target.  */

#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"

#define TARGET_CPU_CPP_BUILTINS()		\
  do						\
    {						\
      builtin_assert ("machine=nvptx");		\
      builtin_assert ("cpu=nvptx");		\
      builtin_define ("__nvptx__");		\
    } while (0)

/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
   supported for nvptx.  */
#define GOMP_SELF_SPECS ""

/* Storage Layout.  */

#define BITS_BIG_ENDIAN 0
#define BYTES_BIG_ENDIAN 0
#define WORDS_BIG_ENDIAN 0

/* Chosen such that we won't have to deal with multi-word subregs.  */
#define UNITS_PER_WORD 8

#define PARM_BOUNDARY 8
#define STACK_BOUNDARY 64
#define FUNCTION_BOUNDARY 32
#define BIGGEST_ALIGNMENT 64
#define STRICT_ALIGNMENT 1

#define MAX_STACK_ALIGNMENT (1024 * 8)

/* Copied from elf.h and other places.  We'd otherwise use
   BIGGEST_ALIGNMENT and fail a number of testcases.  */
#define MAX_OFILE_ALIGNMENT (32768 * 8)

/* Type Layout.  */

#define DEFAULT_SIGNED_CHAR 1

#define SHORT_TYPE_SIZE 16
#define INT_TYPE_SIZE 32
#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
#define LONG_LONG_TYPE_SIZE 64
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#define LONG_DOUBLE_TYPE_SIZE 64

#undef SIZE_TYPE
#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")

#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)

#define Pmode (TARGET_ABI64 ? DImode : SImode)

/* Registers.  Since ptx is a virtual target, we just define a few
   hard registers for special purposes and leave pseudos unallocated.  */

#define FIRST_PSEUDO_REGISTER 16
#define FIXED_REGISTERS					\
  { 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1 }
#define CALL_USED_REGISTERS				\
  { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

#define HARD_REGNO_NREGS(regno, mode)	((void)(regno), (void)(mode), 1)
#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS) ((CLS) == RETURN_REG)
#define HARD_REGNO_MODE_OK(REG, MODE) nvptx_hard_regno_mode_ok (REG, MODE)

/* Register Classes.  */

enum reg_class
  {
    NO_REGS,
    RETURN_REG,
    ALL_REGS,
    LIM_REG_CLASSES
  };

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES {	  \
    "RETURN_REG",		  \
    "NO_REGS",			  \
    "ALL_REGS" }

#define REG_CLASS_CONTENTS	\
{				\
  /* NO_REGS.  */		\
  { 0x0000 },			\
  /* RETURN_REG.  */		\
  { 0x0008 },			\
  /* ALL_REGS.  */		\
  { 0xFFFF },			\
}

#define GENERAL_REGS ALL_REGS

#define REGNO_REG_CLASS(R) ((R) == 4 ? RETURN_REG : ALL_REGS)

#define BASE_REG_CLASS ALL_REGS
#define INDEX_REG_CLASS NO_REGS

#define REGNO_OK_FOR_BASE_P(X) true
#define REGNO_OK_FOR_INDEX_P(X) false

#define CLASS_MAX_NREGS(class, mode) \
  ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define MODES_TIEABLE_P(M1, M2) false

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)		\
  if (GET_MODE_CLASS (MODE) == MODE_INT			\
      && GET_MODE_SIZE (MODE) < GET_MODE_SIZE (SImode))	\
    {							\
      (MODE) = SImode;					\
    }

/* Stack and Calling.  */

#define STARTING_FRAME_OFFSET 0
#define FRAME_GROWS_DOWNWARD 0
#define STACK_GROWS_DOWNWARD 1

#define STACK_POINTER_REGNUM 1
#define HARD_FRAME_POINTER_REGNUM 2
#define NVPTX_RETURN_REGNUM 4
#define FRAME_POINTER_REGNUM 15
#define ARG_POINTER_REGNUM 14
#define RETURN_ADDR_REGNO 13

#define STATIC_CHAIN_REGNUM 12
#define OUTGOING_ARG_POINTER_REGNUM 11
#define OUTGOING_STATIC_CHAIN_REGNUM 10

#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
#define PUSH_ARGS_REVERSED 1
#define ACCUMULATE_OUTGOING_ARGS 1

/* Avoid using the argument pointer for frame-related things.  */
#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)

#ifdef HOST_WIDE_INT
struct nvptx_args {
  tree fntype;
  /* Number of arguments passed in registers so far.  */
  int count;
  /* Offset into the stdarg area so far.  */
  HOST_WIDE_INT off;
};
#endif

#define CUMULATIVE_ARGS struct nvptx_args

#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
  ((CUM).fntype = (FNTYPE), (CUM).count = 0, (CUM).off = 0, (void)0)

#define FUNCTION_ARG_REGNO_P(r) 0

#define DEFAULT_PCC_STRUCT_RETURN 0

#define FUNCTION_PROFILER(file, labelno) \
  fatal_error (input_location, \
	       "profiling is not yet implemented for this architecture")

#define TRAMPOLINE_SIZE 32
#define TRAMPOLINE_ALIGNMENT 256
\f
/* We don't run reload, so this isn't actually used, but it still needs to be
   defined.  Showing an argp->fp elimination also stops
   expand_builtin_setjmp_receiver from generating invalid insns.  */
#define ELIMINABLE_REGS					\
  {							\
    { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},	\
    { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}	\
  }

/* Define the offset between two registers, one to be eliminated, and the other
   its replacement, at the start of a routine.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
  ((OFFSET) = 0)
\f
/* Addressing Modes.  */

#define MAX_REGS_PER_ADDRESS 1

#define LEGITIMATE_PIC_OPERAND_P(X) 1
\f

#if defined HOST_WIDE_INT
struct GTY(()) machine_function
{
  rtx_expr_list *call_args;
  rtx start_call;
  tree funtype;
  bool has_call_with_varargs;
  bool has_call_with_sc;
  HOST_WIDE_INT outgoing_stdarg_size;
  int ret_reg_mode; /* machine_mode not defined yet. */
  rtx axis_predicate[2];
};
#endif
\f
/* Costs.  */

#define NO_FUNCTION_CSE 1
#define SLOW_BYTE_ACCESS 0
#define BRANCH_COST(speed_p, predictable_p) 6
\f
/* Assembler Format.  */

#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)		\
  nvptx_declare_function_name (FILE, NAME, DECL)

#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
  nvptx_function_end (STREAM)

#define DWARF2_ASM_LINE_DEBUG_INFO 1

#undef ASM_APP_ON
#define ASM_APP_ON "\t// #APP \n"
#undef ASM_APP_OFF
#define ASM_APP_OFF "\t// #NO_APP \n"

#define ASM_OUTPUT_COMMON(stream, name, size, rounded)
#define ASM_OUTPUT_LOCAL(stream, name, size, rounded)

#define REGISTER_NAMES							\
  {									\
    "%hr0", "%outargs", "%hfp", "%hr3", "%retval", "%retval_in", "%hr6", "%hr7",	\
    "%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%argp", "%frame" \
  }

#define DBX_REGISTER_NUMBER(N) N

#define TEXT_SECTION_ASM_OP ""
#define DATA_SECTION_ASM_OP ""

#undef  ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)		\
  do								\
    {								\
      char *__p;						\
      __p = stpcpy (&(LABEL)[1], PREFIX);			\
      (LABEL)[0] = '$';						\
      sprint_ul (__p, (unsigned long) (NUM));			\
    }								\
  while (0)

#define ASM_OUTPUT_ALIGN(FILE, POWER)		\
  do						\
    {						\
      (void) (FILE);				\
      (void) (POWER);				\
    }						\
  while (0)

#define ASM_OUTPUT_SKIP(FILE, N)		\
  nvptx_output_skip (FILE, N)

#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH)			\
  nvptx_output_ascii (FILE, STR, LENGTH);

#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)	\
  nvptx_declare_object_name (FILE, NAME, DECL)

#undef  ASM_OUTPUT_ALIGNED_DECL_COMMON
#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#undef  ASM_OUTPUT_ALIGNED_DECL_LOCAL
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN)	\
  nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)

#define CASE_VECTOR_PC_RELATIVE flag_pic
#define JUMP_TABLES_IN_TEXT_SECTION flag_pic

#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)

/* Misc.  */

#define DWARF2_LINENO_DEBUGGING_INFO 1

#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
  ((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)

#define SUPPORTS_WEAK 1
#define NO_DOT_IN_LABEL
#define ASM_COMMENT_START "//"

#define STORE_FLAG_VALUE -1
#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))

#define CASE_VECTOR_MODE SImode
#define MOVE_MAX 8
#define MOVE_RATIO(SPEED) 4
#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
#define FUNCTION_MODE QImode
#define HAS_INIT_SECTION 1

/* The C++ front end insists to link against libstdc++ -- which we don't build.
   Tell it to instead link against the innocuous libgcc.  */
#define LIBSTDCXX "gcc"

#endif /* GCC_NVPTX_H */
Commit	Line	Data
738f2522	1	/* Target Definitions for NVPTX.
5624e564	2	Copyright (C) 2014-2015 Free Software Foundation, Inc.
738f2522 BS	3	Contributed by Bernd Schmidt <bernds@codesourcery.com>
	4
	5	This file is part of GCC.
	6
	7	GCC is free software; you can redistribute it and/or modify it
	8	under the terms of the GNU General Public License as published
	9	by the Free Software Foundation; either version 3, or (at your
	10	option) any later version.
	11
	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with GCC; see the file COPYING3. If not see
	19	<http://www.gnu.org/licenses/>. */
	20
	21	#ifndef GCC_NVPTX_H
	22	#define GCC_NVPTX_H
	23
	24	/* Run-time Target. */
	25
	26	#define STARTFILE_SPEC "%{mmainkernel:crt0.o}"
	27
	28	#define TARGET_CPU_CPP_BUILTINS() \
	29	do \
	30	{ \
	31	builtin_assert ("machine=nvptx"); \
	32	builtin_assert ("cpu=nvptx"); \
	33	builtin_define ("__nvptx__"); \
	34	} while (0)
	35
8747dd6e TS	36	/* Avoid the default in ../../gcc.c, which adds "-pthread", which is not
	37	supported for nvptx. */
	38	#define GOMP_SELF_SPECS ""
	39
738f2522 BS	40	/* Storage Layout. */
	41
	42	#define BITS_BIG_ENDIAN 0
	43	#define BYTES_BIG_ENDIAN 0
	44	#define WORDS_BIG_ENDIAN 0
	45
	46	/* Chosen such that we won't have to deal with multi-word subregs. */
	47	#define UNITS_PER_WORD 8
	48
	49	#define PARM_BOUNDARY 8
	50	#define STACK_BOUNDARY 64
	51	#define FUNCTION_BOUNDARY 32
	52	#define BIGGEST_ALIGNMENT 64
	53	#define STRICT_ALIGNMENT 1
	54
18c05628 NS	55	#define MAX_STACK_ALIGNMENT (1024 * 8)
18c05628 NS	56
738f2522 BS	57	/* Copied from elf.h and other places. We'd otherwise use
	58	BIGGEST_ALIGNMENT and fail a number of testcases. */
	59	#define MAX_OFILE_ALIGNMENT (32768 * 8)
	60
	61	/* Type Layout. */
	62
	63	#define DEFAULT_SIGNED_CHAR 1
	64
	65	#define SHORT_TYPE_SIZE 16
	66	#define INT_TYPE_SIZE 32
	67	#define LONG_TYPE_SIZE (TARGET_ABI64 ? 64 : 32)
	68	#define LONG_LONG_TYPE_SIZE 64
	69	#define FLOAT_TYPE_SIZE 32
	70	#define DOUBLE_TYPE_SIZE 64
	71	#define LONG_DOUBLE_TYPE_SIZE 64
	72
	73	#undef SIZE_TYPE
	74	#define SIZE_TYPE (TARGET_ABI64 ? "long unsigned int" : "unsigned int")
	75	#undef PTRDIFF_TYPE
	76	#define PTRDIFF_TYPE (TARGET_ABI64 ? "long int" : "int")
	77
	78	#define POINTER_SIZE (TARGET_ABI64 ? 64 : 32)
	79
	80	#define Pmode (TARGET_ABI64 ? DImode : SImode)
	81
	82	/* Registers. Since ptx is a virtual target, we just define a few
	83	hard registers for special purposes and leave pseudos unallocated. */
	84
	85	#define FIRST_PSEUDO_REGISTER 16
	86	#define FIXED_REGISTERS \
	87	{ 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1 }
	88	#define CALL_USED_REGISTERS \
	89	{ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
	90
9251aec6	91	#define HARD_REGNO_NREGS(regno, mode) ((void)(regno), (void)(mode), 1)
738f2522 BS	92	#define CANNOT_CHANGE_MODE_CLASS(M1, M2, CLS) ((CLS) == RETURN_REG)
	93	#define HARD_REGNO_MODE_OK(REG, MODE) nvptx_hard_regno_mode_ok (REG, MODE)
	94
	95	/* Register Classes. */
	96
	97	enum reg_class
	98	{
	99	NO_REGS,
	100	RETURN_REG,
	101	ALL_REGS,
	102	LIM_REG_CLASSES
	103	};
	104
	105	#define N_REG_CLASSES (int) LIM_REG_CLASSES
	106
	107	#define REG_CLASS_NAMES { \
	108	"RETURN_REG", \
	109	"NO_REGS", \
	110	"ALL_REGS" }
	111
	112	#define REG_CLASS_CONTENTS \
	113	{ \
	114	/* NO_REGS. */ \
	115	{ 0x0000 }, \
	116	/* RETURN_REG. */ \
	117	{ 0x0008 }, \
	118	/* ALL_REGS. */ \
	119	{ 0xFFFF }, \
	120	}
	121
	122	#define GENERAL_REGS ALL_REGS
	123
	124	#define REGNO_REG_CLASS(R) ((R) == 4 ? RETURN_REG : ALL_REGS)
	125
	126	#define BASE_REG_CLASS ALL_REGS
	127	#define INDEX_REG_CLASS NO_REGS
	128
	129	#define REGNO_OK_FOR_BASE_P(X) true
	130	#define REGNO_OK_FOR_INDEX_P(X) false
	131
	132	#define CLASS_MAX_NREGS(class, mode) \
	133	((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
	134
	135	#define MODES_TIEABLE_P(M1, M2) false
	136
	137	#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
	138	if (GET_MODE_CLASS (MODE) == MODE_INT \
	139	&& GET_MODE_SIZE (MODE) < GET_MODE_SIZE (SImode)) \
	140	{ \
	141	(MODE) = SImode; \
	142	}
	143
738f2522 BS	144	/* Stack and Calling. */
	145
	146	#define STARTING_FRAME_OFFSET 0
	147	#define FRAME_GROWS_DOWNWARD 0
62f9f30b	148	#define STACK_GROWS_DOWNWARD 1
738f2522 BS	149
	150	#define STACK_POINTER_REGNUM 1
	151	#define HARD_FRAME_POINTER_REGNUM 2
738f2522 BS	152	#define NVPTX_RETURN_REGNUM 4
	153	#define FRAME_POINTER_REGNUM 15
	154	#define ARG_POINTER_REGNUM 14
	155	#define RETURN_ADDR_REGNO 13
	156
	157	#define STATIC_CHAIN_REGNUM 12
	158	#define OUTGOING_ARG_POINTER_REGNUM 11
	159	#define OUTGOING_STATIC_CHAIN_REGNUM 10
	160
01be5855	161	#define FIRST_PARM_OFFSET(FNDECL) ((void)(FNDECL), 0)
738f2522	162	#define PUSH_ARGS_REVERSED 1
738f2522 BS	163	#define ACCUMULATE_OUTGOING_ARGS 1
738f2522 BS	164
01be5855 NS	165	/* Avoid using the argument pointer for frame-related things. */
	166	#define FRAME_POINTER_CFA_OFFSET(FNDECL) ((void)(FNDECL), 0)
	167
738f2522 BS	168	#ifdef HOST_WIDE_INT
738f2522 BS	169	struct nvptx_args {
01be5855	170	tree fntype;
738f2522 BS	171	/* Number of arguments passed in registers so far. */
	172	int count;
	173	/* Offset into the stdarg area so far. */
	174	HOST_WIDE_INT off;
	175	};
	176	#endif
	177
	178	#define CUMULATIVE_ARGS struct nvptx_args
	179
	180	#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
01be5855	181	((CUM).fntype = (FNTYPE), (CUM).count = 0, (CUM).off = 0, (void)0)
738f2522 BS	182
	183	#define FUNCTION_ARG_REGNO_P(r) 0
	184
	185	#define DEFAULT_PCC_STRUCT_RETURN 0
	186
	187	#define FUNCTION_PROFILER(file, labelno) \
40fecdd6 JM	188	fatal_error (input_location, \
40fecdd6 JM	189	"profiling is not yet implemented for this architecture")
738f2522 BS	190
	191	#define TRAMPOLINE_SIZE 32
	192	#define TRAMPOLINE_ALIGNMENT 256
	193	\f
	194	/* We don't run reload, so this isn't actually used, but it still needs to be
	195	defined. Showing an argp->fp elimination also stops
	196	expand_builtin_setjmp_receiver from generating invalid insns. */
	197	#define ELIMINABLE_REGS \
	198	{ \
	199	{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
	200	{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} \
	201	}
	202
	203	/* Define the offset between two registers, one to be eliminated, and the other
	204	its replacement, at the start of a routine. */
	205
	206	#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
	207	((OFFSET) = 0)
	208	\f
	209	/* Addressing Modes. */
	210
	211	#define MAX_REGS_PER_ADDRESS 1
	212
	213	#define LEGITIMATE_PIC_OPERAND_P(X) 1
	214	\f
	215
738f2522 BS	216	#if defined HOST_WIDE_INT
	217	struct GTY(()) machine_function
	218	{
	219	rtx_expr_list *call_args;
	220	rtx start_call;
	221	tree funtype;
	222	bool has_call_with_varargs;
	223	bool has_call_with_sc;
738f2522	224	HOST_WIDE_INT outgoing_stdarg_size;
25662751	225	int ret_reg_mode; /* machine_mode not defined yet. */
d88cd9c4	226	rtx axis_predicate[2];
738f2522 BS	227	};
	228	#endif
	229	\f
	230	/* Costs. */
	231
	232	#define NO_FUNCTION_CSE 1
	233	#define SLOW_BYTE_ACCESS 0
	234	#define BRANCH_COST(speed_p, predictable_p) 6
	235	\f
	236	/* Assembler Format. */
	237
	238	#undef ASM_DECLARE_FUNCTION_NAME
	239	#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
	240	nvptx_declare_function_name (FILE, NAME, DECL)
	241
	242	#undef ASM_DECLARE_FUNCTION_SIZE
	243	#define ASM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL) \
	244	nvptx_function_end (STREAM)
	245
	246	#define DWARF2_ASM_LINE_DEBUG_INFO 1
	247
	248	#undef ASM_APP_ON
	249	#define ASM_APP_ON "\t// #APP \n"
	250	#undef ASM_APP_OFF
	251	#define ASM_APP_OFF "\t// #NO_APP \n"
	252
	253	#define ASM_OUTPUT_COMMON(stream, name, size, rounded)
	254	#define ASM_OUTPUT_LOCAL(stream, name, size, rounded)
	255
	256	#define REGISTER_NAMES \
	257	{ \
f313d112	258	"%hr0", "%outargs", "%hfp", "%hr3", "%retval", "%retval_in", "%hr6", "%hr7", \
738f2522 BS	259	"%hr8", "%hr9", "%hr10", "%hr11", "%hr12", "%hr13", "%argp", "%frame" \
	260	}
	261
	262	#define DBX_REGISTER_NUMBER(N) N
	263
	264	#define TEXT_SECTION_ASM_OP ""
	265	#define DATA_SECTION_ASM_OP ""
	266
	267	#undef ASM_GENERATE_INTERNAL_LABEL
	268	#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
	269	do \
	270	{ \
	271	char *__p; \
	272	__p = stpcpy (&(LABEL)[1], PREFIX); \
	273	(LABEL)[0] = '$'; \
	274	sprint_ul (__p, (unsigned long) (NUM)); \
	275	} \
	276	while (0)
	277
e0dd6391 TS	278	#define ASM_OUTPUT_ALIGN(FILE, POWER) \
	279	do \
	280	{ \
	281	(void) (FILE); \
	282	(void) (POWER); \
	283	} \
	284	while (0)
	285
738f2522 BS	286	#define ASM_OUTPUT_SKIP(FILE, N) \
738f2522 BS	287	nvptx_output_skip (FILE, N)
e0dd6391	288
738f2522 BS	289	#undef ASM_OUTPUT_ASCII
	290	#define ASM_OUTPUT_ASCII(FILE, STR, LENGTH) \
	291	nvptx_output_ascii (FILE, STR, LENGTH);
	292
	293	#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
	294	nvptx_declare_object_name (FILE, NAME, DECL)
	295
	296	#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
	297	#define ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	298	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	299
	300	#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
	301	#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) \
69823d76	302	nvptx_output_aligned_decl (FILE, NAME, DECL, SIZE, ALIGN)
738f2522 BS	303
	304	#define CASE_VECTOR_PC_RELATIVE flag_pic
	305	#define JUMP_TABLES_IN_TEXT_SECTION flag_pic
	306
	307	#define ADDR_VEC_ALIGN(VEC) (JUMP_TABLES_IN_TEXT_SECTION ? 5 : 2)
	308
	309	/* Misc. */
	310
c9665100	311	#define DWARF2_LINENO_DEBUGGING_INFO 1
738f2522 BS	312
	313	#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	314	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	315	#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
	316	((VALUE) = GET_MODE_BITSIZE ((MODE)), 2)
	317
0766660b	318	#define SUPPORTS_WEAK 1
738f2522 BS	319	#define NO_DOT_IN_LABEL
	320	#define ASM_COMMENT_START "//"
	321
	322	#define STORE_FLAG_VALUE -1
	323	#define FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF("1.0", (MODE))
	324
	325	#define CASE_VECTOR_MODE SImode
9251aec6	326	#define MOVE_MAX 8
738f2522 BS	327	#define MOVE_RATIO(SPEED) 4
	328	#define TRULY_NOOP_TRUNCATION(outprec, inprec) 1
	329	#define FUNCTION_MODE QImode
	330	#define HAS_INIT_SECTION 1
	331
d94fae04 TS	332	/* The C++ front end insists to link against libstdc++ -- which we don't build.
	333	Tell it to instead link against the innocuous libgcc. */
	334	#define LIBSTDCXX "gcc"
	335
738f2522	336	#endif /* GCC_NVPTX_H */