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eabd3262 | 1 | /* Definitions of target machine for GNU compiler, for the HP Spectrum. |
79873958 | 2 | Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. |
8b109b37 | 3 | Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support |
eabd3262 RK |
4 | and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for |
5 | Software Science at the University of Utah. | |
6 | ||
7 | This file is part of GNU CC. | |
8 | ||
9 | GNU CC is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 1, or (at your option) | |
12 | any later version. | |
13 | ||
14 | GNU CC is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GNU CC; see the file COPYING. If not, write to | |
0e29e3c9 RK |
21 | the Free Software Foundation, 59 Temple Place - Suite 330, |
22 | Boston, MA 02111-1307, USA. */ | |
eabd3262 RK |
23 | |
24 | enum cmp_type /* comparison type */ | |
25 | { | |
26 | CMP_SI, /* compare integers */ | |
27 | CMP_SF, /* compare single precision floats */ | |
28 | CMP_DF, /* compare double precision floats */ | |
29 | CMP_MAX /* max comparison type */ | |
30 | }; | |
31 | ||
279c9bde JL |
32 | /* For long call handling. */ |
33 | extern unsigned int total_code_bytes; | |
34 | ||
c47decad JL |
35 | /* Which processor to schedule for. */ |
36 | ||
37 | enum processor_type | |
38 | { | |
39 | PROCESSOR_700, | |
40 | PROCESSOR_7100, | |
41 | PROCESSOR_7100LC, | |
2da05a5b | 42 | PROCESSOR_7200 |
c47decad JL |
43 | }; |
44 | ||
c47decad JL |
45 | /* For -mschedule= option. */ |
46 | extern char *pa_cpu_string; | |
47 | extern enum processor_type pa_cpu; | |
48 | ||
62d65906 JL |
49 | #define pa_cpu_attr ((enum attr_cpu)pa_cpu) |
50 | ||
51 | /* The 700 can only issue a single insn at a time. | |
52 | The 7XXX processors can issue two insns at a time. */ | |
53 | #define ISSUE_RATE (pa_cpu == PROCESSOR_700 ? 1 : 2) | |
54 | ||
eabd3262 RK |
55 | /* Print subsidiary information on the compiler version in use. */ |
56 | ||
e236a9ff | 57 | #define TARGET_VERSION fputs (" (hppa)", stderr); |
eabd3262 | 58 | |
3f8f5a3f | 59 | /* Run-time compilation parameters selecting different hardware subsets. */ |
eabd3262 RK |
60 | |
61 | extern int target_flags; | |
62 | ||
3f8f5a3f | 63 | /* compile code for HP-PA 1.1 ("Snake") */ |
eabd3262 RK |
64 | |
65 | #define TARGET_SNAKE (target_flags & 1) | |
66 | ||
8c0a7019 JL |
67 | /* Disable all FP registers (they all become fixed). This may be necessary |
68 | for compiling kernels which perform lazy context switching of FP regs. | |
5a1c10de | 69 | Note if you use this option and try to perform floating point operations |
8c0a7019 JL |
70 | the compiler will abort! */ |
71 | ||
72 | #define TARGET_DISABLE_FPREGS (target_flags & 2) | |
73 | ||
105ce113 JL |
74 | /* Generate code which assumes that calls through function pointers will |
75 | never cross a space boundary. Such assumptions are generally safe for | |
76 | building kernels and statically linked executables. Code compiled with | |
77 | this option will fail miserably if the executable is dynamically linked | |
6a73009d JL |
78 | or uses nested functions! |
79 | ||
956d6950 | 80 | This is also used to trigger aggressive unscaled index addressing. */ |
6a73009d | 81 | #define TARGET_NO_SPACE_REGS (target_flags & 4) |
105ce113 | 82 | |
0a1daad4 JL |
83 | /* Allow unconditional jumps in the delay slots of call instructions. */ |
84 | #define TARGET_JUMP_IN_DELAY (target_flags & 8) | |
85 | ||
9e18f575 JL |
86 | /* Optimize for space. Currently this only turns on out of line |
87 | prologues and epilogues. */ | |
88 | #define TARGET_SPACE (target_flags & 16) | |
89 | ||
24c6ab1c | 90 | /* Disable indexed addressing modes. */ |
8c0a7019 JL |
91 | |
92 | #define TARGET_DISABLE_INDEXING (target_flags & 32) | |
93 | ||
2822d96e JL |
94 | /* Emit code which follows the new portable runtime calling conventions |
95 | HP wants everyone to use for ELF objects. If at all possible you want | |
f726ea7d JL |
96 | to avoid this since it's a performance loss for non-prototyped code. |
97 | ||
279c9bde JL |
98 | Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline |
99 | long-call stubs which is quite expensive. */ | |
2822d96e JL |
100 | |
101 | #define TARGET_PORTABLE_RUNTIME (target_flags & 64) | |
102 | ||
c87ba671 JL |
103 | /* Emit directives only understood by GAS. This allows parameter |
104 | relocations to work for static functions. There is no way | |
2822d96e | 105 | to make them work the HP assembler at this time. */ |
c87ba671 JL |
106 | |
107 | #define TARGET_GAS (target_flags & 128) | |
108 | ||
74356a72 TG |
109 | /* Emit code for processors which do not have an FPU. */ |
110 | ||
111 | #define TARGET_SOFT_FLOAT (target_flags & 256) | |
112 | ||
c3d4f633 JL |
113 | /* Use 3-insn load/store sequences for access to large data segments |
114 | in shared libraries on hpux10. */ | |
115 | #define TARGET_LONG_LOAD_STORE (target_flags & 512) | |
116 | ||
3aba034b JL |
117 | /* Use a faster sequence for indirect calls. */ |
118 | #define TARGET_FAST_INDIRECT_CALLS (target_flags & 1024) | |
119 | ||
3e056efc | 120 | /* Generate code with big switch statements to avoid out of range branches |
956d6950 | 121 | occurring within the switch table. */ |
3e056efc JL |
122 | #define TARGET_BIG_SWITCH (target_flags & 2048) |
123 | ||
eabd3262 RK |
124 | /* Macro to define tables used to set the flags. |
125 | This is a list in braces of pairs in braces, | |
126 | each pair being { "NAME", VALUE } | |
127 | where VALUE is the bits to set or minus the bits to clear. | |
128 | An empty string NAME is used to identify the default VALUE. */ | |
129 | ||
130 | #define TARGET_SWITCHES \ | |
0a1daad4 JL |
131 | {{"snake", 1}, \ |
132 | {"nosnake", -1}, \ | |
133 | {"pa-risc-1-0", -1}, \ | |
134 | {"pa-risc-1-1", 1}, \ | |
135 | {"disable-fpregs", 2}, \ | |
a01408ab | 136 | {"no-disable-fpregs", -2}, \ |
6a73009d | 137 | {"no-space-regs", 4}, \ |
9e18f575 | 138 | {"space-regs", -4}, \ |
0a1daad4 JL |
139 | {"jump-in-delay", 8}, \ |
140 | {"no-jump-in-delay", -8}, \ | |
9e18f575 JL |
141 | {"space", 16}, \ |
142 | {"no-space", -16}, \ | |
0a1daad4 JL |
143 | {"disable-indexing", 32}, \ |
144 | {"no-disable-indexing", -32},\ | |
6a73009d JL |
145 | {"portable-runtime", 64}, \ |
146 | {"no-portable-runtime", -64},\ | |
c87ba671 JL |
147 | {"gas", 128}, \ |
148 | {"no-gas", -128}, \ | |
74356a72 TG |
149 | {"soft-float", 256}, \ |
150 | {"no-soft-float", -256}, \ | |
c3d4f633 JL |
151 | {"long-load-store", 512}, \ |
152 | {"no-long-load-store", -512},\ | |
3aba034b JL |
153 | {"fast-indirect-calls", 1024},\ |
154 | {"no-fast-indirect-calls", -1024},\ | |
3e056efc JL |
155 | {"big-switch", 2048}, \ |
156 | {"no-big-switch", -2048}, \ | |
ad238e4b | 157 | {"linker-opt", 0}, \ |
b34ec578 | 158 | { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}} |
eabd3262 | 159 | |
233c0fef | 160 | #ifndef TARGET_DEFAULT |
cf462715 | 161 | #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */ |
233c0fef TG |
162 | #endif |
163 | ||
b34ec578 RK |
164 | #ifndef TARGET_CPU_DEFAULT |
165 | #define TARGET_CPU_DEFAULT 0 | |
166 | #endif | |
167 | ||
c47decad JL |
168 | #define TARGET_OPTIONS \ |
169 | { \ | |
170 | { "schedule=", &pa_cpu_string }\ | |
171 | } | |
172 | ||
173 | #define OVERRIDE_OPTIONS override_options () | |
174 | ||
233c0fef | 175 | #define DBX_DEBUGGING_INFO |
794b7f56 | 176 | #define DEFAULT_GDB_EXTENSIONS 1 |
233c0fef | 177 | |
75600ead | 178 | /* This is the way other stabs-in-XXX tools do things. We will be |
ddd5a7c1 | 179 | compatible. */ |
75600ead JL |
180 | #define DBX_BLOCKS_FUNCTION_RELATIVE 1 |
181 | ||
a40ed31b | 182 | /* Likewise for linenos. |
abb6b720 JL |
183 | |
184 | We make the first line stab special to avoid adding several | |
185 | gross hacks to GAS. */ | |
75600ead JL |
186 | #undef ASM_OUTPUT_SOURCE_LINE |
187 | #define ASM_OUTPUT_SOURCE_LINE(file, line) \ | |
188 | { static int sym_lineno = 1; \ | |
abb6b720 JL |
189 | static tree last_function_decl = NULL; \ |
190 | if (current_function_decl == last_function_decl) \ | |
191 | fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \ | |
192 | line, sym_lineno, \ | |
193 | XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \ | |
194 | sym_lineno); \ | |
195 | else \ | |
196 | fprintf (file, "\t.stabn 68,0,%d,0\n", line); \ | |
197 | last_function_decl = current_function_decl; \ | |
75600ead JL |
198 | sym_lineno += 1; } |
199 | ||
200 | /* But, to make this work, we have to output the stabs for the function | |
201 | name *first*... */ | |
202 | #define DBX_FUNCTION_FIRST | |
203 | ||
ddd5a7c1 | 204 | /* Only labels should ever begin in column zero. */ |
bb2049d1 RK |
205 | #define ASM_STABS_OP "\t.stabs" |
206 | #define ASM_STABN_OP "\t.stabn" | |
207 | ||
2e7e7121 JL |
208 | /* GDB always assumes the current function's frame begins at the value |
209 | of the stack pointer upon entry to the current function. Accessing | |
6a5c0a8e JL |
210 | local variables and parameters passed on the stack is done using the |
211 | base of the frame + an offset provided by GCC. | |
2e7e7121 JL |
212 | |
213 | For functions which have frame pointers this method works fine; | |
214 | the (frame pointer) == (stack pointer at function entry) and GCC provides | |
215 | an offset relative to the frame pointer. | |
216 | ||
217 | This loses for functions without a frame pointer; GCC provides an offset | |
218 | which is relative to the stack pointer after adjusting for the function's | |
219 | frame size. GDB would prefer the offset to be relative to the value of | |
220 | the stack pointer at the function's entry. Yuk! */ | |
221 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
222 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ | |
223 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
224 | ||
6a5c0a8e JL |
225 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ |
226 | ((GET_CODE (X) == PLUS ? OFFSET : 0) \ | |
227 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
228 | ||
ba25ac36 JL |
229 | /* gdb needs a null N_SO at the end of each file for scattered loading. */ |
230 | ||
231 | #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END | |
ad238e4b | 232 | #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \ |
18a686c0 | 233 | text_section (); \ |
ad238e4b | 234 | if (!TARGET_PORTABLE_RUNTIME) \ |
2ac42d3a | 235 | fputs ("\t.SPACE $TEXT$\n\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \ |
ad238e4b JL |
236 | else \ |
237 | fprintf (FILE, "%s\n", TEXT_SECTION_ASM_OP); \ | |
ba25ac36 | 238 | fprintf (FILE, \ |
ad238e4b | 239 | "\t.stabs \"\",%d,0,0,L$text_end0000\nL$text_end0000:\n", N_SO) |
ba25ac36 | 240 | |
b34ec578 | 241 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & 1) == 0 |
233c0fef | 242 | #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\ |
ad238e4b | 243 | %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\ |
154bba13 TT |
244 | %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}\ |
245 | %{threads:-D_REENTRANT -D_DCE_THREADS}" | |
233c0fef | 246 | #else |
154bba13 TT |
247 | #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}} \ |
248 | %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}\ | |
249 | %{threads:-D_REENTRANT -D_DCE_THREADS}" | |
233c0fef TG |
250 | #endif |
251 | ||
252 | /* Defines for a K&R CC */ | |
253 | ||
233c0fef | 254 | #define CC1_SPEC "%{pg:} %{p:}" |
5a1c10de | 255 | |
ad238e4b | 256 | #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" |
233c0fef | 257 | |
0fffa5e1 RK |
258 | /* We don't want -lg. */ |
259 | #ifndef LIB_SPEC | |
260 | #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
261 | #endif | |
262 | ||
233c0fef TG |
263 | /* Make gcc agree with <machine/ansi.h> */ |
264 | ||
265 | #define SIZE_TYPE "unsigned int" | |
266 | #define PTRDIFF_TYPE "int" | |
3c9a7b64 JL |
267 | #define WCHAR_TYPE "unsigned int" |
268 | #define WCHAR_TYPE_SIZE 32 | |
233c0fef | 269 | |
4f074454 RK |
270 | /* Show we can debug even without a frame pointer. */ |
271 | #define CAN_DEBUG_WITHOUT_FP | |
233c0fef | 272 | |
746a9efa JL |
273 | /* Machine dependent reorg pass. */ |
274 | #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X) | |
275 | ||
51723711 KG |
276 | /* Prototype function used in MACHINE_DEPENDENT_REORG macro. */ |
277 | void pa_reorg (); | |
278 | ||
279 | /* Prototype function used in various macros. */ | |
280 | int symbolic_operand (); | |
281 | ||
282 | /* Used in insn-*.c. */ | |
283 | int following_call (); | |
284 | int function_label_operand (); | |
285 | int lhs_lshift_cint_operand (); | |
286 | ||
233c0fef TG |
287 | /* Names to predefine in the preprocessor for this target machine. */ |
288 | ||
ad238e4b | 289 | #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)" |
68d69835 JM |
290 | |
291 | /* HPUX has a program 'chatr' to list the dependencies of dynamically | |
292 | linked executables and shared libraries. */ | |
293 | #define LDD_SUFFIX "chatr" | |
1b48da0d | 294 | /* Look for lines like "dynamic /usr/lib/X11R5/libX11.sl" |
2e91542a JL |
295 | or "static /usr/lib/X11R5/libX11.sl". |
296 | ||
297 | HPUX 10.20 also has lines like "static branch prediction ..." | |
956d6950 | 298 | so we filter that out explicitly. |
2e91542a JL |
299 | |
300 | We also try to bound our search for libraries with marker | |
301 | lines. What a pain. */ | |
68d69835 JM |
302 | #define PARSE_LDD_OUTPUT(PTR) \ |
303 | do { \ | |
2e91542a | 304 | static int in_shlib_list = 0; \ |
68d69835 | 305 | while (*PTR == ' ') PTR++; \ |
2e91542a JL |
306 | if (strncmp (PTR, "shared library list:", \ |
307 | sizeof ("shared library list:") - 1) == 0) \ | |
308 | { \ | |
309 | PTR = 0; \ | |
310 | in_shlib_list = 1; \ | |
311 | } \ | |
312 | else if (strncmp (PTR, "shared library binding:", \ | |
313 | sizeof ("shared library binding:") - 1) == 0)\ | |
314 | { \ | |
315 | PTR = 0; \ | |
316 | in_shlib_list = 0; \ | |
317 | } \ | |
318 | else if (strncmp (PTR, "static branch prediction disabled", \ | |
319 | sizeof ("static branch prediction disabled") - 1) == 0)\ | |
320 | { \ | |
321 | PTR = 0; \ | |
322 | in_shlib_list = 0; \ | |
323 | } \ | |
324 | else if (in_shlib_list \ | |
325 | && strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \ | |
68d69835 JM |
326 | { \ |
327 | PTR += sizeof ("dynamic") - 1; \ | |
328 | while (*p == ' ') PTR++; \ | |
329 | } \ | |
2e91542a JL |
330 | else if (in_shlib_list \ |
331 | && strncmp (PTR, "static", sizeof ("static") - 1) == 0) \ | |
1b48da0d JL |
332 | { \ |
333 | PTR += sizeof ("static") - 1; \ | |
334 | while (*p == ' ') PTR++; \ | |
335 | } \ | |
68d69835 JM |
336 | else \ |
337 | PTR = 0; \ | |
338 | } while (0) | |
eabd3262 RK |
339 | \f |
340 | /* target machine storage layout */ | |
341 | ||
74356a72 | 342 | /* Define for cross-compilation from a host with a different float format |
ddd5a7c1 | 343 | or endianness (e.g. VAX, x86). */ |
74356a72 TG |
344 | #define REAL_ARITHMETIC |
345 | ||
9f9fba36 TG |
346 | /* Define this macro if it is advisable to hold scalars in registers |
347 | in a wider mode than that declared by the program. In such cases, | |
348 | the value is constrained to be within the bounds of the declared | |
349 | type, but kept valid in the wider mode. The signedness of the | |
350 | extension may differ from that of the type. */ | |
351 | ||
352 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
353 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
354 | && GET_MODE_SIZE (MODE) < 4) \ | |
355 | (MODE) = SImode; | |
356 | ||
eabd3262 RK |
357 | /* Define this if most significant bit is lowest numbered |
358 | in instructions that operate on numbered bit-fields. */ | |
359 | #define BITS_BIG_ENDIAN 1 | |
360 | ||
361 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
23643037 | 362 | /* That is true on the HP-PA. */ |
eabd3262 RK |
363 | #define BYTES_BIG_ENDIAN 1 |
364 | ||
365 | /* Define this if most significant word of a multiword number is lowest | |
366 | numbered. */ | |
eabd3262 RK |
367 | #define WORDS_BIG_ENDIAN 1 |
368 | ||
369 | /* number of bits in an addressable storage unit */ | |
370 | #define BITS_PER_UNIT 8 | |
371 | ||
372 | /* Width in bits of a "word", which is the contents of a machine register. | |
373 | Note that this is not necessarily the width of data type `int'; | |
374 | if using 16-bit ints on a 68000, this would still be 32. | |
375 | But on a machine with 16-bit registers, this would be 16. */ | |
376 | #define BITS_PER_WORD 32 | |
377 | ||
378 | /* Width of a word, in units (bytes). */ | |
379 | #define UNITS_PER_WORD 4 | |
380 | ||
381 | /* Width in bits of a pointer. | |
382 | See also the macro `Pmode' defined below. */ | |
383 | #define POINTER_SIZE 32 | |
384 | ||
385 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
386 | #define PARM_BOUNDARY 32 | |
387 | ||
388 | /* Largest alignment required for any stack parameter, in bits. | |
389 | Don't define this if it is equal to PARM_BOUNDARY */ | |
390 | #define MAX_PARM_BOUNDARY 64 | |
391 | ||
981e5cd9 JL |
392 | /* Boundary (in *bits*) on which stack pointer is always aligned; |
393 | certain optimizations in combine depend on this. | |
394 | ||
395 | GCC for the PA always rounds its stacks to a 512bit boundary, | |
396 | but that happens late in the compilation process. */ | |
397 | #define STACK_BOUNDARY 64 | |
eabd3262 RK |
398 | |
399 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
400 | #define FUNCTION_BOUNDARY 32 | |
401 | ||
402 | /* Alignment of field after `int : 0' in a structure. */ | |
403 | #define EMPTY_FIELD_BOUNDARY 32 | |
404 | ||
405 | /* Every structure's size must be a multiple of this. */ | |
406 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
407 | ||
408 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
409 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
410 | ||
411 | /* No data type wants to be aligned rounder than this. */ | |
412 | #define BIGGEST_ALIGNMENT 64 | |
413 | ||
a27d3fef JL |
414 | /* The .align directive in the HP assembler allows up to a 32 alignment. */ |
415 | #define MAX_OFILE_ALIGNMENT 32768 | |
416 | ||
eabd3262 RK |
417 | /* Get around hp-ux assembler bug, and make strcpy of constants fast. */ |
418 | #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \ | |
419 | ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN)) | |
420 | ||
421 | /* Make arrays of chars word-aligned for the same reasons. */ | |
422 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
423 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
424 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
425 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
426 | ||
427 | ||
428 | /* Set this nonzero if move instructions will actually fail to work | |
429 | when given unaligned data. */ | |
430 | #define STRICT_ALIGNMENT 1 | |
431 | ||
432 | /* Generate calls to memcpy, memcmp and memset. */ | |
433 | #define TARGET_MEM_FUNCTIONS | |
434 | \f | |
435 | /* Standard register usage. */ | |
436 | ||
437 | /* Number of actual hardware registers. | |
438 | The hardware registers are assigned numbers for the compiler | |
439 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
440 | All registers that the compiler knows about must be given numbers, | |
441 | even those that are not normally considered general registers. | |
442 | ||
3f8f5a3f | 443 | HP-PA 1.0 has 32 fullword registers and 16 floating point |
eabd3262 RK |
444 | registers. The floating point registers hold either word or double |
445 | word values. | |
5a1c10de | 446 | |
eabd3262 | 447 | 16 additional registers are reserved. |
5a1c10de | 448 | |
3f8f5a3f | 449 | HP-PA 1.1 has 32 fullword registers and 32 floating point |
eabd3262 RK |
450 | registers. However, the floating point registers behave |
451 | differently: the left and right halves of registers are addressable | |
452 | as 32 bit registers. So, we will set things up like the 68k which | |
453 | has different fp units: define separate register sets for the 1.0 | |
454 | and 1.1 fp units. */ | |
455 | ||
a40ed31b TG |
456 | #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs + |
457 | + 1 shift reg */ | |
eabd3262 RK |
458 | |
459 | /* 1 for registers that have pervasive standard uses | |
460 | and are not available for the register allocator. | |
461 | ||
3f8f5a3f | 462 | On the HP-PA, these are: |
eabd3262 RK |
463 | Reg 0 = 0 (hardware). However, 0 is used for condition code, |
464 | so is not fixed. | |
465 | Reg 1 = ADDIL target/Temporary (hardware). | |
466 | Reg 2 = Return Pointer | |
75600ead JL |
467 | Reg 3 = Frame Pointer |
468 | Reg 4 = Frame Pointer (>8k varying frame with HP compilers only) | |
469 | Reg 4-18 = Preserved Registers | |
d2a94ec0 TM |
470 | Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme. |
471 | Reg 20-22 = Temporary Registers | |
eabd3262 RK |
472 | Reg 23-26 = Temporary/Parameter Registers |
473 | Reg 27 = Global Data Pointer (hp) | |
474 | Reg 28 = Temporary/???/Return Value register | |
451d86c2 | 475 | Reg 29 = Temporary/Static Chain/Return Value register #2 |
eabd3262 RK |
476 | Reg 30 = stack pointer |
477 | Reg 31 = Temporary/Millicode Return Pointer (hp) | |
478 | ||
c2ae03cb | 479 | Freg 0-3 = Status Registers -- Not known to the compiler. |
eabd3262 RK |
480 | Freg 4-7 = Arguments/Return Value |
481 | Freg 8-11 = Temporary Registers | |
482 | Freg 12-15 = Preserved Registers | |
483 | ||
484 | Freg 16-31 = Reserved | |
485 | ||
486 | On the Snake, fp regs are | |
487 | ||
c2ae03cb | 488 | Freg 0-3 = Status Registers -- Not known to the compiler. |
eabd3262 RK |
489 | Freg 4L-7R = Arguments/Return Value |
490 | Freg 8L-11R = Temporary Registers | |
c2ae03cb JL |
491 | Freg 12L-21R = Preserved Registers |
492 | Freg 22L-31R = Temporary Registers | |
eabd3262 RK |
493 | |
494 | */ | |
495 | ||
496 | #define FIXED_REGISTERS \ | |
527986c9 | 497 | {0, 0, 0, 0, 0, 0, 0, 0, \ |
eabd3262 RK |
498 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
499 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
d39b6854 | 500 | 0, 0, 0, 1, 0, 0, 1, 0, \ |
a40ed31b | 501 | /* fp registers */ \ |
eabd3262 RK |
502 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
503 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
504 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
505 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
506 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
507 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
508 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
e061ef25 | 509 | 0} |
eabd3262 RK |
510 | |
511 | /* 1 for registers not available across function calls. | |
512 | These must include the FIXED_REGISTERS and also any | |
513 | registers that can be used without being saved. | |
514 | The latter must include the registers where values are returned | |
515 | and the register where structure-value addresses are passed. | |
516 | Aside from that, you can include as many other registers as you like. */ | |
517 | #define CALL_USED_REGISTERS \ | |
527986c9 | 518 | {1, 1, 1, 0, 0, 0, 0, 0, \ |
eabd3262 RK |
519 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
520 | 0, 0, 0, 1, 1, 1, 1, 1, \ | |
521 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
a40ed31b | 522 | /* fp registers */ \ |
eabd3262 RK |
523 | 1, 1, 1, 1, 1, 1, 1, 1, \ |
524 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
eabd3262 RK |
525 | 0, 0, 0, 0, 0, 0, 0, 0, \ |
526 | 0, 0, 0, 0, 0, 0, 0, 0, \ | |
527 | 0, 0, 0, 0, 1, 1, 1, 1, \ | |
528 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
529 | 1, 1, 1, 1, 1, 1, 1, 1, \ | |
5a1c10de | 530 | 1} |
eabd3262 | 531 | |
eabd3262 RK |
532 | #define CONDITIONAL_REGISTER_USAGE \ |
533 | { \ | |
5345f91a TG |
534 | if (!TARGET_SNAKE) \ |
535 | { \ | |
536 | for (i = 56; i < 88; i++) \ | |
537 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
538 | for (i = 33; i < 88; i += 2) \ | |
539 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
540 | } \ | |
859d9ce4 | 541 | if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\ |
5345f91a TG |
542 | { \ |
543 | for (i = 32; i < 88; i++) \ | |
544 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
545 | } \ | |
8381cd4c | 546 | if (flag_pic) \ |
71fce386 RK |
547 | { \ |
548 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
549 | fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\ | |
550 | } \ | |
eabd3262 RK |
551 | } |
552 | ||
a40ed31b | 553 | /* Allocate the call used registers first. This should minimize |
eabd3262 RK |
554 | the number of registers that need to be saved (as call used |
555 | registers will generally not be allocated across a call). | |
556 | ||
c2ae03cb JL |
557 | Experimentation has shown slightly better results by allocating |
558 | FP registers first. */ | |
eabd3262 RK |
559 | |
560 | #define REG_ALLOC_ORDER \ | |
a40ed31b TG |
561 | { \ |
562 | /* caller-saved fp regs. */ \ | |
a40ed31b TG |
563 | 68, 69, 70, 71, 72, 73, 74, 75, \ |
564 | 76, 77, 78, 79, 80, 81, 82, 83, \ | |
565 | 84, 85, 86, 87, \ | |
98d654f6 | 566 | 40, 41, 42, 43, 44, 45, 46, 47, \ |
a40ed31b | 567 | 32, 33, 34, 35, 36, 37, 38, 39, \ |
c2ae03cb JL |
568 | /* caller-saved general regs. */ \ |
569 | 19, 20, 21, 22, 23, 24, 25, 26, \ | |
570 | 27, 28, 29, 31, 2, \ | |
a40ed31b TG |
571 | /* callee-saved fp regs. */ \ |
572 | 48, 49, 50, 51, 52, 53, 54, 55, \ | |
573 | 56, 57, 58, 59, 60, 61, 62, 63, \ | |
574 | 64, 65, 66, 67, \ | |
c2ae03cb | 575 | /* callee-saved general regs. */ \ |
527986c9 JL |
576 | 3, 4, 5, 6, 7, 8, 9, 10, \ |
577 | 11, 12, 13, 14, 15, 16, 17, 18, \ | |
c2ae03cb | 578 | /* special registers. */ \ |
a40ed31b | 579 | 1, 30, 0, 88} |
eabd3262 RK |
580 | |
581 | ||
5345f91a TG |
582 | /* True if register is floating-point. */ |
583 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87) | |
584 | ||
eabd3262 RK |
585 | /* Return number of consecutive hard regs needed starting at reg REGNO |
586 | to hold something of mode MODE. | |
587 | This is ordinarily the length in words of a value of mode MODE | |
588 | but can be less for certain modes in special long registers. | |
589 | ||
3f8f5a3f | 590 | On the HP-PA, ordinary registers hold 32 bits worth; |
eabd3262 RK |
591 | The floating point registers are 64 bits wide. Snake fp regs are 32 |
592 | bits wide */ | |
5345f91a TG |
593 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
594 | (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \ | |
595 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
eabd3262 RK |
596 | |
597 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
3f8f5a3f | 598 | On the HP-PA, the cpu registers can hold any mode. We |
eabd3262 | 599 | force this to be an even register is it cannot hold the full mode. */ |
d2a94ec0 TM |
600 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
601 | ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \ | |
5345f91a TG |
602 | /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \ |
603 | : !TARGET_SNAKE && FP_REGNO_P (REGNO) \ | |
604 | ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
605 | /* Make wide modes be in aligned registers. */ \ | |
a40ed31b | 606 | : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0) |
eabd3262 RK |
607 | |
608 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
609 | when one has mode MODE1 and one has mode MODE2. | |
610 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
611 | for any hard reg, then this must be 0 for correct output. */ | |
612 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
3518f904 | 613 | (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) |
eabd3262 RK |
614 | |
615 | /* Specify the registers used for certain standard purposes. | |
616 | The values of these macros are register numbers. */ | |
617 | ||
3f8f5a3f | 618 | /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ |
eabd3262 RK |
619 | /* #define PC_REGNUM */ |
620 | ||
621 | /* Register to use for pushing function arguments. */ | |
622 | #define STACK_POINTER_REGNUM 30 | |
623 | ||
624 | /* Base register for access to local variables of the function. */ | |
75600ead | 625 | #define FRAME_POINTER_REGNUM 3 |
eabd3262 | 626 | |
e63ffc38 | 627 | /* Value should be nonzero if functions must have frame pointers. */ |
9e18f575 | 628 | #define FRAME_POINTER_REQUIRED \ |
e63ffc38 | 629 | (current_function_calls_alloca) |
eabd3262 RK |
630 | |
631 | /* C statement to store the difference between the frame pointer | |
632 | and the stack pointer values immediately after the function prologue. | |
633 | ||
634 | Note, we always pretend that this is a leaf function because if | |
635 | it's not, there's no point in trying to eliminate the | |
636 | frame pointer. If it is a leaf function, we guessed right! */ | |
637 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
86daf4a6 | 638 | do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0) |
eabd3262 RK |
639 | |
640 | /* Base register for access to arguments of the function. */ | |
75600ead | 641 | #define ARG_POINTER_REGNUM 3 |
eabd3262 RK |
642 | |
643 | /* Register in which static-chain is passed to a function. */ | |
644 | /* ??? */ | |
645 | #define STATIC_CHAIN_REGNUM 29 | |
646 | ||
647 | /* Register which holds offset table for position-independent | |
648 | data references. */ | |
649 | ||
d2a94ec0 | 650 | #define PIC_OFFSET_TABLE_REGNUM 19 |
6bb36601 | 651 | #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 |
eabd3262 | 652 | |
71fce386 RK |
653 | /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it |
654 | can be restore across function calls. */ | |
655 | #define PIC_OFFSET_TABLE_REGNUM_SAVED 4 | |
eabd3262 | 656 | |
11734ce8 | 657 | /* SOM ABI says that objects larger than 64 bits are returned in memory. */ |
451d86c2 | 658 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
11734ce8 | 659 | #define RETURN_IN_MEMORY(TYPE) \ |
0821c881 | 660 | (int_size_in_bytes (TYPE) > 8) |
11734ce8 | 661 | |
eabd3262 RK |
662 | /* Register in which address to store a structure value |
663 | is passed to a function. */ | |
664 | #define STRUCT_VALUE_REGNUM 28 | |
665 | \f | |
666 | /* Define the classes of registers for register constraints in the | |
667 | machine description. Also define ranges of constants. | |
668 | ||
669 | One of the classes must always be named ALL_REGS and include all hard regs. | |
670 | If there is more than one class, another class must be named NO_REGS | |
671 | and contain no registers. | |
672 | ||
673 | The name GENERAL_REGS must be the name of a class (or an alias for | |
674 | another name such as ALL_REGS). This is the class of registers | |
675 | that is allowed by "g" or "r" in a register constraint. | |
676 | Also, registers outside this class are allocated only when | |
677 | instructions express preferences for them. | |
678 | ||
679 | The classes must be numbered in nondecreasing order; that is, | |
680 | a larger-numbered class must never be contained completely | |
681 | in a smaller-numbered class. | |
682 | ||
683 | For any two classes, it is very desirable that there be another | |
684 | class that represents their union. */ | |
685 | ||
3f8f5a3f | 686 | /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs, |
eabd3262 | 687 | 1.1 fp regs, and the high 1.1 fp regs, to which the operands of |
a40ed31b | 688 | fmpyadd and fmpysub are restricted. */ |
eabd3262 | 689 | |
a9d91d6f | 690 | enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS, |
5345f91a | 691 | SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES}; |
eabd3262 RK |
692 | |
693 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
694 | ||
695 | /* Give names of register classes as strings for dump file. */ | |
696 | ||
697 | #define REG_CLASS_NAMES \ | |
a40ed31b | 698 | {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \ |
5345f91a | 699 | "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"} |
eabd3262 RK |
700 | |
701 | /* Define which registers fit in which classes. | |
702 | This is an initializer for a vector of HARD_REG_SET | |
703 | of length N_REG_CLASSES. Register 0, the "condition code" register, | |
704 | is in no class. */ | |
705 | ||
706 | #define REG_CLASS_CONTENTS \ | |
a40ed31b TG |
707 | {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \ |
708 | {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \ | |
709 | {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \ | |
5345f91a TG |
710 | {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \ |
711 | {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \ | |
a40ed31b TG |
712 | {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \ |
713 | {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */ | |
eabd3262 RK |
714 | |
715 | /* The same information, inverted: | |
716 | Return the class number of the smallest class containing | |
717 | reg number REGNO. This could be a conditional expression | |
718 | or could index an array. */ | |
719 | ||
a40ed31b TG |
720 | #define REGNO_REG_CLASS(REGNO) \ |
721 | ((REGNO) == 0 ? NO_REGS \ | |
722 | : (REGNO) == 1 ? R1_REGS \ | |
723 | : (REGNO) < 32 ? GENERAL_REGS \ | |
5345f91a | 724 | : (REGNO) < 88 ? FP_REGS \ |
eabd3262 RK |
725 | : SHIFT_REGS) |
726 | ||
727 | /* The class value for index registers, and the one for base regs. */ | |
728 | #define INDEX_REG_CLASS GENERAL_REGS | |
729 | #define BASE_REG_CLASS GENERAL_REGS | |
730 | ||
5de7c240 | 731 | #define FP_REG_CLASS_P(CLASS) \ |
5345f91a | 732 | ((CLASS) == FP_REGS) |
eabd3262 | 733 | |
5345f91a TG |
734 | /* Get reg_class from a letter such as appears in the machine description. */ |
735 | /* Keep 'x' for backward compatibility with user asm. */ | |
eabd3262 | 736 | #define REG_CLASS_FROM_LETTER(C) \ |
5345f91a TG |
737 | ((C) == 'f' ? FP_REGS : \ |
738 | (C) == 'x' ? FP_REGS : \ | |
a40ed31b TG |
739 | (C) == 'q' ? SHIFT_REGS : \ |
740 | (C) == 'a' ? R1_REGS : \ | |
a40ed31b | 741 | (C) == 'Z' ? ALL_REGS : NO_REGS) |
eabd3262 RK |
742 | |
743 | /* The letters I, J, K, L and M in a register constraint string | |
744 | can be used to stand for particular ranges of immediate operands. | |
745 | This macro defines what the ranges are. | |
746 | C is the letter, and VALUE is a constant value. | |
747 | Return 1 if VALUE is in the range specified by C. | |
748 | ||
eabd3262 RK |
749 | `I' is used for the 11 bit constants. |
750 | `J' is used for the 14 bit constants. | |
7e8b33d9 | 751 | `K' is used for values that can be moved with a zdepi insn. |
eabd3262 | 752 | `L' is used for the 5 bit constants. |
7e8b33d9 TG |
753 | `M' is used for 0. |
754 | `N' is used for values with the least significant 11 bits equal to zero. | |
755 | `O' is used for numbers n such that n+1 is a power of 2. | |
756 | */ | |
eabd3262 RK |
757 | |
758 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
7e8b33d9 TG |
759 | ((C) == 'I' ? VAL_11_BITS_P (VALUE) \ |
760 | : (C) == 'J' ? VAL_14_BITS_P (VALUE) \ | |
761 | : (C) == 'K' ? zdepi_cint_p (VALUE) \ | |
762 | : (C) == 'L' ? VAL_5_BITS_P (VALUE) \ | |
eabd3262 | 763 | : (C) == 'M' ? (VALUE) == 0 \ |
7e8b33d9 | 764 | : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \ |
7254dbd4 | 765 | : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \ |
7e8b33d9 | 766 | : (C) == 'P' ? and_mask_p (VALUE) \ |
eabd3262 RK |
767 | : 0) |
768 | ||
51723711 KG |
769 | /* Prototype function used in macro CONST_OK_FOR_LETTER_P. */ |
770 | int zdepi_cint_p (); | |
771 | ||
af69aabb JL |
772 | /* Similar, but for floating or large integer constants, and defining letters |
773 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
eabd3262 | 774 | |
af69aabb JL |
775 | For PA, `G' is the floating-point constant zero. `H' is undefined. */ |
776 | ||
777 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
778 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
779 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ | |
780 | : 0) | |
eabd3262 RK |
781 | |
782 | /* Given an rtx X being reloaded into a reg required to be | |
783 | in class CLASS, return the class of reg to actually use. | |
784 | In general this is just CLASS; but on some machines | |
785 | in some cases it is preferable to use a more restrictive class. */ | |
786 | #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
787 | ||
788 | /* Return the register class of a scratch register needed to copy IN into | |
e236a9ff JL |
789 | or out of a register in CLASS in MODE. If it can be done directly |
790 | NO_REGS is returned. | |
791 | ||
792 | Avoid doing any work for the common case calls. */ | |
eabd3262 RK |
793 | |
794 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
e236a9ff JL |
795 | ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \ |
796 | && REGNO (IN) < FIRST_PSEUDO_REGISTER) \ | |
797 | ? NO_REGS : secondary_reload_class (CLASS, MODE, IN)) | |
eabd3262 | 798 | |
5a1c10de | 799 | /* On the PA it is not possible to directly move data between |
6b0ae684 JL |
800 | GENERAL_REGS and FP_REGS. */ |
801 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | |
a40ed31b | 802 | (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)) |
6b0ae684 JL |
803 | |
804 | /* Return the stack location to use for secondary memory needed reloads. */ | |
805 | #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ | |
806 | gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16))) | |
807 | ||
eabd3262 RK |
808 | /* Return the maximum number of consecutive registers |
809 | needed to represent mode MODE in a register of class CLASS. */ | |
5345f91a TG |
810 | #define CLASS_MAX_NREGS(CLASS, MODE) \ |
811 | (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \ | |
812 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
39dfb55a JL |
813 | |
814 | /* We do not want to record equivalences for expressions which are | |
815 | likely to cause a spill of %r1 if they are used by reload. | |
816 | ||
817 | Nor do we want to record an equivalence of a constant expression | |
818 | that the target can not handle appearing in an insn, but which | |
819 | also must be accepted by LEGITIMATE_CONSTANT_P. | |
820 | ||
821 | On the PA, these two goals are the same -- don't record any equivalences | |
822 | for symbolic operands that are not read_only_operands. */ | |
823 | #define DONT_RECORD_EQUIVALENCE(NOTE) \ | |
824 | (symbolic_operand (XEXP (NOTE, 0), VOIDmode) \ | |
825 | && !read_only_operand (XEXP (NOTE, 0), VOIDmode)) | |
826 | ||
eabd3262 RK |
827 | \f |
828 | /* Stack layout; function entry, exit and calling. */ | |
829 | ||
830 | /* Define this if pushing a word on the stack | |
831 | makes the stack pointer a smaller address. */ | |
832 | /* #define STACK_GROWS_DOWNWARD */ | |
833 | ||
834 | /* Believe it or not. */ | |
835 | #define ARGS_GROW_DOWNWARD | |
836 | ||
837 | /* Define this if the nominal address of the stack frame | |
838 | is at the high-address end of the local variables; | |
839 | that is, each additional local variable allocated | |
840 | goes at a more negative offset in the frame. */ | |
841 | /* #define FRAME_GROWS_DOWNWARD */ | |
842 | ||
843 | /* Offset within stack frame to start allocating local variables at. | |
844 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
845 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
846 | of the first local allocated. */ | |
847 | #define STARTING_FRAME_OFFSET 8 | |
848 | ||
849 | /* If we generate an insn to push BYTES bytes, | |
850 | this says how many the stack pointer really advances by. | |
3f8f5a3f | 851 | On the HP-PA, don't define this because there are no push insns. */ |
eabd3262 RK |
852 | /* #define PUSH_ROUNDING(BYTES) */ |
853 | ||
854 | /* Offset of first parameter from the argument pointer register value. | |
855 | This value will be negated because the arguments grow down. | |
856 | Also note that on STACK_GROWS_UPWARD machines (such as this one) | |
857 | this is the distance from the frame pointer to the end of the first | |
858 | argument, not it's beginning. To get the real offset of the first | |
859 | argument, the size of the argument must be added. | |
860 | ||
861 | ??? Have to check on this.*/ | |
862 | ||
5a1c10de | 863 | #define FIRST_PARM_OFFSET(FNDECL) -32 |
eabd3262 RK |
864 | |
865 | /* Absolute value of offset from top-of-stack address to location to store the | |
866 | function parameter if it can't go in a register. | |
867 | Addresses for following parameters are computed relative to this one. */ | |
5a1c10de | 868 | #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32 |
eabd3262 RK |
869 | |
870 | ||
871 | /* When a parameter is passed in a register, stack space is still | |
872 | allocated for it. */ | |
873 | #define REG_PARM_STACK_SPACE(DECL) 16 | |
874 | ||
875 | /* Define this if the above stack space is to be considered part of the | |
876 | space allocated by the caller. */ | |
877 | #define OUTGOING_REG_PARM_STACK_SPACE | |
878 | ||
879 | /* Keep the stack pointer constant throughout the function. | |
880 | This is both an optimization and a necessity: longjmp | |
881 | doesn't behave itself when the stack pointer moves within | |
882 | the function! */ | |
883 | #define ACCUMULATE_OUTGOING_ARGS | |
5a1c10de TG |
884 | |
885 | /* The weird HPPA calling conventions require a minimum of 48 bytes on | |
eabd3262 RK |
886 | the stack: 16 bytes for register saves, and 32 bytes for magic. |
887 | This is the difference between the logical top of stack and the | |
5a1c10de | 888 | actual sp. */ |
eabd3262 RK |
889 | #define STACK_POINTER_OFFSET -32 |
890 | ||
891 | #define STACK_DYNAMIC_OFFSET(FNDECL) \ | |
892 | ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size) | |
893 | ||
894 | /* Value is 1 if returning from a function call automatically | |
895 | pops the arguments described by the number-of-args field in the call. | |
8b109b37 | 896 | FUNDECL is the declaration node of the function (as a tree), |
eabd3262 RK |
897 | FUNTYPE is the data type of the function (as a tree), |
898 | or for a library call it is an identifier node for the subroutine name. */ | |
899 | ||
8b109b37 | 900 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
eabd3262 RK |
901 | |
902 | /* Define how to find the value returned by a function. | |
903 | VALTYPE is the data type of the value (as a tree). | |
904 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
905 | otherwise, FUNC is 0. */ | |
906 | ||
3f8f5a3f | 907 | /* On the HP-PA the value is found in register(s) 28(-29), unless |
c2ae03cb | 908 | the mode is SF or DF. Then the value is returned in fr4 (32, ) */ |
eabd3262 RK |
909 | |
910 | ||
911 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
74356a72 TG |
912 | gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \ |
913 | && (TYPE_MODE (VALTYPE) == SFmode || \ | |
914 | TYPE_MODE (VALTYPE) == DFmode)) ? \ | |
a40ed31b | 915 | 32 : 28)) |
eabd3262 | 916 | |
eabd3262 RK |
917 | /* Define how to find the value returned by a library function |
918 | assuming the value has mode MODE. */ | |
919 | ||
74356a72 TG |
920 | #define LIBCALL_VALUE(MODE) \ |
921 | gen_rtx (REG, MODE, \ | |
922 | (! TARGET_SOFT_FLOAT \ | |
923 | && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) | |
eabd3262 RK |
924 | |
925 | /* 1 if N is a possible register number for a function value | |
926 | as seen by the caller. */ | |
927 | ||
a40ed31b | 928 | #define FUNCTION_VALUE_REGNO_P(N) \ |
74356a72 | 929 | ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32)) |
eabd3262 RK |
930 | |
931 | /* 1 if N is a possible register number for function argument passing. */ | |
932 | ||
a40ed31b | 933 | #define FUNCTION_ARG_REGNO_P(N) \ |
74356a72 | 934 | (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39)) |
eabd3262 RK |
935 | \f |
936 | /* Define a data type for recording info about an argument list | |
937 | during the scan of that argument list. This data type should | |
938 | hold all necessary information about the function itself | |
939 | and about the args processed so far, enough to enable macros | |
940 | such as FUNCTION_ARG to determine where the next arg should go. | |
941 | ||
3f8f5a3f | 942 | On the HP-PA, this is a single integer, which is a number of words |
eabd3262 RK |
943 | of arguments scanned so far (including the invisible argument, |
944 | if any, which holds the structure-value-address). | |
945 | Thus 4 or more means all following args should go on the stack. */ | |
946 | ||
2c7ee1a6 | 947 | struct hppa_args {int words, nargs_prototype, indirect; }; |
2822d96e JL |
948 | |
949 | #define CUMULATIVE_ARGS struct hppa_args | |
eabd3262 RK |
950 | |
951 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
952 | for a call to a function whose data type is FNTYPE. | |
2822d96e | 953 | For a library call, FNTYPE is 0. */ |
eabd3262 | 954 | |
2c7ee1a6 | 955 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
2822d96e | 956 | (CUM).words = 0, \ |
2c7ee1a6 | 957 | (CUM).indirect = INDIRECT, \ |
2822d96e JL |
958 | (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ |
959 | ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ | |
960 | + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
961 | || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \ | |
962 | : 0) | |
963 | ||
964 | ||
965 | ||
966 | /* Similar, but when scanning the definition of a procedure. We always | |
bd625e21 | 967 | set NARGS_PROTOTYPE large so we never return a PARALLEL. */ |
2822d96e JL |
968 | |
969 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
970 | (CUM).words = 0, \ | |
a5bbd4b8 | 971 | (CUM).indirect = 0, \ |
2822d96e | 972 | (CUM).nargs_prototype = 1000 |
eabd3262 RK |
973 | |
974 | /* Figure out the size in words of the function argument. */ | |
975 | ||
976 | #define FUNCTION_ARG_SIZE(MODE, TYPE) \ | |
977 | ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4) | |
978 | ||
979 | /* Update the data in CUM to advance over an argument | |
980 | of mode MODE and data type TYPE. | |
981 | (TYPE is null for libcalls where that information may not be available.) */ | |
982 | ||
983 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
2822d96e JL |
984 | { (CUM).nargs_prototype--; \ |
985 | ((((CUM).words & 01) && (TYPE) != 0 \ | |
986 | && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \ | |
987 | && (CUM).words++), \ | |
988 | (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \ | |
989 | } | |
eabd3262 RK |
990 | |
991 | /* Determine where to put an argument to a function. | |
992 | Value is zero to push the argument on the stack, | |
993 | or a hard register in which to store the argument. | |
994 | ||
995 | MODE is the argument's machine mode. | |
996 | TYPE is the data type of the argument (as a tree). | |
997 | This is null for libcalls where that information may | |
998 | not be available. | |
999 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1000 | the preceding args and about the function being called. | |
1001 | NAMED is nonzero if this argument is a named parameter | |
2822d96e | 1002 | (otherwise it is an extra parameter matching an ellipsis). |
eabd3262 | 1003 | |
2822d96e | 1004 | On the HP-PA the first four words of args are normally in registers |
eabd3262 | 1005 | and the rest are pushed. But any arg that won't entirely fit in regs |
3d247e85 TM |
1006 | is pushed. |
1007 | ||
99977c61 RS |
1008 | Arguments passed in registers are either 1 or 2 words long. |
1009 | ||
1010 | The caller must make a distinction between calls to explicitly named | |
1011 | functions and calls through pointers to functions -- the conventions | |
1012 | are different! Calls through pointers to functions only use general | |
279c9bde | 1013 | registers for the first four argument words. |
eabd3262 | 1014 | |
2822d96e JL |
1015 | Of course all this is different for the portable runtime model |
1016 | HP wants everyone to use for ELF. Ugh. Here's a quick description | |
1017 | of how it's supposed to work. | |
1018 | ||
1019 | 1) callee side remains unchanged. It expects integer args to be | |
1020 | in the integer registers, float args in the float registers and | |
1021 | unnamed args in integer registers. | |
1022 | ||
1023 | 2) caller side now depends on if the function being called has | |
1024 | a prototype in scope (rather than if it's being called indirectly). | |
1025 | ||
1026 | 2a) If there is a prototype in scope, then arguments are passed | |
1027 | according to their type (ints in integer registers, floats in float | |
1028 | registers, unnamed args in integer registers. | |
1029 | ||
1030 | 2b) If there is no prototype in scope, then floating point arguments | |
1031 | are passed in both integer and float registers. egad. | |
1032 | ||
1033 | FYI: The portable parameter passing conventions are almost exactly like | |
1034 | the standard parameter passing conventions on the RS6000. That's why | |
1035 | you'll see lots of similar code in rs6000.h. */ | |
a40ed31b | 1036 | |
eabd3262 RK |
1037 | #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) |
1038 | ||
2822d96e JL |
1039 | /* Do not expect to understand this without reading it several times. I'm |
1040 | tempted to try and simply it, but I worry about breaking something. */ | |
1041 | ||
eabd3262 | 1042 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
2822d96e JL |
1043 | (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \ |
1044 | ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \ | |
74356a72 TG |
1045 | || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \ |
1046 | || (CUM).nargs_prototype > 0) \ | |
2822d96e JL |
1047 | ? gen_rtx (REG, (MODE), \ |
1048 | (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ | |
2c7ee1a6 | 1049 | ? (((!(CUM).indirect \ |
667f6759 | 1050 | || TARGET_PORTABLE_RUNTIME) \ |
74356a72 TG |
1051 | && (MODE) == DFmode \ |
1052 | && ! TARGET_SOFT_FLOAT) \ | |
a40ed31b | 1053 | ? ((CUM).words ? 38 : 34) \ |
2822d96e | 1054 | : ((CUM).words ? 23 : 25)) \ |
2c7ee1a6 | 1055 | : (((!(CUM).indirect \ |
667f6759 | 1056 | || TARGET_PORTABLE_RUNTIME) \ |
74356a72 TG |
1057 | && (MODE) == SFmode \ |
1058 | && ! TARGET_SOFT_FLOAT) \ | |
a40ed31b | 1059 | ? (32 + 2 * (CUM).words) \ |
2822d96e JL |
1060 | : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \ |
1061 | (TYPE))))))\ | |
1062 | /* We are calling a non-prototyped function with floating point \ | |
1063 | arguments using the portable conventions. */ \ | |
bd625e21 JW |
1064 | : gen_rtx (PARALLEL, (MODE), \ |
1065 | gen_rtvec \ | |
1066 | (2, \ | |
1067 | gen_rtx (EXPR_LIST, VOIDmode, \ | |
1068 | gen_rtx (REG, (MODE), \ | |
1069 | (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ | |
1070 | ? ((CUM).words ? 38 : 34) \ | |
1071 | : (32 + 2 * (CUM).words))), \ | |
1072 | const0_rtx), \ | |
1073 | gen_rtx (EXPR_LIST, VOIDmode, \ | |
1074 | gen_rtx (REG, (MODE), \ | |
1075 | (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ | |
1076 | ? ((CUM).words ? 23 : 25) \ | |
1077 | : (27 - (CUM).words - \ | |
1078 | FUNCTION_ARG_SIZE ((MODE), \ | |
1079 | (TYPE))))), \ | |
1080 | const0_rtx))) \ | |
2822d96e JL |
1081 | /* Pass this parameter in the stack. */ \ |
1082 | : 0) | |
eabd3262 | 1083 | |
eabd3262 RK |
1084 | /* For an arg passed partly in registers and partly in memory, |
1085 | this is the number of registers used. | |
1086 | For args passed entirely in registers or entirely in memory, zero. */ | |
1087 | ||
1088 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
1089 | ||
1090 | /* If defined, a C expression that gives the alignment boundary, in | |
1091 | bits, of an argument with the specified mode and type. If it is | |
1092 | not defined, `PARM_BOUNDARY' is used for all arguments. */ | |
1093 | ||
1094 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1095 | (((TYPE) != 0) \ | |
e31f69f1 | 1096 | ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \ |
eabd3262 RK |
1097 | : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ |
1098 | ? PARM_BOUNDARY \ | |
1099 | : GET_MODE_ALIGNMENT(MODE))) | |
1100 | ||
1101 | /* Arguments larger than eight bytes are passed by invisible reference */ | |
1102 | ||
1103 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
09a1d028 | 1104 | ((TYPE) && int_size_in_bytes (TYPE) > 8) |
32addcdf RK |
1105 | |
1106 | #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ | |
1107 | ((TYPE) && int_size_in_bytes (TYPE) > 8) | |
1108 | ||
eabd3262 RK |
1109 | \f |
1110 | extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1; | |
1111 | extern enum cmp_type hppa_branch_type; | |
1112 | ||
1113 | /* Output the label for a function definition. */ | |
22d6e660 | 1114 | #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED |
eabd3262 RK |
1115 | #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \ |
1116 | do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \ | |
1117 | fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0) | |
293100b5 JL |
1118 | #define DFMODE_RETURN_STRING ",RTNVAL=FU" |
1119 | #define SFMODE_RETURN_STRING ",RTNVAL=FR" | |
eabd3262 RK |
1120 | #else |
1121 | #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \ | |
1122 | do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \ | |
1123 | fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0) | |
293100b5 JL |
1124 | #define DFMODE_RETURN_STRING ",RTNVAL=FR" |
1125 | #define SFMODE_RETURN_STRING ",RTNVAL=FU" | |
eabd3262 | 1126 | #endif |
d2a94ec0 | 1127 | |
e38fd454 JL |
1128 | #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ |
1129 | { char *my_name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (THUNK_FNDECL)); \ | |
1130 | char *target_name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (FUNCTION)); \ | |
1131 | output_function_prologue (FILE, 0); \ | |
1132 | if (VAL_14_BITS_P (DELTA)) \ | |
1133 | fprintf (FILE, "\tb %s\n\tldo %d(%%r26),%%r26\n", target_name, DELTA); \ | |
1134 | else \ | |
79873958 | 1135 | fprintf (FILE, "\taddil L%%%d,%%r26\n\tb %s\n\tldo R%%%d(%%r1),%%r26\n", \ |
e38fd454 JL |
1136 | DELTA, target_name, DELTA); \ |
1137 | fprintf (FILE, "\n\t.EXIT\n\t.PROCEND\n"); \ | |
1138 | } | |
1139 | ||
38488222 JL |
1140 | /* NAME refers to the function's name. If we are placing each function into |
1141 | its own section, we need to switch to the section for this function. Note | |
1142 | that the section name will have a "." prefix. */ | |
ad238e4b | 1143 | #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, NAME) \ |
435b1237 JL |
1144 | { \ |
1145 | char *name; \ | |
1146 | STRIP_NAME_ENCODING (name, NAME); \ | |
1147 | if (!TARGET_PORTABLE_RUNTIME && TARGET_GAS && in_section == in_text) \ | |
1148 | fputs ("\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \ | |
1149 | else if (! TARGET_PORTABLE_RUNTIME && TARGET_GAS) \ | |
1150 | fprintf (FILE, \ | |
38488222 | 1151 | "\t.SUBSPA .%s\n", name); \ |
435b1237 | 1152 | } |
ad238e4b | 1153 | |
eabd3262 | 1154 | #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ |
22a3ade0 | 1155 | do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \ |
eabd3262 RK |
1156 | tree tree_type = TREE_TYPE (DECL); \ |
1157 | tree parm; \ | |
1158 | int i; \ | |
c87ba671 | 1159 | if (TREE_PUBLIC (DECL) || TARGET_GAS) \ |
4fc473c1 | 1160 | { extern int current_function_varargs; \ |
c87ba671 JL |
1161 | if (TREE_PUBLIC (DECL)) \ |
1162 | { \ | |
1163 | fputs ("\t.EXPORT ", FILE); \ | |
1164 | assemble_name (FILE, NAME); \ | |
1165 | fputs (",ENTRY,PRIV_LEV=3", FILE); \ | |
1166 | } \ | |
1167 | else \ | |
1168 | { \ | |
1169 | fputs ("\t.PARAM ", FILE); \ | |
1170 | assemble_name (FILE, NAME); \ | |
1171 | } \ | |
2822d96e JL |
1172 | if (TARGET_PORTABLE_RUNTIME) \ |
1173 | { \ | |
b99e1ee9 | 1174 | fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \ |
2822d96e JL |
1175 | fputs ("RTNVAL=NO\n", FILE); \ |
1176 | break; \ | |
1177 | } \ | |
eabd3262 | 1178 | for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \ |
a9d91d6f | 1179 | parm = TREE_CHAIN (parm)) \ |
eabd3262 | 1180 | { \ |
74356a72 TG |
1181 | if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \ |
1182 | && ! TARGET_SOFT_FLOAT) \ | |
a9d91d6f | 1183 | fprintf (FILE, ",ARGW%d=FR", i++); \ |
74356a72 TG |
1184 | else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \ |
1185 | && ! TARGET_SOFT_FLOAT) \ | |
eabd3262 | 1186 | { \ |
3f8f5a3f TM |
1187 | if (i <= 2) \ |
1188 | { \ | |
1189 | if (i == 1) i++; \ | |
1190 | ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \ | |
1191 | } \ | |
1192 | else \ | |
1193 | break; \ | |
a9d91d6f RS |
1194 | } \ |
1195 | else \ | |
1196 | { \ | |
1197 | int arg_size = \ | |
1198 | FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\ | |
1199 | DECL_ARG_TYPE (parm)); \ | |
0ed5f250 JL |
1200 | /* Passing structs by invisible reference uses \ |
1201 | one general register. */ \ | |
c60a3c2f | 1202 | if (arg_size > 2 \ |
80363f0d | 1203 | || TREE_ADDRESSABLE (DECL_ARG_TYPE (parm))) \ |
0ed5f250 | 1204 | arg_size = 1; \ |
a9d91d6f | 1205 | if (arg_size == 2 && i <= 2) \ |
eabd3262 | 1206 | { \ |
a9d91d6f RS |
1207 | if (i == 1) i++; \ |
1208 | fprintf (FILE, ",ARGW%d=GR", i++); \ | |
1209 | fprintf (FILE, ",ARGW%d=GR", i++); \ | |
eabd3262 | 1210 | } \ |
a9d91d6f RS |
1211 | else if (arg_size == 1) \ |
1212 | fprintf (FILE, ",ARGW%d=GR", i++); \ | |
1213 | else \ | |
1214 | i += arg_size; \ | |
eabd3262 | 1215 | } \ |
eabd3262 RK |
1216 | } \ |
1217 | /* anonymous args */ \ | |
4fc473c1 TM |
1218 | if ((TYPE_ARG_TYPES (tree_type) != 0 \ |
1219 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\ | |
1220 | != void_type_node)) \ | |
1221 | || current_function_varargs) \ | |
eabd3262 RK |
1222 | { \ |
1223 | for (; i < 4; i++) \ | |
1224 | fprintf (FILE, ",ARGW%d=GR", i); \ | |
1225 | } \ | |
74356a72 | 1226 | if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \ |
293100b5 | 1227 | fputs (DFMODE_RETURN_STRING, FILE); \ |
74356a72 | 1228 | else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \ |
293100b5 | 1229 | fputs (SFMODE_RETURN_STRING, FILE); \ |
eabd3262 | 1230 | else if (fntype != void_type_node) \ |
e236a9ff | 1231 | fputs (",RTNVAL=GR", FILE); \ |
eabd3262 | 1232 | fputs ("\n", FILE); \ |
ba0bfdac | 1233 | }} while (0) |
eabd3262 | 1234 | |
eabd3262 RK |
1235 | /* This macro generates the assembly code for function entry. |
1236 | FILE is a stdio stream to output the code to. | |
1237 | SIZE is an int: how many units of temporary storage to allocate. | |
1238 | Refer to the array `regs_ever_live' to determine which registers | |
1239 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1240 | is ever used in the function. This macro is responsible for | |
1241 | knowing which registers should not be saved even if used. */ | |
1242 | ||
1243 | /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block | |
1244 | of memory. If any fpu reg is used in the function, we allocate | |
1245 | such a block here, at the bottom of the frame, just in case it's needed. | |
1246 | ||
1247 | If this function is a leaf procedure, then we may choose not | |
1248 | to do a "save" insn. The decision about whether or not | |
1249 | to do this is made in regclass.c. */ | |
1250 | ||
1251 | #define FUNCTION_PROLOGUE(FILE, SIZE) \ | |
86daf4a6 | 1252 | output_function_prologue (FILE, SIZE) |
eabd3262 RK |
1253 | |
1254 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
1255 | for profiling a function entry. | |
1256 | ||
1257 | Because HPUX _mcount is so different, we actually emit the | |
1258 | profiling code in function_prologue. This just stores LABELNO for | |
1259 | that. */ | |
1260 | ||
eabd3262 RK |
1261 | #define PROFILE_BEFORE_PROLOGUE |
1262 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
1263 | { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);} | |
eabd3262 RK |
1264 | |
1265 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1266 | the stack pointer does not matter. The value is tested only in | |
1267 | functions that have frame pointers. | |
1268 | No definition is equivalent to always zero. */ | |
1269 | ||
1270 | extern int may_call_alloca; | |
1271 | extern int current_function_pretend_args_size; | |
1272 | ||
1273 | #define EXIT_IGNORE_STACK \ | |
1274 | (get_frame_size () != 0 \ | |
1275 | || current_function_calls_alloca || current_function_outgoing_args_size) | |
1276 | ||
1277 | ||
1278 | /* This macro generates the assembly code for function exit, | |
1279 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1280 | then individual return instructions are generated for each | |
1281 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1282 | ||
1283 | The function epilogue should not depend on the current stack pointer! | |
1284 | It should use the frame pointer only. This is mandatory because | |
1285 | of alloca; we also take advantage of it to omit stack adjustments | |
1286 | before returning. */ | |
1287 | ||
1288 | /* This declaration is needed due to traditional/ANSI | |
1289 | incompatibilities which cannot be #ifdefed away | |
1290 | because they occur inside of macros. Sigh. */ | |
1291 | extern union tree_node *current_function_decl; | |
1292 | ||
1293 | #define FUNCTION_EPILOGUE(FILE, SIZE) \ | |
86daf4a6 | 1294 | output_function_epilogue (FILE, SIZE) |
eabd3262 RK |
1295 | |
1296 | /* Output assembler code for a block containing the constant parts | |
f16fe394 | 1297 | of a trampoline, leaving space for the variable parts.\ |
eabd3262 | 1298 | |
f16fe394 JL |
1299 | The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM |
1300 | and then branches to the specified routine. | |
eabd3262 | 1301 | |
f16fe394 JL |
1302 | This code template is copied from text segment to stack location |
1303 | and then patched with INITIALIZE_TRAMPOLINE to contain | |
5a1c10de | 1304 | valid values, and then entered as a subroutine. |
eabd3262 | 1305 | |
5a1c10de | 1306 | It is best to keep this as small as possible to avoid having to |
f16fe394 JL |
1307 | flush multiple lines in the cache. */ |
1308 | ||
1309 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
77a2f698 | 1310 | { \ |
8b68935b JL |
1311 | fputs ("\tldw 36(0,%r22),%r21\n", FILE); \ |
1312 | fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \ | |
1313 | fputs ("\tdepi 0,31,2,%r21\n", FILE); \ | |
1314 | fputs ("\tldw 4(0,%r21),%r19\n", FILE); \ | |
1315 | fputs ("\tldw 0(0,%r21),%r21\n", FILE); \ | |
1316 | fputs ("\tldsid (0,%r21),%r1\n", FILE); \ | |
1317 | fputs ("\tmtsp %r1,%sr0\n", FILE); \ | |
1318 | fputs ("\tbe 0(%sr0,%r21)\n", FILE); \ | |
1319 | fputs ("\tldw 40(0,%r22),%r29\n", FILE); \ | |
e236a9ff JL |
1320 | fputs ("\t.word 0\n", FILE); \ |
1321 | fputs ("\t.word 0\n", FILE); \ | |
77a2f698 | 1322 | } |
f16fe394 JL |
1323 | |
1324 | /* Length in units of the trampoline for entering a nested function. | |
afcc28b2 RS |
1325 | |
1326 | Flush the cache entries corresponding to the first and last addresses | |
1327 | of the trampoline. This is necessary as the trampoline may cross two | |
5a1c10de | 1328 | cache lines. |
afcc28b2 | 1329 | |
77a2f698 TG |
1330 | If the code part of the trampoline ever grows to > 32 bytes, then it |
1331 | will become necessary to hack on the cacheflush pattern in pa.md. */ | |
f16fe394 | 1332 | |
77a2f698 | 1333 | #define TRAMPOLINE_SIZE (11 * 4) |
eabd3262 RK |
1334 | |
1335 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1336 | FNADDR is an RTX for the address of the function's pure code. | |
1337 | CXT is an RTX for the static chain value for the function. | |
1338 | ||
f16fe394 JL |
1339 | Move the function address to the trampoline template at offset 12. |
1340 | Move the static chain value to trampoline template at offset 16. */ | |
1341 | ||
1342 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
77a2f698 | 1343 | { \ |
608f0dd2 | 1344 | rtx start_addr, end_addr; \ |
77a2f698 TG |
1345 | \ |
1346 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ | |
1347 | emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \ | |
1348 | start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ | |
1349 | emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \ | |
1350 | /* fdc and fic only use registers for the address to flush, \ | |
1351 | they do not accept integer displacements. */ \ | |
1352 | start_addr = force_reg (SImode, (TRAMP)); \ | |
1353 | end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \ | |
1354 | emit_insn (gen_dcacheflush (start_addr, end_addr)); \ | |
608f0dd2 JL |
1355 | end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \ |
1356 | emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \ | |
77a2f698 | 1357 | gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\ |
f16fe394 | 1358 | } |
eabd3262 RK |
1359 | |
1360 | /* Emit code for a call to builtin_saveregs. We must emit USE insns which | |
1361 | reference the 4 integer arg registers and 4 fp arg registers. | |
1362 | Ordinarily they are not call used registers, but they are for | |
1363 | _builtin_saveregs, so we must make this explicit. */ | |
1364 | ||
107b5ee6 RK |
1365 | extern struct rtx_def *hppa_builtin_saveregs (); |
1366 | #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST) | |
eabd3262 RK |
1367 | |
1368 | \f | |
1369 | /* Addressing modes, and classification of registers for them. */ | |
1370 | ||
1371 | #define HAVE_POST_INCREMENT | |
1372 | #define HAVE_POST_DECREMENT | |
1373 | ||
1374 | #define HAVE_PRE_DECREMENT | |
1375 | #define HAVE_PRE_INCREMENT | |
1376 | ||
1377 | /* Macros to check register numbers against specific register classes. */ | |
1378 | ||
1379 | /* These assume that REGNO is a hard or pseudo reg number. | |
1380 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1381 | or a pseudo reg currently allocated to a suitable hard reg. | |
1382 | Since they use reg_renumber, they are safe only once reg_renumber | |
1383 | has been allocated, which happens in local-alloc.c. */ | |
1384 | ||
1385 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1386 | ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) | |
1387 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1388 | ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)) | |
1389 | #define REGNO_OK_FOR_FP_P(REGNO) \ | |
5345f91a | 1390 | (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO])) |
eabd3262 RK |
1391 | |
1392 | /* Now macros that check whether X is a register and also, | |
1393 | strictly, whether it is in a specified class. | |
1394 | ||
38e01259 | 1395 | These macros are specific to the HP-PA, and may be used only |
eabd3262 RK |
1396 | in code for printing assembler insns and in conditions for |
1397 | define_optimization. */ | |
1398 | ||
1399 | /* 1 if X is an fp register. */ | |
1400 | ||
1401 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
1402 | \f | |
1403 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1404 | ||
1405 | #define MAX_REGS_PER_ADDRESS 2 | |
1406 | ||
901a8cea JL |
1407 | /* Recognize any constant value that is a valid address except |
1408 | for symbolic addresses. We get better CSE by rejecting them | |
6eff269e BK |
1409 | here and allowing hppa_legitimize_address to break them up. We |
1410 | use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ | |
eabd3262 | 1411 | |
901a8cea | 1412 | #define CONSTANT_ADDRESS_P(X) \ |
6eff269e BK |
1413 | ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ |
1414 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
6e11a328 JL |
1415 | || GET_CODE (X) == HIGH) \ |
1416 | && (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) | |
6eff269e | 1417 | |
af69aabb | 1418 | /* Include all constant integers and constant doubles, but not |
f45ebe47 | 1419 | floating-point, except for floating-point zero. |
af69aabb | 1420 | |
f45ebe47 JL |
1421 | Reject LABEL_REFs if we're not using gas or the new HP assembler. */ |
1422 | #ifdef NEW_HP_ASSEMBLER | |
af69aabb | 1423 | #define LEGITIMATE_CONSTANT_P(X) \ |
6bb36601 JL |
1424 | ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ |
1425 | || (X) == CONST0_RTX (GET_MODE (X))) \ | |
359255a9 | 1426 | && !function_label_operand (X, VOIDmode)) |
f45ebe47 JL |
1427 | #else |
1428 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1429 | ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1430 | || (X) == CONST0_RTX (GET_MODE (X))) \ | |
1431 | && (GET_CODE (X) != LABEL_REF || TARGET_GAS)\ | |
1432 | && !function_label_operand (X, VOIDmode)) | |
1433 | #endif | |
eabd3262 | 1434 | |
5a1c10de | 1435 | /* Subroutine for EXTRA_CONSTRAINT. |
eabd3262 | 1436 | |
16594451 JL |
1437 | Return 1 iff OP is a pseudo which did not get a hard register and |
1438 | we are running the reload pass. */ | |
1439 | ||
1440 | #define IS_RELOADING_PSEUDO_P(OP) \ | |
1441 | ((reload_in_progress \ | |
1442 | && GET_CODE (OP) == REG \ | |
1443 | && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ | |
1444 | && reg_renumber [REGNO (OP)] < 0)) | |
eabd3262 RK |
1445 | |
1446 | /* Optional extra constraints for this machine. Borrowed from sparc.h. | |
1447 | ||
1448 | For the HPPA, `Q' means that this is a memory operand but not a | |
1449 | symbolic memory operand. Note that an unassigned pseudo register | |
1450 | is such a memory operand. Needed because reload will generate | |
1451 | these things in insns and then not re-recognize the insns, causing | |
1452 | constrain_operands to fail. | |
1453 | ||
ec241c19 | 1454 | `R' is unused. |
eabd3262 | 1455 | |
e30f390e | 1456 | `S' is unused. |
eabd3262 | 1457 | |
84721fbd | 1458 | `T' is for fp loads and stores. */ |
ec241c19 JL |
1459 | #define EXTRA_CONSTRAINT(OP, C) \ |
1460 | ((C) == 'Q' ? \ | |
16594451 | 1461 | (IS_RELOADING_PSEUDO_P (OP) \ |
16594451 | 1462 | || (GET_CODE (OP) == MEM \ |
78c0acfd JL |
1463 | && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ |
1464 | || reload_in_progress) \ | |
2414e0e2 JL |
1465 | && ! symbolic_memory_operand (OP, VOIDmode) \ |
1466 | && !(GET_CODE (XEXP (OP, 0)) == PLUS \ | |
1467 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ | |
1468 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\ | |
1469 | : ((C) == 'R' ? \ | |
1470 | (GET_CODE (OP) == MEM \ | |
1471 | && GET_CODE (XEXP (OP, 0)) == PLUS \ | |
1472 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \ | |
1473 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \ | |
1474 | && (move_operand (OP, GET_MODE (OP)) \ | |
78c0acfd JL |
1475 | || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ |
1476 | || reload_in_progress)) \ | |
16594451 | 1477 | : ((C) == 'T' ? \ |
84721fbd JL |
1478 | (GET_CODE (OP) == MEM \ |
1479 | /* Using DFmode forces only short displacements \ | |
1480 | to be recognized as valid in reg+d addresses. */\ | |
2414e0e2 JL |
1481 | && memory_address_p (DFmode, XEXP (OP, 0)) \ |
1482 | && !(GET_CODE (XEXP (OP, 0)) == PLUS \ | |
1483 | && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\ | |
1484 | || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) : 0))) | |
16594451 JL |
1485 | |
1486 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1487 | and check its validity for a certain class. | |
1488 | We have two alternate definitions for each of them. | |
1489 | The usual definition accepts all pseudo regs; the other rejects | |
1490 | them unless they have been allocated suitable hard regs. | |
1491 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1492 | ||
1493 | Most source files want to accept pseudo regs in the hope that | |
1494 | they will get allocated to the class that the insn wants them to be in. | |
1495 | Source files for reload pass need to be strict. | |
1496 | After reload, it makes no difference, since pseudo regs have | |
1497 | been eliminated by then. */ | |
ec241c19 | 1498 | |
eabd3262 RK |
1499 | #ifndef REG_OK_STRICT |
1500 | ||
1501 | /* Nonzero if X is a hard reg that can be used as an index | |
1502 | or if it is a pseudo reg. */ | |
1503 | #define REG_OK_FOR_INDEX_P(X) \ | |
e515e507 | 1504 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 RK |
1505 | /* Nonzero if X is a hard reg that can be used as a base reg |
1506 | or if it is a pseudo reg. */ | |
1507 | #define REG_OK_FOR_BASE_P(X) \ | |
e515e507 | 1508 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 | 1509 | |
eabd3262 RK |
1510 | #else |
1511 | ||
1512 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1513 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1514 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1515 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1516 | ||
eabd3262 RK |
1517 | #endif |
1518 | \f | |
1519 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1520 | that is a valid memory address for an instruction. | |
1521 | The MODE argument is the machine mode for the MEM expression | |
1522 | that wants to use this address. | |
1523 | ||
3f8f5a3f | 1524 | On the HP-PA, the actual legitimate addresses must be |
eabd3262 RK |
1525 | REG+REG, REG+(REG*SCALE) or REG+SMALLINT. |
1526 | But we can treat a SYMBOL_REF as legitimate if it is part of this | |
1527 | function's constant-pool, because such addresses can actually | |
a08e7493 JL |
1528 | be output as REG+SMALLINT. |
1529 | ||
1530 | Note we only allow 5 bit immediates for access to a constant address; | |
1531 | doing so avoids losing for loading/storing a FP register at an address | |
1532 | which will not fit in 5 bits. */ | |
eabd3262 RK |
1533 | |
1534 | #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20) | |
1535 | #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) | |
1536 | ||
1537 | #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20) | |
1538 | #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) | |
1539 | ||
1540 | #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800) | |
1541 | #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) | |
1542 | ||
1543 | #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000) | |
1544 | #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) | |
1545 | ||
eabd3262 RK |
1546 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1547 | { \ | |
1548 | if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
1549 | || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \ | |
1550 | || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \ | |
1551 | && REG_P (XEXP (X, 0)) \ | |
1552 | && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \ | |
1553 | goto ADDR; \ | |
1554 | else if (GET_CODE (X) == PLUS) \ | |
1555 | { \ | |
516c2342 | 1556 | rtx base = 0, index = 0; \ |
eabd3262 RK |
1557 | if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\ |
1558 | { \ | |
1559 | if (GET_CODE (XEXP (X, 1)) == REG \ | |
1560 | && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
1561 | goto ADDR; \ | |
1562 | else if (flag_pic == 1 \ | |
6bb36601 | 1563 | && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\ |
eabd3262 RK |
1564 | goto ADDR; \ |
1565 | } \ | |
1566 | else if (REG_P (XEXP (X, 0)) \ | |
1567 | && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
1568 | base = XEXP (X, 0), index = XEXP (X, 1); \ | |
1569 | else if (REG_P (XEXP (X, 1)) \ | |
1570 | && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
1571 | base = XEXP (X, 1), index = XEXP (X, 0); \ | |
1572 | if (base != 0) \ | |
1573 | if (GET_CODE (index) == CONST_INT \ | |
74356a72 TG |
1574 | && ((INT_14_BITS (index) \ |
1575 | && (TARGET_SOFT_FLOAT \ | |
1576 | || ((MODE) != SFmode && (MODE) != DFmode))) \ | |
eabd3262 RK |
1577 | || INT_5_BITS (index))) \ |
1578 | goto ADDR; \ | |
1e0e41d2 | 1579 | if (! TARGET_SOFT_FLOAT \ |
96b63cd7 | 1580 | && ! TARGET_DISABLE_INDEXING \ |
1e0e41d2 | 1581 | && base \ |
2414e0e2 JL |
1582 | && (mode == SFmode || mode == DFmode) \ |
1583 | && GET_CODE (index) == MULT \ | |
1584 | && GET_CODE (XEXP (index, 0)) == REG \ | |
1585 | && REG_OK_FOR_BASE_P (XEXP (index, 0)) \ | |
1586 | && GET_CODE (XEXP (index, 1)) == CONST_INT \ | |
1e0e41d2 | 1587 | && INTVAL (XEXP (index, 1)) == (mode == SFmode ? 4 : 8))\ |
2414e0e2 | 1588 | goto ADDR; \ |
eabd3262 RK |
1589 | } \ |
1590 | else if (GET_CODE (X) == LO_SUM \ | |
1591 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1592 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1593 | && CONSTANT_P (XEXP (X, 1)) \ | |
74356a72 TG |
1594 | && (TARGET_SOFT_FLOAT \ |
1595 | || ((MODE) != SFmode \ | |
1596 | && (MODE) != DFmode))) \ | |
eabd3262 RK |
1597 | goto ADDR; \ |
1598 | else if (GET_CODE (X) == LO_SUM \ | |
1599 | && GET_CODE (XEXP (X, 0)) == SUBREG \ | |
1600 | && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\ | |
1601 | && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\ | |
1602 | && CONSTANT_P (XEXP (X, 1)) \ | |
74356a72 TG |
1603 | && (TARGET_SOFT_FLOAT \ |
1604 | || ((MODE) != SFmode \ | |
1605 | && (MODE) != DFmode))) \ | |
eabd3262 RK |
1606 | goto ADDR; \ |
1607 | else if (GET_CODE (X) == LABEL_REF \ | |
1608 | || (GET_CODE (X) == CONST_INT \ | |
a08e7493 | 1609 | && INT_5_BITS (X))) \ |
eabd3262 | 1610 | goto ADDR; \ |
a205e34b JL |
1611 | /* Needed for -fPIC */ \ |
1612 | else if (GET_CODE (X) == LO_SUM \ | |
1613 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1614 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1615 | && GET_CODE (XEXP (X, 1)) == UNSPEC) \ | |
1616 | goto ADDR; \ | |
eabd3262 | 1617 | } |
cc46ae8e JL |
1618 | |
1619 | /* Look for machine dependent ways to make the invalid address AD a | |
1620 | valid address. | |
1621 | ||
1622 | For the PA, transform: | |
1623 | ||
1624 | memory(X + <large int>) | |
1625 | ||
1626 | into: | |
1627 | ||
1628 | if (<large int> & mask) >= 16 | |
1629 | Y = (<large int> & ~mask) + mask + 1 Round up. | |
1630 | else | |
1631 | Y = (<large int> & ~mask) Round down. | |
1632 | Z = X + Y | |
1633 | memory (Z + (<large int> - Y)); | |
1634 | ||
1635 | This makes reload inheritance and reload_cse work better since Z | |
1636 | can be reused. | |
1637 | ||
1638 | There may be more opportunities to improve code with this hook. */ | |
1639 | #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ | |
1640 | do { \ | |
1641 | int offset, newoffset, mask; \ | |
1642 | mask = GET_MODE_CLASS (MODE) == MODE_FLOAT ? 0x1f : 0x3fff; \ | |
1643 | \ | |
2872409d JL |
1644 | if (optimize \ |
1645 | && GET_CODE (AD) == PLUS \ | |
cc46ae8e JL |
1646 | && GET_CODE (XEXP (AD, 0)) == REG \ |
1647 | && GET_CODE (XEXP (AD, 1)) == CONST_INT) \ | |
1648 | { \ | |
1649 | offset = INTVAL (XEXP ((AD), 1)); \ | |
1650 | \ | |
1651 | /* Choose rounding direction. Round up if we are >= halfway. */ \ | |
1652 | if ((offset & mask) >= ((mask + 1) / 2)) \ | |
1653 | newoffset = (offset & ~mask) + mask + 1; \ | |
1654 | else \ | |
1655 | newoffset = offset & ~mask; \ | |
1656 | \ | |
1657 | if (newoffset != 0 \ | |
1658 | && VAL_14_BITS_P (newoffset)) \ | |
1659 | { \ | |
1660 | rtx temp; \ | |
1661 | \ | |
1662 | /* Unshare the sum as well. */ \ | |
1663 | AD = copy_rtx (AD); \ | |
1664 | temp = gen_rtx_PLUS (Pmode, XEXP (AD, 0), \ | |
1665 | GEN_INT (newoffset)); \ | |
1666 | AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ | |
1667 | push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ | |
1668 | BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ | |
1669 | (OPNUM), (TYPE)); \ | |
1670 | goto WIN; \ | |
1671 | } \ | |
1672 | } \ | |
1673 | } while (0) | |
1674 | ||
1675 | ||
1676 | ||
eabd3262 RK |
1677 | \f |
1678 | /* Try machine-dependent ways of modifying an illegitimate address | |
1679 | to be legitimate. If we find one, return the new, valid address. | |
1680 | This macro is used in only one place: `memory_address' in explow.c. | |
1681 | ||
1682 | OLDX is the address as it was before break_out_memory_refs was called. | |
1683 | In some cases it is useful to look at this to decide what needs to be done. | |
1684 | ||
1685 | MODE and WIN are passed so that this macro can use | |
1686 | GO_IF_LEGITIMATE_ADDRESS. | |
1687 | ||
1688 | It is always safe for this macro to do nothing. It exists to recognize | |
901a8cea JL |
1689 | opportunities to optimize the output. */ |
1690 | ||
1691 | extern struct rtx_def *hppa_legitimize_address (); | |
1692 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ | |
1693 | { rtx orig_x = (X); \ | |
1694 | (X) = hppa_legitimize_address (X, OLDX, MODE); \ | |
1695 | if ((X) != orig_x && memory_address_p (MODE, X)) \ | |
1696 | goto WIN; } | |
eabd3262 RK |
1697 | |
1698 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1699 | has an effect that depends on the machine mode it is used for. */ | |
1700 | ||
1701 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1702 | if (GET_CODE (ADDR) == PRE_DEC \ | |
1703 | || GET_CODE (ADDR) == POST_DEC \ | |
1704 | || GET_CODE (ADDR) == PRE_INC \ | |
1705 | || GET_CODE (ADDR) == POST_INC) \ | |
1706 | goto LABEL | |
1707 | \f | |
1708 | /* Define this macro if references to a symbol must be treated | |
1709 | differently depending on something about the variable or | |
1710 | function named by the symbol (such as what section it is in). | |
1711 | ||
1712 | The macro definition, if any, is executed immediately after the | |
1713 | rtl for DECL or other node is created. | |
1714 | The value of the rtl will be a `mem' whose address is a | |
1715 | `symbol_ref'. | |
1716 | ||
1717 | The usual thing for this macro to do is to a flag in the | |
1718 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1719 | name string in the `symbol_ref' (if one bit is not enough | |
1720 | information). | |
1721 | ||
3f8f5a3f | 1722 | On the HP-PA we use this to indicate if a symbol is in text or |
ff2b6252 TM |
1723 | data space. Also, function labels need special treatment. */ |
1724 | ||
1725 | #define TEXT_SPACE_P(DECL)\ | |
1726 | (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1727 | || (TREE_CODE (DECL) == VAR_DECL \ | |
1728 | && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ | |
c77c286a | 1729 | && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ |
ff2b6252 | 1730 | && !flag_pic) \ |
74c3447c | 1731 | || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \ |
ff2b6252 TM |
1732 | && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings))) |
1733 | ||
1734 | #define FUNCTION_NAME_P(NAME) \ | |
1735 | (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@')) | |
eabd3262 RK |
1736 | |
1737 | #define ENCODE_SECTION_INFO(DECL)\ | |
ff2b6252 TM |
1738 | do \ |
1739 | { if (TEXT_SPACE_P (DECL)) \ | |
1740 | { rtx _rtl; \ | |
1741 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1742 | || TREE_CODE (DECL) == VAR_DECL) \ | |
1743 | _rtl = DECL_RTL (DECL); \ | |
1744 | else \ | |
1745 | _rtl = TREE_CST_RTL (DECL); \ | |
1746 | SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \ | |
1747 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
4f6cd2e6 | 1748 | hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\ |
ff2b6252 TM |
1749 | } \ |
1750 | } \ | |
eabd3262 | 1751 | while (0) |
5a1c10de | 1752 | |
e42b4c96 RS |
1753 | /* Store the user-specified part of SYMBOL_NAME in VAR. |
1754 | This is sort of inverse to ENCODE_SECTION_INFO. */ | |
1755 | ||
1756 | #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \ | |
ff2b6252 TM |
1757 | (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \ |
1758 | 1 + (SYMBOL_NAME)[1] == '@'\ | |
1759 | : (SYMBOL_NAME)[0] == '@')) | |
eabd3262 | 1760 | |
25ce77f4 JL |
1761 | /* On hpux10, the linker will give an error if we have a reference |
1762 | in the read-only data section to a symbol defined in a shared | |
1763 | library. Therefore, expressions that might require a reloc can | |
1764 | not be placed in the read-only data section. */ | |
1765 | #define SELECT_SECTION(EXP,RELOC) \ | |
1766 | if (TREE_CODE (EXP) == VAR_DECL \ | |
1767 | && TREE_READONLY (EXP) \ | |
1768 | && !TREE_THIS_VOLATILE (EXP) \ | |
1769 | && DECL_INITIAL (EXP) \ | |
1770 | && (DECL_INITIAL (EXP) == error_mark_node \ | |
1771 | || TREE_CONSTANT (DECL_INITIAL (EXP))) \ | |
1772 | && !reloc) \ | |
1773 | readonly_data_section (); \ | |
1774 | else if (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'c' \ | |
1775 | && !(TREE_CODE (EXP) == STRING_CST && flag_writable_strings) \ | |
1776 | && !reloc) \ | |
1777 | readonly_data_section (); \ | |
1778 | else \ | |
1779 | data_section (); | |
1780 | ||
8e64b41a JL |
1781 | /* Arghh. The hpux10 linker chokes if we have a reference to symbols |
1782 | in a readonly data section when the symbol is defined in a shared | |
1783 | library. Since we can't know at compile time if a symbol will be | |
1784 | satisfied by a shared library or main program we put any symbolic | |
1785 | constant into the normal data section. */ | |
1786 | #define SELECT_RTX_SECTION(MODE,RTX) \ | |
1787 | if (symbolic_operand (RTX, MODE)) \ | |
6bb36601 JL |
1788 | data_section (); \ |
1789 | else \ | |
1790 | readonly_data_section (); | |
1791 | ||
eabd3262 RK |
1792 | /* Specify the machine mode that this machine uses |
1793 | for the index in the tablejump instruction. */ | |
3e056efc | 1794 | #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode) |
eabd3262 RK |
1795 | |
1796 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1797 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1798 | ||
1799 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1800 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1801 | ||
1802 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1803 | #define DEFAULT_SIGNED_CHAR 1 | |
1804 | ||
1805 | /* Max number of bytes we can move from memory to memory | |
1806 | in one reasonably fast instruction. */ | |
1807 | #define MOVE_MAX 8 | |
1808 | ||
68944452 JL |
1809 | /* Higher than the default as we prefer to use simple move insns |
1810 | (better scheduling and delay slot filling) and because our | |
1811 | built-in block move is really a 2X unrolled loop. */ | |
1812 | #define MOVE_RATIO 4 | |
1813 | ||
9a63901f RK |
1814 | /* Define if operations between registers always perform the operation |
1815 | on the full register even if a narrower mode is specified. */ | |
1816 | #define WORD_REGISTER_OPERATIONS | |
1817 | ||
1818 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1819 | will either zero-extend or sign-extend. The value of this macro should | |
1820 | be the code that says which one of the two operations is implicitly | |
1821 | done, NIL if none. */ | |
1822 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
eabd3262 RK |
1823 | |
1824 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1825 | #define SLOW_BYTE_ACCESS 1 | |
1826 | ||
1827 | /* Do not break .stabs pseudos into continuations. */ | |
1144563f | 1828 | #define DBX_CONTIN_LENGTH 4000 |
eabd3262 RK |
1829 | |
1830 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1831 | is done just by pretending it is already truncated. */ | |
1832 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1833 | ||
1834 | /* We assume that the store-condition-codes instructions store 0 for false | |
1835 | and some other value for true. This is the value stored for true. */ | |
1836 | ||
1837 | #define STORE_FLAG_VALUE 1 | |
1838 | ||
1839 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
1840 | #define PROMOTE_PROTOTYPES | |
1841 | ||
1842 | /* Specify the machine mode that pointers have. | |
1843 | After generation of rtl, the compiler makes no further distinction | |
1844 | between pointers and any other objects of this machine mode. */ | |
1845 | #define Pmode SImode | |
1846 | ||
1847 | /* Add any extra modes needed to represent the condition code. | |
1848 | ||
1849 | HPPA floating comparisons produce condition codes. */ | |
1850 | #define EXTRA_CC_MODES CCFPmode | |
1851 | ||
1852 | /* Define the names for the modes specified above. */ | |
1853 | #define EXTRA_CC_NAMES "CCFP" | |
1854 | ||
1855 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
1856 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
1857 | should be used. CC_NOOVmode should be used when the first operand is a | |
1858 | PLUS, MINUS, or NEG. CCmode should be used when no special processing is | |
1859 | needed. */ | |
b565a316 | 1860 | #define SELECT_CC_MODE(OP,X,Y) \ |
eabd3262 RK |
1861 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ |
1862 | ||
1863 | /* A function address in a call instruction | |
1864 | is a byte address (for indexing purposes) | |
1865 | so give the MEM rtx a byte's mode. */ | |
1866 | #define FUNCTION_MODE SImode | |
5a1c10de | 1867 | |
eabd3262 RK |
1868 | /* Define this if addresses of constant functions |
1869 | shouldn't be put through pseudo regs where they can be cse'd. | |
1870 | Desirable on machines where ordinary constants are expensive | |
1871 | but a CALL with constant address is cheap. */ | |
1872 | #define NO_FUNCTION_CSE | |
1873 | ||
d969caf8 | 1874 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
e061ef25 | 1875 | few bits. */ |
d969caf8 | 1876 | #define SHIFT_COUNT_TRUNCATED 1 |
e061ef25 | 1877 | |
81f433e4 JL |
1878 | /* Use atexit for static constructors/destructors, instead of defining |
1879 | our own exit function. */ | |
1880 | #define HAVE_ATEXIT | |
1881 | ||
eabd3262 RK |
1882 | /* Compute the cost of computing a constant rtl expression RTX |
1883 | whose rtx-code is CODE. The body of this macro is a portion | |
1884 | of a switch statement. If the code is computed here, | |
1885 | return it with a return statement. Otherwise, break from the switch. */ | |
1886 | ||
1887 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
5feca984 KG |
1888 | case CONST_INT: \ |
1889 | if (INTVAL (RTX) == 0) return 0; \ | |
1890 | if (INT_14_BITS (RTX)) return 1; \ | |
1891 | case HIGH: \ | |
1892 | return 2; \ | |
1893 | case CONST: \ | |
1894 | case LABEL_REF: \ | |
1895 | case SYMBOL_REF: \ | |
1896 | return 4; \ | |
1897 | case CONST_DOUBLE: \ | |
1898 | if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \ | |
1899 | && OUTER_CODE != SET) \ | |
1900 | return 0; \ | |
1901 | else \ | |
af69aabb | 1902 | return 8; |
eabd3262 RK |
1903 | |
1904 | #define ADDRESS_COST(RTX) \ | |
1905 | (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX)) | |
1906 | ||
1907 | /* Compute extra cost of moving data between one register class | |
5de7c240 JL |
1908 | and another. |
1909 | ||
5ac6158d TG |
1910 | Make moves from SAR so expensive they should never happen. We used to |
1911 | have 0xffff here, but that generates overflow in rare cases. | |
5de7c240 | 1912 | |
5a1c10de | 1913 | Copies involving a FP register and a non-FP register are relatively |
5de7c240 JL |
1914 | expensive because they must go through memory. |
1915 | ||
1916 | Other copies are reasonably cheap. */ | |
eabd3262 | 1917 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ |
5ac6158d | 1918 | (CLASS1 == SHIFT_REGS ? 0x100 \ |
5de7c240 JL |
1919 | : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ |
1920 | : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ | |
1921 | : 2) | |
1922 | ||
eabd3262 RK |
1923 | |
1924 | /* Provide the costs of a rtl expression. This is in the body of a | |
1925 | switch on CODE. The purpose for the cost of MULT is to encourage | |
1926 | `synth_mult' to find a synthetic multiply when reasonable. */ | |
1927 | ||
68944452 JL |
1928 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
1929 | case MULT: \ | |
1930 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1931 | return COSTS_N_INSNS (3); \ | |
1932 | return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \ | |
1933 | ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \ | |
1934 | case DIV: \ | |
1935 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1936 | return COSTS_N_INSNS (14); \ | |
1937 | case UDIV: \ | |
1938 | case MOD: \ | |
1939 | case UMOD: \ | |
1940 | return COSTS_N_INSNS (60); \ | |
1941 | case PLUS: /* this includes shNadd insns */ \ | |
1942 | case MINUS: \ | |
1943 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1944 | return COSTS_N_INSNS (3); \ | |
1945 | return COSTS_N_INSNS (1); \ | |
1946 | case ASHIFT: \ | |
1947 | case ASHIFTRT: \ | |
1948 | case LSHIFTRT: \ | |
1949 | return COSTS_N_INSNS (1); | |
eabd3262 | 1950 | |
1150aa70 TG |
1951 | /* Adjust the cost of dependencies. */ |
1952 | ||
1953 | #define ADJUST_COST(INSN,LINK,DEP,COST) \ | |
1954 | (COST) = pa_adjust_cost (INSN, LINK, DEP, COST) | |
1955 | ||
7c4a1f08 JL |
1956 | /* Adjust scheduling priorities. We use this to try and keep addil |
1957 | and the next use of %r1 close together. */ | |
1958 | #define ADJUST_PRIORITY(PREV) \ | |
1959 | { \ | |
1960 | rtx set = single_set (PREV); \ | |
1961 | rtx src, dest; \ | |
1962 | if (set) \ | |
1963 | { \ | |
1964 | src = SET_SRC (set); \ | |
1965 | dest = SET_DEST (set); \ | |
1966 | if (GET_CODE (src) == LO_SUM \ | |
1967 | && symbolic_operand (XEXP (src, 1), VOIDmode) \ | |
1968 | && ! read_only_operand (XEXP (src, 1), VOIDmode)) \ | |
1969 | INSN_PRIORITY (PREV) >>= 3; \ | |
1970 | else if (GET_CODE (src) == MEM \ | |
1971 | && GET_CODE (XEXP (src, 0)) == LO_SUM \ | |
1972 | && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)\ | |
1973 | && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))\ | |
1974 | INSN_PRIORITY (PREV) >>= 1; \ | |
1975 | else if (GET_CODE (dest) == MEM \ | |
1976 | && GET_CODE (XEXP (dest, 0)) == LO_SUM \ | |
1977 | && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)\ | |
1978 | && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))\ | |
1979 | INSN_PRIORITY (PREV) >>= 3; \ | |
1980 | } \ | |
1981 | } | |
1982 | ||
04664e24 RS |
1983 | /* Handling the special cases is going to get too complicated for a macro, |
1984 | just call `pa_adjust_insn_length' to do the real work. */ | |
eabd3262 | 1985 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
04664e24 RS |
1986 | LENGTH += pa_adjust_insn_length (INSN, LENGTH); |
1987 | ||
72abf941 JL |
1988 | /* Millicode insns are actually function calls with some special |
1989 | constraints on arguments and register usage. | |
1990 | ||
1991 | Millicode calls always expect their arguments in the integer argument | |
1992 | registers, and always return their result in %r29 (ret1). They | |
1993 | are expected to clobber their arguments, %r1, %r29, and %r31 and | |
1994 | nothing else. | |
1995 | ||
5a1c10de TG |
1996 | These macros tell reorg that the references to arguments and |
1997 | register clobbers for millicode calls do not appear to happen | |
72abf941 JL |
1998 | until after the millicode call. This allows reorg to put insns |
1999 | which set the argument registers into the delay slot of the millicode | |
2000 | call -- thus they act more like traditional CALL_INSNs. | |
2001 | ||
2002 | get_attr_type will try to recognize the given insn, so make sure to | |
d0ca05ef RS |
2003 | filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns |
2004 | in particular. */ | |
72abf941 JL |
2005 | #define INSN_SETS_ARE_DELAYED(X) \ |
2006 | ((GET_CODE (X) == INSN \ | |
2007 | && GET_CODE (PATTERN (X)) != SEQUENCE \ | |
2008 | && GET_CODE (PATTERN (X)) != USE \ | |
d0ca05ef | 2009 | && GET_CODE (PATTERN (X)) != CLOBBER \ |
72abf941 JL |
2010 | && get_attr_type (X) == TYPE_MILLI)) |
2011 | ||
2012 | #define INSN_REFERENCES_ARE_DELAYED(X) \ | |
2013 | ((GET_CODE (X) == INSN \ | |
2014 | && GET_CODE (PATTERN (X)) != SEQUENCE \ | |
2015 | && GET_CODE (PATTERN (X)) != USE \ | |
d0ca05ef | 2016 | && GET_CODE (PATTERN (X)) != CLOBBER \ |
5a1c10de | 2017 | && get_attr_type (X) == TYPE_MILLI)) |
72abf941 | 2018 | |
eabd3262 RK |
2019 | \f |
2020 | /* Control the assembler format that we output. */ | |
2021 | ||
2022 | /* Output at beginning of assembler file. */ | |
2023 | ||
2024 | #define ASM_FILE_START(FILE) \ | |
e236a9ff | 2025 | do { fputs ("\t.SPACE $PRIVATE$\n\ |
eabd3262 | 2026 | \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\ |
a291e551 | 2027 | \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\ |
eabd3262 | 2028 | \t.SPACE $TEXT$\n\ |
c83eb049 | 2029 | \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\ |
eabd3262 RK |
2030 | \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\ |
2031 | \t.IMPORT $global$,DATA\n\ | |
e236a9ff | 2032 | \t.IMPORT $$dyncall,MILLICODE\n", FILE);\ |
eabd3262 | 2033 | if (profile_flag)\ |
a291e551 | 2034 | fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\ |
a7c1e13f JL |
2035 | if (write_symbols != NO_DEBUG) \ |
2036 | output_file_directive ((FILE), main_input_filename); \ | |
eabd3262 RK |
2037 | } while (0) |
2038 | ||
359255a9 JL |
2039 | #define ASM_FILE_END(FILE) output_deferred_plabels (FILE) |
2040 | ||
eabd3262 RK |
2041 | /* Output to assembler file text saying following lines |
2042 | may contain character constants, extra white space, comments, etc. */ | |
2043 | ||
2044 | #define ASM_APP_ON "" | |
2045 | ||
2046 | /* Output to assembler file text saying following lines | |
2047 | no longer contain unusual constructs. */ | |
2048 | ||
2049 | #define ASM_APP_OFF "" | |
2050 | ||
3f8f5a3f | 2051 | /* We don't yet know how to identify GCC to HP-PA machines. */ |
e236a9ff | 2052 | #define ASM_IDENTIFY_GCC(FILE) fputs ("; gcc_compiled.:\n", FILE) |
eabd3262 RK |
2053 | |
2054 | /* Output before code. */ | |
2055 | ||
2056 | /* Supposedly the assembler rejects the command if there is no tab! */ | |
2057 | #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n" | |
2058 | ||
41ded289 JL |
2059 | /* Output before read-only data. */ |
2060 | ||
2061 | /* Supposedly the assembler rejects the command if there is no tab! */ | |
2062 | #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n" | |
ee80d1cd | 2063 | |
41ded289 JL |
2064 | #define READONLY_DATA_SECTION readonly_data |
2065 | ||
eabd3262 RK |
2066 | /* Output before writable data. */ |
2067 | ||
2068 | /* Supposedly the assembler rejects the command if there is no tab! */ | |
2069 | #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n" | |
2070 | ||
a291e551 JL |
2071 | /* Output before uninitialized data. */ |
2072 | ||
2073 | #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n" | |
2074 | ||
2075 | /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */ | |
2076 | ||
ad238e4b | 2077 | #ifndef CTORS_SECTION_FUNCTION |
f7093a42 | 2078 | #define EXTRA_SECTIONS in_readonly_data |
ad238e4b JL |
2079 | #define CTORS_SECTION_FUNCTION |
2080 | #define DTORS_SECTION_FUNCTION | |
2081 | #else | |
f7093a42 | 2082 | #define EXTRA_SECTIONS in_readonly_data, in_ctors, in_dtors |
ad238e4b | 2083 | #endif |
a291e551 | 2084 | |
a688adc7 JL |
2085 | /* Switch into a generic section. |
2086 | This is currently only used to support section attributes. | |
2087 | ||
2088 | We make the section read-only and executable for a function decl, | |
2089 | read-only for a const data decl, and writable for a non-const data decl. */ | |
ad4ff310 | 2090 | #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME, RELOC) \ |
a688adc7 JL |
2091 | if (DECL && TREE_CODE (DECL) == FUNCTION_DECL) \ |
2092 | { \ | |
2093 | fputs ("\t.SPACE $TEXT$\n", FILE); \ | |
2094 | fprintf (FILE, \ | |
dd56b31f JL |
2095 | "\t.SUBSPA %s%s%s,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY,SORT=24\n",\ |
2096 | TARGET_GAS ? "" : "$", NAME, TARGET_GAS ? "" : "$"); \ | |
a688adc7 | 2097 | } \ |
ad4ff310 | 2098 | else if (DECL && DECL_READONLY_SECTION (DECL, RELOC)) \ |
a688adc7 JL |
2099 | { \ |
2100 | fputs ("\t.SPACE $TEXT$\n", FILE); \ | |
2101 | fprintf (FILE, \ | |
dd56b31f JL |
2102 | "\t.SUBSPA %s%s%s,QUAD=0,ALIGN=8,ACCESS=44,SORT=16\n", \ |
2103 | TARGET_GAS ? "" : "$", NAME, TARGET_GAS ? "" : "$"); \ | |
a688adc7 JL |
2104 | } \ |
2105 | else \ | |
2106 | { \ | |
2107 | fputs ("\t.SPACE $PRIVATE$\n", FILE); \ | |
2108 | fprintf (FILE, \ | |
4f0875a9 | 2109 | "\t.SUBSPA %s%s%s,QUAD=1,ALIGN=8,ACCESS=31,SORT=16\n", \ |
dd56b31f | 2110 | TARGET_GAS ? "" : "$", NAME, TARGET_GAS ? "" : "$"); \ |
a688adc7 JL |
2111 | } |
2112 | ||
5bff1750 JL |
2113 | /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups |
2114 | which reference data within the $TEXT$ space (for example constant | |
2115 | strings in the $LIT$ subspace). | |
2116 | ||
2117 | The assemblers (GAS and HP as) both have problems with handling | |
2118 | the difference of two symbols which is the other correct way to | |
2119 | reference constant data during PIC code generation. | |
2120 | ||
2121 | So, there's no way to reference constant data which is in the | |
2122 | $TEXT$ space during PIC generation. Instead place all constant | |
2123 | data into the $PRIVATE$ subspace (this reduces sharing, but it | |
2124 | works correctly). */ | |
2125 | ||
a291e551 JL |
2126 | #define EXTRA_SECTION_FUNCTIONS \ |
2127 | void \ | |
41ded289 JL |
2128 | readonly_data () \ |
2129 | { \ | |
2130 | if (in_section != in_readonly_data) \ | |
2131 | { \ | |
6bb36601 | 2132 | if (flag_pic) \ |
5bff1750 | 2133 | fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \ |
6bb36601 JL |
2134 | else \ |
2135 | fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \ | |
41ded289 JL |
2136 | in_section = in_readonly_data; \ |
2137 | } \ | |
ad238e4b JL |
2138 | } \ |
2139 | CTORS_SECTION_FUNCTION \ | |
2140 | DTORS_SECTION_FUNCTION | |
a291e551 JL |
2141 | |
2142 | ||
eabd3262 RK |
2143 | /* How to refer to registers in assembler output. |
2144 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2145 | ||
2146 | #define REGISTER_NAMES \ | |
a40ed31b TG |
2147 | {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \ |
2148 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \ | |
2149 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \ | |
2150 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \ | |
2151 | "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \ | |
2152 | "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \ | |
2153 | "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \ | |
2154 | "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \ | |
2155 | "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \ | |
2156 | "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \ | |
2157 | "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \ | |
eabd3262 RK |
2158 | "SAR"} |
2159 | ||
a40ed31b TG |
2160 | #define ADDITIONAL_REGISTER_NAMES \ |
2161 | {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \ | |
2162 | {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \ | |
2163 | {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \ | |
2164 | {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \ | |
2165 | {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \ | |
2166 | {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \ | |
2167 | {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \ | |
2168 | {"%cr11",88}} | |
2169 | ||
fa6bc669 | 2170 | /* How to renumber registers for dbx and gdb. |
eabd3262 | 2171 | |
fa6bc669 JL |
2172 | Registers 0 - 31 remain unchanged. |
2173 | ||
a40ed31b | 2174 | Registers 32 - 87 are mapped to 72 - 127 |
fa6bc669 | 2175 | |
a40ed31b | 2176 | Register 88 is mapped to 32. */ |
fa6bc669 JL |
2177 | |
2178 | #define DBX_REGISTER_NUMBER(REGNO) \ | |
a40ed31b TG |
2179 | ((REGNO) <= 31 ? (REGNO) : \ |
2180 | ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32)) | |
eabd3262 RK |
2181 | |
2182 | /* This is how to output the definition of a user-level label named NAME, | |
2183 | such as the label on a static function or variable NAME. */ | |
2184 | ||
2185 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
37d7333e | 2186 | do { assemble_name (FILE, NAME); \ |
37d7333e | 2187 | fputc ('\n', FILE); } while (0) |
eabd3262 RK |
2188 | |
2189 | /* This is how to output a command to make the user-level label named NAME | |
ad238e4b JL |
2190 | defined for reference from other files. |
2191 | ||
2192 | We call assemble_name, which in turn sets TREE_SYMBOL_REFERENCED. This | |
2193 | macro will restore the original value of TREE_SYMBOL_REFERENCED to avoid | |
2194 | placing useless function definitions in the output file. */ | |
eabd3262 RK |
2195 | |
2196 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
ad238e4b JL |
2197 | do { int save_referenced; \ |
2198 | save_referenced = TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)); \ | |
2199 | fputs ("\t.IMPORT ", FILE); \ | |
eabd3262 | 2200 | assemble_name (FILE, NAME); \ |
ff2b6252 | 2201 | if (FUNCTION_NAME_P (NAME)) \ |
eabd3262 | 2202 | fputs (",CODE\n", FILE); \ |
ff2b6252 TM |
2203 | else \ |
2204 | fputs (",DATA\n", FILE); \ | |
ad238e4b | 2205 | TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)) = save_referenced; \ |
eabd3262 RK |
2206 | } while (0) |
2207 | ||
5a1c10de | 2208 | /* The bogus HP assembler requires ALL external references to be |
eabd3262 | 2209 | "imported", even library calls. They look a bit different, so |
15ac8ba0 JL |
2210 | here's this macro. |
2211 | ||
2212 | Also note not all libcall names are passed to ENCODE_SECTION_INFO | |
2213 | (__main for example). To make sure all libcall names have section | |
2214 | info recorded in them, we do it here. */ | |
eabd3262 RK |
2215 | |
2216 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \ | |
2217 | do { fputs ("\t.IMPORT ", FILE); \ | |
15ac8ba0 | 2218 | if (!function_label_operand (RTL, VOIDmode)) \ |
4f6cd2e6 | 2219 | hppa_encode_label (RTL, 1); \ |
eabd3262 RK |
2220 | assemble_name (FILE, XSTR ((RTL), 0)); \ |
2221 | fputs (",CODE\n", FILE); \ | |
2222 | } while (0) | |
2223 | ||
2224 | #define ASM_GLOBALIZE_LABEL(FILE, NAME) \ | |
91535895 TG |
2225 | do { \ |
2226 | /* We only handle DATA objects here, functions are globalized in \ | |
2227 | ASM_DECLARE_FUNCTION_NAME. */ \ | |
2228 | if (! FUNCTION_NAME_P (NAME)) \ | |
2229 | { \ | |
2230 | fputs ("\t.EXPORT ", FILE); \ | |
2231 | assemble_name (FILE, NAME); \ | |
2232 | fputs (",DATA\n", FILE); \ | |
2233 | } \ | |
2234 | } while (0) | |
eabd3262 RK |
2235 | |
2236 | /* This is how to output a reference to a user-level label named NAME. | |
2237 | `assemble_name' uses this. */ | |
2238 | ||
2239 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
ff2b6252 | 2240 | fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0)) |
eabd3262 RK |
2241 | |
2242 | /* This is how to output an internal numbered label where | |
2243 | PREFIX is the class of label and NUM is the number within the class. */ | |
2244 | ||
2245 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2822d96e | 2246 | {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);} |
eabd3262 RK |
2247 | |
2248 | /* This is how to store into the string LABEL | |
2249 | the symbol_ref name of an internal numbered label where | |
2250 | PREFIX is the class of label and NUM is the number within the class. | |
2251 | This is suitable for output with `assemble_name'. */ | |
2252 | ||
2253 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
77541d4e | 2254 | sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM) |
eabd3262 RK |
2255 | |
2256 | /* This is how to output an assembler line defining a `double' constant. */ | |
2257 | ||
2258 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
74356a72 TG |
2259 | do { long l[2]; \ |
2260 | REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \ | |
2261 | fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \ | |
2262 | } while (0) | |
eabd3262 RK |
2263 | |
2264 | /* This is how to output an assembler line defining a `float' constant. */ | |
2265 | ||
2266 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
74356a72 TG |
2267 | do { long l; \ |
2268 | REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \ | |
2269 | fprintf (FILE, "\t.word 0x%lx\n", l); \ | |
2270 | } while (0) | |
eabd3262 | 2271 | |
3ba1236f JL |
2272 | /* This is how to output an assembler line defining an `int' constant. |
2273 | ||
2274 | This is made more complicated by the fact that functions must be | |
2275 | prefixed by a P% as well as code label references for the exception | |
2276 | table -- otherwise the linker chokes. */ | |
eabd3262 RK |
2277 | |
2278 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
e236a9ff | 2279 | { fputs ("\t.word ", FILE); \ |
2822d96e JL |
2280 | if (function_label_operand (VALUE, VOIDmode) \ |
2281 | && !TARGET_PORTABLE_RUNTIME) \ | |
a24d629d | 2282 | fputs ("P%", FILE); \ |
c2ae03cb | 2283 | output_addr_const (FILE, (VALUE)); \ |
e236a9ff | 2284 | fputs ("\n", FILE);} |
eabd3262 RK |
2285 | |
2286 | /* Likewise for `short' and `char' constants. */ | |
2287 | ||
2288 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
e236a9ff | 2289 | ( fputs ("\t.half ", FILE), \ |
eabd3262 | 2290 | output_addr_const (FILE, (VALUE)), \ |
e236a9ff | 2291 | fputs ("\n", FILE)) |
eabd3262 RK |
2292 | |
2293 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
e236a9ff | 2294 | ( fputs ("\t.byte ", FILE), \ |
eabd3262 | 2295 | output_addr_const (FILE, (VALUE)), \ |
e236a9ff | 2296 | fputs ("\n", FILE)) |
eabd3262 RK |
2297 | |
2298 | /* This is how to output an assembler line for a numeric constant byte. */ | |
2299 | ||
2300 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
2301 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
2302 | ||
2303 | #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ | |
2304 | output_ascii ((FILE), (P), (SIZE)) | |
2305 | ||
d2a94ec0 | 2306 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) |
5a1c10de | 2307 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) |
eabd3262 RK |
2308 | /* This is how to output an element of a case-vector that is absolute. |
2309 | Note that this method makes filling these branch delay slots | |
3518f904 | 2310 | impossible. */ |
eabd3262 RK |
2311 | |
2312 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
3e056efc JL |
2313 | if (TARGET_BIG_SWITCH) \ |
2314 | fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \ | |
2315 | else \ | |
2316 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
eabd3262 | 2317 | |
63671b34 | 2318 | /* Jump tables are executable code and live in the TEXT section on the PA. */ |
86e3273b | 2319 | #define JUMP_TABLES_IN_TEXT_SECTION |
63671b34 | 2320 | |
eabd3262 | 2321 | /* This is how to output an element of a case-vector that is relative. |
cface026 JL |
2322 | This must be defined correctly as it is used when generating PIC code. |
2323 | ||
ddd5a7c1 | 2324 | I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT |
cface026 JL |
2325 | on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions |
2326 | rather than a table of absolute addresses. */ | |
eabd3262 | 2327 | |
33f7f353 | 2328 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
3e056efc JL |
2329 | if (TARGET_BIG_SWITCH) \ |
2330 | fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv 0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \ | |
2331 | else \ | |
2332 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
eabd3262 RK |
2333 | |
2334 | /* This is how to output an assembler line | |
2335 | that says to advance the location counter | |
2336 | to a multiple of 2**LOG bytes. */ | |
2337 | ||
2338 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
2339 | fprintf (FILE, "\t.align %d\n", (1<<(LOG))) | |
2340 | ||
2341 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
2342 | fprintf (FILE, "\t.blockz %d\n", (SIZE)) | |
2343 | ||
6b282118 JL |
2344 | /* This says how to output an assembler line to define a global common symbol |
2345 | with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
a291e551 | 2346 | |
6b282118 JL |
2347 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \ |
2348 | { bss_section (); \ | |
2349 | assemble_name ((FILE), (NAME)); \ | |
2350 | fputs ("\t.comm ", (FILE)); \ | |
2351 | fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));} | |
a291e551 | 2352 | |
6b282118 JL |
2353 | /* This says how to output an assembler line to define a local common symbol |
2354 | with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
eabd3262 | 2355 | |
6b282118 JL |
2356 | #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \ |
2357 | { bss_section (); \ | |
2358 | fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \ | |
37d7333e | 2359 | assemble_name ((FILE), (NAME)); \ |
6b282118 JL |
2360 | fprintf ((FILE), "\n\t.block %d\n", (SIZE));} |
2361 | ||
eabd3262 RK |
2362 | /* Store in OUTPUT a string (made with alloca) containing |
2363 | an assembler-name for a local static variable named NAME. | |
2364 | LABELNO is an integer which is different for each call. */ | |
2365 | ||
2366 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2367 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ | |
2368 | sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) | |
2369 | ||
2370 | /* Define the parentheses used to group arithmetic operations | |
2371 | in assembler code. */ | |
2372 | ||
2373 | #define ASM_OPEN_PAREN "(" | |
2374 | #define ASM_CLOSE_PAREN ")" | |
2375 | ||
5921f26b JL |
2376 | /* All HP assemblers use "!" to separate logical lines. */ |
2377 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!') | |
2378 | ||
eabd3262 RK |
2379 | /* Define results of standard character escape sequences. */ |
2380 | #define TARGET_BELL 007 | |
2381 | #define TARGET_BS 010 | |
2382 | #define TARGET_TAB 011 | |
2383 | #define TARGET_NEWLINE 012 | |
2384 | #define TARGET_VT 013 | |
2385 | #define TARGET_FF 014 | |
2386 | #define TARGET_CR 015 | |
2387 | ||
2388 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ | |
2389 | ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^') | |
2390 | ||
2391 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
2392 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2393 | For `%' followed by punctuation, CODE is the punctuation and X is null. | |
2394 | ||
3f8f5a3f | 2395 | On the HP-PA, the CODE can be `r', meaning this is a register-only operand |
eabd3262 RK |
2396 | and an immediate zero should be represented as `r0'. |
2397 | ||
2398 | Several % codes are defined: | |
2399 | O an operation | |
2400 | C compare conditions | |
2401 | N extract conditions | |
2402 | M modifier to handle preincrement addressing for memory refs. | |
2403 | F modifier to handle preincrement addressing for fp memory refs */ | |
2404 | ||
2405 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2406 | ||
2407 | \f | |
2408 | /* Print a memory address as an operand to reference that memory location. */ | |
2409 | ||
2410 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
2411 | { register rtx addr = ADDR; \ | |
2412 | register rtx base; \ | |
2413 | int offset; \ | |
2414 | switch (GET_CODE (addr)) \ | |
2415 | { \ | |
2416 | case REG: \ | |
2417 | fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \ | |
2418 | break; \ | |
2419 | case PLUS: \ | |
2420 | if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \ | |
2421 | offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \ | |
2422 | else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \ | |
2423 | offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \ | |
2424 | else \ | |
2425 | abort (); \ | |
2426 | fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \ | |
2427 | break; \ | |
2428 | case LO_SUM: \ | |
0f8f654e RK |
2429 | if (!symbolic_operand (XEXP (addr, 1))) \ |
2430 | fputs ("R'", FILE); \ | |
2431 | else if (flag_pic == 0) \ | |
2432 | fputs ("RR'", FILE); \ | |
6bb36601 JL |
2433 | else if (flag_pic == 1) \ |
2434 | abort (); \ | |
2435 | else if (flag_pic == 2) \ | |
2436 | fputs ("RT'", FILE); \ | |
ad238e4b | 2437 | output_global_address (FILE, XEXP (addr, 1), 0); \ |
eabd3262 RK |
2438 | fputs ("(", FILE); \ |
2439 | output_operand (XEXP (addr, 0), 0); \ | |
2440 | fputs (")", FILE); \ | |
2441 | break; \ | |
09a1d028 RS |
2442 | case CONST_INT: \ |
2443 | fprintf (FILE, "%d(0,0)", INTVAL (addr)); \ | |
2444 | break; \ | |
eabd3262 RK |
2445 | default: \ |
2446 | output_addr_const (FILE, addr); \ | |
2447 | }} | |
2448 | ||
2449 | \f | |
09a1d028 | 2450 | /* Define functions in pa.c and used in insn-output.c. */ |
eabd3262 | 2451 | |
7254dbd4 TG |
2452 | extern char *output_and (); |
2453 | extern char *output_ior (); | |
eabd3262 RK |
2454 | extern char *output_move_double (); |
2455 | extern char *output_fp_move_double (); | |
2456 | extern char *output_block_move (); | |
eabd3262 | 2457 | extern char *output_cbranch (); |
e6878cb9 | 2458 | extern char *output_bb (); |
ad238e4b | 2459 | extern char *output_bvb (); |
6bd5174e JL |
2460 | extern char *output_dbra (); |
2461 | extern char *output_movb (); | |
b1092901 JL |
2462 | extern char *output_parallel_movb (); |
2463 | extern char *output_parallel_addb (); | |
eabd3262 | 2464 | extern char *output_return (); |
0a1daad4 | 2465 | extern char *output_call (); |
ad238e4b | 2466 | extern char *output_millicode_call (); |
eabd3262 RK |
2467 | extern char *output_mul_insn (); |
2468 | extern char *output_div_insn (); | |
2469 | extern char *output_mod_insn (); | |
a4e4b55c | 2470 | extern char *singlemove_string (); |
eabd3262 RK |
2471 | extern void output_arg_descriptor (); |
2472 | extern void output_global_address (); | |
2473 | extern struct rtx_def *legitimize_pic_address (); | |
4fc473c1 | 2474 | extern struct rtx_def *gen_cmp_fp (); |
d2a94ec0 | 2475 | extern void hppa_encode_label (); |
ba0b8436 JL |
2476 | extern int arith11_operand (); |
2477 | extern int int11_operand (); | |
2478 | extern int reg_or_cint_move_operand (); | |
2479 | extern int arith5_operand (); | |
2480 | extern int uint5_operand (); | |
2481 | extern int pic_label_operand (); | |
2482 | extern int plus_xor_ior_operator (); | |
2483 | extern int basereg_operand (); | |
2484 | extern int shadd_operand (); | |
2485 | extern int arith_operand (); | |
2486 | extern int read_only_operand (); | |
2487 | extern int move_operand (); | |
2488 | extern int and_operand (); | |
2489 | extern int ior_operand (); | |
2490 | extern int arith32_operand (); | |
2491 | extern int uint32_operand (); | |
2492 | extern int reg_or_nonsymb_mem_operand (); | |
2493 | extern int reg_or_0_operand (); | |
2494 | extern int reg_or_0_or_nonsymb_mem_operand (); | |
2495 | extern int pre_cint_operand (); | |
2496 | extern int post_cint_operand (); | |
2497 | extern int div_operand (); | |
2498 | extern int int5_operand (); | |
2499 | extern int movb_comparison_operator (); | |
2500 | extern int ireg_or_int5_operand (); | |
2501 | extern int fmpyaddoperands (); | |
2502 | extern int fmpysuboperands (); | |
2503 | extern int call_operand_address (); | |
2504 | extern int cint_ok_for_move (); | |
2505 | extern int ior_operand (); | |
2506 | extern void emit_bcond_fp (); | |
2507 | extern int emit_move_sequence (); | |
2508 | extern int emit_hpdiv_const (); | |
2509 | extern void hppa_expand_prologue (); | |
2510 | extern void hppa_expand_epilogue (); | |
2511 | extern int hppa_can_use_return_insn_p (); | |
2512 | extern int is_function_label_plus_const (); | |
2513 | extern int jump_in_call_delay (); | |
2514 | ||
81f433e4 | 2515 | |
e99d6592 MS |
2516 | /* Declare functions defined in pa.c and used in templates. */ |
2517 | ||
2518 | extern struct rtx_def *return_addr_rtx (); | |
2519 | ||
a65c4284 | 2520 | /* We want __gcc_plt_call to appear in every program built by |
185496bb RK |
2521 | gcc, so we make a reference to it out of __main. |
2522 | We use the asm statement to fool the optimizer into not | |
2523 | removing the dead (but important) initialization of | |
2524 | REFERENCE. */ | |
2525 | ||
bbe79f84 MS |
2526 | #define DO_GLOBAL_DTORS_BODY \ |
2527 | do { \ | |
2528 | extern void __gcc_plt_call (); \ | |
2529 | void (*reference)() = &__gcc_plt_call; \ | |
2530 | func_ptr *p; \ | |
2531 | __asm__ ("" : : "r" (reference)); \ | |
2532 | for (p = __DTOR_LIST__ + 1; *p; ) \ | |
2533 | (*p++) (); \ | |
ffa8b829 | 2534 | } while (0) |
bbe79f84 | 2535 | |
e99d6592 MS |
2536 | /* Find the return address associated with the frame given by |
2537 | FRAMEADDR. */ | |
2538 | #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ | |
2539 | (return_addr_rtx (COUNT, FRAMEADDR)) | |
bbe79f84 MS |
2540 | |
2541 | /* Used to mask out junk bits from the return address, such as | |
2542 | processor state, interrupt status, condition codes and the like. */ | |
e99d6592 MS |
2543 | #define MASK_RETURN_ADDR \ |
2544 | /* The privilege level is in the two low order bits, mask em out \ | |
bbe79f84 MS |
2545 | of the return address. */ \ |
2546 | (GEN_INT (0xfffffffc)) | |
27a36778 MS |
2547 | |
2548 | /* The number of Pmode words for the setjmp buffer. */ | |
2549 | #define JMP_BUF_SIZE 50 |