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eabd3262 1/* Definitions of target machine for GNU compiler, for the HP Spectrum.
cbe34bb5 2 Copyright (C) 1992-2017 Free Software Foundation, Inc.
8b109b37 3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
eabd3262
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4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
6
b7849684 7This file is part of GCC.
eabd3262 8
b7849684 9GCC is free software; you can redistribute it and/or modify
eabd3262 10it under the terms of the GNU General Public License as published by
2f83c7d6 11the Free Software Foundation; either version 3, or (at your option)
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12any later version.
13
b7849684 14GCC is distributed in the hope that it will be useful,
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15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
2f83c7d6
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20along with GCC; see the file COPYING3. If not see
21<http://www.gnu.org/licenses/>. */
eabd3262 22
279c9bde 23/* For long call handling. */
a02aa5b0 24extern unsigned long total_code_bytes;
279c9bde 25
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26#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
27
66617831 28#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
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29
30/* Generate code for the HPPA 2.0 architecture in 64bit mode. */
31#ifndef TARGET_64BIT
32#define TARGET_64BIT 0
33#endif
ea3bfbfe 34
fe19a83d 35/* Generate code for ELF32 ABI. */
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36#ifndef TARGET_ELF32
37#define TARGET_ELF32 0
38#endif
39
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40/* Generate code for SOM 32bit ABI. */
41#ifndef TARGET_SOM
42#define TARGET_SOM 0
43#endif
44
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45/* HP-UX UNIX features. */
46#ifndef TARGET_HPUX
47#define TARGET_HPUX 0
48#endif
49
50/* HP-UX 10.10 UNIX 95 features. */
51#ifndef TARGET_HPUX_10_10
52#define TARGET_HPUX_10_10 0
53#endif
54
dfcb2b51
SE
55/* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */
56#ifndef TARGET_HPUX_11
57#define TARGET_HPUX_11 0
58#endif
59
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60/* HP-UX 11i multibyte and UNIX 98 extensions. */
61#ifndef TARGET_HPUX_11_11
62#define TARGET_HPUX_11_11 0
63#endif
64
4eec64ff
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65/* HP-UX 11i multibyte and UNIX 2003 extensions. */
66#ifndef TARGET_HPUX_11_31
67#define TARGET_HPUX_11_31 0
68#endif
69
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70/* HP-UX long double library. */
71#ifndef HPUX_LONG_DOUBLE_LIBRARY
72#define HPUX_LONG_DOUBLE_LIBRARY 0
73#endif
74
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75/* Linux kernel atomic operation support. */
76#ifndef TARGET_SYNC_LIBCALL
77#define TARGET_SYNC_LIBCALL 0
78#endif
79
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80/* The following three defines are potential target switches. The current
81 defines are optimal given the current capabilities of GAS and GNU ld. */
82
83/* Define to a C expression evaluating to true to use long absolute calls.
84 Currently, only the HP assembler and SOM linker support long absolute
85 calls. They are used only in non-pic code. */
86#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
87
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88/* Define to a C expression evaluating to true to use long PIC symbol
89 difference calls. Long PIC symbol difference calls are only used with
90 the HP assembler and linker. The HP assembler detects this instruction
91 sequence and treats it as long pc-relative call. Currently, GAS only
92 allows a difference of two symbols in the same subspace, and it doesn't
93 detect the sequence as a pc-relative call. */
94#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
95
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96/* Define to a C expression evaluating to true to use SOM secondary
97 definition symbols for weak support. Linker support for secondary
98 definition symbols is buggy prior to HP-UX 11.X. */
99#define TARGET_SOM_SDEF 0
100
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101/* Define to a C expression evaluating to true to save the entry value
102 of SP in the current frame marker. This is normally unnecessary.
103 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
104 HP compilers don't use this flag but it is supported by the assembler.
105 We set this flag to indicate that register %r3 has been saved at the
106 start of the frame. Thus, when the HP unwind library is used, we
107 need to generate additional code to save SP into the frame marker. */
108#define TARGET_HPUX_UNWIND_LIBRARY 0
109
233c0fef 110#ifndef TARGET_DEFAULT
f4000c0b 111#define TARGET_DEFAULT MASK_GAS
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112#endif
113
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114#ifndef TARGET_CPU_DEFAULT
115#define TARGET_CPU_DEFAULT 0
116#endif
117
806bf413 118#ifndef TARGET_SCHED_DEFAULT
66617831 119#define TARGET_SCHED_DEFAULT PROCESSOR_8000
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120#endif
121
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122/* Support for a compile-time default CPU, et cetera. The rules are:
123 --with-schedule is ignored if -mschedule is specified.
124 --with-arch is ignored if -march is specified. */
125#define OPTION_DEFAULT_SPECS \
126 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
127 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
128
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129/* Specify the dialect of assembler to use. New mnemonics is dialect one
130 and the old mnemonics are dialect zero. */
131#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
132
ca11c37c 133/* Override some settings from dbxelf.h. */
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134
135/* We do not have to be compatible with dbx, so we enable gdb extensions
136 by default. */
794b7f56 137#define DEFAULT_GDB_EXTENSIONS 1
233c0fef 138
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139/* This used to be zero (no max length), but big enums and such can
140 cause huge strings which killed gas.
141
142 We also have to avoid lossage in dbxout.c -- it does not compute the
143 string size accurately, so we are real conservative here. */
144#undef DBX_CONTIN_LENGTH
145#define DBX_CONTIN_LENGTH 3000
75600ead 146
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147/* GDB always assumes the current function's frame begins at the value
148 of the stack pointer upon entry to the current function. Accessing
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149 local variables and parameters passed on the stack is done using the
150 base of the frame + an offset provided by GCC.
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151
152 For functions which have frame pointers this method works fine;
153 the (frame pointer) == (stack pointer at function entry) and GCC provides
154 an offset relative to the frame pointer.
155
156 This loses for functions without a frame pointer; GCC provides an offset
157 which is relative to the stack pointer after adjusting for the function's
158 frame size. GDB would prefer the offset to be relative to the value of
159 the stack pointer at the function's entry. Yuk! */
160#define DEBUGGER_AUTO_OFFSET(X) \
161 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
ae9d61ab 162 + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
2e7e7121 163
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164#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
165 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
ae9d61ab 166 + (frame_pointer_needed ? 0 : pa_compute_frame_size (get_frame_size (), 0)))
6a5c0a8e 167
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168#define TARGET_CPU_CPP_BUILTINS() \
169do { \
170 builtin_assert("cpu=hppa"); \
171 builtin_assert("machine=hppa"); \
172 builtin_define("__hppa"); \
173 builtin_define("__hppa__"); \
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174 if (TARGET_PA_20) \
175 builtin_define("_PA_RISC2_0"); \
176 else if (TARGET_PA_11) \
177 builtin_define("_PA_RISC1_1"); \
178 else \
179 builtin_define("_PA_RISC1_0"); \
180} while (0)
181
182/* An old set of OS defines for various BSD-like systems. */
183#define TARGET_OS_CPP_BUILTINS() \
184 do \
185 { \
186 builtin_define_std ("REVARGV"); \
187 builtin_define_std ("hp800"); \
188 builtin_define_std ("hp9000"); \
189 builtin_define_std ("hp9k8"); \
04df6730 190 if (!c_dialect_cxx () && !flag_iso) \
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191 builtin_define ("hppa"); \
192 builtin_define_std ("spectrum"); \
193 builtin_define_std ("unix"); \
194 builtin_assert ("system=bsd"); \
195 builtin_assert ("system=unix"); \
196 } \
197 while (0)
233c0fef 198
233c0fef 199#define CC1_SPEC "%{pg:} %{p:}"
5a1c10de 200
ad238e4b 201#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
233c0fef 202
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203/* We don't want -lg. */
204#ifndef LIB_SPEC
205#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
206#endif
207
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208/* Make gcc agree with <machine/ansi.h> */
209
210#define SIZE_TYPE "unsigned int"
211#define PTRDIFF_TYPE "int"
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212#define WCHAR_TYPE "unsigned int"
213#define WCHAR_TYPE_SIZE 32
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214\f
215/* target machine storage layout */
d1b38208 216typedef struct GTY(()) machine_function
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217{
218 /* Flag indicating that a .NSUBSPA directive has been output for
219 this function. */
220 int in_nsubspa;
221} machine_function;
eabd3262 222
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223/* Define this macro if it is advisable to hold scalars in registers
224 in a wider mode than that declared by the program. In such cases,
225 the value is constrained to be within the bounds of the declared
226 type, but kept valid in the wider mode. The signedness of the
227 extension may differ from that of the type. */
228
229#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
230 if (GET_MODE_CLASS (MODE) == MODE_INT \
d7735a07 231 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
690d4228 232 (MODE) = word_mode;
9f9fba36 233
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234/* Define this if most significant bit is lowest numbered
235 in instructions that operate on numbered bit-fields. */
236#define BITS_BIG_ENDIAN 1
237
238/* Define this if most significant byte of a word is the lowest numbered. */
23643037 239/* That is true on the HP-PA. */
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240#define BYTES_BIG_ENDIAN 1
241
242/* Define this if most significant word of a multiword number is lowest
243 numbered. */
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244#define WORDS_BIG_ENDIAN 1
245
520babc7 246#define MAX_BITS_PER_WORD 64
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247
248/* Width of a word, in units (bytes). */
520babc7 249#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
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250
251/* Minimum number of units in a word. If this is undefined, the default
252 is UNITS_PER_WORD. Otherwise, it is the constant value that is the
253 smallest value that UNITS_PER_WORD can have at run-time.
254
255 FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
256 building of various TImode routines in libgcc. The HP runtime
257 specification doesn't provide the alignment requirements and calling
258 conventions for TImode variables. */
520babc7 259#define MIN_UNITS_PER_WORD 4
eabd3262 260
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261/* The widest floating point format supported by the hardware. Note that
262 setting this influences some Ada floating point type sizes, currently
263 required for GNAT to operate properly. */
264#define WIDEST_HARDWARE_FP_SIZE 64
265
eabd3262 266/* Allocation boundary (in *bits*) for storing arguments in argument list. */
cb16fe9f 267#define PARM_BOUNDARY BITS_PER_WORD
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268
269/* Largest alignment required for any stack parameter, in bits.
270 Don't define this if it is equal to PARM_BOUNDARY */
d6567b3a 271#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
eabd3262 272
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273/* Boundary (in *bits*) on which stack pointer is always aligned;
274 certain optimizations in combine depend on this.
275
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276 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
277 the stack on the 32 and 64-bit ports, respectively. However, we
278 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
279 in main. Thus, we treat the former as the preferred alignment. */
d6567b3a 280#define STACK_BOUNDARY BIGGEST_ALIGNMENT
b0d7ef9a 281#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
79109502 282
eabd3262 283/* Allocation boundary (in *bits*) for the code of a function. */
d6567b3a 284#define FUNCTION_BOUNDARY BITS_PER_WORD
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285
286/* Alignment of field after `int : 0' in a structure. */
287#define EMPTY_FIELD_BOUNDARY 32
288
289/* Every structure's size must be a multiple of this. */
290#define STRUCTURE_SIZE_BOUNDARY 8
291
43a88a8c 292/* A bit-field declared as `int' forces `int' alignment for the struct. */
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293#define PCC_BITFIELD_TYPE_MATTERS 1
294
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295/* No data type wants to be aligned rounder than this. The long double
296 type has 16-byte alignment on the 64-bit target even though it was never
297 implemented in hardware. The software implementation only needs 8-byte
2bc99a1a 298 alignment. This matches the biggest alignment of the HP compilers. */
d6567b3a 299#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
eabd3262 300
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301/* Alignment, in bits, a C conformant malloc implementation has to provide.
302 The HP-UX malloc implementation provides a default alignment of 8 bytes.
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303 It should be 16 bytes on the 64-bit target since long double has 16-byte
304 alignment. It can be increased with mallopt but it's non critical since
305 long double was never implemented in hardware. The glibc implementation
306 currently provides 8-byte alignment. It should be 16 bytes since various
307 POSIX types such as pthread_mutex_t require 16-byte alignment. Again,
308 this is non critical since 16-byte alignment is no longer needed for
309 atomic operations. */
310#define MALLOC_ABI_ALIGNMENT (TARGET_SOM ? 64 : 128)
df74f099 311
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312/* Make arrays of chars word-aligned for the same reasons. */
313#define DATA_ALIGNMENT(TYPE, ALIGN) \
314 (TREE_CODE (TYPE) == ARRAY_TYPE \
315 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
316 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
317
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318/* Set this nonzero if move instructions will actually fail to work
319 when given unaligned data. */
320#define STRICT_ALIGNMENT 1
321
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322/* Specify the registers used for certain standard purposes.
323 The values of these macros are register numbers. */
324
3f8f5a3f 325/* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
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326/* #define PC_REGNUM */
327
328/* Register to use for pushing function arguments. */
329#define STACK_POINTER_REGNUM 30
330
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331/* Fixed register for local variable access. Always eliminated. */
332#define FRAME_POINTER_REGNUM (TARGET_64BIT ? 61 : 89)
333
eabd3262 334/* Base register for access to local variables of the function. */
bc707992 335#define HARD_FRAME_POINTER_REGNUM 3
eabd3262 336
b5395c33
SE
337/* Don't allow hard registers to be renamed into r2 unless r2
338 is already live or already being saved (due to eh). */
339
340#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
e3b5732b 341 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
b5395c33 342
eabd3262 343/* Base register for access to arguments of the function. */
747e2d0e 344#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
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345
346/* Register in which static-chain is passed to a function. */
747e2d0e 347#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
eabd3262 348
3cf7104e 349/* Register used to address the offset table for position-independent
eabd3262 350 data references. */
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351#define PIC_OFFSET_TABLE_REGNUM \
352 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
eabd3262 353
6bb36601 354#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
eabd3262 355
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356/* Function to return the rtx used to save the pic offset table register
357 across function calls. */
984514ac 358extern rtx hppa_pic_save_rtx (void);
eabd3262 359
451d86c2 360#define DEFAULT_PCC_STRUCT_RETURN 0
520babc7 361
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362/* Register in which address to store a structure value
363 is passed to a function. */
3f12cd9b 364#define PA_STRUCT_VALUE_REGNUM 28
e25724d8 365
bc707992
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366/* Definitions for register eliminations.
367
368 We have two registers that can be eliminated. First, the frame pointer
369 register can often be eliminated in favor of the stack pointer register.
370 Secondly, the argument pointer register can always be eliminated in the
371 32-bit runtimes. */
372
373/* This is an array of structures. Each structure initializes one pair
374 of eliminable registers. The "from" register number is given first,
375 followed by "to". Eliminations of the same "from" register are listed
376 in order of preference.
377
378 The argument pointer cannot be eliminated in the 64-bit runtime. It
379 is the same register as the hard frame pointer in the 32-bit runtime.
380 So, it does not need to be listed. */
381#define ELIMINABLE_REGS \
382{{ HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
383 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
384 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM} }
385
386/* Define the offset between two registers, one to be eliminated,
387 and the other its replacement, at the start of a routine. */
388#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
389 ((OFFSET) = pa_initial_elimination_offset(FROM, TO))
390
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AM
391/* Describe how we implement __builtin_eh_return. */
392#define EH_RETURN_DATA_REGNO(N) \
47a4976f 393 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
e25724d8 394#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
16c16a24 395#define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
823fbbce 396
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397/* Offset from the frame pointer register value to the top of stack. */
398#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
399
bc707992
JDA
400/* The maximum number of hard registers that can be saved in the call
401 frame. The soft frame pointer is not included. */
402#define DWARF_FRAME_REGISTERS (FIRST_PSEUDO_REGISTER - 1)
403
9fb1c9db
JDA
404/* A C expression whose value is RTL representing the location of the
405 incoming return address at the beginning of any function, before the
406 prologue. You only need to define this macro if you want to support
407 call frame debugging information like that provided by DWARF 2. */
408#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
409#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
410
411/* A C expression whose value is an integer giving a DWARF 2 column
412 number that may be used as an alternate return column. This should
413 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
414 register, but an alternate column needs to be used for signal frames.
415
416 Column 0 is not used but unfortunately its register size is set to
417 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
bc707992 418#define DWARF_ALT_FRAME_RETURN_COLUMN (FIRST_PSEUDO_REGISTER - 1)
9fb1c9db
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419
420/* This macro chooses the encoding of pointers embedded in the exception
421 handling sections. If at all possible, this should be defined such
422 that the exception handling section will not require dynamic relocations,
423 and so may be read-only.
424
425 Because the HP assembler auto aligns, it is necessary to use
426 DW_EH_PE_aligned. It's not possible to make the data read-only
427 on the HP-UX SOM port since the linker requires fixups for label
428 differences in different sections to be word aligned. However,
429 the SOM linker can do unaligned fixups for absolute pointers.
430 We also need aligned pointers for global and function pointers.
431
432 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
433 fixups, the runtime doesn't have a consistent relationship between
434 text and data for dynamically loaded objects. Thus, it's not possible
435 to use pc-relative encoding for pointers on this target. It may be
436 possible to use segment relative encodings but GAS doesn't currently
437 have a mechanism to generate these encodings. For other targets, we
438 use pc-relative encoding for pointers. If the pointer might require
439 dynamic relocation, we make it indirect. */
440#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
441 (TARGET_GAS && !TARGET_HPUX \
442 ? (DW_EH_PE_pcrel \
443 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
444 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
445 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
446 ? DW_EH_PE_aligned : DW_EH_PE_absptr))
447
448/* Handle special EH pointer encodings. Absolute, pc-relative, and
449 indirect are handled automatically. We output pc-relative, and
450 indirect pc-relative ourself since we need some special magic to
451 generate pc-relative relocations, and to handle indirect function
452 pointers. */
453#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
454 do { \
455 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
456 { \
457 fputs (integer_asm_op (SIZE, FALSE), FILE); \
458 if ((ENCODING) & DW_EH_PE_indirect) \
ae9d61ab 459 output_addr_const (FILE, pa_get_deferred_plabel (ADDR)); \
9fb1c9db
JDA
460 else \
461 assemble_name (FILE, XSTR ((ADDR), 0)); \
462 fputs ("+8-$PIC_pcrel$0", FILE); \
463 goto DONE; \
464 } \
465 } while (0)
eabd3262 466\f
eabd3262 467
88624c0e
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468/* The class value for index registers, and the one for base regs. */
469#define INDEX_REG_CLASS GENERAL_REGS
470#define BASE_REG_CLASS GENERAL_REGS
471
472#define FP_REG_CLASS_P(CLASS) \
473 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
474
475/* True if register is floating-point. */
476#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
477
4b0d3cbe
MM
478#define MAYBE_FP_REG_CLASS_P(CLASS) \
479 reg_classes_intersect_p ((CLASS), FP_REGS)
480
eabd3262
RK
481\f
482/* Stack layout; function entry, exit and calling. */
483
484/* Define this if pushing a word on the stack
485 makes the stack pointer a smaller address. */
486/* #define STACK_GROWS_DOWNWARD */
487
488/* Believe it or not. */
376bddab 489#define ARGS_GROW_DOWNWARD 1
eabd3262 490
a4d05547 491/* Define this to nonzero if the nominal address of the stack frame
eabd3262
RK
492 is at the high-address end of the local variables;
493 that is, each additional local variable allocated
494 goes at a more negative offset in the frame. */
f62c8a5c 495#define FRAME_GROWS_DOWNWARD 0
eabd3262
RK
496
497/* Offset within stack frame to start allocating local variables at.
498 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
499 first local allocated. Otherwise, it is the offset to the BEGINNING
95f3f59e
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500 of the first local allocated.
501
502 On the 32-bit ports, we reserve one slot for the previous frame
503 pointer and one fill slot. The fill slot is for compatibility
504 with HP compiled programs. On the 64-bit ports, we reserve one
505 slot for the previous frame pointer. */
506#define STARTING_FRAME_OFFSET 8
507
508/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
509 of the stack. The default is to align it to STACK_BOUNDARY. */
510#define STACK_ALIGNMENT_NEEDED 0
eabd3262
RK
511
512/* If we generate an insn to push BYTES bytes,
513 this says how many the stack pointer really advances by.
3f8f5a3f 514 On the HP-PA, don't define this because there are no push insns. */
eabd3262
RK
515/* #define PUSH_ROUNDING(BYTES) */
516
517/* Offset of first parameter from the argument pointer register value.
518 This value will be negated because the arguments grow down.
519 Also note that on STACK_GROWS_UPWARD machines (such as this one)
520 this is the distance from the frame pointer to the end of the first
521 argument, not it's beginning. To get the real offset of the first
8c417c25 522 argument, the size of the argument must be added. */
eabd3262 523
520babc7 524#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
eabd3262 525
eabd3262
RK
526/* When a parameter is passed in a register, stack space is still
527 allocated for it. */
520babc7 528#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
eabd3262
RK
529
530/* Define this if the above stack space is to be considered part of the
531 space allocated by the caller. */
81464b2c 532#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
eabd3262
RK
533
534/* Keep the stack pointer constant throughout the function.
535 This is both an optimization and a necessity: longjmp
536 doesn't behave itself when the stack pointer moves within
537 the function! */
f73ad30e 538#define ACCUMULATE_OUTGOING_ARGS 1
5a1c10de
TG
539
540/* The weird HPPA calling conventions require a minimum of 48 bytes on
eabd3262
RK
541 the stack: 16 bytes for register saves, and 32 bytes for magic.
542 This is the difference between the logical top of stack and the
685d0e07
JDA
543 actual sp.
544
545 On the 64-bit port, the HP C compiler allocates a 48-byte frame
546 marker, although the runtime documentation only describes a 16
547 byte marker. For compatibility, we allocate 48 bytes. */
520babc7 548#define STACK_POINTER_OFFSET \
38173d38 549 (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
eabd3262
RK
550
551#define STACK_DYNAMIC_OFFSET(FNDECL) \
520babc7
JL
552 (TARGET_64BIT \
553 ? (STACK_POINTER_OFFSET) \
38173d38 554 : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
eabd3262 555
eabd3262
RK
556\f
557/* Define a data type for recording info about an argument list
558 during the scan of that argument list. This data type should
559 hold all necessary information about the function itself
560 and about the args processed so far, enough to enable macros
561 such as FUNCTION_ARG to determine where the next arg should go.
562
c328adfa 563 On the HP-PA, the WORDS field holds the number of words
eabd3262 564 of arguments scanned so far (including the invisible argument,
c328adfa
JDA
565 if any, which holds the structure-value-address). Thus, 4 or
566 more means all following args should go on the stack.
567
568 The INCOMING field tracks whether this is an "incoming" or
569 "outgoing" argument.
570
026c3cfd 571 The INDIRECT field indicates whether this is an indirect
c328adfa
JDA
572 call or not.
573
574 The NARGS_PROTOTYPE field indicates that an argument does not
575 have a prototype when it less than or equal to 0. */
576
577struct hppa_args {int words, nargs_prototype, incoming, indirect; };
2822d96e
JL
578
579#define CUMULATIVE_ARGS struct hppa_args
eabd3262
RK
580
581/* Initialize a variable CUM of type CUMULATIVE_ARGS
582 for a call to a function whose data type is FNTYPE.
2822d96e 583 For a library call, FNTYPE is 0. */
eabd3262 584
0f6937fe 585#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
2822d96e 586 (CUM).words = 0, \
c328adfa 587 (CUM).incoming = 0, \
563a317a 588 (CUM).indirect = (FNTYPE) && !(FNDECL), \
f4da8dce 589 (CUM).nargs_prototype = (FNTYPE && prototype_p (FNTYPE) \
2822d96e
JL
590 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
591 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
3f12cd9b 592 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
2822d96e
JL
593 : 0)
594
595
596
597/* Similar, but when scanning the definition of a procedure. We always
bd625e21 598 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
2822d96e
JL
599
600#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
601 (CUM).words = 0, \
c328adfa 602 (CUM).incoming = 1, \
a5bbd4b8 603 (CUM).indirect = 0, \
2822d96e 604 (CUM).nargs_prototype = 1000
eabd3262 605
9dff28ab
JDA
606/* Figure out the size in words of the function argument. The size
607 returned by this macro should always be greater than zero because
608 we pass variable and zero sized objects by reference. */
eabd3262
RK
609
610#define FUNCTION_ARG_SIZE(MODE, TYPE) \
d7735a07 611 ((((MODE) != BLKmode \
6e9c53b4 612 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
d7735a07 613 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
eabd3262 614
eabd3262
RK
615/* Determine where to put an argument to a function.
616 Value is zero to push the argument on the stack,
617 or a hard register in which to store the argument.
618
619 MODE is the argument's machine mode.
620 TYPE is the data type of the argument (as a tree).
621 This is null for libcalls where that information may
622 not be available.
623 CUM is a variable of type CUMULATIVE_ARGS which gives info about
624 the preceding args and about the function being called.
625 NAMED is nonzero if this argument is a named parameter
2822d96e 626 (otherwise it is an extra parameter matching an ellipsis).
eabd3262 627
2822d96e 628 On the HP-PA the first four words of args are normally in registers
eabd3262 629 and the rest are pushed. But any arg that won't entirely fit in regs
3d247e85
TM
630 is pushed.
631
99977c61
RS
632 Arguments passed in registers are either 1 or 2 words long.
633
634 The caller must make a distinction between calls to explicitly named
635 functions and calls through pointers to functions -- the conventions
636 are different! Calls through pointers to functions only use general
279c9bde 637 registers for the first four argument words.
eabd3262 638
2822d96e
JL
639 Of course all this is different for the portable runtime model
640 HP wants everyone to use for ELF. Ugh. Here's a quick description
641 of how it's supposed to work.
642
643 1) callee side remains unchanged. It expects integer args to be
644 in the integer registers, float args in the float registers and
645 unnamed args in integer registers.
646
647 2) caller side now depends on if the function being called has
648 a prototype in scope (rather than if it's being called indirectly).
649
650 2a) If there is a prototype in scope, then arguments are passed
651 according to their type (ints in integer registers, floats in float
652 registers, unnamed args in integer registers.
653
654 2b) If there is no prototype in scope, then floating point arguments
655 are passed in both integer and float registers. egad.
656
657 FYI: The portable parameter passing conventions are almost exactly like
658 the standard parameter passing conventions on the RS6000. That's why
659 you'll see lots of similar code in rs6000.h. */
a40ed31b 660
7ea18c08
JDA
661/* Specify padding for the last element of a block move between registers
662 and memory.
663
664 The 64-bit runtime specifies that objects need to be left justified
665 (i.e., the normal justification for a big endian target). The 32-bit
666 runtime specifies right justification for objects smaller than 64 bits.
667 We use a DImode register in the parallel for 5 to 7 byte structures
668 so that there is only one element. This allows the object to be
669 correctly padded. */
ae8c9754 670#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
76b0cbf8 671 targetm.calls.function_arg_padding ((MODE), (TYPE))
7ea18c08 672
eabd3262 673\f
1c7a8112 674/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
f6f315fe
AM
675 as assembly via FUNCTION_PROFILER. Just output a local label.
676 We can't use the function label because the GAS SOM target can't
677 handle the difference of a global symbol and a local symbol. */
eabd3262 678
f6f315fe
AM
679#ifndef FUNC_BEGIN_PROLOG_LABEL
680#define FUNC_BEGIN_PROLOG_LABEL "LFBP"
681#endif
682
683#define FUNCTION_PROFILER(FILE, LABEL) \
4977bab6 684 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
eabd3262 685
1c7a8112 686#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
b7849684 687void hppa_profile_hook (int label_no);
eabd3262 688
8f949e7e
JDA
689/* The profile counter if emitted must come before the prologue. */
690#define PROFILE_BEFORE_PROLOGUE 1
691
3674b34d
JDA
692/* We never want final.c to emit profile counters. When profile
693 counters are required, we have to defer emitting them to the end
694 of the current file. */
695#define NO_PROFILE_COUNTERS 1
696
eabd3262
RK
697/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
698 the stack pointer does not matter. The value is tested only in
699 functions that have frame pointers.
700 No definition is equivalent to always zero. */
701
702extern int may_call_alloca;
eabd3262
RK
703
704#define EXIT_IGNORE_STACK \
705 (get_frame_size () != 0 \
e3b5732b 706 || cfun->calls_alloca || crtl->outgoing_args_size)
eabd3262 707
3914c31f
JDA
708/* Length in units of the trampoline for entering a nested function. */
709
710#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
afcc28b2 711
859c146c 712/* Alignment required by the trampoline. */
afcc28b2 713
859c146c 714#define TRAMPOLINE_ALIGNMENT BITS_PER_WORD
f16fe394 715
3914c31f
JDA
716/* Minimum length of a cache line. A length of 16 will work on all
717 PA-RISC processors. All PA 1.1 processors have a cache line of
718 32 bytes. Most but not all PA 2.0 processors have a cache line
719 of 64 bytes. As cache flushes are expensive and we don't support
720 PA 1.0, we use a minimum length of 32. */
721
722#define MIN_CACHELINE_SIZE 32
eabd3262 723
eabd3262 724\f
51c2de46 725/* Addressing modes, and classification of registers for them.
eabd3262 726
51c2de46
JQ
727 Using autoincrement addressing modes on PA8000 class machines is
728 not profitable. */
eabd3262 729
42a21f70
JQ
730#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
731#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
51c2de46 732
42a21f70
JQ
733#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
734#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
eabd3262
RK
735
736/* Macros to check register numbers against specific register classes. */
737
6af713e4
JDA
738/* The following macros assume that X is a hard or pseudo reg number.
739 They give nonzero only if X is a hard reg of the suitable class
eabd3262
RK
740 or a pseudo reg currently allocated to a suitable hard reg.
741 Since they use reg_renumber, they are safe only once reg_renumber
aeb9f7cf
SB
742 has been allocated, which happens in reginfo.c during register
743 allocation. */
eabd3262 744
6af713e4
JDA
745#define REGNO_OK_FOR_INDEX_P(X) \
746 ((X) && ((X) < 32 \
bc707992
JDA
747 || ((X) == FRAME_POINTER_REGNUM) \
748 || ((X) >= FIRST_PSEUDO_REGISTER \
6af713e4
JDA
749 && reg_renumber \
750 && (unsigned) reg_renumber[X] < 32)))
751#define REGNO_OK_FOR_BASE_P(X) \
752 ((X) && ((X) < 32 \
bc707992
JDA
753 || ((X) == FRAME_POINTER_REGNUM) \
754 || ((X) >= FIRST_PSEUDO_REGISTER \
6af713e4
JDA
755 && reg_renumber \
756 && (unsigned) reg_renumber[X] < 32)))
757#define REGNO_OK_FOR_FP_P(X) \
758 (FP_REGNO_P (X) \
759 || (X >= FIRST_PSEUDO_REGISTER \
760 && reg_renumber \
761 && FP_REGNO_P (reg_renumber[X])))
eabd3262
RK
762
763/* Now macros that check whether X is a register and also,
764 strictly, whether it is in a specified class.
765
38e01259 766 These macros are specific to the HP-PA, and may be used only
eabd3262
RK
767 in code for printing assembler insns and in conditions for
768 define_optimization. */
769
770/* 1 if X is an fp register. */
771
772#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
773\f
774/* Maximum number of registers that can appear in a valid memory address. */
775
776#define MAX_REGS_PER_ADDRESS 2
777
d92f4df0
JDA
778/* TLS symbolic reference. */
779#define PA_SYMBOL_REF_TLS_P(X) \
780 (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (X) != 0)
51076f96 781
901a8cea
JL
782/* Recognize any constant value that is a valid address except
783 for symbolic addresses. We get better CSE by rejecting them
6eff269e
BK
784 here and allowing hppa_legitimize_address to break them up. We
785 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
eabd3262 786
901a8cea 787#define CONSTANT_ADDRESS_P(X) \
51076f96
RC
788 ((GET_CODE (X) == LABEL_REF \
789 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
d92f4df0 790 || GET_CODE (X) == CONST_INT \
093a6c99 791 || (GET_CODE (X) == CONST && !tls_referenced_p (X)) \
6e11a328 792 || GET_CODE (X) == HIGH) \
ae9d61ab
JDA
793 && (reload_in_progress || reload_completed \
794 || ! pa_symbolic_expression_p (X)))
6eff269e 795
a4295210 796/* A C expression that is nonzero if we are using the new HP assembler. */
520babc7 797
8d913d99
AM
798#ifndef NEW_HP_ASSEMBLER
799#define NEW_HP_ASSEMBLER 0
f45ebe47 800#endif
a4295210
JDA
801
802/* The macros below define the immediate range for CONST_INTS on
803 the 64-bit port. Constants in this range can be loaded in three
804 instructions using a ldil/ldo/depdi sequence. Constants outside
805 this range are forced to the constant pool prior to reload. */
806
807#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
50fa47d9
JL
808#define MIN_LEGIT_64BIT_CONST_INT \
809 ((HOST_WIDE_INT)((unsigned HOST_WIDE_INT) -32 << 31))
a4295210
JDA
810#define LEGITIMATE_64BIT_CONST_INT_P(X) \
811 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
812
744b2d61
JDA
813/* Target flags set on a symbol_ref. */
814
815/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
816#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
817#define SYMBOL_REF_REFERENCED_P(RTX) \
818 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
819
5b281141 820/* Defines for constraints.md. */
eabd3262 821
d8f95bed
JDA
822/* Return 1 iff OP is a scaled or unscaled index address. */
823#define IS_INDEX_ADDR_P(OP) \
824 (GET_CODE (OP) == PLUS \
825 && GET_MODE (OP) == Pmode \
826 && (GET_CODE (XEXP (OP, 0)) == MULT \
827 || GET_CODE (XEXP (OP, 1)) == MULT \
828 || (REG_P (XEXP (OP, 0)) \
829 && REG_P (XEXP (OP, 1)))))
830
831/* Return 1 iff OP is a LO_SUM DLT address. */
832#define IS_LO_SUM_DLT_ADDR_P(OP) \
833 (GET_CODE (OP) == LO_SUM \
834 && GET_MODE (OP) == Pmode \
835 && REG_P (XEXP (OP, 0)) \
836 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
837 && GET_CODE (XEXP (OP, 1)) == UNSPEC)
838
6982c5d4
JDA
839/* Nonzero if 14-bit offsets can be used for all loads and stores.
840 This is not possible when generating PA 1.x code as floating point
841 loads and stores only support 5-bit offsets. Note that we do not
1a04ac2b
JDA
842 forbid the use of 14-bit offsets for integer modes. Instead, we
843 use secondary reloads to fix REG+D memory addresses for integer
844 mode floating-point loads and stores.
6982c5d4
JDA
845
846 FIXME: the ELF32 linker clobbers the LSB of the FP register number
847 in PA 2.0 floating-point insns with long displacements. This is
848 because R_PARISC_DPREL14WR and other relocations like it are not
849 yet supported by GNU ld. For now, we reject long displacements
850 on this target. */
851
852#define INT14_OK_STRICT \
853 (TARGET_SOFT_FLOAT \
854 || TARGET_DISABLE_FPREGS \
855 || (TARGET_PA_20 && !TARGET_ELF32))
856
16594451
JL
857/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
858 and check its validity for a certain class.
859 We have two alternate definitions for each of them.
860 The usual definition accepts all pseudo regs; the other rejects
861 them unless they have been allocated suitable hard regs.
16594451
JL
862
863 Most source files want to accept pseudo regs in the hope that
864 they will get allocated to the class that the insn wants them to be in.
865 Source files for reload pass need to be strict.
866 After reload, it makes no difference, since pseudo regs have
867 been eliminated by then. */
ec241c19 868
eabd3262
RK
869/* Nonzero if X is a hard reg that can be used as an index
870 or if it is a pseudo reg. */
871#define REG_OK_FOR_INDEX_P(X) \
bc707992
JDA
872 (REGNO (X) && (REGNO (X) < 32 \
873 || REGNO (X) == FRAME_POINTER_REGNUM \
874 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
6982c5d4 875
eabd3262
RK
876/* Nonzero if X is a hard reg that can be used as a base reg
877 or if it is a pseudo reg. */
878#define REG_OK_FOR_BASE_P(X) \
bc707992
JDA
879 (REGNO (X) && (REGNO (X) < 32 \
880 || REGNO (X) == FRAME_POINTER_REGNUM \
881 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
eabd3262 882
eabd3262 883/* Nonzero if X is a hard reg that can be used as an index. */
1a04ac2b 884#define STRICT_REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
6982c5d4 885
eabd3262 886/* Nonzero if X is a hard reg that can be used as a base reg. */
1a04ac2b 887#define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
eabd3262 888
520babc7 889#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
eabd3262
RK
890#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
891
520babc7 892#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
eabd3262
RK
893#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
894
f6f94d94
JDA
895#define VAL_U6_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x40)
896#define INT_U6_BITS(X) VAL_U6_BITS_P (INTVAL (X))
897
520babc7 898#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
eabd3262
RK
899#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
900
520babc7 901#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
eabd3262
RK
902#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
903
a4295210
JDA
904#if HOST_BITS_PER_WIDE_INT > 32
905#define VAL_32_BITS_P(X) \
906 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
907 < (unsigned HOST_WIDE_INT) 2 << 31)
908#else
909#define VAL_32_BITS_P(X) 1
910#endif
911#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
912
d8f95bed
JDA
913/* These are the modes that we allow for scaled indexing. */
914#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
915 ((TARGET_64BIT && (MODE) == DImode) \
916 || (MODE) == SImode \
917 || (MODE) == HImode \
6982c5d4
JDA
918 || (MODE) == SFmode \
919 || (MODE) == DFmode)
d8f95bed
JDA
920
921/* These are the modes that we allow for unscaled indexing. */
922#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
923 ((TARGET_64BIT && (MODE) == DImode) \
924 || (MODE) == SImode \
925 || (MODE) == HImode \
926 || (MODE) == QImode \
6982c5d4
JDA
927 || (MODE) == SFmode \
928 || (MODE) == DFmode)
d8f95bed 929
1a04ac2b
JDA
930/* Try a machine-dependent way of reloading an illegitimate address
931 operand. If we find one, push the reload and jump to WIN. This
932 macro is used in only one place: `find_reloads_address' in reload.c. */
933
934#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND_L, WIN) \
935do { \
936 rtx new_ad = pa_legitimize_reload_address (AD, MODE, OPNUM, TYPE, IND_L); \
937 if (new_ad) \
938 { \
939 AD = new_ad; \
940 goto WIN; \
941 } \
cc46ae8e
JL
942} while (0)
943
eabd3262 944\f
ae46c4e0 945#define TARGET_ASM_SELECT_SECTION pa_select_section
774acadf 946
62910663
JDA
947/* Return a nonzero value if DECL has a section attribute. */
948#define IN_NAMED_SECTION_P(DECL) \
949 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
f961457f 950 && DECL_SECTION_NAME (DECL) != NULL)
62910663 951
e7eacc8e
JL
952/* Define this macro if references to a symbol must be treated
953 differently depending on something about the variable or
954 function named by the symbol (such as what section it is in).
955
956 The macro definition, if any, is executed immediately after the
957 rtl for DECL or other node is created.
958 The value of the rtl will be a `mem' whose address is a
959 `symbol_ref'.
960
961 The usual thing for this macro to do is to a flag in the
962 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
963 name string in the `symbol_ref' (if one bit is not enough
964 information).
965
966 On the HP-PA we use this to indicate if a symbol is in text or
fe19a83d 967 data space. Also, function labels need special treatment. */
e7eacc8e
JL
968
969#define TEXT_SPACE_P(DECL)\
970 (TREE_CODE (DECL) == FUNCTION_DECL \
971 || (TREE_CODE (DECL) == VAR_DECL \
972 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
ae9d61ab 973 && (! DECL_INITIAL (DECL) || ! pa_reloc_needed (DECL_INITIAL (DECL))) \
e7eacc8e 974 && !flag_pic) \
6615c446 975 || CONSTANT_CLASS_P (DECL))
e7eacc8e 976
10d17cb7 977#define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
e7eacc8e 978
cb4d476c 979/* Specify the machine mode that this machine uses for the index in the
33e67557
SB
980 tablejump instruction. We use a 32-bit absolute address for non-pic code,
981 and a 32-bit offset for 32 and 64-bit pic code. */
982#define CASE_VECTOR_MODE SImode
cb4d476c
JDA
983
984/* Jump tables must be 32-bit aligned, no matter the size of the element. */
937ac3f9
JL
985#define ADDR_VEC_ALIGN(ADDR_VEC) 2
986
eabd3262
RK
987/* Define this as 1 if `char' should by default be signed; else as 0. */
988#define DEFAULT_SIGNED_CHAR 1
989
990/* Max number of bytes we can move from memory to memory
991 in one reasonably fast instruction. */
992#define MOVE_MAX 8
993
68944452
JL
994/* Higher than the default as we prefer to use simple move insns
995 (better scheduling and delay slot filling) and because our
520babc7
JL
996 built-in block move is really a 2X unrolled loop.
997
998 Believe it or not, this has to be big enough to allow for copying all
999 arguments passed in registers to avoid infinite recursion during argument
1000 setup for a function call. Why? Consider how we copy the stack slots
1001 reserved for parameters when they may be trashed by a call. */
e04ad03d 1002#define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
68944452 1003
9a63901f
RK
1004/* Define if operations between registers always perform the operation
1005 on the full register even if a narrower mode is specified. */
9e11bfef 1006#define WORD_REGISTER_OPERATIONS 1
9a63901f
RK
1007
1008/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1009 will either zero-extend or sign-extend. The value of this macro should
1010 be the code that says which one of the two operations is implicitly
f822d252 1011 done, UNKNOWN if none. */
9a63901f 1012#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
eabd3262
RK
1013
1014/* Nonzero if access to memory by bytes is slow and undesirable. */
1015#define SLOW_BYTE_ACCESS 1
1016
eabd3262
RK
1017/* Specify the machine mode that pointers have.
1018 After generation of rtl, the compiler makes no further distinction
1019 between pointers and any other objects of this machine mode. */
0a16ce6f 1020#define Pmode word_mode
eabd3262 1021
eabd3262
RK
1022/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1023 return the mode to be used for the comparison. For floating-point, CCFPmode
1024 should be used. CC_NOOVmode should be used when the first operand is a
1025 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1026 needed. */
b565a316 1027#define SELECT_CC_MODE(OP,X,Y) \
eabd3262
RK
1028 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1029
1030/* A function address in a call instruction
1031 is a byte address (for indexing purposes)
1032 so give the MEM rtx a byte's mode. */
1033#define FUNCTION_MODE SImode
5a1c10de 1034
eabd3262
RK
1035/* Define this if addresses of constant functions
1036 shouldn't be put through pseudo regs where they can be cse'd.
1037 Desirable on machines where ordinary constants are expensive
1038 but a CALL with constant address is cheap. */
1e8552c2 1039#define NO_FUNCTION_CSE 1
eabd3262 1040
d969caf8 1041/* Define this to be nonzero if shift instructions ignore all but the low-order
fe19a83d 1042 few bits. */
d969caf8 1043#define SHIFT_COUNT_TRUNCATED 1
e061ef25 1044
3e47bea8 1045/* Adjust the cost of branches. */
3a4fd356 1046#define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
3e47bea8 1047
04664e24
RS
1048/* Handling the special cases is going to get too complicated for a macro,
1049 just call `pa_adjust_insn_length' to do the real work. */
ab11fb42
JDA
1050#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1051 ((LENGTH) = pa_adjust_insn_length ((INSN), (LENGTH)))
04664e24 1052
72abf941
JL
1053/* Millicode insns are actually function calls with some special
1054 constraints on arguments and register usage.
1055
1056 Millicode calls always expect their arguments in the integer argument
1057 registers, and always return their result in %r29 (ret1). They
7d8b1412
AM
1058 are expected to clobber their arguments, %r1, %r29, and the return
1059 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
72abf941 1060
2561a923
JL
1061 This macro tells reorg that the references to arguments and
1062 millicode calls do not appear to happen until after the millicode call.
1063 This allows reorg to put insns which set the argument registers into the
1064 delay slot of the millicode call -- thus they act more like traditional
1065 CALL_INSNs.
1066
1e5f1716 1067 Note we cannot consider side effects of the insn to be delayed because
2561a923
JL
1068 the branch and link insn will clobber the return pointer. If we happened
1069 to use the return pointer in the delay slot of the call, then we lose.
72abf941
JL
1070
1071 get_attr_type will try to recognize the given insn, so make sure to
d0ca05ef
RS
1072 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1073 in particular. */
ae9d61ab 1074#define INSN_REFERENCES_ARE_DELAYED(X) (pa_insn_refs_are_delayed (X))
72abf941 1075
eabd3262
RK
1076\f
1077/* Control the assembler format that we output. */
1078
e08fde98
JDA
1079/* A C string constant describing how to begin a comment in the target
1080 assembler language. The compiler assumes that the comment will end at
1081 the end of the line. */
1082
1083#define ASM_COMMENT_START ";"
1084
eabd3262
RK
1085/* Output to assembler file text saying following lines
1086 may contain character constants, extra white space, comments, etc. */
1087
1088#define ASM_APP_ON ""
1089
1090/* Output to assembler file text saying following lines
1091 no longer contain unusual constructs. */
1092
1093#define ASM_APP_OFF ""
1094
eabd3262
RK
1095/* This is how to output the definition of a user-level label named NAME,
1096 such as the label on a static function or variable NAME. */
1097
179cd3d3
JDA
1098#define ASM_OUTPUT_LABEL(FILE,NAME) \
1099 do { \
1100 assemble_name ((FILE), (NAME)); \
1101 if (TARGET_GAS) \
1102 fputs (":\n", (FILE)); \
1103 else \
1104 fputc ('\n', (FILE)); \
1105 } while (0)
eabd3262 1106
eabd3262
RK
1107/* This is how to output a reference to a user-level label named NAME.
1108 `assemble_name' uses this. */
1109
1110#define ASM_OUTPUT_LABELREF(FILE,NAME) \
7830ba7b
JDA
1111 do { \
1112 const char *xname = (NAME); \
1113 if (FUNCTION_NAME_P (NAME)) \
1114 xname += 1; \
1115 if (xname[0] == '*') \
1116 xname += 1; \
1117 else \
1118 fputs (user_label_prefix, FILE); \
1119 fputs (xname, FILE); \
1120 } while (0)
eabd3262 1121
744b2d61
JDA
1122/* This how we output the symbol_ref X. */
1123
1124#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1125 do { \
1126 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
1127 assemble_name (FILE, XSTR (X, 0)); \
1128 } while (0)
1129
eabd3262
RK
1130/* This is how to store into the string LABEL
1131 the symbol_ref name of an internal numbered label where
1132 PREFIX is the class of label and NUM is the number within the class.
1133 This is suitable for output with `assemble_name'. */
1134
1135#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
e59f7d3d 1136 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
eabd3262 1137
179cd3d3
JDA
1138/* Output the definition of a compiler-generated label named NAME. */
1139
1140#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1141 do { \
1142 assemble_name_raw ((FILE), (NAME)); \
1143 if (TARGET_GAS) \
1144 fputs (":\n", (FILE)); \
1145 else \
1146 fputc ('\n', (FILE)); \
1147 } while (0)
1148
5eb99654 1149#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
e7eacc8e 1150
eabd3262 1151#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
ae9d61ab 1152 pa_output_ascii ((FILE), (P), (SIZE))
eabd3262 1153
cb4d476c 1154/* Jump tables are always placed in the text section. Technically, it
33e67557
SB
1155 is possible to put them in the readonly data section. This has the
1156 benefit of getting the table out of .text and reducing branch lengths
1157 as a result.
1158
1159 The downside is that an additional insn (addil) is needed to access
1160 the table when generating PIC code. The address difference table
1161 also has to use 32-bit pc-relative relocations. Currently, GAS does
1162 not support these relocations, although it is easily modified to do
1163 this operation.
1164
cb4d476c
JDA
1165 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1166 when using ELF GAS. A simple difference can be used when using
1167 SOM GAS or the HP assembler. The final downside is GDB complains
1168 about the nesting of the label for the table when debugging. */
eabd3262 1169
75197b37 1170#define JUMP_TABLES_IN_TEXT_SECTION 1
63671b34 1171
cb4d476c 1172/* This is how to output an element of a case-vector that is absolute. */
cface026 1173
cb4d476c 1174#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
33e67557 1175 fprintf (FILE, "\t.word L$%04d\n", VALUE)
cb4d476c
JDA
1176
1177/* This is how to output an element of a case-vector that is relative.
1178 Since we always place jump tables in the text section, the difference
1179 is absolute and requires no relocation. */
eabd3262 1180
33f7f353 1181#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
33e67557 1182 fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL)
eabd3262 1183
3ba07ad3
JDA
1184/* This is how to output an absolute case-vector. */
1185
1186#define ASM_OUTPUT_ADDR_VEC(LAB,BODY) \
1187 pa_output_addr_vec ((LAB),(BODY))
1188
1189/* This is how to output a relative case-vector. */
1190
1191#define ASM_OUTPUT_ADDR_DIFF_VEC(LAB,BODY) \
1192 pa_output_addr_diff_vec ((LAB),(BODY))
1193
cb4d476c
JDA
1194/* This is how to output an assembler line that says to advance the
1195 location counter to a multiple of 2**LOG bytes. */
eabd3262
RK
1196
1197#define ASM_OUTPUT_ALIGN(FILE,LOG) \
1198 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1199
1200#define ASM_OUTPUT_SKIP(FILE,SIZE) \
16998094 1201 fprintf (FILE, "\t.blockz " HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
78cabff8 1202 (unsigned HOST_WIDE_INT)(SIZE))
eabd3262 1203
d4482715
JDA
1204/* This says how to output an assembler line to define an uninitialized
1205 global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1206 This macro exists to properly support languages like C++ which do not
1207 have common data. */
1208
1209#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1210 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1211
6b282118
JL
1212/* This says how to output an assembler line to define a global common symbol
1213 with size SIZE (in bytes) and alignment ALIGN (in bits). */
a291e551 1214
d4482715
JDA
1215#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1216 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
a291e551 1217
6b282118 1218/* This says how to output an assembler line to define a local common symbol
d4482715
JDA
1219 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
1220 controls how the assembler definitions of uninitialized static variables
1221 are output. */
eabd3262 1222
d4482715
JDA
1223#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1224 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1225
5921f26b 1226/* All HP assemblers use "!" to separate logical lines. */
980d8882 1227#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
5921f26b 1228
eabd3262
RK
1229/* Print operand X (an rtx) in assembler syntax to file FILE.
1230 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1231 For `%' followed by punctuation, CODE is the punctuation and X is null.
1232
3f8f5a3f 1233 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
eabd3262
RK
1234 and an immediate zero should be represented as `r0'.
1235
1236 Several % codes are defined:
1237 O an operation
1238 C compare conditions
1239 N extract conditions
1240 M modifier to handle preincrement addressing for memory refs.
1241 F modifier to handle preincrement addressing for fp memory refs */
1242
ae9d61ab 1243#define PRINT_OPERAND(FILE, X, CODE) pa_print_operand (FILE, X, CODE)
eabd3262
RK
1244
1245\f
1246/* Print a memory address as an operand to reference that memory location. */
1247
1248#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
03eb45c1 1249{ rtx addr = ADDR; \
eabd3262
RK
1250 switch (GET_CODE (addr)) \
1251 { \
1252 case REG: \
d2d28085 1253 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
eabd3262
RK
1254 break; \
1255 case PLUS: \
03eb45c1
NS
1256 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
1257 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
1258 reg_names [REGNO (XEXP (addr, 0))]); \
eabd3262
RK
1259 break; \
1260 case LO_SUM: \
519104fe 1261 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
0f8f654e
RK
1262 fputs ("R'", FILE); \
1263 else if (flag_pic == 0) \
1264 fputs ("RR'", FILE); \
7ee72796 1265 else \
6bb36601 1266 fputs ("RT'", FILE); \
ae9d61ab 1267 pa_output_global_address (FILE, XEXP (addr, 1), 0); \
eabd3262
RK
1268 fputs ("(", FILE); \
1269 output_operand (XEXP (addr, 0), 0); \
1270 fputs (")", FILE); \
1271 break; \
09a1d028 1272 case CONST_INT: \
4a0a75dd 1273 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
09a1d028 1274 break; \
eabd3262
RK
1275 default: \
1276 output_addr_const (FILE, addr); \
1277 }}
1278
1279\f
e99d6592
MS
1280/* Find the return address associated with the frame given by
1281 FRAMEADDR. */
1282#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
ae9d61ab 1283 (pa_return_addr_rtx (COUNT, FRAMEADDR))
bbe79f84
MS
1284
1285/* Used to mask out junk bits from the return address, such as
1286 processor state, interrupt status, condition codes and the like. */
e99d6592
MS
1287#define MASK_RETURN_ADDR \
1288 /* The privilege level is in the two low order bits, mask em out \
bbe79f84 1289 of the return address. */ \
2a2ea744 1290 (GEN_INT (-4))
27a36778 1291
bf97847b
JDA
1292/* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
1293#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1294 "__canonicalize_funcptr_for_compare"
51076f96
RC
1295
1296#ifdef HAVE_AS_TLS
1297#undef TARGET_HAVE_TLS
1298#define TARGET_HAVE_TLS true
1299#endif
a43434ff
JDA
1300
1301/* The maximum offset in bytes for a PA 1.X pc-relative call to the
1302 head of the preceding stub table. The selected offsets have been
1303 chosen so that approximately one call stub is allocated for every
1304 86.7 instructions. A long branch stub is two instructions when
1305 not generating PIC code. For HP-UX and ELF targets, PIC stubs are
1306 seven and four instructions, respectively. */
1307#define MAX_PCREL17F_OFFSET \
1308 (flag_pic ? (TARGET_HPUX ? 198164 : 221312) : 240000)