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eabd3262 | 1 | /* Definitions of target machine for GNU compiler, for the HP Spectrum. |
cf011243 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, |
de2a399d | 3 | 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
8b109b37 | 4 | Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support |
eabd3262 RK |
5 | and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for |
6 | Software Science at the University of Utah. | |
7 | ||
b7849684 | 8 | This file is part of GCC. |
eabd3262 | 9 | |
b7849684 | 10 | GCC is free software; you can redistribute it and/or modify |
eabd3262 | 11 | it under the terms of the GNU General Public License as published by |
c063dc98 | 12 | the Free Software Foundation; either version 2, or (at your option) |
eabd3262 RK |
13 | any later version. |
14 | ||
b7849684 | 15 | GCC is distributed in the hope that it will be useful, |
eabd3262 RK |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
b7849684 | 21 | along with GCC; see the file COPYING. If not, write to |
39d14dda KC |
22 | the Free Software Foundation, 51 Franklin Street, Fifth Floor, |
23 | Boston, MA 02110-1301, USA. */ | |
eabd3262 RK |
24 | |
25 | enum cmp_type /* comparison type */ | |
26 | { | |
27 | CMP_SI, /* compare integers */ | |
28 | CMP_SF, /* compare single precision floats */ | |
29 | CMP_DF, /* compare double precision floats */ | |
30 | CMP_MAX /* max comparison type */ | |
31 | }; | |
32 | ||
279c9bde | 33 | /* For long call handling. */ |
a02aa5b0 | 34 | extern unsigned long total_code_bytes; |
279c9bde | 35 | |
c47decad JL |
36 | /* Which processor to schedule for. */ |
37 | ||
38 | enum processor_type | |
39 | { | |
40 | PROCESSOR_700, | |
41 | PROCESSOR_7100, | |
42 | PROCESSOR_7100LC, | |
e14b50ce | 43 | PROCESSOR_7200, |
fae15c93 | 44 | PROCESSOR_7300, |
e14b50ce | 45 | PROCESSOR_8000 |
c47decad JL |
46 | }; |
47 | ||
a2017852 | 48 | /* For -mschedule= option. */ |
a2017852 JDA |
49 | extern enum processor_type pa_cpu; |
50 | ||
d711cf67 | 51 | /* For -munix= option. */ |
d711cf67 JDA |
52 | extern int flag_pa_unix; |
53 | ||
a2017852 JDA |
54 | #define pa_cpu_attr ((enum attr_cpu)pa_cpu) |
55 | ||
eabd3262 RK |
56 | /* Print subsidiary information on the compiler version in use. */ |
57 | ||
e236a9ff | 58 | #define TARGET_VERSION fputs (" (hppa)", stderr); |
eabd3262 | 59 | |
66617831 | 60 | #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20) |
520babc7 JL |
61 | |
62 | /* Generate code for the HPPA 2.0 architecture in 64bit mode. */ | |
63 | #ifndef TARGET_64BIT | |
64 | #define TARGET_64BIT 0 | |
65 | #endif | |
ea3bfbfe | 66 | |
fe19a83d | 67 | /* Generate code for ELF32 ABI. */ |
e25724d8 AM |
68 | #ifndef TARGET_ELF32 |
69 | #define TARGET_ELF32 0 | |
70 | #endif | |
71 | ||
3d9268b6 JDA |
72 | /* Generate code for SOM 32bit ABI. */ |
73 | #ifndef TARGET_SOM | |
74 | #define TARGET_SOM 0 | |
75 | #endif | |
76 | ||
d711cf67 JDA |
77 | /* HP-UX UNIX features. */ |
78 | #ifndef TARGET_HPUX | |
79 | #define TARGET_HPUX 0 | |
80 | #endif | |
81 | ||
82 | /* HP-UX 10.10 UNIX 95 features. */ | |
83 | #ifndef TARGET_HPUX_10_10 | |
84 | #define TARGET_HPUX_10_10 0 | |
85 | #endif | |
86 | ||
87 | /* HP-UX 11i multibyte and UNIX 98 extensions. */ | |
88 | #ifndef TARGET_HPUX_11_11 | |
89 | #define TARGET_HPUX_11_11 0 | |
90 | #endif | |
91 | ||
a02aa5b0 JDA |
92 | /* The following three defines are potential target switches. The current |
93 | defines are optimal given the current capabilities of GAS and GNU ld. */ | |
94 | ||
95 | /* Define to a C expression evaluating to true to use long absolute calls. | |
96 | Currently, only the HP assembler and SOM linker support long absolute | |
97 | calls. They are used only in non-pic code. */ | |
98 | #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS) | |
99 | ||
100 | /* Define to a C expression evaluating to true to use long pic symbol | |
101 | difference calls. This is a call variant similar to the long pic | |
102 | pc-relative call. Long pic symbol difference calls are only used with | |
103 | the HP SOM linker. Currently, only the HP assembler supports these | |
c1207243 | 104 | calls. GAS doesn't allow an arbitrary difference of two symbols. */ |
a02aa5b0 JDA |
105 | #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS) |
106 | ||
107 | /* Define to a C expression evaluating to true to use long pic | |
108 | pc-relative calls. Long pic pc-relative calls are only used with | |
109 | GAS. Currently, they are usable for calls within a module but | |
110 | not for external calls. */ | |
111 | #define TARGET_LONG_PIC_PCREL_CALL 0 | |
112 | ||
4af6a063 JDA |
113 | /* Define to a C expression evaluating to true to use SOM secondary |
114 | definition symbols for weak support. Linker support for secondary | |
115 | definition symbols is buggy prior to HP-UX 11.X. */ | |
116 | #define TARGET_SOM_SDEF 0 | |
117 | ||
685d0e07 JDA |
118 | /* Define to a C expression evaluating to true to save the entry value |
119 | of SP in the current frame marker. This is normally unnecessary. | |
120 | However, the HP-UX unwind library looks at the SAVE_SP callinfo flag. | |
121 | HP compilers don't use this flag but it is supported by the assembler. | |
122 | We set this flag to indicate that register %r3 has been saved at the | |
123 | start of the frame. Thus, when the HP unwind library is used, we | |
124 | need to generate additional code to save SP into the frame marker. */ | |
125 | #define TARGET_HPUX_UNWIND_LIBRARY 0 | |
126 | ||
233c0fef | 127 | #ifndef TARGET_DEFAULT |
7b79fe71 | 128 | #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH) |
233c0fef TG |
129 | #endif |
130 | ||
b34ec578 RK |
131 | #ifndef TARGET_CPU_DEFAULT |
132 | #define TARGET_CPU_DEFAULT 0 | |
133 | #endif | |
134 | ||
806bf413 | 135 | #ifndef TARGET_SCHED_DEFAULT |
66617831 | 136 | #define TARGET_SCHED_DEFAULT PROCESSOR_8000 |
d711cf67 JDA |
137 | #endif |
138 | ||
7816bea0 DJ |
139 | /* Support for a compile-time default CPU, et cetera. The rules are: |
140 | --with-schedule is ignored if -mschedule is specified. | |
141 | --with-arch is ignored if -march is specified. */ | |
142 | #define OPTION_DEFAULT_SPECS \ | |
143 | {"arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
144 | {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" } | |
145 | ||
f38b27c7 JL |
146 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
147 | and the old mnemonics are dialect zero. */ | |
148 | #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0) | |
149 | ||
c47decad JL |
150 | #define OVERRIDE_OPTIONS override_options () |
151 | ||
ca11c37c | 152 | /* Override some settings from dbxelf.h. */ |
0d381b47 JL |
153 | |
154 | /* We do not have to be compatible with dbx, so we enable gdb extensions | |
155 | by default. */ | |
794b7f56 | 156 | #define DEFAULT_GDB_EXTENSIONS 1 |
233c0fef | 157 | |
0d381b47 JL |
158 | /* This used to be zero (no max length), but big enums and such can |
159 | cause huge strings which killed gas. | |
160 | ||
161 | We also have to avoid lossage in dbxout.c -- it does not compute the | |
162 | string size accurately, so we are real conservative here. */ | |
163 | #undef DBX_CONTIN_LENGTH | |
164 | #define DBX_CONTIN_LENGTH 3000 | |
75600ead | 165 | |
2e7e7121 JL |
166 | /* GDB always assumes the current function's frame begins at the value |
167 | of the stack pointer upon entry to the current function. Accessing | |
6a5c0a8e JL |
168 | local variables and parameters passed on the stack is done using the |
169 | base of the frame + an offset provided by GCC. | |
2e7e7121 JL |
170 | |
171 | For functions which have frame pointers this method works fine; | |
172 | the (frame pointer) == (stack pointer at function entry) and GCC provides | |
173 | an offset relative to the frame pointer. | |
174 | ||
175 | This loses for functions without a frame pointer; GCC provides an offset | |
176 | which is relative to the stack pointer after adjusting for the function's | |
177 | frame size. GDB would prefer the offset to be relative to the value of | |
178 | the stack pointer at the function's entry. Yuk! */ | |
179 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
180 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ | |
181 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
182 | ||
6a5c0a8e JL |
183 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ |
184 | ((GET_CODE (X) == PLUS ? OFFSET : 0) \ | |
185 | + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0))) | |
186 | ||
c219e1da JDA |
187 | #define TARGET_CPU_CPP_BUILTINS() \ |
188 | do { \ | |
189 | builtin_assert("cpu=hppa"); \ | |
190 | builtin_assert("machine=hppa"); \ | |
191 | builtin_define("__hppa"); \ | |
192 | builtin_define("__hppa__"); \ | |
c219e1da JDA |
193 | if (TARGET_PA_20) \ |
194 | builtin_define("_PA_RISC2_0"); \ | |
195 | else if (TARGET_PA_11) \ | |
196 | builtin_define("_PA_RISC1_1"); \ | |
197 | else \ | |
198 | builtin_define("_PA_RISC1_0"); \ | |
199 | } while (0) | |
200 | ||
201 | /* An old set of OS defines for various BSD-like systems. */ | |
202 | #define TARGET_OS_CPP_BUILTINS() \ | |
203 | do \ | |
204 | { \ | |
205 | builtin_define_std ("REVARGV"); \ | |
206 | builtin_define_std ("hp800"); \ | |
207 | builtin_define_std ("hp9000"); \ | |
208 | builtin_define_std ("hp9k8"); \ | |
04df6730 | 209 | if (!c_dialect_cxx () && !flag_iso) \ |
c219e1da JDA |
210 | builtin_define ("hppa"); \ |
211 | builtin_define_std ("spectrum"); \ | |
212 | builtin_define_std ("unix"); \ | |
213 | builtin_assert ("system=bsd"); \ | |
214 | builtin_assert ("system=unix"); \ | |
215 | } \ | |
216 | while (0) | |
233c0fef | 217 | |
233c0fef | 218 | #define CC1_SPEC "%{pg:} %{p:}" |
5a1c10de | 219 | |
ad238e4b | 220 | #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" |
233c0fef | 221 | |
0fffa5e1 RK |
222 | /* We don't want -lg. */ |
223 | #ifndef LIB_SPEC | |
224 | #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
225 | #endif | |
226 | ||
dc36ec2c RK |
227 | /* This macro defines command-line switches that modify the default |
228 | target name. | |
229 | ||
230 | The definition is be an initializer for an array of structures. Each | |
231 | array element has have three elements: the switch name, one of the | |
232 | enumeration codes ADD or DELETE to indicate whether the string should be | |
fe19a83d | 233 | inserted or deleted, and the string to be inserted or deleted. */ |
dc36ec2c RK |
234 | #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}} |
235 | ||
233c0fef TG |
236 | /* Make gcc agree with <machine/ansi.h> */ |
237 | ||
238 | #define SIZE_TYPE "unsigned int" | |
239 | #define PTRDIFF_TYPE "int" | |
3c9a7b64 JL |
240 | #define WCHAR_TYPE "unsigned int" |
241 | #define WCHAR_TYPE_SIZE 32 | |
233c0fef | 242 | |
4f074454 RK |
243 | /* Show we can debug even without a frame pointer. */ |
244 | #define CAN_DEBUG_WITHOUT_FP | |
eabd3262 RK |
245 | \f |
246 | /* target machine storage layout */ | |
9a55eab3 JDA |
247 | typedef struct machine_function GTY(()) |
248 | { | |
249 | /* Flag indicating that a .NSUBSPA directive has been output for | |
250 | this function. */ | |
251 | int in_nsubspa; | |
252 | } machine_function; | |
eabd3262 | 253 | |
9f9fba36 TG |
254 | /* Define this macro if it is advisable to hold scalars in registers |
255 | in a wider mode than that declared by the program. In such cases, | |
256 | the value is constrained to be within the bounds of the declared | |
257 | type, but kept valid in the wider mode. The signedness of the | |
258 | extension may differ from that of the type. */ | |
259 | ||
260 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
261 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
d7735a07 | 262 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ |
690d4228 | 263 | (MODE) = word_mode; |
9f9fba36 | 264 | |
eabd3262 RK |
265 | /* Define this if most significant bit is lowest numbered |
266 | in instructions that operate on numbered bit-fields. */ | |
267 | #define BITS_BIG_ENDIAN 1 | |
268 | ||
269 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
23643037 | 270 | /* That is true on the HP-PA. */ |
eabd3262 RK |
271 | #define BYTES_BIG_ENDIAN 1 |
272 | ||
273 | /* Define this if most significant word of a multiword number is lowest | |
274 | numbered. */ | |
eabd3262 RK |
275 | #define WORDS_BIG_ENDIAN 1 |
276 | ||
520babc7 | 277 | #define MAX_BITS_PER_WORD 64 |
eabd3262 RK |
278 | |
279 | /* Width of a word, in units (bytes). */ | |
520babc7 | 280 | #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) |
83c32f2e JDA |
281 | |
282 | /* Minimum number of units in a word. If this is undefined, the default | |
283 | is UNITS_PER_WORD. Otherwise, it is the constant value that is the | |
284 | smallest value that UNITS_PER_WORD can have at run-time. | |
285 | ||
286 | FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the | |
287 | building of various TImode routines in libgcc. The HP runtime | |
288 | specification doesn't provide the alignment requirements and calling | |
289 | conventions for TImode variables. */ | |
520babc7 | 290 | #define MIN_UNITS_PER_WORD 4 |
eabd3262 | 291 | |
eabd3262 | 292 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ |
cb16fe9f | 293 | #define PARM_BOUNDARY BITS_PER_WORD |
eabd3262 RK |
294 | |
295 | /* Largest alignment required for any stack parameter, in bits. | |
296 | Don't define this if it is equal to PARM_BOUNDARY */ | |
d6567b3a | 297 | #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT |
eabd3262 | 298 | |
981e5cd9 JL |
299 | /* Boundary (in *bits*) on which stack pointer is always aligned; |
300 | certain optimizations in combine depend on this. | |
301 | ||
b0d7ef9a JDA |
302 | The HP-UX runtime documents mandate 64-byte and 16-byte alignment for |
303 | the stack on the 32 and 64-bit ports, respectively. However, we | |
304 | are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT | |
305 | in main. Thus, we treat the former as the preferred alignment. */ | |
d6567b3a | 306 | #define STACK_BOUNDARY BIGGEST_ALIGNMENT |
b0d7ef9a | 307 | #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512) |
79109502 | 308 | |
eabd3262 | 309 | /* Allocation boundary (in *bits*) for the code of a function. */ |
d6567b3a | 310 | #define FUNCTION_BOUNDARY BITS_PER_WORD |
eabd3262 RK |
311 | |
312 | /* Alignment of field after `int : 0' in a structure. */ | |
313 | #define EMPTY_FIELD_BOUNDARY 32 | |
314 | ||
315 | /* Every structure's size must be a multiple of this. */ | |
316 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
317 | ||
43a88a8c | 318 | /* A bit-field declared as `int' forces `int' alignment for the struct. */ |
eabd3262 RK |
319 | #define PCC_BITFIELD_TYPE_MATTERS 1 |
320 | ||
d6567b3a JDA |
321 | /* No data type wants to be aligned rounder than this. */ |
322 | #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD) | |
eabd3262 | 323 | |
fe19a83d | 324 | /* Get around hp-ux assembler bug, and make strcpy of constants fast. */ |
eabd3262 RK |
325 | #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \ |
326 | ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN)) | |
327 | ||
328 | /* Make arrays of chars word-aligned for the same reasons. */ | |
329 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
330 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
331 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
332 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
333 | ||
eabd3262 RK |
334 | /* Set this nonzero if move instructions will actually fail to work |
335 | when given unaligned data. */ | |
336 | #define STRICT_ALIGNMENT 1 | |
337 | ||
eabd3262 RK |
338 | /* Value is 1 if it is a good idea to tie two pseudo registers |
339 | when one has mode MODE1 and one has mode MODE2. | |
340 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
341 | for any hard reg, then this must be 0 for correct output. */ | |
342 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
3518f904 | 343 | (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) |
eabd3262 RK |
344 | |
345 | /* Specify the registers used for certain standard purposes. | |
346 | The values of these macros are register numbers. */ | |
347 | ||
3f8f5a3f | 348 | /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */ |
eabd3262 RK |
349 | /* #define PC_REGNUM */ |
350 | ||
351 | /* Register to use for pushing function arguments. */ | |
352 | #define STACK_POINTER_REGNUM 30 | |
353 | ||
354 | /* Base register for access to local variables of the function. */ | |
75600ead | 355 | #define FRAME_POINTER_REGNUM 3 |
eabd3262 | 356 | |
e63ffc38 | 357 | /* Value should be nonzero if functions must have frame pointers. */ |
9e18f575 | 358 | #define FRAME_POINTER_REQUIRED \ |
e63ffc38 | 359 | (current_function_calls_alloca) |
eabd3262 | 360 | |
b5395c33 SE |
361 | /* Don't allow hard registers to be renamed into r2 unless r2 |
362 | is already live or already being saved (due to eh). */ | |
363 | ||
364 | #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ | |
365 | ((NEW_REG) != 2 || regs_ever_live[2] || current_function_calls_eh_return) | |
366 | ||
eabd3262 RK |
367 | /* C statement to store the difference between the frame pointer |
368 | and the stack pointer values immediately after the function prologue. | |
369 | ||
370 | Note, we always pretend that this is a leaf function because if | |
371 | it's not, there's no point in trying to eliminate the | |
372 | frame pointer. If it is a leaf function, we guessed right! */ | |
373 | #define INITIAL_FRAME_POINTER_OFFSET(VAR) \ | |
86daf4a6 | 374 | do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0) |
eabd3262 RK |
375 | |
376 | /* Base register for access to arguments of the function. */ | |
747e2d0e | 377 | #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3) |
eabd3262 RK |
378 | |
379 | /* Register in which static-chain is passed to a function. */ | |
747e2d0e | 380 | #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29) |
eabd3262 | 381 | |
3cf7104e | 382 | /* Register used to address the offset table for position-independent |
eabd3262 | 383 | data references. */ |
3cf7104e JDA |
384 | #define PIC_OFFSET_TABLE_REGNUM \ |
385 | (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM) | |
eabd3262 | 386 | |
6bb36601 | 387 | #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1 |
eabd3262 | 388 | |
d777856d JDA |
389 | /* Function to return the rtx used to save the pic offset table register |
390 | across function calls. */ | |
b7849684 | 391 | extern struct rtx_def *hppa_pic_save_rtx (void); |
eabd3262 | 392 | |
451d86c2 | 393 | #define DEFAULT_PCC_STRUCT_RETURN 0 |
520babc7 | 394 | |
eabd3262 RK |
395 | /* Register in which address to store a structure value |
396 | is passed to a function. */ | |
3f12cd9b | 397 | #define PA_STRUCT_VALUE_REGNUM 28 |
e25724d8 AM |
398 | |
399 | /* Describe how we implement __builtin_eh_return. */ | |
400 | #define EH_RETURN_DATA_REGNO(N) \ | |
47a4976f | 401 | ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM) |
e25724d8 | 402 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29) |
823fbbce JDA |
403 | #define EH_RETURN_HANDLER_RTX \ |
404 | gen_rtx_MEM (word_mode, \ | |
405 | gen_rtx_PLUS (word_mode, frame_pointer_rtx, \ | |
406 | TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20))) | |
823fbbce | 407 | |
9fb1c9db JDA |
408 | /* Offset from the frame pointer register value to the top of stack. */ |
409 | #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0 | |
410 | ||
411 | /* A C expression whose value is RTL representing the location of the | |
412 | incoming return address at the beginning of any function, before the | |
413 | prologue. You only need to define this macro if you want to support | |
414 | call frame debugging information like that provided by DWARF 2. */ | |
415 | #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2)) | |
416 | #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2)) | |
417 | ||
418 | /* A C expression whose value is an integer giving a DWARF 2 column | |
419 | number that may be used as an alternate return column. This should | |
420 | be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general | |
421 | register, but an alternate column needs to be used for signal frames. | |
422 | ||
423 | Column 0 is not used but unfortunately its register size is set to | |
424 | 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */ | |
425 | #define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER | |
426 | ||
427 | /* This macro chooses the encoding of pointers embedded in the exception | |
428 | handling sections. If at all possible, this should be defined such | |
429 | that the exception handling section will not require dynamic relocations, | |
430 | and so may be read-only. | |
431 | ||
432 | Because the HP assembler auto aligns, it is necessary to use | |
433 | DW_EH_PE_aligned. It's not possible to make the data read-only | |
434 | on the HP-UX SOM port since the linker requires fixups for label | |
435 | differences in different sections to be word aligned. However, | |
436 | the SOM linker can do unaligned fixups for absolute pointers. | |
437 | We also need aligned pointers for global and function pointers. | |
438 | ||
439 | Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative | |
440 | fixups, the runtime doesn't have a consistent relationship between | |
441 | text and data for dynamically loaded objects. Thus, it's not possible | |
442 | to use pc-relative encoding for pointers on this target. It may be | |
443 | possible to use segment relative encodings but GAS doesn't currently | |
444 | have a mechanism to generate these encodings. For other targets, we | |
445 | use pc-relative encoding for pointers. If the pointer might require | |
446 | dynamic relocation, we make it indirect. */ | |
447 | #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \ | |
448 | (TARGET_GAS && !TARGET_HPUX \ | |
449 | ? (DW_EH_PE_pcrel \ | |
450 | | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \ | |
451 | | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \ | |
452 | : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \ | |
453 | ? DW_EH_PE_aligned : DW_EH_PE_absptr)) | |
454 | ||
455 | /* Handle special EH pointer encodings. Absolute, pc-relative, and | |
456 | indirect are handled automatically. We output pc-relative, and | |
457 | indirect pc-relative ourself since we need some special magic to | |
458 | generate pc-relative relocations, and to handle indirect function | |
459 | pointers. */ | |
460 | #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \ | |
461 | do { \ | |
462 | if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \ | |
463 | { \ | |
464 | fputs (integer_asm_op (SIZE, FALSE), FILE); \ | |
465 | if ((ENCODING) & DW_EH_PE_indirect) \ | |
466 | output_addr_const (FILE, get_deferred_plabel (ADDR)); \ | |
467 | else \ | |
468 | assemble_name (FILE, XSTR ((ADDR), 0)); \ | |
469 | fputs ("+8-$PIC_pcrel$0", FILE); \ | |
470 | goto DONE; \ | |
471 | } \ | |
472 | } while (0) | |
eabd3262 | 473 | \f |
eabd3262 RK |
474 | /* The letters I, J, K, L and M in a register constraint string |
475 | can be used to stand for particular ranges of immediate operands. | |
476 | This macro defines what the ranges are. | |
477 | C is the letter, and VALUE is a constant value. | |
478 | Return 1 if VALUE is in the range specified by C. | |
479 | ||
eabd3262 RK |
480 | `I' is used for the 11 bit constants. |
481 | `J' is used for the 14 bit constants. | |
7e8b33d9 | 482 | `K' is used for values that can be moved with a zdepi insn. |
eabd3262 | 483 | `L' is used for the 5 bit constants. |
7e8b33d9 | 484 | `M' is used for 0. |
520babc7 JL |
485 | `N' is used for values with the least significant 11 bits equal to zero |
486 | and when sign extended from 32 to 64 bits the | |
487 | value does not change. | |
7e8b33d9 TG |
488 | `O' is used for numbers n such that n+1 is a power of 2. |
489 | */ | |
eabd3262 RK |
490 | |
491 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
e0c556d3 AM |
492 | ((C) == 'I' ? VAL_11_BITS_P (VALUE) \ |
493 | : (C) == 'J' ? VAL_14_BITS_P (VALUE) \ | |
494 | : (C) == 'K' ? zdepi_cint_p (VALUE) \ | |
495 | : (C) == 'L' ? VAL_5_BITS_P (VALUE) \ | |
496 | : (C) == 'M' ? (VALUE) == 0 \ | |
497 | : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \ | |
498 | || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \ | |
499 | == (HOST_WIDE_INT) -1 << 31)) \ | |
500 | : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \ | |
501 | : (C) == 'P' ? and_mask_p (VALUE) \ | |
eabd3262 RK |
502 | : 0) |
503 | ||
af69aabb JL |
504 | /* Similar, but for floating or large integer constants, and defining letters |
505 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
eabd3262 | 506 | |
af69aabb JL |
507 | For PA, `G' is the floating-point constant zero. `H' is undefined. */ |
508 | ||
509 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
510 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
511 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ | |
512 | : 0) | |
eabd3262 | 513 | |
88624c0e JL |
514 | /* The class value for index registers, and the one for base regs. */ |
515 | #define INDEX_REG_CLASS GENERAL_REGS | |
516 | #define BASE_REG_CLASS GENERAL_REGS | |
517 | ||
518 | #define FP_REG_CLASS_P(CLASS) \ | |
519 | ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) | |
520 | ||
521 | /* True if register is floating-point. */ | |
522 | #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST) | |
523 | ||
eabd3262 RK |
524 | /* Given an rtx X being reloaded into a reg required to be |
525 | in class CLASS, return the class of reg to actually use. | |
526 | In general this is just CLASS; but on some machines | |
527 | in some cases it is preferable to use a more restrictive class. */ | |
528 | #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
529 | ||
4b0d3cbe MM |
530 | #define MAYBE_FP_REG_CLASS_P(CLASS) \ |
531 | reg_classes_intersect_p ((CLASS), FP_REGS) | |
532 | ||
5a1c10de | 533 | /* On the PA it is not possible to directly move data between |
6b0ae684 | 534 | GENERAL_REGS and FP_REGS. */ |
4b0d3cbe MM |
535 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ |
536 | (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2) \ | |
537 | || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)) | |
6b0ae684 JL |
538 | |
539 | /* Return the stack location to use for secondary memory needed reloads. */ | |
540 | #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ | |
ad2c71b7 | 541 | gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16))) |
6b0ae684 | 542 | |
eabd3262 RK |
543 | \f |
544 | /* Stack layout; function entry, exit and calling. */ | |
545 | ||
546 | /* Define this if pushing a word on the stack | |
547 | makes the stack pointer a smaller address. */ | |
548 | /* #define STACK_GROWS_DOWNWARD */ | |
549 | ||
550 | /* Believe it or not. */ | |
551 | #define ARGS_GROW_DOWNWARD | |
552 | ||
a4d05547 | 553 | /* Define this to nonzero if the nominal address of the stack frame |
eabd3262 RK |
554 | is at the high-address end of the local variables; |
555 | that is, each additional local variable allocated | |
556 | goes at a more negative offset in the frame. */ | |
f62c8a5c | 557 | #define FRAME_GROWS_DOWNWARD 0 |
eabd3262 RK |
558 | |
559 | /* Offset within stack frame to start allocating local variables at. | |
560 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
561 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
95f3f59e JDA |
562 | of the first local allocated. |
563 | ||
564 | On the 32-bit ports, we reserve one slot for the previous frame | |
565 | pointer and one fill slot. The fill slot is for compatibility | |
566 | with HP compiled programs. On the 64-bit ports, we reserve one | |
567 | slot for the previous frame pointer. */ | |
568 | #define STARTING_FRAME_OFFSET 8 | |
569 | ||
570 | /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment | |
571 | of the stack. The default is to align it to STACK_BOUNDARY. */ | |
572 | #define STACK_ALIGNMENT_NEEDED 0 | |
eabd3262 RK |
573 | |
574 | /* If we generate an insn to push BYTES bytes, | |
575 | this says how many the stack pointer really advances by. | |
3f8f5a3f | 576 | On the HP-PA, don't define this because there are no push insns. */ |
eabd3262 RK |
577 | /* #define PUSH_ROUNDING(BYTES) */ |
578 | ||
579 | /* Offset of first parameter from the argument pointer register value. | |
580 | This value will be negated because the arguments grow down. | |
581 | Also note that on STACK_GROWS_UPWARD machines (such as this one) | |
582 | this is the distance from the frame pointer to the end of the first | |
583 | argument, not it's beginning. To get the real offset of the first | |
8c417c25 | 584 | argument, the size of the argument must be added. */ |
eabd3262 | 585 | |
520babc7 | 586 | #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32) |
eabd3262 | 587 | |
eabd3262 RK |
588 | /* When a parameter is passed in a register, stack space is still |
589 | allocated for it. */ | |
520babc7 | 590 | #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16) |
eabd3262 RK |
591 | |
592 | /* Define this if the above stack space is to be considered part of the | |
593 | space allocated by the caller. */ | |
594 | #define OUTGOING_REG_PARM_STACK_SPACE | |
595 | ||
596 | /* Keep the stack pointer constant throughout the function. | |
597 | This is both an optimization and a necessity: longjmp | |
598 | doesn't behave itself when the stack pointer moves within | |
599 | the function! */ | |
f73ad30e | 600 | #define ACCUMULATE_OUTGOING_ARGS 1 |
5a1c10de TG |
601 | |
602 | /* The weird HPPA calling conventions require a minimum of 48 bytes on | |
eabd3262 RK |
603 | the stack: 16 bytes for register saves, and 32 bytes for magic. |
604 | This is the difference between the logical top of stack and the | |
685d0e07 JDA |
605 | actual sp. |
606 | ||
607 | On the 64-bit port, the HP C compiler allocates a 48-byte frame | |
608 | marker, although the runtime documentation only describes a 16 | |
609 | byte marker. For compatibility, we allocate 48 bytes. */ | |
520babc7 | 610 | #define STACK_POINTER_OFFSET \ |
685d0e07 | 611 | (TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32) |
eabd3262 RK |
612 | |
613 | #define STACK_DYNAMIC_OFFSET(FNDECL) \ | |
520babc7 JL |
614 | (TARGET_64BIT \ |
615 | ? (STACK_POINTER_OFFSET) \ | |
616 | : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)) | |
eabd3262 RK |
617 | |
618 | /* Value is 1 if returning from a function call automatically | |
619 | pops the arguments described by the number-of-args field in the call. | |
8b109b37 | 620 | FUNDECL is the declaration node of the function (as a tree), |
eabd3262 RK |
621 | FUNTYPE is the data type of the function (as a tree), |
622 | or for a library call it is an identifier node for the subroutine name. */ | |
623 | ||
8b109b37 | 624 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
eabd3262 RK |
625 | |
626 | /* Define how to find the value returned by a function. | |
627 | VALTYPE is the data type of the value (as a tree). | |
628 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
629 | otherwise, FUNC is 0. */ | |
630 | ||
44571d6e | 631 | #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC) |
eabd3262 | 632 | |
eabd3262 RK |
633 | /* Define how to find the value returned by a library function |
634 | assuming the value has mode MODE. */ | |
635 | ||
74356a72 | 636 | #define LIBCALL_VALUE(MODE) \ |
ad2c71b7 JL |
637 | gen_rtx_REG (MODE, \ |
638 | (! TARGET_SOFT_FLOAT \ | |
c5c76735 | 639 | && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) |
eabd3262 RK |
640 | |
641 | /* 1 if N is a possible register number for a function value | |
642 | as seen by the caller. */ | |
643 | ||
a40ed31b | 644 | #define FUNCTION_VALUE_REGNO_P(N) \ |
74356a72 | 645 | ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32)) |
eabd3262 | 646 | |
eabd3262 RK |
647 | \f |
648 | /* Define a data type for recording info about an argument list | |
649 | during the scan of that argument list. This data type should | |
650 | hold all necessary information about the function itself | |
651 | and about the args processed so far, enough to enable macros | |
652 | such as FUNCTION_ARG to determine where the next arg should go. | |
653 | ||
c328adfa | 654 | On the HP-PA, the WORDS field holds the number of words |
eabd3262 | 655 | of arguments scanned so far (including the invisible argument, |
c328adfa JDA |
656 | if any, which holds the structure-value-address). Thus, 4 or |
657 | more means all following args should go on the stack. | |
658 | ||
659 | The INCOMING field tracks whether this is an "incoming" or | |
660 | "outgoing" argument. | |
661 | ||
662 | The INDIRECT field indicates whether this is is an indirect | |
663 | call or not. | |
664 | ||
665 | The NARGS_PROTOTYPE field indicates that an argument does not | |
666 | have a prototype when it less than or equal to 0. */ | |
667 | ||
668 | struct hppa_args {int words, nargs_prototype, incoming, indirect; }; | |
2822d96e JL |
669 | |
670 | #define CUMULATIVE_ARGS struct hppa_args | |
eabd3262 RK |
671 | |
672 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
673 | for a call to a function whose data type is FNTYPE. | |
2822d96e | 674 | For a library call, FNTYPE is 0. */ |
eabd3262 | 675 | |
0f6937fe | 676 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ |
2822d96e | 677 | (CUM).words = 0, \ |
c328adfa | 678 | (CUM).incoming = 0, \ |
563a317a | 679 | (CUM).indirect = (FNTYPE) && !(FNDECL), \ |
2822d96e JL |
680 | (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \ |
681 | ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \ | |
682 | + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \ | |
3f12cd9b | 683 | || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \ |
2822d96e JL |
684 | : 0) |
685 | ||
686 | ||
687 | ||
688 | /* Similar, but when scanning the definition of a procedure. We always | |
bd625e21 | 689 | set NARGS_PROTOTYPE large so we never return a PARALLEL. */ |
2822d96e JL |
690 | |
691 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \ | |
692 | (CUM).words = 0, \ | |
c328adfa | 693 | (CUM).incoming = 1, \ |
a5bbd4b8 | 694 | (CUM).indirect = 0, \ |
2822d96e | 695 | (CUM).nargs_prototype = 1000 |
eabd3262 | 696 | |
9dff28ab JDA |
697 | /* Figure out the size in words of the function argument. The size |
698 | returned by this macro should always be greater than zero because | |
699 | we pass variable and zero sized objects by reference. */ | |
eabd3262 RK |
700 | |
701 | #define FUNCTION_ARG_SIZE(MODE, TYPE) \ | |
d7735a07 | 702 | ((((MODE) != BLKmode \ |
6e9c53b4 | 703 | ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ |
d7735a07 | 704 | : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
eabd3262 RK |
705 | |
706 | /* Update the data in CUM to advance over an argument | |
707 | of mode MODE and data type TYPE. | |
708 | (TYPE is null for libcalls where that information may not be available.) */ | |
709 | ||
710 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
2822d96e | 711 | { (CUM).nargs_prototype--; \ |
d8bea1c6 RB |
712 | (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \ |
713 | + (((CUM).words & 01) && (TYPE) != 0 \ | |
714 | && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \ | |
2822d96e | 715 | } |
eabd3262 RK |
716 | |
717 | /* Determine where to put an argument to a function. | |
718 | Value is zero to push the argument on the stack, | |
719 | or a hard register in which to store the argument. | |
720 | ||
721 | MODE is the argument's machine mode. | |
722 | TYPE is the data type of the argument (as a tree). | |
723 | This is null for libcalls where that information may | |
724 | not be available. | |
725 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
726 | the preceding args and about the function being called. | |
727 | NAMED is nonzero if this argument is a named parameter | |
2822d96e | 728 | (otherwise it is an extra parameter matching an ellipsis). |
eabd3262 | 729 | |
2822d96e | 730 | On the HP-PA the first four words of args are normally in registers |
eabd3262 | 731 | and the rest are pushed. But any arg that won't entirely fit in regs |
3d247e85 TM |
732 | is pushed. |
733 | ||
99977c61 RS |
734 | Arguments passed in registers are either 1 or 2 words long. |
735 | ||
736 | The caller must make a distinction between calls to explicitly named | |
737 | functions and calls through pointers to functions -- the conventions | |
738 | are different! Calls through pointers to functions only use general | |
279c9bde | 739 | registers for the first four argument words. |
eabd3262 | 740 | |
2822d96e JL |
741 | Of course all this is different for the portable runtime model |
742 | HP wants everyone to use for ELF. Ugh. Here's a quick description | |
743 | of how it's supposed to work. | |
744 | ||
745 | 1) callee side remains unchanged. It expects integer args to be | |
746 | in the integer registers, float args in the float registers and | |
747 | unnamed args in integer registers. | |
748 | ||
749 | 2) caller side now depends on if the function being called has | |
750 | a prototype in scope (rather than if it's being called indirectly). | |
751 | ||
752 | 2a) If there is a prototype in scope, then arguments are passed | |
753 | according to their type (ints in integer registers, floats in float | |
754 | registers, unnamed args in integer registers. | |
755 | ||
756 | 2b) If there is no prototype in scope, then floating point arguments | |
757 | are passed in both integer and float registers. egad. | |
758 | ||
759 | FYI: The portable parameter passing conventions are almost exactly like | |
760 | the standard parameter passing conventions on the RS6000. That's why | |
761 | you'll see lots of similar code in rs6000.h. */ | |
a40ed31b | 762 | |
7ea18c08 JDA |
763 | /* If defined, a C expression which determines whether, and in which |
764 | direction, to pad out an argument with extra space. */ | |
eabd3262 RK |
765 | #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE)) |
766 | ||
7ea18c08 JDA |
767 | /* Specify padding for the last element of a block move between registers |
768 | and memory. | |
769 | ||
770 | The 64-bit runtime specifies that objects need to be left justified | |
771 | (i.e., the normal justification for a big endian target). The 32-bit | |
772 | runtime specifies right justification for objects smaller than 64 bits. | |
773 | We use a DImode register in the parallel for 5 to 7 byte structures | |
774 | so that there is only one element. This allows the object to be | |
775 | correctly padded. */ | |
ae8c9754 RS |
776 | #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ |
777 | function_arg_padding ((MODE), (TYPE)) | |
7ea18c08 | 778 | |
2822d96e JL |
779 | /* Do not expect to understand this without reading it several times. I'm |
780 | tempted to try and simply it, but I worry about breaking something. */ | |
781 | ||
520babc7 | 782 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
c328adfa | 783 | function_arg (&CUM, MODE, TYPE, NAMED) |
520babc7 | 784 | |
eabd3262 RK |
785 | /* If defined, a C expression that gives the alignment boundary, in |
786 | bits, of an argument with the specified mode and type. If it is | |
787 | not defined, `PARM_BOUNDARY' is used for all arguments. */ | |
788 | ||
9dff28ab JDA |
789 | /* Arguments larger than one word are double word aligned. */ |
790 | ||
791 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
792 | (((TYPE) \ | |
793 | ? (integer_zerop (TYPE_SIZE (TYPE)) \ | |
794 | || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \ | |
795 | || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \ | |
796 | : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \ | |
797 | ? PARM_BOUNDARY : MAX_PARM_BOUNDARY) | |
798 | ||
eabd3262 | 799 | \f |
e2500fed GK |
800 | extern GTY(()) rtx hppa_compare_op0; |
801 | extern GTY(()) rtx hppa_compare_op1; | |
eabd3262 RK |
802 | extern enum cmp_type hppa_branch_type; |
803 | ||
1c7a8112 | 804 | /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than |
f6f315fe AM |
805 | as assembly via FUNCTION_PROFILER. Just output a local label. |
806 | We can't use the function label because the GAS SOM target can't | |
807 | handle the difference of a global symbol and a local symbol. */ | |
eabd3262 | 808 | |
f6f315fe AM |
809 | #ifndef FUNC_BEGIN_PROLOG_LABEL |
810 | #define FUNC_BEGIN_PROLOG_LABEL "LFBP" | |
811 | #endif | |
812 | ||
813 | #define FUNCTION_PROFILER(FILE, LABEL) \ | |
4977bab6 | 814 | (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) |
eabd3262 | 815 | |
1c7a8112 | 816 | #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) |
b7849684 | 817 | void hppa_profile_hook (int label_no); |
eabd3262 | 818 | |
8f949e7e JDA |
819 | /* The profile counter if emitted must come before the prologue. */ |
820 | #define PROFILE_BEFORE_PROLOGUE 1 | |
821 | ||
3674b34d JDA |
822 | /* We never want final.c to emit profile counters. When profile |
823 | counters are required, we have to defer emitting them to the end | |
824 | of the current file. */ | |
825 | #define NO_PROFILE_COUNTERS 1 | |
826 | ||
eabd3262 RK |
827 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, |
828 | the stack pointer does not matter. The value is tested only in | |
829 | functions that have frame pointers. | |
830 | No definition is equivalent to always zero. */ | |
831 | ||
832 | extern int may_call_alloca; | |
eabd3262 RK |
833 | |
834 | #define EXIT_IGNORE_STACK \ | |
835 | (get_frame_size () != 0 \ | |
836 | || current_function_calls_alloca || current_function_outgoing_args_size) | |
837 | ||
eabd3262 | 838 | /* Output assembler code for a block containing the constant parts |
f16fe394 | 839 | of a trampoline, leaving space for the variable parts.\ |
eabd3262 | 840 | |
f16fe394 JL |
841 | The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM |
842 | and then branches to the specified routine. | |
eabd3262 | 843 | |
f16fe394 JL |
844 | This code template is copied from text segment to stack location |
845 | and then patched with INITIALIZE_TRAMPOLINE to contain | |
5a1c10de | 846 | valid values, and then entered as a subroutine. |
eabd3262 | 847 | |
5a1c10de | 848 | It is best to keep this as small as possible to avoid having to |
f16fe394 JL |
849 | flush multiple lines in the cache. */ |
850 | ||
520babc7 JL |
851 | #define TRAMPOLINE_TEMPLATE(FILE) \ |
852 | { \ | |
4d595e43 | 853 | if (!TARGET_64BIT) \ |
520babc7 JL |
854 | { \ |
855 | fputs ("\tldw 36(%r22),%r21\n", FILE); \ | |
856 | fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \ | |
857 | if (ASSEMBLER_DIALECT == 0) \ | |
858 | fputs ("\tdepi 0,31,2,%r21\n", FILE); \ | |
859 | else \ | |
860 | fputs ("\tdepwi 0,31,2,%r21\n", FILE); \ | |
861 | fputs ("\tldw 4(%r21),%r19\n", FILE); \ | |
862 | fputs ("\tldw 0(%r21),%r21\n", FILE); \ | |
3914c31f JDA |
863 | if (TARGET_PA_20) \ |
864 | { \ | |
865 | fputs ("\tbve (%r21)\n", FILE); \ | |
866 | fputs ("\tldw 40(%r22),%r29\n", FILE); \ | |
867 | fputs ("\t.word 0\n", FILE); \ | |
868 | fputs ("\t.word 0\n", FILE); \ | |
869 | } \ | |
870 | else \ | |
871 | { \ | |
872 | fputs ("\tldsid (%r21),%r1\n", FILE); \ | |
873 | fputs ("\tmtsp %r1,%sr0\n", FILE); \ | |
874 | fputs ("\tbe 0(%sr0,%r21)\n", FILE); \ | |
875 | fputs ("\tldw 40(%r22),%r29\n", FILE); \ | |
876 | } \ | |
520babc7 JL |
877 | fputs ("\t.word 0\n", FILE); \ |
878 | fputs ("\t.word 0\n", FILE); \ | |
8e1494b7 JDA |
879 | fputs ("\t.word 0\n", FILE); \ |
880 | fputs ("\t.word 0\n", FILE); \ | |
520babc7 JL |
881 | } \ |
882 | else \ | |
883 | { \ | |
884 | fputs ("\t.dword 0\n", FILE); \ | |
885 | fputs ("\t.dword 0\n", FILE); \ | |
886 | fputs ("\t.dword 0\n", FILE); \ | |
887 | fputs ("\t.dword 0\n", FILE); \ | |
888 | fputs ("\tmfia %r31\n", FILE); \ | |
889 | fputs ("\tldd 24(%r31),%r1\n", FILE); \ | |
890 | fputs ("\tldd 24(%r1),%r27\n", FILE); \ | |
891 | fputs ("\tldd 16(%r1),%r1\n", FILE); \ | |
892 | fputs ("\tbve (%r1)\n", FILE); \ | |
893 | fputs ("\tldd 32(%r31),%r31\n", FILE); \ | |
894 | fputs ("\t.dword 0 ; fptr\n", FILE); \ | |
895 | fputs ("\t.dword 0 ; static link\n", FILE); \ | |
896 | } \ | |
77a2f698 | 897 | } |
f16fe394 | 898 | |
3914c31f JDA |
899 | /* Length in units of the trampoline for entering a nested function. */ |
900 | ||
901 | #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52) | |
afcc28b2 | 902 | |
3914c31f | 903 | /* Length in units of the trampoline instruction code. */ |
afcc28b2 | 904 | |
3914c31f | 905 | #define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40)) |
f16fe394 | 906 | |
3914c31f JDA |
907 | /* Minimum length of a cache line. A length of 16 will work on all |
908 | PA-RISC processors. All PA 1.1 processors have a cache line of | |
909 | 32 bytes. Most but not all PA 2.0 processors have a cache line | |
910 | of 64 bytes. As cache flushes are expensive and we don't support | |
911 | PA 1.0, we use a minimum length of 32. */ | |
912 | ||
913 | #define MIN_CACHELINE_SIZE 32 | |
eabd3262 RK |
914 | |
915 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
916 | FNADDR is an RTX for the address of the function's pure code. | |
917 | CXT is an RTX for the static chain value for the function. | |
918 | ||
8e1494b7 JDA |
919 | Move the function address to the trampoline template at offset 36. |
920 | Move the static chain value to trampoline template at offset 40. | |
921 | Move the trampoline address to trampoline template at offset 44. | |
922 | Move r19 to trampoline template at offset 48. The latter two | |
3914c31f JDA |
923 | words create a plabel for the indirect call to the trampoline. |
924 | ||
925 | A similar sequence is used for the 64-bit port but the plabel is | |
926 | at the beginning of the trampoline. | |
927 | ||
928 | Finally, the cache entries for the trampoline code are flushed. | |
929 | This is necessary to ensure that the trampoline instruction sequence | |
930 | is written to memory prior to any attempts at prefetching the code | |
931 | sequence. */ | |
f16fe394 | 932 | |
520babc7 | 933 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ |
77a2f698 | 934 | { \ |
3914c31f JDA |
935 | rtx start_addr = gen_reg_rtx (Pmode); \ |
936 | rtx end_addr = gen_reg_rtx (Pmode); \ | |
937 | rtx line_length = gen_reg_rtx (Pmode); \ | |
938 | rtx tmp; \ | |
939 | \ | |
4d595e43 | 940 | if (!TARGET_64BIT) \ |
520babc7 | 941 | { \ |
3914c31f JDA |
942 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \ |
943 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \ | |
944 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \ | |
945 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \ | |
520babc7 | 946 | \ |
3914c31f JDA |
947 | /* Create a fat pointer for the trampoline. */ \ |
948 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \ | |
949 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \ | |
950 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \ | |
951 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ | |
8e1494b7 | 952 | gen_rtx_REG (Pmode, 19)); \ |
3914c31f | 953 | \ |
520babc7 | 954 | /* fdc and fic only use registers for the address to flush, \ |
3914c31f JDA |
955 | they do not accept integer displacements. We align the \ |
956 | start and end addresses to the beginning of their respective \ | |
957 | cache lines to minimize the number of lines flushed. */ \ | |
958 | tmp = force_reg (Pmode, (TRAMP)); \ | |
959 | emit_insn (gen_andsi3 (start_addr, tmp, \ | |
960 | GEN_INT (-MIN_CACHELINE_SIZE))); \ | |
961 | tmp = force_reg (Pmode, \ | |
962 | plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \ | |
963 | emit_insn (gen_andsi3 (end_addr, tmp, \ | |
964 | GEN_INT (-MIN_CACHELINE_SIZE))); \ | |
965 | emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ | |
966 | emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ | |
967 | emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ | |
4d595e43 JDA |
968 | gen_reg_rtx (Pmode), \ |
969 | gen_reg_rtx (Pmode))); \ | |
520babc7 JL |
970 | } \ |
971 | else \ | |
972 | { \ | |
3914c31f JDA |
973 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \ |
974 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \ | |
975 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \ | |
976 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \ | |
77a2f698 | 977 | \ |
fe19a83d | 978 | /* Create a fat pointer for the trampoline. */ \ |
3914c31f JDA |
979 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ |
980 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ | |
981 | force_reg (Pmode, plus_constant ((TRAMP), 32))); \ | |
982 | tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ | |
983 | emit_move_insn (gen_rtx_MEM (Pmode, tmp), \ | |
984 | gen_rtx_REG (Pmode, 27)); \ | |
985 | \ | |
520babc7 | 986 | /* fdc and fic only use registers for the address to flush, \ |
3914c31f JDA |
987 | they do not accept integer displacements. We align the \ |
988 | start and end addresses to the beginning of their respective \ | |
989 | cache lines to minimize the number of lines flushed. */ \ | |
990 | tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \ | |
991 | emit_insn (gen_anddi3 (start_addr, tmp, \ | |
992 | GEN_INT (-MIN_CACHELINE_SIZE))); \ | |
993 | tmp = force_reg (Pmode, \ | |
994 | plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \ | |
995 | emit_insn (gen_anddi3 (end_addr, tmp, \ | |
996 | GEN_INT (-MIN_CACHELINE_SIZE))); \ | |
997 | emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \ | |
998 | emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \ | |
999 | emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \ | |
4d595e43 JDA |
1000 | gen_reg_rtx (Pmode), \ |
1001 | gen_reg_rtx (Pmode))); \ | |
520babc7 | 1002 | } \ |
f16fe394 | 1003 | } |
eabd3262 | 1004 | |
8e1494b7 JDA |
1005 | /* Perform any machine-specific adjustment in the address of the trampoline. |
1006 | ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE. | |
1007 | Adjust the trampoline address to point to the plabel at offset 44. */ | |
1008 | ||
1009 | #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \ | |
1010 | if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46)) | |
1011 | ||
ca5f4364 RH |
1012 | /* Implement `va_start' for varargs and stdarg. */ |
1013 | ||
e5faf155 ZW |
1014 | #define EXPAND_BUILTIN_VA_START(valist, nextarg) \ |
1015 | hppa_va_start (valist, nextarg) | |
eabd3262 | 1016 | \f |
51c2de46 | 1017 | /* Addressing modes, and classification of registers for them. |
eabd3262 | 1018 | |
51c2de46 JQ |
1019 | Using autoincrement addressing modes on PA8000 class machines is |
1020 | not profitable. */ | |
eabd3262 | 1021 | |
42a21f70 JQ |
1022 | #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000) |
1023 | #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000) | |
51c2de46 | 1024 | |
42a21f70 JQ |
1025 | #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000) |
1026 | #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000) | |
eabd3262 RK |
1027 | |
1028 | /* Macros to check register numbers against specific register classes. */ | |
1029 | ||
6af713e4 JDA |
1030 | /* The following macros assume that X is a hard or pseudo reg number. |
1031 | They give nonzero only if X is a hard reg of the suitable class | |
eabd3262 RK |
1032 | or a pseudo reg currently allocated to a suitable hard reg. |
1033 | Since they use reg_renumber, they are safe only once reg_renumber | |
1034 | has been allocated, which happens in local-alloc.c. */ | |
1035 | ||
6af713e4 JDA |
1036 | #define REGNO_OK_FOR_INDEX_P(X) \ |
1037 | ((X) && ((X) < 32 \ | |
1038 | || (X >= FIRST_PSEUDO_REGISTER \ | |
1039 | && reg_renumber \ | |
1040 | && (unsigned) reg_renumber[X] < 32))) | |
1041 | #define REGNO_OK_FOR_BASE_P(X) \ | |
1042 | ((X) && ((X) < 32 \ | |
1043 | || (X >= FIRST_PSEUDO_REGISTER \ | |
1044 | && reg_renumber \ | |
1045 | && (unsigned) reg_renumber[X] < 32))) | |
1046 | #define REGNO_OK_FOR_FP_P(X) \ | |
1047 | (FP_REGNO_P (X) \ | |
1048 | || (X >= FIRST_PSEUDO_REGISTER \ | |
1049 | && reg_renumber \ | |
1050 | && FP_REGNO_P (reg_renumber[X]))) | |
eabd3262 RK |
1051 | |
1052 | /* Now macros that check whether X is a register and also, | |
1053 | strictly, whether it is in a specified class. | |
1054 | ||
38e01259 | 1055 | These macros are specific to the HP-PA, and may be used only |
eabd3262 RK |
1056 | in code for printing assembler insns and in conditions for |
1057 | define_optimization. */ | |
1058 | ||
1059 | /* 1 if X is an fp register. */ | |
1060 | ||
1061 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
1062 | \f | |
1063 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1064 | ||
1065 | #define MAX_REGS_PER_ADDRESS 2 | |
1066 | ||
51076f96 RC |
1067 | /* Non-TLS symbolic references. */ |
1068 | #define PA_SYMBOL_REF_TLS_P(RTX) \ | |
1069 | (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0) | |
1070 | ||
901a8cea JL |
1071 | /* Recognize any constant value that is a valid address except |
1072 | for symbolic addresses. We get better CSE by rejecting them | |
6eff269e BK |
1073 | here and allowing hppa_legitimize_address to break them up. We |
1074 | use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */ | |
eabd3262 | 1075 | |
901a8cea | 1076 | #define CONSTANT_ADDRESS_P(X) \ |
51076f96 RC |
1077 | ((GET_CODE (X) == LABEL_REF \ |
1078 | || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \ | |
6eff269e | 1079 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ |
6e11a328 JL |
1080 | || GET_CODE (X) == HIGH) \ |
1081 | && (reload_in_progress || reload_completed || ! symbolic_expression_p (X))) | |
6eff269e | 1082 | |
a4295210 | 1083 | /* A C expression that is nonzero if we are using the new HP assembler. */ |
520babc7 | 1084 | |
8d913d99 AM |
1085 | #ifndef NEW_HP_ASSEMBLER |
1086 | #define NEW_HP_ASSEMBLER 0 | |
f45ebe47 | 1087 | #endif |
a4295210 JDA |
1088 | |
1089 | /* The macros below define the immediate range for CONST_INTS on | |
1090 | the 64-bit port. Constants in this range can be loaded in three | |
1091 | instructions using a ldil/ldo/depdi sequence. Constants outside | |
1092 | this range are forced to the constant pool prior to reload. */ | |
1093 | ||
1094 | #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31) | |
1095 | #define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31) | |
1096 | #define LEGITIMATE_64BIT_CONST_INT_P(X) \ | |
1097 | ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT) | |
1098 | ||
1099 | /* A C expression that is nonzero if X is a legitimate constant for an | |
1100 | immediate operand. | |
1101 | ||
1102 | We include all constant integers and constant doubles, but not | |
1103 | floating-point, except for floating-point zero. We reject LABEL_REFs | |
1104 | if we're not using gas or the new HP assembler. | |
1105 | ||
1106 | In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS | |
1107 | that need more than three instructions to load prior to reload. This | |
1108 | limit is somewhat arbitrary. It takes three instructions to load a | |
1109 | CONST_INT from memory but two are memory accesses. It may be better | |
1110 | to increase the allowed range for CONST_INTS. We may also be able | |
1111 | to handle CONST_DOUBLES. */ | |
1112 | ||
8d913d99 AM |
1113 | #define LEGITIMATE_CONSTANT_P(X) \ |
1114 | ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1115 | || (X) == CONST0_RTX (GET_MODE (X))) \ | |
1116 | && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \ | |
1117 | && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \ | |
1118 | && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \ | |
1119 | && !(HOST_BITS_PER_WIDE_INT <= 32 \ | |
a4295210 JDA |
1120 | || (reload_in_progress || reload_completed) \ |
1121 | || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \ | |
8d913d99 AM |
1122 | || cint_ok_for_move (INTVAL (X)))) \ |
1123 | && !function_label_operand (X, VOIDmode)) | |
eabd3262 | 1124 | |
744b2d61 JDA |
1125 | /* Target flags set on a symbol_ref. */ |
1126 | ||
1127 | /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */ | |
1128 | #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT) | |
1129 | #define SYMBOL_REF_REFERENCED_P(RTX) \ | |
1130 | ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0) | |
1131 | ||
d8f95bed | 1132 | /* Subroutines for EXTRA_CONSTRAINT. |
eabd3262 | 1133 | |
16594451 JL |
1134 | Return 1 iff OP is a pseudo which did not get a hard register and |
1135 | we are running the reload pass. */ | |
16594451 JL |
1136 | #define IS_RELOADING_PSEUDO_P(OP) \ |
1137 | ((reload_in_progress \ | |
1138 | && GET_CODE (OP) == REG \ | |
1139 | && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ | |
1140 | && reg_renumber [REGNO (OP)] < 0)) | |
eabd3262 | 1141 | |
d8f95bed JDA |
1142 | /* Return 1 iff OP is a scaled or unscaled index address. */ |
1143 | #define IS_INDEX_ADDR_P(OP) \ | |
1144 | (GET_CODE (OP) == PLUS \ | |
1145 | && GET_MODE (OP) == Pmode \ | |
1146 | && (GET_CODE (XEXP (OP, 0)) == MULT \ | |
1147 | || GET_CODE (XEXP (OP, 1)) == MULT \ | |
1148 | || (REG_P (XEXP (OP, 0)) \ | |
1149 | && REG_P (XEXP (OP, 1))))) | |
1150 | ||
1151 | /* Return 1 iff OP is a LO_SUM DLT address. */ | |
1152 | #define IS_LO_SUM_DLT_ADDR_P(OP) \ | |
1153 | (GET_CODE (OP) == LO_SUM \ | |
1154 | && GET_MODE (OP) == Pmode \ | |
1155 | && REG_P (XEXP (OP, 0)) \ | |
1156 | && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \ | |
1157 | && GET_CODE (XEXP (OP, 1)) == UNSPEC) | |
1158 | ||
eabd3262 RK |
1159 | /* Optional extra constraints for this machine. Borrowed from sparc.h. |
1160 | ||
d8f95bed JDA |
1161 | `A' is a LO_SUM DLT memory operand. |
1162 | ||
1163 | `Q' is any memory operand that isn't a symbolic, indexed or lo_sum | |
1164 | memory operand. Note that an unassigned pseudo register is such a | |
1165 | memory operand. Needed because reload will generate these things | |
1166 | and then not re-recognize the insn, causing constrain_operands to | |
1167 | fail. | |
eabd3262 | 1168 | |
d8f95bed | 1169 | `R' is a scaled/unscaled indexed memory operand. |
eabd3262 | 1170 | |
80559c31 | 1171 | `S' is the constant 31. |
eabd3262 | 1172 | |
cae80939 | 1173 | `T' is for floating-point loads and stores. |
d8f95bed | 1174 | |
2d5ca9a0 JDA |
1175 | `U' is the constant 63. |
1176 | ||
1177 | `W' is a register indirect memory operand. We could allow short | |
1178 | displacements but GO_IF_LEGITIMATE_ADDRESS can't tell when a | |
1179 | long displacement is valid. This is only used for prefetch | |
1180 | instructions with the `sl' completer. */ | |
d8f95bed JDA |
1181 | |
1182 | #define EXTRA_CONSTRAINT(OP, C) \ | |
1183 | ((C) == 'Q' ? \ | |
1184 | (IS_RELOADING_PSEUDO_P (OP) \ | |
1185 | || (GET_CODE (OP) == MEM \ | |
1186 | && (reload_in_progress \ | |
1187 | || memory_address_p (GET_MODE (OP), XEXP (OP, 0))) \ | |
1188 | && !symbolic_memory_operand (OP, VOIDmode) \ | |
1189 | && !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0)) \ | |
1190 | && !IS_INDEX_ADDR_P (XEXP (OP, 0)))) \ | |
2d5ca9a0 JDA |
1191 | : ((C) == 'W' ? \ |
1192 | (GET_CODE (OP) == MEM \ | |
1193 | && REG_P (XEXP (OP, 0)) \ | |
1194 | && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \ | |
d8f95bed JDA |
1195 | : ((C) == 'A' ? \ |
1196 | (GET_CODE (OP) == MEM \ | |
1197 | && IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0))) \ | |
1198 | : ((C) == 'R' ? \ | |
1199 | (GET_CODE (OP) == MEM \ | |
1200 | && IS_INDEX_ADDR_P (XEXP (OP, 0))) \ | |
1201 | : ((C) == 'T' ? \ | |
1202 | (GET_CODE (OP) == MEM \ | |
1203 | && !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0)) \ | |
1204 | && !IS_INDEX_ADDR_P (XEXP (OP, 0)) \ | |
cae80939 JDA |
1205 | /* Floating-point loads and stores are used to load \ |
1206 | integer values as well as floating-point values. \ | |
1207 | They don't have the same set of REG+D address modes \ | |
1208 | as integer loads and stores. PA 1.x supports only \ | |
1209 | short displacements. PA 2.0 supports long displacements \ | |
1210 | but the base register needs to be aligned. \ | |
d8f95bed | 1211 | \ |
cae80939 JDA |
1212 | The checks in GO_IF_LEGITIMATE_ADDRESS for SFmode and \ |
1213 | DFmode test the validity of an address for use in a \ | |
1214 | floating point load or store. So, we use SFmode/DFmode \ | |
1215 | to see if the address is valid for a floating-point \ | |
1216 | load/store operation. */ \ | |
1217 | && memory_address_p ((GET_MODE_SIZE (GET_MODE (OP)) == 4 \ | |
1218 | ? SFmode \ | |
d8f95bed JDA |
1219 | : DFmode), \ |
1220 | XEXP (OP, 0))) \ | |
1221 | : ((C) == 'S' ? \ | |
1222 | (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) \ | |
1223 | : ((C) == 'U' ? \ | |
2d5ca9a0 | 1224 | (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) : 0))))))) |
520babc7 | 1225 | |
16594451 JL |
1226 | |
1227 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1228 | and check its validity for a certain class. | |
1229 | We have two alternate definitions for each of them. | |
1230 | The usual definition accepts all pseudo regs; the other rejects | |
1231 | them unless they have been allocated suitable hard regs. | |
1232 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1233 | ||
1234 | Most source files want to accept pseudo regs in the hope that | |
1235 | they will get allocated to the class that the insn wants them to be in. | |
1236 | Source files for reload pass need to be strict. | |
1237 | After reload, it makes no difference, since pseudo regs have | |
1238 | been eliminated by then. */ | |
ec241c19 | 1239 | |
eabd3262 RK |
1240 | #ifndef REG_OK_STRICT |
1241 | ||
1242 | /* Nonzero if X is a hard reg that can be used as an index | |
1243 | or if it is a pseudo reg. */ | |
1244 | #define REG_OK_FOR_INDEX_P(X) \ | |
e515e507 | 1245 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 RK |
1246 | /* Nonzero if X is a hard reg that can be used as a base reg |
1247 | or if it is a pseudo reg. */ | |
1248 | #define REG_OK_FOR_BASE_P(X) \ | |
e515e507 | 1249 | (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
eabd3262 | 1250 | |
eabd3262 RK |
1251 | #else |
1252 | ||
1253 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1254 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1255 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1256 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1257 | ||
eabd3262 RK |
1258 | #endif |
1259 | \f | |
d8f95bed JDA |
1260 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a |
1261 | valid memory address for an instruction. The MODE argument is the | |
1262 | machine mode for the MEM expression that wants to use this address. | |
1263 | ||
1264 | On HP PA-RISC, the legitimate address forms are REG+SMALLINT, | |
1265 | REG+REG, and REG+(REG*SCALE). The indexed address forms are only | |
1266 | available with floating point loads and stores, and integer loads. | |
1267 | We get better code by allowing indexed addresses in the initial | |
1268 | RTL generation. | |
1269 | ||
1270 | The acceptance of indexed addresses as legitimate implies that we | |
1271 | must provide patterns for doing indexed integer stores, or the move | |
1272 | expanders must force the address of an indexed store to a register. | |
1273 | We have adopted the latter approach. | |
1274 | ||
1275 | Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that | |
1276 | the base register is a valid pointer for indexed instructions. | |
1277 | On targets that have non-equivalent space registers, we have to | |
1278 | know at the time of assembler output which register in a REG+REG | |
1279 | pair is the base register. The REG_POINTER flag is sometimes lost | |
1280 | in reload and the following passes, so it can't be relied on during | |
1281 | code generation. Thus, we either have to canonicalize the order | |
1282 | of the registers in REG+REG indexed addresses, or treat REG+REG | |
1283 | addresses separately and provide patterns for both permutations. | |
1284 | ||
1285 | The latter approach requires several hundred additional lines of | |
1286 | code in pa.md. The downside to canonicalizing is that a PLUS | |
1287 | in the wrong order can't combine to form to make a scaled indexed | |
1288 | memory operand. As we won't need to canonicalize the operands if | |
1289 | the REG_POINTER lossage can be fixed, it seems better canonicalize. | |
1290 | ||
1291 | We initially break out scaled indexed addresses in canonical order | |
1292 | in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes | |
1293 | scaled indexed addresses during RTL generation. However, fold_rtx | |
1294 | has its own opinion on how the operands of a PLUS should be ordered. | |
1295 | If one of the operands is equivalent to a constant, it will make | |
1296 | that operand the second operand. As the base register is likely to | |
1297 | be equivalent to a SYMBOL_REF, we have made it the second operand. | |
1298 | ||
1299 | GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the | |
1300 | operands are in the order INDEX+BASE on targets with non-equivalent | |
1301 | space registers, and in any order on targets with equivalent space | |
1302 | registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing. | |
1303 | ||
1304 | We treat a SYMBOL_REF as legitimate if it is part of the current | |
1305 | function's constant-pool, because such addresses can actually be | |
1306 | output as REG+SMALLINT. | |
a08e7493 JL |
1307 | |
1308 | Note we only allow 5 bit immediates for access to a constant address; | |
1309 | doing so avoids losing for loading/storing a FP register at an address | |
1310 | which will not fit in 5 bits. */ | |
eabd3262 | 1311 | |
520babc7 | 1312 | #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20) |
eabd3262 RK |
1313 | #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X)) |
1314 | ||
520babc7 | 1315 | #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20) |
eabd3262 RK |
1316 | #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X)) |
1317 | ||
520babc7 | 1318 | #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800) |
eabd3262 RK |
1319 | #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X)) |
1320 | ||
520babc7 | 1321 | #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000) |
eabd3262 RK |
1322 | #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X)) |
1323 | ||
a4295210 JDA |
1324 | #if HOST_BITS_PER_WIDE_INT > 32 |
1325 | #define VAL_32_BITS_P(X) \ | |
1326 | ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \ | |
1327 | < (unsigned HOST_WIDE_INT) 2 << 31) | |
1328 | #else | |
1329 | #define VAL_32_BITS_P(X) 1 | |
1330 | #endif | |
1331 | #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X)) | |
1332 | ||
d8f95bed JDA |
1333 | /* These are the modes that we allow for scaled indexing. */ |
1334 | #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \ | |
1335 | ((TARGET_64BIT && (MODE) == DImode) \ | |
1336 | || (MODE) == SImode \ | |
1337 | || (MODE) == HImode \ | |
1338 | || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode))) | |
1339 | ||
1340 | /* These are the modes that we allow for unscaled indexing. */ | |
1341 | #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \ | |
1342 | ((TARGET_64BIT && (MODE) == DImode) \ | |
1343 | || (MODE) == SImode \ | |
1344 | || (MODE) == HImode \ | |
1345 | || (MODE) == QImode \ | |
1346 | || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode))) | |
1347 | ||
1348 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1349 | { \ | |
1350 | if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
eabd3262 RK |
1351 | || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \ |
1352 | || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \ | |
d8f95bed JDA |
1353 | && REG_P (XEXP (X, 0)) \ |
1354 | && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \ | |
1355 | goto ADDR; \ | |
1356 | else if (GET_CODE (X) == PLUS) \ | |
1357 | { \ | |
1358 | rtx base = 0, index = 0; \ | |
1359 | if (REG_P (XEXP (X, 1)) \ | |
1360 | && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ | |
1361 | base = XEXP (X, 1), index = XEXP (X, 0); \ | |
1362 | else if (REG_P (XEXP (X, 0)) \ | |
1363 | && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
1364 | base = XEXP (X, 0), index = XEXP (X, 1); \ | |
1365 | if (base \ | |
1366 | && GET_CODE (index) == CONST_INT \ | |
1367 | && ((INT_14_BITS (index) \ | |
cae80939 JDA |
1368 | && (((MODE) != DImode \ |
1369 | && (MODE) != SFmode \ | |
1370 | && (MODE) != DFmode) \ | |
1371 | /* The base register for DImode loads and stores \ | |
1372 | with long displacements must be aligned because \ | |
1373 | the lower three bits in the displacement are \ | |
1374 | assumed to be zero. */ \ | |
1375 | || ((MODE) == DImode \ | |
1376 | && (!TARGET_64BIT \ | |
1377 | || (INTVAL (index) % 8) == 0)) \ | |
1378 | /* Similarly, the base register for SFmode/DFmode \ | |
1379 | loads and stores with long displacements must \ | |
1380 | be aligned. \ | |
1381 | \ | |
1382 | FIXME: the ELF32 linker clobbers the LSB of \ | |
1383 | the FP register number in PA 2.0 floating-point \ | |
1384 | insns with long displacements. This is because \ | |
1385 | R_PARISC_DPREL14WR and other relocations like \ | |
1386 | it are not supported. For now, we reject long \ | |
1387 | displacements on this target. */ \ | |
1388 | || (((MODE) == SFmode || (MODE) == DFmode) \ | |
1389 | && (TARGET_SOFT_FLOAT \ | |
1390 | || (TARGET_PA_20 \ | |
1391 | && !TARGET_ELF32 \ | |
1392 | && (INTVAL (index) \ | |
1393 | % GET_MODE_SIZE (MODE)) == 0))))) \ | |
d8f95bed JDA |
1394 | || INT_5_BITS (index))) \ |
1395 | goto ADDR; \ | |
1396 | if (!TARGET_DISABLE_INDEXING \ | |
1397 | /* Only accept the "canonical" INDEX+BASE operand order \ | |
1398 | on targets with non-equivalent space registers. */ \ | |
1399 | && (TARGET_NO_SPACE_REGS \ | |
1400 | ? (base && REG_P (index)) \ | |
1401 | : (base == XEXP (X, 1) && REG_P (index) \ | |
d7459fa8 JDA |
1402 | && (reload_completed \ |
1403 | || (reload_in_progress && HARD_REGISTER_P (base)) \ | |
1404 | || REG_POINTER (base)) \ | |
1405 | && (reload_completed \ | |
1406 | || (reload_in_progress && HARD_REGISTER_P (index)) \ | |
1407 | || !REG_POINTER (index)))) \ | |
d8f95bed JDA |
1408 | && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \ |
1409 | && REG_OK_FOR_INDEX_P (index) \ | |
1410 | && borx_reg_operand (base, Pmode) \ | |
1411 | && borx_reg_operand (index, Pmode)) \ | |
1412 | goto ADDR; \ | |
1413 | if (!TARGET_DISABLE_INDEXING \ | |
1414 | && base \ | |
1415 | && GET_CODE (index) == MULT \ | |
1416 | && MODE_OK_FOR_SCALED_INDEXING_P (MODE) \ | |
1417 | && REG_P (XEXP (index, 0)) \ | |
1418 | && GET_MODE (XEXP (index, 0)) == Pmode \ | |
1419 | && REG_OK_FOR_INDEX_P (XEXP (index, 0)) \ | |
1420 | && GET_CODE (XEXP (index, 1)) == CONST_INT \ | |
1421 | && INTVAL (XEXP (index, 1)) \ | |
1422 | == (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \ | |
1423 | && borx_reg_operand (base, Pmode)) \ | |
1424 | goto ADDR; \ | |
1425 | } \ | |
1426 | else if (GET_CODE (X) == LO_SUM \ | |
1427 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1428 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1429 | && CONSTANT_P (XEXP (X, 1)) \ | |
1430 | && (TARGET_SOFT_FLOAT \ | |
1431 | /* We can allow symbolic LO_SUM addresses for PA2.0. */ \ | |
1432 | || (TARGET_PA_20 \ | |
1433 | && !TARGET_ELF32 \ | |
1434 | && GET_CODE (XEXP (X, 1)) != CONST_INT) \ | |
1435 | || ((MODE) != SFmode \ | |
1436 | && (MODE) != DFmode))) \ | |
1437 | goto ADDR; \ | |
1438 | else if (GET_CODE (X) == LO_SUM \ | |
1439 | && GET_CODE (XEXP (X, 0)) == SUBREG \ | |
1440 | && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \ | |
1441 | && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \ | |
1442 | && CONSTANT_P (XEXP (X, 1)) \ | |
1443 | && (TARGET_SOFT_FLOAT \ | |
1444 | /* We can allow symbolic LO_SUM addresses for PA2.0. */ \ | |
1445 | || (TARGET_PA_20 \ | |
1446 | && !TARGET_ELF32 \ | |
1447 | && GET_CODE (XEXP (X, 1)) != CONST_INT) \ | |
1448 | || ((MODE) != SFmode \ | |
1449 | && (MODE) != DFmode))) \ | |
1450 | goto ADDR; \ | |
1451 | else if (GET_CODE (X) == LABEL_REF \ | |
1452 | || (GET_CODE (X) == CONST_INT \ | |
1453 | && INT_5_BITS (X))) \ | |
1454 | goto ADDR; \ | |
1455 | /* Needed for -fPIC */ \ | |
1456 | else if (GET_CODE (X) == LO_SUM \ | |
1457 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1458 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1459 | && GET_CODE (XEXP (X, 1)) == UNSPEC \ | |
1460 | && (TARGET_SOFT_FLOAT \ | |
1461 | || (TARGET_PA_20 && !TARGET_ELF32) \ | |
1462 | || ((MODE) != SFmode \ | |
1463 | && (MODE) != DFmode))) \ | |
1464 | goto ADDR; \ | |
eabd3262 | 1465 | } |
cc46ae8e JL |
1466 | |
1467 | /* Look for machine dependent ways to make the invalid address AD a | |
1468 | valid address. | |
1469 | ||
1470 | For the PA, transform: | |
1471 | ||
1472 | memory(X + <large int>) | |
1473 | ||
1474 | into: | |
1475 | ||
1476 | if (<large int> & mask) >= 16 | |
1477 | Y = (<large int> & ~mask) + mask + 1 Round up. | |
1478 | else | |
1479 | Y = (<large int> & ~mask) Round down. | |
1480 | Z = X + Y | |
1481 | memory (Z + (<large int> - Y)); | |
1482 | ||
1483 | This makes reload inheritance and reload_cse work better since Z | |
1484 | can be reused. | |
1485 | ||
1486 | There may be more opportunities to improve code with this hook. */ | |
1487 | #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \ | |
1488 | do { \ | |
a4295210 | 1489 | long offset, newoffset, mask; \ |
5f0c590d | 1490 | rtx new, temp = NULL_RTX; \ |
f9bd8d8e JL |
1491 | \ |
1492 | mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
a02aa5b0 | 1493 | ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff); \ |
cc46ae8e | 1494 | \ |
a4295210 | 1495 | if (optimize && GET_CODE (AD) == PLUS) \ |
5f0c590d JL |
1496 | temp = simplify_binary_operation (PLUS, Pmode, \ |
1497 | XEXP (AD, 0), XEXP (AD, 1)); \ | |
1498 | \ | |
1499 | new = temp ? temp : AD; \ | |
1500 | \ | |
1501 | if (optimize \ | |
1502 | && GET_CODE (new) == PLUS \ | |
1503 | && GET_CODE (XEXP (new, 0)) == REG \ | |
1504 | && GET_CODE (XEXP (new, 1)) == CONST_INT) \ | |
cc46ae8e | 1505 | { \ |
5f0c590d | 1506 | offset = INTVAL (XEXP ((new), 1)); \ |
cc46ae8e JL |
1507 | \ |
1508 | /* Choose rounding direction. Round up if we are >= halfway. */ \ | |
1509 | if ((offset & mask) >= ((mask + 1) / 2)) \ | |
1510 | newoffset = (offset & ~mask) + mask + 1; \ | |
1511 | else \ | |
1512 | newoffset = offset & ~mask; \ | |
1513 | \ | |
cae80939 JDA |
1514 | /* Ensure that long displacements are aligned. */ \ |
1515 | if (!VAL_5_BITS_P (newoffset) \ | |
1516 | && GET_MODE_CLASS (MODE) == MODE_FLOAT) \ | |
1517 | newoffset &= ~(GET_MODE_SIZE (MODE) -1); \ | |
1518 | \ | |
a4295210 | 1519 | if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \ |
cc46ae8e | 1520 | { \ |
5f0c590d | 1521 | temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \ |
cc46ae8e JL |
1522 | GEN_INT (newoffset)); \ |
1523 | AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\ | |
1524 | push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \ | |
a4295210 JDA |
1525 | BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \ |
1526 | (OPNUM), (TYPE)); \ | |
cc46ae8e JL |
1527 | goto WIN; \ |
1528 | } \ | |
1529 | } \ | |
1530 | } while (0) | |
1531 | ||
1532 | ||
1533 | ||
eabd3262 RK |
1534 | \f |
1535 | /* Try machine-dependent ways of modifying an illegitimate address | |
1536 | to be legitimate. If we find one, return the new, valid address. | |
1537 | This macro is used in only one place: `memory_address' in explow.c. | |
1538 | ||
1539 | OLDX is the address as it was before break_out_memory_refs was called. | |
1540 | In some cases it is useful to look at this to decide what needs to be done. | |
1541 | ||
1542 | MODE and WIN are passed so that this macro can use | |
1543 | GO_IF_LEGITIMATE_ADDRESS. | |
1544 | ||
1545 | It is always safe for this macro to do nothing. It exists to recognize | |
901a8cea JL |
1546 | opportunities to optimize the output. */ |
1547 | ||
901a8cea JL |
1548 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ |
1549 | { rtx orig_x = (X); \ | |
1550 | (X) = hppa_legitimize_address (X, OLDX, MODE); \ | |
1551 | if ((X) != orig_x && memory_address_p (MODE, X)) \ | |
1552 | goto WIN; } | |
eabd3262 RK |
1553 | |
1554 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1555 | has an effect that depends on the machine mode it is used for. */ | |
1556 | ||
1557 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1558 | if (GET_CODE (ADDR) == PRE_DEC \ | |
1559 | || GET_CODE (ADDR) == POST_DEC \ | |
1560 | || GET_CODE (ADDR) == PRE_INC \ | |
1561 | || GET_CODE (ADDR) == POST_INC) \ | |
1562 | goto LABEL | |
1563 | \f | |
ae46c4e0 | 1564 | #define TARGET_ASM_SELECT_SECTION pa_select_section |
774acadf | 1565 | |
62910663 JDA |
1566 | /* Return a nonzero value if DECL has a section attribute. */ |
1567 | #define IN_NAMED_SECTION_P(DECL) \ | |
1568 | ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \ | |
1569 | && DECL_SECTION_NAME (DECL) != NULL_TREE) | |
1570 | ||
e7eacc8e JL |
1571 | /* Define this macro if references to a symbol must be treated |
1572 | differently depending on something about the variable or | |
1573 | function named by the symbol (such as what section it is in). | |
1574 | ||
1575 | The macro definition, if any, is executed immediately after the | |
1576 | rtl for DECL or other node is created. | |
1577 | The value of the rtl will be a `mem' whose address is a | |
1578 | `symbol_ref'. | |
1579 | ||
1580 | The usual thing for this macro to do is to a flag in the | |
1581 | `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified | |
1582 | name string in the `symbol_ref' (if one bit is not enough | |
1583 | information). | |
1584 | ||
1585 | On the HP-PA we use this to indicate if a symbol is in text or | |
fe19a83d | 1586 | data space. Also, function labels need special treatment. */ |
e7eacc8e JL |
1587 | |
1588 | #define TEXT_SPACE_P(DECL)\ | |
1589 | (TREE_CODE (DECL) == FUNCTION_DECL \ | |
1590 | || (TREE_CODE (DECL) == VAR_DECL \ | |
1591 | && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \ | |
1592 | && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \ | |
1593 | && !flag_pic) \ | |
6615c446 | 1594 | || CONSTANT_CLASS_P (DECL)) |
e7eacc8e | 1595 | |
10d17cb7 | 1596 | #define FUNCTION_NAME_P(NAME) (*(NAME) == '@') |
e7eacc8e | 1597 | |
cb4d476c JDA |
1598 | /* Specify the machine mode that this machine uses for the index in the |
1599 | tablejump instruction. For small tables, an element consists of a | |
1600 | ia-relative branch and its delay slot. When -mbig-switch is specified, | |
1601 | we use a 32-bit absolute address for non-pic code, and a 32-bit offset | |
1602 | for both 32 and 64-bit pic code. */ | |
1603 | #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode) | |
1604 | ||
1605 | /* Jump tables must be 32-bit aligned, no matter the size of the element. */ | |
937ac3f9 JL |
1606 | #define ADDR_VEC_ALIGN(ADDR_VEC) 2 |
1607 | ||
eabd3262 RK |
1608 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
1609 | #define DEFAULT_SIGNED_CHAR 1 | |
1610 | ||
1611 | /* Max number of bytes we can move from memory to memory | |
1612 | in one reasonably fast instruction. */ | |
1613 | #define MOVE_MAX 8 | |
1614 | ||
68944452 JL |
1615 | /* Higher than the default as we prefer to use simple move insns |
1616 | (better scheduling and delay slot filling) and because our | |
520babc7 JL |
1617 | built-in block move is really a 2X unrolled loop. |
1618 | ||
1619 | Believe it or not, this has to be big enough to allow for copying all | |
1620 | arguments passed in registers to avoid infinite recursion during argument | |
1621 | setup for a function call. Why? Consider how we copy the stack slots | |
1622 | reserved for parameters when they may be trashed by a call. */ | |
1623 | #define MOVE_RATIO (TARGET_64BIT ? 8 : 4) | |
68944452 | 1624 | |
9a63901f RK |
1625 | /* Define if operations between registers always perform the operation |
1626 | on the full register even if a narrower mode is specified. */ | |
1627 | #define WORD_REGISTER_OPERATIONS | |
1628 | ||
1629 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1630 | will either zero-extend or sign-extend. The value of this macro should | |
1631 | be the code that says which one of the two operations is implicitly | |
f822d252 | 1632 | done, UNKNOWN if none. */ |
9a63901f | 1633 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND |
eabd3262 RK |
1634 | |
1635 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1636 | #define SLOW_BYTE_ACCESS 1 | |
1637 | ||
eabd3262 RK |
1638 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1639 | is done just by pretending it is already truncated. */ | |
1640 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1641 | ||
eabd3262 RK |
1642 | /* Specify the machine mode that pointers have. |
1643 | After generation of rtl, the compiler makes no further distinction | |
1644 | between pointers and any other objects of this machine mode. */ | |
0a16ce6f | 1645 | #define Pmode word_mode |
eabd3262 | 1646 | |
eabd3262 RK |
1647 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, |
1648 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
1649 | should be used. CC_NOOVmode should be used when the first operand is a | |
1650 | PLUS, MINUS, or NEG. CCmode should be used when no special processing is | |
1651 | needed. */ | |
b565a316 | 1652 | #define SELECT_CC_MODE(OP,X,Y) \ |
eabd3262 RK |
1653 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \ |
1654 | ||
1655 | /* A function address in a call instruction | |
1656 | is a byte address (for indexing purposes) | |
1657 | so give the MEM rtx a byte's mode. */ | |
1658 | #define FUNCTION_MODE SImode | |
5a1c10de | 1659 | |
eabd3262 RK |
1660 | /* Define this if addresses of constant functions |
1661 | shouldn't be put through pseudo regs where they can be cse'd. | |
1662 | Desirable on machines where ordinary constants are expensive | |
1663 | but a CALL with constant address is cheap. */ | |
1664 | #define NO_FUNCTION_CSE | |
1665 | ||
d969caf8 | 1666 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
fe19a83d | 1667 | few bits. */ |
d969caf8 | 1668 | #define SHIFT_COUNT_TRUNCATED 1 |
e061ef25 | 1669 | |
eabd3262 | 1670 | /* Compute extra cost of moving data between one register class |
5de7c240 JL |
1671 | and another. |
1672 | ||
5ac6158d TG |
1673 | Make moves from SAR so expensive they should never happen. We used to |
1674 | have 0xffff here, but that generates overflow in rare cases. | |
5de7c240 | 1675 | |
5a1c10de | 1676 | Copies involving a FP register and a non-FP register are relatively |
5de7c240 JL |
1677 | expensive because they must go through memory. |
1678 | ||
1679 | Other copies are reasonably cheap. */ | |
cf011243 | 1680 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ |
5ac6158d | 1681 | (CLASS1 == SHIFT_REGS ? 0x100 \ |
5de7c240 JL |
1682 | : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \ |
1683 | : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \ | |
1684 | : 2) | |
1685 | ||
3e47bea8 JL |
1686 | /* Adjust the cost of branches. */ |
1687 | #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1) | |
1688 | ||
04664e24 RS |
1689 | /* Handling the special cases is going to get too complicated for a macro, |
1690 | just call `pa_adjust_insn_length' to do the real work. */ | |
eabd3262 | 1691 | #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ |
04664e24 RS |
1692 | LENGTH += pa_adjust_insn_length (INSN, LENGTH); |
1693 | ||
72abf941 JL |
1694 | /* Millicode insns are actually function calls with some special |
1695 | constraints on arguments and register usage. | |
1696 | ||
1697 | Millicode calls always expect their arguments in the integer argument | |
1698 | registers, and always return their result in %r29 (ret1). They | |
7d8b1412 AM |
1699 | are expected to clobber their arguments, %r1, %r29, and the return |
1700 | pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else. | |
72abf941 | 1701 | |
2561a923 JL |
1702 | This macro tells reorg that the references to arguments and |
1703 | millicode calls do not appear to happen until after the millicode call. | |
1704 | This allows reorg to put insns which set the argument registers into the | |
1705 | delay slot of the millicode call -- thus they act more like traditional | |
1706 | CALL_INSNs. | |
1707 | ||
1e5f1716 | 1708 | Note we cannot consider side effects of the insn to be delayed because |
2561a923 JL |
1709 | the branch and link insn will clobber the return pointer. If we happened |
1710 | to use the return pointer in the delay slot of the call, then we lose. | |
72abf941 JL |
1711 | |
1712 | get_attr_type will try to recognize the given insn, so make sure to | |
d0ca05ef RS |
1713 | filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns |
1714 | in particular. */ | |
2561a923 | 1715 | #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X)) |
72abf941 | 1716 | |
eabd3262 RK |
1717 | \f |
1718 | /* Control the assembler format that we output. */ | |
1719 | ||
e08fde98 JDA |
1720 | /* A C string constant describing how to begin a comment in the target |
1721 | assembler language. The compiler assumes that the comment will end at | |
1722 | the end of the line. */ | |
1723 | ||
1724 | #define ASM_COMMENT_START ";" | |
1725 | ||
eabd3262 RK |
1726 | /* Output to assembler file text saying following lines |
1727 | may contain character constants, extra white space, comments, etc. */ | |
1728 | ||
1729 | #define ASM_APP_ON "" | |
1730 | ||
1731 | /* Output to assembler file text saying following lines | |
1732 | no longer contain unusual constructs. */ | |
1733 | ||
1734 | #define ASM_APP_OFF "" | |
1735 | ||
eabd3262 RK |
1736 | /* This is how to output the definition of a user-level label named NAME, |
1737 | such as the label on a static function or variable NAME. */ | |
1738 | ||
1739 | #define ASM_OUTPUT_LABEL(FILE, NAME) \ | |
37d7333e | 1740 | do { assemble_name (FILE, NAME); \ |
37d7333e | 1741 | fputc ('\n', FILE); } while (0) |
eabd3262 | 1742 | |
eabd3262 RK |
1743 | /* This is how to output a reference to a user-level label named NAME. |
1744 | `assemble_name' uses this. */ | |
1745 | ||
1746 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
7830ba7b JDA |
1747 | do { \ |
1748 | const char *xname = (NAME); \ | |
1749 | if (FUNCTION_NAME_P (NAME)) \ | |
1750 | xname += 1; \ | |
1751 | if (xname[0] == '*') \ | |
1752 | xname += 1; \ | |
1753 | else \ | |
1754 | fputs (user_label_prefix, FILE); \ | |
1755 | fputs (xname, FILE); \ | |
1756 | } while (0) | |
eabd3262 | 1757 | |
744b2d61 JDA |
1758 | /* This how we output the symbol_ref X. */ |
1759 | ||
1760 | #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \ | |
1761 | do { \ | |
1762 | SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \ | |
1763 | assemble_name (FILE, XSTR (X, 0)); \ | |
1764 | } while (0) | |
1765 | ||
eabd3262 RK |
1766 | /* This is how to store into the string LABEL |
1767 | the symbol_ref name of an internal numbered label where | |
1768 | PREFIX is the class of label and NUM is the number within the class. | |
1769 | This is suitable for output with `assemble_name'. */ | |
1770 | ||
1771 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
e59f7d3d | 1772 | sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM)) |
eabd3262 | 1773 | |
5eb99654 | 1774 | #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label |
e7eacc8e | 1775 | |
eabd3262 RK |
1776 | #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ |
1777 | output_ascii ((FILE), (P), (SIZE)) | |
1778 | ||
cb4d476c JDA |
1779 | /* Jump tables are always placed in the text section. Technically, it |
1780 | is possible to put them in the readonly data section when -mbig-switch | |
1781 | is specified. This has the benefit of getting the table out of .text | |
1782 | and reducing branch lengths as a result. The downside is that an | |
1783 | additional insn (addil) is needed to access the table when generating | |
1784 | PIC code. The address difference table also has to use 32-bit | |
1785 | pc-relative relocations. Currently, GAS does not support these | |
1786 | relocations, although it is easily modified to do this operation. | |
1787 | The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0" | |
1788 | when using ELF GAS. A simple difference can be used when using | |
1789 | SOM GAS or the HP assembler. The final downside is GDB complains | |
1790 | about the nesting of the label for the table when debugging. */ | |
eabd3262 | 1791 | |
75197b37 | 1792 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
63671b34 | 1793 | |
cb4d476c | 1794 | /* This is how to output an element of a case-vector that is absolute. */ |
cface026 | 1795 | |
cb4d476c JDA |
1796 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
1797 | if (TARGET_BIG_SWITCH) \ | |
1798 | fprintf (FILE, "\t.word L$%04d\n", VALUE); \ | |
1799 | else \ | |
1800 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) | |
1801 | ||
1802 | /* This is how to output an element of a case-vector that is relative. | |
1803 | Since we always place jump tables in the text section, the difference | |
1804 | is absolute and requires no relocation. */ | |
eabd3262 | 1805 | |
33f7f353 | 1806 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
cb4d476c JDA |
1807 | if (TARGET_BIG_SWITCH) \ |
1808 | fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \ | |
1809 | else \ | |
3e056efc | 1810 | fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE) |
eabd3262 | 1811 | |
cb4d476c JDA |
1812 | /* This is how to output an assembler line that says to advance the |
1813 | location counter to a multiple of 2**LOG bytes. */ | |
eabd3262 RK |
1814 | |
1815 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1816 | fprintf (FILE, "\t.align %d\n", (1<<(LOG))) | |
1817 | ||
1818 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
78cabff8 JDA |
1819 | fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \ |
1820 | (unsigned HOST_WIDE_INT)(SIZE)) | |
eabd3262 | 1821 | |
d4482715 JDA |
1822 | /* This says how to output an assembler line to define an uninitialized |
1823 | global variable with size SIZE (in bytes) and alignment ALIGN (in bits). | |
1824 | This macro exists to properly support languages like C++ which do not | |
1825 | have common data. */ | |
1826 | ||
1827 | #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ | |
1828 | pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN) | |
1829 | ||
6b282118 JL |
1830 | /* This says how to output an assembler line to define a global common symbol |
1831 | with size SIZE (in bytes) and alignment ALIGN (in bits). */ | |
a291e551 | 1832 | |
d4482715 JDA |
1833 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ |
1834 | pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN) | |
a291e551 | 1835 | |
6b282118 | 1836 | /* This says how to output an assembler line to define a local common symbol |
d4482715 JDA |
1837 | with size SIZE (in bytes) and alignment ALIGN (in bits). This macro |
1838 | controls how the assembler definitions of uninitialized static variables | |
1839 | are output. */ | |
eabd3262 | 1840 | |
d4482715 JDA |
1841 | #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ |
1842 | pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN) | |
1843 | ||
6b282118 | 1844 | |
4977bab6 | 1845 | #define ASM_PN_FORMAT "%s___%lu" |
eabd3262 | 1846 | |
5921f26b JL |
1847 | /* All HP assemblers use "!" to separate logical lines. */ |
1848 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!') | |
1849 | ||
eabd3262 RK |
1850 | #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ |
1851 | ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^') | |
1852 | ||
1853 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1854 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1855 | For `%' followed by punctuation, CODE is the punctuation and X is null. | |
1856 | ||
3f8f5a3f | 1857 | On the HP-PA, the CODE can be `r', meaning this is a register-only operand |
eabd3262 RK |
1858 | and an immediate zero should be represented as `r0'. |
1859 | ||
1860 | Several % codes are defined: | |
1861 | O an operation | |
1862 | C compare conditions | |
1863 | N extract conditions | |
1864 | M modifier to handle preincrement addressing for memory refs. | |
1865 | F modifier to handle preincrement addressing for fp memory refs */ | |
1866 | ||
1867 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1868 | ||
1869 | \f | |
1870 | /* Print a memory address as an operand to reference that memory location. */ | |
1871 | ||
1872 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
03eb45c1 | 1873 | { rtx addr = ADDR; \ |
eabd3262 RK |
1874 | switch (GET_CODE (addr)) \ |
1875 | { \ | |
1876 | case REG: \ | |
d2d28085 | 1877 | fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \ |
eabd3262 RK |
1878 | break; \ |
1879 | case PLUS: \ | |
03eb45c1 NS |
1880 | gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \ |
1881 | fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \ | |
1882 | reg_names [REGNO (XEXP (addr, 0))]); \ | |
eabd3262 RK |
1883 | break; \ |
1884 | case LO_SUM: \ | |
519104fe | 1885 | if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \ |
0f8f654e RK |
1886 | fputs ("R'", FILE); \ |
1887 | else if (flag_pic == 0) \ | |
1888 | fputs ("RR'", FILE); \ | |
7ee72796 | 1889 | else \ |
6bb36601 | 1890 | fputs ("RT'", FILE); \ |
ad238e4b | 1891 | output_global_address (FILE, XEXP (addr, 1), 0); \ |
eabd3262 RK |
1892 | fputs ("(", FILE); \ |
1893 | output_operand (XEXP (addr, 0), 0); \ | |
1894 | fputs (")", FILE); \ | |
1895 | break; \ | |
09a1d028 | 1896 | case CONST_INT: \ |
4a0a75dd | 1897 | fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \ |
09a1d028 | 1898 | break; \ |
eabd3262 RK |
1899 | default: \ |
1900 | output_addr_const (FILE, addr); \ | |
1901 | }} | |
1902 | ||
1903 | \f | |
e99d6592 MS |
1904 | /* Find the return address associated with the frame given by |
1905 | FRAMEADDR. */ | |
1906 | #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ | |
1907 | (return_addr_rtx (COUNT, FRAMEADDR)) | |
bbe79f84 MS |
1908 | |
1909 | /* Used to mask out junk bits from the return address, such as | |
1910 | processor state, interrupt status, condition codes and the like. */ | |
e99d6592 MS |
1911 | #define MASK_RETURN_ADDR \ |
1912 | /* The privilege level is in the two low order bits, mask em out \ | |
bbe79f84 | 1913 | of the return address. */ \ |
2a2ea744 | 1914 | (GEN_INT (-4)) |
27a36778 MS |
1915 | |
1916 | /* The number of Pmode words for the setjmp buffer. */ | |
1917 | #define JMP_BUF_SIZE 50 | |
0c273d11 | 1918 | |
bf97847b JDA |
1919 | /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */ |
1920 | #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \ | |
1921 | "__canonicalize_funcptr_for_compare" | |
51076f96 RC |
1922 | |
1923 | #ifdef HAVE_AS_TLS | |
1924 | #undef TARGET_HAVE_TLS | |
1925 | #define TARGET_HAVE_TLS true | |
1926 | #endif |