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2c9c2489 | 1 | /* Definitions of target machine for GNU compiler, for the pdp-11 |
23a5b65a | 2 | Copyright (C) 1994-2014 Free Software Foundation, Inc. |
2c9c2489 RK |
3 | Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). |
4 | ||
7ec022b2 | 5 | This file is part of GCC. |
2c9c2489 | 6 | |
7ec022b2 | 7 | GCC is free software; you can redistribute it and/or modify |
2c9c2489 | 8 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
2c9c2489 RK |
10 | any later version. |
11 | ||
7ec022b2 | 12 | GCC is distributed in the hope that it will be useful, |
2c9c2489 RK |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
2c9c2489 | 20 | |
e7f9979a | 21 | #define CONSTANT_POOL_BEFORE_FUNCTION 0 |
2c9c2489 | 22 | |
ddd5a7c1 | 23 | /* check whether load_fpu_reg or not */ |
7021d5df PK |
24 | #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM) |
25 | #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM) | |
2c9c2489 | 26 | #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x)) |
7021d5df | 27 | #define CPU_REG_P(x) ((x) <= PC_REGNUM) |
2c9c2489 RK |
28 | |
29 | /* Names to predefine in the preprocessor for this target machine. */ | |
30 | ||
cc956ba2 NB |
31 | #define TARGET_CPU_CPP_BUILTINS() \ |
32 | do \ | |
33 | { \ | |
34 | builtin_define_std ("pdp11"); \ | |
35 | } \ | |
36 | while (0) | |
2c9c2489 | 37 | |
2c9c2489 RK |
38 | |
39 | /* Generate DBX debugging information. */ | |
40 | ||
5c958bda | 41 | #define DBX_DEBUGGING_INFO |
2c9c2489 | 42 | |
06ed4795 | 43 | #define TARGET_40_PLUS (TARGET_40 || TARGET_45) |
2c9c2489 RK |
44 | #define TARGET_10 (! TARGET_40_PLUS) |
45 | ||
d14ff9bd JM |
46 | #define TARGET_UNIX_ASM_DEFAULT 0 |
47 | ||
af36a4d2 JM |
48 | #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0) |
49 | ||
2c9c2489 RK |
50 | \f |
51 | ||
52 | /* TYPE SIZES */ | |
2c9c2489 RK |
53 | #define SHORT_TYPE_SIZE 16 |
54 | #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32) | |
55 | #define LONG_TYPE_SIZE 32 | |
56 | #define LONG_LONG_TYPE_SIZE 64 | |
57 | ||
58 | /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit | |
59 | of saving core for huge arrays - the definitions are | |
60 | already in md - but floats can never reside in | |
61 | an FPU register - we keep the FPU in double float mode | |
62 | all the time !! */ | |
63 | #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64) | |
64 | #define DOUBLE_TYPE_SIZE 64 | |
65 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
66 | ||
67 | /* machine types from ansi */ | |
68 | #define SIZE_TYPE "unsigned int" /* definition of size_t */ | |
2c9c2489 RK |
69 | #define WCHAR_TYPE "int" /* or long int???? */ |
70 | #define WCHAR_TYPE_SIZE 16 | |
71 | ||
72 | #define PTRDIFF_TYPE "int" | |
73 | ||
74 | /* target machine storage layout */ | |
75 | ||
76 | /* Define this if most significant bit is lowest numbered | |
77 | in instructions that operate on numbered bit-fields. */ | |
78 | #define BITS_BIG_ENDIAN 0 | |
79 | ||
80 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
81 | #define BYTES_BIG_ENDIAN 0 | |
82 | ||
e621b588 | 83 | /* Define this if most significant word of a multiword number is first. */ |
2c9c2489 RK |
84 | #define WORDS_BIG_ENDIAN 1 |
85 | ||
ff482c8d | 86 | /* Define that floats are in VAX order, not high word first as for ints. */ |
e621b588 PK |
87 | #define FLOAT_WORDS_BIG_ENDIAN 0 |
88 | ||
2c9c2489 RK |
89 | /* Width of a word, in units (bytes). |
90 | ||
91 | UNITS OR BYTES - seems like units */ | |
92 | #define UNITS_PER_WORD 2 | |
93 | ||
e621b588 | 94 | /* This machine doesn't use IEEE floats. */ |
a7b376ee | 95 | /* Because the pdp11 (at least Unix) convention for 32-bit ints is |
e621b588 PK |
96 | big endian, opposite for what you need for float, the vax float |
97 | conversion routines aren't actually used directly. But the underlying | |
98 | format is indeed the vax/pdp11 float format. */ | |
e621b588 PK |
99 | extern const struct real_format pdp11_f_format; |
100 | extern const struct real_format pdp11_d_format; | |
101 | ||
2c9c2489 RK |
102 | /* Maximum sized of reasonable data type |
103 | DImode or Dfmode ...*/ | |
104 | #define MAX_FIXED_MODE_SIZE 64 | |
105 | ||
2c9c2489 RK |
106 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ |
107 | #define POINTER_BOUNDARY 16 | |
108 | ||
109 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
110 | #define PARM_BOUNDARY 16 | |
111 | ||
53e2d849 LB |
112 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ |
113 | #define STACK_BOUNDARY 16 | |
114 | ||
2c9c2489 RK |
115 | /* Allocation boundary (in *bits*) for the code of a function. */ |
116 | #define FUNCTION_BOUNDARY 16 | |
117 | ||
118 | /* Alignment of field after `int : 0' in a structure. */ | |
119 | #define EMPTY_FIELD_BOUNDARY 16 | |
120 | ||
121 | /* No data type wants to be aligned rounder than this. */ | |
122 | #define BIGGEST_ALIGNMENT 16 | |
123 | ||
124 | /* Define this if move instructions will actually fail to work | |
125 | when given unaligned data. */ | |
126 | #define STRICT_ALIGNMENT 1 | |
127 | \f | |
128 | /* Standard register usage. */ | |
129 | ||
130 | /* Number of actual hardware registers. | |
131 | The hardware registers are assigned numbers for the compiler | |
132 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
133 | All registers that the compiler knows about must be given numbers, | |
134 | even those that are not normally considered general registers. | |
135 | ||
136 | we have 8 integer registers, plus 6 float | |
137 | (don't use scratch float !) */ | |
138 | ||
2c9c2489 RK |
139 | /* 1 for registers that have pervasive standard uses |
140 | and are not available for the register allocator. | |
141 | ||
142 | On the pdp, these are: | |
143 | Reg 7 = pc; | |
144 | reg 6 = sp; | |
145 | reg 5 = fp; not necessarily! | |
146 | */ | |
147 | ||
2c9c2489 RK |
148 | #define FIXED_REGISTERS \ |
149 | {0, 0, 0, 0, 0, 0, 1, 1, \ | |
58dd8e86 | 150 | 0, 0, 0, 0, 0, 0, 1, 1 } |
2c9c2489 RK |
151 | |
152 | ||
153 | ||
154 | /* 1 for registers not available across function calls. | |
155 | These must include the FIXED_REGISTERS and also any | |
156 | registers that can be used without being saved. | |
157 | The latter must include the registers where values are returned | |
158 | and the register where structure-value addresses are passed. | |
159 | Aside from that, you can include as many other registers as you like. */ | |
160 | ||
161 | /* don't know about fp */ | |
162 | #define CALL_USED_REGISTERS \ | |
163 | {1, 1, 0, 0, 0, 0, 1, 1, \ | |
58dd8e86 | 164 | 0, 0, 0, 0, 0, 0, 1, 1 } |
2c9c2489 RK |
165 | |
166 | ||
2c9c2489 RK |
167 | /* Return number of consecutive hard regs needed starting at reg REGNO |
168 | to hold something of mode MODE. | |
169 | This is ordinarily the length in words of a value of mode MODE | |
170 | but can be less for certain modes in special long registers. | |
171 | */ | |
172 | ||
173 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
7021d5df | 174 | ((REGNO <= PC_REGNUM)? \ |
2c9c2489 RK |
175 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \ |
176 | :1) | |
177 | ||
178 | ||
179 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
a01c666c PK |
180 | On the pdp, the cpu registers can hold any mode other than float |
181 | (because otherwise we may end up being asked to move from CPU to FPU | |
182 | register, which isn't a valid operation on the PDP11). | |
183 | For CPU registers, check alignment. | |
2c9c2489 | 184 | |
a01c666c | 185 | FPU accepts SF and DF but actually holds a DF - simplifies life! |
2c9c2489 RK |
186 | */ |
187 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
7021d5df | 188 | (((REGNO) <= PC_REGNUM)? \ |
2c9c2489 | 189 | ((GET_MODE_BITSIZE(MODE) <= 16) \ |
a01c666c PK |
190 | || (GET_MODE_BITSIZE(MODE) >= 32 && \ |
191 | !((REGNO) & 1) && !FLOAT_MODE_P (MODE))) \ | |
192 | :FLOAT_MODE_P (MODE)) | |
2c9c2489 RK |
193 | |
194 | ||
195 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
196 | when one has mode MODE1 and one has mode MODE2. | |
197 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
198 | for any hard reg, then this must be 0 for correct output. */ | |
199 | #define MODES_TIEABLE_P(MODE1, MODE2) 0 | |
200 | ||
201 | /* Specify the registers used for certain standard purposes. | |
202 | The values of these macros are register numbers. */ | |
203 | ||
2c9c2489 RK |
204 | /* Register in which static-chain is passed to a function. */ |
205 | /* ??? - i don't want to give up a reg for this! */ | |
206 | #define STATIC_CHAIN_REGNUM 4 | |
2c9c2489 RK |
207 | \f |
208 | /* Define the classes of registers for register constraints in the | |
209 | machine description. Also define ranges of constants. | |
210 | ||
211 | One of the classes must always be named ALL_REGS and include all hard regs. | |
212 | If there is more than one class, another class must be named NO_REGS | |
213 | and contain no registers. | |
214 | ||
215 | The name GENERAL_REGS must be the name of a class (or an alias for | |
216 | another name such as ALL_REGS). This is the class of registers | |
217 | that is allowed by "g" or "r" in a register constraint. | |
218 | Also, registers outside this class are allocated only when | |
219 | instructions express preferences for them. | |
220 | ||
221 | The classes must be numbered in nondecreasing order; that is, | |
222 | a larger-numbered class must never be contained completely | |
223 | in a smaller-numbered class. | |
224 | ||
225 | For any two classes, it is very desirable that there be another | |
226 | class that represents their union. */ | |
227 | ||
228 | /* The pdp has a couple of classes: | |
229 | ||
a7b376ee KH |
230 | MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication |
231 | (even numbered do 32-bit multiply) | |
2c9c2489 | 232 | LMUL_REGS long multiply registers (even numbered regs ) |
a7b376ee | 233 | (don't need them, all 32-bit regs are even numbered!) |
2c9c2489 RK |
234 | GENERAL_REGS is all cpu |
235 | LOAD_FPU_REGS is the first four cpu regs, they are easier to load | |
236 | NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them | |
237 | FPU_REGS is all fpu regs | |
238 | */ | |
239 | ||
240 | enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
241 | ||
242 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
243 | ||
244 | /* have to allow this till cmpsi/tstsi are fixed in a better way !! */ | |
42db504c | 245 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
2c9c2489 RK |
246 | |
247 | /* Since GENERAL_REGS is the same class as ALL_REGS, | |
248 | don't give it a different class number; just make it an alias. */ | |
249 | ||
250 | /* #define GENERAL_REGS ALL_REGS */ | |
251 | ||
71cc389b | 252 | /* Give names of register classes as strings for dump file. */ |
2c9c2489 RK |
253 | |
254 | #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" } | |
255 | ||
256 | /* Define which registers fit in which classes. | |
257 | This is an initializer for a vector of HARD_REG_SET | |
258 | of length N_REG_CLASSES. */ | |
259 | ||
58dd8e86 | 260 | #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}} |
2c9c2489 RK |
261 | |
262 | /* The same information, inverted: | |
263 | Return the class number of the smallest class containing | |
264 | reg number REGNO. This could be a conditional expression | |
265 | or could index an array. */ | |
266 | ||
58dd8e86 | 267 | #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO) |
2c9c2489 RK |
268 | |
269 | /* The class value for index registers, and the one for base regs. */ | |
270 | #define INDEX_REG_CLASS GENERAL_REGS | |
271 | #define BASE_REG_CLASS GENERAL_REGS | |
272 | ||
a01c666c PK |
273 | /* Hook for testing if memory is needed for moving between registers. */ |
274 | #define SECONDARY_MEMORY_NEEDED(class1, class2, m) \ | |
275 | pdp11_secondary_memory_needed (class1, class2, m) | |
2c9c2489 RK |
276 | |
277 | /* Return the maximum number of consecutive registers | |
278 | needed to represent mode MODE in a register of class CLASS. */ | |
279 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
280 | ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \ | |
281 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \ | |
282 | 1 \ | |
283 | ) | |
284 | ||
a01c666c PK |
285 | #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ |
286 | pdp11_cannot_change_mode_class (FROM, TO, CLASS) | |
2c9c2489 RK |
287 | \f |
288 | /* Stack layout; function entry, exit and calling. */ | |
289 | ||
290 | /* Define this if pushing a word on the stack | |
291 | makes the stack pointer a smaller address. */ | |
292 | #define STACK_GROWS_DOWNWARD | |
293 | ||
a4d05547 | 294 | /* Define this to nonzero if the nominal address of the stack frame |
2c9c2489 RK |
295 | is at the high-address end of the local variables; |
296 | that is, each additional local variable allocated | |
297 | goes at a more negative offset in the frame. | |
298 | */ | |
f62c8a5c | 299 | #define FRAME_GROWS_DOWNWARD 1 |
2c9c2489 RK |
300 | |
301 | /* Offset within stack frame to start allocating local variables at. | |
302 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
303 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
304 | of the first local allocated. */ | |
305 | #define STARTING_FRAME_OFFSET 0 | |
306 | ||
307 | /* If we generate an insn to push BYTES bytes, | |
308 | this says how many the stack pointer really advances by. | |
309 | On the pdp11, the stack is on an even boundary */ | |
310 | #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1) | |
311 | ||
312 | /* current_first_parm_offset stores the # of registers pushed on the | |
313 | stack */ | |
314 | extern int current_first_parm_offset; | |
315 | ||
58dd8e86 PK |
316 | /* Offset of first parameter from the argument pointer register value. */ |
317 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
2c9c2489 | 318 | |
2c9c2489 RK |
319 | /* Define how to find the value returned by a function. |
320 | VALTYPE is the data type of the value (as a tree). | |
321 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
322 | otherwise, FUNC is 0. */ | |
323 | #define BASE_RETURN_VALUE_REG(MODE) \ | |
a01c666c | 324 | (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM) |
2c9c2489 | 325 | |
2c9c2489 RK |
326 | /* 1 if N is a possible register number for function argument passing. |
327 | - not used on pdp */ | |
328 | ||
329 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
330 | \f | |
331 | /* Define a data type for recording info about an argument list | |
332 | during the scan of that argument list. This data type should | |
333 | hold all necessary information about the function itself | |
334 | and about the args processed so far, enough to enable macros | |
335 | such as FUNCTION_ARG to determine where the next arg should go. | |
336 | ||
337 | */ | |
338 | ||
339 | #define CUMULATIVE_ARGS int | |
340 | ||
341 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
342 | for a call to a function whose data type is FNTYPE. | |
343 | For a library call, FNTYPE is 0. | |
344 | ||
345 | ...., the offset normally starts at 0, but starts at 1 word | |
346 | when the function gets a structure-value-address as an | |
347 | invisible first argument. */ | |
348 | ||
0f6937fe | 349 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
2c9c2489 RK |
350 | ((CUM) = 0) |
351 | ||
2c9c2489 RK |
352 | /* Output assembler code to FILE to increment profiler label # LABELNO |
353 | for profiling a function entry. */ | |
354 | ||
355 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
d35d9223 | 356 | gcc_unreachable (); |
2c9c2489 RK |
357 | |
358 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
359 | the stack pointer does not matter. The value is tested only in | |
360 | functions that have frame pointers. | |
361 | No definition is equivalent to always zero. */ | |
362 | ||
363 | extern int may_call_alloca; | |
2c9c2489 RK |
364 | |
365 | #define EXIT_IGNORE_STACK 1 | |
366 | ||
58dd8e86 PK |
367 | /* Definitions for register eliminations. |
368 | ||
369 | This is an array of structures. Each structure initializes one pair | |
370 | of eliminable registers. The "from" register number is given first, | |
371 | followed by "to". Eliminations of the same "from" register are listed | |
372 | in order of preference. | |
373 | ||
374 | There are two registers that can always be eliminated on the pdp11. | |
375 | The frame pointer and the arg pointer can be replaced by either the | |
376 | hard frame pointer or to the stack pointer, depending upon the | |
377 | circumstances. The hard frame pointer is not used before reload and | |
378 | so it is not eligible for elimination. */ | |
379 | ||
380 | #define ELIMINABLE_REGS \ | |
381 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
382 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
383 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
384 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ | |
385 | ||
386 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
387 | ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO))) | |
388 | ||
2c9c2489 RK |
389 | \f |
390 | /* Addressing modes, and classification of registers for them. */ | |
391 | ||
940da324 | 392 | #define HAVE_POST_INCREMENT 1 |
2c9c2489 | 393 | |
940da324 | 394 | #define HAVE_PRE_DECREMENT 1 |
2c9c2489 RK |
395 | |
396 | /* Macros to check register numbers against specific register classes. */ | |
397 | ||
398 | /* These assume that REGNO is a hard or pseudo reg number. | |
399 | They give nonzero only if REGNO is a hard reg of the suitable class | |
400 | or a pseudo reg currently allocated to a suitable hard reg. | |
401 | Since they use reg_renumber, they are safe only once reg_renumber | |
aeb9f7cf SB |
402 | has been allocated, which happens in reginfo.c during register |
403 | allocation. */ | |
2c9c2489 | 404 | |
2c9c2489 | 405 | #define REGNO_OK_FOR_BASE_P(REGNO) \ |
58dd8e86 PK |
406 | ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \ |
407 | (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM) | |
408 | ||
409 | #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO) | |
2c9c2489 RK |
410 | |
411 | /* Now macros that check whether X is a register and also, | |
412 | strictly, whether it is in a specified class. | |
413 | */ | |
414 | ||
415 | ||
416 | \f | |
417 | /* Maximum number of registers that can appear in a valid memory address. */ | |
418 | ||
e621b588 | 419 | #define MAX_REGS_PER_ADDRESS 1 |
2c9c2489 | 420 | |
2c9c2489 RK |
421 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
422 | and check its validity for a certain class. | |
423 | We have two alternate definitions for each of them. | |
424 | The usual definition accepts all pseudo regs; the other rejects | |
425 | them unless they have been allocated suitable hard regs. | |
426 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
427 | ||
428 | Most source files want to accept pseudo regs in the hope that | |
429 | they will get allocated to the class that the insn wants them to be in. | |
430 | Source files for reload pass need to be strict. | |
431 | After reload, it makes no difference, since pseudo regs have | |
432 | been eliminated by then. */ | |
433 | ||
434 | #ifndef REG_OK_STRICT | |
435 | ||
436 | /* Nonzero if X is a hard reg that can be used as an index | |
437 | or if it is a pseudo reg. */ | |
438 | #define REG_OK_FOR_INDEX_P(X) (1) | |
439 | /* Nonzero if X is a hard reg that can be used as a base reg | |
440 | or if it is a pseudo reg. */ | |
441 | #define REG_OK_FOR_BASE_P(X) (1) | |
442 | ||
443 | #else | |
444 | ||
445 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
446 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
447 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
448 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
449 | ||
450 | #endif | |
2c9c2489 RK |
451 | \f |
452 | /* Specify the machine mode that this machine uses | |
453 | for the index in the tablejump instruction. */ | |
454 | #define CASE_VECTOR_MODE HImode | |
455 | ||
456 | /* Define this if a raw index is all that is needed for a | |
457 | `tablejump' insn. */ | |
458 | #define CASE_TAKES_INDEX_RAW | |
459 | ||
2c9c2489 RK |
460 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
461 | #define DEFAULT_SIGNED_CHAR 1 | |
462 | ||
463 | /* Max number of bytes we can move from memory to memory | |
464 | in one reasonably fast instruction. | |
465 | */ | |
466 | ||
467 | #define MOVE_MAX 2 | |
468 | ||
2c9c2489 RK |
469 | /* Nonzero if access to memory by byte is slow and undesirable. - |
470 | */ | |
471 | #define SLOW_BYTE_ACCESS 0 | |
472 | ||
473 | /* Do not break .stabs pseudos into continuations. */ | |
474 | #define DBX_CONTIN_LENGTH 0 | |
475 | ||
476 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
477 | is done just by pretending it is already truncated. */ | |
478 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
479 | ||
2c9c2489 RK |
480 | /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE, |
481 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
ff482c8d | 482 | should be used. */ |
2c9c2489 RK |
483 | |
484 | #define SELECT_CC_MODE(OP,X,Y) \ | |
485 | (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode) | |
486 | ||
2c9c2489 RK |
487 | /* Specify the machine mode that pointers have. |
488 | After generation of rtl, the compiler makes no further distinction | |
489 | between pointers and any other objects of this machine mode. */ | |
490 | #define Pmode HImode | |
491 | ||
492 | /* A function address in a call instruction | |
493 | is a word address (for indexing purposes) | |
494 | so give the MEM rtx a word's mode. */ | |
495 | #define FUNCTION_MODE HImode | |
496 | ||
497 | /* Define this if addresses of constant functions | |
498 | shouldn't be put through pseudo regs where they can be cse'd. | |
499 | Desirable on machines where ordinary constants are expensive | |
500 | but a CALL with constant address is cheap. */ | |
501 | /* #define NO_FUNCTION_CSE */ | |
502 | ||
2c9c2489 | 503 | \f |
2c9c2489 | 504 | /* Tell emit-rtl.c how to initialize special values on a per-function base. */ |
984514ac | 505 | extern rtx cc0_reg_rtx; |
2c9c2489 RK |
506 | |
507 | #define CC_STATUS_MDEP rtx | |
508 | ||
509 | #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) | |
510 | \f | |
511 | /* Tell final.c how to eliminate redundant test instructions. */ | |
512 | ||
513 | /* Here we define machine-dependent flags and fields in cc_status | |
514 | (see `conditions.h'). */ | |
515 | ||
516 | #define CC_IN_FPU 04000 | |
517 | ||
518 | /* Do UPDATE_CC if EXP is a set, used in | |
519 | NOTICE_UPDATE_CC | |
520 | ||
521 | floats only do compare correctly, else nullify ... | |
522 | ||
523 | get cc0 out soon ... | |
524 | */ | |
525 | ||
526 | /* Store in cc_status the expressions | |
527 | that the condition codes will describe | |
528 | after execution of an instruction whose pattern is EXP. | |
529 | Do not alter them if the instruction would not alter the cc's. */ | |
530 | ||
531 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
532 | { if (GET_CODE (EXP) == SET) \ | |
533 | { \ | |
534 | notice_update_cc_on_set(EXP, INSN); \ | |
535 | } \ | |
536 | else if (GET_CODE (EXP) == PARALLEL \ | |
537 | && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ | |
538 | { \ | |
539 | notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \ | |
540 | } \ | |
541 | else if (GET_CODE (EXP) == CALL) \ | |
542 | { /* all bets are off */ CC_STATUS_INIT; } \ | |
543 | if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ | |
544 | && cc_status.value2 \ | |
ed03c6cd JM |
545 | && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ |
546 | { \ | |
547 | printf ("here!\n"); \ | |
548 | cc_status.value2 = 0; \ | |
549 | } \ | |
2c9c2489 RK |
550 | } |
551 | \f | |
552 | /* Control the assembler format that we output. */ | |
553 | ||
2c9c2489 RK |
554 | /* Output to assembler file text saying following lines |
555 | may contain character constants, extra white space, comments, etc. */ | |
556 | ||
557 | #define ASM_APP_ON "" | |
558 | ||
559 | /* Output to assembler file text saying following lines | |
560 | no longer contain unusual constructs. */ | |
561 | ||
562 | #define ASM_APP_OFF "" | |
563 | ||
564 | /* Output before read-only data. */ | |
565 | ||
566 | #define TEXT_SECTION_ASM_OP "\t.text\n" | |
567 | ||
568 | /* Output before writable data. */ | |
569 | ||
570 | #define DATA_SECTION_ASM_OP "\t.data\n" | |
571 | ||
572 | /* How to refer to registers in assembler output. | |
573 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
574 | ||
575 | #define REGISTER_NAMES \ | |
d14ff9bd | 576 | {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \ |
58dd8e86 | 577 | "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" } |
2c9c2489 | 578 | |
506a61b1 KG |
579 | /* Globalizing directive for a label. */ |
580 | #define GLOBAL_ASM_OP "\t.globl " | |
2c9c2489 | 581 | |
ff482c8d | 582 | /* The prefix to add to user-visible assembler symbols. */ |
2c9c2489 | 583 | |
4e0c8ad2 | 584 | #define USER_LABEL_PREFIX "_" |
2c9c2489 | 585 | |
2c9c2489 RK |
586 | /* This is how to store into the string LABEL |
587 | the symbol_ref name of an internal numbered label where | |
588 | PREFIX is the class of label and NUM is the number within the class. | |
589 | This is suitable for output with `assemble_name'. */ | |
590 | ||
591 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
74eda121 | 592 | sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM)) |
2c9c2489 | 593 | |
2c9c2489 RK |
594 | #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ |
595 | output_ascii (FILE, P, SIZE) | |
596 | ||
2c9c2489 RK |
597 | /* This is how to output an element of a case-vector that is absolute. */ |
598 | ||
599 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
af36a4d2 | 600 | fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE) |
2c9c2489 RK |
601 | |
602 | /* This is how to output an element of a case-vector that is relative. | |
ff482c8d | 603 | Don't define this if it is not supported. */ |
2c9c2489 | 604 | |
3d3ff202 | 605 | /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */ |
2c9c2489 RK |
606 | |
607 | /* This is how to output an assembler line | |
608 | that says to advance the location counter | |
609 | to a multiple of 2**LOG bytes. | |
610 | ||
611 | who needs this???? | |
612 | */ | |
613 | ||
614 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
d14ff9bd JM |
615 | switch (LOG) \ |
616 | { \ | |
617 | case 0: \ | |
618 | break; \ | |
619 | case 1: \ | |
620 | fprintf (FILE, "\t.even\n"); \ | |
621 | break; \ | |
622 | default: \ | |
d35d9223 | 623 | gcc_unreachable (); \ |
d14ff9bd | 624 | } |
2c9c2489 RK |
625 | |
626 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
cf860dc2 | 627 | fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE)) |
2c9c2489 RK |
628 | |
629 | /* This says how to output an assembler line | |
630 | to define a global common symbol. */ | |
631 | ||
dad6bca9 PK |
632 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ |
633 | pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true) | |
634 | ||
2c9c2489 RK |
635 | |
636 | /* This says how to output an assembler line | |
637 | to define a local common symbol. */ | |
638 | ||
dad6bca9 PK |
639 | #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ |
640 | pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false) | |
2c9c2489 | 641 | |
2c9c2489 RK |
642 | /* Print a memory address as an operand to reference that memory location. */ |
643 | ||
644 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
645 | print_operand_address (FILE, ADDR) | |
646 | ||
647 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
648 | ( \ | |
649 | fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \ | |
650 | ) | |
651 | ||
652 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
653 | ( \ | |
654 | fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \ | |
655 | ) | |
656 | ||
d06cca55 | 657 | #define TRAMPOLINE_SIZE 8 |
006946e4 | 658 | #define TRAMPOLINE_ALIGNMENT 16 |
d06cca55 | 659 | |
2c9c2489 RK |
660 | /* there is no point in avoiding branches on a pdp, |
661 | since branches are really cheap - I just want to find out | |
662 | how much difference the BRANCH_COST macro makes in code */ | |
3a4fd356 | 663 | #define BRANCH_COST(speed_p, predictable_p) (TARGET_BRANCH_CHEAP ? 0 : 1) |
2c9c2489 RK |
664 | |
665 | ||
666 | #define COMPARE_FLAG_MODE HImode | |
41dfca87 JM |
667 | |
668 | #define TARGET_HAVE_NAMED_SECTIONS false | |
d33d9e47 AI |
669 | |
670 | /* pdp11-unknown-aout target has no support of C99 runtime */ | |
671 | #undef TARGET_LIBC_HAS_FUNCTION | |
672 | #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function |