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2c9c2489 | 1 | /* Definitions of target machine for GNU compiler, for the pdp-11 |
cbe34bb5 | 2 | Copyright (C) 1994-2017 Free Software Foundation, Inc. |
2c9c2489 RK |
3 | Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). |
4 | ||
7ec022b2 | 5 | This file is part of GCC. |
2c9c2489 | 6 | |
7ec022b2 | 7 | GCC is free software; you can redistribute it and/or modify |
2c9c2489 | 8 | it under the terms of the GNU General Public License as published by |
2f83c7d6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
2c9c2489 RK |
10 | any later version. |
11 | ||
7ec022b2 | 12 | GCC is distributed in the hope that it will be useful, |
2c9c2489 RK |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | along with GCC; see the file COPYING3. If not see |
19 | <http://www.gnu.org/licenses/>. */ | |
2c9c2489 | 20 | |
e7f9979a | 21 | #define CONSTANT_POOL_BEFORE_FUNCTION 0 |
2c9c2489 | 22 | |
ddd5a7c1 | 23 | /* check whether load_fpu_reg or not */ |
7021d5df PK |
24 | #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM) |
25 | #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM) | |
2c9c2489 | 26 | #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x)) |
7021d5df | 27 | #define CPU_REG_P(x) ((x) <= PC_REGNUM) |
2c9c2489 RK |
28 | |
29 | /* Names to predefine in the preprocessor for this target machine. */ | |
30 | ||
cc956ba2 NB |
31 | #define TARGET_CPU_CPP_BUILTINS() \ |
32 | do \ | |
33 | { \ | |
34 | builtin_define_std ("pdp11"); \ | |
35 | } \ | |
36 | while (0) | |
2c9c2489 | 37 | |
2c9c2489 RK |
38 | |
39 | /* Generate DBX debugging information. */ | |
40 | ||
5c958bda | 41 | #define DBX_DEBUGGING_INFO |
2c9c2489 | 42 | |
06ed4795 | 43 | #define TARGET_40_PLUS (TARGET_40 || TARGET_45) |
2c9c2489 RK |
44 | #define TARGET_10 (! TARGET_40_PLUS) |
45 | ||
d14ff9bd JM |
46 | #define TARGET_UNIX_ASM_DEFAULT 0 |
47 | ||
af36a4d2 JM |
48 | #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0) |
49 | ||
2c9c2489 RK |
50 | \f |
51 | ||
52 | /* TYPE SIZES */ | |
2c9c2489 RK |
53 | #define SHORT_TYPE_SIZE 16 |
54 | #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32) | |
55 | #define LONG_TYPE_SIZE 32 | |
56 | #define LONG_LONG_TYPE_SIZE 64 | |
57 | ||
58 | /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit | |
59 | of saving core for huge arrays - the definitions are | |
60 | already in md - but floats can never reside in | |
61 | an FPU register - we keep the FPU in double float mode | |
62 | all the time !! */ | |
63 | #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64) | |
64 | #define DOUBLE_TYPE_SIZE 64 | |
65 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
66 | ||
67 | /* machine types from ansi */ | |
68 | #define SIZE_TYPE "unsigned int" /* definition of size_t */ | |
2c9c2489 RK |
69 | #define WCHAR_TYPE "int" /* or long int???? */ |
70 | #define WCHAR_TYPE_SIZE 16 | |
71 | ||
72 | #define PTRDIFF_TYPE "int" | |
73 | ||
74 | /* target machine storage layout */ | |
75 | ||
76 | /* Define this if most significant bit is lowest numbered | |
77 | in instructions that operate on numbered bit-fields. */ | |
78 | #define BITS_BIG_ENDIAN 0 | |
79 | ||
80 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
81 | #define BYTES_BIG_ENDIAN 0 | |
82 | ||
e621b588 | 83 | /* Define this if most significant word of a multiword number is first. */ |
2c9c2489 RK |
84 | #define WORDS_BIG_ENDIAN 1 |
85 | ||
ff482c8d | 86 | /* Define that floats are in VAX order, not high word first as for ints. */ |
e621b588 PK |
87 | #define FLOAT_WORDS_BIG_ENDIAN 0 |
88 | ||
2c9c2489 RK |
89 | /* Width of a word, in units (bytes). |
90 | ||
91 | UNITS OR BYTES - seems like units */ | |
92 | #define UNITS_PER_WORD 2 | |
93 | ||
e621b588 | 94 | /* This machine doesn't use IEEE floats. */ |
a7b376ee | 95 | /* Because the pdp11 (at least Unix) convention for 32-bit ints is |
e621b588 PK |
96 | big endian, opposite for what you need for float, the vax float |
97 | conversion routines aren't actually used directly. But the underlying | |
98 | format is indeed the vax/pdp11 float format. */ | |
e621b588 PK |
99 | extern const struct real_format pdp11_f_format; |
100 | extern const struct real_format pdp11_d_format; | |
101 | ||
2c9c2489 RK |
102 | /* Maximum sized of reasonable data type |
103 | DImode or Dfmode ...*/ | |
104 | #define MAX_FIXED_MODE_SIZE 64 | |
105 | ||
2c9c2489 RK |
106 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ |
107 | #define POINTER_BOUNDARY 16 | |
108 | ||
109 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
110 | #define PARM_BOUNDARY 16 | |
111 | ||
53e2d849 LB |
112 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ |
113 | #define STACK_BOUNDARY 16 | |
114 | ||
2c9c2489 RK |
115 | /* Allocation boundary (in *bits*) for the code of a function. */ |
116 | #define FUNCTION_BOUNDARY 16 | |
117 | ||
118 | /* Alignment of field after `int : 0' in a structure. */ | |
119 | #define EMPTY_FIELD_BOUNDARY 16 | |
120 | ||
121 | /* No data type wants to be aligned rounder than this. */ | |
122 | #define BIGGEST_ALIGNMENT 16 | |
123 | ||
124 | /* Define this if move instructions will actually fail to work | |
125 | when given unaligned data. */ | |
126 | #define STRICT_ALIGNMENT 1 | |
127 | \f | |
128 | /* Standard register usage. */ | |
129 | ||
130 | /* Number of actual hardware registers. | |
131 | The hardware registers are assigned numbers for the compiler | |
132 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
133 | All registers that the compiler knows about must be given numbers, | |
134 | even those that are not normally considered general registers. | |
135 | ||
136 | we have 8 integer registers, plus 6 float | |
137 | (don't use scratch float !) */ | |
138 | ||
2c9c2489 RK |
139 | /* 1 for registers that have pervasive standard uses |
140 | and are not available for the register allocator. | |
141 | ||
142 | On the pdp, these are: | |
143 | Reg 7 = pc; | |
144 | reg 6 = sp; | |
145 | reg 5 = fp; not necessarily! | |
146 | */ | |
147 | ||
2c9c2489 RK |
148 | #define FIXED_REGISTERS \ |
149 | {0, 0, 0, 0, 0, 0, 1, 1, \ | |
58dd8e86 | 150 | 0, 0, 0, 0, 0, 0, 1, 1 } |
2c9c2489 RK |
151 | |
152 | ||
153 | ||
154 | /* 1 for registers not available across function calls. | |
155 | These must include the FIXED_REGISTERS and also any | |
156 | registers that can be used without being saved. | |
157 | The latter must include the registers where values are returned | |
158 | and the register where structure-value addresses are passed. | |
159 | Aside from that, you can include as many other registers as you like. */ | |
160 | ||
161 | /* don't know about fp */ | |
162 | #define CALL_USED_REGISTERS \ | |
163 | {1, 1, 0, 0, 0, 0, 1, 1, \ | |
58dd8e86 | 164 | 0, 0, 0, 0, 0, 0, 1, 1 } |
2c9c2489 RK |
165 | |
166 | ||
2c9c2489 RK |
167 | /* Specify the registers used for certain standard purposes. |
168 | The values of these macros are register numbers. */ | |
169 | ||
2c9c2489 RK |
170 | /* Register in which static-chain is passed to a function. */ |
171 | /* ??? - i don't want to give up a reg for this! */ | |
172 | #define STATIC_CHAIN_REGNUM 4 | |
2c9c2489 RK |
173 | \f |
174 | /* Define the classes of registers for register constraints in the | |
175 | machine description. Also define ranges of constants. | |
176 | ||
177 | One of the classes must always be named ALL_REGS and include all hard regs. | |
178 | If there is more than one class, another class must be named NO_REGS | |
179 | and contain no registers. | |
180 | ||
181 | The name GENERAL_REGS must be the name of a class (or an alias for | |
182 | another name such as ALL_REGS). This is the class of registers | |
183 | that is allowed by "g" or "r" in a register constraint. | |
184 | Also, registers outside this class are allocated only when | |
185 | instructions express preferences for them. | |
186 | ||
187 | The classes must be numbered in nondecreasing order; that is, | |
188 | a larger-numbered class must never be contained completely | |
189 | in a smaller-numbered class. | |
190 | ||
191 | For any two classes, it is very desirable that there be another | |
192 | class that represents their union. */ | |
193 | ||
194 | /* The pdp has a couple of classes: | |
195 | ||
a7b376ee KH |
196 | MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication |
197 | (even numbered do 32-bit multiply) | |
2c9c2489 | 198 | LMUL_REGS long multiply registers (even numbered regs ) |
a7b376ee | 199 | (don't need them, all 32-bit regs are even numbered!) |
2c9c2489 RK |
200 | GENERAL_REGS is all cpu |
201 | LOAD_FPU_REGS is the first four cpu regs, they are easier to load | |
202 | NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them | |
203 | FPU_REGS is all fpu regs | |
204 | */ | |
205 | ||
206 | enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
207 | ||
208 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
209 | ||
210 | /* have to allow this till cmpsi/tstsi are fixed in a better way !! */ | |
42db504c | 211 | #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true |
2c9c2489 RK |
212 | |
213 | /* Since GENERAL_REGS is the same class as ALL_REGS, | |
214 | don't give it a different class number; just make it an alias. */ | |
215 | ||
216 | /* #define GENERAL_REGS ALL_REGS */ | |
217 | ||
71cc389b | 218 | /* Give names of register classes as strings for dump file. */ |
2c9c2489 RK |
219 | |
220 | #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" } | |
221 | ||
222 | /* Define which registers fit in which classes. | |
223 | This is an initializer for a vector of HARD_REG_SET | |
224 | of length N_REG_CLASSES. */ | |
225 | ||
58dd8e86 | 226 | #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0xc0ff}, {0x0f00}, {0x3000}, {0x3f00}, {0xffff}} |
2c9c2489 RK |
227 | |
228 | /* The same information, inverted: | |
229 | Return the class number of the smallest class containing | |
230 | reg number REGNO. This could be a conditional expression | |
231 | or could index an array. */ | |
232 | ||
58dd8e86 | 233 | #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO) |
2c9c2489 RK |
234 | |
235 | /* The class value for index registers, and the one for base regs. */ | |
236 | #define INDEX_REG_CLASS GENERAL_REGS | |
237 | #define BASE_REG_CLASS GENERAL_REGS | |
238 | ||
2c9c2489 RK |
239 | /* Return the maximum number of consecutive registers |
240 | needed to represent mode MODE in a register of class CLASS. */ | |
241 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
242 | ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \ | |
243 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \ | |
244 | 1 \ | |
245 | ) | |
2c9c2489 RK |
246 | \f |
247 | /* Stack layout; function entry, exit and calling. */ | |
248 | ||
249 | /* Define this if pushing a word on the stack | |
250 | makes the stack pointer a smaller address. */ | |
62f9f30b | 251 | #define STACK_GROWS_DOWNWARD 1 |
2c9c2489 | 252 | |
a4d05547 | 253 | /* Define this to nonzero if the nominal address of the stack frame |
2c9c2489 RK |
254 | is at the high-address end of the local variables; |
255 | that is, each additional local variable allocated | |
256 | goes at a more negative offset in the frame. | |
257 | */ | |
f62c8a5c | 258 | #define FRAME_GROWS_DOWNWARD 1 |
2c9c2489 | 259 | |
7b4df2bf | 260 | #define PUSH_ROUNDING(BYTES) pdp11_push_rounding (BYTES) |
2c9c2489 RK |
261 | |
262 | /* current_first_parm_offset stores the # of registers pushed on the | |
263 | stack */ | |
264 | extern int current_first_parm_offset; | |
265 | ||
58dd8e86 PK |
266 | /* Offset of first parameter from the argument pointer register value. */ |
267 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
2c9c2489 | 268 | |
2c9c2489 RK |
269 | /* Define how to find the value returned by a function. |
270 | VALTYPE is the data type of the value (as a tree). | |
271 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
272 | otherwise, FUNC is 0. */ | |
273 | #define BASE_RETURN_VALUE_REG(MODE) \ | |
a01c666c | 274 | (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM) |
2c9c2489 | 275 | |
2c9c2489 RK |
276 | /* 1 if N is a possible register number for function argument passing. |
277 | - not used on pdp */ | |
278 | ||
279 | #define FUNCTION_ARG_REGNO_P(N) 0 | |
280 | \f | |
281 | /* Define a data type for recording info about an argument list | |
282 | during the scan of that argument list. This data type should | |
283 | hold all necessary information about the function itself | |
284 | and about the args processed so far, enough to enable macros | |
285 | such as FUNCTION_ARG to determine where the next arg should go. | |
286 | ||
287 | */ | |
288 | ||
289 | #define CUMULATIVE_ARGS int | |
290 | ||
291 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
292 | for a call to a function whose data type is FNTYPE. | |
293 | For a library call, FNTYPE is 0. | |
294 | ||
295 | ...., the offset normally starts at 0, but starts at 1 word | |
296 | when the function gets a structure-value-address as an | |
297 | invisible first argument. */ | |
298 | ||
0f6937fe | 299 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ |
2c9c2489 RK |
300 | ((CUM) = 0) |
301 | ||
2c9c2489 RK |
302 | /* Output assembler code to FILE to increment profiler label # LABELNO |
303 | for profiling a function entry. */ | |
304 | ||
305 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
d35d9223 | 306 | gcc_unreachable (); |
2c9c2489 RK |
307 | |
308 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
309 | the stack pointer does not matter. The value is tested only in | |
310 | functions that have frame pointers. | |
311 | No definition is equivalent to always zero. */ | |
312 | ||
313 | extern int may_call_alloca; | |
2c9c2489 RK |
314 | |
315 | #define EXIT_IGNORE_STACK 1 | |
316 | ||
58dd8e86 PK |
317 | /* Definitions for register eliminations. |
318 | ||
319 | This is an array of structures. Each structure initializes one pair | |
320 | of eliminable registers. The "from" register number is given first, | |
321 | followed by "to". Eliminations of the same "from" register are listed | |
322 | in order of preference. | |
323 | ||
324 | There are two registers that can always be eliminated on the pdp11. | |
325 | The frame pointer and the arg pointer can be replaced by either the | |
326 | hard frame pointer or to the stack pointer, depending upon the | |
327 | circumstances. The hard frame pointer is not used before reload and | |
328 | so it is not eligible for elimination. */ | |
329 | ||
330 | #define ELIMINABLE_REGS \ | |
331 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
332 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
333 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
334 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ | |
335 | ||
336 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
337 | ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO))) | |
338 | ||
2c9c2489 RK |
339 | \f |
340 | /* Addressing modes, and classification of registers for them. */ | |
341 | ||
940da324 | 342 | #define HAVE_POST_INCREMENT 1 |
2c9c2489 | 343 | |
940da324 | 344 | #define HAVE_PRE_DECREMENT 1 |
2c9c2489 RK |
345 | |
346 | /* Macros to check register numbers against specific register classes. */ | |
347 | ||
348 | /* These assume that REGNO is a hard or pseudo reg number. | |
349 | They give nonzero only if REGNO is a hard reg of the suitable class | |
350 | or a pseudo reg currently allocated to a suitable hard reg. | |
351 | Since they use reg_renumber, they are safe only once reg_renumber | |
aeb9f7cf SB |
352 | has been allocated, which happens in reginfo.c during register |
353 | allocation. */ | |
2c9c2489 | 354 | |
2c9c2489 | 355 | #define REGNO_OK_FOR_BASE_P(REGNO) \ |
58dd8e86 PK |
356 | ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \ |
357 | (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM) | |
358 | ||
359 | #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO) | |
2c9c2489 RK |
360 | |
361 | /* Now macros that check whether X is a register and also, | |
362 | strictly, whether it is in a specified class. | |
363 | */ | |
364 | ||
365 | ||
366 | \f | |
367 | /* Maximum number of registers that can appear in a valid memory address. */ | |
368 | ||
e621b588 | 369 | #define MAX_REGS_PER_ADDRESS 1 |
2c9c2489 | 370 | |
2c9c2489 RK |
371 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx |
372 | and check its validity for a certain class. | |
373 | We have two alternate definitions for each of them. | |
374 | The usual definition accepts all pseudo regs; the other rejects | |
375 | them unless they have been allocated suitable hard regs. | |
376 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
377 | ||
378 | Most source files want to accept pseudo regs in the hope that | |
379 | they will get allocated to the class that the insn wants them to be in. | |
380 | Source files for reload pass need to be strict. | |
381 | After reload, it makes no difference, since pseudo regs have | |
382 | been eliminated by then. */ | |
383 | ||
384 | #ifndef REG_OK_STRICT | |
385 | ||
386 | /* Nonzero if X is a hard reg that can be used as an index | |
387 | or if it is a pseudo reg. */ | |
388 | #define REG_OK_FOR_INDEX_P(X) (1) | |
389 | /* Nonzero if X is a hard reg that can be used as a base reg | |
390 | or if it is a pseudo reg. */ | |
391 | #define REG_OK_FOR_BASE_P(X) (1) | |
392 | ||
393 | #else | |
394 | ||
395 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
396 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
397 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
398 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
399 | ||
400 | #endif | |
2c9c2489 RK |
401 | \f |
402 | /* Specify the machine mode that this machine uses | |
403 | for the index in the tablejump instruction. */ | |
404 | #define CASE_VECTOR_MODE HImode | |
405 | ||
406 | /* Define this if a raw index is all that is needed for a | |
407 | `tablejump' insn. */ | |
408 | #define CASE_TAKES_INDEX_RAW | |
409 | ||
2c9c2489 RK |
410 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
411 | #define DEFAULT_SIGNED_CHAR 1 | |
412 | ||
413 | /* Max number of bytes we can move from memory to memory | |
414 | in one reasonably fast instruction. | |
415 | */ | |
416 | ||
417 | #define MOVE_MAX 2 | |
418 | ||
2c9c2489 RK |
419 | /* Nonzero if access to memory by byte is slow and undesirable. - |
420 | */ | |
421 | #define SLOW_BYTE_ACCESS 0 | |
422 | ||
423 | /* Do not break .stabs pseudos into continuations. */ | |
424 | #define DBX_CONTIN_LENGTH 0 | |
425 | ||
2c9c2489 RK |
426 | /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE, |
427 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
ff482c8d | 428 | should be used. */ |
2c9c2489 RK |
429 | |
430 | #define SELECT_CC_MODE(OP,X,Y) \ | |
431 | (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode) | |
432 | ||
2c9c2489 RK |
433 | /* Specify the machine mode that pointers have. |
434 | After generation of rtl, the compiler makes no further distinction | |
435 | between pointers and any other objects of this machine mode. */ | |
436 | #define Pmode HImode | |
437 | ||
438 | /* A function address in a call instruction | |
439 | is a word address (for indexing purposes) | |
440 | so give the MEM rtx a word's mode. */ | |
441 | #define FUNCTION_MODE HImode | |
442 | ||
443 | /* Define this if addresses of constant functions | |
444 | shouldn't be put through pseudo regs where they can be cse'd. | |
445 | Desirable on machines where ordinary constants are expensive | |
446 | but a CALL with constant address is cheap. */ | |
447 | /* #define NO_FUNCTION_CSE */ | |
448 | ||
2c9c2489 | 449 | \f |
2c9c2489 | 450 | /* Tell emit-rtl.c how to initialize special values on a per-function base. */ |
984514ac | 451 | extern rtx cc0_reg_rtx; |
2c9c2489 RK |
452 | |
453 | #define CC_STATUS_MDEP rtx | |
454 | ||
455 | #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) | |
456 | \f | |
457 | /* Tell final.c how to eliminate redundant test instructions. */ | |
458 | ||
459 | /* Here we define machine-dependent flags and fields in cc_status | |
460 | (see `conditions.h'). */ | |
461 | ||
462 | #define CC_IN_FPU 04000 | |
463 | ||
464 | /* Do UPDATE_CC if EXP is a set, used in | |
465 | NOTICE_UPDATE_CC | |
466 | ||
467 | floats only do compare correctly, else nullify ... | |
468 | ||
469 | get cc0 out soon ... | |
470 | */ | |
471 | ||
472 | /* Store in cc_status the expressions | |
473 | that the condition codes will describe | |
474 | after execution of an instruction whose pattern is EXP. | |
475 | Do not alter them if the instruction would not alter the cc's. */ | |
476 | ||
477 | #define NOTICE_UPDATE_CC(EXP, INSN) \ | |
478 | { if (GET_CODE (EXP) == SET) \ | |
479 | { \ | |
480 | notice_update_cc_on_set(EXP, INSN); \ | |
481 | } \ | |
482 | else if (GET_CODE (EXP) == PARALLEL \ | |
483 | && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ | |
484 | { \ | |
485 | notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \ | |
486 | } \ | |
487 | else if (GET_CODE (EXP) == CALL) \ | |
488 | { /* all bets are off */ CC_STATUS_INIT; } \ | |
489 | if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ | |
490 | && cc_status.value2 \ | |
ed03c6cd JM |
491 | && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ |
492 | { \ | |
493 | printf ("here!\n"); \ | |
494 | cc_status.value2 = 0; \ | |
495 | } \ | |
2c9c2489 RK |
496 | } |
497 | \f | |
498 | /* Control the assembler format that we output. */ | |
499 | ||
2c9c2489 RK |
500 | /* Output to assembler file text saying following lines |
501 | may contain character constants, extra white space, comments, etc. */ | |
502 | ||
503 | #define ASM_APP_ON "" | |
504 | ||
505 | /* Output to assembler file text saying following lines | |
506 | no longer contain unusual constructs. */ | |
507 | ||
508 | #define ASM_APP_OFF "" | |
509 | ||
510 | /* Output before read-only data. */ | |
511 | ||
512 | #define TEXT_SECTION_ASM_OP "\t.text\n" | |
513 | ||
514 | /* Output before writable data. */ | |
515 | ||
516 | #define DATA_SECTION_ASM_OP "\t.data\n" | |
517 | ||
518 | /* How to refer to registers in assembler output. | |
519 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
520 | ||
521 | #define REGISTER_NAMES \ | |
d14ff9bd | 522 | {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \ |
58dd8e86 | 523 | "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "fp", "ap" } |
2c9c2489 | 524 | |
506a61b1 KG |
525 | /* Globalizing directive for a label. */ |
526 | #define GLOBAL_ASM_OP "\t.globl " | |
2c9c2489 | 527 | |
ff482c8d | 528 | /* The prefix to add to user-visible assembler symbols. */ |
2c9c2489 | 529 | |
4e0c8ad2 | 530 | #define USER_LABEL_PREFIX "_" |
2c9c2489 | 531 | |
2c9c2489 RK |
532 | /* This is how to store into the string LABEL |
533 | the symbol_ref name of an internal numbered label where | |
534 | PREFIX is the class of label and NUM is the number within the class. | |
535 | This is suitable for output with `assemble_name'. */ | |
536 | ||
537 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
74eda121 | 538 | sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM)) |
2c9c2489 | 539 | |
2c9c2489 RK |
540 | #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \ |
541 | output_ascii (FILE, P, SIZE) | |
542 | ||
2c9c2489 RK |
543 | /* This is how to output an element of a case-vector that is absolute. */ |
544 | ||
545 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
af36a4d2 | 546 | fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE) |
2c9c2489 RK |
547 | |
548 | /* This is how to output an element of a case-vector that is relative. | |
ff482c8d | 549 | Don't define this if it is not supported. */ |
2c9c2489 | 550 | |
3d3ff202 | 551 | /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */ |
2c9c2489 RK |
552 | |
553 | /* This is how to output an assembler line | |
554 | that says to advance the location counter | |
555 | to a multiple of 2**LOG bytes. | |
556 | ||
557 | who needs this???? | |
558 | */ | |
559 | ||
560 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
d14ff9bd JM |
561 | switch (LOG) \ |
562 | { \ | |
563 | case 0: \ | |
564 | break; \ | |
565 | case 1: \ | |
566 | fprintf (FILE, "\t.even\n"); \ | |
567 | break; \ | |
568 | default: \ | |
d35d9223 | 569 | gcc_unreachable (); \ |
d14ff9bd | 570 | } |
2c9c2489 RK |
571 | |
572 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
cf860dc2 | 573 | fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE)) |
2c9c2489 RK |
574 | |
575 | /* This says how to output an assembler line | |
576 | to define a global common symbol. */ | |
577 | ||
dad6bca9 PK |
578 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ |
579 | pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true) | |
580 | ||
2c9c2489 RK |
581 | |
582 | /* This says how to output an assembler line | |
583 | to define a local common symbol. */ | |
584 | ||
dad6bca9 PK |
585 | #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ |
586 | pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false) | |
2c9c2489 | 587 | |
2c9c2489 RK |
588 | /* Print a memory address as an operand to reference that memory location. */ |
589 | ||
590 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
591 | print_operand_address (FILE, ADDR) | |
592 | ||
593 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
594 | ( \ | |
595 | fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \ | |
596 | ) | |
597 | ||
598 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
599 | ( \ | |
600 | fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \ | |
601 | ) | |
602 | ||
d06cca55 | 603 | #define TRAMPOLINE_SIZE 8 |
006946e4 | 604 | #define TRAMPOLINE_ALIGNMENT 16 |
d06cca55 | 605 | |
2c9c2489 RK |
606 | /* there is no point in avoiding branches on a pdp, |
607 | since branches are really cheap - I just want to find out | |
608 | how much difference the BRANCH_COST macro makes in code */ | |
ef295bce | 609 | #define BRANCH_COST(speed_p, predictable_p) pdp11_branch_cost () |
2c9c2489 RK |
610 | |
611 | #define COMPARE_FLAG_MODE HImode | |
41dfca87 JM |
612 | |
613 | #define TARGET_HAVE_NAMED_SECTIONS false | |
d33d9e47 AI |
614 | |
615 | /* pdp11-unknown-aout target has no support of C99 runtime */ | |
616 | #undef TARGET_LIBC_HAS_FUNCTION | |
617 | #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function |