]> git.ipfire.org Git - thirdparty/gcc.git/blame - gcc/config/riscv/riscv-builtins.cc
RISC-V: Add prototypes for RISC-V Crypto built-in functions
[thirdparty/gcc.git] / gcc / config / riscv / riscv-builtins.cc
CommitLineData
09cae750 1/* Subroutines used for expanding RISC-V builtins.
83ffe9cd 2 Copyright (C) 2011-2023 Free Software Foundation, Inc.
09cae750
PD
3 Contributed by Andrew Waterman (andrew@sifive.com).
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 3, or (at your option)
10any later version.
11
12GCC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
8fcc61f8
RS
21#define IN_TARGET_CODE 1
22
09cae750
PD
23#include "config.h"
24#include "system.h"
25#include "coretypes.h"
26#include "tm.h"
27#include "rtl.h"
28#include "tree.h"
29#include "gimple-expr.h"
30#include "memmodel.h"
31#include "expmed.h"
1b68a156 32#include "profile-count.h"
09cae750
PD
33#include "optabs.h"
34#include "recog.h"
35#include "diagnostic-core.h"
36#include "stor-layout.h"
27d68a60 37#include "stringpool.h"
09cae750
PD
38#include "expr.h"
39#include "langhooks.h"
7d935cdd 40#include "tm_p.h"
09cae750
PD
41
42/* Macros to create an enumeration identifier for a function prototype. */
33d9794b 43#define RISCV_FTYPE_NAME0(A) RISCV_##A##_FTYPE
09cae750 44#define RISCV_FTYPE_NAME1(A, B) RISCV_##A##_FTYPE_##B
89456334
LS
45#define RISCV_FTYPE_NAME2(A, B, C) RISCV_##A##_FTYPE_##B##_##C
46#define RISCV_FTYPE_NAME3(A, B, C, D) RISCV_##A##_FTYPE_##B##_##C##_##D
09cae750
PD
47
48/* Classifies the prototype of a built-in function. */
49enum riscv_function_type {
50#define DEF_RISCV_FTYPE(NARGS, LIST) RISCV_FTYPE_NAME##NARGS LIST,
51#include "config/riscv/riscv-ftypes.def"
52#undef DEF_RISCV_FTYPE
53 RISCV_MAX_FTYPE_MAX
54};
55
56/* Specifies how a built-in function should be converted into rtl. */
57enum riscv_builtin_type {
58 /* The function corresponds directly to an .md pattern. */
59 RISCV_BUILTIN_DIRECT,
60
61 /* Likewise, but with return type VOID. */
62 RISCV_BUILTIN_DIRECT_NO_TARGET
63};
64
65/* Declare an availability predicate for built-in functions. */
66#define AVAIL(NAME, COND) \
67 static unsigned int \
68 riscv_builtin_avail_##NAME (void) \
69 { \
70 return (COND); \
71 }
72
73/* This structure describes a single built-in function. */
74struct riscv_builtin_description {
75 /* The code of the main .md file instruction. See riscv_builtin_type
76 for more information. */
77 enum insn_code icode;
78
79 /* The name of the built-in function. */
80 const char *name;
81
82 /* Specifies how the function should be expanded. */
83 enum riscv_builtin_type builtin_type;
84
85 /* The function's prototype. */
86 enum riscv_function_type prototype;
87
88 /* Whether the function is available. */
89 unsigned int (*avail) (void);
90};
91
ac96e906 92AVAIL (hard_float, TARGET_HARD_FLOAT || TARGET_ZFINX)
3df3ca90
S
93AVAIL (clean32, TARGET_ZICBOM && !TARGET_64BIT)
94AVAIL (clean64, TARGET_ZICBOM && TARGET_64BIT)
95AVAIL (flush32, TARGET_ZICBOM && !TARGET_64BIT)
96AVAIL (flush64, TARGET_ZICBOM && TARGET_64BIT)
97AVAIL (inval32, TARGET_ZICBOM && !TARGET_64BIT)
98AVAIL (inval64, TARGET_ZICBOM && TARGET_64BIT)
99AVAIL (zero32, TARGET_ZICBOZ && !TARGET_64BIT)
100AVAIL (zero64, TARGET_ZICBOZ && TARGET_64BIT)
101AVAIL (prefetchi32, TARGET_ZICBOP && !TARGET_64BIT)
102AVAIL (prefetchi64, TARGET_ZICBOP && TARGET_64BIT)
c717a92d 103AVAIL (always, (!0))
3df3ca90 104
09cae750
PD
105/* Construct a riscv_builtin_description from the given arguments.
106
107 INSN is the name of the associated instruction pattern, without the
108 leading CODE_FOR_riscv_.
109
110 NAME is the name of the function itself, without the leading
111 "__builtin_riscv_".
112
113 BUILTIN_TYPE and FUNCTION_TYPE are riscv_builtin_description fields.
114
115 AVAIL is the name of the availability predicate, without the leading
116 riscv_builtin_avail_. */
117#define RISCV_BUILTIN(INSN, NAME, BUILTIN_TYPE, FUNCTION_TYPE, AVAIL) \
118 { CODE_FOR_riscv_ ## INSN, "__builtin_riscv_" NAME, \
119 BUILTIN_TYPE, FUNCTION_TYPE, riscv_builtin_avail_ ## AVAIL }
120
121/* Define __builtin_riscv_<INSN>, which is a RISCV_BUILTIN_DIRECT function
122 mapped to instruction CODE_FOR_riscv_<INSN>, FUNCTION_TYPE and AVAIL
123 are as for RISCV_BUILTIN. */
124#define DIRECT_BUILTIN(INSN, FUNCTION_TYPE, AVAIL) \
125 RISCV_BUILTIN (INSN, #INSN, RISCV_BUILTIN_DIRECT, FUNCTION_TYPE, AVAIL)
126
127/* Define __builtin_riscv_<INSN>, which is a RISCV_BUILTIN_DIRECT_NO_TARGET
128 function mapped to instruction CODE_FOR_riscv_<INSN>, FUNCTION_TYPE
129 and AVAIL are as for RISCV_BUILTIN. */
130#define DIRECT_NO_TARGET_BUILTIN(INSN, FUNCTION_TYPE, AVAIL) \
131 RISCV_BUILTIN (INSN, #INSN, RISCV_BUILTIN_DIRECT_NO_TARGET, \
132 FUNCTION_TYPE, AVAIL)
133
134/* Argument types. */
135#define RISCV_ATYPE_VOID void_type_node
136#define RISCV_ATYPE_USI unsigned_intSI_type_node
89456334
LS
137#define RISCV_ATYPE_QI intQI_type_node
138#define RISCV_ATYPE_HI intHI_type_node
3df3ca90
S
139#define RISCV_ATYPE_SI intSI_type_node
140#define RISCV_ATYPE_DI intDI_type_node
970b03c0 141#define RISCV_ATYPE_VOID_PTR ptr_type_node
09cae750
PD
142
143/* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
144 their associated RISCV_ATYPEs. */
33d9794b
KC
145#define RISCV_FTYPE_ATYPES0(A) \
146 RISCV_ATYPE_##A
09cae750
PD
147#define RISCV_FTYPE_ATYPES1(A, B) \
148 RISCV_ATYPE_##A, RISCV_ATYPE_##B
89456334
LS
149#define RISCV_FTYPE_ATYPES2(A, B, C) \
150 RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C
151#define RISCV_FTYPE_ATYPES3(A, B, C, D) \
152 RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C, RISCV_ATYPE_##D
09cae750
PD
153
154static const struct riscv_builtin_description riscv_builtins[] = {
3df3ca90
S
155 #include "riscv-cmo.def"
156
33d9794b 157 DIRECT_BUILTIN (frflags, RISCV_USI_FTYPE, hard_float),
c717a92d
PT
158 DIRECT_NO_TARGET_BUILTIN (fsflags, RISCV_VOID_FTYPE_USI, hard_float),
159 DIRECT_NO_TARGET_BUILTIN (pause, RISCV_VOID_FTYPE, always),
09cae750
PD
160};
161
162/* Index I is the function declaration for riscv_builtins[I], or null if the
163 function isn't defined on this target. */
164static GTY(()) tree riscv_builtin_decls[ARRAY_SIZE (riscv_builtins)];
165
166/* Get the index I of the function declaration for riscv_builtin_decls[I]
167 using the instruction code or return null if not defined for the target. */
168static GTY(()) int riscv_builtin_decl_index[NUM_INSN_CODES];
169
170#define GET_BUILTIN_DECL(CODE) \
171 riscv_builtin_decls[riscv_builtin_decl_index[(CODE)]]
172
27d68a60
KC
173tree riscv_float16_type_node = NULL_TREE;
174
09cae750
PD
175/* Return the function type associated with function prototype TYPE. */
176
177static tree
178riscv_build_function_type (enum riscv_function_type type)
179{
180 static tree types[(int) RISCV_MAX_FTYPE_MAX];
181
182 if (types[(int) type] == NULL_TREE)
183 switch (type)
184 {
185#define DEF_RISCV_FTYPE(NUM, ARGS) \
186 case RISCV_FTYPE_NAME##NUM ARGS: \
187 types[(int) type] \
188 = build_function_type_list (RISCV_FTYPE_ATYPES##NUM ARGS, \
189 NULL_TREE); \
190 break;
191#include "config/riscv/riscv-ftypes.def"
192#undef DEF_RISCV_FTYPE
193 default:
194 gcc_unreachable ();
195 }
196
197 return types[(int) type];
198}
199
27d68a60
KC
200static void
201riscv_init_builtin_types (void)
202{
203 /* Provide the _Float16 type and float16_type_node if needed. */
204 if (!float16_type_node)
205 {
206 riscv_float16_type_node = make_node (REAL_TYPE);
207 TYPE_PRECISION (riscv_float16_type_node) = 16;
208 SET_TYPE_MODE (riscv_float16_type_node, HFmode);
209 layout_type (riscv_float16_type_node);
210 }
211 else
212 riscv_float16_type_node = float16_type_node;
213
214 if (!maybe_get_identifier ("_Float16"))
215 lang_hooks.types.register_builtin_type (riscv_float16_type_node,
216 "_Float16");
217}
218
09cae750
PD
219/* Implement TARGET_INIT_BUILTINS. */
220
221void
222riscv_init_builtins (void)
223{
27d68a60 224 riscv_init_builtin_types ();
03f33657 225 riscv_vector::init_builtins ();
27d68a60 226
09cae750
PD
227 for (size_t i = 0; i < ARRAY_SIZE (riscv_builtins); i++)
228 {
229 const struct riscv_builtin_description *d = &riscv_builtins[i];
230 if (d->avail ())
231 {
232 tree type = riscv_build_function_type (d->prototype);
233 riscv_builtin_decls[i]
cbd50570
JZZ
234 = add_builtin_function (d->name, type,
235 (i << RISCV_BUILTIN_SHIFT)
236 + RISCV_BUILTIN_GENERAL,
237 BUILT_IN_MD, NULL, NULL);
09cae750
PD
238 riscv_builtin_decl_index[d->icode] = i;
239 }
240 }
241}
242
243/* Implement TARGET_BUILTIN_DECL. */
244
245tree
246riscv_builtin_decl (unsigned int code, bool initialize_p ATTRIBUTE_UNUSED)
247{
cbd50570
JZZ
248 unsigned int subcode = code >> RISCV_BUILTIN_SHIFT;
249 switch (code & RISCV_BUILTIN_CLASS)
250 {
251 case RISCV_BUILTIN_GENERAL:
252 if (subcode >= ARRAY_SIZE (riscv_builtins))
253 return error_mark_node;
254 return riscv_builtin_decls[subcode];
255
256 case RISCV_BUILTIN_VECTOR:
257 return riscv_vector::builtin_decl (subcode, initialize_p);
258 }
259 return error_mark_node;
09cae750
PD
260}
261
262/* Take argument ARGNO from EXP's argument list and convert it into
263 an expand operand. Store the operand in *OP. */
264
265static void
266riscv_prepare_builtin_arg (struct expand_operand *op, tree exp, unsigned argno)
267{
268 tree arg = CALL_EXPR_ARG (exp, argno);
269 create_input_operand (op, expand_normal (arg), TYPE_MODE (TREE_TYPE (arg)));
270}
271
272/* Expand instruction ICODE as part of a built-in function sequence.
273 Use the first NOPS elements of OPS as the instruction's operands.
274 HAS_TARGET_P is true if operand 0 is a target; it is false if the
275 instruction has no target.
276
277 Return the target rtx if HAS_TARGET_P, otherwise return const0_rtx. */
278
279static rtx
280riscv_expand_builtin_insn (enum insn_code icode, unsigned int n_ops,
281 struct expand_operand *ops, bool has_target_p)
282{
283 if (!maybe_expand_insn (icode, n_ops, ops))
284 {
285 error ("invalid argument to built-in function");
286 return has_target_p ? gen_reg_rtx (ops[0].mode) : const0_rtx;
287 }
288
289 return has_target_p ? ops[0].value : const0_rtx;
290}
291
292/* Expand a RISCV_BUILTIN_DIRECT or RISCV_BUILTIN_DIRECT_NO_TARGET function;
293 HAS_TARGET_P says which. EXP is the CALL_EXPR that calls the function
294 and ICODE is the code of the associated .md pattern. TARGET, if nonnull,
295 suggests a good place to put the result. */
296
297static rtx
298riscv_expand_builtin_direct (enum insn_code icode, rtx target, tree exp,
299 bool has_target_p)
300{
301 struct expand_operand ops[MAX_RECOG_OPERANDS];
302
303 /* Map any target to operand 0. */
304 int opno = 0;
305 if (has_target_p)
306 create_output_operand (&ops[opno++], target, TYPE_MODE (TREE_TYPE (exp)));
307
308 /* Map the arguments to the other operands. */
309 gcc_assert (opno + call_expr_nargs (exp)
310 == insn_data[icode].n_generator_args);
311 for (int argno = 0; argno < call_expr_nargs (exp); argno++)
312 riscv_prepare_builtin_arg (&ops[opno++], exp, argno);
313
314 return riscv_expand_builtin_insn (icode, opno, ops, has_target_p);
315}
316
317/* Implement TARGET_EXPAND_BUILTIN. */
318
319rtx
320riscv_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
321 machine_mode mode ATTRIBUTE_UNUSED,
322 int ignore ATTRIBUTE_UNUSED)
323{
324 tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
4d732405 325 unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl);
cbd50570
JZZ
326 unsigned int subcode = fcode >> RISCV_BUILTIN_SHIFT;
327 switch (fcode & RISCV_BUILTIN_CLASS)
09cae750 328 {
cbd50570
JZZ
329 case RISCV_BUILTIN_VECTOR:
330 return riscv_vector::expand_builtin (subcode, exp, target);
331 case RISCV_BUILTIN_GENERAL: {
332 const struct riscv_builtin_description *d = &riscv_builtins[subcode];
333
334 switch (d->builtin_type)
335 {
336 case RISCV_BUILTIN_DIRECT:
337 return riscv_expand_builtin_direct (d->icode, target, exp, true);
338
339 case RISCV_BUILTIN_DIRECT_NO_TARGET:
340 return riscv_expand_builtin_direct (d->icode, target, exp, false);
341 }
342 }
09cae750
PD
343 }
344
345 gcc_unreachable ();
346}
347
348/* Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV. */
349
350void
351riscv_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
352{
ac96e906 353 if (!(TARGET_HARD_FLOAT || TARGET_ZFINX))
09cae750
PD
354 return;
355
356 tree frflags = GET_BUILTIN_DECL (CODE_FOR_riscv_frflags);
357 tree fsflags = GET_BUILTIN_DECL (CODE_FOR_riscv_fsflags);
358 tree old_flags = create_tmp_var_raw (RISCV_ATYPE_USI);
359
b4ace720
JJ
360 *hold = build4 (TARGET_EXPR, RISCV_ATYPE_USI, old_flags,
361 build_call_expr (frflags, 0), NULL_TREE, NULL_TREE);
09cae750
PD
362 *clear = build_call_expr (fsflags, 1, old_flags);
363 *update = NULL_TREE;
364}