]>
Commit | Line | Data |
---|---|---|
09cae750 PD |
1 | ; Options for the RISC-V port of the compiler |
2 | ; | |
a5544970 | 3 | ; Copyright (C) 2011-2019 Free Software Foundation, Inc. |
09cae750 PD |
4 | ; |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
9 | ; Software Foundation; either version 3, or (at your option) any later | |
10 | ; version. | |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | ; License for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
18 | ; along with GCC; see the file COPYING3. If not see | |
19 | ; <http://www.gnu.org/licenses/>. | |
20 | ||
21 | HeaderInclude | |
22 | config/riscv/riscv-opts.h | |
23 | ||
24 | mbranch-cost= | |
25 | Target RejectNegative Joined UInteger Var(riscv_branch_cost) | |
26 | -mbranch-cost=N Set the cost of branches to roughly N instructions. | |
27 | ||
28 | mplt | |
29 | Target Report Var(TARGET_PLT) Init(1) | |
30 | When generating -fpic code, allow the use of PLTs. Ignored for fno-pic. | |
31 | ||
32 | mabi= | |
33 | Target Report RejectNegative Joined Enum(abi_type) Var(riscv_abi) Init(ABI_ILP32) | |
34 | Specify integer and floating-point calling convention. | |
35 | ||
0ce42fe1 AW |
36 | mpreferred-stack-boundary= |
37 | Target RejectNegative Joined UInteger Var(riscv_preferred_stack_boundary_arg) | |
38 | Attempt to keep stack aligned to this power of 2. | |
39 | ||
09cae750 PD |
40 | Enum |
41 | Name(abi_type) Type(enum riscv_abi_type) | |
42 | Supported ABIs (for use with the -mabi= option): | |
43 | ||
44 | EnumValue | |
45 | Enum(abi_type) String(ilp32) Value(ABI_ILP32) | |
46 | ||
09baee1a KC |
47 | EnumValue |
48 | Enum(abi_type) String(ilp32e) Value(ABI_ILP32E) | |
49 | ||
09cae750 PD |
50 | EnumValue |
51 | Enum(abi_type) String(ilp32f) Value(ABI_ILP32F) | |
52 | ||
53 | EnumValue | |
54 | Enum(abi_type) String(ilp32d) Value(ABI_ILP32D) | |
55 | ||
56 | EnumValue | |
57 | Enum(abi_type) String(lp64) Value(ABI_LP64) | |
58 | ||
59 | EnumValue | |
60 | Enum(abi_type) String(lp64f) Value(ABI_LP64F) | |
61 | ||
62 | EnumValue | |
63 | Enum(abi_type) String(lp64d) Value(ABI_LP64D) | |
64 | ||
65 | mfdiv | |
66 | Target Report Mask(FDIV) | |
67 | Use hardware floating-point divide and square root instructions. | |
68 | ||
69 | mdiv | |
70 | Target Report Mask(DIV) | |
71 | Use hardware instructions for integer division. | |
72 | ||
73 | march= | |
74 | Target Report RejectNegative Joined | |
75 | -march= Generate code for given RISC-V ISA (e.g. RV64IM). ISA strings must be | |
76 | lower-case. | |
77 | ||
78 | mtune= | |
79 | Target RejectNegative Joined Var(riscv_tune_string) | |
80 | -mtune=PROCESSOR Optimize the output for PROCESSOR. | |
81 | ||
82 | msmall-data-limit= | |
83 | Target Joined Separate UInteger Var(g_switch_value) Init(8) | |
84 | -msmall-data-limit=N Put global and static data smaller than <number> bytes into a special section (on some targets). | |
85 | ||
86 | msave-restore | |
87 | Target Report Mask(SAVE_RESTORE) | |
88 | Use smaller but slower prologue and epilogue code. | |
89 | ||
90 | mcmodel= | |
91 | Target Report RejectNegative Joined Enum(code_model) Var(riscv_cmodel) Init(TARGET_DEFAULT_CMODEL) | |
92 | Specify the code model. | |
93 | ||
82285692 AW |
94 | mstrict-align |
95 | Target Report Mask(STRICT_ALIGN) Save | |
96 | Do not generate unaligned memory accesses. | |
97 | ||
09cae750 PD |
98 | Enum |
99 | Name(code_model) Type(enum riscv_code_model) | |
100 | Known code models (for use with the -mcmodel= option): | |
101 | ||
102 | EnumValue | |
103 | Enum(code_model) String(medlow) Value(CM_MEDLOW) | |
104 | ||
105 | EnumValue | |
106 | Enum(code_model) String(medany) Value(CM_MEDANY) | |
107 | ||
108 | mexplicit-relocs | |
109 | Target Report Mask(EXPLICIT_RELOCS) | |
110 | Use %reloc() operators, rather than assembly macros, to load addresses. | |
111 | ||
a7af8489 PD |
112 | mrelax |
113 | Target Bool Var(riscv_mrelax) Init(1) | |
114 | Take advantage of linker relaxations to reduce the number of instructions | |
115 | required to materialize symbol addresses. | |
116 | ||
09cae750 PD |
117 | Mask(64BIT) |
118 | ||
119 | Mask(MUL) | |
120 | ||
121 | Mask(ATOMIC) | |
122 | ||
123 | Mask(HARD_FLOAT) | |
124 | ||
125 | Mask(DOUBLE_FLOAT) | |
126 | ||
127 | Mask(RVC) | |
09baee1a KC |
128 | |
129 | Mask(RVE) |