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b124ac04 | 1 | /* Definitions of target machine for GNU compiler, for ROMP chip. |
c5c76735 | 2 | Copyright (C) 1989, 91, 93, 95, 96, 98, 1999 Free Software Foundation, Inc. |
b124ac04 RK |
3 | Contributed by Richard Kenner (kenner@nyu.edu) |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
d2492158 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
b124ac04 RK |
21 | |
22 | ||
23 | /* Names to predefine in the preprocessor for this target machine. */ | |
24 | ||
65c42379 | 25 | #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem(unix) -Asystem(bsd) -Acpu(ibm032) -Amachine(ibm032)" |
b124ac04 RK |
26 | |
27 | /* Print subsidiary information on the compiler version in use. */ | |
28 | #define TARGET_VERSION ; | |
29 | ||
30 | /* Add -lfp_p when running with -p or -pg. */ | |
31 | #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" | |
32 | ||
33 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
34 | ||
35 | /* Flag to generate all multiplies as an in-line sequence of multiply-step | |
36 | insns instead of calling a library routine. */ | |
37 | #define TARGET_IN_LINE_MUL (target_flags & 1) | |
38 | ||
39 | /* Flag to generate padded floating-point data blocks. Otherwise, we generate | |
40 | them the minimum size. This trades off execution speed against size. */ | |
41 | #define TARGET_FULL_FP_BLOCKS (target_flags & 2) | |
42 | ||
43 | /* Flag to pass and return floating point values in floating point registers. | |
44 | Since this violates the linkage convention, we feel free to destroy fr2 | |
45 | and fr3 on function calls. | |
46 | fr1-fr3 are used to pass the arguments. */ | |
47 | #define TARGET_FP_REGS (target_flags & 4) | |
48 | ||
49 | /* Flag to return structures of more than one word in memory. This is for | |
50 | compatibility with the MetaWare HighC (hc) compiler. */ | |
51 | #define TARGET_HC_STRUCT_RETURN (target_flags & 010) | |
52 | ||
53 | extern int target_flags; | |
54 | ||
55 | /* Macro to define tables used to set the flags. | |
56 | This is a list in braces of pairs in braces, | |
57 | each pair being { "NAME", VALUE } | |
58 | where VALUE is the bits to set or minus the bits to clear. | |
59 | An empty string NAME is used to identify the default VALUE. */ | |
60 | ||
61 | #define TARGET_SWITCHES \ | |
62 | { {"in-line-mul", 1}, \ | |
63 | {"call-lib-mul", -1}, \ | |
64 | {"full-fp-blocks", 2}, \ | |
65 | {"minimum-fp-blocks", -2}, \ | |
66 | {"fp-arg-in-fpregs", 4}, \ | |
67 | {"fp-arg-in-gregs", -4}, \ | |
68 | {"hc-struct-return", 010}, \ | |
69 | {"nohc-struct-return", - 010}, \ | |
70 | { "", TARGET_DEFAULT}} | |
71 | ||
72 | #define TARGET_DEFAULT 3 | |
b124ac04 RK |
73 | \f |
74 | /* target machine storage layout */ | |
75 | ||
76 | /* Define this if most significant bit is lowest numbered | |
77 | in instructions that operate on numbered bit-fields. */ | |
78 | /* That is true on ROMP. */ | |
79 | #define BITS_BIG_ENDIAN 1 | |
80 | ||
81 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
82 | /* That is true on ROMP. */ | |
83 | #define BYTES_BIG_ENDIAN 1 | |
84 | ||
85 | /* Define this if most significant word of a multiword number is lowest | |
86 | numbered. | |
87 | ||
88 | For ROMP we can decide arbitrarily since there are no machine instructions | |
89 | for them. Might as well be consistent with bits and bytes. */ | |
90 | #define WORDS_BIG_ENDIAN 1 | |
91 | ||
b4ac57ab | 92 | /* number of bits in an addressable storage unit */ |
b124ac04 RK |
93 | #define BITS_PER_UNIT 8 |
94 | ||
95 | /* Width in bits of a "word", which is the contents of a machine register. | |
96 | Note that this is not necessarily the width of data type `int'; | |
97 | if using 16-bit ints on a 68000, this would still be 32. | |
98 | But on a machine with 16-bit registers, this would be 16. */ | |
99 | #define BITS_PER_WORD 32 | |
100 | ||
101 | /* Width of a word, in units (bytes). */ | |
102 | #define UNITS_PER_WORD 4 | |
103 | ||
104 | /* Width in bits of a pointer. | |
105 | See also the macro `Pmode' defined below. */ | |
106 | #define POINTER_SIZE 32 | |
107 | ||
108 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
109 | #define PARM_BOUNDARY 32 | |
110 | ||
111 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
112 | #define STACK_BOUNDARY 32 | |
113 | ||
114 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
115 | #define FUNCTION_BOUNDARY 16 | |
116 | ||
117 | /* No data type wants to be aligned rounder than this. */ | |
118 | #define BIGGEST_ALIGNMENT 32 | |
119 | ||
120 | /* Alignment of field after `int : 0' in a structure. */ | |
121 | #define EMPTY_FIELD_BOUNDARY 32 | |
122 | ||
123 | /* Every structure's size must be a multiple of this. */ | |
124 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
125 | ||
126 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
127 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
128 | ||
129 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
130 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
131 | (TREE_CODE (EXP) == STRING_CST \ | |
132 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
133 | ||
134 | /* Make arrays of chars word-aligned for the same reasons. */ | |
135 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
136 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
137 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
138 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
139 | ||
b4ac57ab | 140 | /* Set this nonzero if move instructions will actually fail to work |
b124ac04 | 141 | when given unaligned data. */ |
b4ac57ab | 142 | #define STRICT_ALIGNMENT 1 |
b124ac04 RK |
143 | \f |
144 | /* Standard register usage. */ | |
145 | ||
146 | /* Number of actual hardware registers. | |
147 | The hardware registers are assigned numbers for the compiler | |
148 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
149 | All registers that the compiler knows about must be given numbers, | |
150 | even those that are not normally considered general registers. | |
151 | ||
152 | ROMP has 16 fullword registers and 8 floating point registers. | |
153 | ||
154 | In addition, the difference between the frame and argument pointers is | |
155 | a function of the number of registers saved, so we need to have a register | |
156 | to use for AP that will later be eliminated in favor of sp or fp. This is | |
157 | a normal register, but it is fixed. */ | |
158 | ||
159 | #define FIRST_PSEUDO_REGISTER 25 | |
160 | ||
161 | /* 1 for registers that have pervasive standard uses | |
162 | and are not available for the register allocator. | |
163 | ||
164 | On ROMP, r1 is used for the stack and r14 is used for a | |
165 | data area pointer. | |
166 | ||
167 | HACK WARNING: On the RT, there is a bug in code generation for | |
168 | the MC68881 when the first and third operands are the same floating-point | |
169 | register. See the definition of the FINAL_PRESCAN_INSN macro for details. | |
170 | Here we need to reserve fr0 for this purpose. */ | |
171 | #define FIXED_REGISTERS \ | |
172 | {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
173 | 1, \ | |
174 | 1, 0, 0, 0, 0, 0, 0, 0} | |
175 | ||
176 | /* 1 for registers not available across function calls. | |
177 | These must include the FIXED_REGISTERS and also any | |
178 | registers that can be used without being saved. | |
179 | The latter must include the registers where values are returned | |
180 | and the register where structure-value addresses are passed. | |
181 | Aside from that, you can include as many other registers as you like. */ | |
182 | #define CALL_USED_REGISTERS \ | |
183 | {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
184 | 1, \ | |
185 | 1, 1, 0, 0, 0, 0, 0, 0} | |
186 | ||
187 | /* List the order in which to allocate registers. Each register must be | |
188 | listed once, even those in FIXED_REGISTERS. | |
189 | ||
190 | We allocate in the following order: | |
191 | fr0, fr1 (not saved) | |
192 | fr2 ... fr6 | |
193 | fr7 (more expensive for some FPA's) | |
194 | r0 (not saved and won't conflict with parameter register) | |
195 | r4, r3, r2 (not saved, highest used first to make less conflict) | |
196 | r5 (not saved, but forces r6 to be saved if DI/DFmode) | |
197 | r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save) | |
198 | r1, ap */ | |
199 | ||
200 | #define REG_ALLOC_ORDER \ | |
201 | {17, 18, \ | |
202 | 19, 20, 21, 22, 23, \ | |
203 | 24, \ | |
204 | 0, \ | |
205 | 4, 3, 2, \ | |
206 | 5, \ | |
207 | 15, 14, 13, 12, 11, 10, \ | |
208 | 9, 8, 7, 6, \ | |
209 | 1, 16} | |
210 | ||
211 | /* True if register is floating-point. */ | |
212 | #define FP_REGNO_P(N) ((N) >= 17) | |
213 | ||
214 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
215 | to hold something of mode MODE. | |
216 | This is ordinarily the length in words of a value of mode MODE | |
217 | but can be less for certain modes in special long registers. | |
218 | ||
219 | On ROMP, ordinary registers hold 32 bits worth; | |
220 | a single floating point register is always enough for | |
221 | anything that can be stored in them at all. */ | |
222 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
223 | (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \ | |
224 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
225 | ||
226 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
227 | On ROMP, the cpu registers can hold any mode but the float registers | |
228 | can hold only floating point. */ | |
229 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
230 | (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
231 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) | |
232 | ||
233 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
234 | when one has mode MODE1 and one has mode MODE2. | |
235 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
236 | for any hard reg, then this must be 0 for correct output. */ | |
237 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
238 | ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
239 | || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
240 | == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
241 | || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) | |
242 | ||
243 | /* A C expression returning the cost of moving data from a register of class | |
244 | CLASS1 to one of CLASS2. | |
245 | ||
246 | On the ROMP, access to floating-point registers is expensive (even between | |
247 | two FP regs.) */ | |
248 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
249 | (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS)) | |
250 | ||
251 | /* Specify the registers used for certain standard purposes. | |
252 | The values of these macros are register numbers. */ | |
253 | ||
254 | /* ROMP pc isn't overloaded on a register that the compiler knows about. */ | |
255 | /* #define PC_REGNUM */ | |
256 | ||
257 | /* Register to use for pushing function arguments. */ | |
258 | #define STACK_POINTER_REGNUM 1 | |
259 | ||
260 | /* Base register for access to local variables of the function. */ | |
261 | #define FRAME_POINTER_REGNUM 13 | |
262 | ||
263 | /* Value should be nonzero if functions must have frame pointers. | |
264 | Zero means the frame pointer need not be set up (and parms | |
265 | may be accessed via the stack pointer) in functions that seem suitable. | |
266 | This is computed in `reload', in reload1.c. */ | |
267 | #define FRAME_POINTER_REQUIRED 0 | |
268 | ||
269 | /* Base register for access to arguments of the function. */ | |
270 | #define ARG_POINTER_REGNUM 16 | |
271 | ||
272 | /* Place to put static chain when calling a function that requires it. */ | |
273 | #define STATIC_CHAIN \ | |
c5c76735 | 274 | gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -36)) |
b124ac04 RK |
275 | |
276 | /* Place where static chain is found upon entry to routine. */ | |
277 | #define STATIC_CHAIN_INCOMING \ | |
c5c76735 | 278 | gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -20)) |
b124ac04 RK |
279 | |
280 | /* Place that structure value return address is placed. | |
281 | ||
282 | On the ROMP, it is passed as an extra parameter. */ | |
283 | #define STRUCT_VALUE 0 | |
284 | \f | |
285 | /* Define the classes of registers for register constraints in the | |
286 | machine description. Also define ranges of constants. | |
287 | ||
288 | One of the classes must always be named ALL_REGS and include all hard regs. | |
289 | If there is more than one class, another class must be named NO_REGS | |
290 | and contain no registers. | |
291 | ||
292 | The name GENERAL_REGS must be the name of a class (or an alias for | |
293 | another name such as ALL_REGS). This is the class of registers | |
294 | that is allowed by "g" or "r" in a register constraint. | |
295 | Also, registers outside this class are allocated only when | |
296 | instructions express preferences for them. | |
297 | ||
298 | The classes must be numbered in nondecreasing order; that is, | |
299 | a larger-numbered class must never be contained completely | |
300 | in a smaller-numbered class. | |
301 | ||
302 | For any two classes, it is very desirable that there be another | |
303 | class that represents their union. */ | |
304 | ||
305 | /* The ROMP has two types of registers, general and floating-point. | |
306 | ||
307 | However, r0 is special in that it cannot be used as a base register. | |
308 | So make a class for registers valid as base registers. | |
309 | ||
310 | For floating-point support, add classes that just consist of r0 and | |
311 | r15, respectively. */ | |
312 | ||
313 | enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS, | |
314 | FP_REGS, ALL_REGS, LIM_REG_CLASSES }; | |
315 | ||
316 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
317 | ||
318 | /* Give names of register classes as strings for dump file. */ | |
319 | ||
320 | #define REG_CLASS_NAMES \ | |
321 | {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \ | |
322 | "FP_REGS", "ALL_REGS" } | |
323 | ||
324 | /* Define which registers fit in which classes. | |
325 | This is an initializer for a vector of HARD_REG_SET | |
326 | of length N_REG_CLASSES. */ | |
327 | ||
328 | #define REG_CLASS_CONTENTS {0, 0x00001, 0x08000, 0x1fffe, 0x1ffff, \ | |
329 | 0x1fe0000, 0x1ffffff } | |
330 | ||
331 | /* The same information, inverted: | |
332 | Return the class number of the smallest class containing | |
333 | reg number REGNO. This could be a conditional expression | |
334 | or could index an array. */ | |
335 | ||
336 | #define REGNO_REG_CLASS(REGNO) \ | |
337 | ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS) | |
338 | ||
339 | /* The class value for index registers, and the one for base regs. */ | |
340 | #define INDEX_REG_CLASS BASE_REGS | |
341 | #define BASE_REG_CLASS BASE_REGS | |
342 | ||
343 | /* Get reg_class from a letter such as appears in the machine description. */ | |
344 | ||
345 | #define REG_CLASS_FROM_LETTER(C) \ | |
346 | ((C) == 'f' ? FP_REGS \ | |
347 | : (C) == 'b' ? BASE_REGS \ | |
348 | : (C) == 'z' ? R0_REGS \ | |
349 | : (C) == 't' ? R15_REGS \ | |
350 | : NO_REGS) | |
351 | ||
352 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
353 | can be used to stand for particular ranges of immediate operands. | |
354 | This macro defines what the ranges are. | |
355 | C is the letter, and VALUE is a constant value. | |
356 | Return 1 if VALUE is in the range specified by C. | |
357 | ||
358 | `I' is constants less than 16 | |
359 | `J' is negative constants greater than -16 | |
360 | `K' is the range for a normal D insn. | |
361 | `L' is a constant with only the low-order 16 bits set | |
362 | `M' is a constant with only the high-order 16 bits set | |
363 | `N' is a single-bit constant | |
364 | `O' is a constant with either the high-order or low-order 16 bits all ones | |
365 | `P' is the complement of a single-bit constant | |
366 | */ | |
367 | ||
368 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
369 | ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \ | |
370 | : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \ | |
371 | : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \ | |
372 | : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \ | |
373 | : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \ | |
374 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
375 | : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \ | |
376 | || ((VALUE) & 0xffff0000) == 0xffff0000 \ | |
377 | : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \ | |
378 | : 0) | |
379 | ||
380 | /* Similar, but for floating constants, and defining letters G and H. | |
381 | Here VALUE is the CONST_DOUBLE rtx itself. | |
382 | No floating-point constants on ROMP. */ | |
383 | ||
384 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 | |
385 | ||
386 | /* Optional extra constraints for this machine. | |
387 | ||
388 | For the ROMP, `Q' means that this is a memory operand but not a symbolic | |
389 | memory operand. Note that an unassigned pseudo register is such a | |
390 | memory operand. If register allocation has not been done, we reject | |
391 | pseudos, since we assume (hope) that they will get hard registers. | |
392 | ||
393 | `R' means that this is a constant pool reference to the current function. | |
394 | This is just r14 and so can be treated as a register. We bother with this | |
395 | just in move insns as that is the only place it is likely to occur. | |
396 | ||
397 | `S' means that this is the address of a constant pool location. This is | |
398 | equal to r14 plus a constant. We also only check for this in move insns. */ | |
399 | ||
400 | #define EXTRA_CONSTRAINT(OP, C) \ | |
401 | ((C) == 'Q' ? \ | |
402 | ((GET_CODE (OP) == REG \ | |
403 | && REGNO (OP) >= FIRST_PSEUDO_REGISTER \ | |
404 | && reg_renumber != 0 \ | |
405 | && reg_renumber[REGNO (OP)] < 0) \ | |
36d51583 | 406 | || (GET_CODE (OP) == MEM \ |
b124ac04 RK |
407 | && ! symbolic_memory_operand (OP, VOIDmode))) \ |
408 | : (C) == 'R' ? current_function_operand (OP, VOIDmode) \ | |
409 | : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \ | |
410 | : 0) | |
411 | ||
412 | /* Given an rtx X being reloaded into a reg required to be | |
413 | in class CLASS, return the class of reg to actually use. | |
414 | In general this is just CLASS; but on some machines | |
415 | in some cases it is preferable to use a more restrictive class. | |
416 | ||
417 | For the ROMP, if X is a memory reference that involves a symbol, | |
418 | we must use a BASE_REGS register instead of GENERAL_REGS | |
419 | to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF | |
420 | to be valid, so we assume that this is the case. | |
421 | ||
422 | Also, if X is an integer class, ensure that floating-point registers | |
423 | aren't used. */ | |
424 | ||
425 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ | |
426 | ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ | |
427 | ? GENERAL_REGS : \ | |
428 | (CLASS) != GENERAL_REGS ? (CLASS) : \ | |
429 | GET_CODE (X) != MEM ? GENERAL_REGS : \ | |
430 | GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \ | |
431 | GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \ | |
432 | GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \ | |
433 | GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \ | |
434 | GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \ | |
435 | GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \ | |
436 | GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \ | |
437 | GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS) | |
438 | ||
439 | /* Return the register class of a scratch register needed to store into | |
440 | OUT from a register of class CLASS in MODE. | |
441 | ||
442 | On the ROMP, we cannot store into a symbolic memory address from an | |
443 | integer register; we need a BASE_REGS register as a scratch to do it. */ | |
444 | ||
445 | #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ | |
446 | (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \ | |
447 | ? BASE_REGS : NO_REGS) | |
448 | ||
449 | /* Return the maximum number of consecutive registers | |
450 | needed to represent mode MODE in a register of class CLASS. | |
451 | ||
452 | On ROMP, this is the size of MODE in words, | |
453 | except in the FP regs, where a single reg is always enough. */ | |
454 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
455 | ((CLASS) == FP_REGS ? 1 \ | |
456 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) | |
457 | \f | |
458 | /* Stack layout; function entry, exit and calling. */ | |
459 | ||
460 | /* Define this if pushing a word on the stack | |
461 | makes the stack pointer a smaller address. */ | |
462 | #define STACK_GROWS_DOWNWARD | |
463 | ||
464 | /* Define this if the nominal address of the stack frame | |
465 | is at the high-address end of the local variables; | |
466 | that is, each additional local variable allocated | |
467 | goes at a more negative offset in the frame. */ | |
468 | #define FRAME_GROWS_DOWNWARD | |
469 | ||
470 | /* Offset within stack frame to start allocating local variables at. | |
471 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
472 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
473 | of the first local allocated. | |
474 | On the ROMP, if we set the frame pointer to 15 words below the highest | |
475 | address of the highest local variable, the first 16 words will be | |
476 | addressable via D-short insns. */ | |
477 | #define STARTING_FRAME_OFFSET 64 | |
478 | ||
479 | /* If we generate an insn to push BYTES bytes, | |
480 | this says how many the stack pointer really advances by. | |
481 | On ROMP, don't define this because there are no push insns. */ | |
482 | /* #define PUSH_ROUNDING(BYTES) */ | |
483 | ||
484 | /* Offset of first parameter from the argument pointer register value. | |
485 | On the ROMP, we define the argument pointer to the start of the argument | |
486 | area. */ | |
487 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
488 | ||
489 | /* Define this if stack space is still allocated for a parameter passed | |
490 | in a register. The value is the number of bytes. */ | |
491 | #define REG_PARM_STACK_SPACE(FNDECL) 16 | |
492 | ||
493 | /* This is the difference between the logical top of stack and the actual sp. | |
494 | ||
495 | For the ROMP, sp points past the words allocated for the first four outgoing | |
496 | arguments (they are part of the callee's frame). */ | |
497 | #define STACK_POINTER_OFFSET -16 | |
498 | ||
499 | /* Define this if the maximum size of all the outgoing args is to be | |
500 | accumulated and pushed during the prologue. The amount can be | |
501 | found in the variable current_function_outgoing_args_size. */ | |
502 | #define ACCUMULATE_OUTGOING_ARGS | |
503 | ||
504 | /* Value is the number of bytes of arguments automatically | |
505 | popped when returning from a subroutine call. | |
8b109b37 | 506 | FUNDECL is the declaration node of the function (as a tree), |
b124ac04 RK |
507 | FUNTYPE is the data type of the function (as a tree), |
508 | or for a library call it is an identifier node for the subroutine name. | |
509 | SIZE is the number of bytes of arguments passed on the stack. */ | |
510 | ||
8b109b37 | 511 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
b124ac04 RK |
512 | |
513 | /* Define how to find the value returned by a function. | |
514 | VALTYPE is the data type of the value (as a tree). | |
515 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
516 | otherwise, FUNC is 0. | |
517 | ||
518 | On ROMP the value is found in r2, unless the machine specific option | |
519 | fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */ | |
520 | ||
c5c76735 JL |
521 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
522 | gen_rtx_REG (TYPE_MODE (VALTYPE), \ | |
523 | (TARGET_FP_REG \ | |
524 | && GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) \ | |
525 | ? 18 : 2) | |
b124ac04 RK |
526 | |
527 | /* Define how to find the value returned by a library function | |
528 | assuming the value has mode MODE. */ | |
529 | ||
c5c76735 | 530 | #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2) |
b124ac04 RK |
531 | |
532 | /* The definition of this macro implies that there are cases where | |
533 | a scalar value cannot be returned in registers. | |
534 | ||
535 | For the ROMP, if compatibility with HC is required, anything of | |
536 | type DImode is returned in memory. */ | |
537 | ||
538 | #define RETURN_IN_MEMORY(type) \ | |
e14fa9c4 DE |
539 | (TYPE_MODE (type) == BLKmode \ |
540 | || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode)) | |
b124ac04 RK |
541 | |
542 | /* 1 if N is a possible register number for a function value | |
543 | as seen by the caller. | |
544 | ||
545 | On ROMP, r2 is the only register thus used unless fp values are to be | |
546 | returned in fp regs, in which case fr1 is also used. */ | |
547 | ||
548 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS)) | |
549 | ||
550 | /* 1 if N is a possible register number for function argument passing. | |
551 | On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */ | |
552 | ||
553 | #define FUNCTION_ARG_REGNO_P(N) \ | |
554 | (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21)) | |
555 | \f | |
556 | /* Define a data type for recording info about an argument list | |
557 | during the scan of that argument list. This data type should | |
558 | hold all necessary information about the function itself | |
559 | and about the args processed so far, enough to enable macros | |
560 | such as FUNCTION_ARG to determine where the next arg should go. | |
561 | ||
562 | On the ROMP, this is a structure. The first word is the number of | |
563 | words of (integer only if -mfp-arg-in-fpregs is specified) arguments | |
564 | scanned so far (including the invisible argument, if any, which holds | |
565 | the structure-value-address). The second word hold the corresponding | |
566 | value for floating-point arguments, except that both single and double | |
567 | count as one register. */ | |
568 | ||
569 | struct rt_cargs {int gregs, fregs; }; | |
570 | #define CUMULATIVE_ARGS struct rt_cargs | |
571 | ||
572 | #define USE_FP_REG(MODE,CUM) \ | |
573 | (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
574 | && (CUM).fregs < 3) | |
575 | ||
576 | /* Define intermediate macro to compute the size (in registers) of an argument | |
577 | for the ROMP. */ | |
578 | ||
579 | #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \ | |
580 | (! (NAMED) ? 0 \ | |
581 | : (MODE) != BLKmode \ | |
582 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
583 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
584 | ||
585 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
586 | for a call to a function whose data type is FNTYPE. | |
587 | For a library call, FNTYPE is 0. | |
588 | ||
589 | On ROMP, the offset normally starts at 0, but starts at 4 bytes | |
590 | when the function gets a structure-value-address as an | |
591 | invisible first argument. */ | |
592 | ||
2c7ee1a6 | 593 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
b124ac04 RK |
594 | (CUM).gregs = 0, \ |
595 | (CUM).fregs = 0 | |
596 | ||
597 | /* Update the data in CUM to advance over an argument | |
598 | of mode MODE and data type TYPE. | |
599 | (TYPE is null for libcalls where that information may not be available.) */ | |
600 | ||
601 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
602 | { if (NAMED) \ | |
603 | { \ | |
604 | if (USE_FP_REG(MODE, CUM)) \ | |
605 | (CUM).fregs++; \ | |
606 | else \ | |
607 | (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \ | |
608 | } \ | |
609 | } | |
610 | ||
611 | /* Determine where to put an argument to a function. | |
612 | Value is zero to push the argument on the stack, | |
613 | or a hard register in which to store the argument. | |
614 | ||
615 | MODE is the argument's machine mode. | |
616 | TYPE is the data type of the argument (as a tree). | |
617 | This is null for libcalls where that information may | |
618 | not be available. | |
619 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
620 | the preceding args and about the function being called. | |
621 | NAMED is nonzero if this argument is a named parameter | |
622 | (otherwise it is an extra parameter matching an ellipsis). | |
623 | ||
624 | On ROMP the first four words of args are normally in registers | |
625 | and the rest are pushed. */ | |
626 | ||
627 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
628 | (! (NAMED) ? 0 \ | |
38bd31fc | 629 | : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ |
c5c76735 JL |
630 | : USE_FP_REG(MODE,CUM) ? gen_rtx_REG ((MODE), (CUM.fregs) + 17) \ |
631 | : (CUM).gregs < 4 ? gen_rtx_REG ((MODE), 2 + (CUM).gregs) : 0) | |
b124ac04 RK |
632 | |
633 | /* For an arg passed partly in registers and partly in memory, | |
634 | this is the number of registers used. | |
635 | For args passed entirely in registers or entirely in memory, zero. */ | |
636 | ||
637 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
638 | (! (NAMED) ? 0 \ | |
639 | : USE_FP_REG(MODE,CUM) ? 0 \ | |
640 | : (((CUM).gregs < 4 \ | |
641 | && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \ | |
642 | ? 4 - (CUM).gregs : 0)) | |
643 | ||
644 | /* Perform any needed actions needed for a function that is receiving a | |
645 | variable number of arguments. | |
646 | ||
647 | CUM is as above. | |
648 | ||
649 | MODE and TYPE are the mode and type of the current parameter. | |
650 | ||
651 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
652 | that must be pushed by the prolog to pretend that our caller pushed | |
653 | it. | |
654 | ||
655 | Normally, this macro will push all remaining incoming registers on the | |
656 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
657 | ||
658 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ | |
659 | { if (TARGET_FP_REGS) \ | |
660 | error ("can't have varargs with -mfp-arg-in-fp-regs"); \ | |
661 | else if ((CUM).gregs < 4) \ | |
662 | { \ | |
663 | int first_reg_offset = (CUM).gregs; \ | |
664 | \ | |
665 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
666 | first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \ | |
667 | \ | |
668 | if (first_reg_offset > 4) \ | |
669 | first_reg_offset = 4; \ | |
670 | \ | |
671 | if (! NO_RTL && first_reg_offset != 4) \ | |
672 | move_block_from_reg \ | |
673 | (2 + first_reg_offset, \ | |
c5c76735 JL |
674 | gen_rtx_MEM (BLKmode, \ |
675 | plus_constant (virtual_incoming_args_rtx, \ | |
676 | first_reg_offset * 4)), \ | |
02892e06 | 677 | 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \ |
b124ac04 RK |
678 | PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \ |
679 | } \ | |
680 | } | |
681 | ||
682 | /* This macro produces the initial definition of a function name. | |
683 | On the ROMP, we need to place an extra '.' in the function name. */ | |
684 | ||
685 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ | |
686 | { if (TREE_PUBLIC(DECL)) \ | |
687 | fprintf (FILE, "\t.globl _.%s\n", NAME); \ | |
688 | fprintf (FILE, "_.%s:\n", NAME); \ | |
689 | } | |
690 | ||
691 | /* This macro is used to output the start of the data area. | |
692 | ||
693 | On the ROMP, the _name is a pointer to the data area. At that | |
694 | location is the address of _.name, which is really the name of | |
695 | the function. We need to set all this up here. | |
696 | ||
697 | The global declaration of the data area, if needed, is done in | |
698 | `assemble_function', where it thinks it is globalizing the function | |
699 | itself. */ | |
700 | ||
701 | #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \ | |
702 | { extern int data_offset; \ | |
703 | data_section (); \ | |
704 | fprintf (FILE, "\t.align 2\n"); \ | |
705 | ASM_OUTPUT_LABEL (FILE, NAME); \ | |
706 | fprintf (FILE, "\t.long _.%s, 0, ", NAME); \ | |
707 | if (current_function_calls_alloca) \ | |
708 | fprintf (FILE, "0x%x\n", \ | |
709 | 0xf6900000 + current_function_outgoing_args_size); \ | |
710 | else \ | |
711 | fprintf (FILE, "0\n"); \ | |
712 | data_offset = ((SIZE) + 12 + 3) / 4; \ | |
713 | } | |
714 | ||
715 | /* Select section for constant in constant pool. | |
716 | ||
717 | On ROMP, all constants are in the data area. */ | |
718 | ||
719 | #define SELECT_RTX_SECTION(MODE, X) data_section () | |
720 | ||
721 | /* This macro generates the assembly code for function entry. | |
722 | FILE is a stdio stream to output the code to. | |
723 | SIZE is an int: how many units of temporary storage to allocate. | |
724 | Refer to the array `regs_ever_live' to determine which registers | |
725 | to save; `regs_ever_live[I]' is nonzero if register number I | |
726 | is ever used in the function. This macro is responsible for | |
727 | knowing which registers should not be saved even if used. */ | |
728 | ||
729 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
730 | ||
731 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
732 | for profiling a function entry. */ | |
733 | ||
734 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
735 | fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n"); | |
736 | ||
737 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
738 | the stack pointer does not matter. The value is tested only in | |
739 | functions that have frame pointers. | |
740 | No definition is equivalent to always zero. */ | |
741 | /* #define EXIT_IGNORE_STACK 1 */ | |
742 | ||
743 | /* This macro generates the assembly code for function exit, | |
744 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
745 | then individual return instructions are generated for each | |
746 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
747 | ||
748 | The function epilogue should not depend on the current stack pointer! | |
749 | It should use the frame pointer only. This is mandatory because | |
750 | of alloca; we also take advantage of it to omit stack adjustments | |
751 | before returning. */ | |
752 | ||
753 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
754 | \f | |
755 | /* Output assembler code for a block containing the constant parts | |
756 | of a trampoline, leaving space for the variable parts. | |
757 | ||
758 | The trampoline should set the static chain pointer to value placed | |
759 | into the trampoline and should branch to the specified routine. | |
760 | ||
761 | On the ROMP, we have a problem. There are no free registers to use | |
762 | to construct the static chain and function addresses. Hence we use | |
763 | the following kludge: r15 (the return address) is first saved in mq. | |
764 | Then we use r15 to form the function address. We then branch to the | |
765 | function and restore r15 in the delay slot. This makes it appear that | |
766 | the function was called directly from the caller. | |
767 | ||
768 | (Note that the function address built is actually that of the data block. | |
769 | This is passed in r0 and the actual routine address is loaded into r15.) | |
770 | ||
771 | In addition, note that the address of the "called function", in this case | |
772 | the trampoline, is actually the address of the data area. So we need to | |
773 | make a fake data area that will contain the address of the trampoline. | |
774 | Note that this must be defined as two half-words, since the trampoline | |
775 | template (as opposed to the trampoline on the stack) is only half-word | |
776 | aligned. */ | |
777 | ||
778 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
779 | { \ | |
780 | fprintf (FILE, "\t.short 0,0\n"); \ | |
781 | fprintf (FILE, "\tcau r0,0(r0)\n"); \ | |
782 | fprintf (FILE, "\toil r0,r0,0\n"); \ | |
783 | fprintf (FILE, "\tmts r10,r15\n"); \ | |
784 | fprintf (FILE, "\tst r0,-36(r1)\n"); \ | |
785 | fprintf (FILE, "\tcau r15,0(r0)\n"); \ | |
786 | fprintf (FILE, "\toil r15,r15,0\n"); \ | |
787 | fprintf (FILE, "\tcas r0,r15,r0\n"); \ | |
788 | fprintf (FILE, "\tls r15,0(r15)\n"); \ | |
789 | fprintf (FILE, "\tbrx r15\n"); \ | |
790 | fprintf (FILE, "\tmfs r10,r15\n"); \ | |
791 | } | |
792 | ||
793 | /* Length in units of the trampoline for entering a nested function. */ | |
794 | ||
795 | #define TRAMPOLINE_SIZE 36 | |
796 | ||
797 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
798 | FNADDR is an RTX for the address of the function's pure code. | |
799 | CXT is an RTX for the static chain value for the function. | |
800 | ||
801 | On the RT, the static chain and function addresses are written in | |
802 | two 16-bit sections. | |
803 | ||
804 | We also need to write the address of the first instruction in | |
805 | the trampoline into the first word of the trampoline to simulate a | |
806 | data area. */ | |
807 | ||
808 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
809 | { \ | |
810 | rtx _addr, _temp; \ | |
811 | rtx _val; \ | |
812 | \ | |
813 | _temp = expand_binop (SImode, add_optab, ADDR, \ | |
3a598fbe | 814 | GEN_INT (4), \ |
b124ac04 | 815 | 0, 1, OPTAB_LIB_WIDEN); \ |
c5c76735 JL |
816 | emit_move_insn (gen_rtx_MEM (SImode, \ |
817 | memory_address (SImode, ADDR)), _temp); \ | |
b124ac04 RK |
818 | \ |
819 | _val = force_reg (SImode, CXT); \ | |
820 | _addr = memory_address (HImode, plus_constant (ADDR, 10)); \ | |
c5c76735 | 821 | emit_move_insn (gen_rtx_MEM (HImode, _addr), \ |
b124ac04 RK |
822 | gen_lowpart (HImode, _val)); \ |
823 | _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ | |
824 | build_int_2 (16, 0), 0, 1); \ | |
825 | _addr = memory_address (HImode, plus_constant (ADDR, 6)); \ | |
c5c76735 | 826 | emit_move_insn (gen_rtx_MEM (HImode, _addr), \ |
b124ac04 RK |
827 | gen_lowpart (HImode, _temp)); \ |
828 | \ | |
829 | _val = force_reg (SImode, FNADDR); \ | |
830 | _addr = memory_address (HImode, plus_constant (ADDR, 24)); \ | |
c5c76735 | 831 | emit_move_insn (gen_rtx_MEM (HImode, _addr), \ |
b124ac04 RK |
832 | gen_lowpart (HImode, _val)); \ |
833 | _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ | |
834 | build_int_2 (16, 0), 0, 1); \ | |
835 | _addr = memory_address (HImode, plus_constant (ADDR, 20)); \ | |
c5c76735 | 836 | emit_move_insn (gen_rtx_MEM (HImode, _addr), \ |
b124ac04 RK |
837 | gen_lowpart (HImode, _temp)); \ |
838 | \ | |
839 | } | |
840 | \f | |
841 | /* Definitions for register eliminations. | |
842 | ||
843 | We have two registers that can be eliminated on the ROMP. First, the | |
844 | frame pointer register can often be eliminated in favor of the stack | |
845 | pointer register. Secondly, the argument pointer register can always be | |
846 | eliminated; it is replaced with either the stack or frame pointer. | |
847 | ||
848 | In addition, we use the elimination mechanism to see if r14 is needed. | |
849 | Initially we assume that it isn't. If it is, we spill it. This is done | |
850 | by making it an eliminable register. It doesn't matter what we replace | |
851 | it with, since it will never occur in the rtl at this point. */ | |
852 | ||
853 | /* This is an array of structures. Each structure initializes one pair | |
854 | of eliminable registers. The "from" register number is given first, | |
855 | followed by "to". Eliminations of the same "from" register are listed | |
856 | in order of preference. */ | |
857 | #define ELIMINABLE_REGS \ | |
858 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
859 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
860 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ | |
861 | { 14, 0}} | |
862 | ||
863 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
864 | Frame pointer elimination is automatically handled. | |
865 | ||
866 | For the ROMP, if frame pointer elimination is being done, we would like to | |
867 | convert ap into fp, not sp. | |
868 | ||
869 | We need r14 if various conditions (tested in romp_using_r14) are true. | |
870 | ||
871 | All other eliminations are valid. */ | |
872 | #define CAN_ELIMINATE(FROM, TO) \ | |
873 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
874 | ? ! frame_pointer_needed \ | |
875 | : (FROM) == 14 ? ! romp_using_r14 () \ | |
876 | : 1) | |
877 | ||
878 | /* Define the offset between two registers, one to be eliminated, and the other | |
879 | its replacement, at the start of a routine. */ | |
880 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
881 | { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
882 | { \ | |
883 | if (romp_pushes_stack ()) \ | |
884 | (OFFSET) = ((get_frame_size () - 64) \ | |
885 | + current_function_outgoing_args_size); \ | |
886 | else \ | |
887 | (OFFSET) = - (romp_sa_size () + 64); \ | |
888 | } \ | |
889 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
890 | (OFFSET) = romp_sa_size () - 16 + 64; \ | |
891 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
892 | { \ | |
893 | if (romp_pushes_stack ()) \ | |
894 | (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \ | |
895 | + current_function_outgoing_args_size); \ | |
896 | else \ | |
897 | (OFFSET) = -16; \ | |
898 | } \ | |
899 | else if ((FROM) == 14) \ | |
900 | (OFFSET) = 0; \ | |
901 | else \ | |
902 | abort (); \ | |
903 | } | |
904 | \f | |
905 | /* Addressing modes, and classification of registers for them. */ | |
906 | ||
940da324 JL |
907 | /* #define HAVE_POST_INCREMENT 0 */ |
908 | /* #define HAVE_POST_DECREMENT 0 */ | |
b124ac04 | 909 | |
940da324 JL |
910 | /* #define HAVE_PRE_DECREMENT 0 */ |
911 | /* #define HAVE_PRE_INCREMENT 0 */ | |
b124ac04 RK |
912 | |
913 | /* Macros to check register numbers against specific register classes. */ | |
914 | ||
915 | /* These assume that REGNO is a hard or pseudo reg number. | |
916 | They give nonzero only if REGNO is a hard reg of the suitable class | |
917 | or a pseudo reg currently allocated to a suitable hard reg. | |
918 | Since they use reg_renumber, they are safe only once reg_renumber | |
919 | has been allocated, which happens in local-alloc.c. */ | |
920 | ||
921 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
922 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
923 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
924 | ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \ | |
925 | : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \ | |
926 | && reg_renumber[REGNO] != 16)) | |
927 | \f | |
928 | /* Maximum number of registers that can appear in a valid memory address. */ | |
929 | ||
930 | #define MAX_REGS_PER_ADDRESS 1 | |
931 | ||
932 | /* Recognize any constant value that is a valid address. */ | |
933 | ||
6eff269e BK |
934 | #define CONSTANT_ADDRESS_P(X) \ |
935 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
936 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
937 | || GET_CODE (X) == HIGH) | |
b124ac04 RK |
938 | |
939 | /* Nonzero if the constant value X is a legitimate general operand. | |
940 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
941 | ||
942 | On the ROMP, there is a bit of a hack here. Basically, we wish to | |
943 | only issue instructions that are not `as' macros. However, in the | |
944 | case of `get', `load', and `store', if the operand is a relocatable | |
945 | symbol (possibly +/- an integer), there is no way to express the | |
946 | resulting split-relocation except with the macro. Therefore, allow | |
947 | either a constant valid in a normal (sign-extended) D-format insn or | |
948 | a relocatable expression. | |
949 | ||
950 | Also, for DFmode and DImode, we must ensure that both words are | |
951 | addressable. | |
952 | ||
953 | We define two macros: The first is given an offset (0 or 4) and indicates | |
954 | that the operand is a CONST_INT that is valid for that offset. The second | |
955 | indicates a valid non-CONST_INT constant. */ | |
956 | ||
957 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ | |
958 | (GET_CODE (X) == CONST_INT \ | |
959 | && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) | |
960 | ||
961 | #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \ | |
962 | (GET_CODE (X) == SYMBOL_REF \ | |
963 | || GET_CODE (X) == LABEL_REF \ | |
964 | || (GET_CODE (X) == CONST \ | |
965 | && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \ | |
966 | || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \ | |
967 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT)) | |
968 | ||
969 | /* Include all constant integers and constant double, but exclude | |
970 | SYMBOL_REFs that are to be obtained from the data area (see below). */ | |
971 | #define LEGITIMATE_CONSTANT_P(X) \ | |
972 | ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \ | |
973 | || GET_CODE (X) == CONST_INT \ | |
974 | || GET_CODE (X) == CONST_DOUBLE) \ | |
59a5c11b | 975 | && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X))) |
b124ac04 RK |
976 | |
977 | /* For no good reason, we do the same as the other RT compilers and load | |
978 | the addresses of data areas for a function from our data area. That means | |
979 | that we need to mark such SYMBOL_REFs. We do so here. */ | |
59a5c11b | 980 | #define ENCODE_SECTION_INFO(DECL) \ |
b124ac04 | 981 | if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \ |
59a5c11b | 982 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; |
b124ac04 RK |
983 | |
984 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
985 | and check its validity for a certain class. | |
986 | We have two alternate definitions for each of them. | |
987 | The usual definition accepts all pseudo regs; the other rejects | |
988 | them unless they have been allocated suitable hard regs. | |
989 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
990 | ||
991 | Most source files want to accept pseudo regs in the hope that | |
992 | they will get allocated to the class that the insn wants them to be in. | |
993 | Source files for reload pass need to be strict. | |
994 | After reload, it makes no difference, since pseudo regs have | |
995 | been eliminated by then. */ | |
996 | ||
997 | #ifndef REG_OK_STRICT | |
998 | ||
999 | /* Nonzero if X is a hard reg that can be used as an index | |
1000 | or if it is a pseudo reg. */ | |
1001 | #define REG_OK_FOR_INDEX_P(X) 0 | |
1002 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1003 | or if it is a pseudo reg. */ | |
1004 | #define REG_OK_FOR_BASE_P(X) \ | |
1005 | (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER)) | |
1006 | ||
1007 | #else | |
1008 | ||
1009 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1010 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1011 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1012 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1013 | ||
1014 | #endif | |
1015 | \f | |
1016 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1017 | that is a valid memory address for an instruction. | |
1018 | The MODE argument is the machine mode for the MEM expression | |
1019 | that wants to use this address. | |
1020 | ||
1021 | On the ROMP, a legitimate address is either a legitimate constant, | |
1022 | a register plus a legitimate constant, or a register. See the | |
1023 | discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */ | |
1024 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1025 | { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ | |
1026 | goto ADDR; \ | |
1027 | if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \ | |
1028 | goto ADDR; \ | |
1029 | if (GET_CODE (X) == PLUS \ | |
1030 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1031 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1032 | && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \ | |
1033 | goto ADDR; \ | |
1034 | if (GET_CODE (X) == PLUS \ | |
1035 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1036 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1037 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1038 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
1039 | || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \ | |
1040 | goto ADDR; \ | |
1041 | } | |
1042 | \f | |
1043 | /* Try machine-dependent ways of modifying an illegitimate address | |
1044 | to be legitimate. If we find one, return the new, valid address. | |
1045 | This macro is used in only one place: `memory_address' in explow.c. | |
1046 | ||
1047 | OLDX is the address as it was before break_out_memory_refs was called. | |
1048 | In some cases it is useful to look at this to decide what needs to be done. | |
1049 | ||
1050 | MODE and WIN are passed so that this macro can use | |
1051 | GO_IF_LEGITIMATE_ADDRESS. | |
1052 | ||
1053 | It is always safe for this macro to do nothing. It exists to recognize | |
1054 | opportunities to optimize the output. | |
1055 | ||
1056 | On ROMP, check for the sum of a register with a constant | |
1057 | integer that is out of range. If so, generate code to add the | |
1058 | constant with the low-order 16 bits masked to the register and force | |
1059 | this result into another register (this can be done with `cau'). | |
1060 | Then generate an address of REG+(CONST&0xffff), allowing for the | |
1061 | possibility of bit 16 being a one. | |
1062 | ||
1063 | If the register is not OK for a base register, abort. */ | |
1064 | ||
1065 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1066 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1067 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1068 | && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ | |
1069 | { int high_int, low_int; \ | |
1070 | if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \ | |
1071 | abort (); \ | |
1072 | high_int = INTVAL (XEXP (X, 1)) >> 16; \ | |
1073 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ | |
1074 | if (low_int & 0x8000) \ | |
1075 | high_int += 1, low_int |= 0xffff0000; \ | |
c5c76735 JL |
1076 | (X) = gen_rtx_PLUS (SImode, \ |
1077 | force_operand (plus_constant (XEXP (X, 0), \ | |
1078 | high_int << 16)), \ | |
1079 | GEN_INT (low_int)); \ | |
b124ac04 RK |
1080 | } \ |
1081 | } | |
1082 | ||
1083 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1084 | has an effect that depends on the machine mode it is used for. | |
1085 | ||
1086 | On the ROMP this is true only if the address is valid with a zero offset | |
1087 | but not with an offset of four (this means it cannot be used as an | |
1088 | address for DImode or DFmode). Since we know it is valid, we just check | |
1089 | for an address that is not valid with an offset of four. */ | |
1090 | ||
1091 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1092 | { if (GET_CODE (ADDR) == PLUS \ | |
1093 | && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \ | |
1094 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \ | |
1095 | goto LABEL; \ | |
1096 | } | |
1097 | \f | |
1098 | /* Define this if some processing needs to be done immediately before | |
1099 | emitting code for an insn. | |
1100 | ||
1101 | This is used on the ROMP, to compensate for a bug in the floating-point | |
1102 | code. When a floating-point operation is done with the first and third | |
1103 | operands both the same floating-point register, it will generate bad code | |
1104 | for the MC68881. So we must detect this. If it occurs, we patch the | |
1105 | first operand to be fr0 and insert a move insn to move it to the desired | |
1106 | destination. */ | |
1107 | #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \ | |
1108 | { rtx op0, op1, op2, operation, tem; \ | |
1109 | if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \ | |
1110 | { \ | |
1111 | op0 = OPERANDS[0]; \ | |
1112 | operation = OPERANDS[1]; \ | |
1113 | if (float_conversion (operation, VOIDmode)) \ | |
1114 | operation = XEXP (operation, 0); \ | |
1115 | if (float_binary (operation, VOIDmode)) \ | |
1116 | { \ | |
1117 | op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \ | |
1118 | if (float_conversion (op1, VOIDmode)) \ | |
1119 | op1 = XEXP (op1, 0); \ | |
1120 | if (float_conversion (op2, VOIDmode)) \ | |
1121 | op2 = XEXP (op2, 0); \ | |
1122 | if (rtx_equal_p (op0, op2) \ | |
1123 | && (GET_CODE (operation) == PLUS \ | |
1124 | || GET_CODE (operation) == MULT)) \ | |
1125 | tem = op1, op1 = op2, op2 = tem; \ | |
1126 | if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \ | |
1127 | && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \ | |
1128 | && REGNO (op0) == REGNO (op2)) \ | |
1129 | { \ | |
c5c76735 | 1130 | tem = gen_rtx_REG (GET_MODE (op0), 17); \ |
b124ac04 RK |
1131 | emit_insn_after (gen_move_insn (op0, tem), INSN); \ |
1132 | SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \ | |
1133 | OPERANDS[0] = tem; \ | |
1134 | } \ | |
1135 | } \ | |
1136 | } \ | |
1137 | } | |
1138 | \f | |
1139 | /* Specify the machine mode that this machine uses | |
1140 | for the index in the tablejump instruction. */ | |
1141 | #define CASE_VECTOR_MODE SImode | |
1142 | ||
18543a22 ILT |
1143 | /* Define as C expression which evaluates to nonzero if the tablejump |
1144 | instruction expects the table to contain offsets from the address of the | |
1145 | table. | |
1146 | Do not define this if the table should contain absolute addresses. */ | |
1147 | /* #define CASE_VECTOR_PC_RELATIVE 1 */ | |
b124ac04 RK |
1148 | |
1149 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1150 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1151 | ||
1152 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1153 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1154 | ||
1155 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1156 | #define DEFAULT_SIGNED_CHAR 0 | |
1157 | ||
1158 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1159 | also convert validly to an unsigned one. | |
1160 | ||
1161 | We actually lie a bit here as overflow conditions are different. But | |
1162 | they aren't being checked anyway. */ | |
1163 | ||
1164 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1165 | ||
1166 | /* Max number of bytes we can move from memory to memory | |
1167 | in one reasonably fast instruction. */ | |
1168 | #define MOVE_MAX 4 | |
1169 | ||
1170 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1171 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1172 | is undesirable. */ | |
1173 | #define SLOW_BYTE_ACCESS 1 | |
1174 | ||
9a63901f RK |
1175 | /* Define if operations between registers always perform the operation |
1176 | on the full register even if a narrower mode is specified. */ | |
1177 | #define WORD_REGISTER_OPERATIONS | |
1178 | ||
1179 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1180 | will either zero-extend or sign-extend. The value of this macro should | |
1181 | be the code that says which one of the two operations is implicitly | |
1182 | done, NIL if none. */ | |
1183 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
b124ac04 RK |
1184 | |
1185 | /* This is BSD, so it wants DBX format. */ | |
1186 | #define DBX_DEBUGGING_INFO | |
1187 | ||
0f21219f RK |
1188 | /* Define the letter code used in a stabs entry for parameters passed |
1189 | with the register attribute. | |
1190 | ||
1191 | GCC's default value, 'P', is used by dbx to refers to an external | |
1192 | procedure. The section 5 manual page for dbx implies that 'R' would be the | |
1193 | right letter, but dbx 1.5 has a bug in it that precludes its use. | |
1194 | Probably that is why neither hc or pcc use this. pcc puts in two | |
1195 | stabs entries: one for the parameter location and one for the register | |
1196 | location. The letter `r' (register) | |
1197 | would be okay, but it loses parameter attribute of the stabs entry. */ | |
1198 | #define DBX_REGPARM_STABS_LETTER 'R' | |
1199 | ||
1200 | /* A C expression for the integer offset value of an automatic variable | |
1201 | (N_LSYM) having address X (an RTX). This gets used in .stabs entries | |
1202 | for the local variables. Compare with the default definition. */ | |
1203 | extern int romp_debugger_auto_correction(); | |
1204 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
1205 | (GET_CODE (X) == PLUS \ | |
1206 | ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \ | |
1207 | : 0 ) | |
1208 | ||
1209 | /* A C expression for the integer offset value of an argument (N_PSYM) | |
1210 | having address X (an RTX). The nominal offset is OFFSET. */ | |
1211 | extern int romp_debugger_arg_correction(); | |
1212 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) \ | |
1213 | romp_debugger_arg_correction (OFFSET); | |
1214 | ||
b124ac04 RK |
1215 | /* We don't have GAS for the RT yet, so don't write out special |
1216 | .stabs in cc1plus. */ | |
1217 | ||
1218 | #define FASCIST_ASSEMBLER | |
1219 | ||
1220 | /* Do not break .stabs pseudos into continuations. */ | |
1221 | #define DBX_CONTIN_LENGTH 0 | |
1222 | ||
1223 | /* Don't try to use the `x' type-cross-reference character in DBX data. | |
1224 | Also has the consequence of putting each struct, union or enum | |
1225 | into a separate .stabs, containing only cross-refs to the others. */ | |
1226 | #define DBX_NO_XREFS | |
1227 | ||
1228 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1229 | is done just by pretending it is already truncated. */ | |
1230 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1231 | ||
1232 | /* Specify the machine mode that pointers have. | |
1233 | After generation of rtl, the compiler makes no further distinction | |
1234 | between pointers and any other objects of this machine mode. */ | |
1235 | #define Pmode SImode | |
1236 | ||
1237 | /* Mode of a function address in a call instruction (for indexing purposes). | |
1238 | ||
1239 | Doesn't matter on ROMP. */ | |
1240 | #define FUNCTION_MODE SImode | |
1241 | ||
1242 | /* Define this if addresses of constant functions | |
1243 | shouldn't be put through pseudo regs where they can be cse'd. | |
1244 | Desirable on machines where ordinary constants are expensive | |
1245 | but a CALL with constant address is cheap. */ | |
1246 | #define NO_FUNCTION_CSE | |
1247 | ||
1248 | /* Define this if shift instructions ignore all but the low-order | |
36d51583 RK |
1249 | few bits. |
1250 | ||
1251 | This is not true on the RT since it uses the low-order 6, not 5, bits. | |
1252 | At some point, this should be extended to see how to express that. */ | |
1253 | ||
1254 | /* #define SHIFT_COUNT_TRUNCATED */ | |
b124ac04 | 1255 | |
3bb22aee RS |
1256 | /* Compute the cost of computing a constant rtl expression RTX whose |
1257 | rtx-code is CODE, contained within an expression of code OUTER_CODE. | |
1258 | The body of this macro is a portion of a switch statement. If the | |
1259 | code is computed here, return it with a return statement. Otherwise, | |
1260 | break from the switch. */ | |
b124ac04 | 1261 | |
3bb22aee | 1262 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
b124ac04 | 1263 | case CONST_INT: \ |
6c94ce67 | 1264 | if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0 \ |
a7a975e1 RK |
1265 | || (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \ |
1266 | || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \ | |
3bb22aee | 1267 | && (unsigned int) (INTVAL (RTX) + 15) < 31) \ |
6c94ce67 | 1268 | || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\ |
3bb22aee | 1269 | return 0; \ |
a7a975e1 RK |
1270 | return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \ |
1271 | || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\ | |
b124ac04 RK |
1272 | case CONST: \ |
1273 | case LABEL_REF: \ | |
1274 | case SYMBOL_REF: \ | |
3bb22aee | 1275 | if (current_function_operand (RTX, Pmode)) return 0; \ |
a7a975e1 | 1276 | return COSTS_N_INSNS (2); \ |
3bb22aee RS |
1277 | case CONST_DOUBLE: \ |
1278 | if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \ | |
a7a975e1 RK |
1279 | return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \ |
1280 | ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4)); | |
b124ac04 RK |
1281 | |
1282 | /* Provide the costs of a rtl expression. This is in the body of a | |
1283 | switch on CODE. | |
1284 | ||
1285 | References to our own data area are really references to r14, so they | |
1286 | are very cheap. Multiples and divides are very expensive. */ | |
1287 | ||
3bb22aee | 1288 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
b124ac04 RK |
1289 | case MEM: \ |
1290 | return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \ | |
1291 | case MULT: \ | |
3bb22aee RS |
1292 | return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\ |
1293 | ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \ | |
b124ac04 RK |
1294 | case DIV: \ |
1295 | case UDIV: \ | |
1296 | case MOD: \ | |
1297 | case UMOD: \ | |
1298 | return COSTS_N_INSNS (45); | |
1299 | ||
1300 | /* Compute the cost of an address. This is meant to approximate the size | |
1301 | and/or execution delay of an insn using that address. If the cost is | |
1302 | approximated by the RTL complexity, including CONST_COSTS above, as | |
1303 | is usually the case for CISC machines, this macro should not be defined. | |
1304 | For aggressively RISCy machines, only one insn format is allowed, so | |
1305 | this macro should be a constant. The value of this macro only matters | |
1306 | for valid addresses. | |
1307 | ||
1308 | For the ROMP, everything is cost 0 except for addresses involving | |
1309 | symbolic constants, which are cost 1. */ | |
1310 | ||
1311 | #define ADDRESS_COST(RTX) \ | |
1312 | ((GET_CODE (RTX) == SYMBOL_REF \ | |
1313 | && ! CONSTANT_POOL_ADDRESS_P (RTX)) \ | |
1314 | || GET_CODE (RTX) == LABEL_REF \ | |
1315 | || (GET_CODE (RTX) == CONST \ | |
1316 | && ! constant_pool_address_operand (RTX, Pmode)) \ | |
1317 | || (GET_CODE (RTX) == PLUS \ | |
1318 | && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \ | |
1319 | && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \ | |
1320 | || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \ | |
1321 | || GET_CODE (XEXP (RTX, 1)) == CONST))) | |
1322 | ||
1323 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
1324 | should be adjusted to reflect any required changes. This macro is used when | |
1325 | there is some systematic length adjustment required that would be difficult | |
1326 | to express in the length attribute. | |
1327 | ||
1328 | On the ROMP, there are two adjustments: First, a 2-byte insn in the delay | |
1329 | slot of a CALL (including floating-point operations) actually takes four | |
1330 | bytes. Second, we have to make the worst-case alignment assumption for | |
1331 | address vectors. */ | |
1332 | ||
1333 | #define ADJUST_INSN_LENGTH(X,LENGTH) \ | |
1334 | if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \ | |
1335 | && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \ | |
1336 | && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \ | |
1337 | (LENGTH) += 2; \ | |
1338 | else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \ | |
1339 | (LENGTH) += 2; | |
1340 | \f | |
1341 | /* Tell final.c how to eliminate redundant test instructions. */ | |
1342 | ||
1343 | /* Here we define machine-dependent flags and fields in cc_status | |
1344 | (see `conditions.h'). */ | |
1345 | ||
1346 | /* Set if condition code (really not-Z) is stored in `test bit'. */ | |
1347 | #define CC_IN_TB 01000 | |
1348 | ||
1349 | /* Set if condition code is set by an unsigned compare. */ | |
1350 | #define CC_UNSIGNED 02000 | |
1351 | ||
1352 | /* Store in cc_status the expressions | |
1353 | that the condition codes will describe | |
1354 | after execution of an instruction whose pattern is EXP. | |
1355 | Do not alter them if the instruction would not alter the cc's. */ | |
1356 | ||
1357 | #define NOTICE_UPDATE_CC(BODY,INSN) \ | |
1358 | update_cc (BODY, INSN) | |
1359 | \f | |
1360 | /* Control the assembler format that we output. */ | |
1361 | ||
1362 | /* Output at beginning of assembler file. */ | |
1363 | ||
1364 | #define ASM_FILE_START(FILE) \ | |
1365 | { extern char *version_string; \ | |
8c1d7353 RK |
1366 | char *p; \ |
1367 | \ | |
b124ac04 | 1368 | fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \ |
8c1d7353 RK |
1369 | fprintf (FILE, "\t.globl .oVgcc"); \ |
1370 | for (p = version_string; *p != ' ' && *p != 0; p++) \ | |
1371 | fprintf (FILE, "%c", *p); \ | |
1372 | fprintf (FILE, "\n\t.set .oVgcc"); \ | |
1373 | for (p = version_string; *p != ' ' && *p != 0; p++) \ | |
1374 | fprintf (FILE, "%c", *p); \ | |
1375 | fprintf (FILE, ",0\n"); \ | |
b124ac04 RK |
1376 | } |
1377 | ||
1378 | /* Output to assembler file text saying following lines | |
1379 | may contain character constants, extra white space, comments, etc. */ | |
1380 | ||
1381 | #define ASM_APP_ON "" | |
1382 | ||
1383 | /* Output to assembler file text saying following lines | |
1384 | no longer contain unusual constructs. */ | |
1385 | ||
1386 | #define ASM_APP_OFF "" | |
1387 | ||
1388 | /* Output before instructions and read-only data. */ | |
1389 | ||
fdaff8ba | 1390 | #define TEXT_SECTION_ASM_OP ".text" |
b124ac04 RK |
1391 | |
1392 | /* Output before writable data. */ | |
1393 | ||
fdaff8ba | 1394 | #define DATA_SECTION_ASM_OP ".data" |
b124ac04 RK |
1395 | |
1396 | /* How to refer to registers in assembler output. | |
1397 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1398 | ||
1399 | #define REGISTER_NAMES \ | |
1400 | {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \ | |
1401 | "r10", "r11", "r12", "r13", "r14", "r15", "ap", \ | |
1402 | "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" } | |
1403 | ||
1404 | /* How to renumber registers for dbx and gdb. */ | |
1405 | ||
1406 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1407 | ||
1408 | /* This is how to output the definition of a user-level label named NAME, | |
1409 | such as the label on a static function or variable NAME. */ | |
1410 | ||
1411 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1412 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1413 | ||
1414 | /* This is how to output a command to make the user-level label named NAME | |
1415 | defined for reference from other files. */ | |
1416 | ||
1417 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1418 | do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1419 | ||
4e0c8ad2 | 1420 | /* The prefix to add to user-visible assembler symbols. */ |
b124ac04 | 1421 | |
4e0c8ad2 | 1422 | #define USER_LABEL_PREFIX "_" |
b124ac04 RK |
1423 | |
1424 | /* This is how to output an internal numbered label where | |
1425 | PREFIX is the class of label and NUM is the number within the class. */ | |
1426 | ||
1427 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1428 | fprintf (FILE, "%s%d:\n", PREFIX, NUM) | |
1429 | ||
1430 | /* This is how to output a label for a jump table. Arguments are the same as | |
1431 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
1432 | passed. */ | |
1433 | ||
1434 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
1435 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
1436 | ||
1437 | /* This is how to store into the string LABEL | |
1438 | the symbol_ref name of an internal numbered label where | |
1439 | PREFIX is the class of label and NUM is the number within the class. | |
1440 | This is suitable for output with `assemble_name'. */ | |
1441 | ||
1442 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1443 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
1444 | ||
1445 | /* This is how to output an assembler line defining a `double' constant. */ | |
1446 | ||
1447 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ | |
1448 | fprintf (FILE, "\t.double 0d%.20e\n", (VALUE)) | |
1449 | ||
1450 | /* This is how to output an assembler line defining a `float' constant. | |
1451 | ||
1452 | WARNING: Believe it or not, the ROMP assembler has a bug in its | |
1453 | handling of single-precision floating-point values making it impossible | |
1454 | to output such values in the expected way. Therefore, it must be output | |
1455 | in hex. THIS WILL NOT WORK IF CROSS-COMPILING FROM A MACHINE THAT DOES | |
1456 | NOT USE IEEE-FORMAT FLOATING-POINT, but there is nothing that can be done | |
1457 | about it short of fixing the assembler. */ | |
1458 | ||
1459 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ | |
1460 | do { union { int i; float f; } u_i_f; \ | |
1461 | u_i_f.f = (VALUE); \ | |
1462 | fprintf (FILE, "\t.long 0x%x\n", u_i_f.i);\ | |
1463 | } while (0) | |
1464 | ||
1465 | /* This is how to output an assembler line defining an `int' constant. */ | |
1466 | ||
1467 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
1468 | ( fprintf (FILE, "\t.long "), \ | |
1469 | output_addr_const (FILE, (VALUE)), \ | |
1470 | fprintf (FILE, "\n")) | |
1471 | ||
1472 | /* Likewise for `char' and `short' constants. */ | |
1473 | ||
1474 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
1475 | ( fprintf (FILE, "\t.short "), \ | |
1476 | output_addr_const (FILE, (VALUE)), \ | |
1477 | fprintf (FILE, "\n")) | |
1478 | ||
1479 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
1480 | ( fprintf (FILE, "\t.byte "), \ | |
1481 | output_addr_const (FILE, (VALUE)), \ | |
1482 | fprintf (FILE, "\n")) | |
1483 | ||
1484 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1485 | ||
1486 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
1487 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
1488 | ||
1489 | /* This is how to output code to push a register on the stack. | |
1490 | It need not be very fast code. */ | |
1491 | ||
1492 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1493 | fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO]) | |
1494 | ||
1495 | /* This is how to output an insn to pop a register from the stack. | |
1496 | It need not be very fast code. */ | |
1497 | ||
1498 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1499 | fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO]) | |
1500 | ||
1501 | /* This is how to output an element of a case-vector that is absolute. */ | |
1502 | ||
1503 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
1504 | fprintf (FILE, "\t.long L%d\n", VALUE) | |
1505 | ||
1506 | /* This is how to output an element of a case-vector that is relative. | |
27b6c442 | 1507 | Don't define this if it is not supported. */ |
b124ac04 | 1508 | |
27b6c442 | 1509 | /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */ |
b124ac04 RK |
1510 | |
1511 | /* This is how to output an assembler line | |
1512 | that says to advance the location counter | |
1513 | to a multiple of 2**LOG bytes. */ | |
1514 | ||
1515 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1516 | if ((LOG) != 0) \ | |
1517 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
1518 | ||
1519 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1520 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
1521 | ||
1522 | /* This says how to output an assembler line | |
1523 | to define a global common symbol. */ | |
1524 | ||
1525 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1526 | ( fputs (".comm ", (FILE)), \ | |
1527 | assemble_name ((FILE), (NAME)), \ | |
1528 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1529 | ||
1530 | /* This says how to output an assembler line | |
1531 | to define a local common symbol. */ | |
1532 | ||
1533 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
1534 | ( fputs (".lcomm ", (FILE)), \ | |
1535 | assemble_name ((FILE), (NAME)), \ | |
1536 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1537 | ||
1538 | /* Store in OUTPUT a string (made with alloca) containing | |
1539 | an assembler-name for a local static variable named NAME. | |
1540 | LABELNO is an integer which is different for each call. */ | |
1541 | ||
1542 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1543 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1544 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1545 | ||
1546 | /* Define the parentheses used to group arithmetic operations | |
1547 | in assembler code. */ | |
1548 | ||
1549 | #define ASM_OPEN_PAREN "(" | |
1550 | #define ASM_CLOSE_PAREN ")" | |
1551 | ||
1552 | /* Define results of standard character escape sequences. */ | |
1553 | #define TARGET_BELL 007 | |
1554 | #define TARGET_BS 010 | |
1555 | #define TARGET_TAB 011 | |
1556 | #define TARGET_NEWLINE 012 | |
1557 | #define TARGET_VT 013 | |
1558 | #define TARGET_FF 014 | |
1559 | #define TARGET_CR 015 | |
1560 | ||
1561 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1562 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1563 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1564 | ||
1565 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1566 | ||
1567 | /* Define which CODE values are valid. */ | |
1568 | ||
1569 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ | |
1570 | ((CODE) == '.' || (CODE) == '#') | |
1571 | \f | |
1572 | /* Print a memory address as an operand to reference that memory location. */ | |
1573 | ||
1574 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1575 | { register rtx addr = ADDR; \ | |
1576 | register rtx base = 0, offset = addr; \ | |
1577 | if (GET_CODE (addr) == REG) \ | |
1578 | base = addr, offset = const0_rtx; \ | |
1579 | else if (GET_CODE (addr) == PLUS \ | |
1580 | && GET_CODE (XEXP (addr, 0)) == REG) \ | |
1581 | base = XEXP (addr, 0), offset = XEXP (addr, 1); \ | |
1582 | else if (GET_CODE (addr) == SYMBOL_REF \ | |
1583 | && CONSTANT_POOL_ADDRESS_P (addr)) \ | |
1584 | { \ | |
c5c76735 JL |
1585 | offset = GEN_INT (get_pool_offset (addr) + 12); \ |
1586 | base = gen_rtx_REG (SImode, 14); \ | |
b124ac04 RK |
1587 | } \ |
1588 | else if (GET_CODE (addr) == CONST \ | |
1589 | && GET_CODE (XEXP (addr, 0)) == PLUS \ | |
1590 | && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \ | |
1591 | && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \ | |
1592 | && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \ | |
1593 | { \ | |
1594 | offset = plus_constant (XEXP (XEXP (addr, 0), 1), \ | |
1595 | (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \ | |
1596 | + 12)); \ | |
c5c76735 | 1597 | base = gen_rtx_REG (SImode, 14); \ |
b124ac04 RK |
1598 | } \ |
1599 | output_addr_const (FILE, offset); \ | |
1600 | if (base) \ | |
1601 | fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \ | |
1602 | } | |
1603 | ||
1604 | /* Define the codes that are matched by predicates in aux-output.c. */ | |
1605 | ||
1606 | #define PREDICATE_CODES \ | |
1607 | {"zero_memory_operand", {SUBREG, MEM}}, \ | |
1608 | {"short_memory_operand", {SUBREG, MEM}}, \ | |
1609 | {"symbolic_memory_operand", {SUBREG, MEM}}, \ | |
1610 | {"current_function_operand", {MEM}}, \ | |
1611 | {"constant_pool_address_operand", {SUBREG, CONST}}, \ | |
1612 | {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \ | |
1613 | {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \ | |
1614 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
1615 | {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
1616 | {"short_cint_operand", {CONST_INT}}, \ | |
1617 | {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \ | |
1618 | {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \ | |
1619 | PLUS, CONST, CONST_INT}}, \ | |
1620 | {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \ | |
1621 | {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \ | |
1622 | {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \ | |
1623 | {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \ | |
1624 | SYMBOL_REF, CONST_DOUBLE}}, \ | |
1625 | {"reg_0_operand", {REG}}, \ | |
1626 | {"reg_15_operand", {REG}}, \ | |
1627 | {"float_binary", {PLUS, MINUS, MULT, DIV}}, \ | |
1628 | {"float_unary", {NEG, ABS}}, \ | |
1629 | {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}}, | |
1630 | ||
1631 | /* Define functions defined in aux-output.c and used in templates. */ | |
1632 | ||
1633 | extern char *output_in_line_mul (); | |
1634 | extern char *output_fpop (); |