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01eb32e7 | 1 | ;; Scheduling description for PowerPC 601 processor. |
f1717362 | 2 | ;; Copyright (C) 2003-2016 Free Software Foundation, Inc. |
01eb32e7 | 3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ||
6 | ;; GCC is free software; you can redistribute it and/or modify it | |
7 | ;; under the terms of the GNU General Public License as published | |
8 | ;; by the Free Software Foundation; either version 3, or (at your | |
9 | ;; option) any later version. | |
10 | ||
11 | ;; GCC is distributed in the hope that it will be useful, but WITHOUT | |
12 | ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | ;; License for more details. | |
15 | ||
16 | ;; You should have received a copy of the GNU General Public License | |
17 | ;; along with GCC; see the file COPYING3. If not see | |
18 | ;; <http://www.gnu.org/licenses/>. | |
19 | ||
20 | (define_automaton "ppc601,ppc601fp") | |
21 | (define_cpu_unit "iu_ppc601" "ppc601") | |
22 | (define_cpu_unit "fpu_ppc601" "ppc601fp") | |
23 | (define_cpu_unit "bpu_ppc601" "ppc601") | |
24 | ||
25 | ;; PPC601 32-bit IU, FPU, BPU | |
26 | ||
27 | (define_insn_reservation "ppc601-load" 2 | |
631c977b | 28 | (and (eq_attr "type" "load,load_l,store_c,sync") |
01eb32e7 | 29 | (eq_attr "cpu" "ppc601")) |
30 | "iu_ppc601") | |
31 | ||
32 | (define_insn_reservation "ppc601-store" 2 | |
631c977b | 33 | (and (eq_attr "type" "store") |
01eb32e7 | 34 | (eq_attr "cpu" "ppc601")) |
35 | "iu_ppc601") | |
36 | ||
37 | (define_insn_reservation "ppc601-fpload" 3 | |
631c977b | 38 | (and (eq_attr "type" "fpload") |
01eb32e7 | 39 | (eq_attr "cpu" "ppc601")) |
40 | "iu_ppc601") | |
41 | ||
42 | (define_insn_reservation "ppc601-fpstore" 3 | |
631c977b | 43 | (and (eq_attr "type" "fpstore") |
01eb32e7 | 44 | (eq_attr "cpu" "ppc601")) |
45 | "iu_ppc601+fpu_ppc601") | |
46 | ||
47 | (define_insn_reservation "ppc601-integer" 1 | |
88599a7a | 48 | (and (ior (eq_attr "type" "integer,add,insert,trap,cntlz,isel") |
49 | (and (eq_attr "type" "shift,exts") | |
7d307a6a | 50 | (eq_attr "dot" "no"))) |
01eb32e7 | 51 | (eq_attr "cpu" "ppc601")) |
52 | "iu_ppc601") | |
53 | ||
54 | (define_insn_reservation "ppc601-two" 1 | |
55 | (and (eq_attr "type" "two") | |
56 | (eq_attr "cpu" "ppc601")) | |
57 | "iu_ppc601,iu_ppc601") | |
58 | ||
59 | (define_insn_reservation "ppc601-three" 1 | |
60 | (and (eq_attr "type" "three") | |
61 | (eq_attr "cpu" "ppc601")) | |
62 | "iu_ppc601,iu_ppc601,iu_ppc601") | |
63 | ||
64 | (define_insn_reservation "ppc601-imul" 5 | |
86c149d4 | 65 | (and (eq_attr "type" "mul") |
01eb32e7 | 66 | (eq_attr "cpu" "ppc601")) |
67 | "iu_ppc601*5") | |
68 | ||
69 | (define_insn_reservation "ppc601-idiv" 36 | |
90e4483f | 70 | (and (eq_attr "type" "div") |
01eb32e7 | 71 | (eq_attr "cpu" "ppc601")) |
72 | "iu_ppc601*36") | |
73 | ||
74 | ; compare executes on integer unit, but feeds insns which | |
75 | ; execute on the branch unit. | |
76 | (define_insn_reservation "ppc601-compare" 3 | |
cd1e80f3 | 77 | (and (ior (eq_attr "type" "cmp") |
88599a7a | 78 | (and (eq_attr "type" "shift,exts") |
7d307a6a | 79 | (eq_attr "dot" "yes"))) |
01eb32e7 | 80 | (eq_attr "cpu" "ppc601")) |
81 | "iu_ppc601,nothing,bpu_ppc601") | |
82 | ||
83 | (define_insn_reservation "ppc601-fpcompare" 5 | |
84 | (and (eq_attr "type" "fpcompare") | |
85 | (eq_attr "cpu" "ppc601")) | |
86 | "(fpu_ppc601+iu_ppc601*2),nothing*2,bpu_ppc601") | |
87 | ||
88 | (define_insn_reservation "ppc601-fp" 4 | |
89 | (and (eq_attr "type" "fp") | |
90 | (eq_attr "cpu" "ppc601")) | |
91 | "fpu_ppc601") | |
92 | ||
93 | (define_insn_reservation "ppc601-dmul" 5 | |
94 | (and (eq_attr "type" "dmul") | |
95 | (eq_attr "cpu" "ppc601")) | |
96 | "fpu_ppc601*2") | |
97 | ||
98 | (define_insn_reservation "ppc601-sdiv" 17 | |
99 | (and (eq_attr "type" "sdiv") | |
100 | (eq_attr "cpu" "ppc601")) | |
101 | "fpu_ppc601*17") | |
102 | ||
103 | (define_insn_reservation "ppc601-ddiv" 31 | |
104 | (and (eq_attr "type" "ddiv") | |
105 | (eq_attr "cpu" "ppc601")) | |
106 | "fpu_ppc601*31") | |
107 | ||
108 | (define_insn_reservation "ppc601-mfcr" 2 | |
109 | (and (eq_attr "type" "mfcr") | |
110 | (eq_attr "cpu" "ppc601")) | |
111 | "iu_ppc601,bpu_ppc601") | |
112 | ||
113 | (define_insn_reservation "ppc601-mtcr" 4 | |
114 | (and (eq_attr "type" "mtcr") | |
115 | (eq_attr "cpu" "ppc601")) | |
116 | "iu_ppc601,bpu_ppc601") | |
117 | ||
118 | (define_insn_reservation "ppc601-crlogical" 4 | |
119 | (and (eq_attr "type" "cr_logical,delayed_cr") | |
120 | (eq_attr "cpu" "ppc601")) | |
121 | "bpu_ppc601") | |
122 | ||
123 | (define_insn_reservation "ppc601-mtjmpr" 4 | |
124 | (and (eq_attr "type" "mtjmpr") | |
125 | (eq_attr "cpu" "ppc601")) | |
126 | "iu_ppc601,bpu_ppc601") | |
127 | ||
128 | (define_insn_reservation "ppc601-mfjmpr" 2 | |
129 | (and (eq_attr "type" "mfjmpr") | |
130 | (eq_attr "cpu" "ppc601")) | |
131 | "iu_ppc601,bpu_ppc601") | |
132 | ||
133 | (define_insn_reservation "ppc601-branch" 1 | |
134 | (and (eq_attr "type" "jmpreg,branch,isync") | |
135 | (eq_attr "cpu" "ppc601")) | |
136 | "bpu_ppc601") | |
137 |