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1 | ;; Scheduling description for PowerPC A2 processors. |
2 | ;; Copyright (C) 2009 Free Software Foundation, Inc. | |
3 | ;; | |
4 | ;; Contributed by Ben Elliston (bje@au.ibm.com). | |
5 | ||
6 | (define_automaton "ppca2") | |
7 | ||
8 | ;; CPU units | |
9 | ||
10 | ;; The multiplier pipeline. | |
11 | (define_cpu_unit "mult" "ppca2") | |
12 | ||
13 | ;; The auxillary processor unit (FP/vector unit). | |
14 | (define_cpu_unit "axu" "ppca2") | |
15 | ||
16 | ;; D.4.6 | |
17 | ;; Some peculiarities for certain SPRs | |
18 | ||
19 | (define_insn_reservation "ppca2-mfcr" 1 | |
20 | (and (eq_attr "type" "mfcr") | |
21 | (eq_attr "cpu" "ppca2")) | |
22 | "nothing") | |
23 | ||
24 | (define_insn_reservation "ppca2-mfjmpr" 5 | |
25 | (and (eq_attr "type" "mfjmpr") | |
26 | (eq_attr "cpu" "ppca2")) | |
27 | "nothing") | |
28 | ||
29 | (define_insn_reservation "ppca2-mtjmpr" 5 | |
30 | (and (eq_attr "type" "mtjmpr") | |
31 | (eq_attr "cpu" "ppca2")) | |
32 | "nothing") | |
33 | ||
34 | ;; D.4.8 | |
35 | (define_insn_reservation "ppca2-imul" 1 | |
36 | (and (eq_attr "type" "imul,imul2,imul3,imul_compare") | |
37 | (eq_attr "cpu" "ppca2")) | |
38 | "nothing") | |
39 | ||
40 | ;; FIXME: latency and multiplier reservation for 64-bit multiply? | |
41 | (define_insn_reservation "ppca2-lmul" 6 | |
42 | (and (eq_attr "type" "lmul,lmul_compare") | |
43 | (eq_attr "cpu" "ppca2")) | |
44 | "mult*3") | |
45 | ||
46 | ;; D.4.9 | |
47 | (define_insn_reservation "ppca2-idiv" 32 | |
48 | (and (eq_attr "type" "idiv") | |
49 | (eq_attr "cpu" "ppca2")) | |
50 | "mult*32") | |
51 | ||
52 | (define_insn_reservation "ppca2-ldiv" 65 | |
53 | (and (eq_attr "type" "ldiv") | |
54 | (eq_attr "cpu" "ppca2")) | |
55 | "mult*65") | |
56 | ||
57 | ;; D.4.13 | |
58 | (define_insn_reservation "ppca2-load" 5 | |
59 | (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u") | |
60 | (eq_attr "cpu" "ppca2")) | |
61 | "nothing") | |
62 | ||
63 | ;; D.8.1 | |
64 | (define_insn_reservation "ppca2-fp" 6 | |
65 | (and (eq_attr "type" "fp") ;; Ignore fpsimple insn types (SPE only). | |
66 | (eq_attr "cpu" "ppca2")) | |
67 | "axu") | |
68 | ||
69 | ;; D.8.4 | |
70 | (define_insn_reservation "ppca2-fp-load" 6 | |
71 | (and (eq_attr "type" "fpload,fpload_u,fpload_ux") | |
72 | (eq_attr "cpu" "ppca2")) | |
73 | "axu") | |
74 | ||
75 | ;; D.8.5 | |
76 | (define_insn_reservation "ppca2-fp-store" 2 | |
77 | (and (eq_attr "type" "fpstore,fpstore_u,fpstore_ux") | |
78 | (eq_attr "cpu" "ppca2")) | |
79 | "axu") | |
80 | ||
81 | ;; D.8.6 | |
82 | (define_insn_reservation "ppca2-fpcompare" 5 | |
83 | (and (eq_attr "type" "fpcompare") | |
84 | (eq_attr "cpu" "ppca2")) | |
85 | "axu") | |
86 | ||
87 | ;; D.8.7 | |
88 | ;; | |
89 | ;; Instructions from the same thread succeeding the floating-point | |
90 | ;; divide cannot be executed until the floating-point divide has | |
91 | ;; completed. Since there is nothing else we can do, this thread will | |
92 | ;; just have to stall. | |
93 | ||
94 | (define_insn_reservation "ppca2-ddiv" 72 | |
95 | (and (eq_attr "type" "ddiv") | |
96 | (eq_attr "cpu" "ppca2")) | |
97 | "axu") | |
98 | ||
99 | (define_insn_reservation "ppca2-sdiv" 59 | |
100 | (and (eq_attr "type" "sdiv") | |
101 | (eq_attr "cpu" "ppca2")) | |
102 | "axu") | |
103 | ||
104 | ;; D.8.8 | |
105 | ;; | |
106 | ;; Instructions from the same thread succeeding the floating-point | |
107 | ;; divide cannot be executed until the floating-point divide has | |
108 | ;; completed. Since there is nothing else we can do, this thread will | |
109 | ;; just have to stall. | |
110 | ||
111 | (define_insn_reservation "ppca2-dsqrt" 69 | |
112 | (and (eq_attr "type" "dsqrt") | |
113 | (eq_attr "cpu" "ppca2")) | |
114 | "axu") | |
115 | ||
116 | (define_insn_reservation "ppca2-ssqrt" 65 | |
117 | (and (eq_attr "type" "ssqrt") | |
118 | (eq_attr "cpu" "ppca2")) | |
119 | "axu") | |
120 | ;; Scheduling description for PowerPC A2 processors. | |
121 | ;; Copyright (C) 2008 Free Software Foundation, Inc. | |
122 | ;; | |
123 | ;; Contributed by Ben Elliston (bje@au.ibm.com). | |
124 | ||
125 | (define_automaton "a2") | |
126 | ||
127 | ;; CPU units | |
128 | ||
129 | ;; The multiplier pipeline. | |
130 | (define_cpu_unit "mult" "a2") | |
131 | ||
132 | ;; The auxillary processor unit (FP/vector unit). | |
133 | (define_cpu_unit "axu" "a2") | |
134 | ||
135 | ;; D.4.6 | |
136 | ;; Some peculiarities for certain SPRs | |
137 | ||
138 | (define_insn_reservation "ppca2-mfcr" 1 | |
139 | (and (eq_attr "type" "mfcr") | |
140 | (eq_attr "cpu" "ppca2")) | |
141 | "nothing") | |
142 | ||
143 | (define_insn_reservation "ppca2-mfjmpr" 5 | |
144 | (and (eq_attr "type" "mfjmpr") | |
145 | (eq_attr "cpu" "ppca2")) | |
146 | "nothing") | |
147 | ||
148 | (define_insn_reservation "ppca2-mtjmpr" 5 | |
149 | (and (eq_attr "type" "mtjmpr") | |
150 | (eq_attr "cpu" "ppca2")) | |
151 | "nothing") | |
152 | ||
153 | ;; D.4.8 | |
154 | (define_insn_reservation "ppca2-imul" 1 | |
155 | (and (eq_attr "type" "imul,imul2,imul3,imul_compare") | |
156 | (eq_attr "cpu" "ppca2")) | |
157 | "nothing") | |
158 | ||
159 | ;; FIXME: latency and multiplier reservation for 64-bit multiply? | |
160 | (define_insn_reservation "ppca2-lmul" 6 | |
161 | (and (eq_attr "type" "lmul,lmul_compare") | |
162 | (eq_attr "cpu" "ppca2")) | |
163 | "mult*3") | |
164 | ||
165 | ;; D.4.9 | |
166 | (define_insn_reservation "ppca2-idiv" 32 | |
167 | (and (eq_attr "type" "idiv") | |
168 | (eq_attr "cpu" "ppca2")) | |
169 | "mult*32") | |
170 | ||
171 | (define_insn_reservation "ppca2-ldiv" 65 | |
172 | (and (eq_attr "type" "ldiv") | |
173 | (eq_attr "cpu" "ppca2")) | |
174 | "mult*65") | |
175 | ||
176 | ;; D.4.13 | |
177 | (define_insn_reservation "pcca2-load" 5 | |
178 | (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u") | |
179 | (eq_attr "cpu" "ppca2")) | |
180 | "nothing") | |
181 | ||
182 | ;; D.8.1 | |
183 | (define_insn_reservation "ppca2-fp" 6 | |
184 | (and (eq_attr "type" "fp") ;; Ignore fpsimple insn types (SPE only). | |
185 | (eq_attr "cpu" "ppca2")) | |
186 | "axu") | |
187 | ||
188 | ;; D.8.4 | |
189 | (define_insn_reservation "ppca2-fp-load" 6 | |
190 | (and (eq_attr "type" "fpload,fpload_u,fpload_ux") | |
191 | (eq_attr "cpu" "ppca2")) | |
192 | "axu") | |
193 | ||
194 | ;; D.8.5 | |
195 | (define_insn_reservation "ppca2-fp-store" 2 | |
196 | (and (eq_attr "type" "fpstore,fpstore_u,fpstore_ux") | |
197 | (eq_attr "cpu" "ppca2")) | |
198 | "axu") | |
199 | ||
200 | ;; D.8.6 | |
201 | (define_insn_reservation "ppca2-fpcompare" 5 | |
202 | (and (eq_attr "type" "fpcompare") | |
203 | (eq_attr "cpu" "ppca2")) | |
204 | "axu") | |
205 | ||
206 | ;; D.8.7 | |
207 | ;; | |
208 | ;; Instructions from the same thread succeeding the floating-point | |
209 | ;; divide cannot be executed until the floating-point divide has | |
210 | ;; completed. Since there is nothing else we can do, this thread will | |
211 | ;; just have to stall. | |
212 | ||
213 | (define_insn_reservation "ppca2-ddiv" 72 | |
214 | (and (eq_attr "type" "ddiv") | |
215 | (eq_attr "cpu" "ppca2")) | |
216 | "axu") | |
217 | ||
218 | (define_insn_reservation "ppca2-sdiv" 59 | |
219 | (and (eq_attr "type" "sdiv") | |
220 | (eq_attr "cpu" "ppca2")) | |
221 | "axu") | |
222 | ||
223 | ;; D.8.8 | |
224 | ;; | |
225 | ;; Instructions from the same thread succeeding the floating-point | |
226 | ;; divide cannot be executed until the floating-point divide has | |
227 | ;; completed. Since there is nothing else we can do, this thread will | |
228 | ;; just have to stall. | |
229 | ||
230 | (define_insn_reservation "ppca2-dsqrt" 69 | |
231 | (and (eq_attr "type" "dsqrt") | |
232 | (eq_attr "cpu" "ppca2")) | |
233 | "axu") | |
234 | ||
235 | (define_insn_reservation "ppca2-ssqrt" 65 | |
236 | (and (eq_attr "type" "ssqrt") | |
237 | (eq_attr "cpu" "ppca2")) | |
238 | "axu") |