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1c9df37c 1/* Builtin functions for rs6000/powerpc.
818ab71a 2 Copyright (C) 2009-2016 Free Software Foundation, Inc.
1c9df37c
MM		 3 Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
25
7fa14a01
MM		 26/* Before including this file, some macros must be defined:
27 RS6000_BUILTIN_1 -- 1 arg builtins
28 RS6000_BUILTIN_2 -- 2 arg builtins
29 RS6000_BUILTIN_3 -- 3 arg builtins
30 RS6000_BUILTIN_A -- ABS builtins
31 RS6000_BUILTIN_D -- DST builtins
32 RS6000_BUILTIN_E -- SPE EVSEL builtins.
0258b6e4 33 RS6000_BUILTIN_H -- HTM builtins
a5965b52 34 RS6000_BUILTIN_P -- Altivec, VSX, ISA 2.07 vector predicate builtins
7fa14a01
MM		 35 RS6000_BUILTIN_Q -- Paired floating point VSX predicate builtins
36 RS6000_BUILTIN_S -- SPE predicate builtins
37 RS6000_BUILTIN_X -- special builtins
38
39 Each of the above macros takes 4 arguments:
40 ENUM Enumeration name
41 NAME String literal for the name
42 MASK Mask of bits that indicate which options enables the builtin
43 ATTR builtin attribute information.
44 ICODE Insn code of the function that implents the builtin. */
45
46#ifndef RS6000_BUILTIN_1
47 #error "RS6000_BUILTIN_1 is not defined."
48#endif
49
50#ifndef RS6000_BUILTIN_2
51 #error "RS6000_BUILTIN_2 is not defined."
52#endif
53
54#ifndef RS6000_BUILTIN_3
55 #error "RS6000_BUILTIN_3 is not defined."
56#endif
57
58#ifndef RS6000_BUILTIN_A
59 #error "RS6000_BUILTIN_A is not defined."
60#endif
61
62#ifndef RS6000_BUILTIN_D
63 #error "RS6000_BUILTIN_D is not defined."
64#endif
65
66#ifndef RS6000_BUILTIN_E
67 #error "RS6000_BUILTIN_E is not defined."
68#endif
69
0258b6e4
PB		 70#ifndef RS6000_BUILTIN_H
71 #error "RS6000_BUILTIN_H is not defined."
72#endif
73
7fa14a01
MM		 74#ifndef RS6000_BUILTIN_P
75 #error "RS6000_BUILTIN_P is not defined."
76#endif
77
78#ifndef RS6000_BUILTIN_Q
79 #error "RS6000_BUILTIN_Q is not defined."
80#endif
81
82#ifndef RS6000_BUILTIN_S
83 #error "RS6000_BUILTIN_S is not defined."
84#endif
85
86#ifndef RS6000_BUILTIN_X
87 #error "RS6000_BUILTIN_X is not defined."
88#endif
89
90#ifndef BU_AV_1
91/* Define convenience macros using token pasting to allow fitting everything in
92 one line. */
93
94/* Altivec convenience macros. */
95#define BU_ALTIVEC_1(ENUM, NAME, ATTR, ICODE) \
96 RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
97 "__builtin_altivec_" NAME, /* NAME */ \
98 RS6000_BTM_ALTIVEC, /* MASK */ \
99 (RS6000_BTC_ ## ATTR /* ATTR */ \
100 | RS6000_BTC_UNARY), \
101 CODE_FOR_ ## ICODE) /* ICODE */
102
103#define BU_ALTIVEC_2(ENUM, NAME, ATTR, ICODE) \
104 RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
105 "__builtin_altivec_" NAME, /* NAME */ \
106 RS6000_BTM_ALTIVEC, /* MASK */ \
107 (RS6000_BTC_ ## ATTR /* ATTR */ \
108 | RS6000_BTC_BINARY), \
109 CODE_FOR_ ## ICODE) /* ICODE */
110
111#define BU_ALTIVEC_3(ENUM, NAME, ATTR, ICODE) \
112 RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
113 "__builtin_altivec_" NAME, /* NAME */ \
114 RS6000_BTM_ALTIVEC, /* MASK */ \
115 (RS6000_BTC_ ## ATTR /* ATTR */ \
116 | RS6000_BTC_TERNARY), \
117 CODE_FOR_ ## ICODE) /* ICODE */
118
119#define BU_ALTIVEC_A(ENUM, NAME, ATTR, ICODE) \
120 RS6000_BUILTIN_A (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
121 "__builtin_altivec_" NAME, /* NAME */ \
122 RS6000_BTM_ALTIVEC, /* MASK */ \
123 (RS6000_BTC_ ## ATTR /* ATTR */ \
124 | RS6000_BTC_ABS), \
125 CODE_FOR_ ## ICODE) /* ICODE */
126
127#define BU_ALTIVEC_D(ENUM, NAME, ATTR, ICODE) \
128 RS6000_BUILTIN_D (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
129 "__builtin_altivec_" NAME, /* NAME */ \
130 RS6000_BTM_ALTIVEC, /* MASK */ \
131 (RS6000_BTC_ ## ATTR /* ATTR */ \
132 | RS6000_BTC_DST), \
133 CODE_FOR_ ## ICODE) /* ICODE */
134
135#define BU_ALTIVEC_P(ENUM, NAME, ATTR, ICODE) \
136 RS6000_BUILTIN_P (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
137 "__builtin_altivec_" NAME, /* NAME */ \
138 RS6000_BTM_ALTIVEC, /* MASK */ \
139 (RS6000_BTC_ ## ATTR /* ATTR */ \
140 | RS6000_BTC_PREDICATE), \
141 CODE_FOR_ ## ICODE) /* ICODE */
142
143#define BU_ALTIVEC_X(ENUM, NAME, ATTR) \
144 RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
145 "__builtin_altivec_" NAME, /* NAME */ \
146 RS6000_BTM_ALTIVEC, /* MASK */ \
147 (RS6000_BTC_ ## ATTR /* ATTR */ \
148 | RS6000_BTC_SPECIAL), \
149 CODE_FOR_nothing) /* ICODE */
150
151#define BU_ALTIVEC_C(ENUM, NAME, ATTR) \
152 RS6000_BUILTIN_X (ALTIVEC_BUILTIN_ ## ENUM, /* ENUM */ \
153 "__builtin_altivec_" NAME, /* NAME */ \
154 (RS6000_BTM_ALTIVEC /* MASK */ \
155 | RS6000_BTM_CELL), \
156 (RS6000_BTC_ ## ATTR /* ATTR */ \
157 | RS6000_BTC_SPECIAL), \
158 CODE_FOR_nothing) /* ICODE */
159
160/* Altivec overloaded builtin function macros. */
161#define BU_ALTIVEC_OVERLOAD_1(ENUM, NAME) \
162 RS6000_BUILTIN_1 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
163 "__builtin_vec_" NAME, /* NAME */ \
164 RS6000_BTM_ALTIVEC, /* MASK */ \
165 (RS6000_BTC_OVERLOADED /* ATTR */ \
166 | RS6000_BTC_UNARY), \
167 CODE_FOR_nothing) /* ICODE */
168
169#define BU_ALTIVEC_OVERLOAD_2(ENUM, NAME) \
170 RS6000_BUILTIN_2 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
171 "__builtin_vec_" NAME, /* NAME */ \
172 RS6000_BTM_ALTIVEC, /* MASK */ \
173 (RS6000_BTC_OVERLOADED /* ATTR */ \
174 | RS6000_BTC_BINARY), \
175 CODE_FOR_nothing) /* ICODE */
176
177#define BU_ALTIVEC_OVERLOAD_3(ENUM, NAME) \
178 RS6000_BUILTIN_3 (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
179 "__builtin_vec_" NAME, /* NAME */ \
180 RS6000_BTM_ALTIVEC, /* MASK */ \
181 (RS6000_BTC_OVERLOADED /* ATTR */ \
182 | RS6000_BTC_TERNARY), \
183 CODE_FOR_nothing) /* ICODE */
184
185#define BU_ALTIVEC_OVERLOAD_A(ENUM, NAME) \
186 RS6000_BUILTIN_A (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
187 "__builtin_vec_" NAME, /* NAME */ \
188 RS6000_BTM_ALTIVEC, /* MASK */ \
189 (RS6000_BTC_OVERLOADED /* ATTR */ \
190 | RS6000_BTC_ABS), \
191 CODE_FOR_nothing) /* ICODE */
192
193#define BU_ALTIVEC_OVERLOAD_D(ENUM, NAME) \
194 RS6000_BUILTIN_D (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
195 "__builtin_vec_" NAME, /* NAME */ \
196 RS6000_BTM_ALTIVEC, /* MASK */ \
197 (RS6000_BTC_OVERLOADED /* ATTR */ \
198 | RS6000_BTC_DST), \
199 CODE_FOR_nothing) /* ICODE */
200
201#define BU_ALTIVEC_OVERLOAD_P(ENUM, NAME) \
202 RS6000_BUILTIN_P (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
203 "__builtin_vec_" NAME, /* NAME */ \
204 RS6000_BTM_ALTIVEC, /* MASK */ \
205 (RS6000_BTC_OVERLOADED /* ATTR */ \
206 | RS6000_BTC_PREDICATE), \
207 CODE_FOR_nothing) /* ICODE */
208
209#define BU_ALTIVEC_OVERLOAD_X(ENUM, NAME) \
210 RS6000_BUILTIN_X (ALTIVEC_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
211 "__builtin_vec_" NAME, /* NAME */ \
212 RS6000_BTM_ALTIVEC, /* MASK */ \
213 (RS6000_BTC_OVERLOADED /* ATTR */ \
214 | RS6000_BTC_SPECIAL), \
215 CODE_FOR_nothing) /* ICODE */
216
217/* VSX convenience macros. */
218#define BU_VSX_1(ENUM, NAME, ATTR, ICODE) \
219 RS6000_BUILTIN_1 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
220 "__builtin_vsx_" NAME, /* NAME */ \
221 RS6000_BTM_VSX, /* MASK */ \
222 (RS6000_BTC_ ## ATTR /* ATTR */ \
223 | RS6000_BTC_UNARY), \
224 CODE_FOR_ ## ICODE) /* ICODE */
225
226#define BU_VSX_2(ENUM, NAME, ATTR, ICODE) \
227 RS6000_BUILTIN_2 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
228 "__builtin_vsx_" NAME, /* NAME */ \
229 RS6000_BTM_VSX, /* MASK */ \
230 (RS6000_BTC_ ## ATTR /* ATTR */ \
231 | RS6000_BTC_BINARY), \
232 CODE_FOR_ ## ICODE) /* ICODE */
233
234#define BU_VSX_3(ENUM, NAME, ATTR, ICODE) \
235 RS6000_BUILTIN_3 (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
236 "__builtin_vsx_" NAME, /* NAME */ \
237 RS6000_BTM_VSX, /* MASK */ \
238 (RS6000_BTC_ ## ATTR /* ATTR */ \
239 | RS6000_BTC_TERNARY), \
240 CODE_FOR_ ## ICODE) /* ICODE */
241
242#define BU_VSX_A(ENUM, NAME, ATTR, ICODE) \
243 RS6000_BUILTIN_A (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
244 "__builtin_vsx_" NAME, /* NAME */ \
245 RS6000_BTM_VSX, /* MASK */ \
246 (RS6000_BTC_ ## ATTR /* ATTR */ \
247 | RS6000_BTC_ABS), \
248 CODE_FOR_ ## ICODE) /* ICODE */
249
250#define BU_VSX_P(ENUM, NAME, ATTR, ICODE) \
251 RS6000_BUILTIN_P (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
252 "__builtin_vsx_" NAME, /* NAME */ \
253 RS6000_BTM_VSX, /* MASK */ \
254 (RS6000_BTC_ ## ATTR /* ATTR */ \
255 | RS6000_BTC_PREDICATE), \
256 CODE_FOR_ ## ICODE) /* ICODE */
257
258#define BU_VSX_X(ENUM, NAME, ATTR) \
259 RS6000_BUILTIN_X (VSX_BUILTIN_ ## ENUM, /* ENUM */ \
260 "__builtin_vsx_" NAME, /* NAME */ \
261 RS6000_BTM_VSX, /* MASK */ \
262 (RS6000_BTC_ ## ATTR /* ATTR */ \
263 | RS6000_BTC_SPECIAL), \
264 CODE_FOR_nothing) /* ICODE */
265
266/* VSX overloaded builtin function macros. */
267#define BU_VSX_OVERLOAD_1(ENUM, NAME) \
268 RS6000_BUILTIN_1 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
269 "__builtin_vec_" NAME, /* NAME */ \
270 RS6000_BTM_VSX, /* MASK */ \
271 (RS6000_BTC_OVERLOADED /* ATTR */ \
272 | RS6000_BTC_UNARY), \
273 CODE_FOR_nothing) /* ICODE */
274
275#define BU_VSX_OVERLOAD_2(ENUM, NAME) \
276 RS6000_BUILTIN_2 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
277 "__builtin_vec_" NAME, /* NAME */ \
278 RS6000_BTM_VSX, /* MASK */ \
279 (RS6000_BTC_OVERLOADED /* ATTR */ \
280 | RS6000_BTC_BINARY), \
281 CODE_FOR_nothing) /* ICODE */
282
283#define BU_VSX_OVERLOAD_3(ENUM, NAME) \
284 RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
285 "__builtin_vec_" NAME, /* NAME */ \
286 RS6000_BTM_VSX, /* MASK */ \
287 (RS6000_BTC_OVERLOADED /* ATTR */ \
288 | RS6000_BTC_TERNARY), \
289 CODE_FOR_nothing) /* ICODE */
290
291/* xxpermdi and xxsldwi are overloaded functions, but had __builtin_vsx names
292 instead of __builtin_vec. */
293#define BU_VSX_OVERLOAD_3V(ENUM, NAME) \
294 RS6000_BUILTIN_3 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
295 "__builtin_vsx_" NAME, /* NAME */ \
296 RS6000_BTM_VSX, /* MASK */ \
297 (RS6000_BTC_OVERLOADED /* ATTR */ \
298 | RS6000_BTC_TERNARY), \
299 CODE_FOR_nothing) /* ICODE */
300
301#define BU_VSX_OVERLOAD_X(ENUM, NAME) \
302 RS6000_BUILTIN_X (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
303 "__builtin_vec_" NAME, /* NAME */ \
304 RS6000_BTM_VSX, /* MASK */ \
305 (RS6000_BTC_OVERLOADED /* ATTR */ \
306 | RS6000_BTC_SPECIAL), \
307 CODE_FOR_nothing) /* ICODE */
308
a5965b52 309/* ISA 2.07 (power8) vector convenience macros. */
f62511da
MM		 310/* For the instructions that are encoded as altivec instructions use
311 __builtin_altivec_ as the builtin name. */
312#define BU_P8V_AV_1(ENUM, NAME, ATTR, ICODE) \
313 RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \
314 "__builtin_altivec_" NAME, /* NAME */ \
315 RS6000_BTM_P8_VECTOR, /* MASK */ \
316 (RS6000_BTC_ ## ATTR /* ATTR */ \
317 | RS6000_BTC_UNARY), \
318 CODE_FOR_ ## ICODE) /* ICODE */
319
320#define BU_P8V_AV_2(ENUM, NAME, ATTR, ICODE) \
321 RS6000_BUILTIN_2 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \
322 "__builtin_altivec_" NAME, /* NAME */ \
323 RS6000_BTM_P8_VECTOR, /* MASK */ \
324 (RS6000_BTC_ ## ATTR /* ATTR */ \
325 | RS6000_BTC_BINARY), \
326 CODE_FOR_ ## ICODE) /* ICODE */
327
a16a872d
MM		 328#define BU_P8V_AV_3(ENUM, NAME, ATTR, ICODE) \
329 RS6000_BUILTIN_3 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \
330 "__builtin_altivec_" NAME, /* NAME */ \
331 RS6000_BTM_P8_VECTOR, /* MASK */ \
332 (RS6000_BTC_ ## ATTR /* ATTR */ \
333 | RS6000_BTC_TERNARY), \
334 CODE_FOR_ ## ICODE) /* ICODE */
335
f62511da
MM		 336#define BU_P8V_AV_P(ENUM, NAME, ATTR, ICODE) \
337 RS6000_BUILTIN_P (P8V_BUILTIN_ ## ENUM, /* ENUM */ \
338 "__builtin_altivec_" NAME, /* NAME */ \
339 RS6000_BTM_P8_VECTOR, /* MASK */ \
340 (RS6000_BTC_ ## ATTR /* ATTR */ \
341 | RS6000_BTC_PREDICATE), \
342 CODE_FOR_ ## ICODE) /* ICODE */
343
344/* For the instructions encoded as VSX instructions use __builtin_vsx as the
345 builtin name. */
346#define BU_P8V_VSX_1(ENUM, NAME, ATTR, ICODE) \
347 RS6000_BUILTIN_1 (P8V_BUILTIN_ ## ENUM, /* ENUM */ \
348 "__builtin_vsx_" NAME, /* NAME */ \
349 RS6000_BTM_P8_VECTOR, /* MASK */ \
350 (RS6000_BTC_ ## ATTR /* ATTR */ \
351 | RS6000_BTC_UNARY), \
352 CODE_FOR_ ## ICODE) /* ICODE */
353
354#define BU_P8V_OVERLOAD_1(ENUM, NAME) \
355 RS6000_BUILTIN_1 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
356 "__builtin_vec_" NAME, /* NAME */ \
357 RS6000_BTM_P8_VECTOR, /* MASK */ \
358 (RS6000_BTC_OVERLOADED /* ATTR */ \
359 | RS6000_BTC_UNARY), \
360 CODE_FOR_nothing) /* ICODE */
361
362#define BU_P8V_OVERLOAD_2(ENUM, NAME) \
363 RS6000_BUILTIN_2 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
364 "__builtin_vec_" NAME, /* NAME */ \
365 RS6000_BTM_P8_VECTOR, /* MASK */ \
366 (RS6000_BTC_OVERLOADED /* ATTR */ \
367 | RS6000_BTC_BINARY), \
368 CODE_FOR_nothing) /* ICODE */
369
a16a872d
MM		 370#define BU_P8V_OVERLOAD_3(ENUM, NAME) \
371 RS6000_BUILTIN_3 (P8V_BUILTIN_VEC_ ## ENUM, /* ENUM */ \
372 "__builtin_vec_" NAME, /* NAME */ \
373 RS6000_BTM_P8_VECTOR, /* MASK */ \
374 (RS6000_BTC_OVERLOADED /* ATTR */ \
375 | RS6000_BTC_TERNARY), \
376 CODE_FOR_nothing) /* ICODE */
377
f62511da
MM		 378/* Crypto convenience macros. */
379#define BU_CRYPTO_1(ENUM, NAME, ATTR, ICODE) \
380 RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
381 "__builtin_crypto_" NAME, /* NAME */ \
382 RS6000_BTM_CRYPTO, /* MASK */ \
383 (RS6000_BTC_ ## ATTR /* ATTR */ \
384 | RS6000_BTC_UNARY), \
385 CODE_FOR_ ## ICODE) /* ICODE */
386
387#define BU_CRYPTO_2(ENUM, NAME, ATTR, ICODE) \
388 RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
389 "__builtin_crypto_" NAME, /* NAME */ \
390 RS6000_BTM_CRYPTO, /* MASK */ \
391 (RS6000_BTC_ ## ATTR /* ATTR */ \
392 | RS6000_BTC_BINARY), \
393 CODE_FOR_ ## ICODE) /* ICODE */
394
6895fffb
BS		 395#define BU_CRYPTO_2A(ENUM, NAME, ATTR, ICODE) \
396 RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
397 "__builtin_crypto_" NAME, /* NAME */ \
398 RS6000_BTM_P8_VECTOR, /* MASK */ \
399 (RS6000_BTC_ ## ATTR /* ATTR */ \
400 | RS6000_BTC_BINARY), \
401 CODE_FOR_ ## ICODE) /* ICODE */
402
f62511da
MM		 403#define BU_CRYPTO_3(ENUM, NAME, ATTR, ICODE) \
404 RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
405 "__builtin_crypto_" NAME, /* NAME */ \
406 RS6000_BTM_CRYPTO, /* MASK */ \
407 (RS6000_BTC_ ## ATTR /* ATTR */ \
408 | RS6000_BTC_TERNARY), \
409 CODE_FOR_ ## ICODE) /* ICODE */
410
6895fffb
BS		 411#define BU_CRYPTO_3A(ENUM, NAME, ATTR, ICODE) \
412 RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
413 "__builtin_crypto_" NAME, /* NAME */ \
414 RS6000_BTM_P8_VECTOR, /* MASK */ \
415 (RS6000_BTC_ ## ATTR /* ATTR */ \
416 | RS6000_BTC_TERNARY), \
417 CODE_FOR_ ## ICODE) /* ICODE */
418
f62511da
MM		 419#define BU_CRYPTO_OVERLOAD_1(ENUM, NAME) \
420 RS6000_BUILTIN_1 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
421 "__builtin_crypto_" NAME, /* NAME */ \
422 RS6000_BTM_CRYPTO, /* MASK */ \
423 (RS6000_BTC_OVERLOADED /* ATTR */ \
424 | RS6000_BTC_UNARY), \
425 CODE_FOR_nothing) /* ICODE */
426
6895fffb 427#define BU_CRYPTO_OVERLOAD_2A(ENUM, NAME) \
f62511da
MM		 428 RS6000_BUILTIN_2 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
429 "__builtin_crypto_" NAME, /* NAME */ \
6895fffb 430 RS6000_BTM_P8_VECTOR, /* MASK */ \
f62511da
MM		 431 (RS6000_BTC_OVERLOADED /* ATTR */ \
432 | RS6000_BTC_BINARY), \
433 CODE_FOR_nothing) /* ICODE */
434
435#define BU_CRYPTO_OVERLOAD_3(ENUM, NAME) \
436 RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
437 "__builtin_crypto_" NAME, /* NAME */ \
438 RS6000_BTM_CRYPTO, /* MASK */ \
439 (RS6000_BTC_OVERLOADED /* ATTR */ \
440 | RS6000_BTC_TERNARY), \
441 CODE_FOR_nothing) /* ICODE */
442
6895fffb
BS		 443#define BU_CRYPTO_OVERLOAD_3A(ENUM, NAME) \
444 RS6000_BUILTIN_3 (CRYPTO_BUILTIN_ ## ENUM, /* ENUM */ \
445 "__builtin_crypto_" NAME, /* NAME */ \
446 RS6000_BTM_P8_VECTOR, /* MASK */ \
447 (RS6000_BTC_OVERLOADED /* ATTR */ \
448 | RS6000_BTC_TERNARY), \
449 CODE_FOR_nothing) /* ICODE */
450
0258b6e4
PB		 451/* HTM convenience macros. */
452#define BU_HTM_0(ENUM, NAME, ATTR, ICODE) \
453 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
454 "__builtin_" NAME, /* NAME */ \
455 RS6000_BTM_HTM, /* MASK */ \
456 RS6000_BTC_ ## ATTR, /* ATTR */ \
457 CODE_FOR_ ## ICODE) /* ICODE */
458
459#define BU_HTM_1(ENUM, NAME, ATTR, ICODE) \
460 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
461 "__builtin_" NAME, /* NAME */ \
462 RS6000_BTM_HTM, /* MASK */ \
463 (RS6000_BTC_ ## ATTR /* ATTR */ \
464 | RS6000_BTC_UNARY), \
465 CODE_FOR_ ## ICODE) /* ICODE */
466
467#define BU_HTM_2(ENUM, NAME, ATTR, ICODE) \
468 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
469 "__builtin_" NAME, /* NAME */ \
470 RS6000_BTM_HTM, /* MASK */ \
471 (RS6000_BTC_ ## ATTR /* ATTR */ \
472 | RS6000_BTC_BINARY), \
473 CODE_FOR_ ## ICODE) /* ICODE */
474
475#define BU_HTM_3(ENUM, NAME, ATTR, ICODE) \
476 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
477 "__builtin_" NAME, /* NAME */ \
478 RS6000_BTM_HTM, /* MASK */ \
479 (RS6000_BTC_ ## ATTR /* ATTR */ \
480 | RS6000_BTC_TERNARY), \
481 CODE_FOR_ ## ICODE) /* ICODE */
482
01f61a78 483#define BU_HTM_V1(ENUM, NAME, ATTR, ICODE) \
0258b6e4
PB		 484 RS6000_BUILTIN_H (HTM_BUILTIN_ ## ENUM, /* ENUM */ \
485 "__builtin_" NAME, /* NAME */ \
486 RS6000_BTM_HTM, /* MASK */ \
487 (RS6000_BTC_ ## ATTR /* ATTR */ \
488 | RS6000_BTC_UNARY \
0258b6e4
PB		 489 | RS6000_BTC_VOID), \
490 CODE_FOR_ ## ICODE) /* ICODE */
491
7fa14a01
MM		 492/* SPE convenience macros. */
493#define BU_SPE_1(ENUM, NAME, ATTR, ICODE) \
494 RS6000_BUILTIN_1 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
495 "__builtin_spe_" NAME, /* NAME */ \
496 RS6000_BTM_SPE, /* MASK */ \
497 (RS6000_BTC_ ## ATTR /* ATTR */ \
498 | RS6000_BTC_UNARY), \
499 CODE_FOR_ ## ICODE) /* ICODE */
500
501#define BU_SPE_2(ENUM, NAME, ATTR, ICODE) \
502 RS6000_BUILTIN_2 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
503 "__builtin_spe_" NAME, /* NAME */ \
504 RS6000_BTM_SPE, /* MASK */ \
505 (RS6000_BTC_ ## ATTR /* ATTR */ \
506 | RS6000_BTC_BINARY), \
507 CODE_FOR_ ## ICODE) /* ICODE */
508
509#define BU_SPE_3(ENUM, NAME, ATTR, ICODE) \
510 RS6000_BUILTIN_3 (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
511 "__builtin_spe_" NAME, /* NAME */ \
512 RS6000_BTM_SPE, /* MASK */ \
513 (RS6000_BTC_ ## ATTR /* ATTR */ \
514 | RS6000_BTC_TERNARY), \
515 CODE_FOR_ ## ICODE) /* ICODE */
516
517#define BU_SPE_E(ENUM, NAME, ATTR, ICODE) \
518 RS6000_BUILTIN_E (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
519 "__builtin_spe_" NAME, /* NAME */ \
520 RS6000_BTM_SPE, /* MASK */ \
521 (RS6000_BTC_ ## ATTR /* ATTR */ \
522 | RS6000_BTC_EVSEL), \
523 CODE_FOR_ ## ICODE) /* ICODE */
524
525#define BU_SPE_P(ENUM, NAME, ATTR, ICODE) \
526 RS6000_BUILTIN_S (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
527 "__builtin_spe_" NAME, /* NAME */ \
528 RS6000_BTM_SPE, /* MASK */ \
529 (RS6000_BTC_ ## ATTR /* ATTR */ \
530 | RS6000_BTC_PREDICATE), \
531 CODE_FOR_ ## ICODE) /* ICODE */
532
533#define BU_SPE_X(ENUM, NAME, ATTR) \
534 RS6000_BUILTIN_X (SPE_BUILTIN_ ## ENUM, /* ENUM */ \
535 "__builtin_spe_" NAME, /* NAME */ \
536 RS6000_BTM_SPE, /* MASK */ \
537 (RS6000_BTC_ ## ATTR /* ATTR */ \
538 | RS6000_BTC_SPECIAL), \
539 CODE_FOR_nothing) /* ICODE */
540
541/* Paired floating point convenience macros. */
542#define BU_PAIRED_1(ENUM, NAME, ATTR, ICODE) \
543 RS6000_BUILTIN_1 (PAIRED_BUILTIN_ ## ENUM, /* ENUM */ \
544 "__builtin_paired_" NAME, /* NAME */ \
545 RS6000_BTM_PAIRED, /* MASK */ \
546 (RS6000_BTC_ ## ATTR /* ATTR */ \
547 | RS6000_BTC_UNARY), \
548 CODE_FOR_ ## ICODE) /* ICODE */
549
550#define BU_PAIRED_2(ENUM, NAME, ATTR, ICODE) \
551 RS6000_BUILTIN_2 (PAIRED_BUILTIN_ ## ENUM, /* ENUM */ \
552 "__builtin_paired_" NAME, /* NAME */ \
553 RS6000_BTM_PAIRED, /* MASK */ \
554 (RS6000_BTC_ ## ATTR /* ATTR */ \
555 | RS6000_BTC_BINARY), \
556 CODE_FOR_ ## ICODE) /* ICODE */
557
558#define BU_PAIRED_3(ENUM, NAME, ATTR, ICODE) \
559 RS6000_BUILTIN_3 (PAIRED_BUILTIN_ ## ENUM, /* ENUM */ \
560 "__builtin_paired_" NAME, /* NAME */ \
561 RS6000_BTM_PAIRED, /* MASK */ \
562 (RS6000_BTC_ ## ATTR /* ATTR */ \
563 | RS6000_BTC_TERNARY), \
564 CODE_FOR_ ## ICODE) /* ICODE */
565
566#define BU_PAIRED_P(ENUM, NAME, ATTR, ICODE) \
567 RS6000_BUILTIN_Q (PAIRED_BUILTIN_ ## ENUM, /* ENUM */ \
568 "__builtin_paired_" NAME, /* NAME */ \
569 RS6000_BTM_PAIRED, /* MASK */ \
570 (RS6000_BTC_ ## ATTR /* ATTR */ \
571 | RS6000_BTC_PREDICATE), \
572 CODE_FOR_ ## ICODE) /* ICODE */
573
574#define BU_PAIRED_X(ENUM, NAME, ATTR) \
575 RS6000_BUILTIN_X (PAIRED_BUILTIN_ ## ENUM, /* ENUM */ \
576 "__builtin_paired_" NAME, /* NAME */ \
577 RS6000_BTM_PAIRED, /* MASK */ \
578 (RS6000_BTC_ ## ATTR /* ATTR */ \
579 | RS6000_BTC_SPECIAL), \
580 CODE_FOR_nothing) /* ICODE */
581
582#define BU_SPECIAL_X(ENUM, NAME, MASK, ATTR) \
583 RS6000_BUILTIN_X (ENUM, /* ENUM */ \
584 NAME, /* NAME */ \
585 MASK, /* MASK */ \
586 (ATTR | RS6000_BTC_SPECIAL), /* ATTR */ \
587 CODE_FOR_nothing) /* ICODE */
06b39289
MM		 588
589
590/* Decimal floating point builtins for instructions. */
591#define BU_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \
592 RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
593 "__builtin_" NAME, /* NAME */ \
594 RS6000_BTM_DFP, /* MASK */ \
595 (RS6000_BTC_ ## ATTR /* ATTR */ \
596 | RS6000_BTC_UNARY), \
597 CODE_FOR_ ## ICODE) /* ICODE */
598
599#define BU_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \
600 RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
601 "__builtin_" NAME, /* NAME */ \
602 RS6000_BTM_DFP, /* MASK */ \
603 (RS6000_BTC_ ## ATTR /* ATTR */ \
604 | RS6000_BTC_BINARY), \
605 CODE_FOR_ ## ICODE) /* ICODE */
606
607
608/* Miscellaneous builtins for instructions added in ISA 2.06. These
609 instructions don't require either the DFP or VSX options, just the basic ISA
610 2.06 (popcntd) enablement since they operate on general purpose
611 registers. */
612#define BU_P7_MISC_1(ENUM, NAME, ATTR, ICODE) \
613 RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
614 "__builtin_" NAME, /* NAME */ \
615 RS6000_BTM_POPCNTD, /* MASK */ \
616 (RS6000_BTC_ ## ATTR /* ATTR */ \
617 | RS6000_BTC_UNARY), \
618 CODE_FOR_ ## ICODE) /* ICODE */
619
620#define BU_P7_MISC_2(ENUM, NAME, ATTR, ICODE) \
621 RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
622 "__builtin_" NAME, /* NAME */ \
623 RS6000_BTM_POPCNTD, /* MASK */ \
624 (RS6000_BTC_ ## ATTR /* ATTR */ \
625 | RS6000_BTC_BINARY), \
626 CODE_FOR_ ## ICODE) /* ICODE */
627
628
629/* Miscellaneous builtins for instructions added in ISA 2.07. These
630 instructions do require the ISA 2.07 vector support, but they aren't vector
631 instructions. */
632#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE) \
633 RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
634 "__builtin_" NAME, /* NAME */ \
635 RS6000_BTM_P8_VECTOR, /* MASK */ \
636 (RS6000_BTC_ ## ATTR /* ATTR */ \
637 | RS6000_BTC_TERNARY), \
638 CODE_FOR_ ## ICODE) /* ICODE */
639
8241efd1
PB		 640/* 128-bit long double floating point builtins. */
641#define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE) \
06b39289
MM		 642 RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
643 "__builtin_" NAME, /* NAME */ \
8241efd1
PB		 644 (RS6000_BTM_HARD_FLOAT /* MASK */ \
645 | RS6000_BTM_LDBL128), \
06b39289
MM		 646 (RS6000_BTC_ ## ATTR /* ATTR */ \
647 | RS6000_BTC_BINARY), \
648 CODE_FOR_ ## ICODE) /* ICODE */
649
7fa14a01
MM		 650#endif
651
652/* Insure 0 is not a legitimate index. */
653BU_SPECIAL_X (RS6000_BUILTIN_NONE, NULL, 0, RS6000_BTC_MISC)
654
655/* 3 argument Altivec builtins. */
656BU_ALTIVEC_3 (VMADDFP, "vmaddfp", FP, fmav4sf4)
657BU_ALTIVEC_3 (VMHADDSHS, "vmhaddshs", SAT, altivec_vmhaddshs)
658BU_ALTIVEC_3 (VMHRADDSHS, "vmhraddshs", SAT, altivec_vmhraddshs)
659BU_ALTIVEC_3 (VMLADDUHM, "vmladduhm", CONST, altivec_vmladduhm)
660BU_ALTIVEC_3 (VMSUMUBM, "vmsumubm", CONST, altivec_vmsumubm)
661BU_ALTIVEC_3 (VMSUMMBM, "vmsummbm", CONST, altivec_vmsummbm)
662BU_ALTIVEC_3 (VMSUMUHM, "vmsumuhm", CONST, altivec_vmsumuhm)
663BU_ALTIVEC_3 (VMSUMSHM, "vmsumshm", CONST, altivec_vmsumshm)
664BU_ALTIVEC_3 (VMSUMUHS, "vmsumuhs", SAT, altivec_vmsumuhs)
665BU_ALTIVEC_3 (VMSUMSHS, "vmsumshs", SAT, altivec_vmsumshs)
666BU_ALTIVEC_3 (VNMSUBFP, "vnmsubfp", FP, nfmsv4sf4)
a16a872d 667BU_ALTIVEC_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)
7fa14a01
MM		 668BU_ALTIVEC_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)
669BU_ALTIVEC_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)
670BU_ALTIVEC_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)
671BU_ALTIVEC_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)
672BU_ALTIVEC_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)
673BU_ALTIVEC_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi_uns)
a16a872d 674BU_ALTIVEC_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)
7fa14a01
MM		 675BU_ALTIVEC_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)
676BU_ALTIVEC_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)
677BU_ALTIVEC_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)
678BU_ALTIVEC_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns)
679BU_ALTIVEC_3 (VSEL_4SF, "vsel_4sf", CONST, vector_select_v4sf)
680BU_ALTIVEC_3 (VSEL_4SI, "vsel_4si", CONST, vector_select_v4si)
681BU_ALTIVEC_3 (VSEL_8HI, "vsel_8hi", CONST, vector_select_v8hi)
682BU_ALTIVEC_3 (VSEL_16QI, "vsel_16qi", CONST, vector_select_v16qi)
683BU_ALTIVEC_3 (VSEL_2DF, "vsel_2df", CONST, vector_select_v2df)
684BU_ALTIVEC_3 (VSEL_2DI, "vsel_2di", CONST, vector_select_v2di)
a16a872d 685BU_ALTIVEC_3 (VSEL_1TI, "vsel_1ti", CONST, vector_select_v1ti)
7fa14a01
MM		 686BU_ALTIVEC_3 (VSEL_4SI_UNS, "vsel_4si_uns", CONST, vector_select_v4si_uns)
687BU_ALTIVEC_3 (VSEL_8HI_UNS, "vsel_8hi_uns", CONST, vector_select_v8hi_uns)
688BU_ALTIVEC_3 (VSEL_16QI_UNS, "vsel_16qi_uns", CONST, vector_select_v16qi_uns)
689BU_ALTIVEC_3 (VSEL_2DI_UNS, "vsel_2di_uns", CONST, vector_select_v2di_uns)
a16a872d 690BU_ALTIVEC_3 (VSEL_1TI_UNS, "vsel_1ti_uns", CONST, vector_select_v1ti_uns)
7fa14a01
MM		 691BU_ALTIVEC_3 (VSLDOI_16QI, "vsldoi_16qi", CONST, altivec_vsldoi_v16qi)
692BU_ALTIVEC_3 (VSLDOI_8HI, "vsldoi_8hi", CONST, altivec_vsldoi_v8hi)
693BU_ALTIVEC_3 (VSLDOI_4SI, "vsldoi_4si", CONST, altivec_vsldoi_v4si)
694BU_ALTIVEC_3 (VSLDOI_4SF, "vsldoi_4sf", CONST, altivec_vsldoi_v4sf)
695
696/* Altivec DST builtins. */
697BU_ALTIVEC_D (DST, "dst", MISC, altivec_dst)
698BU_ALTIVEC_D (DSTT, "dstt", MISC, altivec_dstt)
699BU_ALTIVEC_D (DSTST, "dstst", MISC, altivec_dstst)
700BU_ALTIVEC_D (DSTSTT, "dststt", MISC, altivec_dststt)
701
702/* Altivec 2 argument builtin functions. */
703BU_ALTIVEC_2 (VADDUBM, "vaddubm", CONST, addv16qi3)
704BU_ALTIVEC_2 (VADDUHM, "vadduhm", CONST, addv8hi3)
705BU_ALTIVEC_2 (VADDUWM, "vadduwm", CONST, addv4si3)
706BU_ALTIVEC_2 (VADDFP, "vaddfp", CONST, addv4sf3)
707BU_ALTIVEC_2 (VADDCUW, "vaddcuw", CONST, altivec_vaddcuw)
708BU_ALTIVEC_2 (VADDUBS, "vaddubs", CONST, altivec_vaddubs)
709BU_ALTIVEC_2 (VADDSBS, "vaddsbs", CONST, altivec_vaddsbs)
710BU_ALTIVEC_2 (VADDUHS, "vadduhs", CONST, altivec_vadduhs)
711BU_ALTIVEC_2 (VADDSHS, "vaddshs", CONST, altivec_vaddshs)
712BU_ALTIVEC_2 (VADDUWS, "vadduws", CONST, altivec_vadduws)
713BU_ALTIVEC_2 (VADDSWS, "vaddsws", CONST, altivec_vaddsws)
714BU_ALTIVEC_2 (VAND, "vand", CONST, andv4si3)
715BU_ALTIVEC_2 (VANDC, "vandc", CONST, andcv4si3)
716BU_ALTIVEC_2 (VAVGUB, "vavgub", CONST, altivec_vavgub)
717BU_ALTIVEC_2 (VAVGSB, "vavgsb", CONST, altivec_vavgsb)
718BU_ALTIVEC_2 (VAVGUH, "vavguh", CONST, altivec_vavguh)
719BU_ALTIVEC_2 (VAVGSH, "vavgsh", CONST, altivec_vavgsh)
720BU_ALTIVEC_2 (VAVGUW, "vavguw", CONST, altivec_vavguw)
721BU_ALTIVEC_2 (VAVGSW, "vavgsw", CONST, altivec_vavgsw)
722BU_ALTIVEC_2 (VCFUX, "vcfux", CONST, altivec_vcfux)
723BU_ALTIVEC_2 (VCFSX, "vcfsx", CONST, altivec_vcfsx)
724BU_ALTIVEC_2 (VCMPBFP, "vcmpbfp", CONST, altivec_vcmpbfp)
725BU_ALTIVEC_2 (VCMPEQUB, "vcmpequb", CONST, vector_eqv16qi)
726BU_ALTIVEC_2 (VCMPEQUH, "vcmpequh", CONST, vector_eqv8hi)
727BU_ALTIVEC_2 (VCMPEQUW, "vcmpequw", CONST, vector_eqv4si)
728BU_ALTIVEC_2 (VCMPEQFP, "vcmpeqfp", CONST, vector_eqv4sf)
729BU_ALTIVEC_2 (VCMPGEFP, "vcmpgefp", CONST, vector_gev4sf)
730BU_ALTIVEC_2 (VCMPGTUB, "vcmpgtub", CONST, vector_gtuv16qi)
731BU_ALTIVEC_2 (VCMPGTSB, "vcmpgtsb", CONST, vector_gtv16qi)
732BU_ALTIVEC_2 (VCMPGTUH, "vcmpgtuh", CONST, vector_gtuv8hi)
733BU_ALTIVEC_2 (VCMPGTSH, "vcmpgtsh", CONST, vector_gtv8hi)
734BU_ALTIVEC_2 (VCMPGTUW, "vcmpgtuw", CONST, vector_gtuv4si)
735BU_ALTIVEC_2 (VCMPGTSW, "vcmpgtsw", CONST, vector_gtv4si)
736BU_ALTIVEC_2 (VCMPGTFP, "vcmpgtfp", CONST, vector_gtv4sf)
737BU_ALTIVEC_2 (VCTSXS, "vctsxs", CONST, altivec_vctsxs)
738BU_ALTIVEC_2 (VCTUXS, "vctuxs", CONST, altivec_vctuxs)
739BU_ALTIVEC_2 (VMAXUB, "vmaxub", CONST, umaxv16qi3)
740BU_ALTIVEC_2 (VMAXSB, "vmaxsb", CONST, smaxv16qi3)
741BU_ALTIVEC_2 (VMAXUH, "vmaxuh", CONST, umaxv8hi3)
742BU_ALTIVEC_2 (VMAXSH, "vmaxsh", CONST, smaxv8hi3)
743BU_ALTIVEC_2 (VMAXUW, "vmaxuw", CONST, umaxv4si3)
744BU_ALTIVEC_2 (VMAXSW, "vmaxsw", CONST, smaxv4si3)
745BU_ALTIVEC_2 (VMAXFP, "vmaxfp", CONST, smaxv4sf3)
746BU_ALTIVEC_2 (VMRGHB, "vmrghb", CONST, altivec_vmrghb)
747BU_ALTIVEC_2 (VMRGHH, "vmrghh", CONST, altivec_vmrghh)
748BU_ALTIVEC_2 (VMRGHW, "vmrghw", CONST, altivec_vmrghw)
749BU_ALTIVEC_2 (VMRGLB, "vmrglb", CONST, altivec_vmrglb)
750BU_ALTIVEC_2 (VMRGLH, "vmrglh", CONST, altivec_vmrglh)
751BU_ALTIVEC_2 (VMRGLW, "vmrglw", CONST, altivec_vmrglw)
752BU_ALTIVEC_2 (VMINUB, "vminub", CONST, uminv16qi3)
753BU_ALTIVEC_2 (VMINSB, "vminsb", CONST, sminv16qi3)
754BU_ALTIVEC_2 (VMINUH, "vminuh", CONST, uminv8hi3)
755BU_ALTIVEC_2 (VMINSH, "vminsh", CONST, sminv8hi3)
756BU_ALTIVEC_2 (VMINUW, "vminuw", CONST, uminv4si3)
757BU_ALTIVEC_2 (VMINSW, "vminsw", CONST, sminv4si3)
758BU_ALTIVEC_2 (VMINFP, "vminfp", CONST, sminv4sf3)
2371eaec
RH		 759BU_ALTIVEC_2 (VMULEUB, "vmuleub", CONST, vec_widen_umult_even_v16qi)
760BU_ALTIVEC_2 (VMULEUB_UNS, "vmuleub_uns", CONST, vec_widen_umult_even_v16qi)
761BU_ALTIVEC_2 (VMULESB, "vmulesb", CONST, vec_widen_smult_even_v16qi)
762BU_ALTIVEC_2 (VMULEUH, "vmuleuh", CONST, vec_widen_umult_even_v8hi)
763BU_ALTIVEC_2 (VMULEUH_UNS, "vmuleuh_uns", CONST, vec_widen_umult_even_v8hi)
764BU_ALTIVEC_2 (VMULESH, "vmulesh", CONST, vec_widen_smult_even_v8hi)
765BU_ALTIVEC_2 (VMULOUB, "vmuloub", CONST, vec_widen_umult_odd_v16qi)
766BU_ALTIVEC_2 (VMULOUB_UNS, "vmuloub_uns", CONST, vec_widen_umult_odd_v16qi)
767BU_ALTIVEC_2 (VMULOSB, "vmulosb", CONST, vec_widen_smult_odd_v16qi)
768BU_ALTIVEC_2 (VMULOUH, "vmulouh", CONST, vec_widen_umult_odd_v8hi)
769BU_ALTIVEC_2 (VMULOUH_UNS, "vmulouh_uns", CONST, vec_widen_umult_odd_v8hi)
770BU_ALTIVEC_2 (VMULOSH, "vmulosh", CONST, vec_widen_smult_odd_v8hi)
7fa14a01
MM		 771BU_ALTIVEC_2 (VNOR, "vnor", CONST, norv4si3)
772BU_ALTIVEC_2 (VOR, "vor", CONST, iorv4si3)
773BU_ALTIVEC_2 (VPKUHUM, "vpkuhum", CONST, altivec_vpkuhum)
774BU_ALTIVEC_2 (VPKUWUM, "vpkuwum", CONST, altivec_vpkuwum)
775BU_ALTIVEC_2 (VPKPX, "vpkpx", CONST, altivec_vpkpx)
776BU_ALTIVEC_2 (VPKSHSS, "vpkshss", CONST, altivec_vpkshss)
777BU_ALTIVEC_2 (VPKSWSS, "vpkswss", CONST, altivec_vpkswss)
778BU_ALTIVEC_2 (VPKUHUS, "vpkuhus", CONST, altivec_vpkuhus)
779BU_ALTIVEC_2 (VPKSHUS, "vpkshus", CONST, altivec_vpkshus)
780BU_ALTIVEC_2 (VPKUWUS, "vpkuwus", CONST, altivec_vpkuwus)
781BU_ALTIVEC_2 (VPKSWUS, "vpkswus", CONST, altivec_vpkswus)
782BU_ALTIVEC_2 (VRECIPFP, "vrecipdivfp", CONST, recipv4sf3)
783BU_ALTIVEC_2 (VRLB, "vrlb", CONST, vrotlv16qi3)
784BU_ALTIVEC_2 (VRLH, "vrlh", CONST, vrotlv8hi3)
785BU_ALTIVEC_2 (VRLW, "vrlw", CONST, vrotlv4si3)
786BU_ALTIVEC_2 (VSLB, "vslb", CONST, vashlv16qi3)
787BU_ALTIVEC_2 (VSLH, "vslh", CONST, vashlv8hi3)
788BU_ALTIVEC_2 (VSLW, "vslw", CONST, vashlv4si3)
789BU_ALTIVEC_2 (VSL, "vsl", CONST, altivec_vsl)
790BU_ALTIVEC_2 (VSLO, "vslo", CONST, altivec_vslo)
791BU_ALTIVEC_2 (VSPLTB, "vspltb", CONST, altivec_vspltb)
792BU_ALTIVEC_2 (VSPLTH, "vsplth", CONST, altivec_vsplth)
793BU_ALTIVEC_2 (VSPLTW, "vspltw", CONST, altivec_vspltw)
794BU_ALTIVEC_2 (VSRB, "vsrb", CONST, vlshrv16qi3)
795BU_ALTIVEC_2 (VSRH, "vsrh", CONST, vlshrv8hi3)
796BU_ALTIVEC_2 (VSRW, "vsrw", CONST, vlshrv4si3)
797BU_ALTIVEC_2 (VSRAB, "vsrab", CONST, vashrv16qi3)
798BU_ALTIVEC_2 (VSRAH, "vsrah", CONST, vashrv8hi3)
799BU_ALTIVEC_2 (VSRAW, "vsraw", CONST, vashrv4si3)
800BU_ALTIVEC_2 (VSR, "vsr", CONST, altivec_vsr)
801BU_ALTIVEC_2 (VSRO, "vsro", CONST, altivec_vsro)
802BU_ALTIVEC_2 (VSUBUBM, "vsububm", CONST, subv16qi3)
803BU_ALTIVEC_2 (VSUBUHM, "vsubuhm", CONST, subv8hi3)
804BU_ALTIVEC_2 (VSUBUWM, "vsubuwm", CONST, subv4si3)
805BU_ALTIVEC_2 (VSUBFP, "vsubfp", CONST, subv4sf3)
806BU_ALTIVEC_2 (VSUBCUW, "vsubcuw", CONST, altivec_vsubcuw)
807BU_ALTIVEC_2 (VSUBUBS, "vsububs", CONST, altivec_vsububs)
808BU_ALTIVEC_2 (VSUBSBS, "vsubsbs", CONST, altivec_vsubsbs)
809BU_ALTIVEC_2 (VSUBUHS, "vsubuhs", CONST, altivec_vsubuhs)
810BU_ALTIVEC_2 (VSUBSHS, "vsubshs", CONST, altivec_vsubshs)
811BU_ALTIVEC_2 (VSUBUWS, "vsubuws", CONST, altivec_vsubuws)
812BU_ALTIVEC_2 (VSUBSWS, "vsubsws", CONST, altivec_vsubsws)
813BU_ALTIVEC_2 (VSUM4UBS, "vsum4ubs", CONST, altivec_vsum4ubs)
814BU_ALTIVEC_2 (VSUM4SBS, "vsum4sbs", CONST, altivec_vsum4sbs)
815BU_ALTIVEC_2 (VSUM4SHS, "vsum4shs", CONST, altivec_vsum4shs)
816BU_ALTIVEC_2 (VSUM2SWS, "vsum2sws", CONST, altivec_vsum2sws)
817BU_ALTIVEC_2 (VSUMSWS, "vsumsws", CONST, altivec_vsumsws)
818BU_ALTIVEC_2 (VXOR, "vxor", CONST, xorv4si3)
819BU_ALTIVEC_2 (COPYSIGN_V4SF, "copysignfp", CONST, vector_copysignv4sf3)
820
821/* Altivec ABS functions. */
822BU_ALTIVEC_A (ABS_V4SI, "abs_v4si", CONST, absv4si2)
823BU_ALTIVEC_A (ABS_V8HI, "abs_v8hi", CONST, absv8hi2)
824BU_ALTIVEC_A (ABS_V4SF, "abs_v4sf", CONST, absv4sf2)
825BU_ALTIVEC_A (ABS_V16QI, "abs_v16qi", CONST, absv16qi2)
826BU_ALTIVEC_A (ABSS_V4SI, "abss_v4si", SAT, altivec_abss_v4si)
827BU_ALTIVEC_A (ABSS_V8HI, "abss_v8hi", SAT, altivec_abss_v8hi)
828BU_ALTIVEC_A (ABSS_V16QI, "abss_v16qi", SAT, altivec_abss_v16qi)
829
830/* 1 argument Altivec builtin functions. */
831BU_ALTIVEC_1 (VEXPTEFP, "vexptefp", FP, altivec_vexptefp)
832BU_ALTIVEC_1 (VLOGEFP, "vlogefp", FP, altivec_vlogefp)
833BU_ALTIVEC_1 (VREFP, "vrefp", FP, rev4sf2)
834BU_ALTIVEC_1 (VRFIM, "vrfim", FP, vector_floorv4sf2)
835BU_ALTIVEC_1 (VRFIN, "vrfin", FP, altivec_vrfin)
836BU_ALTIVEC_1 (VRFIP, "vrfip", FP, vector_ceilv4sf2)
837BU_ALTIVEC_1 (VRFIZ, "vrfiz", FP, vector_btruncv4sf2)
838BU_ALTIVEC_1 (VRSQRTFP, "vrsqrtfp", FP, rsqrtv4sf2)
839BU_ALTIVEC_1 (VRSQRTEFP, "vrsqrtefp", FP, rsqrtev4sf2)
840BU_ALTIVEC_1 (VSPLTISB, "vspltisb", CONST, altivec_vspltisb)
841BU_ALTIVEC_1 (VSPLTISH, "vspltish", CONST, altivec_vspltish)
842BU_ALTIVEC_1 (VSPLTISW, "vspltisw", CONST, altivec_vspltisw)
843BU_ALTIVEC_1 (VUPKHSB, "vupkhsb", CONST, altivec_vupkhsb)
844BU_ALTIVEC_1 (VUPKHPX, "vupkhpx", CONST, altivec_vupkhpx)
845BU_ALTIVEC_1 (VUPKHSH, "vupkhsh", CONST, altivec_vupkhsh)
846BU_ALTIVEC_1 (VUPKLSB, "vupklsb", CONST, altivec_vupklsb)
847BU_ALTIVEC_1 (VUPKLPX, "vupklpx", CONST, altivec_vupklpx)
848BU_ALTIVEC_1 (VUPKLSH, "vupklsh", CONST, altivec_vupklsh)
849
850BU_ALTIVEC_1 (FLOAT_V4SI_V4SF, "float_sisf", FP, floatv4siv4sf2)
851BU_ALTIVEC_1 (UNSFLOAT_V4SI_V4SF, "uns_float_sisf", FP, floatunsv4siv4sf2)
852BU_ALTIVEC_1 (FIX_V4SF_V4SI, "fix_sfsi", FP, fix_truncv4sfv4si2)
853BU_ALTIVEC_1 (FIXUNS_V4SF_V4SI, "fixuns_sfsi", FP, fixuns_truncv4sfv4si2)
854
855/* Altivec predicate functions. */
856BU_ALTIVEC_P (VCMPBFP_P, "vcmpbfp_p", CONST, altivec_vcmpbfp_p)
857BU_ALTIVEC_P (VCMPEQFP_P, "vcmpeqfp_p", CONST, vector_eq_v4sf_p)
858BU_ALTIVEC_P (VCMPGEFP_P, "vcmpgefp_p", CONST, vector_ge_v4sf_p)
859BU_ALTIVEC_P (VCMPGTFP_P, "vcmpgtfp_p", CONST, vector_gt_v4sf_p)
860BU_ALTIVEC_P (VCMPEQUW_P, "vcmpequw_p", CONST, vector_eq_v4si_p)
861BU_ALTIVEC_P (VCMPGTSW_P, "vcmpgtsw_p", CONST, vector_gt_v4si_p)
862BU_ALTIVEC_P (VCMPGTUW_P, "vcmpgtuw_p", CONST, vector_gtu_v4si_p)
863BU_ALTIVEC_P (VCMPEQUH_P, "vcmpequh_p", CONST, vector_eq_v8hi_p)
864BU_ALTIVEC_P (VCMPGTSH_P, "vcmpgtsh_p", CONST, vector_gt_v8hi_p)
865BU_ALTIVEC_P (VCMPGTUH_P, "vcmpgtuh_p", CONST, vector_gtu_v8hi_p)
866BU_ALTIVEC_P (VCMPEQUB_P, "vcmpequb_p", CONST, vector_eq_v16qi_p)
867BU_ALTIVEC_P (VCMPGTSB_P, "vcmpgtsb_p", CONST, vector_gt_v16qi_p)
868BU_ALTIVEC_P (VCMPGTUB_P, "vcmpgtub_p", CONST, vector_gtu_v16qi_p)
869
870/* AltiVec builtins that are handled as special cases. */
871BU_ALTIVEC_X (ST_INTERNAL_4si, "st_internal_4si", MEM)
872BU_ALTIVEC_X (LD_INTERNAL_4si, "ld_internal_4si", MEM)
873BU_ALTIVEC_X (ST_INTERNAL_8hi, "st_internal_8hi", MEM)
874BU_ALTIVEC_X (LD_INTERNAL_8hi, "ld_internal_8hi", MEM)
875BU_ALTIVEC_X (ST_INTERNAL_16qi, "st_internal_16qi", MEM)
876BU_ALTIVEC_X (LD_INTERNAL_16qi, "ld_internal_16qi", MEM)
877BU_ALTIVEC_X (ST_INTERNAL_4sf, "st_internal_16qi", MEM)
878BU_ALTIVEC_X (LD_INTERNAL_4sf, "ld_internal_4sf", MEM)
879BU_ALTIVEC_X (ST_INTERNAL_2df, "st_internal_4sf", MEM)
880BU_ALTIVEC_X (LD_INTERNAL_2df, "ld_internal_2df", MEM)
881BU_ALTIVEC_X (ST_INTERNAL_2di, "st_internal_2di", MEM)
882BU_ALTIVEC_X (LD_INTERNAL_2di, "ld_internal_2di", MEM)
a16a872d
MM		 883BU_ALTIVEC_X (ST_INTERNAL_1ti, "st_internal_1ti", MEM)
884BU_ALTIVEC_X (LD_INTERNAL_1ti, "ld_internal_1ti", MEM)
7fa14a01
MM		 885BU_ALTIVEC_X (MTVSCR, "mtvscr", MISC)
886BU_ALTIVEC_X (MFVSCR, "mfvscr", MISC)
887BU_ALTIVEC_X (DSSALL, "dssall", MISC)
888BU_ALTIVEC_X (DSS, "dss", MISC)
889BU_ALTIVEC_X (LVSL, "lvsl", MEM)
890BU_ALTIVEC_X (LVSR, "lvsr", MEM)
891BU_ALTIVEC_X (LVEBX, "lvebx", MEM)
892BU_ALTIVEC_X (LVEHX, "lvehx", MEM)
893BU_ALTIVEC_X (LVEWX, "lvewx", MEM)
894BU_ALTIVEC_X (LVXL, "lvxl", MEM)
4b3a6bcb
WS		 895BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", MEM)
896BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", MEM)
897BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", MEM)
898BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", MEM)
899BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", MEM)
900BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", MEM)
7fa14a01 901BU_ALTIVEC_X (LVX, "lvx", MEM)
4b3a6bcb
WS		 902BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM)
903BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", MEM)
904BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", MEM)
905BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", MEM)
906BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", MEM)
907BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", MEM)
7fa14a01 908BU_ALTIVEC_X (STVX, "stvx", MEM)
4b3a6bcb
WS		 909BU_ALTIVEC_X (STVX_V2DF, "stvx_v2df", MEM)
910BU_ALTIVEC_X (STVX_V2DI, "stvx_v2di", MEM)
911BU_ALTIVEC_X (STVX_V4SF, "stvx_v4sf", MEM)
912BU_ALTIVEC_X (STVX_V4SI, "stvx_v4si", MEM)
913BU_ALTIVEC_X (STVX_V8HI, "stvx_v8hi", MEM)
914BU_ALTIVEC_X (STVX_V16QI, "stvx_v16qi", MEM)
7fa14a01
MM		 915BU_ALTIVEC_C (LVLX, "lvlx", MEM)
916BU_ALTIVEC_C (LVLXL, "lvlxl", MEM)
917BU_ALTIVEC_C (LVRX, "lvrx", MEM)
918BU_ALTIVEC_C (LVRXL, "lvrxl", MEM)
919BU_ALTIVEC_X (STVEBX, "stvebx", MEM)
920BU_ALTIVEC_X (STVEHX, "stvehx", MEM)
921BU_ALTIVEC_X (STVEWX, "stvewx", MEM)
922BU_ALTIVEC_X (STVXL, "stvxl", MEM)
4b3a6bcb
WS		 923BU_ALTIVEC_X (STVXL_V2DF, "stvxl_v2df", MEM)
924BU_ALTIVEC_X (STVXL_V2DI, "stvxl_v2di", MEM)
925BU_ALTIVEC_X (STVXL_V4SF, "stvxl_v4sf", MEM)
926BU_ALTIVEC_X (STVXL_V4SI, "stvxl_v4si", MEM)
927BU_ALTIVEC_X (STVXL_V8HI, "stvxl_v8hi", MEM)
928BU_ALTIVEC_X (STVXL_V16QI, "stvxl_v16qi", MEM)
7fa14a01
MM		 929BU_ALTIVEC_C (STVLX, "stvlx", MEM)
930BU_ALTIVEC_C (STVLXL, "stvlxl", MEM)
931BU_ALTIVEC_C (STVRX, "stvrx", MEM)
932BU_ALTIVEC_C (STVRXL, "stvrxl", MEM)
933BU_ALTIVEC_X (MASK_FOR_LOAD, "mask_for_load", MISC)
934BU_ALTIVEC_X (MASK_FOR_STORE, "mask_for_store", MISC)
935BU_ALTIVEC_X (VEC_INIT_V4SI, "vec_init_v4si", CONST)
936BU_ALTIVEC_X (VEC_INIT_V8HI, "vec_init_v8hi", CONST)
937BU_ALTIVEC_X (VEC_INIT_V16QI, "vec_init_v16qi", CONST)
938BU_ALTIVEC_X (VEC_INIT_V4SF, "vec_init_v4sf", CONST)
939BU_ALTIVEC_X (VEC_SET_V4SI, "vec_set_v4si", CONST)
940BU_ALTIVEC_X (VEC_SET_V8HI, "vec_set_v8hi", CONST)
941BU_ALTIVEC_X (VEC_SET_V16QI, "vec_set_v16qi", CONST)
942BU_ALTIVEC_X (VEC_SET_V4SF, "vec_set_v4sf", CONST)
943BU_ALTIVEC_X (VEC_EXT_V4SI, "vec_ext_v4si", CONST)
944BU_ALTIVEC_X (VEC_EXT_V8HI, "vec_ext_v8hi", CONST)
945BU_ALTIVEC_X (VEC_EXT_V16QI, "vec_ext_v16qi", CONST)
946BU_ALTIVEC_X (VEC_EXT_V4SF, "vec_ext_v4sf", CONST)
1c9df37c
MM		 947
948/* Altivec overloaded builtins. */
949/* For now, don't set the classification for overloaded functions.
950 The function should be converted to the type specific instruction
951 before we get to the point about classifying the builtin type. */
7fa14a01
MM		 952
953/* 3 argument Altivec overloaded builtins. */
29ec406a
BS		 954BU_ALTIVEC_OVERLOAD_3 (ADDE, "adde")
955BU_ALTIVEC_OVERLOAD_3 (ADDEC, "addec")
7fa14a01
MM		 956BU_ALTIVEC_OVERLOAD_3 (MADD, "madd")
957BU_ALTIVEC_OVERLOAD_3 (MADDS, "madds")
958BU_ALTIVEC_OVERLOAD_3 (MLADD, "mladd")
959BU_ALTIVEC_OVERLOAD_3 (MRADDS, "mradds")
960BU_ALTIVEC_OVERLOAD_3 (MSUM, "msum")
961BU_ALTIVEC_OVERLOAD_3 (MSUMS, "msums")
962BU_ALTIVEC_OVERLOAD_3 (NMSUB, "nmsub")
963BU_ALTIVEC_OVERLOAD_3 (PERM, "perm")
964BU_ALTIVEC_OVERLOAD_3 (SEL, "sel")
965BU_ALTIVEC_OVERLOAD_3 (VMSUMMBM, "vmsummbm")
966BU_ALTIVEC_OVERLOAD_3 (VMSUMSHM, "vmsumshm")
967BU_ALTIVEC_OVERLOAD_3 (VMSUMSHS, "vmsumshs")
968BU_ALTIVEC_OVERLOAD_3 (VMSUMUBM, "vmsumubm")
969BU_ALTIVEC_OVERLOAD_3 (VMSUMUHM, "vmsumuhm")
970BU_ALTIVEC_OVERLOAD_3 (VMSUMUHS, "vmsumuhs")
971
972/* Altivec DST overloaded builtins. */
973BU_ALTIVEC_OVERLOAD_D (DST, "dst")
974BU_ALTIVEC_OVERLOAD_D (DSTT, "dstt")
975BU_ALTIVEC_OVERLOAD_D (DSTST, "dstst")
976BU_ALTIVEC_OVERLOAD_D (DSTSTT, "dststt")
977
978/* 2 argument Altivec overloaded builtins. */
979BU_ALTIVEC_OVERLOAD_2 (ADD, "add")
980BU_ALTIVEC_OVERLOAD_2 (ADDC, "addc")
981BU_ALTIVEC_OVERLOAD_2 (ADDS, "adds")
982BU_ALTIVEC_OVERLOAD_2 (AND, "and")
983BU_ALTIVEC_OVERLOAD_2 (ANDC, "andc")
984BU_ALTIVEC_OVERLOAD_2 (AVG, "avg")
985BU_ALTIVEC_OVERLOAD_2 (CMPB, "cmpb")
986BU_ALTIVEC_OVERLOAD_2 (CMPEQ, "cmpeq")
987BU_ALTIVEC_OVERLOAD_2 (CMPGE, "cmpge")
988BU_ALTIVEC_OVERLOAD_2 (CMPGT, "cmpgt")
989BU_ALTIVEC_OVERLOAD_2 (CMPLE, "cmple")
990BU_ALTIVEC_OVERLOAD_2 (CMPLT, "cmplt")
991BU_ALTIVEC_OVERLOAD_2 (COPYSIGN, "copysign")
992BU_ALTIVEC_OVERLOAD_2 (MAX, "max")
993BU_ALTIVEC_OVERLOAD_2 (MERGEH, "mergeh")
994BU_ALTIVEC_OVERLOAD_2 (MERGEL, "mergel")
995BU_ALTIVEC_OVERLOAD_2 (MIN, "min")
996BU_ALTIVEC_OVERLOAD_2 (MULE, "mule")
997BU_ALTIVEC_OVERLOAD_2 (MULO, "mulo")
998BU_ALTIVEC_OVERLOAD_2 (NOR, "nor")
999BU_ALTIVEC_OVERLOAD_2 (OR, "or")
1000BU_ALTIVEC_OVERLOAD_2 (PACK, "pack")
1001BU_ALTIVEC_OVERLOAD_2 (PACKPX, "packpx")
1002BU_ALTIVEC_OVERLOAD_2 (PACKS, "packs")
1003BU_ALTIVEC_OVERLOAD_2 (PACKSU, "packsu")
1004BU_ALTIVEC_OVERLOAD_2 (RECIP, "recipdiv")
1005BU_ALTIVEC_OVERLOAD_2 (RL, "rl")
1006BU_ALTIVEC_OVERLOAD_2 (SL, "sl")
1007BU_ALTIVEC_OVERLOAD_2 (SLL, "sll")
1008BU_ALTIVEC_OVERLOAD_2 (SLO, "slo")
1009BU_ALTIVEC_OVERLOAD_2 (SR, "sr")
1010BU_ALTIVEC_OVERLOAD_2 (SRA, "sra")
1011BU_ALTIVEC_OVERLOAD_2 (SRL, "srl")
1012BU_ALTIVEC_OVERLOAD_2 (SRO, "sro")
1013BU_ALTIVEC_OVERLOAD_2 (SUB, "sub")
1014BU_ALTIVEC_OVERLOAD_2 (SUBC, "subc")
1015BU_ALTIVEC_OVERLOAD_2 (SUBS, "subs")
1016BU_ALTIVEC_OVERLOAD_2 (SUM2S, "sum2s")
1017BU_ALTIVEC_OVERLOAD_2 (SUM4S, "sum4s")
1018BU_ALTIVEC_OVERLOAD_2 (SUMS, "sums")
1019BU_ALTIVEC_OVERLOAD_2 (VADDFP, "vaddfp")
1020BU_ALTIVEC_OVERLOAD_2 (VADDSBS, "vaddsbs")
1021BU_ALTIVEC_OVERLOAD_2 (VADDSHS, "vaddshs")
1022BU_ALTIVEC_OVERLOAD_2 (VADDSWS, "vaddsws")
1023BU_ALTIVEC_OVERLOAD_2 (VADDUBM, "vaddubm")
1024BU_ALTIVEC_OVERLOAD_2 (VADDUBS, "vaddubs")
1025BU_ALTIVEC_OVERLOAD_2 (VADDUHM, "vadduhm")
1026BU_ALTIVEC_OVERLOAD_2 (VADDUHS, "vadduhs")
1027BU_ALTIVEC_OVERLOAD_2 (VADDUWM, "vadduwm")
1028BU_ALTIVEC_OVERLOAD_2 (VADDUWS, "vadduws")
1029BU_ALTIVEC_OVERLOAD_2 (VAVGSB, "vavgsb")
1030BU_ALTIVEC_OVERLOAD_2 (VAVGSH, "vavgsh")
1031BU_ALTIVEC_OVERLOAD_2 (VAVGSW, "vavgsw")
1032BU_ALTIVEC_OVERLOAD_2 (VAVGUB, "vavgub")
1033BU_ALTIVEC_OVERLOAD_2 (VAVGUH, "vavguh")
1034BU_ALTIVEC_OVERLOAD_2 (VAVGUW, "vavguw")
1035BU_ALTIVEC_OVERLOAD_2 (VCMPEQFP, "vcmpeqfp")
1036BU_ALTIVEC_OVERLOAD_2 (VCMPEQUB, "vcmpequb")
1037BU_ALTIVEC_OVERLOAD_2 (VCMPEQUH, "vcmpequh")
1038BU_ALTIVEC_OVERLOAD_2 (VCMPEQUW, "vcmpequw")
1039BU_ALTIVEC_OVERLOAD_2 (VCMPGTFP, "vcmpgtfp")
1040BU_ALTIVEC_OVERLOAD_2 (VCMPGTSB, "vcmpgtsb")
1041BU_ALTIVEC_OVERLOAD_2 (VCMPGTSH, "vcmpgtsh")
1042BU_ALTIVEC_OVERLOAD_2 (VCMPGTSW, "vcmpgtsw")
1043BU_ALTIVEC_OVERLOAD_2 (VCMPGTUB, "vcmpgtub")
1044BU_ALTIVEC_OVERLOAD_2 (VCMPGTUH, "vcmpgtuh")
1045BU_ALTIVEC_OVERLOAD_2 (VCMPGTUW, "vcmpgtuw")
1046BU_ALTIVEC_OVERLOAD_2 (VMAXFP, "vmaxfp")
1047BU_ALTIVEC_OVERLOAD_2 (VMAXSB, "vmaxsb")
1048BU_ALTIVEC_OVERLOAD_2 (VMAXSH, "vmaxsh")
1049BU_ALTIVEC_OVERLOAD_2 (VMAXSW, "vmaxsw")
1050BU_ALTIVEC_OVERLOAD_2 (VMAXUB, "vmaxub")
1051BU_ALTIVEC_OVERLOAD_2 (VMAXUH, "vmaxuh")
1052BU_ALTIVEC_OVERLOAD_2 (VMAXUW, "vmaxuw")
1053BU_ALTIVEC_OVERLOAD_2 (VMINFP, "vminfp")
1054BU_ALTIVEC_OVERLOAD_2 (VMINSB, "vminsb")
1055BU_ALTIVEC_OVERLOAD_2 (VMINSH, "vminsh")
1056BU_ALTIVEC_OVERLOAD_2 (VMINSW, "vminsw")
1057BU_ALTIVEC_OVERLOAD_2 (VMINUB, "vminub")
1058BU_ALTIVEC_OVERLOAD_2 (VMINUH, "vminuh")
1059BU_ALTIVEC_OVERLOAD_2 (VMINUW, "vminuw")
1060BU_ALTIVEC_OVERLOAD_2 (VMRGHB, "vmrghb")
1061BU_ALTIVEC_OVERLOAD_2 (VMRGHH, "vmrghh")
1062BU_ALTIVEC_OVERLOAD_2 (VMRGHW, "vmrghw")
1063BU_ALTIVEC_OVERLOAD_2 (VMRGLB, "vmrglb")
1064BU_ALTIVEC_OVERLOAD_2 (VMRGLH, "vmrglh")
1065BU_ALTIVEC_OVERLOAD_2 (VMRGLW, "vmrglw")
1066BU_ALTIVEC_OVERLOAD_2 (VMULESB, "vmulesb")
1067BU_ALTIVEC_OVERLOAD_2 (VMULESH, "vmulesh")
1068BU_ALTIVEC_OVERLOAD_2 (VMULEUB, "vmuleub")
1069BU_ALTIVEC_OVERLOAD_2 (VMULEUH, "vmuleuh")
1070BU_ALTIVEC_OVERLOAD_2 (VMULOSB, "vmulosb")
1071BU_ALTIVEC_OVERLOAD_2 (VMULOSH, "vmulosh")
1072BU_ALTIVEC_OVERLOAD_2 (VMULOUB, "vmuloub")
1073BU_ALTIVEC_OVERLOAD_2 (VMULOUH, "vmulouh")
1074BU_ALTIVEC_OVERLOAD_2 (VPKSHSS, "vpkshss")
1075BU_ALTIVEC_OVERLOAD_2 (VPKSHUS, "vpkshus")
1076BU_ALTIVEC_OVERLOAD_2 (VPKSWSS, "vpkswss")
1077BU_ALTIVEC_OVERLOAD_2 (VPKSWUS, "vpkswus")
1078BU_ALTIVEC_OVERLOAD_2 (VPKUHUM, "vpkuhum")
1079BU_ALTIVEC_OVERLOAD_2 (VPKUHUS, "vpkuhus")
1080BU_ALTIVEC_OVERLOAD_2 (VPKUWUM, "vpkuwum")
1081BU_ALTIVEC_OVERLOAD_2 (VPKUWUS, "vpkuwus")
1082BU_ALTIVEC_OVERLOAD_2 (VRLB, "vrlb")
1083BU_ALTIVEC_OVERLOAD_2 (VRLH, "vrlh")
1084BU_ALTIVEC_OVERLOAD_2 (VRLW, "vrlw")
1085BU_ALTIVEC_OVERLOAD_2 (VSLB, "vslb")
1086BU_ALTIVEC_OVERLOAD_2 (VSLH, "vslh")
1087BU_ALTIVEC_OVERLOAD_2 (VSLW, "vslw")
1088BU_ALTIVEC_OVERLOAD_2 (VSRAB, "vsrab")
1089BU_ALTIVEC_OVERLOAD_2 (VSRAH, "vsrah")
1090BU_ALTIVEC_OVERLOAD_2 (VSRAW, "vsraw")
1091BU_ALTIVEC_OVERLOAD_2 (VSRB, "vsrb")
1092BU_ALTIVEC_OVERLOAD_2 (VSRH, "vsrh")
1093BU_ALTIVEC_OVERLOAD_2 (VSRW, "vsrw")
1094BU_ALTIVEC_OVERLOAD_2 (VSUBFP, "vsubfp")
1095BU_ALTIVEC_OVERLOAD_2 (VSUBSBS, "vsubsbs")
1096BU_ALTIVEC_OVERLOAD_2 (VSUBSHS, "vsubshs")
1097BU_ALTIVEC_OVERLOAD_2 (VSUBSWS, "vsubsws")
1098BU_ALTIVEC_OVERLOAD_2 (VSUBUBM, "vsububm")
1099BU_ALTIVEC_OVERLOAD_2 (VSUBUBS, "vsububs")
1100BU_ALTIVEC_OVERLOAD_2 (VSUBUHM, "vsubuhm")
1101BU_ALTIVEC_OVERLOAD_2 (VSUBUHS, "vsubuhs")
1102BU_ALTIVEC_OVERLOAD_2 (VSUBUWM, "vsubuwm")
1103BU_ALTIVEC_OVERLOAD_2 (VSUBUWS, "vsubuws")
1104BU_ALTIVEC_OVERLOAD_2 (VSUM4SBS, "vsum4sbs")
1105BU_ALTIVEC_OVERLOAD_2 (VSUM4SHS, "vsum4shs")
1106BU_ALTIVEC_OVERLOAD_2 (VSUM4UBS, "vsum4ubs")
1107BU_ALTIVEC_OVERLOAD_2 (XOR, "xor")
1108
1109/* 1 argument Altivec overloaded functions. */
1110BU_ALTIVEC_OVERLOAD_1 (ABS, "abs")
1111BU_ALTIVEC_OVERLOAD_1 (ABSS, "abss")
1112BU_ALTIVEC_OVERLOAD_1 (CEIL, "ceil")
1113BU_ALTIVEC_OVERLOAD_1 (EXPTE, "expte")
1114BU_ALTIVEC_OVERLOAD_1 (FLOOR, "floor")
1115BU_ALTIVEC_OVERLOAD_1 (LOGE, "loge")
1116BU_ALTIVEC_OVERLOAD_1 (MTVSCR, "mtvscr")
1117BU_ALTIVEC_OVERLOAD_1 (NEARBYINT, "nearbyint")
1118BU_ALTIVEC_OVERLOAD_1 (RE, "re")
1119BU_ALTIVEC_OVERLOAD_1 (RINT, "rint")
1120BU_ALTIVEC_OVERLOAD_1 (ROUND, "round")
1121BU_ALTIVEC_OVERLOAD_1 (RSQRT, "rsqrt")
1122BU_ALTIVEC_OVERLOAD_1 (RSQRTE, "rsqrte")
1123BU_ALTIVEC_OVERLOAD_1 (SQRT, "sqrt")
1124BU_ALTIVEC_OVERLOAD_1 (TRUNC, "trunc")
1125BU_ALTIVEC_OVERLOAD_1 (UNPACKH, "unpackh")
1126BU_ALTIVEC_OVERLOAD_1 (UNPACKL, "unpackl")
1127BU_ALTIVEC_OVERLOAD_1 (VUPKHPX, "vupkhpx")
1128BU_ALTIVEC_OVERLOAD_1 (VUPKHSB, "vupkhsb")
1129BU_ALTIVEC_OVERLOAD_1 (VUPKHSH, "vupkhsh")
1130BU_ALTIVEC_OVERLOAD_1 (VUPKLPX, "vupklpx")
1131BU_ALTIVEC_OVERLOAD_1 (VUPKLSB, "vupklsb")
1132BU_ALTIVEC_OVERLOAD_1 (VUPKLSH, "vupklsh")
1133
1134/* Overloaded altivec predicates. */
1135BU_ALTIVEC_OVERLOAD_P (VCMPEQ_P, "vcmpeq_p")
1136BU_ALTIVEC_OVERLOAD_P (VCMPGT_P, "vcmpgt_p")
1137BU_ALTIVEC_OVERLOAD_P (VCMPGE_P, "vcmpge_p")
1138
1139/* Overloaded Altivec builtins that are handled as special cases. */
1140BU_ALTIVEC_OVERLOAD_X (CTF, "ctf")
1141BU_ALTIVEC_OVERLOAD_X (CTS, "cts")
1142BU_ALTIVEC_OVERLOAD_X (CTU, "ctu")
1143BU_ALTIVEC_OVERLOAD_X (EXTRACT, "extract")
1144BU_ALTIVEC_OVERLOAD_X (INSERT, "insert")
1145BU_ALTIVEC_OVERLOAD_X (LD, "ld")
1146BU_ALTIVEC_OVERLOAD_X (LDE, "lde")
1147BU_ALTIVEC_OVERLOAD_X (LDL, "ldl")
1148BU_ALTIVEC_OVERLOAD_X (LVEBX, "lvebx")
1149BU_ALTIVEC_OVERLOAD_X (LVEHX, "lvehx")
1150BU_ALTIVEC_OVERLOAD_X (LVEWX, "lvewx")
1151BU_ALTIVEC_OVERLOAD_X (LVLX, "lvlx")
1152BU_ALTIVEC_OVERLOAD_X (LVLXL, "lvlxl")
1153BU_ALTIVEC_OVERLOAD_X (LVRX, "lvrx")
1154BU_ALTIVEC_OVERLOAD_X (LVRXL, "lvrxl")
1155BU_ALTIVEC_OVERLOAD_X (LVSL, "lvsl")
1156BU_ALTIVEC_OVERLOAD_X (LVSR, "lvsr")
1157BU_ALTIVEC_OVERLOAD_X (PROMOTE, "promote")
1158BU_ALTIVEC_OVERLOAD_X (SLD, "sld")
1159BU_ALTIVEC_OVERLOAD_X (SPLAT, "splat")
1160BU_ALTIVEC_OVERLOAD_X (SPLATS, "splats")
1161BU_ALTIVEC_OVERLOAD_X (ST, "st")
1162BU_ALTIVEC_OVERLOAD_X (STE, "ste")
1163BU_ALTIVEC_OVERLOAD_X (STEP, "step")
1164BU_ALTIVEC_OVERLOAD_X (STL, "stl")
1165BU_ALTIVEC_OVERLOAD_X (STVEBX, "stvebx")
1166BU_ALTIVEC_OVERLOAD_X (STVEHX, "stvehx")
1167BU_ALTIVEC_OVERLOAD_X (STVEWX, "stvewx")
1168BU_ALTIVEC_OVERLOAD_X (STVLX, "stvlx")
1169BU_ALTIVEC_OVERLOAD_X (STVLXL, "stvlxl")
1170BU_ALTIVEC_OVERLOAD_X (STVRX, "stvrx")
1171BU_ALTIVEC_OVERLOAD_X (STVRXL, "stvrxl")
1172BU_ALTIVEC_OVERLOAD_X (VCFSX, "vcfsx")
1173BU_ALTIVEC_OVERLOAD_X (VCFUX, "vcfux")
1174BU_ALTIVEC_OVERLOAD_X (VSPLTB, "vspltb")
1175BU_ALTIVEC_OVERLOAD_X (VSPLTH, "vsplth")
1176BU_ALTIVEC_OVERLOAD_X (VSPLTW, "vspltw")
1177\f
1178/* 3 argument VSX builtins. */
1179BU_VSX_3 (XVMADDSP, "xvmaddsp", CONST, fmav4sf4)
1180BU_VSX_3 (XVMSUBSP, "xvmsubsp", CONST, fmsv4sf4)
1181BU_VSX_3 (XVNMADDSP, "xvnmaddsp", CONST, nfmav4sf4)
1182BU_VSX_3 (XVNMSUBSP, "xvnmsubsp", CONST, nfmsv4sf4)
1183
1184BU_VSX_3 (XVMADDDP, "xvmadddp", CONST, fmav2df4)
1185BU_VSX_3 (XVMSUBDP, "xvmsubdp", CONST, fmsv2df4)
1186BU_VSX_3 (XVNMADDDP, "xvnmadddp", CONST, nfmav2df4)
1187BU_VSX_3 (XVNMSUBDP, "xvnmsubdp", CONST, nfmsv2df4)
1188
a16a872d 1189BU_VSX_3 (XXSEL_1TI, "xxsel_1ti", CONST, vector_select_v1ti)
7fa14a01
MM		 1190BU_VSX_3 (XXSEL_2DI, "xxsel_2di", CONST, vector_select_v2di)
1191BU_VSX_3 (XXSEL_2DF, "xxsel_2df", CONST, vector_select_v2df)
1192BU_VSX_3 (XXSEL_4SF, "xxsel_4sf", CONST, vector_select_v4sf)
1193BU_VSX_3 (XXSEL_4SI, "xxsel_4si", CONST, vector_select_v4si)
1194BU_VSX_3 (XXSEL_8HI, "xxsel_8hi", CONST, vector_select_v8hi)
1195BU_VSX_3 (XXSEL_16QI, "xxsel_16qi", CONST, vector_select_v16qi)
a16a872d 1196BU_VSX_3 (XXSEL_1TI_UNS, "xxsel_1ti_uns", CONST, vector_select_v1ti_uns)
7fa14a01
MM		 1197BU_VSX_3 (XXSEL_2DI_UNS, "xxsel_2di_uns", CONST, vector_select_v2di_uns)
1198BU_VSX_3 (XXSEL_4SI_UNS, "xxsel_4si_uns", CONST, vector_select_v4si_uns)
1199BU_VSX_3 (XXSEL_8HI_UNS, "xxsel_8hi_uns", CONST, vector_select_v8hi_uns)
1200BU_VSX_3 (XXSEL_16QI_UNS, "xxsel_16qi_uns", CONST, vector_select_v16qi_uns)
1201
a16a872d 1202BU_VSX_3 (VPERM_1TI, "vperm_1ti", CONST, altivec_vperm_v1ti)
7fa14a01
MM		 1203BU_VSX_3 (VPERM_2DI, "vperm_2di", CONST, altivec_vperm_v2di)
1204BU_VSX_3 (VPERM_2DF, "vperm_2df", CONST, altivec_vperm_v2df)
1205BU_VSX_3 (VPERM_4SF, "vperm_4sf", CONST, altivec_vperm_v4sf)
1206BU_VSX_3 (VPERM_4SI, "vperm_4si", CONST, altivec_vperm_v4si)
1207BU_VSX_3 (VPERM_8HI, "vperm_8hi", CONST, altivec_vperm_v8hi)
1208BU_VSX_3 (VPERM_16QI, "vperm_16qi", CONST, altivec_vperm_v16qi)
a16a872d 1209BU_VSX_3 (VPERM_1TI_UNS, "vperm_1ti_uns", CONST, altivec_vperm_v1ti_uns)
7fa14a01
MM		 1210BU_VSX_3 (VPERM_2DI_UNS, "vperm_2di_uns", CONST, altivec_vperm_v2di_uns)
1211BU_VSX_3 (VPERM_4SI_UNS, "vperm_4si_uns", CONST, altivec_vperm_v4si_uns)
1212BU_VSX_3 (VPERM_8HI_UNS, "vperm_8hi_uns", CONST, altivec_vperm_v8hi_uns)
1213BU_VSX_3 (VPERM_16QI_UNS, "vperm_16qi_uns", CONST, altivec_vperm_v16qi_uns)
1214
a16a872d 1215BU_VSX_3 (XXPERMDI_1TI, "xxpermdi_1ti", CONST, vsx_xxpermdi_v1ti)
7fa14a01
MM		 1216BU_VSX_3 (XXPERMDI_2DF, "xxpermdi_2df", CONST, vsx_xxpermdi_v2df)
1217BU_VSX_3 (XXPERMDI_2DI, "xxpermdi_2di", CONST, vsx_xxpermdi_v2di)
1218BU_VSX_3 (XXPERMDI_4SF, "xxpermdi_4sf", CONST, vsx_xxpermdi_v4sf)
1219BU_VSX_3 (XXPERMDI_4SI, "xxpermdi_4si", CONST, vsx_xxpermdi_v4si)
1220BU_VSX_3 (XXPERMDI_8HI, "xxpermdi_8hi", CONST, vsx_xxpermdi_v8hi)
1221BU_VSX_3 (XXPERMDI_16QI, "xxpermdi_16qi", CONST, vsx_xxpermdi_v16qi)
a16a872d 1222BU_VSX_3 (SET_1TI, "set_1ti", CONST, vsx_set_v1ti)
7fa14a01
MM		 1223BU_VSX_3 (SET_2DF, "set_2df", CONST, vsx_set_v2df)
1224BU_VSX_3 (SET_2DI, "set_2di", CONST, vsx_set_v2di)
1225BU_VSX_3 (XXSLDWI_2DI, "xxsldwi_2di", CONST, vsx_xxsldwi_v2di)
1226BU_VSX_3 (XXSLDWI_2DF, "xxsldwi_2df", CONST, vsx_xxsldwi_v2df)
1227BU_VSX_3 (XXSLDWI_4SF, "xxsldwi_4sf", CONST, vsx_xxsldwi_v4sf)
1228BU_VSX_3 (XXSLDWI_4SI, "xxsldwi_4si", CONST, vsx_xxsldwi_v4si)
1229BU_VSX_3 (XXSLDWI_8HI, "xxsldwi_8hi", CONST, vsx_xxsldwi_v8hi)
1230BU_VSX_3 (XXSLDWI_16QI, "xxsldwi_16qi", CONST, vsx_xxsldwi_v16qi)
1231
1232/* 2 argument VSX builtins. */
1233BU_VSX_2 (XVADDDP, "xvadddp", FP, addv2df3)
1234BU_VSX_2 (XVSUBDP, "xvsubdp", FP, subv2df3)
1235BU_VSX_2 (XVMULDP, "xvmuldp", FP, mulv2df3)
1236BU_VSX_2 (XVDIVDP, "xvdivdp", FP, divv2df3)
1237BU_VSX_2 (RECIP_V2DF, "xvrecipdivdp", FP, recipv2df3)
1238BU_VSX_2 (XVMINDP, "xvmindp", CONST, sminv2df3)
1239BU_VSX_2 (XVMAXDP, "xvmaxdp", CONST, smaxv2df3)
1240BU_VSX_2 (XVTDIVDP_FE, "xvtdivdp_fe", CONST, vsx_tdivv2df3_fe)
1241BU_VSX_2 (XVTDIVDP_FG, "xvtdivdp_fg", CONST, vsx_tdivv2df3_fg)
1242BU_VSX_2 (XVCMPEQDP, "xvcmpeqdp", CONST, vector_eqv2df)
1243BU_VSX_2 (XVCMPGTDP, "xvcmpgtdp", CONST, vector_gtv2df)
1244BU_VSX_2 (XVCMPGEDP, "xvcmpgedp", CONST, vector_gev2df)
1245
1246BU_VSX_2 (XVADDSP, "xvaddsp", FP, addv4sf3)
1247BU_VSX_2 (XVSUBSP, "xvsubsp", FP, subv4sf3)
1248BU_VSX_2 (XVMULSP, "xvmulsp", FP, mulv4sf3)
1249BU_VSX_2 (XVDIVSP, "xvdivsp", FP, divv4sf3)
1250BU_VSX_2 (RECIP_V4SF, "xvrecipdivsp", FP, recipv4sf3)
1251BU_VSX_2 (XVMINSP, "xvminsp", CONST, sminv4sf3)
1252BU_VSX_2 (XVMAXSP, "xvmaxsp", CONST, smaxv4sf3)
1253BU_VSX_2 (XVTDIVSP_FE, "xvtdivsp_fe", CONST, vsx_tdivv4sf3_fe)
1254BU_VSX_2 (XVTDIVSP_FG, "xvtdivsp_fg", CONST, vsx_tdivv4sf3_fg)
1255BU_VSX_2 (XVCMPEQSP, "xvcmpeqsp", CONST, vector_eqv4sf)
1256BU_VSX_2 (XVCMPGTSP, "xvcmpgtsp", CONST, vector_gtv4sf)
1257BU_VSX_2 (XVCMPGESP, "xvcmpgesp", CONST, vector_gev4sf)
1258
1259BU_VSX_2 (XSMINDP, "xsmindp", CONST, smindf3)
1260BU_VSX_2 (XSMAXDP, "xsmaxdp", CONST, smaxdf3)
1261BU_VSX_2 (XSTDIVDP_FE, "xstdivdp_fe", CONST, vsx_tdivdf3_fe)
1262BU_VSX_2 (XSTDIVDP_FG, "xstdivdp_fg", CONST, vsx_tdivdf3_fg)
1263BU_VSX_2 (CPSGNDP, "cpsgndp", CONST, vector_copysignv2df3)
1264BU_VSX_2 (CPSGNSP, "cpsgnsp", CONST, vector_copysignv4sf3)
1265
1266BU_VSX_2 (CONCAT_2DF, "concat_2df", CONST, vsx_concat_v2df)
1267BU_VSX_2 (CONCAT_2DI, "concat_2di", CONST, vsx_concat_v2di)
1268BU_VSX_2 (SPLAT_2DF, "splat_2df", CONST, vsx_splat_v2df)
1269BU_VSX_2 (SPLAT_2DI, "splat_2di", CONST, vsx_splat_v2di)
1270BU_VSX_2 (XXMRGHW_4SF, "xxmrghw", CONST, vsx_xxmrghw_v4sf)
1271BU_VSX_2 (XXMRGHW_4SI, "xxmrghw_4si", CONST, vsx_xxmrghw_v4si)
1272BU_VSX_2 (XXMRGLW_4SF, "xxmrglw", CONST, vsx_xxmrglw_v4sf)
1273BU_VSX_2 (XXMRGLW_4SI, "xxmrglw_4si", CONST, vsx_xxmrglw_v4si)
5aebfdad
RH		 1274BU_VSX_2 (VEC_MERGEL_V2DF, "mergel_2df", CONST, vsx_mergel_v2df)
1275BU_VSX_2 (VEC_MERGEL_V2DI, "mergel_2di", CONST, vsx_mergel_v2di)
1276BU_VSX_2 (VEC_MERGEH_V2DF, "mergeh_2df", CONST, vsx_mergeh_v2df)
1277BU_VSX_2 (VEC_MERGEH_V2DI, "mergeh_2di", CONST, vsx_mergeh_v2di)
2ccdda19
BS		 1278BU_VSX_2 (XXSPLTD_V2DF, "xxspltd_2df", CONST, vsx_xxspltd_v2df)
1279BU_VSX_2 (XXSPLTD_V2DI, "xxspltd_2di", CONST, vsx_xxspltd_v2di)
1280BU_VSX_2 (DIV_V2DI, "div_2di", CONST, vsx_div_v2di)
1281BU_VSX_2 (UDIV_V2DI, "udiv_2di", CONST, vsx_udiv_v2di)
1282BU_VSX_2 (MUL_V2DI, "mul_2di", CONST, vsx_mul_v2di)
7fa14a01 1283
70f0f8b2
BS		 1284BU_VSX_2 (XVCVSXDDP_SCALE, "xvcvsxddp_scale", CONST, vsx_xvcvsxddp_scale)
1285BU_VSX_2 (XVCVUXDDP_SCALE, "xvcvuxddp_scale", CONST, vsx_xvcvuxddp_scale)
1286BU_VSX_2 (XVCVDPSXDS_SCALE, "xvcvdpsxds_scale", CONST, vsx_xvcvdpsxds_scale)
1287BU_VSX_2 (XVCVDPUXDS_SCALE, "xvcvdpuxds_scale", CONST, vsx_xvcvdpuxds_scale)
1288
a05d02b2
BS		 1289BU_VSX_2 (CMPGE_16QI, "cmpge_16qi", CONST, vector_nltv16qi)
1290BU_VSX_2 (CMPGE_8HI, "cmpge_8hi", CONST, vector_nltv8hi)
1291BU_VSX_2 (CMPGE_4SI, "cmpge_4si", CONST, vector_nltv4si)
1292BU_VSX_2 (CMPGE_2DI, "cmpge_2di", CONST, vector_nltv2di)
1293BU_VSX_2 (CMPGE_U16QI, "cmpge_u16qi", CONST, vector_nltuv16qi)
1294BU_VSX_2 (CMPGE_U8HI, "cmpge_u8hi", CONST, vector_nltuv8hi)
1295BU_VSX_2 (CMPGE_U4SI, "cmpge_u4si", CONST, vector_nltuv4si)
1296BU_VSX_2 (CMPGE_U2DI, "cmpge_u2di", CONST, vector_nltuv2di)
1297
1298BU_VSX_2 (CMPLE_16QI, "cmple_16qi", CONST, vector_ngtv16qi)
1299BU_VSX_2 (CMPLE_8HI, "cmple_8hi", CONST, vector_ngtv8hi)
1300BU_VSX_2 (CMPLE_4SI, "cmple_4si", CONST, vector_ngtv4si)
1301BU_VSX_2 (CMPLE_2DI, "cmple_2di", CONST, vector_ngtv2di)
1302BU_VSX_2 (CMPLE_U16QI, "cmple_u16qi", CONST, vector_ngtuv16qi)
1303BU_VSX_2 (CMPLE_U8HI, "cmple_u8hi", CONST, vector_ngtuv8hi)
1304BU_VSX_2 (CMPLE_U4SI, "cmple_u4si", CONST, vector_ngtuv4si)
1305BU_VSX_2 (CMPLE_U2DI, "cmple_u2di", CONST, vector_ngtuv2di)
1306
7fa14a01
MM		 1307/* VSX abs builtin functions. */
1308BU_VSX_A (XVABSDP, "xvabsdp", CONST, absv2df2)
1309BU_VSX_A (XVNABSDP, "xvnabsdp", CONST, vsx_nabsv2df2)
1310BU_VSX_A (XVABSSP, "xvabssp", CONST, absv4sf2)
1311BU_VSX_A (XVNABSSP, "xvnabssp", CONST, vsx_nabsv4sf2)
1312
1313/* 1 argument VSX builtin functions. */
1314BU_VSX_1 (XVNEGDP, "xvnegdp", CONST, negv2df2)
1315BU_VSX_1 (XVSQRTDP, "xvsqrtdp", CONST, sqrtv2df2)
1316BU_VSX_1 (RSQRT_2DF, "xvrsqrtdp", CONST, rsqrtv2df2)
1317BU_VSX_1 (XVRSQRTEDP, "xvrsqrtedp", CONST, rsqrtev2df2)
1318BU_VSX_1 (XVTSQRTDP_FE, "xvtsqrtdp_fe", CONST, vsx_tsqrtv2df2_fe)
1319BU_VSX_1 (XVTSQRTDP_FG, "xvtsqrtdp_fg", CONST, vsx_tsqrtv2df2_fg)
1320BU_VSX_1 (XVREDP, "xvredp", CONST, vsx_frev2df2)
1321
1322BU_VSX_1 (XVNEGSP, "xvnegsp", CONST, negv4sf2)
1323BU_VSX_1 (XVSQRTSP, "xvsqrtsp", CONST, sqrtv4sf2)
1324BU_VSX_1 (RSQRT_4SF, "xvrsqrtsp", CONST, rsqrtv4sf2)
1325BU_VSX_1 (XVRSQRTESP, "xvrsqrtesp", CONST, rsqrtev4sf2)
1326BU_VSX_1 (XVTSQRTSP_FE, "xvtsqrtsp_fe", CONST, vsx_tsqrtv4sf2_fe)
1327BU_VSX_1 (XVTSQRTSP_FG, "xvtsqrtsp_fg", CONST, vsx_tsqrtv4sf2_fg)
1328BU_VSX_1 (XVRESP, "xvresp", CONST, vsx_frev4sf2)
1329
1330BU_VSX_1 (XSCVDPSP, "xscvdpsp", CONST, vsx_xscvdpsp)
f62511da 1331BU_VSX_1 (XSCVSPDP, "xscvspdp", CONST, vsx_xscvspdp)
7fa14a01
MM		 1332BU_VSX_1 (XVCVDPSP, "xvcvdpsp", CONST, vsx_xvcvdpsp)
1333BU_VSX_1 (XVCVSPDP, "xvcvspdp", CONST, vsx_xvcvspdp)
1334BU_VSX_1 (XSTSQRTDP_FE, "xstsqrtdp_fe", CONST, vsx_tsqrtdf2_fe)
1335BU_VSX_1 (XSTSQRTDP_FG, "xstsqrtdp_fg", CONST, vsx_tsqrtdf2_fg)
1336
1337BU_VSX_1 (XVCVDPSXDS, "xvcvdpsxds", CONST, vsx_fix_truncv2dfv2di2)
1338BU_VSX_1 (XVCVDPUXDS, "xvcvdpuxds", CONST, vsx_fixuns_truncv2dfv2di2)
1339BU_VSX_1 (XVCVDPUXDS_UNS, "xvcvdpuxds_uns", CONST, vsx_fixuns_truncv2dfv2di2)
1340BU_VSX_1 (XVCVSXDDP, "xvcvsxddp", CONST, vsx_floatv2div2df2)
1341BU_VSX_1 (XVCVUXDDP, "xvcvuxddp", CONST, vsx_floatunsv2div2df2)
1342BU_VSX_1 (XVCVUXDDP_UNS, "xvcvuxddp_uns", CONST, vsx_floatunsv2div2df2)
1343
1344BU_VSX_1 (XVCVSPSXWS, "xvcvspsxws", CONST, vsx_fix_truncv4sfv4si2)
1345BU_VSX_1 (XVCVSPUXWS, "xvcvspuxws", CONST, vsx_fixuns_truncv4sfv4si2)
1346BU_VSX_1 (XVCVSXWSP, "xvcvsxwsp", CONST, vsx_floatv4siv4sf2)
1347BU_VSX_1 (XVCVUXWSP, "xvcvuxwsp", CONST, vsx_floatunsv4siv4sf2)
1348
1349BU_VSX_1 (XVCVDPSXWS, "xvcvdpsxws", CONST, vsx_xvcvdpsxws)
1350BU_VSX_1 (XVCVDPUXWS, "xvcvdpuxws", CONST, vsx_xvcvdpuxws)
1351BU_VSX_1 (XVCVSXWDP, "xvcvsxwdp", CONST, vsx_xvcvsxwdp)
1352BU_VSX_1 (XVCVUXWDP, "xvcvuxwdp", CONST, vsx_xvcvuxwdp)
1353BU_VSX_1 (XVRDPI, "xvrdpi", CONST, vsx_xvrdpi)
1354BU_VSX_1 (XVRDPIC, "xvrdpic", CONST, vsx_xvrdpic)
1355BU_VSX_1 (XVRDPIM, "xvrdpim", CONST, vsx_floorv2df2)
1356BU_VSX_1 (XVRDPIP, "xvrdpip", CONST, vsx_ceilv2df2)
1357BU_VSX_1 (XVRDPIZ, "xvrdpiz", CONST, vsx_btruncv2df2)
1358
1359BU_VSX_1 (XVCVSPSXDS, "xvcvspsxds", CONST, vsx_xvcvspsxds)
1360BU_VSX_1 (XVCVSPUXDS, "xvcvspuxds", CONST, vsx_xvcvspuxds)
1361BU_VSX_1 (XVCVSXDSP, "xvcvsxdsp", CONST, vsx_xvcvsxdsp)
1362BU_VSX_1 (XVCVUXDSP, "xvcvuxdsp", CONST, vsx_xvcvuxdsp)
1363BU_VSX_1 (XVRSPI, "xvrspi", CONST, vsx_xvrspi)
1364BU_VSX_1 (XVRSPIC, "xvrspic", CONST, vsx_xvrspic)
1365BU_VSX_1 (XVRSPIM, "xvrspim", CONST, vsx_floorv4sf2)
1366BU_VSX_1 (XVRSPIP, "xvrspip", CONST, vsx_ceilv4sf2)
1367BU_VSX_1 (XVRSPIZ, "xvrspiz", CONST, vsx_btruncv4sf2)
1368
1369BU_VSX_1 (XSRDPI, "xsrdpi", CONST, vsx_xsrdpi)
1370BU_VSX_1 (XSRDPIC, "xsrdpic", CONST, vsx_xsrdpic)
0609bdf2
MM		 1371BU_VSX_1 (XSRDPIM, "xsrdpim", CONST, floordf2)
1372BU_VSX_1 (XSRDPIP, "xsrdpip", CONST, ceildf2)
1373BU_VSX_1 (XSRDPIZ, "xsrdpiz", CONST, btruncdf2)
7fa14a01
MM		 1374
1375/* VSX predicate functions. */
1376BU_VSX_P (XVCMPEQSP_P, "xvcmpeqsp_p", CONST, vector_eq_v4sf_p)
1377BU_VSX_P (XVCMPGESP_P, "xvcmpgesp_p", CONST, vector_ge_v4sf_p)
1378BU_VSX_P (XVCMPGTSP_P, "xvcmpgtsp_p", CONST, vector_gt_v4sf_p)
1379BU_VSX_P (XVCMPEQDP_P, "xvcmpeqdp_p", CONST, vector_eq_v2df_p)
1380BU_VSX_P (XVCMPGEDP_P, "xvcmpgedp_p", CONST, vector_ge_v2df_p)
1381BU_VSX_P (XVCMPGTDP_P, "xvcmpgtdp_p", CONST, vector_gt_v2df_p)
1382
1383/* VSX builtins that are handled as special cases. */
1384BU_VSX_X (LXSDX, "lxsdx", MEM)
a16a872d 1385BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", MEM)
7fa14a01
MM		 1386BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", MEM)
1387BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", MEM)
1388BU_VSX_X (LXVDSX, "lxvdsx", MEM)
1389BU_VSX_X (LXVW4X_V4SF, "lxvw4x_v4sf", MEM)
1390BU_VSX_X (LXVW4X_V4SI, "lxvw4x_v4si", MEM)
1391BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM)
1392BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM)
1393BU_VSX_X (STXSDX, "stxsdx", MEM)
a16a872d 1394BU_VSX_X (STXVD2X_V1TI, "stxsdx_v1ti", MEM)
7fa14a01
MM		 1395BU_VSX_X (STXVD2X_V2DF, "stxsdx_v2df", MEM)
1396BU_VSX_X (STXVD2X_V2DI, "stxsdx_v2di", MEM)
1397BU_VSX_X (STXVW4X_V4SF, "stxsdx_v4sf", MEM)
1398BU_VSX_X (STXVW4X_V4SI, "stxsdx_v4si", MEM)
1399BU_VSX_X (STXVW4X_V8HI, "stxsdx_v8hi", MEM)
1400BU_VSX_X (STXVW4X_V16QI, "stxsdx_v16qi", MEM)
1401BU_VSX_X (XSABSDP, "xsabsdp", CONST)
1402BU_VSX_X (XSADDDP, "xsadddp", FP)
1403BU_VSX_X (XSCMPODP, "xscmpodp", FP)
1404BU_VSX_X (XSCMPUDP, "xscmpudp", FP)
1405BU_VSX_X (XSCVDPSXDS, "xscvdpsxds", FP)
1406BU_VSX_X (XSCVDPSXWS, "xscvdpsxws", FP)
1407BU_VSX_X (XSCVDPUXDS, "xscvdpuxds", FP)
1408BU_VSX_X (XSCVDPUXWS, "xscvdpuxws", FP)
1409BU_VSX_X (XSCVSXDDP, "xscvsxddp", FP)
1410BU_VSX_X (XSCVUXDDP, "xscvuxddp", FP)
1411BU_VSX_X (XSDIVDP, "xsdivdp", FP)
1412BU_VSX_X (XSMADDADP, "xsmaddadp", FP)
1413BU_VSX_X (XSMADDMDP, "xsmaddmdp", FP)
1414BU_VSX_X (XSMOVDP, "xsmovdp", FP)
1415BU_VSX_X (XSMSUBADP, "xsmsubadp", FP)
1416BU_VSX_X (XSMSUBMDP, "xsmsubmdp", FP)
1417BU_VSX_X (XSMULDP, "xsmuldp", FP)
1418BU_VSX_X (XSNABSDP, "xsnabsdp", FP)
1419BU_VSX_X (XSNEGDP, "xsnegdp", FP)
1420BU_VSX_X (XSNMADDADP, "xsnmaddadp", FP)
1421BU_VSX_X (XSNMADDMDP, "xsnmaddmdp", FP)
1422BU_VSX_X (XSNMSUBADP, "xsnmsubadp", FP)
1423BU_VSX_X (XSNMSUBMDP, "xsnmsubmdp", FP)
1424BU_VSX_X (XSSUBDP, "xssubdp", FP)
a16a872d 1425BU_VSX_X (VEC_INIT_V1TI, "vec_init_v1ti", CONST)
7fa14a01
MM		 1426BU_VSX_X (VEC_INIT_V2DF, "vec_init_v2df", CONST)
1427BU_VSX_X (VEC_INIT_V2DI, "vec_init_v2di", CONST)
a16a872d 1428BU_VSX_X (VEC_SET_V1TI, "vec_set_v1ti", CONST)
7fa14a01
MM		 1429BU_VSX_X (VEC_SET_V2DF, "vec_set_v2df", CONST)
1430BU_VSX_X (VEC_SET_V2DI, "vec_set_v2di", CONST)
a16a872d 1431BU_VSX_X (VEC_EXT_V1TI, "vec_ext_v1ti", CONST)
7fa14a01
MM		 1432BU_VSX_X (VEC_EXT_V2DF, "vec_ext_v2df", CONST)
1433BU_VSX_X (VEC_EXT_V2DI, "vec_ext_v2di", CONST)
1c9df37c
MM		 1434
1435/* VSX overloaded builtins, add the overloaded functions not present in
1436 Altivec. */
1c9df37c 1437
7fa14a01
MM		 1438/* 3 argument VSX overloaded builtins. */
1439BU_VSX_OVERLOAD_3 (MSUB, "msub")
1440BU_VSX_OVERLOAD_3 (NMADD, "nmadd")
1441BU_VSX_OVERLOAD_3V (XXPERMDI, "xxpermdi")
1442BU_VSX_OVERLOAD_3V (XXSLDWI, "xxsldwi")
1443
1444/* 2 argument VSX overloaded builtin functions. */
1445BU_VSX_OVERLOAD_2 (MUL, "mul")
1446BU_VSX_OVERLOAD_2 (DIV, "div")
1447BU_VSX_OVERLOAD_2 (XXMRGHW, "xxmrghw")
1448BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw")
1449BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd")
1450BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw")
1451
29ec406a
BS		 1452/* 1 argument VSX overloaded builtin functions. */
1453BU_VSX_OVERLOAD_1 (DOUBLE, "double")
1454
7fa14a01
MM		 1455/* VSX builtins that are handled as special cases. */
1456BU_VSX_OVERLOAD_X (LD, "ld")
1457BU_VSX_OVERLOAD_X (ST, "st")
a5965b52 1458\f
0bd62dca
MM		 1459/* 1 argument VSX instructions added in ISA 2.07. */
1460BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn)
1461BU_P8V_VSX_1 (XSCVDPSPN, "xscvdpspn", CONST, vsx_xscvdpspn)
1462
a5965b52
MM		 1463/* 1 argument altivec instructions added in ISA 2.07. */
1464BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2)
1465BU_P8V_AV_1 (VUPKHSW, "vupkhsw", CONST, altivec_vupkhsw)
1466BU_P8V_AV_1 (VUPKLSW, "vupklsw", CONST, altivec_vupklsw)
0bd62dca
MM		 1467BU_P8V_AV_1 (VCLZB, "vclzb", CONST, clzv16qi2)
1468BU_P8V_AV_1 (VCLZH, "vclzh", CONST, clzv8hi2)
1469BU_P8V_AV_1 (VCLZW, "vclzw", CONST, clzv4si2)
1470BU_P8V_AV_1 (VCLZD, "vclzd", CONST, clzv2di2)
1471BU_P8V_AV_1 (VPOPCNTB, "vpopcntb", CONST, popcountv16qi2)
1472BU_P8V_AV_1 (VPOPCNTH, "vpopcnth", CONST, popcountv8hi2)
1473BU_P8V_AV_1 (VPOPCNTW, "vpopcntw", CONST, popcountv4si2)
1474BU_P8V_AV_1 (VPOPCNTD, "vpopcntd", CONST, popcountv2di2)
1475BU_P8V_AV_1 (VGBBD, "vgbbd", CONST, p8v_vgbbd)
a5965b52
MM		 1476
1477/* 2 argument altivec instructions added in ISA 2.07. */
a16a872d 1478BU_P8V_AV_2 (VADDCUQ, "vaddcuq", CONST, altivec_vaddcuq)
a5965b52 1479BU_P8V_AV_2 (VADDUDM, "vaddudm", CONST, addv2di3)
a16a872d 1480BU_P8V_AV_2 (VADDUQM, "vadduqm", CONST, altivec_vadduqm)
a5965b52
MM		 1481BU_P8V_AV_2 (VMINSD, "vminsd", CONST, sminv2di3)
1482BU_P8V_AV_2 (VMAXSD, "vmaxsd", CONST, smaxv2di3)
1483BU_P8V_AV_2 (VMINUD, "vminud", CONST, uminv2di3)
1484BU_P8V_AV_2 (VMAXUD, "vmaxud", CONST, umaxv2di3)
0bd62dca
MM		 1485BU_P8V_AV_2 (VMRGEW, "vmrgew", CONST, p8_vmrgew)
1486BU_P8V_AV_2 (VMRGOW, "vmrgow", CONST, p8_vmrgow)
117f16fb 1487BU_P8V_AV_2 (VBPERMQ, "vbpermq", CONST, altivec_vbpermq)
a5965b52
MM		 1488BU_P8V_AV_2 (VPKUDUM, "vpkudum", CONST, altivec_vpkudum)
1489BU_P8V_AV_2 (VPKSDSS, "vpksdss", CONST, altivec_vpksdss)
1490BU_P8V_AV_2 (VPKUDUS, "vpkudus", CONST, altivec_vpkudus)
110132c1 1491BU_P8V_AV_2 (VPKSDUS, "vpksdus", CONST, altivec_vpksdus)
6992707b
BS		 1492BU_P8V_AV_2 (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)
1493BU_P8V_AV_2 (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)
1494BU_P8V_AV_2 (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)
1495BU_P8V_AV_2 (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)
a5965b52
MM		 1496BU_P8V_AV_2 (VRLD, "vrld", CONST, vrotlv2di3)
1497BU_P8V_AV_2 (VSLD, "vsld", CONST, vashlv2di3)
1498BU_P8V_AV_2 (VSRD, "vsrd", CONST, vlshrv2di3)
1499BU_P8V_AV_2 (VSRAD, "vsrad", CONST, vashrv2di3)
a16a872d 1500BU_P8V_AV_2 (VSUBCUQ, "vsubcuq", CONST, altivec_vsubcuq)
a5965b52 1501BU_P8V_AV_2 (VSUBUDM, "vsubudm", CONST, subv2di3)
a16a872d 1502BU_P8V_AV_2 (VSUBUQM, "vsubuqm", CONST, altivec_vsubuqm)
a5965b52 1503
0bd62dca
MM		 1504BU_P8V_AV_2 (EQV_V16QI, "eqv_v16qi", CONST, eqvv16qi3)
1505BU_P8V_AV_2 (EQV_V8HI, "eqv_v8hi", CONST, eqvv8hi3)
1506BU_P8V_AV_2 (EQV_V4SI, "eqv_v4si", CONST, eqvv4si3)
1507BU_P8V_AV_2 (EQV_V2DI, "eqv_v2di", CONST, eqvv2di3)
a16a872d 1508BU_P8V_AV_2 (EQV_V1TI, "eqv_v1ti", CONST, eqvv1ti3)
0bd62dca
MM		 1509BU_P8V_AV_2 (EQV_V4SF, "eqv_v4sf", CONST, eqvv4sf3)
1510BU_P8V_AV_2 (EQV_V2DF, "eqv_v2df", CONST, eqvv2df3)
1511
1512BU_P8V_AV_2 (NAND_V16QI, "nand_v16qi", CONST, nandv16qi3)
1513BU_P8V_AV_2 (NAND_V8HI, "nand_v8hi", CONST, nandv8hi3)
1514BU_P8V_AV_2 (NAND_V4SI, "nand_v4si", CONST, nandv4si3)
1515BU_P8V_AV_2 (NAND_V2DI, "nand_v2di", CONST, nandv2di3)
a16a872d 1516BU_P8V_AV_2 (NAND_V1TI, "nand_v1ti", CONST, nandv1ti3)
0bd62dca
MM		 1517BU_P8V_AV_2 (NAND_V4SF, "nand_v4sf", CONST, nandv4sf3)
1518BU_P8V_AV_2 (NAND_V2DF, "nand_v2df", CONST, nandv2df3)
1519
1520BU_P8V_AV_2 (ORC_V16QI, "orc_v16qi", CONST, orcv16qi3)
1521BU_P8V_AV_2 (ORC_V8HI, "orc_v8hi", CONST, orcv8hi3)
1522BU_P8V_AV_2 (ORC_V4SI, "orc_v4si", CONST, orcv4si3)
1523BU_P8V_AV_2 (ORC_V2DI, "orc_v2di", CONST, orcv2di3)
a16a872d 1524BU_P8V_AV_2 (ORC_V1TI, "orc_v1ti", CONST, orcv1ti3)
0bd62dca
MM		 1525BU_P8V_AV_2 (ORC_V4SF, "orc_v4sf", CONST, orcv4sf3)
1526BU_P8V_AV_2 (ORC_V2DF, "orc_v2df", CONST, orcv2df3)
1527
a16a872d 1528/* 3 argument altivec instructions added in ISA 2.07. */
06b39289
MM		 1529BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm)
1530BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq)
1531BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm)
1532BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq)
a16a872d 1533
a5965b52
MM		 1534/* Vector comparison instructions added in ISA 2.07. */
1535BU_P8V_AV_2 (VCMPEQUD, "vcmpequd", CONST, vector_eqv2di)
1536BU_P8V_AV_2 (VCMPGTSD, "vcmpgtsd", CONST, vector_gtv2di)
1537BU_P8V_AV_2 (VCMPGTUD, "vcmpgtud", CONST, vector_gtuv2di)
1538
1539/* Vector comparison predicate instructions added in ISA 2.07. */
1540BU_P8V_AV_P (VCMPEQUD_P, "vcmpequd_p", CONST, vector_eq_v2di_p)
1541BU_P8V_AV_P (VCMPGTSD_P, "vcmpgtsd_p", CONST, vector_gt_v2di_p)
1542BU_P8V_AV_P (VCMPGTUD_P, "vcmpgtud_p", CONST, vector_gtu_v2di_p)
1543
1544/* ISA 2.07 vector overloaded 1 argument functions. */
1545BU_P8V_OVERLOAD_1 (VUPKHSW, "vupkhsw")
1546BU_P8V_OVERLOAD_1 (VUPKLSW, "vupklsw")
0bd62dca
MM		 1547BU_P8V_OVERLOAD_1 (VCLZ, "vclz")
1548BU_P8V_OVERLOAD_1 (VCLZB, "vclzb")
1549BU_P8V_OVERLOAD_1 (VCLZH, "vclzh")
1550BU_P8V_OVERLOAD_1 (VCLZW, "vclzw")
1551BU_P8V_OVERLOAD_1 (VCLZD, "vclzd")
1552BU_P8V_OVERLOAD_1 (VPOPCNT, "vpopcnt")
1553BU_P8V_OVERLOAD_1 (VPOPCNTB, "vpopcntb")
1554BU_P8V_OVERLOAD_1 (VPOPCNTH, "vpopcnth")
1555BU_P8V_OVERLOAD_1 (VPOPCNTW, "vpopcntw")
1556BU_P8V_OVERLOAD_1 (VPOPCNTD, "vpopcntd")
1557BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")
a5965b52
MM		 1558
1559/* ISA 2.07 vector overloaded 2 argument functions. */
0bd62dca
MM		 1560BU_P8V_OVERLOAD_2 (EQV, "eqv")
1561BU_P8V_OVERLOAD_2 (NAND, "nand")
1562BU_P8V_OVERLOAD_2 (ORC, "orc")
a16a872d 1563BU_P8V_OVERLOAD_2 (VADDCUQ, "vaddcuq")
a5965b52 1564BU_P8V_OVERLOAD_2 (VADDUDM, "vaddudm")
a16a872d 1565BU_P8V_OVERLOAD_2 (VADDUQM, "vadduqm")
117f16fb 1566BU_P8V_OVERLOAD_2 (VBPERMQ, "vbpermq")
a5965b52
MM		 1567BU_P8V_OVERLOAD_2 (VMAXSD, "vmaxsd")
1568BU_P8V_OVERLOAD_2 (VMAXUD, "vmaxud")
1569BU_P8V_OVERLOAD_2 (VMINSD, "vminsd")
1570BU_P8V_OVERLOAD_2 (VMINUD, "vminud")
0bd62dca
MM		 1571BU_P8V_OVERLOAD_2 (VMRGEW, "vmrgew")
1572BU_P8V_OVERLOAD_2 (VMRGOW, "vmrgow")
a5965b52
MM		 1573BU_P8V_OVERLOAD_2 (VPKSDSS, "vpksdss")
1574BU_P8V_OVERLOAD_2 (VPKSDUS, "vpksdus")
1575BU_P8V_OVERLOAD_2 (VPKUDUM, "vpkudum")
1576BU_P8V_OVERLOAD_2 (VPKUDUS, "vpkudus")
6992707b 1577BU_P8V_OVERLOAD_2 (VPMSUM, "vpmsum")
a5965b52
MM		 1578BU_P8V_OVERLOAD_2 (VRLD, "vrld")
1579BU_P8V_OVERLOAD_2 (VSLD, "vsld")
1580BU_P8V_OVERLOAD_2 (VSRAD, "vsrad")
1581BU_P8V_OVERLOAD_2 (VSRD, "vsrd")
a16a872d 1582BU_P8V_OVERLOAD_2 (VSUBCUQ, "vsubcuq")
a5965b52 1583BU_P8V_OVERLOAD_2 (VSUBUDM, "vsubudm")
a16a872d
MM		 1584BU_P8V_OVERLOAD_2 (VSUBUQM, "vsubuqm")
1585
1586/* ISA 2.07 vector overloaded 3 argument functions. */
1587BU_P8V_OVERLOAD_3 (VADDECUQ, "vaddecuq")
1588BU_P8V_OVERLOAD_3 (VADDEUQM, "vaddeuqm")
1589BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq")
1590BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm")
a5965b52 1591
06b39289
MM		 1592\f
1593/* 2 argument extended divide functions added in ISA 2.06. */
1594BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si)
1595BU_P7_MISC_2 (DIVWEO, "divweo", CONST, diveo_si)
1596BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si)
1597BU_P7_MISC_2 (DIVWEUO, "divweuo", CONST, diveuo_si)
1598BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di)
1599BU_P7_MISC_2 (DIVDEO, "divdeo", CONST, diveo_di)
1600BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di)
1601BU_P7_MISC_2 (DIVDEUO, "divdeuo", CONST, diveuo_di)
1602
1603/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */
1604BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd)
1605BU_DFP_MISC_1 (DXEXQ, "dxexq", CONST, dfp_dxex_td)
1606
1607/* 2 argument DFP (decimal floating point) functions added in ISA 2.05. */
1608BU_DFP_MISC_2 (DDEDPD, "ddedpd", CONST, dfp_ddedpd_dd)
1609BU_DFP_MISC_2 (DDEDPDQ, "ddedpdq", CONST, dfp_ddedpd_td)
1610BU_DFP_MISC_2 (DENBCD, "denbcd", CONST, dfp_denbcd_dd)
1611BU_DFP_MISC_2 (DENBCDQ, "denbcdq", CONST, dfp_denbcd_td)
1612BU_DFP_MISC_2 (DIEX, "diex", CONST, dfp_diex_dd)
1613BU_DFP_MISC_2 (DIEXQ, "diexq", CONST, dfp_diex_td)
1614BU_DFP_MISC_2 (DSCLI, "dscli", CONST, dfp_dscli_dd)
1615BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST, dfp_dscli_td)
1616BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd)
1617BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td)
1618
1619/* 1 argument BCD functions added in ISA 2.06. */
1620BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd)
1621BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd)
1622
1623/* 2 argument BCD functions added in ISA 2.06. */
1624BU_P7_MISC_2 (ADDG6S, "addg6s", CONST, addg6s)
1625
1626/* 3 argument BCD functions added in ISA 2.07. */
1627BU_P8V_MISC_3 (BCDADD, "bcdadd", CONST, bcdadd)
1628BU_P8V_MISC_3 (BCDADD_LT, "bcdadd_lt", CONST, bcdadd_lt)
1629BU_P8V_MISC_3 (BCDADD_EQ, "bcdadd_eq", CONST, bcdadd_eq)
1630BU_P8V_MISC_3 (BCDADD_GT, "bcdadd_gt", CONST, bcdadd_gt)
1631BU_P8V_MISC_3 (BCDADD_OV, "bcdadd_ov", CONST, bcdadd_unordered)
1632BU_P8V_MISC_3 (BCDSUB, "bcdsub", CONST, bcdsub)
1633BU_P8V_MISC_3 (BCDSUB_LT, "bcdsub_lt", CONST, bcdsub_lt)
1634BU_P8V_MISC_3 (BCDSUB_EQ, "bcdsub_eq", CONST, bcdsub_eq)
1635BU_P8V_MISC_3 (BCDSUB_GT, "bcdsub_gt", CONST, bcdsub_gt)
1636BU_P8V_MISC_3 (BCDSUB_OV, "bcdsub_ov", CONST, bcdsub_unordered)
1637
1638/* 2 argument pack/unpack 128-bit floating point types. */
1639BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd)
1640BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd)
1641
8241efd1
PB		 1642BU_LDBL128_2 (PACK_TF, "pack_longdouble", CONST, packtf)
1643BU_LDBL128_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf)
06b39289
MM		 1644
1645BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti)
1646BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti)
1647
f62511da
MM		 1648\f
1649/* 1 argument crypto functions. */
1650BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox)
1651
1652/* 2 argument crypto functions. */
1653BU_CRYPTO_2 (VCIPHER, "vcipher", CONST, crypto_vcipher)
1654BU_CRYPTO_2 (VCIPHERLAST, "vcipherlast", CONST, crypto_vcipherlast)
1655BU_CRYPTO_2 (VNCIPHER, "vncipher", CONST, crypto_vncipher)
1656BU_CRYPTO_2 (VNCIPHERLAST, "vncipherlast", CONST, crypto_vncipherlast)
6895fffb
BS		 1657BU_CRYPTO_2A (VPMSUMB, "vpmsumb", CONST, crypto_vpmsumb)
1658BU_CRYPTO_2A (VPMSUMH, "vpmsumh", CONST, crypto_vpmsumh)
1659BU_CRYPTO_2A (VPMSUMW, "vpmsumw", CONST, crypto_vpmsumw)
1660BU_CRYPTO_2A (VPMSUMD, "vpmsumd", CONST, crypto_vpmsumd)
f62511da
MM		 1661
1662/* 3 argument crypto functions. */
6895fffb
BS		 1663BU_CRYPTO_3A (VPERMXOR_V2DI, "vpermxor_v2di", CONST, crypto_vpermxor_v2di)
1664BU_CRYPTO_3A (VPERMXOR_V4SI, "vpermxor_v4si", CONST, crypto_vpermxor_v4si)
1665BU_CRYPTO_3A (VPERMXOR_V8HI, "vpermxor_v8hi", CONST, crypto_vpermxor_v8hi)
1666BU_CRYPTO_3A (VPERMXOR_V16QI, "vpermxor_v16qi", CONST, crypto_vpermxor_v16qi)
f62511da
MM		 1667BU_CRYPTO_3 (VSHASIGMAW, "vshasigmaw", CONST, crypto_vshasigmaw)
1668BU_CRYPTO_3 (VSHASIGMAD, "vshasigmad", CONST, crypto_vshasigmad)
1669
1670/* 2 argument crypto overloaded functions. */
6895fffb 1671BU_CRYPTO_OVERLOAD_2A (VPMSUM, "vpmsum")
f62511da
MM		 1672
1673/* 3 argument crypto overloaded functions. */
6895fffb 1674BU_CRYPTO_OVERLOAD_3A (VPERMXOR, "vpermxor")
f62511da
MM		 1675BU_CRYPTO_OVERLOAD_3 (VSHASIGMA, "vshasigma")
1676
0258b6e4
PB		 1677\f
1678/* HTM functions. */
01f61a78
PB		 1679BU_HTM_1 (TABORT, "tabort", CR, tabort)
1680BU_HTM_3 (TABORTDC, "tabortdc", CR, tabortdc)
1681BU_HTM_3 (TABORTDCI, "tabortdci", CR, tabortdci)
1682BU_HTM_3 (TABORTWC, "tabortwc", CR, tabortwc)
1683BU_HTM_3 (TABORTWCI, "tabortwci", CR, tabortwci)
1684BU_HTM_1 (TBEGIN, "tbegin", CR, tbegin)
1685BU_HTM_0 (TCHECK, "tcheck", CR, tcheck)
1686BU_HTM_1 (TEND, "tend", CR, tend)
1687BU_HTM_0 (TENDALL, "tendall", CR, tend)
1688BU_HTM_0 (TRECHKPT, "trechkpt", CR, trechkpt)
1689BU_HTM_1 (TRECLAIM, "treclaim", CR, treclaim)
1690BU_HTM_0 (TRESUME, "tresume", CR, tsr)
1691BU_HTM_0 (TSUSPEND, "tsuspend", CR, tsr)
1692BU_HTM_1 (TSR, "tsr", CR, tsr)
1693BU_HTM_0 (TTEST, "ttest", CR, ttest)
1694
1695BU_HTM_0 (GET_TFHAR, "get_tfhar", SPR, nothing)
1696BU_HTM_V1 (SET_TFHAR, "set_tfhar", SPR, nothing)
1697BU_HTM_0 (GET_TFIAR, "get_tfiar", SPR, nothing)
1698BU_HTM_V1 (SET_TFIAR, "set_tfiar", SPR, nothing)
1699BU_HTM_0 (GET_TEXASR, "get_texasr", SPR, nothing)
1700BU_HTM_V1 (SET_TEXASR, "set_texasr", SPR, nothing)
1701BU_HTM_0 (GET_TEXASRU, "get_texasru", SPR, nothing)
1702BU_HTM_V1 (SET_TEXASRU, "set_texasru", SPR, nothing)
0258b6e4 1703
7fa14a01
MM		 1704\f
1705/* 3 argument paired floating point builtins. */
1706BU_PAIRED_3 (MSUB, "msub", FP, fmsv2sf4)
1707BU_PAIRED_3 (MADD, "madd", FP, fmav2sf4)
1708BU_PAIRED_3 (MADDS0, "madds0", FP, paired_madds0)
1709BU_PAIRED_3 (MADDS1, "madds1", FP, paired_madds1)
1710BU_PAIRED_3 (NMSUB, "nmsub", FP, nfmsv2sf4)
1711BU_PAIRED_3 (NMADD, "nmadd", FP, nfmav2sf4)
1712BU_PAIRED_3 (SUM0, "sum0", FP, paired_sum0)
1713BU_PAIRED_3 (SUM1, "sum1", FP, paired_sum1)
1714BU_PAIRED_3 (SELV2SF4, "selv2sf4", CONST, selv2sf4)
1715
1716/* 2 argument paired floating point builtins. */
1717BU_PAIRED_2 (DIVV2SF3, "divv2sf3", FP, paired_divv2sf3)
1718BU_PAIRED_2 (ADDV2SF3, "addv2sf3", FP, paired_addv2sf3)
1719BU_PAIRED_2 (SUBV2SF3, "subv2sf3", FP, paired_subv2sf3)
1720BU_PAIRED_2 (MULV2SF3, "mulv2sf3", FP, paired_mulv2sf3)
1721BU_PAIRED_2 (MULS0, "muls0", FP, paired_muls0)
1722BU_PAIRED_2 (MULS1, "muls1", FP, paired_muls1)
1723BU_PAIRED_2 (MERGE00, "merge00", CONST, paired_merge00)
1724BU_PAIRED_2 (MERGE01, "merge01", CONST, paired_merge01)
1725BU_PAIRED_2 (MERGE10, "merge10", CONST, paired_merge10)
1726BU_PAIRED_2 (MERGE11, "merge11", CONST, paired_merge11)
1727
1728/* 1 argument paired floating point builtin functions. */
1729BU_PAIRED_1 (ABSV2SF2, "absv2sf2", CONST, paired_absv2sf2)
1730BU_PAIRED_1 (NABSV2SF2, "nabsv2sf2", CONST, nabsv2sf2)
1731BU_PAIRED_1 (NEGV2SF2, "negv2sf2", CONST, paired_negv2sf2)
1732BU_PAIRED_1 (SQRTV2SF2, "sqrtv2sf2", FP, sqrtv2sf2)
1733BU_PAIRED_1 (RESV2SF, "resv2sf2", FP, resv2sf2)
1734
1735/* PAIRED builtins that are handled as special cases. */
1736BU_PAIRED_X (STX, "stx", MISC)
1737BU_PAIRED_X (LX, "lx", MISC)
1738
1739/* Paired predicates. */
1740BU_PAIRED_P (CMPU0, "cmpu0", CONST, paired_cmpu0)
1741BU_PAIRED_P (CMPU1, "cmpu1", CONST, paired_cmpu1)
1742\f
1743/* PowerPC E500 builtins (SPE). */
1744
1745BU_SPE_2 (EVADDW, "evaddw", MISC, addv2si3)
1746BU_SPE_2 (EVAND, "evand", MISC, andv2si3)
1747BU_SPE_2 (EVANDC, "evandc", MISC, spe_evandc)
1748BU_SPE_2 (EVDIVWS, "evdivws", MISC, divv2si3)
1749BU_SPE_2 (EVDIVWU, "evdivwu", MISC, spe_evdivwu)
1750BU_SPE_2 (EVEQV, "eveqv", MISC, spe_eveqv)
1751BU_SPE_2 (EVFSADD, "evfsadd", MISC, spe_evfsadd)
1752BU_SPE_2 (EVFSDIV, "evfsdiv", MISC, spe_evfsdiv)
1753BU_SPE_2 (EVFSMUL, "evfsmul", MISC, spe_evfsmul)
1754BU_SPE_2 (EVFSSUB, "evfssub", MISC, spe_evfssub)
1755BU_SPE_2 (EVMERGEHI, "evmergehi", MISC, spe_evmergehi)
1756BU_SPE_2 (EVMERGEHILO, "evmergehilo", MISC, spe_evmergehilo)
1757BU_SPE_2 (EVMERGELO, "evmergelo", MISC, spe_evmergelo)
1758BU_SPE_2 (EVMERGELOHI, "evmergelohi", MISC, spe_evmergelohi)
1759BU_SPE_2 (EVMHEGSMFAA, "evmhegsmfaa", MISC, spe_evmhegsmfaa)
1760BU_SPE_2 (EVMHEGSMFAN, "evmhegsmfan", MISC, spe_evmhegsmfan)
1761BU_SPE_2 (EVMHEGSMIAA, "evmhegsmiaa", MISC, spe_evmhegsmiaa)
1762BU_SPE_2 (EVMHEGSMIAN, "evmhegsmian", MISC, spe_evmhegsmian)
1763BU_SPE_2 (EVMHEGUMIAA, "evmhegumiaa", MISC, spe_evmhegumiaa)
1764BU_SPE_2 (EVMHEGUMIAN, "evmhegumian", MISC, spe_evmhegumian)
1765BU_SPE_2 (EVMHESMF, "evmhesmf", MISC, spe_evmhesmf)
1766BU_SPE_2 (EVMHESMFA, "evmhesmfa", MISC, spe_evmhesmfa)
1767BU_SPE_2 (EVMHESMFAAW, "evmhesmfaaw", MISC, spe_evmhesmfaaw)
1768BU_SPE_2 (EVMHESMFANW, "evmhesmfanw", MISC, spe_evmhesmfanw)
1769BU_SPE_2 (EVMHESMI, "evmhesmi", MISC, spe_evmhesmi)
1770BU_SPE_2 (EVMHESMIA, "evmhesmia", MISC, spe_evmhesmia)
1771BU_SPE_2 (EVMHESMIAAW, "evmhesmiaaw", MISC, spe_evmhesmiaaw)
1772BU_SPE_2 (EVMHESMIANW, "evmhesmianw", MISC, spe_evmhesmianw)
1773BU_SPE_2 (EVMHESSF, "evmhessf", MISC, spe_evmhessf)
1774BU_SPE_2 (EVMHESSFA, "evmhessfa", MISC, spe_evmhessfa)
1775BU_SPE_2 (EVMHESSFAAW, "evmhessfaaw", MISC, spe_evmhessfaaw)
1776BU_SPE_2 (EVMHESSFANW, "evmhessfanw", MISC, spe_evmhessfanw)
1777BU_SPE_2 (EVMHESSIAAW, "evmhessiaaw", MISC, spe_evmhessiaaw)
1778BU_SPE_2 (EVMHESSIANW, "evmhessianw", MISC, spe_evmhessianw)
1779BU_SPE_2 (EVMHEUMI, "evmheumi", MISC, spe_evmheumi)
1780BU_SPE_2 (EVMHEUMIA, "evmheumia", MISC, spe_evmheumia)
1781BU_SPE_2 (EVMHEUMIAAW, "evmheumiaaw", MISC, spe_evmheumiaaw)
1782BU_SPE_2 (EVMHEUMIANW, "evmheumianw", MISC, spe_evmheumianw)
1783BU_SPE_2 (EVMHEUSIAAW, "evmheusiaaw", MISC, spe_evmheusiaaw)
1784BU_SPE_2 (EVMHEUSIANW, "evmheusianw", MISC, spe_evmheusianw)
1785BU_SPE_2 (EVMHOGSMFAA, "evmhogsmfaa", MISC, spe_evmhogsmfaa)
1786BU_SPE_2 (EVMHOGSMFAN, "evmhogsmfan", MISC, spe_evmhogsmfan)
1787BU_SPE_2 (EVMHOGSMIAA, "evmhogsmiaa", MISC, spe_evmhogsmiaa)
1788BU_SPE_2 (EVMHOGSMIAN, "evmhogsmian", MISC, spe_evmhogsmian)
1789BU_SPE_2 (EVMHOGUMIAA, "evmhogumiaa", MISC, spe_evmhogumiaa)
1790BU_SPE_2 (EVMHOGUMIAN, "evmhogumian", MISC, spe_evmhogumian)
1791BU_SPE_2 (EVMHOSMF, "evmhosmf", MISC, spe_evmhosmf)
1792BU_SPE_2 (EVMHOSMFA, "evmhosmfa", MISC, spe_evmhosmfa)
1793BU_SPE_2 (EVMHOSMFAAW, "evmhosmfaaw", MISC, spe_evmhosmfaaw)
1794BU_SPE_2 (EVMHOSMFANW, "evmhosmfanw", MISC, spe_evmhosmfanw)
1795BU_SPE_2 (EVMHOSMI, "evmhosmi", MISC, spe_evmhosmi)
1796BU_SPE_2 (EVMHOSMIA, "evmhosmia", MISC, spe_evmhosmia)
1797BU_SPE_2 (EVMHOSMIAAW, "evmhosmiaaw", MISC, spe_evmhosmiaaw)
1798BU_SPE_2 (EVMHOSMIANW, "evmhosmianw", MISC, spe_evmhosmianw)
1799BU_SPE_2 (EVMHOSSF, "evmhossf", MISC, spe_evmhossf)
1800BU_SPE_2 (EVMHOSSFA, "evmhossfa", MISC, spe_evmhossfa)
1801BU_SPE_2 (EVMHOSSFAAW, "evmhossfaaw", MISC, spe_evmhossfaaw)
1802BU_SPE_2 (EVMHOSSFANW, "evmhossfanw", MISC, spe_evmhossfanw)
1803BU_SPE_2 (EVMHOSSIAAW, "evmhossiaaw", MISC, spe_evmhossiaaw)
1804BU_SPE_2 (EVMHOSSIANW, "evmhossianw", MISC, spe_evmhossianw)
1805BU_SPE_2 (EVMHOUMI, "evmhoumi", MISC, spe_evmhoumi)
1806BU_SPE_2 (EVMHOUMIA, "evmhoumia", MISC, spe_evmhoumia)
1807BU_SPE_2 (EVMHOUMIAAW, "evmhoumiaaw", MISC, spe_evmhoumiaaw)
1808BU_SPE_2 (EVMHOUMIANW, "evmhoumianw", MISC, spe_evmhoumianw)
1809BU_SPE_2 (EVMHOUSIAAW, "evmhousiaaw", MISC, spe_evmhousiaaw)
1810BU_SPE_2 (EVMHOUSIANW, "evmhousianw", MISC, spe_evmhousianw)
1811BU_SPE_2 (EVMWHSMF, "evmwhsmf", MISC, spe_evmwhsmf)
1812BU_SPE_2 (EVMWHSMFA, "evmwhsmfa", MISC, spe_evmwhsmfa)
1813BU_SPE_2 (EVMWHSMI, "evmwhsmi", MISC, spe_evmwhsmi)
1814BU_SPE_2 (EVMWHSMIA, "evmwhsmia", MISC, spe_evmwhsmia)
1815BU_SPE_2 (EVMWHSSF, "evmwhssf", MISC, spe_evmwhssf)
1816BU_SPE_2 (EVMWHSSFA, "evmwhssfa", MISC, spe_evmwhssfa)
1817BU_SPE_2 (EVMWHUMI, "evmwhumi", MISC, spe_evmwhumi)
1818BU_SPE_2 (EVMWHUMIA, "evmwhumia", MISC, spe_evmwhumia)
1819BU_SPE_2 (EVMWLSMIAAW, "evmwlsmiaaw", MISC, spe_evmwlsmiaaw)
1820BU_SPE_2 (EVMWLSMIANW, "evmwlsmianw", MISC, spe_evmwlsmianw)
1821BU_SPE_2 (EVMWLSSIAAW, "evmwlssiaaw", MISC, spe_evmwlssiaaw)
1822BU_SPE_2 (EVMWLSSIANW, "evmwlssianw", MISC, spe_evmwlssianw)
1823BU_SPE_2 (EVMWLUMI, "evmwlumi", MISC, spe_evmwlumi)
1824BU_SPE_2 (EVMWLUMIA, "evmwlumia", MISC, spe_evmwlumia)
1825BU_SPE_2 (EVMWLUMIAAW, "evmwlumiaaw", MISC, spe_evmwlumiaaw)
1826BU_SPE_2 (EVMWLUMIANW, "evmwlumianw", MISC, spe_evmwlumianw)
1827BU_SPE_2 (EVMWLUSIAAW, "evmwlusiaaw", MISC, spe_evmwlusiaaw)
1828BU_SPE_2 (EVMWLUSIANW, "evmwlusianw", MISC, spe_evmwlusianw)
1829BU_SPE_2 (EVMWSMF, "evmwsmf", MISC, spe_evmwsmf)
1830BU_SPE_2 (EVMWSMFA, "evmwsmfa", MISC, spe_evmwsmfa)
1831BU_SPE_2 (EVMWSMFAA, "evmwsmfaa", MISC, spe_evmwsmfaa)
1832BU_SPE_2 (EVMWSMFAN, "evmwsmfan", MISC, spe_evmwsmfan)
1833BU_SPE_2 (EVMWSMI, "evmwsmi", MISC, spe_evmwsmi)
1834BU_SPE_2 (EVMWSMIA, "evmwsmia", MISC, spe_evmwsmia)
1835BU_SPE_2 (EVMWSMIAA, "evmwsmiaa", MISC, spe_evmwsmiaa)
1836BU_SPE_2 (EVMWSMIAN, "evmwsmian", MISC, spe_evmwsmian)
1837BU_SPE_2 (EVMWSSF, "evmwssf", MISC, spe_evmwssf)
1838BU_SPE_2 (EVMWSSFA, "evmwssfa", MISC, spe_evmwssfa)
1839BU_SPE_2 (EVMWSSFAA, "evmwssfaa", MISC, spe_evmwssfaa)
1840BU_SPE_2 (EVMWSSFAN, "evmwssfan", MISC, spe_evmwssfan)
1841BU_SPE_2 (EVMWUMI, "evmwumi", MISC, spe_evmwumi)
1842BU_SPE_2 (EVMWUMIA, "evmwumia", MISC, spe_evmwumia)
1843BU_SPE_2 (EVMWUMIAA, "evmwumiaa", MISC, spe_evmwumiaa)
1844BU_SPE_2 (EVMWUMIAN, "evmwumian", MISC, spe_evmwumian)
1845BU_SPE_2 (EVNAND, "evnand", MISC, spe_evnand)
1846BU_SPE_2 (EVNOR, "evnor", MISC, spe_evnor)
1847BU_SPE_2 (EVOR, "evor", MISC, spe_evor)
1848BU_SPE_2 (EVORC, "evorc", MISC, spe_evorc)
1849BU_SPE_2 (EVRLW, "evrlw", MISC, spe_evrlw)
1850BU_SPE_2 (EVSLW, "evslw", MISC, spe_evslw)
1851BU_SPE_2 (EVSRWS, "evsrws", MISC, spe_evsrws)
1852BU_SPE_2 (EVSRWU, "evsrwu", MISC, spe_evsrwu)
1853BU_SPE_2 (EVSUBFW, "evsubfw", MISC, subv2si3)
1854
1855/* SPE binary operations expecting a 5-bit unsigned literal. */
1856BU_SPE_2 (EVADDIW, "evaddiw", MISC, spe_evaddiw)
1857
1858BU_SPE_2 (EVRLWI, "evrlwi", MISC, spe_evrlwi)
1859BU_SPE_2 (EVSLWI, "evslwi", MISC, spe_evslwi)
1860BU_SPE_2 (EVSRWIS, "evsrwis", MISC, spe_evsrwis)
1861BU_SPE_2 (EVSRWIU, "evsrwiu", MISC, spe_evsrwiu)
1862BU_SPE_2 (EVSUBIFW, "evsubifw", MISC, spe_evsubifw)
1863BU_SPE_2 (EVMWHSSFAA, "evmwhssfaa", MISC, spe_evmwhssfaa)
1864BU_SPE_2 (EVMWHSSMAA, "evmwhssmaa", MISC, spe_evmwhssmaa)
1865BU_SPE_2 (EVMWHSMFAA, "evmwhsmfaa", MISC, spe_evmwhsmfaa)
1866BU_SPE_2 (EVMWHSMIAA, "evmwhsmiaa", MISC, spe_evmwhsmiaa)
1867BU_SPE_2 (EVMWHUSIAA, "evmwhusiaa", MISC, spe_evmwhusiaa)
1868BU_SPE_2 (EVMWHUMIAA, "evmwhumiaa", MISC, spe_evmwhumiaa)
1869BU_SPE_2 (EVMWHSSFAN, "evmwhssfan", MISC, spe_evmwhssfan)
1870BU_SPE_2 (EVMWHSSIAN, "evmwhssian", MISC, spe_evmwhssian)
1871BU_SPE_2 (EVMWHSMFAN, "evmwhsmfan", MISC, spe_evmwhsmfan)
1872BU_SPE_2 (EVMWHSMIAN, "evmwhsmian", MISC, spe_evmwhsmian)
1873BU_SPE_2 (EVMWHUSIAN, "evmwhusian", MISC, spe_evmwhusian)
1874BU_SPE_2 (EVMWHUMIAN, "evmwhumian", MISC, spe_evmwhumian)
1875BU_SPE_2 (EVMWHGSSFAA, "evmwhgssfaa", MISC, spe_evmwhgssfaa)
1876BU_SPE_2 (EVMWHGSMFAA, "evmwhgsmfaa", MISC, spe_evmwhgsmfaa)
1877BU_SPE_2 (EVMWHGSMIAA, "evmwhgsmiaa", MISC, spe_evmwhgsmiaa)
1878BU_SPE_2 (EVMWHGUMIAA, "evmwhgumiaa", MISC, spe_evmwhgumiaa)
1879BU_SPE_2 (EVMWHGSSFAN, "evmwhgssfan", MISC, spe_evmwhgssfan)
1880BU_SPE_2 (EVMWHGSMFAN, "evmwhgsmfan", MISC, spe_evmwhgsmfan)
1881BU_SPE_2 (EVMWHGSMIAN, "evmwhgsmian", MISC, spe_evmwhgsmian)
1882BU_SPE_2 (EVMWHGUMIAN, "evmwhgumian", MISC, spe_evmwhgumian)
1883BU_SPE_2 (BRINC, "brinc", MISC, spe_brinc)
1884BU_SPE_2 (EVXOR, "evxor", MISC, xorv2si3)
1885
1886/* SPE predicate builtins. */
1887BU_SPE_P (EVCMPEQ, "evcmpeq", MISC, spe_evcmpeq)
1888BU_SPE_P (EVCMPGTS, "evcmpgts", MISC, spe_evcmpgts)
1889BU_SPE_P (EVCMPGTU, "evcmpgtu", MISC, spe_evcmpgtu)
1890BU_SPE_P (EVCMPLTS, "evcmplts", MISC, spe_evcmplts)
1891BU_SPE_P (EVCMPLTU, "evcmpltu", MISC, spe_evcmpltu)
1892BU_SPE_P (EVFSCMPEQ, "evfscmpeq", MISC, spe_evfscmpeq)
1893BU_SPE_P (EVFSCMPGT, "evfscmpgt", MISC, spe_evfscmpgt)
1894BU_SPE_P (EVFSCMPLT, "evfscmplt", MISC, spe_evfscmplt)
1895BU_SPE_P (EVFSTSTEQ, "evfststeq", MISC, spe_evfststeq)
1896BU_SPE_P (EVFSTSTGT, "evfststgt", MISC, spe_evfststgt)
1897BU_SPE_P (EVFSTSTLT, "evfststlt", MISC, spe_evfststlt)
1898
1899/* SPE evsel builtins. */
1900BU_SPE_E (EVSEL_CMPGTS, "evsel_gts", MISC, spe_evcmpgts)
1901BU_SPE_E (EVSEL_CMPGTU, "evsel_gtu", MISC, spe_evcmpgtu)
1902BU_SPE_E (EVSEL_CMPLTS, "evsel_lts", MISC, spe_evcmplts)
1903BU_SPE_E (EVSEL_CMPLTU, "evsel_ltu", MISC, spe_evcmpltu)
1904BU_SPE_E (EVSEL_CMPEQ, "evsel_eq", MISC, spe_evcmpeq)
1905BU_SPE_E (EVSEL_FSCMPGT, "evsel_fsgt", MISC, spe_evfscmpgt)
1906BU_SPE_E (EVSEL_FSCMPLT, "evsel_fslt", MISC, spe_evfscmplt)
1907BU_SPE_E (EVSEL_FSCMPEQ, "evsel_fseq", MISC, spe_evfscmpeq)
1908BU_SPE_E (EVSEL_FSTSTGT, "evsel_fststgt", MISC, spe_evfststgt)
1909BU_SPE_E (EVSEL_FSTSTLT, "evsel_fststlt", MISC, spe_evfststlt)
1910BU_SPE_E (EVSEL_FSTSTEQ, "evsel_fststeq", MISC, spe_evfststeq)
1911
1912BU_SPE_1 (EVABS, "evabs", CONST, absv2si2)
1913BU_SPE_1 (EVADDSMIAAW, "evaddsmiaaw", CONST, spe_evaddsmiaaw)
1914BU_SPE_1 (EVADDSSIAAW, "evaddssiaaw", CONST, spe_evaddssiaaw)
1915BU_SPE_1 (EVADDUMIAAW, "evaddumiaaw", CONST, spe_evaddumiaaw)
1916BU_SPE_1 (EVADDUSIAAW, "evaddusiaaw", CONST, spe_evaddusiaaw)
1917BU_SPE_1 (EVCNTLSW, "evcntlsw", CONST, spe_evcntlsw)
1918BU_SPE_1 (EVCNTLZW, "evcntlzw", CONST, spe_evcntlzw)
1919BU_SPE_1 (EVEXTSB, "evextsb", CONST, spe_evextsb)
1920BU_SPE_1 (EVEXTSH, "evextsh", CONST, spe_evextsh)
1921BU_SPE_1 (EVFSABS, "evfsabs", CONST, spe_evfsabs)
1922BU_SPE_1 (EVFSCFSF, "evfscfsf", CONST, spe_evfscfsf)
1923BU_SPE_1 (EVFSCFSI, "evfscfsi", CONST, spe_evfscfsi)
1924BU_SPE_1 (EVFSCFUF, "evfscfuf", CONST, spe_evfscfuf)
1925BU_SPE_1 (EVFSCFUI, "evfscfui", CONST, spe_evfscfui)
1926BU_SPE_1 (EVFSCTSF, "evfsctsf", CONST, spe_evfsctsf)
1927BU_SPE_1 (EVFSCTSI, "evfsctsi", CONST, spe_evfsctsi)
1928BU_SPE_1 (EVFSCTSIZ, "evfsctsiz", CONST, spe_evfsctsiz)
1929BU_SPE_1 (EVFSCTUF, "evfsctuf", CONST, spe_evfsctuf)
1930BU_SPE_1 (EVFSCTUI, "evfsctui", CONST, spe_evfsctui)
1931BU_SPE_1 (EVFSCTUIZ, "evfsctuiz", CONST, spe_evfsctuiz)
1932BU_SPE_1 (EVFSNABS, "evfsnabs", CONST, spe_evfsnabs)
1933BU_SPE_1 (EVFSNEG, "evfsneg", CONST, spe_evfsneg)
1934BU_SPE_1 (EVMRA, "evmra", CONST, spe_evmra)
1935BU_SPE_1 (EVNEG, "evneg", CONST, negv2si2)
1936BU_SPE_1 (EVRNDW, "evrndw", CONST, spe_evrndw)
1937BU_SPE_1 (EVSUBFSMIAAW, "evsubfsmiaaw", CONST, spe_evsubfsmiaaw)
1938BU_SPE_1 (EVSUBFSSIAAW, "evsubfssiaaw", CONST, spe_evsubfssiaaw)
1939BU_SPE_1 (EVSUBFUMIAAW, "evsubfumiaaw", CONST, spe_evsubfumiaaw)
1940BU_SPE_1 (EVSUBFUSIAAW, "evsubfusiaaw", CONST, spe_evsubfusiaaw)
1941
1942/* SPE builtins that are handled as special cases. */
1943BU_SPE_X (EVLDD, "evldd", MISC)
1944BU_SPE_X (EVLDDX, "evlddx", MISC)
1945BU_SPE_X (EVLDH, "evldh", MISC)
1946BU_SPE_X (EVLDHX, "evldhx", MISC)
1947BU_SPE_X (EVLDW, "evldw", MISC)
1948BU_SPE_X (EVLDWX, "evldwx", MISC)
1949BU_SPE_X (EVLHHESPLAT, "evlhhesplat", MISC)
1950BU_SPE_X (EVLHHESPLATX, "evlhhesplatx", MISC)
1951BU_SPE_X (EVLHHOSSPLAT, "evlhhossplat", MISC)
1952BU_SPE_X (EVLHHOSSPLATX, "evlhhossplatx", MISC)
1953BU_SPE_X (EVLHHOUSPLAT, "evlhhousplat", MISC)
1954BU_SPE_X (EVLHHOUSPLATX, "evlhhousplatx", MISC)
1955BU_SPE_X (EVLWHE, "evlwhe", MISC)
1956BU_SPE_X (EVLWHEX, "evlwhex", MISC)
1957BU_SPE_X (EVLWHOS, "evlwhos", MISC)
1958BU_SPE_X (EVLWHOSX, "evlwhosx", MISC)
1959BU_SPE_X (EVLWHOU, "evlwhou", MISC)
1960BU_SPE_X (EVLWHOUX, "evlwhoux", MISC)
1961BU_SPE_X (EVLWHSPLAT, "evlwhsplat", MISC)
1962BU_SPE_X (EVLWHSPLATX, "evlwhsplatx", MISC)
1963BU_SPE_X (EVLWWSPLAT, "evlwwsplat", MISC)
1964BU_SPE_X (EVLWWSPLATX, "evlwwsplatx", MISC)
1965BU_SPE_X (EVSPLATFI, "evsplatfi", MISC)
1966BU_SPE_X (EVSPLATI, "evsplati", MISC)
1967BU_SPE_X (EVSTDD, "evstdd", MISC)
1968BU_SPE_X (EVSTDDX, "evstddx", MISC)
1969BU_SPE_X (EVSTDH, "evstdh", MISC)
1970BU_SPE_X (EVSTDHX, "evstdhx", MISC)
1971BU_SPE_X (EVSTDW, "evstdw", MISC)
1972BU_SPE_X (EVSTDWX, "evstdwx", MISC)
1973BU_SPE_X (EVSTWHE, "evstwhe", MISC)
1974BU_SPE_X (EVSTWHEX, "evstwhex", MISC)
1975BU_SPE_X (EVSTWHO, "evstwho", MISC)
1976BU_SPE_X (EVSTWHOX, "evstwhox", MISC)
1977BU_SPE_X (EVSTWWE, "evstwwe", MISC)
1978BU_SPE_X (EVSTWWEX, "evstwwex", MISC)
1979BU_SPE_X (EVSTWWO, "evstwwo", MISC)
1980BU_SPE_X (EVSTWWOX, "evstwwox", MISC)
1981BU_SPE_X (MFSPEFSCR, "mfspefscr", MISC)
1982BU_SPE_X (MTSPEFSCR, "mtspefscr", MISC)
1983
1984\f
1c9df37c 1985/* Power7 builtins, that aren't VSX instructions. */
7fa14a01
MM		 1986BU_SPECIAL_X (POWER7_BUILTIN_BPERMD, "__builtin_bpermd", RS6000_BTM_POPCNTD,
1987 RS6000_BTC_CONST)
1c9df37c
MM		 1988
1989/* Miscellaneous builtins. */
7fa14a01
MM		 1990BU_SPECIAL_X (RS6000_BUILTIN_RECIP, "__builtin_recipdiv", RS6000_BTM_FRE,
1991 RS6000_BTC_FP)
1992
1993BU_SPECIAL_X (RS6000_BUILTIN_RECIPF, "__builtin_recipdivf", RS6000_BTM_FRES,
1994 RS6000_BTC_FP)
1995
1996BU_SPECIAL_X (RS6000_BUILTIN_RSQRT, "__builtin_rsqrt", RS6000_BTM_FRSQRTE,
1997 RS6000_BTC_FP)
1998
1999BU_SPECIAL_X (RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf", RS6000_BTM_FRSQRTES,
2000 RS6000_BTC_FP)
2001
0efbf084 2002BU_SPECIAL_X (RS6000_BUILTIN_GET_TB, "__builtin_ppc_get_timebase",
0258b6e4 2003 RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
0efbf084
DE		 2004
2005BU_SPECIAL_X (RS6000_BUILTIN_MFTB, "__builtin_ppc_mftb",
0258b6e4 2006 RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
0efbf084 2007
c82846bc
DE		 2008BU_SPECIAL_X (RS6000_BUILTIN_MFFS, "__builtin_mffs",
2009 RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
2010
2011RS6000_BUILTIN_X (RS6000_BUILTIN_MTFSF, "__builtin_mtfsf",
2012 RS6000_BTM_ALWAYS,
2013 RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID,
2014 CODE_FOR_rs6000_mtfsf)
2015
d1d46f9f 2016/* Darwin CfString builtin. */
a441dedb 2017BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,
7fa14a01 2018 RS6000_BTC_MISC)
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