projects / thirdparty / gcc.git / blame
| Commit | Line | Data |
|---|---|---|
| c28a7c24 | 1 | /* Subroutines for the C front end on the PowerPC architecture. |
| 23a5b65a | 2 | Copyright (C) 2002-2014 Free Software Foundation, Inc. |
| a5c76ee6 ZW |
3 | |
| 4 | Contributed by Zack Weinberg <zack@codesourcery.com> | |
| 58646b77 | 5 | and Paolo Bonzini <bonzini@gnu.org> |
| a5c76ee6 | 6 | |
| 5de601cf | 7 | This file is part of GCC. |
| a5c76ee6 | 8 | |
| 5de601cf NC |
9 | GCC is free software; you can redistribute it and/or modify it |
| 10 | under the terms of the GNU General Public License as published | |
| 2f83c7d6 | 11 | by the Free Software Foundation; either version 3, or (at your |
| 5de601cf | 12 | option) any later version. |
| a5c76ee6 | 13 | |
| 5de601cf NC |
14 | GCC is distributed in the hope that it will be useful, but WITHOUT |
| 15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 17 | License for more details. | |
| a5c76ee6 | 18 | |
| 5de601cf | 19 | You should have received a copy of the GNU General Public License |
| 2f83c7d6 NC |
20 | along with GCC; see the file COPYING3. If not see |
| 21 | <http://www.gnu.org/licenses/>. */ | |
| a5c76ee6 ZW |
22 | |
| 23 | #include "config.h" | |
| 24 | #include "system.h" | |
| 4977bab6 ZW |
25 | #include "coretypes.h" |
| 26 | #include "tm.h" | |
| a5c76ee6 ZW |
27 | #include "cpplib.h" |
| 28 | #include "tree.h" | |
| d8a2d370 DN |
29 | #include "stor-layout.h" |
| 30 | #include "stringpool.h" | |
| 807e902e | 31 | #include "wide-int.h" |
| 39dabefd SB |
32 | #include "c-family/c-common.h" |
| 33 | #include "c-family/c-pragma.h" | |
| 718f9c0f | 34 | #include "diagnostic-core.h" |
| a5c76ee6 | 35 | #include "tm_p.h" |
| 58646b77 PB |
36 | #include "target.h" |
| 37 | #include "langhooks.h" | |
| 38 | ||
| 39 | ||
| 40 | ||
| a5c76ee6 ZW |
41 | /* Handle the machine specific pragma longcall. Its syntax is |
| 42 | ||
| 43 | # pragma longcall ( TOGGLE ) | |
| 44 | ||
| 45 | where TOGGLE is either 0 or 1. | |
| 46 | ||
| 47 | rs6000_default_long_calls is set to the value of TOGGLE, changing | |
| 48 | whether or not new function declarations receive a longcall | |
| 49 | attribute by default. */ | |
| 50 | ||
| b9b8dde3 DD |
51 | #define SYNTAX_ERROR(gmsgid) do { \ |
| 52 | warning (OPT_Wpragmas, gmsgid); \ | |
| 53 | warning (OPT_Wpragmas, "ignoring malformed #pragma longcall"); \ | |
| 54 | return; \ | |
| a5c76ee6 ZW |
55 | } while (0) |
| 56 | ||
| 57 | void | |
| a2369ed3 | 58 | rs6000_pragma_longcall (cpp_reader *pfile ATTRIBUTE_UNUSED) |
| a5c76ee6 ZW |
59 | { |
| 60 | tree x, n; | |
| 61 | ||
| 62 | /* If we get here, generic code has already scanned the directive | |
| 63 | leader and the word "longcall". */ | |
| 64 | ||
| 75ce3d48 | 65 | if (pragma_lex (&x) != CPP_OPEN_PAREN) |
| a5c76ee6 | 66 | SYNTAX_ERROR ("missing open paren"); |
| 75ce3d48 | 67 | if (pragma_lex (&n) != CPP_NUMBER) |
| a5c76ee6 | 68 | SYNTAX_ERROR ("missing number"); |
| 75ce3d48 | 69 | if (pragma_lex (&x) != CPP_CLOSE_PAREN) |
| a5c76ee6 ZW |
70 | SYNTAX_ERROR ("missing close paren"); |
| 71 | ||
| 72 | if (n != integer_zero_node && n != integer_one_node) | |
| 73 | SYNTAX_ERROR ("number must be 0 or 1"); | |
| 74 | ||
| 75ce3d48 | 75 | if (pragma_lex (&x) != CPP_EOF) |
| b9b8dde3 | 76 | warning (OPT_Wpragmas, "junk at end of #pragma longcall"); |
| a5c76ee6 ZW |
77 | |
| 78 | rs6000_default_long_calls = (n == integer_one_node); | |
| 79 | } | |
| 4c4eb375 GK |
80 | |
| 81 | /* Handle defining many CPP flags based on TARGET_xxx. As a general | |
| 82 | policy, rather than trying to guess what flags a user might want a | |
| 83 | #define for, it's better to define a flag for everything. */ | |
| 84 | ||
| 85 | #define builtin_define(TXT) cpp_define (pfile, TXT) | |
| 86 | #define builtin_assert(TXT) cpp_assert (pfile, TXT) | |
| 87 | ||
| 5950c3c9 | 88 | /* Keep the AltiVec keywords handy for fast comparisons. */ |
| ce26ee21 BE |
89 | static GTY(()) tree __vector_keyword; |
| 90 | static GTY(()) tree vector_keyword; | |
| 91 | static GTY(()) tree __pixel_keyword; | |
| 92 | static GTY(()) tree pixel_keyword; | |
| 93 | static GTY(()) tree __bool_keyword; | |
| 94 | static GTY(()) tree bool_keyword; | |
| 58195b74 | 95 | static GTY(()) tree _Bool_keyword; |
| a16a872d MM |
96 | static GTY(()) tree __int128_type; |
| 97 | static GTY(()) tree __uint128_type; | |
| 5950c3c9 BE |
98 | |
| 99 | /* Preserved across calls. */ | |
| 100 | static tree expand_bool_pixel; | |
| 101 | ||
| 102 | static cpp_hashnode * | |
| 103 | altivec_categorize_keyword (const cpp_token *tok) | |
| 104 | { | |
| 105 | if (tok->type == CPP_NAME) | |
| 106 | { | |
| 7a2738fa | 107 | cpp_hashnode *ident = tok->val.node.node; |
| 5950c3c9 | 108 | |
| a76ddc7b | 109 | if (ident == C_CPP_HASHNODE (vector_keyword)) |
| 5950c3c9 BE |
110 | return C_CPP_HASHNODE (__vector_keyword); |
| 111 | ||
| a76ddc7b | 112 | if (ident == C_CPP_HASHNODE (pixel_keyword)) |
| 5950c3c9 BE |
113 | return C_CPP_HASHNODE (__pixel_keyword); |
| 114 | ||
| a76ddc7b | 115 | if (ident == C_CPP_HASHNODE (bool_keyword)) |
| 5950c3c9 BE |
116 | return C_CPP_HASHNODE (__bool_keyword); |
| 117 | ||
| 58195b74 JJ |
118 | if (ident == C_CPP_HASHNODE (_Bool_keyword)) |
| 119 | return C_CPP_HASHNODE (__bool_keyword); | |
| 120 | ||
| 5950c3c9 BE |
121 | return ident; |
| 122 | } | |
| 123 | ||
| 124 | return 0; | |
| 125 | } | |
| 126 | ||
| 127 | static void | |
| 128 | init_vector_keywords (void) | |
| 129 | { | |
| a16a872d MM |
130 | /* Keywords without two leading underscores are context-sensitive, and hence |
| 131 | implemented as conditional macros, controlled by the | |
| 132 | rs6000_macro_to_expand() function below. If we have ISA 2.07 64-bit | |
| 133 | support, record the __int128_t and __uint128_t types. */ | |
| 5950c3c9 BE |
134 | |
| 135 | __vector_keyword = get_identifier ("__vector"); | |
| 136 | C_CPP_HASHNODE (__vector_keyword)->flags |= NODE_CONDITIONAL; | |
| 137 | ||
| 138 | __pixel_keyword = get_identifier ("__pixel"); | |
| 139 | C_CPP_HASHNODE (__pixel_keyword)->flags |= NODE_CONDITIONAL; | |
| 140 | ||
| 141 | __bool_keyword = get_identifier ("__bool"); | |
| 142 | C_CPP_HASHNODE (__bool_keyword)->flags |= NODE_CONDITIONAL; | |
| 143 | ||
| 144 | vector_keyword = get_identifier ("vector"); | |
| 145 | C_CPP_HASHNODE (vector_keyword)->flags |= NODE_CONDITIONAL; | |
| 146 | ||
| 147 | pixel_keyword = get_identifier ("pixel"); | |
| 148 | C_CPP_HASHNODE (pixel_keyword)->flags |= NODE_CONDITIONAL; | |
| 149 | ||
| 150 | bool_keyword = get_identifier ("bool"); | |
| 151 | C_CPP_HASHNODE (bool_keyword)->flags |= NODE_CONDITIONAL; | |
| 58195b74 JJ |
152 | |
| 153 | _Bool_keyword = get_identifier ("_Bool"); | |
| 154 | C_CPP_HASHNODE (_Bool_keyword)->flags |= NODE_CONDITIONAL; | |
| a16a872d MM |
155 | |
| 156 | if (TARGET_VADDUQM) | |
| 157 | { | |
| 158 | __int128_type = get_identifier ("__int128_t"); | |
| 159 | __uint128_type = get_identifier ("__uint128_t"); | |
| 160 | } | |
| 5950c3c9 BE |
161 | } |
| 162 | ||
| 92d0307d DD |
163 | /* Helper function to find out which RID_INT_N_* code is the one for |
| 164 | __int128, if any. Returns RID_MAX+1 if none apply, which is safe | |
| 165 | (for our purposes, since we always expect to have __int128) to | |
| 166 | compare against. */ | |
| 167 | static int | |
| 168 | rid_int128(void) | |
| 169 | { | |
| 170 | int i; | |
| 171 | ||
| 172 | for (i = 0; i < NUM_INT_N_ENTS; i ++) | |
| 173 | if (int_n_enabled_p[i] | |
| 174 | && int_n_data[i].bitsize == 128) | |
| 175 | return RID_INT_N_0 + i; | |
| 176 | ||
| 177 | return RID_MAX + 1; | |
| 178 | } | |
| 179 | ||
| 5950c3c9 BE |
180 | /* Called to decide whether a conditional macro should be expanded. |
| 181 | Since we have exactly one such macro (i.e, 'vector'), we do not | |
| 182 | need to examine the 'tok' parameter. */ | |
| 183 | ||
| 184 | static cpp_hashnode * | |
| 185 | rs6000_macro_to_expand (cpp_reader *pfile, const cpp_token *tok) | |
| 186 | { | |
| 7a2738fa | 187 | cpp_hashnode *expand_this = tok->val.node.node; |
| 5950c3c9 BE |
188 | cpp_hashnode *ident; |
| 189 | ||
| 7fa14a01 MM |
190 | /* If the current machine does not have altivec, don't look for the |
| 191 | keywords. */ | |
| 192 | if (!TARGET_ALTIVEC) | |
| 193 | return NULL; | |
| 194 | ||
| 5950c3c9 BE |
195 | ident = altivec_categorize_keyword (tok); |
| 196 | ||
| a76ddc7b JJ |
197 | if (ident != expand_this) |
| 198 | expand_this = NULL; | |
| 199 | ||
| 5950c3c9 BE |
200 | if (ident == C_CPP_HASHNODE (__vector_keyword)) |
| 201 | { | |
| a76ddc7b JJ |
202 | int idx = 0; |
| 203 | do | |
| 204 | tok = cpp_peek_token (pfile, idx++); | |
| 205 | while (tok->type == CPP_PADDING); | |
| 5950c3c9 BE |
206 | ident = altivec_categorize_keyword (tok); |
| 207 | ||
| a76ddc7b | 208 | if (ident == C_CPP_HASHNODE (__pixel_keyword)) |
| 5950c3c9 BE |
209 | { |
| 210 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 211 | expand_bool_pixel = __pixel_keyword; | |
| 212 | } | |
| 213 | else if (ident == C_CPP_HASHNODE (__bool_keyword)) | |
| 214 | { | |
| 215 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 216 | expand_bool_pixel = __bool_keyword; | |
| 217 | } | |
| 34709a5a MM |
218 | /* The boost libraries have code with Iterator::vector vector in it. If |
| 219 | we allow the normal handling, this module will be called recursively, | |
| 220 | and the vector will be skipped.; */ | |
| 221 | else if (ident && (ident != C_CPP_HASHNODE (__vector_keyword))) | |
| 5950c3c9 BE |
222 | { |
| 223 | enum rid rid_code = (enum rid)(ident->rid_code); | |
| 224 | if (ident->type == NT_MACRO) | |
| 225 | { | |
| a76ddc7b JJ |
226 | do |
| 227 | (void) cpp_get_token (pfile); | |
| 228 | while (--idx > 0); | |
| 229 | do | |
| 230 | tok = cpp_peek_token (pfile, idx++); | |
| 231 | while (tok->type == CPP_PADDING); | |
| 5950c3c9 | 232 | ident = altivec_categorize_keyword (tok); |
| b3bf8855 JJ |
233 | if (ident == C_CPP_HASHNODE (__pixel_keyword)) |
| 234 | { | |
| 235 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 236 | expand_bool_pixel = __pixel_keyword; | |
| 237 | rid_code = RID_MAX; | |
| 238 | } | |
| 239 | else if (ident == C_CPP_HASHNODE (__bool_keyword)) | |
| 240 | { | |
| 241 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 242 | expand_bool_pixel = __bool_keyword; | |
| 243 | rid_code = RID_MAX; | |
| 244 | } | |
| 245 | else if (ident) | |
| 5950c3c9 BE |
246 | rid_code = (enum rid)(ident->rid_code); |
| 247 | } | |
| 248 | ||
| 249 | if (rid_code == RID_UNSIGNED || rid_code == RID_LONG | |
| 250 | || rid_code == RID_SHORT || rid_code == RID_SIGNED | |
| 251 | || rid_code == RID_INT || rid_code == RID_CHAR | |
| 29e6733c | 252 | || rid_code == RID_FLOAT |
| a16a872d | 253 | || (rid_code == RID_DOUBLE && TARGET_VSX) |
| 92d0307d | 254 | || (rid_code == rid_int128 () && TARGET_VADDUQM)) |
| 5950c3c9 BE |
255 | { |
| 256 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 257 | /* If the next keyword is bool or pixel, it | |
| 258 | will need to be expanded as well. */ | |
| a76ddc7b JJ |
259 | do |
| 260 | tok = cpp_peek_token (pfile, idx++); | |
| 261 | while (tok->type == CPP_PADDING); | |
| 5950c3c9 BE |
262 | ident = altivec_categorize_keyword (tok); |
| 263 | ||
| a76ddc7b | 264 | if (ident == C_CPP_HASHNODE (__pixel_keyword)) |
| 5950c3c9 BE |
265 | expand_bool_pixel = __pixel_keyword; |
| 266 | else if (ident == C_CPP_HASHNODE (__bool_keyword)) | |
| 267 | expand_bool_pixel = __bool_keyword; | |
| 268 | else | |
| 269 | { | |
| 270 | /* Try two tokens down, too. */ | |
| a76ddc7b JJ |
271 | do |
| 272 | tok = cpp_peek_token (pfile, idx++); | |
| 273 | while (tok->type == CPP_PADDING); | |
| 5950c3c9 | 274 | ident = altivec_categorize_keyword (tok); |
| a76ddc7b | 275 | if (ident == C_CPP_HASHNODE (__pixel_keyword)) |
| 5950c3c9 BE |
276 | expand_bool_pixel = __pixel_keyword; |
| 277 | else if (ident == C_CPP_HASHNODE (__bool_keyword)) | |
| 278 | expand_bool_pixel = __bool_keyword; | |
| 279 | } | |
| 280 | } | |
| a16a872d MM |
281 | |
| 282 | /* Support vector __int128_t, but we don't need to worry about bool | |
| 283 | or pixel on this type. */ | |
| 284 | else if (TARGET_VADDUQM | |
| 285 | && (ident == C_CPP_HASHNODE (__int128_type) | |
| 286 | || ident == C_CPP_HASHNODE (__uint128_type))) | |
| 287 | expand_this = C_CPP_HASHNODE (__vector_keyword); | |
| 5950c3c9 BE |
288 | } |
| 289 | } | |
| 290 | else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__pixel_keyword)) | |
| 291 | { | |
| 292 | expand_this = C_CPP_HASHNODE (__pixel_keyword); | |
| 293 | expand_bool_pixel = 0; | |
| 294 | } | |
| 295 | else if (expand_bool_pixel && ident == C_CPP_HASHNODE (__bool_keyword)) | |
| 296 | { | |
| 297 | expand_this = C_CPP_HASHNODE (__bool_keyword); | |
| 298 | expand_bool_pixel = 0; | |
| 299 | } | |
| 300 | ||
| 301 | return expand_this; | |
| 302 | } | |
| 303 | ||
| 7fa14a01 MM |
304 | |
| 305 | /* Define or undefine a single macro. */ | |
| 306 | ||
| 307 | static void | |
| 308 | rs6000_define_or_undefine_macro (bool define_p, const char *name) | |
| 309 | { | |
| 310 | if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET) | |
| 311 | fprintf (stderr, "#%s %s\n", (define_p) ? "define" : "undef", name); | |
| 312 | ||
| 313 | if (define_p) | |
| 314 | cpp_define (parse_in, name); | |
| 315 | else | |
| 316 | cpp_undef (parse_in, name); | |
| 317 | } | |
| 318 | ||
| 319 | /* Define or undefine macros based on the current target. If the user does | |
| 320 | #pragma GCC target, we need to adjust the macros dynamically. Note, some of | |
| 321 | the options needed for builtins have been moved to separate variables, so | |
| 322 | have both the target flags and the builtin flags as arguments. */ | |
| 323 | ||
| 324 | void | |
| b85aed95 MM |
325 | rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, |
| 326 | HOST_WIDE_INT bu_mask) | |
| 7fa14a01 MM |
327 | { |
| 328 | if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET) | |
| b85aed95 MM |
329 | fprintf (stderr, |
| 330 | "rs6000_target_modify_macros (%s, " HOST_WIDE_INT_PRINT_HEX | |
| 331 | ", " HOST_WIDE_INT_PRINT_HEX ")\n", | |
| 7fa14a01 | 332 | (define_p) ? "define" : "undef", |
| b85aed95 | 333 | flags, bu_mask); |
| 7fa14a01 | 334 | |
| 4d967549 | 335 | /* rs6000_isa_flags based options. */ |
| a441dedb | 336 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC"); |
| 4d967549 | 337 | if ((flags & OPTION_MASK_PPC_GPOPT) != 0) |
| 7fa14a01 | 338 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCSQ"); |
| 4d967549 | 339 | if ((flags & OPTION_MASK_PPC_GFXOPT) != 0) |
| 7fa14a01 | 340 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PPCGR"); |
| 4d967549 | 341 | if ((flags & OPTION_MASK_POWERPC64) != 0) |
| 7fa14a01 | 342 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PPC64"); |
| 4d967549 | 343 | if ((flags & OPTION_MASK_MFCRF) != 0) |
| 7fa14a01 | 344 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR4"); |
| 4d967549 | 345 | if ((flags & OPTION_MASK_POPCNTB) != 0) |
| 7fa14a01 | 346 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5"); |
| 4d967549 | 347 | if ((flags & OPTION_MASK_FPRND) != 0) |
| 7fa14a01 | 348 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X"); |
| 4d967549 | 349 | if ((flags & OPTION_MASK_CMPB) != 0) |
| 7fa14a01 | 350 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6"); |
| 4d967549 | 351 | if ((flags & OPTION_MASK_MFPGPR) != 0) |
| 7fa14a01 | 352 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6X"); |
| 4d967549 | 353 | if ((flags & OPTION_MASK_POPCNTD) != 0) |
| 7fa14a01 | 354 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7"); |
| f62511da MM |
355 | if ((flags & OPTION_MASK_DIRECT_MOVE) != 0) |
| 356 | rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8"); | |
| 4d967549 | 357 | if ((flags & OPTION_MASK_SOFT_FLOAT) != 0) |
| 7fa14a01 | 358 | rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT"); |
| 4d967549 | 359 | if ((flags & OPTION_MASK_RECIP_PRECISION) != 0) |
| 7fa14a01 | 360 | rs6000_define_or_undefine_macro (define_p, "__RECIP_PRECISION__"); |
| 4d967549 | 361 | if ((flags & OPTION_MASK_ALTIVEC) != 0) |
| 7fa14a01 MM |
362 | { |
| 363 | const char *vec_str = (define_p) ? "__VEC__=10206" : "__VEC__"; | |
| 364 | rs6000_define_or_undefine_macro (define_p, "__ALTIVEC__"); | |
| 365 | rs6000_define_or_undefine_macro (define_p, vec_str); | |
| 366 | ||
| 367 | /* Define this when supporting context-sensitive keywords. */ | |
| 368 | if (!flag_iso) | |
| 369 | rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__"); | |
| 370 | } | |
| 4d967549 | 371 | if ((flags & OPTION_MASK_VSX) != 0) |
| 7fa14a01 | 372 | rs6000_define_or_undefine_macro (define_p, "__VSX__"); |
| 0258b6e4 PB |
373 | if ((flags & OPTION_MASK_HTM) != 0) |
| 374 | rs6000_define_or_undefine_macro (define_p, "__HTM__"); | |
| f62511da MM |
375 | if ((flags & OPTION_MASK_P8_VECTOR) != 0) |
| 376 | rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__"); | |
| b846c948 MM |
377 | if ((flags & OPTION_MASK_QUAD_MEMORY) != 0) |
| 378 | rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY__"); | |
| 379 | if ((flags & OPTION_MASK_QUAD_MEMORY_ATOMIC) != 0) | |
| 380 | rs6000_define_or_undefine_macro (define_p, "__QUAD_MEMORY_ATOMIC__"); | |
| f62511da MM |
381 | if ((flags & OPTION_MASK_CRYPTO) != 0) |
| 382 | rs6000_define_or_undefine_macro (define_p, "__CRYPTO__"); | |
| 7fa14a01 MM |
383 | |
| 384 | /* options from the builtin masks. */ | |
| 385 | if ((bu_mask & RS6000_BTM_SPE) != 0) | |
| 386 | rs6000_define_or_undefine_macro (define_p, "__SPE__"); | |
| 387 | if ((bu_mask & RS6000_BTM_PAIRED) != 0) | |
| 388 | rs6000_define_or_undefine_macro (define_p, "__PAIRED__"); | |
| 389 | if ((bu_mask & RS6000_BTM_CELL) != 0) | |
| 390 | rs6000_define_or_undefine_macro (define_p, "__PPU__"); | |
| 391 | } | |
| 392 | ||
| 4c4eb375 | 393 | void |
| a2369ed3 | 394 | rs6000_cpu_cpp_builtins (cpp_reader *pfile) |
| 4c4eb375 | 395 | { |
| 7fa14a01 | 396 | /* Define all of the common macros. */ |
| 4d967549 | 397 | rs6000_target_modify_macros (true, rs6000_isa_flags, |
| 7fa14a01 MM |
398 | rs6000_builtin_mask_calculate ()); |
| 399 | ||
| 7fa14a01 MM |
400 | if (TARGET_FRE) |
| 401 | builtin_define ("__RECIP__"); | |
| 402 | if (TARGET_FRES) | |
| 403 | builtin_define ("__RECIPF__"); | |
| 404 | if (TARGET_FRSQRTE) | |
| 405 | builtin_define ("__RSQRTE__"); | |
| 406 | if (TARGET_FRSQRTES) | |
| 407 | builtin_define ("__RSQRTEF__"); | |
| 8bb418a3 | 408 | |
| 7fa14a01 MM |
409 | if (TARGET_EXTRA_BUILTINS) |
| 410 | { | |
| 8bb418a3 ZL |
411 | /* Define the AltiVec syntactic elements. */ |
| 412 | builtin_define ("__vector=__attribute__((altivec(vector__)))"); | |
| 413 | builtin_define ("__pixel=__attribute__((altivec(pixel__))) unsigned short"); | |
| 414 | builtin_define ("__bool=__attribute__((altivec(bool__))) unsigned"); | |
| 5950c3c9 BE |
415 | |
| 416 | if (!flag_iso) | |
| 417 | { | |
| 5950c3c9 BE |
418 | builtin_define ("vector=vector"); |
| 419 | builtin_define ("pixel=pixel"); | |
| 420 | builtin_define ("bool=bool"); | |
| 58195b74 | 421 | builtin_define ("_Bool=_Bool"); |
| 5950c3c9 BE |
422 | init_vector_keywords (); |
| 423 | ||
| 424 | /* Enable context-sensitive macros. */ | |
| 425 | cpp_get_callbacks (pfile)->macro_to_expand = rs6000_macro_to_expand; | |
| 426 | } | |
| 8bb418a3 | 427 | } |
| 696e45ba ME |
428 | if ((!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE))) |
| 429 | ||(TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_DOUBLE_FLOAT)) | |
| 17caeff2 | 430 | builtin_define ("_SOFT_DOUBLE"); |
| b4d330e1 DE |
431 | /* Used by lwarx/stwcx. errata work-around. */ |
| 432 | if (rs6000_cpu == PROCESSOR_PPC405) | |
| 433 | builtin_define ("__PPC405__"); | |
| 86098753 JM |
434 | /* Used by libstdc++. */ |
| 435 | if (TARGET_NO_LWSYNC) | |
| 436 | builtin_define ("__NO_LWSYNC__"); | |
| 29e6733c | 437 | |
| 7fa14a01 MM |
438 | if (TARGET_EXTRA_BUILTINS) |
| 439 | { | |
| 29e6733c MM |
440 | /* For the VSX builtin functions identical to Altivec functions, just map |
| 441 | the altivec builtin into the vsx version (the altivec functions | |
| 442 | generate VSX code if -mvsx). */ | |
| 443 | builtin_define ("__builtin_vsx_xxland=__builtin_vec_and"); | |
| 444 | builtin_define ("__builtin_vsx_xxlandc=__builtin_vec_andc"); | |
| 445 | builtin_define ("__builtin_vsx_xxlnor=__builtin_vec_nor"); | |
| 446 | builtin_define ("__builtin_vsx_xxlor=__builtin_vec_or"); | |
| 447 | builtin_define ("__builtin_vsx_xxlxor=__builtin_vec_xor"); | |
| 448 | builtin_define ("__builtin_vsx_xxsel=__builtin_vec_sel"); | |
| 449 | builtin_define ("__builtin_vsx_vperm=__builtin_vec_perm"); | |
| 450 | ||
| 451 | /* Also map the a and m versions of the multiply/add instructions to the | |
| 452 | builtin for people blindly going off the instruction manual. */ | |
| 453 | builtin_define ("__builtin_vsx_xvmaddadp=__builtin_vsx_xvmadddp"); | |
| 454 | builtin_define ("__builtin_vsx_xvmaddmdp=__builtin_vsx_xvmadddp"); | |
| 455 | builtin_define ("__builtin_vsx_xvmaddasp=__builtin_vsx_xvmaddsp"); | |
| 456 | builtin_define ("__builtin_vsx_xvmaddmsp=__builtin_vsx_xvmaddsp"); | |
| 457 | builtin_define ("__builtin_vsx_xvmsubadp=__builtin_vsx_xvmsubdp"); | |
| 458 | builtin_define ("__builtin_vsx_xvmsubmdp=__builtin_vsx_xvmsubdp"); | |
| 459 | builtin_define ("__builtin_vsx_xvmsubasp=__builtin_vsx_xvmsubsp"); | |
| 460 | builtin_define ("__builtin_vsx_xvmsubmsp=__builtin_vsx_xvmsubsp"); | |
| 461 | builtin_define ("__builtin_vsx_xvnmaddadp=__builtin_vsx_xvnmadddp"); | |
| 462 | builtin_define ("__builtin_vsx_xvnmaddmdp=__builtin_vsx_xvnmadddp"); | |
| 463 | builtin_define ("__builtin_vsx_xvnmaddasp=__builtin_vsx_xvnmaddsp"); | |
| 464 | builtin_define ("__builtin_vsx_xvnmaddmsp=__builtin_vsx_xvnmaddsp"); | |
| 465 | builtin_define ("__builtin_vsx_xvnmsubadp=__builtin_vsx_xvnmsubdp"); | |
| 466 | builtin_define ("__builtin_vsx_xvnmsubmdp=__builtin_vsx_xvnmsubdp"); | |
| 467 | builtin_define ("__builtin_vsx_xvnmsubasp=__builtin_vsx_xvnmsubsp"); | |
| 468 | builtin_define ("__builtin_vsx_xvnmsubmsp=__builtin_vsx_xvnmsubsp"); | |
| 469 | } | |
| 470 | ||
| 471 | /* Tell users they can use __builtin_bswap{16,64}. */ | |
| 472 | builtin_define ("__HAVE_BSWAP__"); | |
| 647d340d JT |
473 | |
| 474 | /* May be overridden by target configuration. */ | |
| 475 | RS6000_CPU_CPP_ENDIAN_BUILTINS(); | |
| 476 | ||
| 4c4eb375 | 477 | if (TARGET_LONG_DOUBLE_128) |
| ba6a1b78 DE |
478 | { |
| 479 | builtin_define ("__LONG_DOUBLE_128__"); | |
| 480 | builtin_define ("__LONGDOUBLE128"); | |
| 481 | } | |
| 4c4eb375 | 482 | |
| 7f9f095e AM |
483 | switch (TARGET_CMODEL) |
| 484 | { | |
| 485 | /* Deliberately omit __CMODEL_SMALL__ since that was the default | |
| 486 | before --mcmodel support was added. */ | |
| 487 | case CMODEL_MEDIUM: | |
| 488 | builtin_define ("__CMODEL_MEDIUM__"); | |
| 489 | break; | |
| 490 | case CMODEL_LARGE: | |
| 491 | builtin_define ("__CMODEL_LARGE__"); | |
| 492 | break; | |
| 493 | default: | |
| 494 | break; | |
| 495 | } | |
| 496 | ||
| 4c4eb375 GK |
497 | switch (rs6000_current_abi) |
| 498 | { | |
| 499 | case ABI_V4: | |
| 500 | builtin_define ("_CALL_SYSV"); | |
| 501 | break; | |
| 4c4eb375 GK |
502 | case ABI_AIX: |
| 503 | builtin_define ("_CALL_AIXDESC"); | |
| 504 | builtin_define ("_CALL_AIX"); | |
| b54214fe UW |
505 | builtin_define ("_CALL_ELF=1"); |
| 506 | break; | |
| 507 | case ABI_ELFv2: | |
| 508 | builtin_define ("_CALL_ELF=2"); | |
| 4c4eb375 GK |
509 | break; |
| 510 | case ABI_DARWIN: | |
| 511 | builtin_define ("_CALL_DARWIN"); | |
| 512 | break; | |
| b4d330e1 DE |
513 | default: |
| 514 | break; | |
| 4c4eb375 | 515 | } |
| 58646b77 | 516 | |
| 6800aaee BS |
517 | /* Vector element order. */ |
| 518 | if (BYTES_BIG_ENDIAN || (rs6000_altivec_element_order == 2)) | |
| 519 | builtin_define ("__VEC_ELEMENT_REG_ORDER__=__ORDER_BIG_ENDIAN__"); | |
| 520 | else | |
| 521 | builtin_define ("__VEC_ELEMENT_REG_ORDER__=__ORDER_LITTLE_ENDIAN__"); | |
| 522 | ||
| 89f9fe50 NC |
523 | /* Let the compiled code know if 'f' class registers will not be available. */ |
| 524 | if (TARGET_SOFT_FLOAT || !TARGET_FPRS) | |
| 525 | builtin_define ("__NO_FPRS__"); | |
| 9eca1774 | 526 | |
| b54214fe UW |
527 | /* Whether aggregates passed by value are aligned to a 16 byte boundary |
| 528 | if their alignment is 16 bytes or larger. */ | |
| 529 | if ((TARGET_MACHO && rs6000_darwin64_abi) | |
| 530 | || DEFAULT_ABI == ABI_ELFv2 | |
| 531 | || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm)) | |
| 532 | builtin_define ("__STRUCT_PARM_ALIGN__=16"); | |
| 533 | ||
| 9eca1774 ME |
534 | /* Generate defines for Xilinx FPU. */ |
| 535 | if (rs6000_xilinx_fpu) | |
| 536 | { | |
| 537 | builtin_define ("_XFPU"); | |
| 538 | if (rs6000_single_float && ! rs6000_double_float) | |
| 539 | { | |
| 540 | if (rs6000_simple_fpu) | |
| 541 | builtin_define ("_XFPU_SP_LITE"); | |
| 542 | else | |
| 543 | builtin_define ("_XFPU_SP_FULL"); | |
| 544 | } | |
| 545 | if (rs6000_double_float) | |
| 546 | { | |
| 547 | if (rs6000_simple_fpu) | |
| 548 | builtin_define ("_XFPU_DP_LITE"); | |
| 549 | else | |
| 550 | builtin_define ("_XFPU_DP_FULL"); | |
| 551 | } | |
| 552 | } | |
| 58646b77 PB |
553 | } |
| 554 | ||
| 555 | \f | |
| 556 | struct altivec_builtin_types | |
| 557 | { | |
| 558 | enum rs6000_builtins code; | |
| 559 | enum rs6000_builtins overloaded_code; | |
| 560 | signed char ret_type; | |
| 561 | signed char op1; | |
| 562 | signed char op2; | |
| 563 | signed char op3; | |
| 564 | }; | |
| 565 | ||
| 566 | const struct altivec_builtin_types altivec_overloaded_builtins[] = { | |
| 29e6733c | 567 | /* Unary AltiVec/VSX builtins. */ |
| 58646b77 PB |
568 | { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V16QI, |
| 569 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 570 | { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V8HI, | |
| 571 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 572 | { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SI, | |
| 573 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| a5965b52 MM |
574 | { ALTIVEC_BUILTIN_VEC_ABS, P8V_BUILTIN_ABS_V2DI, |
| 575 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, | |
| 58646b77 PB |
576 | { ALTIVEC_BUILTIN_VEC_ABS, ALTIVEC_BUILTIN_ABS_V4SF, |
| 577 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 29e6733c MM |
578 | { ALTIVEC_BUILTIN_VEC_ABS, VSX_BUILTIN_XVABSDP, |
| 579 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
580 | { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V16QI, |
| 581 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 582 | { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V8HI, | |
| 583 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 584 | { ALTIVEC_BUILTIN_VEC_ABSS, ALTIVEC_BUILTIN_ABSS_V4SI, | |
| 585 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| 586 | { ALTIVEC_BUILTIN_VEC_CEIL, ALTIVEC_BUILTIN_VRFIP, | |
| 587 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 29e6733c MM |
588 | { ALTIVEC_BUILTIN_VEC_CEIL, VSX_BUILTIN_XVRDPIP, |
| 589 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
590 | { ALTIVEC_BUILTIN_VEC_EXPTE, ALTIVEC_BUILTIN_VEXPTEFP, |
| 591 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 29e6733c MM |
592 | { ALTIVEC_BUILTIN_VEC_FLOOR, VSX_BUILTIN_XVRDPIM, |
| 593 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
594 | { ALTIVEC_BUILTIN_VEC_FLOOR, ALTIVEC_BUILTIN_VRFIM, |
| 595 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 596 | { ALTIVEC_BUILTIN_VEC_LOGE, ALTIVEC_BUILTIN_VLOGEFP, | |
| 597 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 598 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 599 | RS6000_BTI_void, RS6000_BTI_V4SI, 0, 0 }, | |
| 600 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 601 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, 0, 0 }, | |
| 602 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 603 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 604 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 605 | RS6000_BTI_void, RS6000_BTI_V8HI, 0, 0 }, | |
| 606 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 607 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 608 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 609 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, 0, 0 }, | |
| 610 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 611 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, 0, 0 }, | |
| 612 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 613 | RS6000_BTI_void, RS6000_BTI_V16QI, 0, 0 }, | |
| 614 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 615 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 616 | { ALTIVEC_BUILTIN_VEC_MTVSCR, ALTIVEC_BUILTIN_MTVSCR, | |
| 617 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, 0, 0 }, | |
| 618 | { ALTIVEC_BUILTIN_VEC_RE, ALTIVEC_BUILTIN_VREFP, | |
| 619 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 92902797 MM |
620 | { ALTIVEC_BUILTIN_VEC_RE, VSX_BUILTIN_XVREDP, |
| 621 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
622 | { ALTIVEC_BUILTIN_VEC_ROUND, ALTIVEC_BUILTIN_VRFIN, |
| 623 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 2ccdda19 BS |
624 | { ALTIVEC_BUILTIN_VEC_ROUND, VSX_BUILTIN_XVRDPI, |
| 625 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 92902797 MM |
626 | { ALTIVEC_BUILTIN_VEC_RECIP, ALTIVEC_BUILTIN_VRECIPFP, |
| 627 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 628 | { ALTIVEC_BUILTIN_VEC_RECIP, VSX_BUILTIN_RECIP_V2DF, | |
| 629 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 630 | { ALTIVEC_BUILTIN_VEC_RSQRT, ALTIVEC_BUILTIN_VRSQRTFP, | |
| 631 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 7fa14a01 | 632 | { ALTIVEC_BUILTIN_VEC_RSQRT, VSX_BUILTIN_RSQRT_2DF, |
| 92902797 | 633 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, |
| 58646b77 PB |
634 | { ALTIVEC_BUILTIN_VEC_RSQRTE, ALTIVEC_BUILTIN_VRSQRTEFP, |
| 635 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 92902797 MM |
636 | { ALTIVEC_BUILTIN_VEC_RSQRTE, VSX_BUILTIN_XVRSQRTEDP, |
| 637 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
638 | { ALTIVEC_BUILTIN_VEC_TRUNC, ALTIVEC_BUILTIN_VRFIZ, |
| 639 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 29e6733c MM |
640 | { ALTIVEC_BUILTIN_VEC_TRUNC, VSX_BUILTIN_XVRDPIZ, |
| 641 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 58646b77 PB |
642 | { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, |
| 643 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, | |
| 644 | { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB, | |
| 00c8e9f6 | 645 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, |
| 58646b77 PB |
646 | { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, |
| 647 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, | |
| 648 | { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH, | |
| 00c8e9f6 | 649 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, |
| a5965b52 MM |
650 | { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, |
| 651 | RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, | |
| 652 | { ALTIVEC_BUILTIN_VEC_UNPACKH, P8V_BUILTIN_VUPKHSW, | |
| 653 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 58646b77 PB |
654 | { ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX, |
| 655 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, | |
| 656 | { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, | |
| 657 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, | |
| 658 | { ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH, | |
| 00c8e9f6 | 659 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, |
| a5965b52 MM |
660 | { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, |
| 661 | RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, | |
| 662 | { ALTIVEC_BUILTIN_VEC_VUPKHSH, P8V_BUILTIN_VUPKHSW, | |
| 663 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 58646b77 PB |
664 | { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, |
| 665 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 666 | { ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX, | |
| 667 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, | |
| 668 | { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, | |
| 669 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, | |
| 670 | { ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB, | |
| 00c8e9f6 | 671 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, |
| 58646b77 PB |
672 | { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, |
| 673 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, | |
| 674 | { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB, | |
| 00c8e9f6 | 675 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, |
| 58646b77 PB |
676 | { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX, |
| 677 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, | |
| 678 | { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, | |
| 679 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, | |
| 680 | { ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH, | |
| 00c8e9f6 | 681 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, |
| a5965b52 MM |
682 | { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, |
| 683 | RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, | |
| 684 | { ALTIVEC_BUILTIN_VEC_UNPACKL, P8V_BUILTIN_VUPKLSW, | |
| 685 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 58646b77 PB |
686 | { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, |
| 687 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 688 | { ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX, | |
| 689 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 }, | |
| 690 | { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, | |
| 691 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 }, | |
| 692 | { ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH, | |
| 00c8e9f6 | 693 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 }, |
| 58646b77 PB |
694 | { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, |
| 695 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 }, | |
| 696 | { ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB, | |
| 00c8e9f6 | 697 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 }, |
| 58646b77 | 698 | |
| 29e6733c | 699 | /* Binary AltiVec/VSX builtins. */ |
| 58646b77 PB |
700 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, |
| 701 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 702 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, | |
| 703 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 704 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, | |
| 705 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 706 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, | |
| 707 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 708 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, | |
| 709 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 710 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM, | |
| 711 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 712 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 713 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 714 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 715 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 716 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 717 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 718 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 719 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 720 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 721 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 722 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUHM, | |
| 723 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 724 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 725 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 726 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 727 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 728 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 729 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 730 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 731 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 732 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 733 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 734 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUWM, | |
| 735 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
736 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, |
| 737 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 738 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, | |
| 739 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 740 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, | |
| 741 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 742 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, | |
| 743 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 744 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, | |
| 745 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 746 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUDM, | |
| 747 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
748 | { ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDFP, |
| 749 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
750 | { ALTIVEC_BUILTIN_VEC_ADD, VSX_BUILTIN_XVADDDP, |
| 751 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| a16a872d MM |
752 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, |
| 753 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 754 | { ALTIVEC_BUILTIN_VEC_ADD, P8V_BUILTIN_VADDUQM, | |
| 755 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 756 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 58646b77 PB |
757 | { ALTIVEC_BUILTIN_VEC_VADDFP, ALTIVEC_BUILTIN_VADDFP, |
| 758 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 759 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 760 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 761 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 762 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 763 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 764 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 765 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 766 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 767 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 768 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 769 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 770 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 771 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 772 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 773 | { ALTIVEC_BUILTIN_VEC_VADDUWM, ALTIVEC_BUILTIN_VADDUWM, | |
| 774 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 775 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 776 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 777 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 778 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 779 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 780 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 781 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 782 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 783 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 784 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 785 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 786 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 787 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 788 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 789 | { ALTIVEC_BUILTIN_VEC_VADDUHM, ALTIVEC_BUILTIN_VADDUHM, | |
| 790 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 791 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 792 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 793 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 794 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 795 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 796 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 797 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 798 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 799 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 800 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 801 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 802 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 803 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 804 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 805 | { ALTIVEC_BUILTIN_VEC_VADDUBM, ALTIVEC_BUILTIN_VADDUBM, | |
| 806 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 807 | { ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VADDCUW, | |
| 808 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 809 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, | |
| 810 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 811 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, | |
| 812 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 813 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUBS, | |
| 814 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 815 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, | |
| 816 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 817 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, | |
| 818 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 819 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSBS, | |
| 820 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 821 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, | |
| 822 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 823 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, | |
| 824 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 825 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUHS, | |
| 826 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 827 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, | |
| 828 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 829 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, | |
| 830 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 831 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSHS, | |
| 832 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 833 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, | |
| 834 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 835 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, | |
| 836 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 837 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDUWS, | |
| 838 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 839 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, | |
| 840 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 841 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, | |
| 842 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 843 | { ALTIVEC_BUILTIN_VEC_ADDS, ALTIVEC_BUILTIN_VADDSWS, | |
| 844 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 845 | { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, | |
| 846 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 847 | { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, | |
| 848 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 849 | { ALTIVEC_BUILTIN_VEC_VADDSWS, ALTIVEC_BUILTIN_VADDSWS, | |
| 850 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 851 | { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, | |
| 852 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 853 | { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, | |
| 854 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 855 | { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, | |
| 856 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 857 | { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, | |
| 858 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 859 | { ALTIVEC_BUILTIN_VEC_VADDUWS, ALTIVEC_BUILTIN_VADDUWS, | |
| 860 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 861 | { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, | |
| 862 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 863 | { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, | |
| 864 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 865 | { ALTIVEC_BUILTIN_VEC_VADDSHS, ALTIVEC_BUILTIN_VADDSHS, | |
| 866 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 867 | { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, | |
| 868 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 869 | { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, | |
| 870 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 871 | { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, | |
| 872 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 873 | { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, | |
| 874 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 875 | { ALTIVEC_BUILTIN_VEC_VADDUHS, ALTIVEC_BUILTIN_VADDUHS, | |
| 876 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 877 | { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, | |
| 878 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 879 | { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, | |
| 880 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 881 | { ALTIVEC_BUILTIN_VEC_VADDSBS, ALTIVEC_BUILTIN_VADDSBS, | |
| 882 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 883 | { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, | |
| 884 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 885 | { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, | |
| 886 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 887 | { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, | |
| 888 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 889 | { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, | |
| 890 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 891 | { ALTIVEC_BUILTIN_VEC_VADDUBS, ALTIVEC_BUILTIN_VADDUBS, | |
| 892 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 893 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 894 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 895 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 896 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, | |
| 897 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 898 | RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, | |
| a72c65c7 MM |
899 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, |
| 900 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 901 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 29e6733c | 902 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, |
| a72c65c7 | 903 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, |
| 29e6733c | 904 | RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, |
| 65fa79c3 BS |
905 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, |
| 906 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 907 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 908 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 909 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 910 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 911 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 912 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 913 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 914 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 915 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 916 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
917 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, |
| 918 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 919 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 920 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 921 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 922 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 923 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 924 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 925 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 926 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 927 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 928 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 929 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 930 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 931 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 932 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 933 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 934 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 935 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 936 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 937 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 938 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 939 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 940 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 941 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 942 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 943 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 944 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 945 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 946 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 947 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 948 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 949 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 950 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 951 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 952 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 953 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 954 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 955 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 956 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 957 | { ALTIVEC_BUILTIN_VEC_AND, ALTIVEC_BUILTIN_VAND, | |
| 958 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 959 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 960 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 961 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 962 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, | |
| 963 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 964 | RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, | |
| a72c65c7 MM |
965 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, |
| 966 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 967 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 29e6733c | 968 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, |
| a72c65c7 | 969 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, |
| 29e6733c | 970 | RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, |
| 65fa79c3 BS |
971 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, |
| 972 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 973 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 974 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 975 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 976 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 977 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 978 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 979 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 980 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 981 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 982 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
983 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, |
| 984 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 985 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 986 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 987 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 988 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 989 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 990 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 991 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 992 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 993 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 994 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 995 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 996 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 997 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 998 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 999 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1000 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1001 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1002 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1003 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1004 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1005 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1006 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1007 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1008 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1009 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1010 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1011 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1012 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1013 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1014 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1015 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1016 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1017 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1018 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1019 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1020 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1021 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1022 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1023 | { ALTIVEC_BUILTIN_VEC_ANDC, ALTIVEC_BUILTIN_VANDC, | |
| 1024 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1025 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUB, | |
| 1026 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1027 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSB, | |
| 1028 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1029 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUH, | |
| 1030 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1031 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSH, | |
| 1032 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1033 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGUW, | |
| 1034 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1035 | { ALTIVEC_BUILTIN_VEC_AVG, ALTIVEC_BUILTIN_VAVGSW, | |
| 1036 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1037 | { ALTIVEC_BUILTIN_VEC_VAVGSW, ALTIVEC_BUILTIN_VAVGSW, | |
| 1038 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1039 | { ALTIVEC_BUILTIN_VEC_VAVGUW, ALTIVEC_BUILTIN_VAVGUW, | |
| 1040 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1041 | { ALTIVEC_BUILTIN_VEC_VAVGSH, ALTIVEC_BUILTIN_VAVGSH, | |
| 1042 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1043 | { ALTIVEC_BUILTIN_VEC_VAVGUH, ALTIVEC_BUILTIN_VAVGUH, | |
| 1044 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1045 | { ALTIVEC_BUILTIN_VEC_VAVGSB, ALTIVEC_BUILTIN_VAVGSB, | |
| 1046 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1047 | { ALTIVEC_BUILTIN_VEC_VAVGUB, ALTIVEC_BUILTIN_VAVGUB, | |
| 1048 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1049 | { ALTIVEC_BUILTIN_VEC_CMPB, ALTIVEC_BUILTIN_VCMPBFP, | |
| 1050 | RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1051 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, | |
| 1052 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1053 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUB, | |
| 1054 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1055 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, | |
| 1056 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1057 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUH, | |
| 1058 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1059 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, | |
| 1060 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1061 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQUW, | |
| 1062 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
1063 | { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, |
| 1064 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1065 | { ALTIVEC_BUILTIN_VEC_CMPEQ, P8V_BUILTIN_VCMPEQUD, | |
| 1066 | RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1067 | { ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP, |
| 1068 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1069 | { ALTIVEC_BUILTIN_VEC_CMPEQ, VSX_BUILTIN_XVCMPEQDP, |
| 1070 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 | 1071 | { ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP, |
| 00c8e9f6 MS |
1072 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, |
| 1073 | ||
| 58646b77 PB |
1074 | { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, |
| 1075 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1076 | { ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW, | |
| 1077 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 00c8e9f6 | 1078 | |
| 58646b77 PB |
1079 | { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, |
| 1080 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1081 | { ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH, | |
| 1082 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 00c8e9f6 | 1083 | |
| 58646b77 PB |
1084 | { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, |
| 1085 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1086 | { ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB, | |
| 1087 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 00c8e9f6 | 1088 | |
| 58646b77 PB |
1089 | { ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP, |
| 1090 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1091 | { ALTIVEC_BUILTIN_VEC_CMPGE, VSX_BUILTIN_XVCMPGEDP, |
| 1092 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 PB |
1093 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB, |
| 1094 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1095 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSB, | |
| 1096 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1097 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUH, | |
| 1098 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1099 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSH, | |
| 1100 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1101 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUW, | |
| 1102 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1103 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTSW, | |
| 1104 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| a5965b52 MM |
1105 | { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTUD, |
| 1106 | RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1107 | { ALTIVEC_BUILTIN_VEC_CMPGT, P8V_BUILTIN_VCMPGTSD, | |
| 1108 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 58646b77 PB |
1109 | { ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP, |
| 1110 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1111 | { ALTIVEC_BUILTIN_VEC_CMPGT, VSX_BUILTIN_XVCMPGTDP, |
| 1112 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 | 1113 | { ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP, |
| 00c8e9f6 | 1114 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, |
| 58646b77 | 1115 | { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW, |
| 00c8e9f6 | 1116 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, |
| 58646b77 PB |
1117 | { ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW, |
| 1118 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1119 | { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW, | |
| 00c8e9f6 | 1120 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, |
| 58646b77 PB |
1121 | { ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW, |
| 1122 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1123 | { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH, | |
| 00c8e9f6 | 1124 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, |
| 58646b77 PB |
1125 | { ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH, |
| 1126 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1127 | { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH, | |
| 00c8e9f6 | 1128 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, |
| 58646b77 PB |
1129 | { ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH, |
| 1130 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1131 | { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB, | |
| 00c8e9f6 | 1132 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, |
| 58646b77 PB |
1133 | { ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB, |
| 1134 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1135 | { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB, | |
| 00c8e9f6 | 1136 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, |
| 58646b77 PB |
1137 | { ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB, |
| 1138 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1139 | { ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP, | |
| 1140 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1141 | { ALTIVEC_BUILTIN_VEC_CMPLE, VSX_BUILTIN_XVCMPGEDP, |
| 1142 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 PB |
1143 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUB, |
| 1144 | RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1145 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSB, | |
| 1146 | RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1147 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUH, | |
| 1148 | RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1149 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSH, | |
| 1150 | RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1151 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTUW, | |
| 1152 | RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1153 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTSW, | |
| 1154 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| a5965b52 MM |
1155 | { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTUD, |
| 1156 | RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1157 | { ALTIVEC_BUILTIN_VEC_CMPLT, P8V_BUILTIN_VCMPGTSD, | |
| 1158 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 58646b77 PB |
1159 | { ALTIVEC_BUILTIN_VEC_CMPLT, ALTIVEC_BUILTIN_VCMPGTFP, |
| 1160 | RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1161 | { ALTIVEC_BUILTIN_VEC_CMPLT, VSX_BUILTIN_XVCMPGTDP, |
| 1162 | RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 1163 | { ALTIVEC_BUILTIN_VEC_COPYSIGN, VSX_BUILTIN_CPSGNDP, | |
| 1164 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 1165 | { ALTIVEC_BUILTIN_VEC_COPYSIGN, ALTIVEC_BUILTIN_COPYSIGN_V4SF, | |
| 1166 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 58646b77 PB |
1167 | { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFUX, |
| 1168 | RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 1169 | { ALTIVEC_BUILTIN_VEC_CTF, ALTIVEC_BUILTIN_VCFSX, | |
| 1170 | RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 70f0f8b2 BS |
1171 | { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVSXDDP_SCALE, |
| 1172 | RS6000_BTI_V2DF, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0}, | |
| 1173 | { ALTIVEC_BUILTIN_VEC_CTF, VSX_BUILTIN_XVCVUXDDP_SCALE, | |
| 1174 | RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0}, | |
| 58646b77 PB |
1175 | { ALTIVEC_BUILTIN_VEC_VCFSX, ALTIVEC_BUILTIN_VCFSX, |
| 1176 | RS6000_BTI_V4SF, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 1177 | { ALTIVEC_BUILTIN_VEC_VCFUX, ALTIVEC_BUILTIN_VCFUX, | |
| 1178 | RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 1179 | { ALTIVEC_BUILTIN_VEC_CTS, ALTIVEC_BUILTIN_VCTSXS, | |
| 1180 | RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, | |
| 70f0f8b2 BS |
1181 | { ALTIVEC_BUILTIN_VEC_CTS, VSX_BUILTIN_XVCVDPSXDS_SCALE, |
| 1182 | RS6000_BTI_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, | |
| 58646b77 PB |
1183 | { ALTIVEC_BUILTIN_VEC_CTU, ALTIVEC_BUILTIN_VCTUXS, |
| 1184 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, | |
| 70f0f8b2 BS |
1185 | { ALTIVEC_BUILTIN_VEC_CTU, VSX_BUILTIN_XVCVDPUXDS_SCALE, |
| 1186 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, | |
| 29e6733c MM |
1187 | { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVSP, |
| 1188 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1189 | { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_XVDIVDP, | |
| 1190 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 2ccdda19 BS |
1191 | { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_DIV_V2DI, |
| 1192 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1193 | { VSX_BUILTIN_VEC_DIV, VSX_BUILTIN_UDIV_V2DI, | |
| 1194 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4b3a6bcb | 1195 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, |
| c9485473 | 1196 | RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, |
| 4b3a6bcb | 1197 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, |
| c9485473 | 1198 | RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, |
| 4b3a6bcb | 1199 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, |
| c9485473 MM |
1200 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, |
| 1201 | ~RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4b3a6bcb | 1202 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, |
| c9485473 | 1203 | RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, |
| 4b3a6bcb | 1204 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, |
| 58646b77 | 1205 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, |
| 4b3a6bcb | 1206 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SF, |
| 58646b77 | 1207 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, |
| 4b3a6bcb | 1208 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1209 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, |
| 4b3a6bcb | 1210 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1211 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, |
| 4b3a6bcb | 1212 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1213 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, |
| 4b3a6bcb | 1214 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1215 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, |
| 4b3a6bcb | 1216 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1217 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, |
| 4b3a6bcb | 1218 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1219 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, |
| 4b3a6bcb | 1220 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V4SI, |
| 58646b77 | 1221 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, |
| 4b3a6bcb | 1222 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1223 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, |
| 4b3a6bcb | 1224 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1225 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, |
| 4b3a6bcb | 1226 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1227 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, |
| 4b3a6bcb | 1228 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1229 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, |
| 4b3a6bcb | 1230 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1231 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, |
| 4b3a6bcb | 1232 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V8HI, |
| 58646b77 | 1233 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, |
| 4b3a6bcb | 1234 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, |
| 58646b77 | 1235 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, |
| 4b3a6bcb | 1236 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, |
| 58646b77 | 1237 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, |
| 4b3a6bcb | 1238 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, |
| 58646b77 | 1239 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, |
| 4b3a6bcb | 1240 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, |
| 58646b77 | 1241 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, |
| 4b3a6bcb | 1242 | { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V16QI, |
| 58646b77 PB |
1243 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, |
| 1244 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, | |
| 1245 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1246 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEBX, | |
| 1247 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1248 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, | |
| 1249 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1250 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEHX, | |
| 1251 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1252 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, | |
| 1253 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1254 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, | |
| 1255 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1256 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, | |
| 1257 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1258 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, | |
| 1259 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, | |
| 1260 | { ALTIVEC_BUILTIN_VEC_LDE, ALTIVEC_BUILTIN_LVEWX, | |
| 1261 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, | |
| 1262 | { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, | |
| 1263 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1264 | { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, | |
| 1265 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1266 | { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, | |
| 1267 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1268 | { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, | |
| 1269 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, | |
| 1270 | { ALTIVEC_BUILTIN_VEC_LVEWX, ALTIVEC_BUILTIN_LVEWX, | |
| 1271 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, | |
| 1272 | { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, | |
| 1273 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1274 | { ALTIVEC_BUILTIN_VEC_LVEHX, ALTIVEC_BUILTIN_LVEHX, | |
| 1275 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1276 | { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, | |
| 1277 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1278 | { ALTIVEC_BUILTIN_VEC_LVEBX, ALTIVEC_BUILTIN_LVEBX, | |
| 1279 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 4b3a6bcb | 1280 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, |
| 58646b77 | 1281 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, |
| 4b3a6bcb | 1282 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SF, |
| 58646b77 | 1283 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, |
| 4b3a6bcb | 1284 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1285 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, |
| 4b3a6bcb | 1286 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1287 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, |
| 4b3a6bcb | 1288 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1289 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, |
| 4b3a6bcb | 1290 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1291 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, |
| 4b3a6bcb | 1292 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1293 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, |
| 4b3a6bcb | 1294 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1295 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, |
| 4b3a6bcb | 1296 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V4SI, |
| 58646b77 | 1297 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, |
| 4b3a6bcb | 1298 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1299 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, |
| 4b3a6bcb | 1300 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1301 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, |
| 4b3a6bcb | 1302 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1303 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, |
| 4b3a6bcb | 1304 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1305 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, |
| 4b3a6bcb | 1306 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1307 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, |
| 4b3a6bcb | 1308 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V8HI, |
| 58646b77 | 1309 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, |
| 4b3a6bcb | 1310 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, |
| 58646b77 | 1311 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, |
| 4b3a6bcb | 1312 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, |
| 58646b77 | 1313 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, |
| 4b3a6bcb | 1314 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, |
| 58646b77 | 1315 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, |
| 4b3a6bcb | 1316 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, |
| c9485473 MM |
1317 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, |
| 1318 | ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 4b3a6bcb | 1319 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V16QI, |
| 58646b77 | 1320 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, |
| 4b3a6bcb | 1321 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DF, |
| c9485473 | 1322 | RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, |
| 4b3a6bcb | 1323 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, |
| c9485473 | 1324 | RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, |
| 4b3a6bcb | 1325 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, |
| c9485473 MM |
1326 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, |
| 1327 | ~RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4b3a6bcb | 1328 | { ALTIVEC_BUILTIN_VEC_LDL, ALTIVEC_BUILTIN_LVXL_V2DI, |
| c9485473 | 1329 | RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, |
| 58646b77 PB |
1330 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, |
| 1331 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1332 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1333 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1334 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1335 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1336 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1337 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1338 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1339 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1340 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1341 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1342 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1343 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, | |
| 1344 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1345 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, | |
| 1346 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1347 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| c9485473 MM |
1348 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, |
| 1349 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, | |
| 1350 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1351 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, | |
| 1352 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1353 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, | |
| 1354 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1355 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, | |
| 1356 | { ALTIVEC_BUILTIN_VEC_LVSL, ALTIVEC_BUILTIN_LVSL, | |
| 1357 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, | |
| 1358 | ~RS6000_BTI_unsigned_long_long, 0 }, | |
| 58646b77 PB |
1359 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, |
| 1360 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1361 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1362 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1363 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1364 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1365 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1366 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1367 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1368 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1369 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1370 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1371 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1372 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_long, 0 }, | |
| 1373 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1374 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, | |
| 1375 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1376 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| c9485473 MM |
1377 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, |
| 1378 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_double, 0 }, | |
| 1379 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1380 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTDI, 0 }, | |
| 1381 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1382 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTDI, 0 }, | |
| 1383 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1384 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_long_long, 0 }, | |
| 1385 | { ALTIVEC_BUILTIN_VEC_LVSR, ALTIVEC_BUILTIN_LVSR, | |
| 1386 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, | |
| 1387 | ~RS6000_BTI_unsigned_long_long, 0 }, | |
| 0b61703c AP |
1388 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, |
| 1389 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, | |
| 1390 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1391 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1392 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1393 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, | |
| 1394 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1395 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, | |
| 1396 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1397 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1398 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1399 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1400 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1401 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1402 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1403 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, | |
| 1404 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1405 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, | |
| 1406 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1407 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, | |
| 1408 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1409 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1410 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1411 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1412 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1413 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1414 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1415 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, | |
| 1416 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1417 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, | |
| 1418 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1419 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1420 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1421 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1422 | { ALTIVEC_BUILTIN_VEC_LVLX, ALTIVEC_BUILTIN_LVLX, | |
| 1423 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1424 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1425 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, | |
| 1426 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1427 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1428 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1429 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, | |
| 1430 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1431 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, | |
| 1432 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1433 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1434 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1435 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1436 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1437 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1438 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1439 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, | |
| 1440 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1441 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, | |
| 1442 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1443 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, | |
| 1444 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1445 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1446 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1447 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1448 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1449 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1450 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1451 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, | |
| 1452 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1453 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, | |
| 1454 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1455 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1456 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1457 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1458 | { ALTIVEC_BUILTIN_VEC_LVLXL, ALTIVEC_BUILTIN_LVLXL, | |
| 1459 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1460 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1461 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, | |
| 1462 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1463 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1464 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1465 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, | |
| 1466 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1467 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, | |
| 1468 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1469 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1470 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1471 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1472 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1473 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1474 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1475 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, | |
| 1476 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1477 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, | |
| 1478 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1479 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, | |
| 1480 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1481 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1482 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1483 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1484 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1485 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1486 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1487 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, | |
| 1488 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1489 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, | |
| 1490 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1491 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1492 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1493 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1494 | { ALTIVEC_BUILTIN_VEC_LVRX, ALTIVEC_BUILTIN_LVRX, | |
| 1495 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 1496 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1497 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, | |
| 1498 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1499 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 1500 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1501 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, | |
| 1502 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1503 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, | |
| 1504 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1505 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 1506 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1507 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1508 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1509 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 1510 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1511 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, | |
| 1512 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1513 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, | |
| 1514 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1515 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, | |
| 1516 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1517 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 1518 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1519 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1520 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1521 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 1522 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1523 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, | |
| 1524 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1525 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, | |
| 1526 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1527 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 1528 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1529 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1530 | { ALTIVEC_BUILTIN_VEC_LVRXL, ALTIVEC_BUILTIN_LVRXL, | |
| 1531 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 58646b77 PB |
1532 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, |
| 1533 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1534 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, | |
| 1535 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1536 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUB, | |
| 1537 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1538 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, | |
| 1539 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1540 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, | |
| 1541 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1542 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSB, | |
| 1543 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1544 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, | |
| 1545 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1546 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, | |
| 1547 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1548 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUH, | |
| 1549 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1550 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, | |
| 1551 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1552 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, | |
| 1553 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1554 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSH, | |
| 1555 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1556 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, | |
| 1557 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1558 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, | |
| 1559 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1560 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXUW, | |
| 1561 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1562 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, | |
| 1563 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1564 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, | |
| 1565 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1566 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXSW, | |
| 1567 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| a5965b52 MM |
1568 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, |
| 1569 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1570 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, | |
| 1571 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1572 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXUD, | |
| 1573 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1574 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, | |
| 1575 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1576 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, | |
| 1577 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1578 | { ALTIVEC_BUILTIN_VEC_MAX, P8V_BUILTIN_VMAXSD, | |
| 1579 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 58646b77 PB |
1580 | { ALTIVEC_BUILTIN_VEC_MAX, ALTIVEC_BUILTIN_VMAXFP, |
| 1581 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1582 | { ALTIVEC_BUILTIN_VEC_MAX, VSX_BUILTIN_XVMAXDP, |
| 1583 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 PB |
1584 | { ALTIVEC_BUILTIN_VEC_VMAXFP, ALTIVEC_BUILTIN_VMAXFP, |
| 1585 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1586 | { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, | |
| 1587 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1588 | { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, | |
| 1589 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1590 | { ALTIVEC_BUILTIN_VEC_VMAXSW, ALTIVEC_BUILTIN_VMAXSW, | |
| 1591 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1592 | { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, | |
| 1593 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1594 | { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, | |
| 1595 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1596 | { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, | |
| 1597 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1598 | { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, | |
| 1599 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1600 | { ALTIVEC_BUILTIN_VEC_VMAXUW, ALTIVEC_BUILTIN_VMAXUW, | |
| 1601 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1602 | { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, | |
| 1603 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1604 | { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, | |
| 1605 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1606 | { ALTIVEC_BUILTIN_VEC_VMAXSH, ALTIVEC_BUILTIN_VMAXSH, | |
| 1607 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1608 | { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, | |
| 1609 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1610 | { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, | |
| 1611 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1612 | { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, | |
| 1613 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1614 | { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, | |
| 1615 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1616 | { ALTIVEC_BUILTIN_VEC_VMAXUH, ALTIVEC_BUILTIN_VMAXUH, | |
| 1617 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1618 | { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, | |
| 1619 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1620 | { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, | |
| 1621 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1622 | { ALTIVEC_BUILTIN_VEC_VMAXSB, ALTIVEC_BUILTIN_VMAXSB, | |
| 1623 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1624 | { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, | |
| 1625 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1626 | { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, | |
| 1627 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1628 | { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, | |
| 1629 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1630 | { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, | |
| 1631 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1632 | { ALTIVEC_BUILTIN_VEC_VMAXUB, ALTIVEC_BUILTIN_VMAXUB, | |
| 1633 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1634 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, | |
| 1635 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1636 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, | |
| 1637 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1638 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHB, | |
| 1639 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1640 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1641 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1642 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1643 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, | |
| 1644 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1645 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1646 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1647 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1648 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, | |
| 1649 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1650 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, | |
| 1651 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1652 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, | |
| 1653 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1654 | { ALTIVEC_BUILTIN_VEC_MERGEH, ALTIVEC_BUILTIN_VMRGHW, | |
| 1655 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2fcd8e02 MM |
1656 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DF, |
| 1657 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 1658 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, | |
| 1659 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 65fa79c3 BS |
1660 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, |
| 1661 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1662 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, | |
| 1663 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1664 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, | |
| 1665 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1666 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, | |
| 1667 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1668 | { ALTIVEC_BUILTIN_VEC_MERGEH, VSX_BUILTIN_VEC_MERGEH_V2DI, | |
| 1669 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1670 | { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, |
| 1671 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1672 | { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, | |
| 1673 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1674 | { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, | |
| 1675 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1676 | { ALTIVEC_BUILTIN_VEC_VMRGHW, ALTIVEC_BUILTIN_VMRGHW, | |
| 1677 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1678 | { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1679 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1680 | { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1681 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, | |
| 1682 | { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1683 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1684 | { ALTIVEC_BUILTIN_VEC_VMRGHH, ALTIVEC_BUILTIN_VMRGHH, | |
| 1685 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1686 | { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, | |
| 1687 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1688 | { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, | |
| 1689 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1690 | { ALTIVEC_BUILTIN_VEC_VMRGHB, ALTIVEC_BUILTIN_VMRGHB, | |
| 1691 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1692 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, | |
| 1693 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1694 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, | |
| 1695 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1696 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLB, | |
| 1697 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1698 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, | |
| 1699 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1700 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, | |
| 1701 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, | |
| 1702 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, | |
| 1703 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1704 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLH, | |
| 1705 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1706 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, | |
| 1707 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1708 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, | |
| 1709 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1710 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, | |
| 1711 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1712 | { ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VMRGLW, | |
| 1713 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2fcd8e02 MM |
1714 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DF, |
| 1715 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 1716 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, | |
| 1717 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 65fa79c3 BS |
1718 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, |
| 1719 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1720 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, | |
| 1721 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1722 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, | |
| 1723 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1724 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, | |
| 1725 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1726 | { ALTIVEC_BUILTIN_VEC_MERGEL, VSX_BUILTIN_VEC_MERGEL_V2DI, | |
| 1727 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1728 | { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, |
| 1729 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1730 | { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, | |
| 1731 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1732 | { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, | |
| 1733 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1734 | { ALTIVEC_BUILTIN_VEC_VMRGLW, ALTIVEC_BUILTIN_VMRGLW, | |
| 1735 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1736 | { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, | |
| 1737 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1738 | { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, | |
| 1739 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, 0 }, | |
| 1740 | { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, | |
| 1741 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1742 | { ALTIVEC_BUILTIN_VEC_VMRGLH, ALTIVEC_BUILTIN_VMRGLH, | |
| 1743 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1744 | { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, | |
| 1745 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1746 | { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, | |
| 1747 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1748 | { ALTIVEC_BUILTIN_VEC_VMRGLB, ALTIVEC_BUILTIN_VMRGLB, | |
| 1749 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1750 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, | |
| 1751 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1752 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, | |
| 1753 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1754 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUB, | |
| 1755 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1756 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, | |
| 1757 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1758 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, | |
| 1759 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1760 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSB, | |
| 1761 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1762 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, | |
| 1763 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1764 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, | |
| 1765 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1766 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUH, | |
| 1767 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1768 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, | |
| 1769 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1770 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, | |
| 1771 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1772 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSH, | |
| 1773 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1774 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, | |
| 1775 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1776 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, | |
| 1777 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1778 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINUW, | |
| 1779 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1780 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, | |
| 1781 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1782 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, | |
| 1783 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1784 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINSW, | |
| 1785 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| a5965b52 MM |
1786 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, |
| 1787 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1788 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, | |
| 1789 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1790 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINUD, | |
| 1791 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1792 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, | |
| 1793 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1794 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, | |
| 1795 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1796 | { ALTIVEC_BUILTIN_VEC_MIN, P8V_BUILTIN_VMINSD, | |
| 1797 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 58646b77 PB |
1798 | { ALTIVEC_BUILTIN_VEC_MIN, ALTIVEC_BUILTIN_VMINFP, |
| 1799 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
1800 | { ALTIVEC_BUILTIN_VEC_MIN, VSX_BUILTIN_XVMINDP, |
| 1801 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 58646b77 PB |
1802 | { ALTIVEC_BUILTIN_VEC_VMINFP, ALTIVEC_BUILTIN_VMINFP, |
| 1803 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1804 | { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, | |
| 1805 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1806 | { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, | |
| 1807 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1808 | { ALTIVEC_BUILTIN_VEC_VMINSW, ALTIVEC_BUILTIN_VMINSW, | |
| 1809 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1810 | { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, | |
| 1811 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1812 | { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, | |
| 1813 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1814 | { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, | |
| 1815 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1816 | { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, | |
| 1817 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1818 | { ALTIVEC_BUILTIN_VEC_VMINUW, ALTIVEC_BUILTIN_VMINUW, | |
| 1819 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1820 | { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, | |
| 1821 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1822 | { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, | |
| 1823 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1824 | { ALTIVEC_BUILTIN_VEC_VMINSH, ALTIVEC_BUILTIN_VMINSH, | |
| 1825 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1826 | { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, | |
| 1827 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1828 | { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, | |
| 1829 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1830 | { ALTIVEC_BUILTIN_VEC_VMINSB, ALTIVEC_BUILTIN_VMINSB, | |
| 1831 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1832 | { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, | |
| 1833 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1834 | { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, | |
| 1835 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1836 | { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, | |
| 1837 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1838 | { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, | |
| 1839 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1840 | { ALTIVEC_BUILTIN_VEC_VMINUH, ALTIVEC_BUILTIN_VMINUH, | |
| 1841 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1842 | { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, | |
| 1843 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1844 | { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, | |
| 1845 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1846 | { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, | |
| 1847 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1848 | { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, | |
| 1849 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1850 | { ALTIVEC_BUILTIN_VEC_VMINUB, ALTIVEC_BUILTIN_VMINUB, | |
| 1851 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 29e6733c MM |
1852 | { VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_XVMULSP, |
| 1853 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1854 | { VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_XVMULDP, | |
| 1855 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 2ccdda19 BS |
1856 | { VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_MUL_V2DI, |
| 1857 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1858 | { VSX_BUILTIN_VEC_MUL, VSX_BUILTIN_MUL_V2DI, | |
| 1859 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1860 | { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUB, |
| 1861 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1862 | { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESB, | |
| 1863 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1864 | { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH, | |
| 1865 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1866 | { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, | |
| 1867 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1868 | { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB, | |
| 1869 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1870 | { ALTIVEC_BUILTIN_VEC_VMULESB, ALTIVEC_BUILTIN_VMULESB, | |
| 1871 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1872 | { ALTIVEC_BUILTIN_VEC_VMULEUH, ALTIVEC_BUILTIN_VMULEUH, | |
| 1873 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1874 | { ALTIVEC_BUILTIN_VEC_VMULESH, ALTIVEC_BUILTIN_VMULESH, | |
| 1875 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1876 | { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUB, | |
| 1877 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1878 | { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSB, | |
| 1879 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1880 | { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, | |
| 1881 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1882 | { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, | |
| 1883 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1884 | { ALTIVEC_BUILTIN_VEC_VMULOSH, ALTIVEC_BUILTIN_VMULOSH, | |
| 1885 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1886 | { ALTIVEC_BUILTIN_VEC_VMULOUH, ALTIVEC_BUILTIN_VMULOUH, | |
| 1887 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1888 | { ALTIVEC_BUILTIN_VEC_VMULOSB, ALTIVEC_BUILTIN_VMULOSB, | |
| 1889 | RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1890 | { ALTIVEC_BUILTIN_VEC_VMULOUB, ALTIVEC_BUILTIN_VMULOUB, | |
| 1891 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 29e6733c MM |
1892 | { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRDPI, |
| 1893 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 1894 | { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI, | |
| 1895 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 58646b77 PB |
1896 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, |
| 1897 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| a72c65c7 MM |
1898 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, |
| 1899 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 65fa79c3 BS |
1900 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, |
| 1901 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1902 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1903 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1904 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1905 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1906 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1907 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1908 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1909 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1910 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1911 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1912 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, |
| 1913 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1914 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1915 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1916 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1917 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1918 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1919 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1920 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1921 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1922 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1923 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1924 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1925 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1926 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1927 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1928 | { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, | |
| 1929 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1930 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1931 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 1932 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1933 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, | |
| 1934 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1935 | RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, | |
| a72c65c7 MM |
1936 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, |
| 1937 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 1938 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 29e6733c | 1939 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, |
| a72c65c7 | 1940 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, |
| 29e6733c | 1941 | RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, |
| 65fa79c3 BS |
1942 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, |
| 1943 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1944 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1945 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1946 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1947 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 1948 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1949 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 1950 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1951 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 1952 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1953 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
1954 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, |
| 1955 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1956 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1957 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1958 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1959 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1960 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1961 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 1962 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1963 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1964 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1965 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 1966 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1967 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 1968 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1969 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1970 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1971 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1972 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1973 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1974 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1975 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1976 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1977 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1978 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1979 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 1980 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1981 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 1982 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1983 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1984 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1985 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1986 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1987 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1988 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1989 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 1990 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1991 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1992 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1993 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 1994 | { ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VOR, | |
| 1995 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 1996 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, | |
| 1997 | RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 1998 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, | |
| 1999 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2000 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUHUM, | |
| 2001 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2002 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, | |
| 2003 | RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2004 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, | |
| 2005 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2006 | { ALTIVEC_BUILTIN_VEC_PACK, ALTIVEC_BUILTIN_VPKUWUM, | |
| 2007 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| a5965b52 MM |
2008 | { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, |
| 2009 | RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 2010 | { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, | |
| 2011 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2012 | { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, | |
| 2013 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 58646b77 PB |
2014 | { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, |
| 2015 | RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2016 | { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, | |
| 2017 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2018 | { ALTIVEC_BUILTIN_VEC_VPKUWUM, ALTIVEC_BUILTIN_VPKUWUM, | |
| 2019 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2020 | { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, | |
| 2021 | RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2022 | { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, | |
| 2023 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2024 | { ALTIVEC_BUILTIN_VEC_VPKUHUM, ALTIVEC_BUILTIN_VPKUHUM, | |
| 2025 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2026 | { ALTIVEC_BUILTIN_VEC_PACKPX, ALTIVEC_BUILTIN_VPKPX, | |
| 2027 | RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2028 | { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUHUS, | |
| 2029 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2030 | { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSHSS, | |
| 2031 | RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2032 | { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKUWUS, | |
| 2033 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2034 | { ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS, | |
| 2035 | RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2036 | { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS, | |
| 2037 | RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2038 | { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS, | |
| 2039 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2040 | { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS, |
| 2041 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2042 | { ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS, | |
| 2043 | RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 58646b77 PB |
2044 | { ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS, |
| 2045 | RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2046 | { ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS, | |
| 2047 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2048 | { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUHUS, | |
| 2049 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2050 | { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSHUS, | |
| 2051 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2052 | { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKUWUS, | |
| 2053 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2054 | { ALTIVEC_BUILTIN_VEC_PACKSU, ALTIVEC_BUILTIN_VPKSWUS, | |
| 2055 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| a5965b52 MM |
2056 | { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS, |
| 2057 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 65fa79c3 BS |
2058 | { ALTIVEC_BUILTIN_VEC_PACKSU, P8V_BUILTIN_VPKSDUS, |
| 2059 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2060 | { ALTIVEC_BUILTIN_VEC_VPKSWUS, ALTIVEC_BUILTIN_VPKSWUS, |
| 2061 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2062 | { ALTIVEC_BUILTIN_VEC_VPKSHUS, ALTIVEC_BUILTIN_VPKSHUS, | |
| 2063 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 29e6733c MM |
2064 | { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRDPIC, |
| 2065 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 2066 | { ALTIVEC_BUILTIN_VEC_RINT, VSX_BUILTIN_XVRSPIC, | |
| 2067 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 58646b77 PB |
2068 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, |
| 2069 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2070 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLB, | |
| 2071 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2072 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, | |
| 2073 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2074 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLH, | |
| 2075 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2076 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, | |
| 2077 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2078 | { ALTIVEC_BUILTIN_VEC_RL, ALTIVEC_BUILTIN_VRLW, | |
| 2079 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2080 | { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, |
| 2081 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2082 | { ALTIVEC_BUILTIN_VEC_RL, P8V_BUILTIN_VRLD, | |
| 2083 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2084 | { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, |
| 2085 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2086 | { ALTIVEC_BUILTIN_VEC_VRLW, ALTIVEC_BUILTIN_VRLW, | |
| 2087 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2088 | { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, | |
| 2089 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2090 | { ALTIVEC_BUILTIN_VEC_VRLH, ALTIVEC_BUILTIN_VRLH, | |
| 2091 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2092 | { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, | |
| 2093 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2094 | { ALTIVEC_BUILTIN_VEC_VRLB, ALTIVEC_BUILTIN_VRLB, | |
| 2095 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2096 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, | |
| 2097 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2098 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLB, | |
| 2099 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2100 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, | |
| 2101 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2102 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLH, | |
| 2103 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2104 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, | |
| 2105 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2106 | { ALTIVEC_BUILTIN_VEC_SL, ALTIVEC_BUILTIN_VSLW, | |
| 2107 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2108 | { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, |
| 2109 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2110 | { ALTIVEC_BUILTIN_VEC_SL, P8V_BUILTIN_VSLD, | |
| 2111 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 29e6733c MM |
2112 | { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTDP, |
| 2113 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, | |
| 2114 | { ALTIVEC_BUILTIN_VEC_SQRT, VSX_BUILTIN_XVSQRTSP, | |
| 2115 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, | |
| 58646b77 PB |
2116 | { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, |
| 2117 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2118 | { ALTIVEC_BUILTIN_VEC_VSLW, ALTIVEC_BUILTIN_VSLW, | |
| 2119 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2120 | { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, | |
| 2121 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2122 | { ALTIVEC_BUILTIN_VEC_VSLH, ALTIVEC_BUILTIN_VSLH, | |
| 2123 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2124 | { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, | |
| 2125 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2126 | { ALTIVEC_BUILTIN_VEC_VSLB, ALTIVEC_BUILTIN_VSLB, | |
| 2127 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2128 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2129 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2130 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2131 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2132 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2133 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2134 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2135 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2136 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2137 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2138 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2139 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2140 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2141 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2142 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2143 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2144 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2145 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2146 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2147 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2148 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2149 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2150 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2151 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2152 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2153 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2154 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2155 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2156 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2157 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2158 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2159 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2160 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2161 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2162 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2163 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2164 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2165 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2166 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2167 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2168 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2169 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2170 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2171 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2172 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2173 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2174 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2175 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2176 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2177 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2178 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2179 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2180 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2181 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2182 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2183 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2184 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2185 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2186 | { ALTIVEC_BUILTIN_VEC_SLL, ALTIVEC_BUILTIN_VSL, | |
| 2187 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2188 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2189 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, | |
| 2190 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2191 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2192 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2193 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, | |
| 2194 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2195 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2196 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2197 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, | |
| 2198 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2199 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2200 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2201 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2202 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2203 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2204 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2205 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2206 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2207 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2208 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2209 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2210 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2211 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2212 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2213 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2214 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2215 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2216 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2217 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2218 | { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO, | |
| 2219 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2220 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, | |
| 2221 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2222 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, | |
| 2223 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2224 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB, | |
| 2225 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2226 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, | |
| 2227 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2228 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, | |
| 2229 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2230 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, | |
| 2231 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2232 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTH, | |
| 2233 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2234 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, | |
| 2235 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, | |
| 2236 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, | |
| 2237 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2238 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, | |
| 2239 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2240 | { ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTW, | |
| 2241 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2ccdda19 BS |
2242 | { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DF, |
| 2243 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, 0 }, | |
| 2244 | { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, | |
| 2245 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_INTSI, 0 }, | |
| 2246 | { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, | |
| 2247 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, 0 }, | |
| 2248 | { ALTIVEC_BUILTIN_VEC_SPLAT, VSX_BUILTIN_XXSPLTD_V2DI, | |
| 2249 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, 0 }, | |
| 58646b77 PB |
2250 | { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, |
| 2251 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_INTSI, 0 }, | |
| 2252 | { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, | |
| 2253 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2254 | { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, | |
| 2255 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2256 | { ALTIVEC_BUILTIN_VEC_VSPLTW, ALTIVEC_BUILTIN_VSPLTW, | |
| 2257 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, 0 }, | |
| 2258 | { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, | |
| 2259 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2260 | { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, | |
| 2261 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2262 | { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, | |
| 2263 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2264 | { ALTIVEC_BUILTIN_VEC_VSPLTH, ALTIVEC_BUILTIN_VSPLTH, | |
| 2265 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, 0 }, | |
| 2266 | { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, | |
| 2267 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2268 | { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, | |
| 2269 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2270 | { ALTIVEC_BUILTIN_VEC_VSPLTB, ALTIVEC_BUILTIN_VSPLTB, | |
| 2271 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, 0 }, | |
| 2272 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, | |
| 2273 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2274 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRB, | |
| 2275 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2276 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, | |
| 2277 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2278 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRH, | |
| 2279 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2280 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, | |
| 2281 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2282 | { ALTIVEC_BUILTIN_VEC_SR, ALTIVEC_BUILTIN_VSRW, | |
| 2283 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2284 | { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, |
| 2285 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2286 | { ALTIVEC_BUILTIN_VEC_SR, P8V_BUILTIN_VSRD, | |
| 2287 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2288 | { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, |
| 2289 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2290 | { ALTIVEC_BUILTIN_VEC_VSRW, ALTIVEC_BUILTIN_VSRW, | |
| 2291 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2292 | { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, | |
| 2293 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2294 | { ALTIVEC_BUILTIN_VEC_VSRH, ALTIVEC_BUILTIN_VSRH, | |
| 2295 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2296 | { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, | |
| 2297 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2298 | { ALTIVEC_BUILTIN_VEC_VSRB, ALTIVEC_BUILTIN_VSRB, | |
| 2299 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2300 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, | |
| 2301 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2302 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAB, | |
| 2303 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2304 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, | |
| 2305 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2306 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAH, | |
| 2307 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2308 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, | |
| 2309 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2310 | { ALTIVEC_BUILTIN_VEC_SRA, ALTIVEC_BUILTIN_VSRAW, | |
| 2311 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2312 | { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD, |
| 2313 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2314 | { ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD, | |
| 2315 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2316 | { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, |
| 2317 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2318 | { ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW, | |
| 2319 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2320 | { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, | |
| 2321 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2322 | { ALTIVEC_BUILTIN_VEC_VSRAH, ALTIVEC_BUILTIN_VSRAH, | |
| 2323 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2324 | { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, | |
| 2325 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2326 | { ALTIVEC_BUILTIN_VEC_VSRAB, ALTIVEC_BUILTIN_VSRAB, | |
| 2327 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2328 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2329 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2330 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2331 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2332 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2333 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2334 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2335 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2336 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2337 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2338 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2339 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2340 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2341 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2342 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2343 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2344 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2345 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2346 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2347 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2348 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2349 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2350 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2351 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2352 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2353 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2354 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2355 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2356 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2357 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2358 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2359 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2360 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2361 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2362 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2363 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2364 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2365 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2366 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2367 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2368 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2369 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2370 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2371 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2372 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2373 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2374 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2375 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2376 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2377 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2378 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2379 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2380 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2381 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2382 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2383 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2384 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2385 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2386 | { ALTIVEC_BUILTIN_VEC_SRL, ALTIVEC_BUILTIN_VSR, | |
| 2387 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2388 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2389 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V16QI, 0 }, | |
| 2390 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2391 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2392 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2393 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V16QI, 0 }, | |
| 2394 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2395 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2396 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2397 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V16QI, 0 }, | |
| 2398 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2399 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2400 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2401 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2402 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2403 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2404 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2405 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2406 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2407 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2408 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2409 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_V16QI, 0 }, | |
| 2410 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2411 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2412 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2413 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2414 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2415 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2416 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2417 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2418 | { ALTIVEC_BUILTIN_VEC_SRO, ALTIVEC_BUILTIN_VSRO, | |
| 2419 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2420 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2421 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2422 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2423 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2424 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2425 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2426 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2427 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2428 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2429 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2430 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2431 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2432 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2433 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2434 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2435 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2436 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2437 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2438 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2439 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2440 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2441 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2442 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2443 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2444 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2445 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2446 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2447 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2448 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2449 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2450 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2451 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2452 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2453 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2454 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2455 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| a5965b52 MM |
2456 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, |
| 2457 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 2458 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, | |
| 2459 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 2460 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, | |
| 2461 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 2462 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, | |
| 2463 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2464 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, | |
| 2465 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 2466 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUDM, | |
| 2467 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2468 | { ALTIVEC_BUILTIN_VEC_SUB, ALTIVEC_BUILTIN_VSUBFP, |
| 2469 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 29e6733c MM |
2470 | { ALTIVEC_BUILTIN_VEC_SUB, VSX_BUILTIN_XVSUBDP, |
| 2471 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| a16a872d MM |
2472 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, |
| 2473 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 2474 | { ALTIVEC_BUILTIN_VEC_SUB, P8V_BUILTIN_VSUBUQM, | |
| 2475 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 2476 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 58646b77 PB |
2477 | { ALTIVEC_BUILTIN_VEC_VSUBFP, ALTIVEC_BUILTIN_VSUBFP, |
| 2478 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 2479 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2480 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2481 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2482 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2483 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2484 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2485 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2486 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2487 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2488 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2489 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2490 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2491 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2492 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2493 | { ALTIVEC_BUILTIN_VEC_VSUBUWM, ALTIVEC_BUILTIN_VSUBUWM, | |
| 2494 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2495 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2496 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2497 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2498 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2499 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2500 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2501 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2502 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2503 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2504 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2505 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2506 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2507 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2508 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2509 | { ALTIVEC_BUILTIN_VEC_VSUBUHM, ALTIVEC_BUILTIN_VSUBUHM, | |
| 2510 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2511 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2512 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2513 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2514 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2515 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2516 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2517 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2518 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2519 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2520 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2521 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2522 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2523 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2524 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2525 | { ALTIVEC_BUILTIN_VEC_VSUBUBM, ALTIVEC_BUILTIN_VSUBUBM, | |
| 2526 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2527 | { ALTIVEC_BUILTIN_VEC_SUBC, ALTIVEC_BUILTIN_VSUBCUW, | |
| 2528 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2529 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2530 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2531 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2532 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2533 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2534 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2535 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2536 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2537 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2538 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2539 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2540 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2541 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2542 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2543 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2544 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2545 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2546 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2547 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2548 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2549 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2550 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2551 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2552 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2553 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2554 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2555 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2556 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2557 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2558 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2559 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2560 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2561 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2562 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2563 | { ALTIVEC_BUILTIN_VEC_SUBS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2564 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2565 | { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2566 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2567 | { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2568 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2569 | { ALTIVEC_BUILTIN_VEC_VSUBSWS, ALTIVEC_BUILTIN_VSUBSWS, | |
| 2570 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2571 | { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2572 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2573 | { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2574 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2575 | { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2576 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2577 | { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2578 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2579 | { ALTIVEC_BUILTIN_VEC_VSUBUWS, ALTIVEC_BUILTIN_VSUBUWS, | |
| 2580 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2581 | { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2582 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2583 | { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2584 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2585 | { ALTIVEC_BUILTIN_VEC_VSUBSHS, ALTIVEC_BUILTIN_VSUBSHS, | |
| 2586 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2587 | { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2588 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2589 | { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2590 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2591 | { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2592 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2593 | { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2594 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2595 | { ALTIVEC_BUILTIN_VEC_VSUBUHS, ALTIVEC_BUILTIN_VSUBUHS, | |
| 2596 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2597 | { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2598 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2599 | { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2600 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2601 | { ALTIVEC_BUILTIN_VEC_VSUBSBS, ALTIVEC_BUILTIN_VSUBSBS, | |
| 2602 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2603 | { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2604 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2605 | { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2606 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2607 | { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2608 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2609 | { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2610 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2611 | { ALTIVEC_BUILTIN_VEC_VSUBUBS, ALTIVEC_BUILTIN_VSUBUBS, | |
| 2612 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2613 | { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4UBS, | |
| 2614 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2615 | { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SBS, | |
| 2616 | RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, | |
| 2617 | { ALTIVEC_BUILTIN_VEC_SUM4S, ALTIVEC_BUILTIN_VSUM4SHS, | |
| 2618 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, | |
| 2619 | { ALTIVEC_BUILTIN_VEC_VSUM4SHS, ALTIVEC_BUILTIN_VSUM4SHS, | |
| 2620 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V4SI, 0 }, | |
| 2621 | { ALTIVEC_BUILTIN_VEC_VSUM4SBS, ALTIVEC_BUILTIN_VSUM4SBS, | |
| 2622 | RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_V4SI, 0 }, | |
| 2623 | { ALTIVEC_BUILTIN_VEC_VSUM4UBS, ALTIVEC_BUILTIN_VSUM4UBS, | |
| 2624 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2625 | { ALTIVEC_BUILTIN_VEC_SUM2S, ALTIVEC_BUILTIN_VSUM2SWS, | |
| 2626 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2627 | { ALTIVEC_BUILTIN_VEC_SUMS, ALTIVEC_BUILTIN_VSUMSWS, | |
| 2628 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2629 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2630 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 2631 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2632 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, 0 }, | |
| 2633 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2634 | RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, 0 }, | |
| a72c65c7 MM |
2635 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, |
| 2636 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 2637 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 29e6733c | 2638 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, 0 }, |
| a72c65c7 | 2639 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, |
| 29e6733c | 2640 | RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DF, 0 }, |
| 65fa79c3 BS |
2641 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, |
| 2642 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 2643 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2644 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 2645 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2646 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 2647 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2648 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 2649 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2650 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 2651 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2652 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 58646b77 PB |
2653 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, |
| 2654 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2655 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2656 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2657 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2658 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2659 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2660 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 2661 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2662 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2663 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2664 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 2665 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2666 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, | |
| 2667 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2668 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2669 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2670 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2671 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2672 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2673 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2674 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 2675 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2676 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2677 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2678 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 2679 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2680 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, | |
| 2681 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2682 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2683 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2684 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2685 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2686 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2687 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2688 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 2689 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2690 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2691 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2692 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 2693 | { ALTIVEC_BUILTIN_VEC_XOR, ALTIVEC_BUILTIN_VXOR, | |
| 2694 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 }, | |
| 2695 | ||
| 29e6733c | 2696 | /* Ternary AltiVec/VSX builtins. */ |
| 58646b77 PB |
2697 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, |
| 2698 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2699 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2700 | RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2701 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2702 | RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2703 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2704 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2705 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2706 | RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2707 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2708 | RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2709 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2710 | RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2711 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2712 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2713 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2714 | RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2715 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2716 | RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2717 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2718 | RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2719 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2720 | RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2721 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2722 | RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2723 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2724 | RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2725 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2726 | RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2727 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2728 | RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2729 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2730 | RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2731 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2732 | RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2733 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2734 | RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2735 | { ALTIVEC_BUILTIN_VEC_DST, ALTIVEC_BUILTIN_DST, | |
| 2736 | RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2737 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2738 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2739 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2740 | RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2741 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2742 | RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2743 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2744 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2745 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2746 | RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2747 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2748 | RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2749 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2750 | RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2751 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2752 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2753 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2754 | RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2755 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2756 | RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2757 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2758 | RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2759 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2760 | RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2761 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2762 | RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2763 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2764 | RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2765 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2766 | RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2767 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2768 | RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2769 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2770 | RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2771 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2772 | RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2773 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2774 | RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2775 | { ALTIVEC_BUILTIN_VEC_DSTST, ALTIVEC_BUILTIN_DSTST, | |
| 2776 | RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2777 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2778 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2779 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2780 | RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2781 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2782 | RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2783 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2784 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2785 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2786 | RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2787 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2788 | RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2789 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2790 | RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2791 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2792 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2793 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2794 | RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2795 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2796 | RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2797 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2798 | RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2799 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2800 | RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2801 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2802 | RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2803 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2804 | RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2805 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2806 | RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2807 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2808 | RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2809 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2810 | RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2811 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2812 | RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2813 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2814 | RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2815 | { ALTIVEC_BUILTIN_VEC_DSTSTT, ALTIVEC_BUILTIN_DSTSTT, | |
| 2816 | RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2817 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2818 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2819 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2820 | RS6000_BTI_void, ~RS6000_BTI_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2821 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2822 | RS6000_BTI_void, ~RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2823 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2824 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2825 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2826 | RS6000_BTI_void, ~RS6000_BTI_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2827 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2828 | RS6000_BTI_void, ~RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2829 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2830 | RS6000_BTI_void, ~RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2831 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2832 | RS6000_BTI_void, ~RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2833 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2834 | RS6000_BTI_void, ~RS6000_BTI_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2835 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2836 | RS6000_BTI_void, ~RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2837 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2838 | RS6000_BTI_void, ~RS6000_BTI_V4SF, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2839 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2840 | RS6000_BTI_void, ~RS6000_BTI_UINTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2841 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2842 | RS6000_BTI_void, ~RS6000_BTI_INTQI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2843 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2844 | RS6000_BTI_void, ~RS6000_BTI_UINTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2845 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2846 | RS6000_BTI_void, ~RS6000_BTI_INTHI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2847 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2848 | RS6000_BTI_void, ~RS6000_BTI_UINTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2849 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2850 | RS6000_BTI_void, ~RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2851 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2852 | RS6000_BTI_void, ~RS6000_BTI_unsigned_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2853 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2854 | RS6000_BTI_void, ~RS6000_BTI_long, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2855 | { ALTIVEC_BUILTIN_VEC_DSTT, ALTIVEC_BUILTIN_DSTT, | |
| 2856 | RS6000_BTI_void, ~RS6000_BTI_float, RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 2857 | { ALTIVEC_BUILTIN_VEC_MADD, ALTIVEC_BUILTIN_VMADDFP, | |
| 2858 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, | |
| 29e6733c MM |
2859 | { ALTIVEC_BUILTIN_VEC_MADD, VSX_BUILTIN_XVMADDDP, |
| 2860 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, | |
| 58646b77 PB |
2861 | { ALTIVEC_BUILTIN_VEC_MADDS, ALTIVEC_BUILTIN_VMHADDSHS, |
| 2862 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, | |
| 2863 | { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, | |
| 2864 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, | |
| 2865 | { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, | |
| 2866 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 2867 | { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, | |
| 2868 | RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, | |
| 2869 | { ALTIVEC_BUILTIN_VEC_MLADD, ALTIVEC_BUILTIN_VMLADDUHM, | |
| 2870 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 2871 | { ALTIVEC_BUILTIN_VEC_MRADDS, ALTIVEC_BUILTIN_VMHRADDSHS, | |
| 2872 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, | |
| 29e6733c MM |
2873 | { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBSP, |
| 2874 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, | |
| 2875 | { VSX_BUILTIN_VEC_MSUB, VSX_BUILTIN_XVMSUBDP, | |
| 2876 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, | |
| 58646b77 PB |
2877 | { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUBM, |
| 2878 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, | |
| 2879 | { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMMBM, | |
| 2880 | RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, | |
| 2881 | { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMUHM, | |
| 2882 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, | |
| 2883 | { ALTIVEC_BUILTIN_VEC_MSUM, ALTIVEC_BUILTIN_VMSUMSHM, | |
| 2884 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, | |
| 2885 | { ALTIVEC_BUILTIN_VEC_VMSUMSHM, ALTIVEC_BUILTIN_VMSUMSHM, | |
| 2886 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, | |
| 2887 | { ALTIVEC_BUILTIN_VEC_VMSUMUHM, ALTIVEC_BUILTIN_VMSUMUHM, | |
| 2888 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, | |
| 2889 | { ALTIVEC_BUILTIN_VEC_VMSUMMBM, ALTIVEC_BUILTIN_VMSUMMBM, | |
| 2890 | RS6000_BTI_V4SI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V4SI }, | |
| 2891 | { ALTIVEC_BUILTIN_VEC_VMSUMUBM, ALTIVEC_BUILTIN_VMSUMUBM, | |
| 2892 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI }, | |
| 2893 | { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMUHS, | |
| 2894 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, | |
| 2895 | { ALTIVEC_BUILTIN_VEC_MSUMS, ALTIVEC_BUILTIN_VMSUMSHS, | |
| 2896 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, | |
| 2897 | { ALTIVEC_BUILTIN_VEC_VMSUMSHS, ALTIVEC_BUILTIN_VMSUMSHS, | |
| 2898 | RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V4SI }, | |
| 2899 | { ALTIVEC_BUILTIN_VEC_VMSUMUHS, ALTIVEC_BUILTIN_VMSUMUHS, | |
| 2900 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI }, | |
| 29e6733c MM |
2901 | { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDSP, |
| 2902 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, | |
| 2903 | { VSX_BUILTIN_VEC_NMADD, VSX_BUILTIN_XVNMADDDP, | |
| 2904 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, | |
| 58646b77 PB |
2905 | { ALTIVEC_BUILTIN_VEC_NMSUB, ALTIVEC_BUILTIN_VNMSUBFP, |
| 2906 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, | |
| 29e6733c MM |
2907 | { ALTIVEC_BUILTIN_VEC_NMSUB, VSX_BUILTIN_XVNMSUBDP, |
| 2908 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, | |
| a72c65c7 MM |
2909 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DF, |
| 2910 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V16QI }, | |
| 2911 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, | |
| 2912 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI }, | |
| 65fa79c3 BS |
2913 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_2DI, |
| 2914 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI }, | |
| 58646b77 PB |
2915 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SF, |
| 2916 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V16QI }, | |
| 2917 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, | |
| 2918 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V16QI }, | |
| 2919 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, | |
| 2920 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI }, | |
| 2921 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_4SI, | |
| 2922 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V16QI }, | |
| 2923 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, | |
| 2924 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V16QI }, | |
| 2925 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, | |
| 2926 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI }, | |
| 2927 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, | |
| 2928 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V16QI }, | |
| 2929 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_8HI, | |
| 2930 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_unsigned_V16QI }, | |
| 2931 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, | |
| 2932 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 2933 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, | |
| 2934 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 2935 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, | |
| 2936 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 2937 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, | |
| 2938 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 2939 | { ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VPERM_16QI, | |
| 2940 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, | |
| a72c65c7 MM |
2941 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, |
| 2942 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_bool_V2DI }, | |
| 2943 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, | |
| 2944 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_unsigned_V2DI }, | |
| 2945 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, | |
| 2946 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DI }, | |
| 2947 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DF, | |
| 2948 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, | |
| 2949 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, | |
| 2950 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, | |
| 2951 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, | |
| 2952 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 2953 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, | |
| 2954 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, | |
| 65fa79c3 BS |
2955 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, |
| 2956 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, | |
| 2957 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, | |
| 2958 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 2959 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_2DI, | |
| 2960 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI }, | |
| 58646b77 PB |
2961 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, |
| 2962 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_bool_V4SI }, | |
| 2963 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SF, | |
| 2964 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI }, | |
| a72c65c7 MM |
2965 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, |
| 2966 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, | |
| 2967 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2968 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SI }, | |
| 58646b77 PB |
2969 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, |
| 2970 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, | |
| 2971 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2972 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI }, | |
| 2973 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2974 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, | |
| 2975 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2976 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, | |
| 2977 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2978 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, | |
| 2979 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_4SI, | |
| 2980 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, | |
| 2981 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2982 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, | |
| 2983 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2984 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 2985 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2986 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, | |
| 2987 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2988 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 2989 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2990 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, | |
| 2991 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_8HI, | |
| 2992 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 2993 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 2994 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, | |
| 2995 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 2996 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 2997 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 2998 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, | |
| 2999 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 3000 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 3001 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 3002 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, | |
| 3003 | { ALTIVEC_BUILTIN_VEC_SEL, ALTIVEC_BUILTIN_VSEL_16QI, | |
| 3004 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 3005 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SF, | |
| 3006 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE }, | |
| 3007 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, | |
| 3008 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE }, | |
| 3009 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, | |
| 3010 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_NOT_OPAQUE }, | |
| 3011 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_4SI, | |
| 3012 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_NOT_OPAQUE }, | |
| 3013 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, | |
| 3014 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3015 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, | |
| 3016 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3017 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, | |
| 3018 | RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3019 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_8HI, | |
| 3020 | RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3021 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, | |
| 3022 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE }, | |
| 3023 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, | |
| 3024 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_NOT_OPAQUE }, | |
| 3025 | { ALTIVEC_BUILTIN_VEC_SLD, ALTIVEC_BUILTIN_VSLDOI_16QI, | |
| 3026 | RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_NOT_OPAQUE }, | |
| 4b3a6bcb | 3027 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DF, |
| c9485473 | 3028 | RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, |
| 4b3a6bcb | 3029 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, |
| c9485473 | 3030 | RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, |
| 4b3a6bcb | 3031 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, |
| c9485473 MM |
3032 | RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, |
| 3033 | ~RS6000_BTI_unsigned_V2DI }, | |
| 4b3a6bcb | 3034 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V2DI, |
| c9485473 MM |
3035 | RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, |
| 3036 | ~RS6000_BTI_bool_V2DI }, | |
| 4b3a6bcb | 3037 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, |
| 58646b77 | 3038 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, |
| 4b3a6bcb | 3039 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SF, |
| 58646b77 | 3040 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, |
| 4b3a6bcb | 3041 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3042 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, |
| 4b3a6bcb | 3043 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3044 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, |
| 4b3a6bcb | 3045 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3046 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, |
| 4b3a6bcb | 3047 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3048 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, |
| 4b3a6bcb | 3049 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3050 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, |
| 4b3a6bcb | 3051 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3052 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, |
| 4b3a6bcb | 3053 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V4SI, |
| 58646b77 | 3054 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, |
| 4b3a6bcb | 3055 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3056 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, |
| 4b3a6bcb | 3057 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3058 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, |
| 4b3a6bcb | 3059 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3060 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, |
| 4b3a6bcb | 3061 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3062 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, |
| 4b3a6bcb | 3063 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3064 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, |
| 4b3a6bcb | 3065 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3066 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, |
| 4b3a6bcb | 3067 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 | 3068 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, |
| 4b3a6bcb | 3069 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3070 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, |
| 4b3a6bcb | 3071 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3072 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, |
| 4b3a6bcb | 3073 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3074 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, |
| 4b3a6bcb | 3075 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3076 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, |
| 4b3a6bcb | 3077 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3078 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, |
| 4b3a6bcb | 3079 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3080 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, |
| 4b3a6bcb | 3081 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V16QI, |
| 58646b77 | 3082 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, |
| 4b3a6bcb | 3083 | { ALTIVEC_BUILTIN_VEC_ST, ALTIVEC_BUILTIN_STVX_V8HI, |
| 58646b77 PB |
3084 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, |
| 3085 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, | |
| 3086 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3087 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, | |
| 3088 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3089 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, | |
| 3090 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3091 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEBX, | |
| 3092 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3093 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3094 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3095 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3096 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3097 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3098 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3099 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3100 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3101 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3102 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3103 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEHX, | |
| 3104 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3105 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, | |
| 3106 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3107 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, | |
| 3108 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3109 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, | |
| 3110 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3111 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, | |
| 3112 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3113 | { ALTIVEC_BUILTIN_VEC_STE, ALTIVEC_BUILTIN_STVEWX, | |
| 3114 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3115 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3116 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3117 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3118 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3119 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3120 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3121 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3122 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3123 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3124 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3125 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3126 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3127 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3128 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3129 | { ALTIVEC_BUILTIN_VEC_STVEWX, ALTIVEC_BUILTIN_STVEWX, | |
| 3130 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3131 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3132 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3133 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3134 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3135 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3136 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3137 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3138 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3139 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3140 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3141 | { ALTIVEC_BUILTIN_VEC_STVEHX, ALTIVEC_BUILTIN_STVEHX, | |
| 3142 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3143 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3144 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3145 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3146 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3147 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3148 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3149 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3150 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3151 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3152 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 3153 | { ALTIVEC_BUILTIN_VEC_STVEBX, ALTIVEC_BUILTIN_STVEBX, | |
| 3154 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_void }, | |
| 4b3a6bcb | 3155 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, |
| 58646b77 | 3156 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, |
| 4b3a6bcb | 3157 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SF, |
| 58646b77 | 3158 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, |
| 4b3a6bcb | 3159 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3160 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, |
| 4b3a6bcb | 3161 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3162 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, |
| 4b3a6bcb | 3163 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3164 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, |
| 4b3a6bcb | 3165 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3166 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, |
| 4b3a6bcb | 3167 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3168 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, |
| 4b3a6bcb | 3169 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3170 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, |
| 4b3a6bcb | 3171 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V4SI, |
| 58646b77 | 3172 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, |
| 4b3a6bcb | 3173 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3174 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, |
| 4b3a6bcb | 3175 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3176 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, |
| 4b3a6bcb | 3177 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3178 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, |
| 4b3a6bcb | 3179 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3180 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, |
| 4b3a6bcb | 3181 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3182 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, |
| 4b3a6bcb | 3183 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3184 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, |
| 4b3a6bcb | 3185 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3186 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, |
| 4b3a6bcb | 3187 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3188 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, |
| 4b3a6bcb | 3189 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3190 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, |
| 4b3a6bcb | 3191 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3192 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, |
| 4b3a6bcb | 3193 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3194 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, |
| 4b3a6bcb | 3195 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3196 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, |
| 4b3a6bcb | 3197 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3198 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, |
| 4b3a6bcb | 3199 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V16QI, |
| 58646b77 | 3200 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, |
| 4b3a6bcb | 3201 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V8HI, |
| 58646b77 | 3202 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, |
| 4b3a6bcb | 3203 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, |
| c9485473 | 3204 | RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, |
| 4b3a6bcb | 3205 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DF, |
| c9485473 | 3206 | RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_double }, |
| 4b3a6bcb | 3207 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, |
| c9485473 | 3208 | RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, |
| 4b3a6bcb | 3209 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, |
| c9485473 MM |
3210 | RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, |
| 3211 | ~RS6000_BTI_unsigned_V2DI }, | |
| 4b3a6bcb | 3212 | { ALTIVEC_BUILTIN_VEC_STL, ALTIVEC_BUILTIN_STVXL_V2DI, |
| c9485473 MM |
3213 | RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, |
| 3214 | ~RS6000_BTI_bool_V2DI }, | |
| 0b61703c AP |
3215 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, |
| 3216 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, | |
| 3217 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3218 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3219 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3220 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, | |
| 3221 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3222 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, | |
| 3223 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3224 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3225 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3226 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, | |
| 3227 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3228 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3229 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3230 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, | |
| 3231 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3232 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, | |
| 3233 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3234 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, | |
| 3235 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3236 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3237 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3238 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, | |
| 3239 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3240 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3241 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3242 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, | |
| 3243 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3244 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, | |
| 3245 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3246 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3247 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3248 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, | |
| 3249 | { ALTIVEC_BUILTIN_VEC_STVLX, ALTIVEC_BUILTIN_STVLX, | |
| 3250 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3251 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3252 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, | |
| 3253 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3254 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3255 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3256 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, | |
| 3257 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3258 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, | |
| 3259 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3260 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3261 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3262 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, | |
| 3263 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3264 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3265 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3266 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, | |
| 3267 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3268 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, | |
| 3269 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3270 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, | |
| 3271 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3272 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3273 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3274 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, | |
| 3275 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3276 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3277 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3278 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, | |
| 3279 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3280 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, | |
| 3281 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3282 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3283 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3284 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, | |
| 3285 | { ALTIVEC_BUILTIN_VEC_STVLXL, ALTIVEC_BUILTIN_STVLXL, | |
| 3286 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3287 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3288 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, | |
| 3289 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3290 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3291 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3292 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, | |
| 3293 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3294 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, | |
| 3295 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3296 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3297 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3298 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, | |
| 3299 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3300 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3301 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3302 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, | |
| 3303 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3304 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, | |
| 3305 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3306 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, | |
| 3307 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3308 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3309 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3310 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, | |
| 3311 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3312 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3313 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3314 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, | |
| 3315 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3316 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, | |
| 3317 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3318 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3319 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3320 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, | |
| 3321 | { ALTIVEC_BUILTIN_VEC_STVRX, ALTIVEC_BUILTIN_STVRX, | |
| 3322 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 3323 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3324 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, | |
| 3325 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3326 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3327 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3328 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI }, | |
| 3329 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3330 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, | |
| 3331 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3332 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3333 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3334 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V4SI }, | |
| 3335 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3336 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI }, | |
| 3337 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3338 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI }, | |
| 3339 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3340 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI }, | |
| 3341 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3342 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, | |
| 3343 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3344 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3345 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3346 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V8HI }, | |
| 3347 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3348 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI }, | |
| 3349 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3350 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI }, | |
| 3351 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3352 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, | |
| 3353 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3354 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3355 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3356 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_unsigned_V16QI }, | |
| 3357 | { ALTIVEC_BUILTIN_VEC_STVRXL, ALTIVEC_BUILTIN_STVRXL, | |
| 3358 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI }, | |
| 29e6733c MM |
3359 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, |
| 3360 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE }, | |
| 3361 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_16QI, | |
| 3362 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3363 | RS6000_BTI_NOT_OPAQUE }, | |
| 3364 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, | |
| 3365 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3366 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_8HI, | |
| 3367 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3368 | RS6000_BTI_NOT_OPAQUE }, | |
| 3369 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, | |
| 3370 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE }, | |
| 3371 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SI, | |
| 3372 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3373 | RS6000_BTI_NOT_OPAQUE }, | |
| 3374 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, | |
| 3375 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_NOT_OPAQUE }, | |
| 3376 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DI, | |
| 3377 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3378 | RS6000_BTI_NOT_OPAQUE }, | |
| 3379 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_4SF, | |
| 3380 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE }, | |
| 3381 | { VSX_BUILTIN_VEC_XXSLDWI, VSX_BUILTIN_XXSLDWI_2DF, | |
| 3382 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE }, | |
| 3383 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DF, | |
| 3384 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_NOT_OPAQUE }, | |
| 3385 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, | |
| 3386 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_NOT_OPAQUE }, | |
| 3387 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_2DI, | |
| 3388 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3389 | RS6000_BTI_NOT_OPAQUE }, | |
| 3390 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SF, | |
| 3391 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_NOT_OPAQUE }, | |
| 3392 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, | |
| 3393 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_NOT_OPAQUE }, | |
| 3394 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_4SI, | |
| 3395 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3396 | RS6000_BTI_NOT_OPAQUE }, | |
| 3397 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, | |
| 3398 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_NOT_OPAQUE }, | |
| 3399 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_8HI, | |
| 3400 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3401 | RS6000_BTI_NOT_OPAQUE }, | |
| 3402 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, | |
| 3403 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_NOT_OPAQUE }, | |
| 3404 | { VSX_BUILTIN_VEC_XXPERMDI, VSX_BUILTIN_XXPERMDI_16QI, | |
| 3405 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3406 | RS6000_BTI_NOT_OPAQUE }, | |
| 58646b77 | 3407 | |
| c9485473 MM |
3408 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DF, |
| 3409 | RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, | |
| 3410 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, | |
| 3411 | RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI, 0 }, | |
| 3412 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, | |
| 3413 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, | |
| 3414 | ~RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3415 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVD2X_V2DI, | |
| 3416 | RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V2DI, 0 }, | |
| 3417 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, | |
| 3418 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF, 0 }, | |
| 3419 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SF, | |
| 3420 | RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float, 0 }, | |
| 3421 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3422 | RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V4SI, 0 }, | |
| 3423 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3424 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI, 0 }, | |
| 3425 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3426 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI, 0 }, | |
| 3427 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3428 | RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_long, 0 }, | |
| 3429 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3430 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, | |
| 3431 | ~RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3432 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3433 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTSI, 0 }, | |
| 3434 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V4SI, | |
| 3435 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, | |
| 3436 | ~RS6000_BTI_unsigned_long, 0 }, | |
| 3437 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3438 | RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V8HI, 0 }, | |
| 3439 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3440 | RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_pixel_V8HI, 0 }, | |
| 3441 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3442 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI, 0 }, | |
| 3443 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3444 | RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI, 0 }, | |
| 3445 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3446 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, | |
| 3447 | ~RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3448 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V8HI, | |
| 3449 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTHI, 0 }, | |
| 3450 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, | |
| 3451 | RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_bool_V16QI, 0 }, | |
| 3452 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, | |
| 3453 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI, 0 }, | |
| 3454 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, | |
| 3455 | RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI, 0 }, | |
| 3456 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, | |
| 3457 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, | |
| 3458 | ~RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3459 | { VSX_BUILTIN_VEC_LD, VSX_BUILTIN_LXVW4X_V16QI, | |
| 3460 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_UINTQI, 0 }, | |
| 3461 | ||
| 3462 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DF, | |
| 3463 | RS6000_BTI_void, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF }, | |
| 3464 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, | |
| 3465 | RS6000_BTI_void, RS6000_BTI_V2DI, RS6000_BTI_INTSI, ~RS6000_BTI_V2DI }, | |
| 3466 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, | |
| 3467 | RS6000_BTI_void, RS6000_BTI_unsigned_V2DI, RS6000_BTI_INTSI, | |
| 3468 | ~RS6000_BTI_unsigned_V2DI }, | |
| 3469 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVD2X_V2DI, | |
| 3470 | RS6000_BTI_void, RS6000_BTI_bool_V2DI, RS6000_BTI_INTSI, | |
| 3471 | ~RS6000_BTI_bool_V2DI }, | |
| 3472 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, | |
| 3473 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_V4SF }, | |
| 3474 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SF, | |
| 3475 | RS6000_BTI_void, RS6000_BTI_V4SF, RS6000_BTI_INTSI, ~RS6000_BTI_float }, | |
| 3476 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3477 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_V4SI }, | |
| 3478 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3479 | RS6000_BTI_void, RS6000_BTI_V4SI, RS6000_BTI_INTSI, ~RS6000_BTI_INTSI }, | |
| 3480 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3481 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, | |
| 3482 | ~RS6000_BTI_unsigned_V4SI }, | |
| 3483 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3484 | RS6000_BTI_void, RS6000_BTI_unsigned_V4SI, RS6000_BTI_INTSI, | |
| 3485 | ~RS6000_BTI_UINTSI }, | |
| 3486 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3487 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, | |
| 3488 | ~RS6000_BTI_bool_V4SI }, | |
| 3489 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3490 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, | |
| 3491 | ~RS6000_BTI_UINTSI }, | |
| 3492 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V4SI, | |
| 3493 | RS6000_BTI_void, RS6000_BTI_bool_V4SI, RS6000_BTI_INTSI, | |
| 3494 | ~RS6000_BTI_INTSI }, | |
| 3495 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3496 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_V8HI }, | |
| 3497 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3498 | RS6000_BTI_void, RS6000_BTI_V8HI, RS6000_BTI_INTSI, ~RS6000_BTI_INTHI }, | |
| 3499 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3500 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, | |
| 3501 | ~RS6000_BTI_unsigned_V8HI }, | |
| 3502 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3503 | RS6000_BTI_void, RS6000_BTI_unsigned_V8HI, RS6000_BTI_INTSI, | |
| 3504 | ~RS6000_BTI_UINTHI }, | |
| 3505 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3506 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, | |
| 3507 | ~RS6000_BTI_bool_V8HI }, | |
| 3508 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3509 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, | |
| 3510 | ~RS6000_BTI_UINTHI }, | |
| 3511 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V8HI, | |
| 3512 | RS6000_BTI_void, RS6000_BTI_bool_V8HI, RS6000_BTI_INTSI, | |
| 3513 | ~RS6000_BTI_INTHI }, | |
| 3514 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3515 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_V16QI }, | |
| 3516 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3517 | RS6000_BTI_void, RS6000_BTI_V16QI, RS6000_BTI_INTSI, ~RS6000_BTI_INTQI }, | |
| 3518 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3519 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, | |
| 3520 | ~RS6000_BTI_unsigned_V16QI }, | |
| 3521 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3522 | RS6000_BTI_void, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI, | |
| 3523 | ~RS6000_BTI_UINTQI }, | |
| 3524 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3525 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, | |
| 3526 | ~RS6000_BTI_bool_V16QI }, | |
| 3527 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3528 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, | |
| 3529 | ~RS6000_BTI_UINTQI }, | |
| 3530 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3531 | RS6000_BTI_void, RS6000_BTI_bool_V16QI, RS6000_BTI_INTSI, | |
| 3532 | ~RS6000_BTI_INTQI }, | |
| 3533 | { VSX_BUILTIN_VEC_ST, VSX_BUILTIN_STXVW4X_V16QI, | |
| 3534 | RS6000_BTI_void, RS6000_BTI_pixel_V8HI, RS6000_BTI_INTSI, | |
| 3535 | ~RS6000_BTI_pixel_V8HI }, | |
| 3536 | ||
| 58646b77 | 3537 | /* Predicates. */ |
| 7fa14a01 | 3538 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3539 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3540 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3541 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3542 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3543 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3544 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3545 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3546 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3547 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3548 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3549 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3550 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3551 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3552 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3553 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3554 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3555 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3556 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3557 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3558 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3559 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3560 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3561 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3562 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3563 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3564 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3565 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3566 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3567 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3568 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3569 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, |
| 7fa14a01 | 3570 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3571 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3572 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3573 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, |
| 65fa79c3 BS |
3574 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, |
| 3575 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3576 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, | |
| 3577 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3578 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTUD_P, | |
| 3579 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3580 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3581 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, | |
| 3582 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3583 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3584 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3585 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, | |
| 7fa14a01 | 3586 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, ALTIVEC_BUILTIN_VCMPGTFP_P, |
| 58646b77 | 3587 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, |
| 7fa14a01 | 3588 | { ALTIVEC_BUILTIN_VEC_VCMPGT_P, VSX_BUILTIN_XVCMPGTDP_P, |
| 29e6733c | 3589 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, |
| 58646b77 PB |
3590 | |
| 3591 | ||
| 7fa14a01 | 3592 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3593 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3594 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3595 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3596 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3597 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3598 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3599 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3600 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3601 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3602 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3603 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3604 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUB_P, |
| 58646b77 | 3605 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3606 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3607 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3608 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3609 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3610 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3611 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3612 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3613 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3614 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3615 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3616 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3617 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3618 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3619 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3620 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUH_P, |
| 58646b77 | 3621 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_pixel_V8HI, RS6000_BTI_pixel_V8HI }, |
| 7fa14a01 | 3622 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3623 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3624 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3625 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3626 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3627 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3628 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3629 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, |
| 7fa14a01 | 3630 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3631 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3632 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3633 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, |
| 7fa14a01 | 3634 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQUW_P, |
| 58646b77 | 3635 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI }, |
| a5965b52 MM |
3636 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, |
| 3637 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3638 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3639 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3640 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3641 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3642 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3643 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, | |
| 3644 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3645 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3646 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3647 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, | |
| 3648 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, P8V_BUILTIN_VCMPEQUD_P, | |
| 3649 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI }, | |
| 7fa14a01 | 3650 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, ALTIVEC_BUILTIN_VCMPEQFP_P, |
| 58646b77 | 3651 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, |
| 7fa14a01 | 3652 | { ALTIVEC_BUILTIN_VEC_VCMPEQ_P, VSX_BUILTIN_XVCMPEQDP_P, |
| 29e6733c | 3653 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, |
| 58646b77 PB |
3654 | |
| 3655 | ||
| 3656 | /* cmpge is the same as cmpgt for all cases except floating point. | |
| 3657 | There is further code to deal with this special case in | |
| 3658 | altivec_build_resolved_builtin. */ | |
| 7fa14a01 | 3659 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3660 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3661 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3662 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3663 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUB_P, |
| 58646b77 | 3664 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, |
| 7fa14a01 | 3665 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3666 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3667 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3668 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI }, |
| 7fa14a01 | 3669 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSB_P, |
| 58646b77 | 3670 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V16QI, RS6000_BTI_V16QI }, |
| 7fa14a01 | 3671 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3672 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3673 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3674 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3675 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUH_P, |
| 58646b77 | 3676 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, |
| 7fa14a01 | 3677 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3678 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3679 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3680 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI }, |
| 7fa14a01 | 3681 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSH_P, |
| 58646b77 | 3682 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI }, |
| 7fa14a01 | 3683 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3684 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3685 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3686 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3687 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTUW_P, |
| 58646b77 | 3688 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, |
| 7fa14a01 | 3689 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3690 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI }, |
| 7fa14a01 | 3691 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3692 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI }, |
| 7fa14a01 | 3693 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGTSW_P, |
| 58646b77 | 3694 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SI, RS6000_BTI_V4SI }, |
| a5965b52 MM |
3695 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, |
| 3696 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3697 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, | |
| 3698 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3699 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTUD_P, | |
| 3700 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 3701 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3702 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI }, | |
| 3703 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3704 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI }, | |
| 3705 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, P8V_BUILTIN_VCMPGTSD_P, | |
| 3706 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DI, RS6000_BTI_V2DI }, | |
| 7fa14a01 | 3707 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, ALTIVEC_BUILTIN_VCMPGEFP_P, |
| 58646b77 | 3708 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V4SF, RS6000_BTI_V4SF }, |
| 7fa14a01 | 3709 | { ALTIVEC_BUILTIN_VEC_VCMPGE_P, VSX_BUILTIN_XVCMPGEDP_P, |
| 29e6733c | 3710 | RS6000_BTI_INTSI, RS6000_BTI_INTSI, RS6000_BTI_V2DF, RS6000_BTI_V2DF }, |
| 58646b77 | 3711 | |
| 0bd62dca MM |
3712 | /* Power8 vector overloaded functions. */ |
| 3713 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3714 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3715 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3716 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 3717 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3718 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3719 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3720 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, | |
| 3721 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3722 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3723 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3724 | RS6000_BTI_bool_V16QI, 0 }, | |
| 3725 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V16QI, | |
| 3726 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3727 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3728 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3729 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3730 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3731 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 3732 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3733 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3734 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3735 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, | |
| 3736 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3737 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3738 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3739 | RS6000_BTI_bool_V8HI, 0 }, | |
| 3740 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V8HI, | |
| 3741 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3742 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3743 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3744 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3745 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3746 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 3747 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3748 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3749 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3750 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, | |
| 3751 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3752 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3753 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3754 | RS6000_BTI_bool_V4SI, 0 }, | |
| 3755 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SI, | |
| 3756 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3757 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3758 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3759 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3760 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3761 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 3762 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3763 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3764 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3765 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, | |
| 3766 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3767 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3768 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3769 | RS6000_BTI_bool_V2DI, 0 }, | |
| 3770 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DI, | |
| 3771 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3772 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3773 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V4SF, | |
| 3774 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 3775 | { P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_EQV_V2DF, | |
| 3776 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 3777 | ||
| 3778 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3779 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3780 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3781 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 3782 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3783 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3784 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3785 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, | |
| 3786 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3787 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3788 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3789 | RS6000_BTI_bool_V16QI, 0 }, | |
| 3790 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V16QI, | |
| 3791 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3792 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3793 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3794 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3795 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3796 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 3797 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3798 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3799 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3800 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, | |
| 3801 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3802 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3803 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3804 | RS6000_BTI_bool_V8HI, 0 }, | |
| 3805 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V8HI, | |
| 3806 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3807 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3808 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3809 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3810 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3811 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 3812 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3813 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3814 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3815 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, | |
| 3816 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3817 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3818 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3819 | RS6000_BTI_bool_V4SI, 0 }, | |
| 3820 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SI, | |
| 3821 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3822 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3823 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3824 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3825 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3826 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 3827 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3828 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3829 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3830 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, | |
| 3831 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3832 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3833 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3834 | RS6000_BTI_bool_V2DI, 0 }, | |
| 3835 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DI, | |
| 3836 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3837 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3838 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V4SF, | |
| 3839 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 3840 | { P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_NAND_V2DF, | |
| 3841 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 3842 | ||
| 3843 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3844 | RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3845 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3846 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_bool_V16QI, 0 }, | |
| 3847 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3848 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3849 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3850 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_bool_V16QI, | |
| 3851 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3852 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3853 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3854 | RS6000_BTI_bool_V16QI, 0 }, | |
| 3855 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V16QI, | |
| 3856 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 3857 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3858 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3859 | RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3860 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3861 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_bool_V8HI, 0 }, | |
| 3862 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3863 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, | |
| 3864 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3865 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_bool_V8HI, | |
| 3866 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3867 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3868 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3869 | RS6000_BTI_bool_V8HI, 0 }, | |
| 3870 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V8HI, | |
| 3871 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 3872 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 3873 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3874 | RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3875 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3876 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 3877 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3878 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 3879 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3880 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_bool_V4SI, | |
| 3881 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3882 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3883 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3884 | RS6000_BTI_bool_V4SI, 0 }, | |
| 3885 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SI, | |
| 3886 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 3887 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 3888 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3889 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3890 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3891 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 3892 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3893 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3894 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3895 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, | |
| 3896 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3897 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3898 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3899 | RS6000_BTI_bool_V2DI, 0 }, | |
| 3900 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DI, | |
| 3901 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 3902 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3903 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V4SF, | |
| 3904 | RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, | |
| 3905 | { P8V_BUILTIN_VEC_ORC, P8V_BUILTIN_ORC_V2DF, | |
| 3906 | RS6000_BTI_V2DF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, | |
| 3907 | ||
| a16a872d MM |
3908 | { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, |
| 3909 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 3910 | { P8V_BUILTIN_VEC_VADDCUQ, P8V_BUILTIN_VADDCUQ, | |
| 3911 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 3912 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 3913 | ||
| 0bd62dca MM |
3914 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, |
| 3915 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3916 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, | |
| 3917 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 3918 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, | |
| 3919 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 3920 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, | |
| 3921 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3922 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, | |
| 3923 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 3924 | { P8V_BUILTIN_VEC_VADDUDM, P8V_BUILTIN_VADDUDM, | |
| 3925 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 3926 | ||
| a16a872d MM |
3927 | { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, |
| 3928 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 3929 | { P8V_BUILTIN_VEC_VADDUQM, P8V_BUILTIN_VADDUQM, | |
| 3930 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 3931 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 3932 | ||
| 117f16fb MM |
3933 | { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, |
| 3934 | RS6000_BTI_V2DI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, | |
| 3935 | { P8V_BUILTIN_VEC_VBPERMQ, P8V_BUILTIN_VBPERMQ, | |
| 3936 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, | |
| 3937 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 3938 | ||
| 0bd62dca MM |
3939 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, |
| 3940 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 3941 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZB, | |
| 3942 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 3943 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, | |
| 3944 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 3945 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZH, | |
| 3946 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 3947 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, | |
| 3948 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| 3949 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZW, | |
| 3950 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, | |
| 3951 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, | |
| 3952 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, | |
| 3953 | { P8V_BUILTIN_VEC_VCLZ, P8V_BUILTIN_VCLZD, | |
| 3954 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, | |
| 3955 | ||
| 3956 | { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, | |
| 3957 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 3958 | { P8V_BUILTIN_VEC_VCLZB, P8V_BUILTIN_VCLZB, | |
| 3959 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 3960 | ||
| 3961 | { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, | |
| 3962 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 3963 | { P8V_BUILTIN_VEC_VCLZH, P8V_BUILTIN_VCLZH, | |
| 3964 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 3965 | ||
| 3966 | { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, | |
| 3967 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| 3968 | { P8V_BUILTIN_VEC_VCLZW, P8V_BUILTIN_VCLZW, | |
| 3969 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, | |
| 3970 | ||
| 3971 | { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, | |
| 3972 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, | |
| 3973 | { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD, | |
| 3974 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, | |
| 3975 | ||
| 3976 | { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, | |
| 3977 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 3978 | { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, | |
| 3979 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 3980 | ||
| a16a872d MM |
3981 | { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, |
| 3982 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, | |
| 3983 | { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, | |
| 3984 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 3985 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, | |
| 3986 | ||
| 3987 | { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, | |
| 3988 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, | |
| 3989 | { P8V_BUILTIN_VEC_VADDEUQM, P8V_BUILTIN_VADDEUQM, | |
| 3990 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 3991 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, | |
| 3992 | ||
| 3993 | { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, | |
| 3994 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, | |
| 3995 | { P8V_BUILTIN_VEC_VSUBECUQ, P8V_BUILTIN_VSUBECUQ, | |
| 3996 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 3997 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, | |
| 3998 | ||
| 3999 | { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, | |
| 4000 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, | |
| 4001 | { P8V_BUILTIN_VEC_VSUBEUQM, P8V_BUILTIN_VSUBEUQM, | |
| 4002 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 4003 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI }, | |
| 4004 | ||
| 0bd62dca MM |
4005 | { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, |
| 4006 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4007 | { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, | |
| 4008 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 4009 | { P8V_BUILTIN_VEC_VMINSD, P8V_BUILTIN_VMINSD, | |
| 4010 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4011 | ||
| 4012 | { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, | |
| 4013 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4014 | { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, | |
| 4015 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 4016 | { P8V_BUILTIN_VEC_VMAXSD, P8V_BUILTIN_VMAXSD, | |
| 4017 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4018 | ||
| 4019 | { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, | |
| 4020 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, | |
| 4021 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4022 | { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, | |
| 4023 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4024 | RS6000_BTI_bool_V2DI, 0 }, | |
| 4025 | { P8V_BUILTIN_VEC_VMINUD, P8V_BUILTIN_VMINUD, | |
| 4026 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4027 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4028 | ||
| 4029 | { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, | |
| 4030 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, | |
| 4031 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4032 | { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, | |
| 4033 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4034 | RS6000_BTI_bool_V2DI, 0 }, | |
| 4035 | { P8V_BUILTIN_VEC_VMAXUD, P8V_BUILTIN_VMAXUD, | |
| 4036 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4037 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4038 | ||
| 4039 | { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, | |
| 4040 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 4041 | { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, | |
| 4042 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 4043 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 65fa79c3 BS |
4044 | { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, |
| 4045 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 0bd62dca MM |
4046 | |
| 4047 | { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW, | |
| 4048 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, | |
| 4049 | { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW, | |
| 4050 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 4051 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 65fa79c3 BS |
4052 | { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW, |
| 4053 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, | |
| 0bd62dca MM |
4054 | |
| 4055 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, | |
| 4056 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 4057 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTB, | |
| 4058 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 4059 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, | |
| 4060 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 4061 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTH, | |
| 4062 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 4063 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, | |
| 4064 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| 4065 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTW, | |
| 4066 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, | |
| 4067 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, | |
| 4068 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, | |
| 4069 | { P8V_BUILTIN_VEC_VPOPCNT, P8V_BUILTIN_VPOPCNTD, | |
| 4070 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, | |
| 4071 | ||
| 4072 | { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, | |
| 4073 | RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, | |
| 4074 | { P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB, | |
| 4075 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 }, | |
| 4076 | ||
| 4077 | { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, | |
| 4078 | RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, | |
| 4079 | { P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH, | |
| 4080 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 }, | |
| 4081 | ||
| 4082 | { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, | |
| 4083 | RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, | |
| 4084 | { P8V_BUILTIN_VEC_VPOPCNTW, P8V_BUILTIN_VPOPCNTW, | |
| 4085 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 }, | |
| 4086 | ||
| 4087 | { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, | |
| 4088 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, | |
| 4089 | { P8V_BUILTIN_VEC_VPOPCNTD, P8V_BUILTIN_VPOPCNTD, | |
| 4090 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 }, | |
| 4091 | ||
| 4092 | { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, | |
| 4093 | RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4094 | { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, | |
| 4095 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4096 | { P8V_BUILTIN_VEC_VPKUDUM, P8V_BUILTIN_VPKUDUM, | |
| 4097 | RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 4098 | ||
| 4099 | { P8V_BUILTIN_VEC_VPKSDSS, P8V_BUILTIN_VPKSDSS, | |
| 4100 | RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4101 | ||
| 4102 | { P8V_BUILTIN_VEC_VPKUDUS, P8V_BUILTIN_VPKUDUS, | |
| 4103 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4104 | ||
| 4105 | { P8V_BUILTIN_VEC_VPKSDUS, P8V_BUILTIN_VPKSDUS, | |
| 4106 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4107 | ||
| 4108 | { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, | |
| 4109 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4110 | { P8V_BUILTIN_VEC_VRLD, P8V_BUILTIN_VRLD, | |
| 4111 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4112 | ||
| 4113 | { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, | |
| 4114 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4115 | { P8V_BUILTIN_VEC_VSLD, P8V_BUILTIN_VSLD, | |
| 4116 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4117 | ||
| 4118 | { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, | |
| 4119 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4120 | { P8V_BUILTIN_VEC_VSRD, P8V_BUILTIN_VSRD, | |
| 4121 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4122 | ||
| 4123 | { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD, | |
| 4124 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4125 | { P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD, | |
| 4126 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4127 | ||
| a16a872d MM |
4128 | { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, |
| 4129 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 4130 | { P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ, | |
| 4131 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 4132 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 4133 | ||
| 0bd62dca MM |
4134 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, |
| 4135 | RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4136 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, | |
| 4137 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 4138 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, | |
| 4139 | RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, | |
| 4140 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, | |
| 4141 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4142 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, | |
| 4143 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_bool_V2DI, 0 }, | |
| 4144 | { P8V_BUILTIN_VEC_VSUBUDM, P8V_BUILTIN_VSUBUDM, | |
| 4145 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4146 | ||
| a16a872d MM |
4147 | { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, |
| 4148 | RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0 }, | |
| 4149 | { P8V_BUILTIN_VEC_VSUBUQM, P8V_BUILTIN_VSUBUQM, | |
| 4150 | RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, | |
| 4151 | RS6000_BTI_unsigned_V1TI, 0 }, | |
| 4152 | ||
| 0bd62dca MM |
4153 | { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, |
| 4154 | RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, | |
| 4155 | { P8V_BUILTIN_VEC_VUPKHSW, P8V_BUILTIN_VUPKHSW, | |
| 4156 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 4157 | ||
| 4158 | { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, | |
| 4159 | RS6000_BTI_V2DI, RS6000_BTI_V4SI, 0, 0 }, | |
| 4160 | { P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW, | |
| 4161 | RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 }, | |
| 4162 | ||
| 4163 | { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, | |
| 4164 | RS6000_BTI_V16QI, 0, 0, 0 }, | |
| 4165 | { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD, | |
| 4166 | RS6000_BTI_unsigned_V16QI, 0, 0, 0 }, | |
| 4167 | ||
| f62511da MM |
4168 | /* Crypto builtins. */ |
| 4169 | { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V16QI, | |
| 4170 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 4171 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI }, | |
| 4172 | { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V8HI, | |
| 4173 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 4174 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI }, | |
| 4175 | { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V4SI, | |
| 4176 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 4177 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI }, | |
| 4178 | { CRYPTO_BUILTIN_VPERMXOR, CRYPTO_BUILTIN_VPERMXOR_V2DI, | |
| 4179 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4180 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI }, | |
| 4181 | ||
| 4182 | { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMB, | |
| 4183 | RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, | |
| 4184 | RS6000_BTI_unsigned_V16QI, 0 }, | |
| 4185 | { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMH, | |
| 4186 | RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, | |
| 4187 | RS6000_BTI_unsigned_V8HI, 0 }, | |
| 4188 | { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMW, | |
| 4189 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 4190 | RS6000_BTI_unsigned_V4SI, 0 }, | |
| 4191 | { CRYPTO_BUILTIN_VPMSUM, CRYPTO_BUILTIN_VPMSUMD, | |
| 4192 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4193 | RS6000_BTI_unsigned_V2DI, 0 }, | |
| 4194 | ||
| 4195 | { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAW, | |
| 4196 | RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, | |
| 4197 | RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 4198 | { CRYPTO_BUILTIN_VSHASIGMA, CRYPTO_BUILTIN_VSHASIGMAD, | |
| 4199 | RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, | |
| 4200 | RS6000_BTI_INTSI, RS6000_BTI_INTSI }, | |
| 4201 | ||
| 81f40b79 | 4202 | { (enum rs6000_builtins) 0, (enum rs6000_builtins) 0, 0, 0, 0, 0 } |
| 58646b77 PB |
4203 | }; |
| 4204 | \f | |
| 4205 | ||
| 4206 | /* Convert a type stored into a struct altivec_builtin_types as ID, | |
| 4207 | into a tree. The types are in rs6000_builtin_types: negative values | |
| 4208 | create a pointer type for the type associated to ~ID. Note it is | |
| 4209 | a logical NOT, rather than a negation, otherwise you cannot represent | |
| 4210 | a pointer type for ID 0. */ | |
| 4211 | ||
| 4212 | static inline tree | |
| 4213 | rs6000_builtin_type (int id) | |
| 4214 | { | |
| 4215 | tree t; | |
| 4216 | t = rs6000_builtin_types[id < 0 ? ~id : id]; | |
| 4217 | return id < 0 ? build_pointer_type (t) : t; | |
| 4218 | } | |
| 4219 | ||
| 4220 | /* Check whether the type of an argument, T, is compatible with a | |
| 4221 | type ID stored into a struct altivec_builtin_types. Integer | |
| 4222 | types are considered compatible; otherwise, the language hook | |
| 4223 | lang_hooks.types_compatible_p makes the decision. */ | |
| 4224 | ||
| 4225 | static inline bool | |
| 4226 | rs6000_builtin_type_compatible (tree t, int id) | |
| 4227 | { | |
| 4228 | tree builtin_type; | |
| 4229 | builtin_type = rs6000_builtin_type (id); | |
| fd88fd09 AP |
4230 | if (t == error_mark_node) |
| 4231 | return false; | |
| 58646b77 PB |
4232 | if (INTEGRAL_TYPE_P (t) && INTEGRAL_TYPE_P (builtin_type)) |
| 4233 | return true; | |
| 4234 | else | |
| 4235 | return lang_hooks.types_compatible_p (t, builtin_type); | |
| 4236 | } | |
| 4237 | ||
| 4238 | ||
| 24d5b351 BS |
4239 | /* In addition to calling fold_convert for EXPR of type TYPE, also |
| 4240 | call c_fully_fold to remove any C_MAYBE_CONST_EXPRs that could be | |
| 4241 | hiding there (PR47197). */ | |
| 4242 | ||
| 4243 | static tree | |
| 4244 | fully_fold_convert (tree type, tree expr) | |
| 4245 | { | |
| 4246 | tree result = fold_convert (type, expr); | |
| 4247 | bool maybe_const = true; | |
| 4248 | ||
| 4249 | if (!c_dialect_cxx ()) | |
| 4250 | result = c_fully_fold (result, false, &maybe_const); | |
| 4251 | ||
| 4252 | return result; | |
| 4253 | } | |
| 4254 | ||
| 58646b77 PB |
4255 | /* Build a tree for a function call to an Altivec non-overloaded builtin. |
| 4256 | The overloaded builtin that matched the types and args is described | |
| 4257 | by DESC. The N arguments are given in ARGS, respectively. | |
| 4258 | ||
| 4259 | Actually the only thing it does is calling fold_convert on ARGS, with | |
| 4260 | a small exception for vec_{all,any}_{ge,le} predicates. */ | |
| 4261 | ||
| 4262 | static tree | |
| 4263 | altivec_build_resolved_builtin (tree *args, int n, | |
| 4264 | const struct altivec_builtin_types *desc) | |
| 4265 | { | |
| 4266 | tree impl_fndecl = rs6000_builtin_decls[desc->overloaded_code]; | |
| 4267 | tree ret_type = rs6000_builtin_type (desc->ret_type); | |
| 4268 | tree argtypes = TYPE_ARG_TYPES (TREE_TYPE (impl_fndecl)); | |
| 5039610b SL |
4269 | tree arg_type[3]; |
| 4270 | tree call; | |
| 58646b77 PB |
4271 | |
| 4272 | int i; | |
| 4273 | for (i = 0; i < n; i++) | |
| 4274 | arg_type[i] = TREE_VALUE (argtypes), argtypes = TREE_CHAIN (argtypes); | |
| 4275 | ||
| 4276 | /* The AltiVec overloading implementation is overall gross, but this | |
| 4277 | is particularly disgusting. The vec_{all,any}_{ge,le} builtins | |
| 4278 | are completely different for floating-point vs. integer vector | |
| 4279 | types, because the former has vcmpgefp, but the latter should use | |
| 4280 | vcmpgtXX. | |
| 4281 | ||
| 4282 | In practice, the second and third arguments are swapped, and the | |
| 4283 | condition (LT vs. EQ, which is recognizable by bit 1 of the first | |
| 4284 | argument) is reversed. Patch the arguments here before building | |
| 4285 | the resolved CALL_EXPR. */ | |
| 7fa14a01 | 4286 | if (desc->code == ALTIVEC_BUILTIN_VEC_VCMPGE_P |
| eb1f7a0a BS |
4287 | && desc->overloaded_code != ALTIVEC_BUILTIN_VCMPGEFP_P |
| 4288 | && desc->overloaded_code != VSX_BUILTIN_XVCMPGEDP_P) | |
| 58646b77 PB |
4289 | { |
| 4290 | tree t; | |
| 4291 | t = args[2], args[2] = args[1], args[1] = t; | |
| 4292 | t = arg_type[2], arg_type[2] = arg_type[1], arg_type[1] = t; | |
| 4293 | ||
| 4294 | args[0] = fold_build2 (BIT_XOR_EXPR, TREE_TYPE (args[0]), args[0], | |
| 4295 | build_int_cst (NULL_TREE, 2)); | |
| 4296 | } | |
| 4297 | ||
| 5039610b SL |
4298 | switch (n) |
| 4299 | { | |
| 4300 | case 0: | |
| 4301 | call = build_call_expr (impl_fndecl, 0); | |
| 4302 | break; | |
| 4303 | case 1: | |
| 4304 | call = build_call_expr (impl_fndecl, 1, | |
| 24d5b351 | 4305 | fully_fold_convert (arg_type[0], args[0])); |
| 5039610b SL |
4306 | break; |
| 4307 | case 2: | |
| 4308 | call = build_call_expr (impl_fndecl, 2, | |
| 24d5b351 BS |
4309 | fully_fold_convert (arg_type[0], args[0]), |
| 4310 | fully_fold_convert (arg_type[1], args[1])); | |
| 5039610b SL |
4311 | break; |
| 4312 | case 3: | |
| 4313 | call = build_call_expr (impl_fndecl, 3, | |
| 24d5b351 BS |
4314 | fully_fold_convert (arg_type[0], args[0]), |
| 4315 | fully_fold_convert (arg_type[1], args[1]), | |
| 4316 | fully_fold_convert (arg_type[2], args[2])); | |
| 5039610b SL |
4317 | break; |
| 4318 | default: | |
| 4319 | gcc_unreachable (); | |
| 4320 | } | |
| 4321 | return fold_convert (ret_type, call); | |
| 58646b77 PB |
4322 | } |
| 4323 | ||
| 4324 | /* Implementation of the resolve_overloaded_builtin target hook, to | |
| 4325 | support Altivec's overloaded builtins. */ | |
| 4326 | ||
| 2fab365e | 4327 | tree |
| 4b29c5e5 | 4328 | altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, |
| 8012b923 | 4329 | void *passed_arglist) |
| 58646b77 | 4330 | { |
| 9771b263 DN |
4331 | vec<tree, va_gc> *arglist = static_cast<vec<tree, va_gc> *> (passed_arglist); |
| 4332 | unsigned int nargs = vec_safe_length (arglist); | |
| 7fa14a01 MM |
4333 | enum rs6000_builtins fcode |
| 4334 | = (enum rs6000_builtins)DECL_FUNCTION_CODE (fndecl); | |
| 58646b77 PB |
4335 | tree fnargs = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); |
| 4336 | tree types[3], args[3]; | |
| 4337 | const struct altivec_builtin_types *desc; | |
| bbbbb16a | 4338 | unsigned int n; |
| 58646b77 | 4339 | |
| 7fa14a01 | 4340 | if (!rs6000_overloaded_builtin_p (fcode)) |
| 58646b77 PB |
4341 | return NULL_TREE; |
| 4342 | ||
| 7fa14a01 MM |
4343 | if (TARGET_DEBUG_BUILTIN) |
| 4344 | fprintf (stderr, "altivec_resolve_overloaded_builtin, code = %4d, %s\n", | |
| 4345 | (int)fcode, IDENTIFIER_POINTER (DECL_NAME (fndecl))); | |
| 264f4afa BS |
4346 | |
| 4347 | /* vec_lvsl and vec_lvsr are deprecated for use with LE element order. */ | |
| 4348 | if (fcode == ALTIVEC_BUILTIN_VEC_LVSL && !VECTOR_ELT_ORDER_BIG) | |
| 4349 | warning (OPT_Wdeprecated, "vec_lvsl is deprecated for little endian; use \ | |
| 4350 | assignment for unaligned loads and stores"); | |
| 4351 | else if (fcode == ALTIVEC_BUILTIN_VEC_LVSR && !VECTOR_ELT_ORDER_BIG) | |
| 4352 | warning (OPT_Wdeprecated, "vec_lvsr is deprecated for little endian; use \ | |
| 4353 | assignment for unaligned loads and stores"); | |
| 7fa14a01 | 4354 | |
| 266b4890 AP |
4355 | /* For now treat vec_splats and vec_promote as the same. */ |
| 4356 | if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS | |
| 4357 | || fcode == ALTIVEC_BUILTIN_VEC_PROMOTE) | |
| 4358 | { | |
| 4359 | tree type, arg; | |
| 4360 | int size; | |
| 4361 | int i; | |
| 4362 | bool unsigned_p; | |
| 9771b263 | 4363 | vec<constructor_elt, va_gc> *vec; |
| 266b4890 AP |
4364 | const char *name = fcode == ALTIVEC_BUILTIN_VEC_SPLATS ? "vec_splats": "vec_promote"; |
| 4365 | ||
| bbbbb16a | 4366 | if (nargs == 0) |
| 266b4890 AP |
4367 | { |
| 4368 | error ("%s only accepts %d arguments", name, (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE)+1 ); | |
| 4369 | return error_mark_node; | |
| 4370 | } | |
| bbbbb16a | 4371 | if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS && nargs != 1) |
| 266b4890 AP |
4372 | { |
| 4373 | error ("%s only accepts 1 argument", name); | |
| 4374 | return error_mark_node; | |
| 4375 | } | |
| bbbbb16a | 4376 | if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE && nargs != 2) |
| 266b4890 AP |
4377 | { |
| 4378 | error ("%s only accepts 2 arguments", name); | |
| 4379 | return error_mark_node; | |
| 4380 | } | |
| 4381 | /* Ignore promote's element argument. */ | |
| 4382 | if (fcode == ALTIVEC_BUILTIN_VEC_PROMOTE | |
| 9771b263 | 4383 | && !INTEGRAL_TYPE_P (TREE_TYPE ((*arglist)[1]))) |
| 266b4890 AP |
4384 | goto bad; |
| 4385 | ||
| 9771b263 | 4386 | arg = (*arglist)[0]; |
| 266b4890 AP |
4387 | type = TREE_TYPE (arg); |
| 4388 | if (!SCALAR_FLOAT_TYPE_P (type) | |
| 4389 | && !INTEGRAL_TYPE_P (type)) | |
| 4390 | goto bad; | |
| 4391 | unsigned_p = TYPE_UNSIGNED (type); | |
| 266b4890 AP |
4392 | switch (TYPE_MODE (type)) |
| 4393 | { | |
| a16a872d MM |
4394 | case TImode: |
| 4395 | type = (unsigned_p ? unsigned_V1TI_type_node : V1TI_type_node); | |
| 4396 | size = 1; | |
| 4397 | break; | |
| 29e6733c MM |
4398 | case DImode: |
| 4399 | type = (unsigned_p ? unsigned_V2DI_type_node : V2DI_type_node); | |
| 4400 | size = 2; | |
| 4401 | break; | |
| 266b4890 AP |
4402 | case SImode: |
| 4403 | type = (unsigned_p ? unsigned_V4SI_type_node : V4SI_type_node); | |
| 4404 | size = 4; | |
| 4405 | break; | |
| 4406 | case HImode: | |
| 4407 | type = (unsigned_p ? unsigned_V8HI_type_node : V8HI_type_node); | |
| 4408 | size = 8; | |
| 4409 | break; | |
| 4410 | case QImode: | |
| 4411 | type = (unsigned_p ? unsigned_V16QI_type_node : V16QI_type_node); | |
| 4412 | size = 16; | |
| 4413 | break; | |
| 4414 | case SFmode: type = V4SF_type_node; size = 4; break; | |
| 29e6733c | 4415 | case DFmode: type = V2DF_type_node; size = 2; break; |
| 266b4890 AP |
4416 | default: |
| 4417 | goto bad; | |
| 4418 | } | |
| 4419 | arg = save_expr (fold_convert (TREE_TYPE (type), arg)); | |
| 9771b263 | 4420 | vec_alloc (vec, size); |
| 266b4890 AP |
4421 | for(i = 0; i < size; i++) |
| 4422 | { | |
| f32682ca | 4423 | constructor_elt elt = {NULL_TREE, arg}; |
| 9771b263 | 4424 | vec->quick_push (elt); |
| 266b4890 AP |
4425 | } |
| 4426 | return build_constructor (type, vec); | |
| 4427 | } | |
| 4428 | ||
| 09fccb62 | 4429 | /* For now use pointer tricks to do the extraction, unless we are on VSX |
| 29e6733c | 4430 | extracting a double from a constant offset. */ |
| 266b4890 AP |
4431 | if (fcode == ALTIVEC_BUILTIN_VEC_EXTRACT) |
| 4432 | { | |
| 4433 | tree arg1; | |
| 4434 | tree arg1_type; | |
| 4435 | tree arg2; | |
| 4436 | tree arg1_inner_type; | |
| 4437 | tree decl, stmt; | |
| 4438 | tree innerptrtype; | |
| ef4bddc2 | 4439 | machine_mode mode; |
| 266b4890 AP |
4440 | |
| 4441 | /* No second argument. */ | |
| bbbbb16a | 4442 | if (nargs != 2) |
| 266b4890 AP |
4443 | { |
| 4444 | error ("vec_extract only accepts 2 arguments"); | |
| 4445 | return error_mark_node; | |
| 4446 | } | |
| 4447 | ||
| 9771b263 DN |
4448 | arg2 = (*arglist)[1]; |
| 4449 | arg1 = (*arglist)[0]; | |
| 266b4890 AP |
4450 | arg1_type = TREE_TYPE (arg1); |
| 4451 | ||
| 4452 | if (TREE_CODE (arg1_type) != VECTOR_TYPE) | |
| 4453 | goto bad; | |
| 4454 | if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2))) | |
| 4455 | goto bad; | |
| 29e6733c | 4456 | |
| 09fccb62 BS |
4457 | /* If we are targeting little-endian, but -maltivec=be has been |
| 4458 | specified to override the element order, adjust the element | |
| 4459 | number accordingly. */ | |
| 4460 | if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2) | |
| 4461 | { | |
| 4462 | unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1; | |
| 4463 | arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2), | |
| 4464 | build_int_cstu (TREE_TYPE (arg2), last_elem), | |
| 4465 | arg2); | |
| 4466 | } | |
| 4467 | ||
| 29e6733c MM |
4468 | /* If we can use the VSX xxpermdi instruction, use that for extract. */ |
| 4469 | mode = TYPE_MODE (arg1_type); | |
| 4470 | if ((mode == V2DFmode || mode == V2DImode) && VECTOR_MEM_VSX_P (mode) | |
| 4471 | && TREE_CODE (arg2) == INTEGER_CST | |
| 807e902e | 4472 | && wi::ltu_p (arg2, 2)) |
| 29e6733c MM |
4473 | { |
| 4474 | tree call = NULL_TREE; | |
| 4475 | ||
| 4476 | if (mode == V2DFmode) | |
| 4477 | call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DF]; | |
| 4478 | else if (mode == V2DImode) | |
| 4479 | call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V2DI]; | |
| 4480 | ||
| 4481 | if (call) | |
| 4482 | return build_call_expr (call, 2, arg1, arg2); | |
| 4483 | } | |
| a16a872d MM |
4484 | else if (mode == V1TImode && VECTOR_MEM_VSX_P (mode) |
| 4485 | && TREE_CODE (arg2) == INTEGER_CST | |
| 807e902e | 4486 | && wi::eq_p (arg2, 0)) |
| a16a872d MM |
4487 | { |
| 4488 | tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_EXT_V1TI]; | |
| 4489 | return build_call_expr (call, 2, arg1, arg2); | |
| 4490 | } | |
| 29e6733c | 4491 | |
| 266b4890 AP |
4492 | /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */ |
| 4493 | arg1_inner_type = TREE_TYPE (arg1_type); | |
| 4b29c5e5 | 4494 | arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2, |
| 266b4890 AP |
4495 | build_int_cst (TREE_TYPE (arg2), |
| 4496 | TYPE_VECTOR_SUBPARTS (arg1_type) | |
| 4497 | - 1), 0); | |
| 4b29c5e5 | 4498 | decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type); |
| 266b4890 AP |
4499 | DECL_EXTERNAL (decl) = 0; |
| 4500 | TREE_PUBLIC (decl) = 0; | |
| 4501 | DECL_CONTEXT (decl) = current_function_decl; | |
| 4502 | TREE_USED (decl) = 1; | |
| 4503 | TREE_TYPE (decl) = arg1_type; | |
| 4504 | TREE_READONLY (decl) = TYPE_READONLY (arg1_type); | |
| ec3af349 JM |
4505 | if (c_dialect_cxx ()) |
| 4506 | { | |
| 4507 | stmt = build4 (TARGET_EXPR, arg1_type, decl, arg1, | |
| 4508 | NULL_TREE, NULL_TREE); | |
| 4509 | SET_EXPR_LOCATION (stmt, loc); | |
| 4510 | } | |
| 4511 | else | |
| 4512 | { | |
| 4513 | DECL_INITIAL (decl) = arg1; | |
| 4514 | stmt = build1 (DECL_EXPR, arg1_type, decl); | |
| 4515 | TREE_ADDRESSABLE (decl) = 1; | |
| 4516 | SET_EXPR_LOCATION (stmt, loc); | |
| 4517 | stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt); | |
| 4518 | } | |
| 266b4890 AP |
4519 | |
| 4520 | innerptrtype = build_pointer_type (arg1_inner_type); | |
| 4521 | ||
| 4b29c5e5 | 4522 | stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0); |
| 266b4890 | 4523 | stmt = convert (innerptrtype, stmt); |
| 4b29c5e5 | 4524 | stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1); |
| 4cdec952 | 4525 | stmt = build_indirect_ref (loc, stmt, RO_NULL); |
| 266b4890 AP |
4526 | |
| 4527 | return stmt; | |
| 4528 | } | |
| 4529 | ||
| 09fccb62 | 4530 | /* For now use pointer tricks to do the insertion, unless we are on VSX |
| 29e6733c | 4531 | inserting a double to a constant offset.. */ |
| 266b4890 AP |
4532 | if (fcode == ALTIVEC_BUILTIN_VEC_INSERT) |
| 4533 | { | |
| 4534 | tree arg0; | |
| 4535 | tree arg1; | |
| 4536 | tree arg2; | |
| 4537 | tree arg1_type; | |
| 4538 | tree arg1_inner_type; | |
| 4539 | tree decl, stmt; | |
| 4540 | tree innerptrtype; | |
| ef4bddc2 | 4541 | machine_mode mode; |
| 29e6733c | 4542 | |
| 266b4890 | 4543 | /* No second or third arguments. */ |
| bbbbb16a | 4544 | if (nargs != 3) |
| 266b4890 AP |
4545 | { |
| 4546 | error ("vec_insert only accepts 3 arguments"); | |
| 4547 | return error_mark_node; | |
| 4548 | } | |
| 4549 | ||
| 9771b263 DN |
4550 | arg0 = (*arglist)[0]; |
| 4551 | arg1 = (*arglist)[1]; | |
| 266b4890 | 4552 | arg1_type = TREE_TYPE (arg1); |
| 9771b263 | 4553 | arg2 = (*arglist)[2]; |
| 266b4890 AP |
4554 | |
| 4555 | if (TREE_CODE (arg1_type) != VECTOR_TYPE) | |
| 4556 | goto bad; | |
| 4557 | if (!INTEGRAL_TYPE_P (TREE_TYPE (arg2))) | |
| 4558 | goto bad; | |
| 29e6733c | 4559 | |
| 09fccb62 BS |
4560 | /* If we are targeting little-endian, but -maltivec=be has been |
| 4561 | specified to override the element order, adjust the element | |
| 4562 | number accordingly. */ | |
| 4563 | if (!BYTES_BIG_ENDIAN && rs6000_altivec_element_order == 2) | |
| 4564 | { | |
| 4565 | unsigned int last_elem = TYPE_VECTOR_SUBPARTS (arg1_type) - 1; | |
| 4566 | arg2 = fold_build2_loc (loc, MINUS_EXPR, TREE_TYPE (arg2), | |
| 4567 | build_int_cstu (TREE_TYPE (arg2), last_elem), | |
| 4568 | arg2); | |
| 4569 | } | |
| 4570 | ||
| 29e6733c MM |
4571 | /* If we can use the VSX xxpermdi instruction, use that for insert. */ |
| 4572 | mode = TYPE_MODE (arg1_type); | |
| 4573 | if ((mode == V2DFmode || mode == V2DImode) && VECTOR_UNIT_VSX_P (mode) | |
| 4574 | && TREE_CODE (arg2) == INTEGER_CST | |
| 807e902e | 4575 | && wi::ltu_p (arg2, 2)) |
| 29e6733c MM |
4576 | { |
| 4577 | tree call = NULL_TREE; | |
| 4578 | ||
| 4579 | if (mode == V2DFmode) | |
| 4580 | call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DF]; | |
| 4581 | else if (mode == V2DImode) | |
| 4582 | call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V2DI]; | |
| 4583 | ||
| 4584 | /* Note, __builtin_vec_insert_<xxx> has vector and scalar types | |
| 4585 | reversed. */ | |
| 4586 | if (call) | |
| 4587 | return build_call_expr (call, 3, arg1, arg0, arg2); | |
| 4588 | } | |
| a16a872d MM |
4589 | else if (mode == V1TImode && VECTOR_UNIT_VSX_P (mode) |
| 4590 | && TREE_CODE (arg2) == INTEGER_CST | |
| 807e902e | 4591 | && wi::eq_p (arg2, 0)) |
| a16a872d MM |
4592 | { |
| 4593 | tree call = rs6000_builtin_decls[VSX_BUILTIN_VEC_SET_V1TI]; | |
| 4594 | ||
| 4595 | /* Note, __builtin_vec_insert_<xxx> has vector and scalar types | |
| 4596 | reversed. */ | |
| 4597 | return build_call_expr (call, 3, arg1, arg0, arg2); | |
| 4598 | } | |
| 29e6733c | 4599 | |
| 266b4890 AP |
4600 | /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2) = arg0. */ |
| 4601 | arg1_inner_type = TREE_TYPE (arg1_type); | |
| 4b29c5e5 | 4602 | arg2 = build_binary_op (loc, BIT_AND_EXPR, arg2, |
| 266b4890 AP |
4603 | build_int_cst (TREE_TYPE (arg2), |
| 4604 | TYPE_VECTOR_SUBPARTS (arg1_type) | |
| 4605 | - 1), 0); | |
| 4b29c5e5 | 4606 | decl = build_decl (loc, VAR_DECL, NULL_TREE, arg1_type); |
| 266b4890 AP |
4607 | DECL_EXTERNAL (decl) = 0; |
| 4608 | TREE_PUBLIC (decl) = 0; | |
| 4609 | DECL_CONTEXT (decl) = current_function_decl; | |
| 4610 | TREE_USED (decl) = 1; | |
| 4611 | TREE_TYPE (decl) = arg1_type; | |
| 4612 | TREE_READONLY (decl) = TYPE_READONLY (arg1_type); | |
| ec3af349 JM |
4613 | if (c_dialect_cxx ()) |
| 4614 | { | |
| 4615 | stmt = build4 (TARGET_EXPR, arg1_type, decl, arg1, | |
| 4616 | NULL_TREE, NULL_TREE); | |
| 4617 | SET_EXPR_LOCATION (stmt, loc); | |
| 4618 | } | |
| 4619 | else | |
| 4620 | { | |
| 4621 | DECL_INITIAL (decl) = arg1; | |
| 4622 | stmt = build1 (DECL_EXPR, arg1_type, decl); | |
| 4623 | TREE_ADDRESSABLE (decl) = 1; | |
| 4624 | SET_EXPR_LOCATION (stmt, loc); | |
| 4625 | stmt = build1 (COMPOUND_LITERAL_EXPR, arg1_type, stmt); | |
| 4626 | } | |
| 266b4890 AP |
4627 | |
| 4628 | innerptrtype = build_pointer_type (arg1_inner_type); | |
| 4629 | ||
| 4b29c5e5 | 4630 | stmt = build_unary_op (loc, ADDR_EXPR, stmt, 0); |
| 266b4890 | 4631 | stmt = convert (innerptrtype, stmt); |
| 4b29c5e5 | 4632 | stmt = build_binary_op (loc, PLUS_EXPR, stmt, arg2, 1); |
| 4cdec952 | 4633 | stmt = build_indirect_ref (loc, stmt, RO_NULL); |
| 266b4890 AP |
4634 | stmt = build2 (MODIFY_EXPR, TREE_TYPE (stmt), stmt, |
| 4635 | convert (TREE_TYPE (stmt), arg0)); | |
| 4636 | stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl); | |
| 4637 | return stmt; | |
| 4638 | } | |
| 4639 | ||
| 58646b77 | 4640 | for (n = 0; |
| bbbbb16a ILT |
4641 | !VOID_TYPE_P (TREE_VALUE (fnargs)) && n < nargs; |
| 4642 | fnargs = TREE_CHAIN (fnargs), n++) | |
| 58646b77 PB |
4643 | { |
| 4644 | tree decl_type = TREE_VALUE (fnargs); | |
| 9771b263 | 4645 | tree arg = (*arglist)[n]; |
| 58646b77 PB |
4646 | tree type; |
| 4647 | ||
| 4648 | if (arg == error_mark_node) | |
| 4649 | return error_mark_node; | |
| 4650 | ||
| 4651 | if (n >= 3) | |
| 4652 | abort (); | |
| 4653 | ||
| 4654 | arg = default_conversion (arg); | |
| 4655 | ||
| 4656 | /* The C++ front-end converts float * to const void * using | |
| 4657 | NOP_EXPR<const void *> (NOP_EXPR<void *> (x)). */ | |
| 4658 | type = TREE_TYPE (arg); | |
| 4659 | if (POINTER_TYPE_P (type) | |
| 4660 | && TREE_CODE (arg) == NOP_EXPR | |
| 4661 | && lang_hooks.types_compatible_p (TREE_TYPE (arg), | |
| 4662 | const_ptr_type_node) | |
| 4663 | && lang_hooks.types_compatible_p (TREE_TYPE (TREE_OPERAND (arg, 0)), | |
| 4664 | ptr_type_node)) | |
| 4665 | { | |
| 4666 | arg = TREE_OPERAND (arg, 0); | |
| 4667 | type = TREE_TYPE (arg); | |
| 4668 | } | |
| 4669 | ||
| 4670 | /* Remove the const from the pointers to simplify the overload | |
| 4671 | matching further down. */ | |
| 4672 | if (POINTER_TYPE_P (decl_type) | |
| 4673 | && POINTER_TYPE_P (type) | |
| 4674 | && TYPE_QUALS (TREE_TYPE (type)) != 0) | |
| 4675 | { | |
| 4676 | if (TYPE_READONLY (TREE_TYPE (type)) | |
| 4677 | && !TYPE_READONLY (TREE_TYPE (decl_type))) | |
| 4678 | warning (0, "passing arg %d of %qE discards qualifiers from" | |
| 4679 | "pointer target type", n + 1, fndecl); | |
| 4680 | type = build_pointer_type (build_qualified_type (TREE_TYPE (type), | |
| 4681 | 0)); | |
| 4682 | arg = fold_convert (type, arg); | |
| 4683 | } | |
| 4684 | ||
| 4685 | args[n] = arg; | |
| 4686 | types[n] = type; | |
| 4687 | } | |
| 4688 | ||
| 4689 | /* If the number of arguments did not match the prototype, return NULL | |
| 4690 | and the generic code will issue the appropriate error message. */ | |
| 0267afc4 | 4691 | if (!VOID_TYPE_P (TREE_VALUE (fnargs)) || n < nargs) |
| 58646b77 PB |
4692 | return NULL; |
| 4693 | ||
| 4694 | if (n == 0) | |
| 4695 | abort (); | |
| 4696 | ||
| 4697 | if (fcode == ALTIVEC_BUILTIN_VEC_STEP) | |
| 4698 | { | |
| 4699 | if (TREE_CODE (types[0]) != VECTOR_TYPE) | |
| 4700 | goto bad; | |
| 4701 | ||
| 4702 | return build_int_cst (NULL_TREE, TYPE_VECTOR_SUBPARTS (types[0])); | |
| 4703 | } | |
| 4704 | ||
| 4705 | for (desc = altivec_overloaded_builtins; | |
| 4706 | desc->code && desc->code != fcode; desc++) | |
| 4707 | continue; | |
| 4708 | ||
| 4709 | /* For arguments after the last, we have RS6000_BTI_NOT_OPAQUE in | |
| 4710 | the opX fields. */ | |
| 4711 | for (; desc->code == fcode; desc++) | |
| 4712 | if ((desc->op1 == RS6000_BTI_NOT_OPAQUE | |
| 4713 | || rs6000_builtin_type_compatible (types[0], desc->op1)) | |
| 4714 | && (desc->op2 == RS6000_BTI_NOT_OPAQUE | |
| 4715 | || rs6000_builtin_type_compatible (types[1], desc->op2)) | |
| 4716 | && (desc->op3 == RS6000_BTI_NOT_OPAQUE | |
| f62511da MM |
4717 | || rs6000_builtin_type_compatible (types[2], desc->op3)) |
| 4718 | && rs6000_builtin_decls[desc->overloaded_code] != NULL_TREE) | |
| 58646b77 PB |
4719 | return altivec_build_resolved_builtin (args, n, desc); |
| 4720 | ||
| 4721 | bad: | |
| 4722 | error ("invalid parameter combination for AltiVec intrinsic"); | |
| 4723 | return error_mark_node; | |
| 4c4eb375 | 4724 | } |