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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
34f94b1f | 2 | Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
9878760c | 34 | #include "obstack.h" |
9b30bae2 | 35 | #include "tree.h" |
dfafc897 | 36 | #include "expr.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
c8023011 | 41 | #include "ggc.h" |
9b30bae2 | 42 | |
7509c759 MM |
43 | #ifndef TARGET_NO_PROTOTYPE |
44 | #define TARGET_NO_PROTOTYPE 0 | |
45 | #endif | |
46 | ||
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
815cdc52 MM |
57 | /* switch name, tune arch */ |
58 | { (const char *)0, "--with-cpu=", 1, 1 }, | |
59 | { (const char *)0, "-mcpu=", 1, 1 }, | |
60 | { (const char *)0, "-mtune=", 1, 0 }, | |
8e3f41e7 | 61 | }; |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
815cdc52 | 87 | const char *rs6000_abi_name = RS6000_ABI_NAME; |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
815cdc52 | 93 | const char *rs6000_sdata_name = (char *)0; |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 | 107 | /* Debug flags */ |
815cdc52 | 108 | const char *rs6000_debug_name; |
38c1f2d7 MM |
109 | int rs6000_debug_stack; /* debug stack applications */ |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c8023011 MM |
115 | static void rs6000_add_gc_roots PROTO ((void)); |
116 | ||
c81bebd7 MM |
117 | \f |
118 | /* Default register names. */ | |
119 | char rs6000_reg_names[][8] = | |
120 | { | |
802a0058 MM |
121 | "0", "1", "2", "3", "4", "5", "6", "7", |
122 | "8", "9", "10", "11", "12", "13", "14", "15", | |
123 | "16", "17", "18", "19", "20", "21", "22", "23", | |
124 | "24", "25", "26", "27", "28", "29", "30", "31", | |
125 | "0", "1", "2", "3", "4", "5", "6", "7", | |
126 | "8", "9", "10", "11", "12", "13", "14", "15", | |
127 | "16", "17", "18", "19", "20", "21", "22", "23", | |
128 | "24", "25", "26", "27", "28", "29", "30", "31", | |
129 | "mq", "lr", "ctr","ap", | |
130 | "0", "1", "2", "3", "4", "5", "6", "7", | |
131 | "fpmem" | |
c81bebd7 MM |
132 | }; |
133 | ||
134 | #ifdef TARGET_REGNAMES | |
135 | static char alt_reg_names[][8] = | |
136 | { | |
802a0058 MM |
137 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
138 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
139 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
140 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
141 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
142 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
143 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
144 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
145 | "mq", "lr", "ctr", "ap", | |
146 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
147 | "fpmem" | |
c81bebd7 MM |
148 | }; |
149 | #endif | |
9878760c | 150 | \f |
daf11973 MM |
151 | #ifndef MASK_STRICT_ALIGN |
152 | #define MASK_STRICT_ALIGN 0 | |
153 | #endif | |
154 | ||
5248c961 RK |
155 | /* Override command line options. Mostly we process the processor |
156 | type and sometimes adjust other TARGET_ options. */ | |
157 | ||
158 | void | |
8e3f41e7 | 159 | rs6000_override_options (default_cpu) |
d330fd93 | 160 | const char *default_cpu; |
5248c961 | 161 | { |
c4d38ccb | 162 | size_t i, j; |
8e3f41e7 | 163 | struct rs6000_cpu_select *ptr; |
5248c961 | 164 | |
85638c0d RK |
165 | /* Simplify the entries below by making a mask for any POWER |
166 | variant and any PowerPC variant. */ | |
167 | ||
938937d8 | 168 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
169 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
170 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
171 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 172 | |
5248c961 RK |
173 | static struct ptt |
174 | { | |
d330fd93 | 175 | const char *name; /* Canonical processor name. */ |
5248c961 RK |
176 | enum processor_type processor; /* Processor type enum value. */ |
177 | int target_enable; /* Target flags to enable. */ | |
178 | int target_disable; /* Target flags to disable. */ | |
179 | } processor_target_table[] | |
cf27b467 MM |
180 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
181 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 182 | {"power", PROCESSOR_POWER, |
938937d8 | 183 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 184 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
185 | {"power2", PROCESSOR_POWER, |
186 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
187 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
188 | {"powerpc", PROCESSOR_POWERPC, |
189 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 190 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
3cb999d8 DE |
191 | {"powerpc64", PROCESSOR_POWERPC64, |
192 | MASK_POWERPC | MASK_POWERPC64 | MASK_NEW_MNEMONICS, | |
193 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
db7f1e43 | 194 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 195 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
196 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
197 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 198 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
199 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
200 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 201 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
202 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
203 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 204 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
205 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
206 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 207 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 208 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
3cb999d8 DE |
209 | {"rs64a", PROCESSOR_RS64A, |
210 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
211 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
a3a1dbf6 MM |
212 | {"401", PROCESSOR_PPC403, |
213 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
214 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 215 | {"403", PROCESSOR_PPC403, |
daf11973 | 216 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 217 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
218 | {"505", PROCESSOR_MPCCORE, |
219 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
220 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 221 | {"601", PROCESSOR_PPC601, |
938937d8 | 222 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 223 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 224 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
225 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
226 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 227 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
228 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
229 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
230 | {"603e", PROCESSOR_PPC603, |
231 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
232 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 233 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
234 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
235 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 236 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
237 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
238 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
cac8ce95 | 239 | {"604e", PROCESSOR_PPC604e, |
07e6159a MM |
240 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
241 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 242 | {"620", PROCESSOR_PPC620, |
68c49ffa | 243 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 244 | POWER_MASKS | MASK_PPC_GPOPT}, |
3cb999d8 DE |
245 | {"630", PROCESSOR_PPC630, |
246 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
247 | POWER_MASKS | MASK_PPC_GPOPT}, | |
bef84347 VM |
248 | {"740", PROCESSOR_PPC750, |
249 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
250 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
251 | {"750", PROCESSOR_PPC750, | |
252 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
253 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
254 | {"801", PROCESSOR_MPCCORE, |
255 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
256 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
257 | {"821", PROCESSOR_MPCCORE, |
258 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
259 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
260 | {"823", PROCESSOR_MPCCORE, |
261 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
262 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
263 | {"860", PROCESSOR_MPCCORE, |
264 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
265 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 266 | |
c4d38ccb | 267 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 268 | |
8a61d227 | 269 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 270 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 271 | |
5248c961 RK |
272 | profile_block_flag = 0; |
273 | ||
274 | /* Identify the processor type */ | |
8e3f41e7 | 275 | rs6000_select[0].string = default_cpu; |
3cb999d8 | 276 | rs6000_cpu = TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT; |
8e3f41e7 MM |
277 | |
278 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 279 | { |
8e3f41e7 MM |
280 | ptr = &rs6000_select[i]; |
281 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 282 | { |
8e3f41e7 MM |
283 | for (j = 0; j < ptt_size; j++) |
284 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
285 | { | |
286 | if (ptr->set_tune_p) | |
287 | rs6000_cpu = processor_target_table[j].processor; | |
288 | ||
289 | if (ptr->set_arch_p) | |
290 | { | |
291 | target_flags |= processor_target_table[j].target_enable; | |
292 | target_flags &= ~processor_target_table[j].target_disable; | |
293 | } | |
294 | break; | |
295 | } | |
296 | ||
4406229e | 297 | if (j == ptt_size) |
8e3f41e7 | 298 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); |
5248c961 RK |
299 | } |
300 | } | |
8a61d227 | 301 | |
ef792183 MM |
302 | /* If we are optimizing big endian systems for space, use the |
303 | store multiple instructions. */ | |
304 | if (BYTES_BIG_ENDIAN && optimize_size) | |
305 | target_flags |= MASK_MULTIPLE; | |
306 | ||
8a61d227 MM |
307 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
308 | override with the processor default */ | |
309 | if (TARGET_MULTIPLE_SET) | |
310 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 311 | |
938937d8 MM |
312 | /* If -mstring or -mno-string was explicitly used, don't |
313 | override with the processor default */ | |
314 | if (TARGET_STRING_SET) | |
1f5515bf | 315 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 316 | |
bef84347 VM |
317 | /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu |
318 | is a 750, because the hardware doesn't support the instructions used in | |
319 | little endian mode, and causes an alignment trap. The 750 does not cause | |
320 | an alignment trap (except when the target is unaligned). */ | |
321 | ||
bfc79d3b | 322 | if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) |
7e69e155 MM |
323 | { |
324 | if (TARGET_MULTIPLE) | |
325 | { | |
326 | target_flags &= ~MASK_MULTIPLE; | |
327 | if (TARGET_MULTIPLE_SET) | |
328 | warning ("-mmultiple is not supported on little endian systems"); | |
329 | } | |
330 | ||
331 | if (TARGET_STRING) | |
332 | { | |
333 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
334 | if (TARGET_STRING_SET) |
335 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
336 | } |
337 | } | |
3933e0e1 | 338 | |
a260abc9 DE |
339 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
340 | { | |
341 | warning ("-f%s ignored for AIX (all code is position independent)", | |
342 | (flag_pic > 1) ? "PIC" : "pic"); | |
343 | flag_pic = 0; | |
344 | } | |
345 | ||
38c1f2d7 MM |
346 | /* Set debug flags */ |
347 | if (rs6000_debug_name) | |
348 | { | |
bfc79d3b | 349 | if (! strcmp (rs6000_debug_name, "all")) |
38c1f2d7 | 350 | rs6000_debug_stack = rs6000_debug_arg = 1; |
bfc79d3b | 351 | else if (! strcmp (rs6000_debug_name, "stack")) |
38c1f2d7 | 352 | rs6000_debug_stack = 1; |
bfc79d3b | 353 | else if (! strcmp (rs6000_debug_name, "arg")) |
38c1f2d7 MM |
354 | rs6000_debug_arg = 1; |
355 | else | |
356 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
357 | } | |
358 | ||
c81bebd7 MM |
359 | #ifdef TARGET_REGNAMES |
360 | /* If the user desires alternate register names, copy in the alternate names | |
361 | now. */ | |
362 | if (TARGET_REGNAMES) | |
bfc79d3b DE |
363 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, |
364 | sizeof (rs6000_reg_names)); | |
c81bebd7 MM |
365 | #endif |
366 | ||
3933e0e1 MM |
367 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
368 | SUBTARGET_OVERRIDE_OPTIONS; | |
369 | #endif | |
c8023011 MM |
370 | |
371 | /* Register global variables with the garbage collector. */ | |
372 | rs6000_add_gc_roots (); | |
5248c961 | 373 | } |
5accd822 DE |
374 | |
375 | void | |
376 | optimization_options (level, size) | |
377 | int level; | |
378 | int size ATTRIBUTE_UNUSED; | |
379 | { | |
fca812fa | 380 | #ifdef HAVE_decrement_and_branch_on_count |
5accd822 DE |
381 | /* When optimizing, enable use of BCT instruction. */ |
382 | if (level >= 1) | |
383 | flag_branch_on_count_reg = 1; | |
384 | #endif | |
5accd822 | 385 | } |
3cfa4909 MM |
386 | \f |
387 | /* Do anything needed at the start of the asm file. */ | |
388 | ||
389 | void | |
390 | rs6000_file_start (file, default_cpu) | |
391 | FILE *file; | |
d330fd93 | 392 | const char *default_cpu; |
3cfa4909 | 393 | { |
c4d38ccb | 394 | size_t i; |
3cfa4909 | 395 | char buffer[80]; |
d330fd93 | 396 | const char *start = buffer; |
3cfa4909 MM |
397 | struct rs6000_cpu_select *ptr; |
398 | ||
399 | if (flag_verbose_asm) | |
400 | { | |
401 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
402 | rs6000_select[0].string = default_cpu; | |
403 | ||
404 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
405 | { | |
406 | ptr = &rs6000_select[i]; | |
407 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
408 | { | |
409 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
410 | start = ""; | |
411 | } | |
412 | } | |
413 | ||
414 | #ifdef USING_SVR4_H | |
415 | switch (rs6000_sdata) | |
416 | { | |
417 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
418 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
419 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
420 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
421 | } | |
422 | ||
423 | if (rs6000_sdata && g_switch_value) | |
424 | { | |
425 | fprintf (file, "%s -G %d", start, g_switch_value); | |
426 | start = ""; | |
427 | } | |
428 | #endif | |
429 | ||
430 | if (*start == '\0') | |
949ea356 | 431 | putc ('\n', file); |
3cfa4909 MM |
432 | } |
433 | } | |
434 | ||
24d304eb RK |
435 | \f |
436 | /* Create a CONST_DOUBLE from a string. */ | |
437 | ||
438 | struct rtx_def * | |
439 | rs6000_float_const (string, mode) | |
d330fd93 | 440 | const char *string; |
24d304eb RK |
441 | enum machine_mode mode; |
442 | { | |
443 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
444 | return immed_real_const_1 (value, mode); | |
445 | } | |
5248c961 | 446 | \f |
9878760c RK |
447 | /* Return non-zero if this function is known to have a null epilogue. */ |
448 | ||
449 | int | |
450 | direct_return () | |
451 | { | |
4697a36c MM |
452 | if (reload_completed) |
453 | { | |
454 | rs6000_stack_t *info = rs6000_stack_info (); | |
455 | ||
456 | if (info->first_gp_reg_save == 32 | |
457 | && info->first_fp_reg_save == 64 | |
c81fc13e DE |
458 | && ! info->lr_save_p |
459 | && ! info->cr_save_p | |
460 | && ! info->push_p) | |
4697a36c MM |
461 | return 1; |
462 | } | |
463 | ||
464 | return 0; | |
9878760c RK |
465 | } |
466 | ||
467 | /* Returns 1 always. */ | |
468 | ||
469 | int | |
470 | any_operand (op, mode) | |
296b8152 KG |
471 | register rtx op ATTRIBUTE_UNUSED; |
472 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
473 | { |
474 | return 1; | |
475 | } | |
476 | ||
b6c9286a | 477 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
478 | int |
479 | count_register_operand(op, mode) | |
b6c9286a | 480 | register rtx op; |
296b8152 | 481 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
482 | { |
483 | if (GET_CODE (op) != REG) | |
484 | return 0; | |
485 | ||
486 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
487 | return 1; | |
488 | ||
489 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
490 | return 1; | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
802a0058 MM |
495 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
496 | as a register. */ | |
38c1f2d7 MM |
497 | int |
498 | fpmem_operand(op, mode) | |
802a0058 | 499 | register rtx op; |
296b8152 | 500 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
501 | { |
502 | if (GET_CODE (op) != REG) | |
503 | return 0; | |
504 | ||
505 | if (FPMEM_REGNO_P (REGNO (op))) | |
506 | return 1; | |
507 | ||
508 | #if 0 | |
509 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
510 | return 1; | |
511 | #endif | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
9878760c RK |
516 | /* Return 1 if OP is a constant that can fit in a D field. */ |
517 | ||
518 | int | |
519 | short_cint_operand (op, mode) | |
520 | register rtx op; | |
296b8152 | 521 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 522 | { |
5f59ecb7 DE |
523 | return (GET_CODE (op) == CONST_INT |
524 | && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')); | |
9878760c RK |
525 | } |
526 | ||
527 | /* Similar for a unsigned D field. */ | |
528 | ||
529 | int | |
530 | u_short_cint_operand (op, mode) | |
531 | register rtx op; | |
296b8152 | 532 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 533 | { |
19684119 | 534 | return (GET_CODE (op) == CONST_INT |
5f59ecb7 | 535 | && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')); |
9878760c RK |
536 | } |
537 | ||
dcfedcd0 RK |
538 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
539 | ||
540 | int | |
541 | non_short_cint_operand (op, mode) | |
542 | register rtx op; | |
296b8152 | 543 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
544 | { |
545 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 546 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
547 | } |
548 | ||
9878760c RK |
549 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
550 | ctr, or lr). */ | |
551 | ||
552 | int | |
cd2b37d9 | 553 | gpc_reg_operand (op, mode) |
9878760c RK |
554 | register rtx op; |
555 | enum machine_mode mode; | |
556 | { | |
557 | return (register_operand (op, mode) | |
802a0058 MM |
558 | && (GET_CODE (op) != REG |
559 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
560 | || REGNO (op) < 64)); | |
9878760c RK |
561 | } |
562 | ||
563 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
564 | CR field. */ | |
565 | ||
566 | int | |
567 | cc_reg_operand (op, mode) | |
568 | register rtx op; | |
569 | enum machine_mode mode; | |
570 | { | |
571 | return (register_operand (op, mode) | |
572 | && (GET_CODE (op) != REG | |
573 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
574 | || CR_REGNO_P (REGNO (op)))); | |
575 | } | |
576 | ||
815cdc52 MM |
577 | /* Returns 1 if OP is either a pseudo-register or a register denoting a |
578 | CR field that isn't CR0. */ | |
579 | ||
580 | int | |
581 | cc_reg_not_cr0_operand (op, mode) | |
582 | register rtx op; | |
583 | enum machine_mode mode; | |
584 | { | |
585 | return (register_operand (op, mode) | |
586 | && (GET_CODE (op) != REG | |
587 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
588 | || CR_REGNO_NOT_CR0_P (REGNO (op)))); | |
589 | } | |
590 | ||
9878760c RK |
591 | /* Returns 1 if OP is either a constant integer valid for a D-field or a |
592 | non-special register. If a register, it must be in the proper mode unless | |
593 | MODE is VOIDmode. */ | |
594 | ||
595 | int | |
596 | reg_or_short_operand (op, mode) | |
597 | register rtx op; | |
598 | enum machine_mode mode; | |
599 | { | |
f5a28898 | 600 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
601 | } |
602 | ||
603 | /* Similar, except check if the negation of the constant would be valid for | |
604 | a D-field. */ | |
605 | ||
606 | int | |
607 | reg_or_neg_short_operand (op, mode) | |
608 | register rtx op; | |
609 | enum machine_mode mode; | |
610 | { | |
611 | if (GET_CODE (op) == CONST_INT) | |
612 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
613 | ||
cd2b37d9 | 614 | return gpc_reg_operand (op, mode); |
9878760c RK |
615 | } |
616 | ||
617 | /* Return 1 if the operand is either a register or an integer whose high-order | |
618 | 16 bits are zero. */ | |
619 | ||
620 | int | |
621 | reg_or_u_short_operand (op, mode) | |
622 | register rtx op; | |
623 | enum machine_mode mode; | |
624 | { | |
e675f625 | 625 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
626 | } |
627 | ||
628 | /* Return 1 is the operand is either a non-special register or ANY | |
629 | constant integer. */ | |
630 | ||
631 | int | |
632 | reg_or_cint_operand (op, mode) | |
633 | register rtx op; | |
634 | enum machine_mode mode; | |
635 | { | |
e675f625 | 636 | return (GET_CODE (op) == CONST_INT |
e675f625 | 637 | || gpc_reg_operand (op, mode)); |
9878760c RK |
638 | } |
639 | ||
766a866c MM |
640 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
641 | ||
642 | int | |
643 | got_operand (op, mode) | |
644 | register rtx op; | |
296b8152 | 645 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
646 | { |
647 | return (GET_CODE (op) == SYMBOL_REF | |
648 | || GET_CODE (op) == CONST | |
649 | || GET_CODE (op) == LABEL_REF); | |
650 | } | |
651 | ||
38c1f2d7 MM |
652 | /* Return 1 if the operand is a simple references that can be loaded via |
653 | the GOT (labels involving addition aren't allowed). */ | |
654 | ||
655 | int | |
656 | got_no_const_operand (op, mode) | |
657 | register rtx op; | |
296b8152 | 658 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
659 | { |
660 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
661 | } | |
662 | ||
4e74d8ec MM |
663 | /* Return the number of instructions it takes to form a constant in an |
664 | integer register. */ | |
665 | ||
666 | static int | |
667 | num_insns_constant_wide (value) | |
668 | HOST_WIDE_INT value; | |
669 | { | |
670 | /* signed constant loadable with {cal|addi} */ | |
5f59ecb7 | 671 | if (CONST_OK_FOR_LETTER_P (value, 'I')) |
0865c631 GK |
672 | return 1; |
673 | ||
4e74d8ec | 674 | /* constant loadable with {cau|addis} */ |
5f59ecb7 | 675 | else if (CONST_OK_FOR_LETTER_P (value, 'L')) |
4e74d8ec MM |
676 | return 1; |
677 | ||
5f59ecb7 | 678 | #if HOST_BITS_PER_WIDE_INT == 64 |
c81fc13e | 679 | else if (TARGET_POWERPC64) |
4e74d8ec MM |
680 | { |
681 | HOST_WIDE_INT low = value & 0xffffffff; | |
682 | HOST_WIDE_INT high = value >> 32; | |
683 | ||
684 | if (high == 0 && (low & 0x80000000) == 0) | |
685 | return 2; | |
686 | ||
c81fc13e | 687 | else if (high == -1 && (low & 0x80000000) != 0) |
4e74d8ec MM |
688 | return 2; |
689 | ||
c81fc13e | 690 | else if (! low) |
4e74d8ec MM |
691 | return num_insns_constant_wide (high) + 1; |
692 | ||
693 | else | |
694 | return (num_insns_constant_wide (high) | |
e396202a | 695 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
696 | } |
697 | #endif | |
698 | ||
699 | else | |
700 | return 2; | |
701 | } | |
702 | ||
703 | int | |
704 | num_insns_constant (op, mode) | |
705 | rtx op; | |
706 | enum machine_mode mode; | |
707 | { | |
4e74d8ec MM |
708 | if (GET_CODE (op) == CONST_INT) |
709 | return num_insns_constant_wide (INTVAL (op)); | |
710 | ||
6fc48950 MM |
711 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
712 | { | |
713 | long l; | |
714 | REAL_VALUE_TYPE rv; | |
715 | ||
716 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
717 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
718 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
719 | } | |
720 | ||
47ad8c61 | 721 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 722 | { |
47ad8c61 MM |
723 | HOST_WIDE_INT low; |
724 | HOST_WIDE_INT high; | |
725 | long l[2]; | |
726 | REAL_VALUE_TYPE rv; | |
727 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 728 | |
47ad8c61 MM |
729 | if (mode == VOIDmode || mode == DImode) |
730 | { | |
731 | high = CONST_DOUBLE_HIGH (op); | |
732 | low = CONST_DOUBLE_LOW (op); | |
733 | } | |
734 | else | |
735 | { | |
736 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
737 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
738 | high = l[endian]; | |
739 | low = l[1 - endian]; | |
740 | } | |
4e74d8ec | 741 | |
47ad8c61 MM |
742 | if (TARGET_32BIT) |
743 | return (num_insns_constant_wide (low) | |
744 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
745 | |
746 | else | |
47ad8c61 MM |
747 | { |
748 | if (high == 0 && (low & 0x80000000) == 0) | |
749 | return num_insns_constant_wide (low); | |
750 | ||
c81fc13e | 751 | else if (high == -1 && (low & 0x80000000) != 0) |
47ad8c61 MM |
752 | return num_insns_constant_wide (low); |
753 | ||
a260abc9 DE |
754 | else if (mask64_operand (op, mode)) |
755 | return 2; | |
756 | ||
47ad8c61 MM |
757 | else if (low == 0) |
758 | return num_insns_constant_wide (high) + 1; | |
759 | ||
760 | else | |
761 | return (num_insns_constant_wide (high) | |
762 | + num_insns_constant_wide (low) + 1); | |
763 | } | |
4e74d8ec MM |
764 | } |
765 | ||
766 | else | |
767 | abort (); | |
768 | } | |
769 | ||
6f2f8311 RK |
770 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
771 | with one instruction per word. We only do this if we can safely read | |
772 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
773 | |
774 | int | |
775 | easy_fp_constant (op, mode) | |
776 | register rtx op; | |
777 | register enum machine_mode mode; | |
778 | { | |
9878760c RK |
779 | if (GET_CODE (op) != CONST_DOUBLE |
780 | || GET_MODE (op) != mode | |
4e74d8ec | 781 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
782 | return 0; |
783 | ||
b6c9286a | 784 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 785 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
786 | return 1; |
787 | ||
a7273471 MM |
788 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
789 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
790 | return 0; | |
791 | ||
5ae4759c MM |
792 | #ifdef TARGET_RELOCATABLE |
793 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
794 | if (TARGET_RELOCATABLE) | |
795 | return 0; | |
796 | #endif | |
797 | ||
042259f2 DE |
798 | if (mode == DFmode) |
799 | { | |
800 | long k[2]; | |
801 | REAL_VALUE_TYPE rv; | |
802 | ||
803 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
804 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 805 | |
4e74d8ec MM |
806 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
807 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 808 | } |
4e74d8ec MM |
809 | |
810 | else if (mode == SFmode) | |
042259f2 DE |
811 | { |
812 | long l; | |
813 | REAL_VALUE_TYPE rv; | |
814 | ||
815 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
816 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 817 | |
4e74d8ec | 818 | return num_insns_constant_wide (l) == 1; |
042259f2 | 819 | } |
4e74d8ec | 820 | |
a260abc9 | 821 | else if (mode == DImode) |
c81fc13e | 822 | return ((TARGET_POWERPC64 |
a260abc9 DE |
823 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) |
824 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
825 | |
826 | else | |
827 | abort (); | |
9878760c | 828 | } |
8f75773e | 829 | |
b6c9286a MM |
830 | /* Return 1 if the operand is in volatile memory. Note that during the |
831 | RTL generation phase, memory_operand does not return TRUE for | |
832 | volatile memory references. So this function allows us to | |
833 | recognize volatile references where its safe. */ | |
834 | ||
835 | int | |
836 | volatile_mem_operand (op, mode) | |
837 | register rtx op; | |
838 | enum machine_mode mode; | |
839 | { | |
840 | if (GET_CODE (op) != MEM) | |
841 | return 0; | |
842 | ||
843 | if (!MEM_VOLATILE_P (op)) | |
844 | return 0; | |
845 | ||
846 | if (mode != GET_MODE (op)) | |
847 | return 0; | |
848 | ||
849 | if (reload_completed) | |
850 | return memory_operand (op, mode); | |
851 | ||
852 | if (reload_in_progress) | |
853 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
854 | ||
855 | return memory_address_p (mode, XEXP (op, 0)); | |
856 | } | |
857 | ||
97f6e72f | 858 | /* Return 1 if the operand is an offsettable memory operand. */ |
914c2e77 RK |
859 | |
860 | int | |
97f6e72f | 861 | offsettable_mem_operand (op, mode) |
914c2e77 RK |
862 | register rtx op; |
863 | enum machine_mode mode; | |
864 | { | |
97f6e72f | 865 | return ((GET_CODE (op) == MEM) |
677a9668 | 866 | && offsettable_address_p (reload_completed || reload_in_progress, |
97f6e72f | 867 | mode, XEXP (op, 0))); |
914c2e77 RK |
868 | } |
869 | ||
9878760c RK |
870 | /* Return 1 if the operand is either an easy FP constant (see above) or |
871 | memory. */ | |
872 | ||
873 | int | |
874 | mem_or_easy_const_operand (op, mode) | |
875 | register rtx op; | |
876 | enum machine_mode mode; | |
877 | { | |
878 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
879 | } | |
880 | ||
881 | /* Return 1 if the operand is either a non-special register or an item | |
5f59ecb7 | 882 | that can be used as the operand of a `mode' add insn. */ |
9878760c RK |
883 | |
884 | int | |
885 | add_operand (op, mode) | |
886 | register rtx op; | |
887 | enum machine_mode mode; | |
888 | { | |
889 | return (reg_or_short_operand (op, mode) | |
19684119 | 890 | || (GET_CODE (op) == CONST_INT |
5f59ecb7 | 891 | && CONST_OK_FOR_LETTER_P (INTVAL(op), 'L'))); |
9878760c RK |
892 | } |
893 | ||
dcfedcd0 RK |
894 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
895 | ||
896 | int | |
897 | non_add_cint_operand (op, mode) | |
898 | register rtx op; | |
296b8152 | 899 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
900 | { |
901 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 902 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
5f59ecb7 | 903 | && ! CONST_OK_FOR_LETTER_P (INTVAL(op), 'L')); |
dcfedcd0 RK |
904 | } |
905 | ||
9878760c RK |
906 | /* Return 1 if the operand is a non-special register or a constant that |
907 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
908 | ||
909 | int | |
910 | logical_operand (op, mode) | |
911 | register rtx op; | |
912 | enum machine_mode mode; | |
913 | { | |
cd2b37d9 | 914 | return (gpc_reg_operand (op, mode) |
9878760c | 915 | || (GET_CODE (op) == CONST_INT |
5f59ecb7 DE |
916 | && ((INTVAL (op) & GET_MODE_MASK (mode) |
917 | & (~ (HOST_WIDE_INT) 0xffff)) == 0 | |
918 | || (INTVAL (op) & GET_MODE_MASK (mode) | |
919 | & (~ (HOST_WIDE_INT) 0xffff0000)) == 0))); | |
9878760c RK |
920 | } |
921 | ||
dcfedcd0 RK |
922 | /* Return 1 if C is a constant that is not a logical operand (as |
923 | above). */ | |
924 | ||
925 | int | |
926 | non_logical_cint_operand (op, mode) | |
927 | register rtx op; | |
5f59ecb7 | 928 | enum machine_mode mode; |
dcfedcd0 RK |
929 | { |
930 | return (GET_CODE (op) == CONST_INT | |
5f59ecb7 DE |
931 | && (INTVAL (op) & GET_MODE_MASK (mode) & |
932 | (~ (HOST_WIDE_INT) 0xffff)) != 0 | |
933 | && (INTVAL (op) & GET_MODE_MASK (mode) & | |
934 | (~ (HOST_WIDE_INT) 0xffff0000)) != 0); | |
dcfedcd0 RK |
935 | } |
936 | ||
19ba8161 | 937 | /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the |
9878760c RK |
938 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. |
939 | Reject all ones and all zeros, since these should have been optimized | |
940 | away and confuse the making of MB and ME. */ | |
941 | ||
942 | int | |
19ba8161 DE |
943 | mask_operand (op, mode) |
944 | register rtx op; | |
945 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c | 946 | { |
19ba8161 | 947 | HOST_WIDE_INT c; |
9878760c RK |
948 | int i; |
949 | int last_bit_value; | |
950 | int transitions = 0; | |
951 | ||
19ba8161 DE |
952 | if (GET_CODE (op) != CONST_INT) |
953 | return 0; | |
954 | ||
955 | c = INTVAL (op); | |
956 | ||
9878760c RK |
957 | if (c == 0 || c == ~0) |
958 | return 0; | |
959 | ||
960 | last_bit_value = c & 1; | |
961 | ||
962 | for (i = 1; i < 32; i++) | |
963 | if (((c >>= 1) & 1) != last_bit_value) | |
964 | last_bit_value ^= 1, transitions++; | |
965 | ||
966 | return transitions <= 2; | |
967 | } | |
968 | ||
a260abc9 DE |
969 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
970 | It is if there are no more than one 1->0 or 0->1 transitions. | |
971 | Reject all ones and all zeros, since these should have been optimized | |
972 | away and confuse the making of MB and ME. */ | |
9878760c RK |
973 | |
974 | int | |
a260abc9 DE |
975 | mask64_operand (op, mode) |
976 | register rtx op; | |
977 | enum machine_mode mode; | |
978 | { | |
979 | if (GET_CODE (op) == CONST_INT) | |
980 | { | |
981 | HOST_WIDE_INT c = INTVAL (op); | |
982 | int i; | |
983 | int last_bit_value; | |
984 | int transitions = 0; | |
985 | ||
986 | if (c == 0 || c == ~0) | |
987 | return 0; | |
988 | ||
989 | last_bit_value = c & 1; | |
990 | ||
991 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
992 | if (((c >>= 1) & 1) != last_bit_value) | |
993 | last_bit_value ^= 1, transitions++; | |
994 | ||
a238cd8b | 995 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
996 | /* Consider CONST_INT sign-extended. */ |
997 | transitions += (last_bit_value != 1); | |
998 | #endif | |
999 | ||
1000 | return transitions <= 1; | |
1001 | } | |
1002 | else if (GET_CODE (op) == CONST_DOUBLE | |
1003 | && (mode == VOIDmode || mode == DImode)) | |
1004 | { | |
1005 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 1006 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1007 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
1008 | #endif | |
1009 | int i; | |
1010 | int last_bit_value; | |
1011 | int transitions = 0; | |
1012 | ||
1013 | if ((low == 0 | |
a238cd8b | 1014 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1015 | && high == 0 |
1016 | #endif | |
1017 | ) | |
1018 | || (low == ~0 | |
a238cd8b | 1019 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1020 | && high == ~0 |
1021 | #endif | |
1022 | )) | |
1023 | return 0; | |
1024 | ||
1025 | last_bit_value = low & 1; | |
1026 | ||
1027 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1028 | if (((low >>= 1) & 1) != last_bit_value) | |
1029 | last_bit_value ^= 1, transitions++; | |
1030 | ||
a238cd8b | 1031 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1032 | if ((high & 1) != last_bit_value) |
1033 | last_bit_value ^= 1, transitions++; | |
1034 | ||
1035 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1036 | if (((high >>= 1) & 1) != last_bit_value) | |
1037 | last_bit_value ^= 1, transitions++; | |
1038 | #endif | |
1039 | ||
1040 | return transitions <= 1; | |
1041 | } | |
1042 | else | |
1043 | return 0; | |
1044 | } | |
1045 | ||
1046 | /* Return 1 if the operand is either a non-special register or a constant | |
1047 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1048 | ||
1049 | int | |
1050 | and64_operand (op, mode) | |
9878760c RK |
1051 | register rtx op; |
1052 | enum machine_mode mode; | |
1053 | { | |
52d3af72 DE |
1054 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1055 | return (gpc_reg_operand (op, mode) || mask64_operand (op, mode)); | |
1056 | ||
1057 | return (logical_operand (op, mode) || mask64_operand (op, mode)); | |
9878760c RK |
1058 | } |
1059 | ||
a260abc9 DE |
1060 | /* Return 1 if the operand is either a non-special register or a |
1061 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1062 | |
1063 | int | |
a260abc9 DE |
1064 | and_operand (op, mode) |
1065 | register rtx op; | |
1066 | enum machine_mode mode; | |
dcfedcd0 | 1067 | { |
52d3af72 DE |
1068 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1069 | return (gpc_reg_operand (op, mode) || mask_operand (op, mode)); | |
1070 | ||
1071 | return (logical_operand (op, mode) || mask_operand (op, mode)); | |
dcfedcd0 RK |
1072 | } |
1073 | ||
9878760c RK |
1074 | /* Return 1 if the operand is a general register or memory operand. */ |
1075 | ||
1076 | int | |
1077 | reg_or_mem_operand (op, mode) | |
1078 | register rtx op; | |
1079 | register enum machine_mode mode; | |
1080 | { | |
b6c9286a MM |
1081 | return (gpc_reg_operand (op, mode) |
1082 | || memory_operand (op, mode) | |
1083 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1084 | } |
1085 | ||
a7a813f7 | 1086 | /* Return 1 if the operand is a general register or memory operand without |
3cb999d8 | 1087 | pre_inc or pre_dec which produces invalid form of PowerPC lwa |
a7a813f7 RK |
1088 | instruction. */ |
1089 | ||
1090 | int | |
1091 | lwa_operand (op, mode) | |
1092 | register rtx op; | |
1093 | register enum machine_mode mode; | |
1094 | { | |
1095 | rtx inner = op; | |
1096 | ||
1097 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1098 | inner = SUBREG_REG (inner); | |
1099 | ||
1100 | return gpc_reg_operand (inner, mode) | |
1101 | || (memory_operand (inner, mode) | |
1102 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1103 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1104 | } | |
1105 | ||
9878760c RK |
1106 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1107 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1108 | forced to lr. */ | |
1109 | ||
1110 | int | |
1111 | call_operand (op, mode) | |
1112 | register rtx op; | |
1113 | enum machine_mode mode; | |
1114 | { | |
1115 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1116 | return 0; | |
1117 | ||
1118 | return (GET_CODE (op) == SYMBOL_REF | |
1119 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1120 | } | |
1121 | ||
2af3d377 RK |
1122 | |
1123 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
8f1b829e | 1124 | this file and the function is not weakly defined. */ |
2af3d377 RK |
1125 | |
1126 | int | |
1127 | current_file_function_operand (op, mode) | |
1128 | register rtx op; | |
296b8152 | 1129 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1130 | { |
1131 | return (GET_CODE (op) == SYMBOL_REF | |
1132 | && (SYMBOL_REF_FLAG (op) | |
8f1b829e | 1133 | || (op == XEXP (DECL_RTL (current_function_decl), 0) |
c81fc13e | 1134 | && ! DECL_WEAK (current_function_decl)))); |
2af3d377 RK |
1135 | } |
1136 | ||
1137 | ||
9878760c RK |
1138 | /* Return 1 if this operand is a valid input for a move insn. */ |
1139 | ||
1140 | int | |
1141 | input_operand (op, mode) | |
1142 | register rtx op; | |
1143 | enum machine_mode mode; | |
1144 | { | |
eb4e8003 | 1145 | /* Memory is always valid. */ |
9878760c RK |
1146 | if (memory_operand (op, mode)) |
1147 | return 1; | |
1148 | ||
34792e82 | 1149 | /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ |
01b4cf2b | 1150 | if (GET_CODE (op) == CONSTANT_P_RTX) |
34792e82 JL |
1151 | return 1; |
1152 | ||
eb4e8003 RK |
1153 | /* For floating-point, easy constants are valid. */ |
1154 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1155 | && CONSTANT_P (op) | |
1156 | && easy_fp_constant (op, mode)) | |
1157 | return 1; | |
1158 | ||
4e74d8ec MM |
1159 | /* Allow any integer constant. */ |
1160 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 | 1161 | && (GET_CODE (op) == CONST_INT |
e675f625 | 1162 | || GET_CODE (op) == CONST_DOUBLE)) |
4e74d8ec MM |
1163 | return 1; |
1164 | ||
eb4e8003 RK |
1165 | /* For floating-point or multi-word mode, the only remaining valid type |
1166 | is a register. */ | |
9878760c RK |
1167 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1168 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1169 | return register_operand (op, mode); |
9878760c | 1170 | |
88fe15a1 RK |
1171 | /* The only cases left are integral modes one word or smaller (we |
1172 | do not get called for MODE_CC values). These can be in any | |
1173 | register. */ | |
1174 | if (register_operand (op, mode)) | |
a8b3aeda | 1175 | return 1; |
88fe15a1 | 1176 | |
84cf9dda | 1177 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1178 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1179 | return 1; |
1180 | ||
b6c9286a MM |
1181 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1182 | directly in the instruction stream */ | |
1183 | if (DEFAULT_ABI == ABI_NT | |
1184 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1185 | return 1; | |
1186 | ||
88228c4b MM |
1187 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1188 | to be valid. */ | |
c81bebd7 | 1189 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1190 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1191 | && small_data_operand (op, Pmode)) | |
1192 | return 1; | |
1193 | ||
042259f2 | 1194 | return 0; |
9878760c | 1195 | } |
7509c759 MM |
1196 | |
1197 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1198 | ||
1199 | int | |
1200 | small_data_operand (op, mode) | |
296b8152 KG |
1201 | rtx op ATTRIBUTE_UNUSED; |
1202 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
7509c759 | 1203 | { |
38c1f2d7 | 1204 | #if TARGET_ELF |
5f59ecb7 | 1205 | rtx sym_ref; |
7509c759 | 1206 | |
d9407988 | 1207 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1208 | return 0; |
a54d04b7 | 1209 | |
5b9d9a0c | 1210 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1211 | return 0; |
1212 | ||
88228c4b MM |
1213 | if (GET_CODE (op) == SYMBOL_REF) |
1214 | sym_ref = op; | |
1215 | ||
1216 | else if (GET_CODE (op) != CONST | |
1217 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1218 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1219 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1220 | return 0; |
1221 | ||
88228c4b | 1222 | else |
dbf55e53 MM |
1223 | { |
1224 | rtx sum = XEXP (op, 0); | |
1225 | HOST_WIDE_INT summand; | |
1226 | ||
1227 | /* We have to be careful here, because it is the referenced address | |
1228 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1229 | summand = INTVAL (XEXP (sum, 1)); | |
1230 | if (summand < 0 || summand > g_switch_value) | |
1231 | return 0; | |
1232 | ||
1233 | sym_ref = XEXP (sum, 0); | |
1234 | } | |
88228c4b MM |
1235 | |
1236 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1237 | return 0; |
1238 | ||
1239 | return 1; | |
d9407988 MM |
1240 | |
1241 | #else | |
1242 | return 0; | |
1243 | #endif | |
7509c759 MM |
1244 | } |
1245 | ||
4697a36c MM |
1246 | \f |
1247 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1248 | for a call to a function whose data type is FNTYPE. | |
1249 | For a library call, FNTYPE is 0. | |
1250 | ||
1251 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1252 | so we never return a PARALLEL. */ |
4697a36c MM |
1253 | |
1254 | void | |
1255 | init_cumulative_args (cum, fntype, libname, incoming) | |
1256 | CUMULATIVE_ARGS *cum; | |
1257 | tree fntype; | |
296b8152 | 1258 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1259 | int incoming; |
1260 | { | |
1261 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1262 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1263 | |
1264 | *cum = zero_cumulative; | |
1265 | cum->words = 0; | |
1266 | cum->fregno = FP_ARG_MIN_REG; | |
1267 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1268 | cum->call_cookie = CALL_NORMAL; |
4cc833b7 | 1269 | cum->sysv_gregno = GP_ARG_MIN_REG; |
4697a36c MM |
1270 | |
1271 | if (incoming) | |
bd227acc | 1272 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
4697a36c MM |
1273 | |
1274 | else if (cum->prototype) | |
1275 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1276 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1277 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1278 | ||
1279 | else | |
1280 | cum->nargs_prototype = 0; | |
1281 | ||
1282 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1283 | |
1284 | /* Check for DLL import functions */ | |
1285 | if (abi == ABI_NT | |
1286 | && fntype | |
1287 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1288 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1289 | ||
6a4cee5f MM |
1290 | /* Also check for longcall's */ |
1291 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1292 | cum->call_cookie = CALL_LONG; | |
1293 | ||
4697a36c MM |
1294 | if (TARGET_DEBUG_ARG) |
1295 | { | |
1296 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1297 | if (fntype) | |
1298 | { | |
1299 | tree ret_type = TREE_TYPE (fntype); | |
1300 | fprintf (stderr, " ret code = %s,", | |
1301 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1302 | } | |
1303 | ||
6a4cee5f | 1304 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1305 | fprintf (stderr, " dllimport,"); |
4697a36c | 1306 | |
6a4cee5f MM |
1307 | if (cum->call_cookie & CALL_LONG) |
1308 | fprintf (stderr, " longcall,"); | |
1309 | ||
4697a36c MM |
1310 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1311 | cum->prototype, cum->nargs_prototype); | |
1312 | } | |
1313 | } | |
1314 | \f | |
c229cba9 DE |
1315 | /* If defined, a C expression which determines whether, and in which |
1316 | direction, to pad out an argument with extra space. The value | |
1317 | should be of type `enum direction': either `upward' to pad above | |
1318 | the argument, `downward' to pad below, or `none' to inhibit | |
1319 | padding. | |
1320 | ||
1321 | For the AIX ABI structs are always stored left shifted in their | |
1322 | argument slot. */ | |
1323 | ||
c4d38ccb | 1324 | int |
c229cba9 DE |
1325 | function_arg_padding (mode, type) |
1326 | enum machine_mode mode; | |
1327 | tree type; | |
1328 | { | |
c85f7c16 | 1329 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1330 | return (int)upward; |
c229cba9 DE |
1331 | |
1332 | /* This is the default definition. */ | |
1333 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1334 | ? (int)upward |
c229cba9 DE |
1335 | : ((mode == BLKmode |
1336 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1337 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1338 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1339 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1340 | } |
1341 | ||
b6c9286a MM |
1342 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1343 | of an argument with the specified mode and type. If it is not defined, | |
1344 | PARM_BOUNDARY is used for all arguments. | |
1345 | ||
e1f83b4d MM |
1346 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1347 | ||
2310f99a | 1348 | V.4 wants long longs to be double word aligned. */ |
b6c9286a MM |
1349 | |
1350 | int | |
1351 | function_arg_boundary (mode, type) | |
1352 | enum machine_mode mode; | |
1353 | tree type; | |
1354 | { | |
4cc833b7 RH |
1355 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1356 | && (mode == DImode || mode == DFmode)) | |
e1f83b4d MM |
1357 | return 64; |
1358 | ||
b6c9286a MM |
1359 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1360 | return PARM_BOUNDARY; | |
1361 | ||
1362 | if (mode != BLKmode) | |
1363 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1364 | ||
1365 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1366 | } | |
1367 | \f | |
4697a36c MM |
1368 | /* Update the data in CUM to advance over an argument |
1369 | of mode MODE and data type TYPE. | |
1370 | (TYPE is null for libcalls where that information may not be available.) */ | |
1371 | ||
1372 | void | |
1373 | function_arg_advance (cum, mode, type, named) | |
1374 | CUMULATIVE_ARGS *cum; | |
1375 | enum machine_mode mode; | |
1376 | tree type; | |
1377 | int named; | |
1378 | { | |
1379 | cum->nargs_prototype--; | |
1380 | ||
c81bebd7 | 1381 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1382 | { |
4cc833b7 RH |
1383 | if (TARGET_HARD_FLOAT |
1384 | && (mode == SFmode || mode == DFmode)) | |
4697a36c | 1385 | { |
4cc833b7 RH |
1386 | if (cum->fregno <= FP_ARG_V4_MAX_REG) |
1387 | cum->fregno++; | |
1388 | else | |
1389 | { | |
1390 | if (mode == DFmode) | |
1391 | cum->words += cum->words & 1; | |
1392 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1393 | } | |
4697a36c | 1394 | } |
4cc833b7 RH |
1395 | else |
1396 | { | |
1397 | int n_words; | |
1398 | int gregno = cum->sysv_gregno; | |
1399 | ||
1400 | /* Aggregates and IEEE quad get passed by reference. */ | |
1401 | if ((type && AGGREGATE_TYPE_P (type)) | |
1402 | || mode == TFmode) | |
1403 | n_words = 1; | |
1404 | else | |
1405 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1406 | ||
1407 | /* Long long is put in odd registers. */ | |
1408 | if (n_words == 2 && (gregno & 1) == 0) | |
1409 | gregno += 1; | |
1410 | ||
1411 | /* Long long is not split between registers and stack. */ | |
1412 | if (gregno + n_words - 1 > GP_ARG_MAX_REG) | |
1413 | { | |
1414 | /* Long long is aligned on the stack. */ | |
1415 | if (n_words == 2) | |
1416 | cum->words += cum->words & 1; | |
1417 | cum->words += n_words; | |
1418 | } | |
4697a36c | 1419 | |
4cc833b7 RH |
1420 | /* Note: continuing to accumulate gregno past when we've started |
1421 | spilling to the stack indicates the fact that we've started | |
1422 | spilling to the stack to expand_builtin_saveregs. */ | |
1423 | cum->sysv_gregno = gregno + n_words; | |
1424 | } | |
4697a36c | 1425 | |
4cc833b7 RH |
1426 | if (TARGET_DEBUG_ARG) |
1427 | { | |
1428 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1429 | cum->words, cum->fregno); | |
1430 | fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ", | |
1431 | cum->sysv_gregno, cum->nargs_prototype, cum->prototype); | |
1432 | fprintf (stderr, "mode = %4s, named = %d\n", | |
1433 | GET_MODE_NAME (mode), named); | |
1434 | } | |
4697a36c MM |
1435 | } |
1436 | else | |
4cc833b7 RH |
1437 | { |
1438 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1439 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1440 | cum->words += align; | |
4697a36c | 1441 | |
4cc833b7 RH |
1442 | if (named) |
1443 | { | |
1444 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1445 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1446 | cum->fregno++; | |
1447 | } | |
1448 | ||
1449 | if (TARGET_DEBUG_ARG) | |
1450 | { | |
1451 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1452 | cum->words, cum->fregno); | |
1453 | fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ", | |
1454 | cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode)); | |
1455 | fprintf (stderr, "named = %d, align = %d\n", named, align); | |
1456 | } | |
1457 | } | |
4697a36c MM |
1458 | } |
1459 | \f | |
1460 | /* Determine where to put an argument to a function. | |
1461 | Value is zero to push the argument on the stack, | |
1462 | or a hard register in which to store the argument. | |
1463 | ||
1464 | MODE is the argument's machine mode. | |
1465 | TYPE is the data type of the argument (as a tree). | |
1466 | This is null for libcalls where that information may | |
1467 | not be available. | |
1468 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1469 | the preceding args and about the function being called. | |
1470 | NAMED is nonzero if this argument is a named parameter | |
1471 | (otherwise it is an extra parameter matching an ellipsis). | |
1472 | ||
1473 | On RS/6000 the first eight words of non-FP are normally in registers | |
1474 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1475 | Under V.4, the first 8 FP args are in registers. | |
1476 | ||
1477 | If this is floating-point and no prototype is specified, we use | |
1478 | both an FP and integer register (or possibly FP reg and stack). Library | |
1479 | functions (when TYPE is zero) always have the proper types for args, | |
1480 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1481 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1482 | |
1483 | struct rtx_def * | |
1484 | function_arg (cum, mode, type, named) | |
1485 | CUMULATIVE_ARGS *cum; | |
1486 | enum machine_mode mode; | |
1487 | tree type; | |
1488 | int named; | |
1489 | { | |
4cc833b7 | 1490 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c | 1491 | |
4cc833b7 RH |
1492 | /* Return a marker to indicate whether CR1 needs to set or clear the bit |
1493 | that V.4 uses to say fp args were passed in registers. Assume that we | |
1494 | don't need the marker for software floating point, or compiler generated | |
1495 | library calls. */ | |
4697a36c MM |
1496 | if (mode == VOIDmode) |
1497 | { | |
c81bebd7 | 1498 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1499 | && TARGET_HARD_FLOAT |
1500 | && cum->nargs_prototype < 0 | |
4697a36c | 1501 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1502 | { |
6a4cee5f MM |
1503 | return GEN_INT (cum->call_cookie |
1504 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1505 | ? CALL_V4_SET_FP_ARGS | |
1506 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1507 | } |
4697a36c | 1508 | |
7509c759 | 1509 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1510 | } |
1511 | ||
4cc833b7 | 1512 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1513 | { |
4cc833b7 RH |
1514 | if (TARGET_HARD_FLOAT |
1515 | && (mode == SFmode || mode == DFmode)) | |
1516 | { | |
1517 | if (cum->fregno <= FP_ARG_V4_MAX_REG) | |
1518 | return gen_rtx_REG (mode, cum->fregno); | |
1519 | else | |
1520 | return NULL; | |
1521 | } | |
1522 | else | |
1523 | { | |
1524 | int n_words; | |
1525 | int gregno = cum->sysv_gregno; | |
1526 | ||
1527 | /* Aggregates and IEEE quad get passed by reference. */ | |
1528 | if ((type && AGGREGATE_TYPE_P (type)) | |
1529 | || mode == TFmode) | |
1530 | n_words = 1; | |
1531 | else | |
1532 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1533 | ||
1534 | /* Long long is put in odd registers. */ | |
1535 | if (n_words == 2 && (gregno & 1) == 0) | |
1536 | gregno += 1; | |
1537 | ||
1538 | /* Long long is not split between registers and stack. */ | |
1539 | if (gregno + n_words - 1 <= GP_ARG_MAX_REG) | |
1540 | return gen_rtx_REG (mode, gregno); | |
1541 | else | |
1542 | return NULL; | |
1543 | } | |
4697a36c | 1544 | } |
4cc833b7 RH |
1545 | else |
1546 | { | |
1547 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1548 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1549 | int align_words = cum->words + align; | |
4697a36c | 1550 | |
c81fc13e | 1551 | if (! named) |
4cc833b7 | 1552 | return NULL_RTX; |
4697a36c | 1553 | |
4cc833b7 RH |
1554 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) |
1555 | return NULL_RTX; | |
1556 | ||
1557 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1558 | { | |
1559 | if (! type | |
1560 | || ((cum->nargs_prototype > 0) | |
1561 | /* IBM AIX extended its linkage convention definition always | |
1562 | to require FP args after register save area hole on the | |
1563 | stack. */ | |
1564 | && (DEFAULT_ABI != ABI_AIX | |
1565 | || ! TARGET_XL_CALL | |
1566 | || (align_words < GP_ARG_NUM_REG)))) | |
1567 | return gen_rtx_REG (mode, cum->fregno); | |
1568 | ||
1569 | return gen_rtx_PARALLEL (mode, | |
1570 | gen_rtvec (2, | |
39403d82 | 1571 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1572 | ((align_words >= GP_ARG_NUM_REG) |
1573 | ? NULL_RTX | |
1574 | : (align_words | |
1575 | + RS6000_ARG_SIZE (mode, type, named) | |
1576 | > GP_ARG_NUM_REG | |
1577 | /* If this is partially on the stack, then | |
1578 | we only include the portion actually | |
1579 | in registers here. */ | |
39403d82 | 1580 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1581 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1582 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1583 | GP_ARG_MIN_REG + align_words))), |
1584 | const0_rtx), | |
39403d82 DE |
1585 | gen_rtx_EXPR_LIST (VOIDmode, |
1586 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1587 | const0_rtx))); |
4cc833b7 RH |
1588 | } |
1589 | else if (align_words < GP_ARG_NUM_REG) | |
1590 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1591 | else | |
1592 | return NULL_RTX; | |
4697a36c | 1593 | } |
4697a36c MM |
1594 | } |
1595 | \f | |
1596 | /* For an arg passed partly in registers and partly in memory, | |
1597 | this is the number of registers used. | |
1598 | For args passed entirely in registers or entirely in memory, zero. */ | |
1599 | ||
1600 | int | |
1601 | function_arg_partial_nregs (cum, mode, type, named) | |
1602 | CUMULATIVE_ARGS *cum; | |
1603 | enum machine_mode mode; | |
1604 | tree type; | |
1605 | int named; | |
1606 | { | |
1607 | if (! named) | |
1608 | return 0; | |
1609 | ||
c81bebd7 | 1610 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1611 | return 0; |
4697a36c MM |
1612 | |
1613 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1614 | { | |
1615 | if (cum->nargs_prototype >= 0) | |
1616 | return 0; | |
1617 | } | |
1618 | ||
1619 | if (cum->words < GP_ARG_NUM_REG | |
1620 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1621 | { | |
1622 | int ret = GP_ARG_NUM_REG - cum->words; | |
1623 | if (ret && TARGET_DEBUG_ARG) | |
1624 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1625 | ||
1626 | return ret; | |
1627 | } | |
1628 | ||
1629 | return 0; | |
1630 | } | |
1631 | \f | |
1632 | /* A C expression that indicates when an argument must be passed by | |
1633 | reference. If nonzero for an argument, a copy of that argument is | |
1634 | made in memory and a pointer to the argument is passed instead of | |
1635 | the argument itself. The pointer is passed in whatever way is | |
1636 | appropriate for passing a pointer to that type. | |
1637 | ||
1638 | Under V.4, structures and unions are passed by reference. */ | |
1639 | ||
1640 | int | |
1641 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1642 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1643 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1644 | tree type; |
296b8152 | 1645 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1646 | { |
c81bebd7 | 1647 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4cc833b7 RH |
1648 | && ((type && AGGREGATE_TYPE_P (type)) |
1649 | || mode == TFmode)) | |
4697a36c MM |
1650 | { |
1651 | if (TARGET_DEBUG_ARG) | |
1652 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1653 | ||
1654 | return 1; | |
1655 | } | |
4697a36c MM |
1656 | |
1657 | return 0; | |
1658 | } | |
1659 | ||
1660 | \f | |
1661 | /* Perform any needed actions needed for a function that is receiving a | |
1662 | variable number of arguments. | |
1663 | ||
1664 | CUM is as above. | |
1665 | ||
1666 | MODE and TYPE are the mode and type of the current parameter. | |
1667 | ||
1668 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1669 | that must be pushed by the prolog to pretend that our caller pushed | |
1670 | it. | |
1671 | ||
1672 | Normally, this macro will push all remaining incoming registers on the | |
1673 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1674 | ||
1675 | void | |
1676 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1677 | CUMULATIVE_ARGS *cum; | |
1678 | enum machine_mode mode; | |
1679 | tree type; | |
1680 | int *pretend_size; | |
1681 | int no_rtl; | |
1682 | ||
1683 | { | |
4cc833b7 RH |
1684 | CUMULATIVE_ARGS next_cum; |
1685 | int reg_size = TARGET_32BIT ? 4 : 8; | |
dfafc897 FS |
1686 | rtx save_area, mem; |
1687 | int first_reg_offset, set; | |
4697a36c | 1688 | |
60e2d0ca | 1689 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1690 | { |
4cc833b7 RH |
1691 | tree fntype; |
1692 | int stdarg_p; | |
1693 | ||
1694 | fntype = TREE_TYPE (current_function_decl); | |
1695 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1696 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1697 | != void_type_node)); | |
1698 | ||
1699 | /* For varargs, we do not want to skip the dummy va_dcl argument. | |
1700 | For stdargs, we do want to skip the last named argument. */ | |
1701 | next_cum = *cum; | |
1702 | if (stdarg_p) | |
1703 | function_arg_advance (&next_cum, mode, type, 1); | |
1704 | ||
1705 | /* Indicate to allocate space on the stack for varargs save area. */ | |
1706 | /* ??? Does this really have to be located at a magic spot on the | |
1707 | stack, or can we allocate this with assign_stack_local instead. */ | |
4697a36c | 1708 | rs6000_sysv_varargs_p = 1; |
60e2d0ca | 1709 | if (! no_rtl) |
2c4974b7 | 1710 | save_area = plus_constant (virtual_stack_vars_rtx, |
bd227acc | 1711 | - RS6000_VARARGS_SIZE); |
4cc833b7 RH |
1712 | |
1713 | first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG; | |
4697a36c | 1714 | } |
60e2d0ca | 1715 | else |
4697a36c | 1716 | { |
4cc833b7 RH |
1717 | save_area = virtual_incoming_args_rtx; |
1718 | rs6000_sysv_varargs_p = 0; | |
4697a36c | 1719 | |
4cc833b7 | 1720 | first_reg_offset = cum->words; |
4697a36c MM |
1721 | if (MUST_PASS_IN_STACK (mode, type)) |
1722 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
4cc833b7 | 1723 | } |
4697a36c | 1724 | |
dfafc897 | 1725 | set = get_varargs_alias_set (); |
c81fc13e | 1726 | if (! no_rtl && first_reg_offset < GP_ARG_NUM_REG) |
4cc833b7 | 1727 | { |
dfafc897 FS |
1728 | mem = gen_rtx_MEM (BLKmode, |
1729 | plus_constant (save_area, | |
1730 | first_reg_offset * reg_size)), | |
1731 | MEM_ALIAS_SET (mem) = set; | |
1732 | ||
4cc833b7 | 1733 | move_block_from_reg |
dfafc897 | 1734 | (GP_ARG_MIN_REG + first_reg_offset, mem, |
4cc833b7 RH |
1735 | GP_ARG_NUM_REG - first_reg_offset, |
1736 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1737 | ||
1738 | /* ??? Does ABI_V4 need this at all? */ | |
4697a36c MM |
1739 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; |
1740 | } | |
1741 | ||
4697a36c | 1742 | /* Save FP registers if needed. */ |
4cc833b7 | 1743 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
c81fc13e | 1744 | && TARGET_HARD_FLOAT && ! no_rtl |
4cc833b7 | 1745 | && next_cum.fregno <= FP_ARG_V4_MAX_REG) |
4697a36c | 1746 | { |
4cc833b7 RH |
1747 | int fregno = next_cum.fregno; |
1748 | rtx cr1 = gen_rtx_REG (CCmode, 69); | |
1749 | rtx lab = gen_label_rtx (); | |
1750 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
4697a36c | 1751 | |
4cc833b7 | 1752 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1753 | pc_rtx, |
39403d82 | 1754 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
4cc833b7 RH |
1755 | gen_rtx_NE (VOIDmode, cr1, |
1756 | const0_rtx), | |
39403d82 | 1757 | gen_rtx_LABEL_REF (VOIDmode, lab), |
4697a36c MM |
1758 | pc_rtx))); |
1759 | ||
4cc833b7 RH |
1760 | while (fregno <= FP_ARG_V4_MAX_REG) |
1761 | { | |
dfafc897 FS |
1762 | mem = gen_rtx_MEM (DFmode, plus_constant (save_area, off)); |
1763 | MEM_ALIAS_SET (mem) = set; | |
1764 | emit_move_insn (mem, gen_rtx_REG (DFmode, fregno)); | |
4cc833b7 RH |
1765 | fregno++; |
1766 | off += 8; | |
4697a36c | 1767 | } |
4cc833b7 RH |
1768 | |
1769 | emit_label (lab); | |
4697a36c | 1770 | } |
4697a36c | 1771 | } |
4697a36c | 1772 | |
dfafc897 | 1773 | /* Create the va_list data type. */ |
2c4974b7 | 1774 | |
dfafc897 FS |
1775 | tree |
1776 | rs6000_build_va_list () | |
1777 | { | |
bab45a51 | 1778 | tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl; |
dfafc897 | 1779 | tree uchar_type_node; |
4697a36c | 1780 | |
dfafc897 FS |
1781 | /* Only SVR4 needs something special. */ |
1782 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) | |
1783 | return ptr_type_node; | |
1784 | ||
0f4fd75d | 1785 | record = make_lang_type (RECORD_TYPE); |
bab45a51 | 1786 | type_decl = build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record); |
dfafc897 | 1787 | uchar_type_node = make_unsigned_type (CHAR_TYPE_SIZE); |
0f4fd75d | 1788 | |
dfafc897 FS |
1789 | f_gpr = build_decl (FIELD_DECL, get_identifier ("gpr"), uchar_type_node); |
1790 | f_fpr = build_decl (FIELD_DECL, get_identifier ("fpr"), uchar_type_node); | |
1791 | f_ovf = build_decl (FIELD_DECL, get_identifier ("overflow_arg_area"), | |
1792 | ptr_type_node); | |
1793 | f_sav = build_decl (FIELD_DECL, get_identifier ("reg_save_area"), | |
1794 | ptr_type_node); | |
1795 | ||
1796 | DECL_FIELD_CONTEXT (f_gpr) = record; | |
1797 | DECL_FIELD_CONTEXT (f_fpr) = record; | |
1798 | DECL_FIELD_CONTEXT (f_ovf) = record; | |
1799 | DECL_FIELD_CONTEXT (f_sav) = record; | |
1800 | ||
bab45a51 FS |
1801 | TREE_CHAIN (record) = type_decl; |
1802 | TYPE_NAME (record) = type_decl; | |
dfafc897 FS |
1803 | TYPE_FIELDS (record) = f_gpr; |
1804 | TREE_CHAIN (f_gpr) = f_fpr; | |
1805 | TREE_CHAIN (f_fpr) = f_ovf; | |
1806 | TREE_CHAIN (f_ovf) = f_sav; | |
1807 | ||
1808 | layout_type (record); | |
1809 | ||
1810 | /* The correct type is an array type of one element. */ | |
1811 | return build_array_type (record, build_index_type (size_zero_node)); | |
1812 | } | |
1813 | ||
1814 | /* Implement va_start. */ | |
1815 | ||
1816 | void | |
1817 | rs6000_va_start (stdarg_p, valist, nextarg) | |
1818 | int stdarg_p; | |
1819 | tree valist; | |
1820 | rtx nextarg; | |
4697a36c | 1821 | { |
dfafc897 FS |
1822 | HOST_WIDE_INT words, n_gpr, n_fpr; |
1823 | tree f_gpr, f_fpr, f_ovf, f_sav; | |
1824 | tree gpr, fpr, ovf, sav, t; | |
2c4974b7 | 1825 | |
dfafc897 | 1826 | /* Only SVR4 needs something special. */ |
2c4974b7 | 1827 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
dfafc897 FS |
1828 | { |
1829 | std_expand_builtin_va_start (stdarg_p, valist, nextarg); | |
1830 | return; | |
1831 | } | |
1832 | ||
973a648b | 1833 | f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); |
dfafc897 FS |
1834 | f_fpr = TREE_CHAIN (f_gpr); |
1835 | f_ovf = TREE_CHAIN (f_fpr); | |
1836 | f_sav = TREE_CHAIN (f_ovf); | |
1837 | ||
8ebecc3b | 1838 | valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist); |
dfafc897 FS |
1839 | gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr); |
1840 | fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr); | |
1841 | ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf); | |
1842 | sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav); | |
1843 | ||
1844 | /* Count number of gp and fp argument registers used. */ | |
4cc833b7 | 1845 | words = current_function_args_info.words; |
dfafc897 FS |
1846 | n_gpr = current_function_args_info.sysv_gregno - GP_ARG_MIN_REG; |
1847 | n_fpr = current_function_args_info.fregno - FP_ARG_MIN_REG; | |
1848 | ||
1849 | if (TARGET_DEBUG_ARG) | |
1850 | fprintf (stderr, "va_start: words = %d, n_gpr = %d, n_fpr = %d\n", | |
1851 | words, n_gpr, n_fpr); | |
1852 | ||
1853 | t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0)); | |
1854 | TREE_SIDE_EFFECTS (t) = 1; | |
1855 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
1856 | ||
1857 | t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0)); | |
1858 | TREE_SIDE_EFFECTS (t) = 1; | |
1859 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
1860 | ||
1861 | /* Find the overflow area. */ | |
1862 | t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx); | |
1863 | if (words != 0) | |
1864 | t = build (PLUS_EXPR, TREE_TYPE (ovf), t, | |
1865 | build_int_2 (words * UNITS_PER_WORD, 0)); | |
1866 | t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); | |
1867 | TREE_SIDE_EFFECTS (t) = 1; | |
1868 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
1869 | ||
1870 | /* Find the register save area. */ | |
1871 | t = make_tree (TREE_TYPE (sav), virtual_stack_vars_rtx); | |
1872 | t = build (PLUS_EXPR, TREE_TYPE (sav), t, | |
1873 | build_int_2 (-RS6000_VARARGS_SIZE, -1)); | |
1874 | t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t); | |
1875 | TREE_SIDE_EFFECTS (t) = 1; | |
1876 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
1877 | } | |
1878 | ||
1879 | /* Implement va_arg. */ | |
1880 | ||
1881 | rtx | |
1882 | rs6000_va_arg (valist, type) | |
1883 | tree valist, type; | |
1884 | { | |
1885 | tree f_gpr, f_fpr, f_ovf, f_sav; | |
1886 | tree gpr, fpr, ovf, sav, reg, t, u; | |
1887 | int indirect_p, size, rsize, n_reg, sav_ofs, sav_scale; | |
1888 | rtx lab_false, lab_over, addr_rtx, r; | |
1889 | ||
1890 | /* Only SVR4 needs something special. */ | |
1891 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) | |
1892 | return std_expand_builtin_va_arg (valist, type); | |
1893 | ||
973a648b | 1894 | f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); |
dfafc897 FS |
1895 | f_fpr = TREE_CHAIN (f_gpr); |
1896 | f_ovf = TREE_CHAIN (f_fpr); | |
1897 | f_sav = TREE_CHAIN (f_ovf); | |
1898 | ||
8ebecc3b | 1899 | valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist); |
dfafc897 FS |
1900 | gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr); |
1901 | fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr); | |
1902 | ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf); | |
1903 | sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav); | |
1904 | ||
1905 | size = int_size_in_bytes (type); | |
1906 | rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
4cc833b7 | 1907 | |
dfafc897 | 1908 | if (AGGREGATE_TYPE_P (type) || TYPE_MODE (type) == TFmode) |
4cc833b7 | 1909 | { |
dfafc897 FS |
1910 | /* Aggregates and long doubles are passed by reference. */ |
1911 | indirect_p = 1; | |
1912 | reg = gpr; | |
1913 | n_reg = 1; | |
1914 | sav_ofs = 0; | |
1915 | sav_scale = 4; | |
1916 | size = rsize = UNITS_PER_WORD; | |
1917 | } | |
1918 | else if (FLOAT_TYPE_P (type) && ! TARGET_SOFT_FLOAT) | |
1919 | { | |
1920 | /* FP args go in FP registers, if present. */ | |
1921 | indirect_p = 0; | |
1922 | reg = fpr; | |
1923 | n_reg = 1; | |
1924 | sav_ofs = 8*4; | |
1925 | sav_scale = 8; | |
4cc833b7 | 1926 | } |
dfafc897 FS |
1927 | else |
1928 | { | |
1929 | /* Otherwise into GP registers. */ | |
1930 | indirect_p = 0; | |
1931 | reg = gpr; | |
1932 | n_reg = rsize; | |
1933 | sav_ofs = 0; | |
1934 | sav_scale = 4; | |
1935 | } | |
1936 | ||
1937 | /* | |
1938 | * Pull the value out of the saved registers ... | |
1939 | */ | |
1940 | ||
1941 | lab_false = gen_label_rtx (); | |
1942 | lab_over = gen_label_rtx (); | |
1943 | addr_rtx = gen_reg_rtx (Pmode); | |
1944 | ||
1945 | emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, QImode, EXPAND_NORMAL), | |
1946 | GEN_INT (8 - n_reg + 1), | |
1947 | GE, const1_rtx, QImode, 1, 1, lab_false); | |
2c4974b7 | 1948 | |
dfafc897 FS |
1949 | /* Long long is aligned in the registers. */ |
1950 | if (n_reg > 1) | |
2c4974b7 | 1951 | { |
dfafc897 FS |
1952 | u = build (BIT_AND_EXPR, TREE_TYPE (reg), reg, |
1953 | build_int_2 (n_reg - 1, 0)); | |
1954 | u = build (PLUS_EXPR, TREE_TYPE (reg), reg, u); | |
1955 | u = build (MODIFY_EXPR, TREE_TYPE (reg), reg, u); | |
1956 | TREE_SIDE_EFFECTS (u) = 1; | |
1957 | expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2c4974b7 | 1958 | } |
dfafc897 FS |
1959 | |
1960 | if (sav_ofs) | |
1961 | t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0)); | |
2c4974b7 | 1962 | else |
dfafc897 | 1963 | t = sav; |
2c4974b7 | 1964 | |
dfafc897 FS |
1965 | u = build (POSTINCREMENT_EXPR, TREE_TYPE (reg), reg, build_int_2 (n_reg, 0)); |
1966 | TREE_SIDE_EFFECTS (u) = 1; | |
2c4974b7 | 1967 | |
dfafc897 FS |
1968 | u = build1 (CONVERT_EXPR, integer_type_node, u); |
1969 | TREE_SIDE_EFFECTS (u) = 1; | |
2c4974b7 | 1970 | |
dfafc897 FS |
1971 | u = build (MULT_EXPR, integer_type_node, u, build_int_2 (sav_scale, 0)); |
1972 | TREE_SIDE_EFFECTS (u) = 1; | |
1973 | ||
1974 | t = build (PLUS_EXPR, ptr_type_node, t, u); | |
1975 | TREE_SIDE_EFFECTS (t) = 1; | |
1976 | ||
1977 | r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL); | |
1978 | if (r != addr_rtx) | |
1979 | emit_move_insn (addr_rtx, r); | |
1980 | ||
1981 | emit_jump_insn (gen_jump (lab_over)); | |
1982 | emit_barrier (); | |
1983 | emit_label (lab_false); | |
1984 | ||
1985 | /* | |
1986 | * ... otherwise out of the overflow area. | |
1987 | */ | |
1988 | ||
1989 | /* Make sure we don't find reg 7 for the next int arg. */ | |
1990 | if (n_reg > 1) | |
1991 | { | |
1992 | t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, build_int_2 (8, 0)); | |
1993 | TREE_SIDE_EFFECTS (t) = 1; | |
1994 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
1995 | } | |
1996 | ||
1997 | /* Care for on-stack alignment if needed. */ | |
1998 | if (rsize <= 1) | |
1999 | t = ovf; | |
2000 | else | |
2001 | { | |
2002 | t = build (PLUS_EXPR, TREE_TYPE (ovf), ovf, build_int_2 (7, 0)); | |
2003 | t = build (BIT_AND_EXPR, TREE_TYPE (t), t, build_int_2 (-8, -1)); | |
2004 | } | |
2005 | t = save_expr (t); | |
2006 | ||
2007 | r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL); | |
2008 | if (r != addr_rtx) | |
2009 | emit_move_insn (addr_rtx, r); | |
2010 | ||
2011 | t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0)); | |
2012 | t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); | |
2013 | TREE_SIDE_EFFECTS (t) = 1; | |
2014 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2015 | ||
2016 | emit_label (lab_over); | |
2017 | ||
2018 | if (indirect_p) | |
2019 | { | |
2020 | r = gen_rtx_MEM (Pmode, addr_rtx); | |
2021 | MEM_ALIAS_SET (r) = get_varargs_alias_set (); | |
2022 | emit_move_insn (addr_rtx, r); | |
2023 | } | |
2024 | ||
2025 | return addr_rtx; | |
4697a36c | 2026 | } |
5b5040b9 RK |
2027 | \f |
2028 | /* Generate a memory reference for expand_block_move, copying volatile, | |
2029 | and other bits from an original memory reference. */ | |
2030 | ||
2031 | static rtx | |
2032 | expand_block_move_mem (mode, addr, orig_mem) | |
2033 | enum machine_mode mode; | |
2034 | rtx addr; | |
2035 | rtx orig_mem; | |
2036 | { | |
39403d82 | 2037 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
2038 | |
2039 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
c6df88cb | 2040 | MEM_COPY_ATTRIBUTES (mem, orig_mem); |
b6c9286a MM |
2041 | #ifdef MEM_UNALIGNED_P |
2042 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
2043 | #endif | |
5b5040b9 RK |
2044 | return mem; |
2045 | } | |
2046 | ||
7e69e155 MM |
2047 | /* Expand a block move operation, and return 1 if successful. Return 0 |
2048 | if we should let the compiler generate normal code. | |
2049 | ||
2050 | operands[0] is the destination | |
2051 | operands[1] is the source | |
2052 | operands[2] is the length | |
2053 | operands[3] is the alignment */ | |
2054 | ||
3933e0e1 MM |
2055 | #define MAX_MOVE_REG 4 |
2056 | ||
7e69e155 MM |
2057 | int |
2058 | expand_block_move (operands) | |
2059 | rtx operands[]; | |
2060 | { | |
b6c9286a MM |
2061 | rtx orig_dest = operands[0]; |
2062 | rtx orig_src = operands[1]; | |
7e69e155 | 2063 | rtx bytes_rtx = operands[2]; |
7e69e155 | 2064 | rtx align_rtx = operands[3]; |
3933e0e1 | 2065 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
5ee95df6 | 2066 | int align; |
3933e0e1 MM |
2067 | int bytes; |
2068 | int offset; | |
2069 | int num_reg; | |
2070 | int i; | |
7e69e155 MM |
2071 | rtx src_reg; |
2072 | rtx dest_reg; | |
3933e0e1 MM |
2073 | rtx src_addr; |
2074 | rtx dest_addr; | |
7e69e155 | 2075 | rtx tmp_reg; |
3933e0e1 | 2076 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
2077 | int move_bytes; |
2078 | ||
3933e0e1 | 2079 | /* If this is not a fixed size move, just call memcpy */ |
cc0d9ba8 | 2080 | if (! constp) |
3933e0e1 MM |
2081 | return 0; |
2082 | ||
5ee95df6 FS |
2083 | /* If this is not a fixed size alignment, abort */ |
2084 | if (GET_CODE (align_rtx) != CONST_INT) | |
2085 | abort (); | |
2086 | align = INTVAL (align_rtx); | |
2087 | ||
7e69e155 | 2088 | /* Anything to move? */ |
3933e0e1 MM |
2089 | bytes = INTVAL (bytes_rtx); |
2090 | if (bytes <= 0) | |
7e69e155 MM |
2091 | return 1; |
2092 | ||
3933e0e1 MM |
2093 | /* Don't support real large moves. If string instructions are not used, |
2094 | then don't generate more than 8 loads. */ | |
2095 | if (TARGET_STRING) | |
2096 | { | |
c81fc13e | 2097 | if (bytes > 8*4) |
3933e0e1 MM |
2098 | return 0; |
2099 | } | |
cc0d9ba8 | 2100 | else if (! STRICT_ALIGNMENT) |
3933e0e1 | 2101 | { |
c81fc13e DE |
2102 | if (TARGET_POWERPC64 && align >= 4) |
2103 | { | |
2104 | if (bytes > 8*8) | |
2105 | return 0; | |
2106 | } | |
2107 | else | |
2108 | if (bytes > 8*4) | |
2109 | return 0; | |
3933e0e1 MM |
2110 | } |
2111 | else if (bytes > 8*align) | |
7e69e155 MM |
2112 | return 0; |
2113 | ||
2114 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
2115 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
2116 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 2117 | |
3933e0e1 | 2118 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 2119 | { |
3933e0e1 | 2120 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 2121 | { |
3933e0e1 | 2122 | if (bytes > 24 /* move up to 32 bytes at a time */ |
cc0d9ba8 DE |
2123 | && ! fixed_regs[5] |
2124 | && ! fixed_regs[6] | |
2125 | && ! fixed_regs[7] | |
2126 | && ! fixed_regs[8] | |
2127 | && ! fixed_regs[9] | |
2128 | && ! fixed_regs[10] | |
2129 | && ! fixed_regs[11] | |
2130 | && ! fixed_regs[12]) | |
3933e0e1 MM |
2131 | { |
2132 | move_bytes = (bytes > 32) ? 32 : bytes; | |
cc0d9ba8 DE |
2133 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, |
2134 | dest_reg, | |
2135 | orig_dest), | |
2136 | expand_block_move_mem (BLKmode, | |
2137 | src_reg, | |
2138 | orig_src), | |
2139 | GEN_INT ((move_bytes == 32) | |
2140 | ? 0 : move_bytes), | |
4c64a852 | 2141 | align_rtx)); |
3933e0e1 MM |
2142 | } |
2143 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
f9562f27 DE |
2144 | && ! fixed_regs[5] |
2145 | && ! fixed_regs[6] | |
cc0d9ba8 DE |
2146 | && ! fixed_regs[7] |
2147 | && ! fixed_regs[8] | |
2148 | && ! fixed_regs[9] | |
f9562f27 | 2149 | && ! fixed_regs[10]) |
3933e0e1 MM |
2150 | { |
2151 | move_bytes = (bytes > 24) ? 24 : bytes; | |
cc0d9ba8 DE |
2152 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, |
2153 | dest_reg, | |
2154 | orig_dest), | |
2155 | expand_block_move_mem (BLKmode, | |
2156 | src_reg, | |
2157 | orig_src), | |
3933e0e1 | 2158 | GEN_INT (move_bytes), |
4c64a852 | 2159 | align_rtx)); |
3933e0e1 MM |
2160 | } |
2161 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
f9562f27 DE |
2162 | && ! fixed_regs[5] |
2163 | && ! fixed_regs[6] | |
2164 | && ! fixed_regs[7] | |
2165 | && ! fixed_regs[8]) | |
3933e0e1 MM |
2166 | { |
2167 | move_bytes = (bytes > 16) ? 16 : bytes; | |
cc0d9ba8 DE |
2168 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, |
2169 | dest_reg, | |
2170 | orig_dest), | |
2171 | expand_block_move_mem (BLKmode, | |
2172 | src_reg, | |
2173 | orig_src), | |
3933e0e1 | 2174 | GEN_INT (move_bytes), |
4c64a852 | 2175 | align_rtx)); |
3933e0e1 | 2176 | } |
cc0d9ba8 | 2177 | else if (bytes > 4 && ! TARGET_POWERPC64) |
3933e0e1 MM |
2178 | { /* move up to 8 bytes at a time */ |
2179 | move_bytes = (bytes > 8) ? 8 : bytes; | |
cc0d9ba8 DE |
2180 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, |
2181 | dest_reg, | |
2182 | orig_dest), | |
2183 | expand_block_move_mem (BLKmode, | |
2184 | src_reg, | |
2185 | orig_src), | |
3933e0e1 | 2186 | GEN_INT (move_bytes), |
4c64a852 | 2187 | align_rtx)); |
3933e0e1 | 2188 | } |
cc0d9ba8 | 2189 | else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT)) |
3933e0e1 MM |
2190 | { /* move 4 bytes */ |
2191 | move_bytes = 4; | |
2192 | tmp_reg = gen_reg_rtx (SImode); | |
cc0d9ba8 DE |
2193 | emit_move_insn (tmp_reg, |
2194 | expand_block_move_mem (SImode, | |
2195 | src_reg, orig_src)); | |
2196 | emit_move_insn (expand_block_move_mem (SImode, | |
2197 | dest_reg, orig_dest), | |
2198 | tmp_reg); | |
3933e0e1 | 2199 | } |
cc0d9ba8 | 2200 | else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT)) |
3933e0e1 MM |
2201 | { /* move 2 bytes */ |
2202 | move_bytes = 2; | |
2203 | tmp_reg = gen_reg_rtx (HImode); | |
cc0d9ba8 DE |
2204 | emit_move_insn (tmp_reg, |
2205 | expand_block_move_mem (HImode, | |
2206 | src_reg, orig_src)); | |
2207 | emit_move_insn (expand_block_move_mem (HImode, | |
2208 | dest_reg, orig_dest), | |
2209 | tmp_reg); | |
3933e0e1 MM |
2210 | } |
2211 | else if (bytes == 1) /* move 1 byte */ | |
2212 | { | |
2213 | move_bytes = 1; | |
2214 | tmp_reg = gen_reg_rtx (QImode); | |
cc0d9ba8 DE |
2215 | emit_move_insn (tmp_reg, |
2216 | expand_block_move_mem (QImode, | |
2217 | src_reg, orig_src)); | |
2218 | emit_move_insn (expand_block_move_mem (QImode, | |
2219 | dest_reg, orig_dest), | |
2220 | tmp_reg); | |
3933e0e1 MM |
2221 | } |
2222 | else | |
2223 | { /* move up to 4 bytes at a time */ | |
2224 | move_bytes = (bytes > 4) ? 4 : bytes; | |
cc0d9ba8 DE |
2225 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, |
2226 | dest_reg, | |
2227 | orig_dest), | |
2228 | expand_block_move_mem (BLKmode, | |
2229 | src_reg, | |
2230 | orig_src), | |
3933e0e1 | 2231 | GEN_INT (move_bytes), |
4c64a852 | 2232 | align_rtx)); |
3933e0e1 | 2233 | } |
4c64a852 | 2234 | |
015892ee RK |
2235 | if (bytes > move_bytes) |
2236 | { | |
cc0d9ba8 DE |
2237 | if (! TARGET_POWERPC64) |
2238 | { | |
2239 | emit_insn (gen_addsi3 (src_reg, src_reg, | |
2240 | GEN_INT (move_bytes))); | |
2241 | emit_insn (gen_addsi3 (dest_reg, dest_reg, | |
2242 | GEN_INT (move_bytes))); | |
2243 | } | |
2244 | else | |
2245 | { | |
2246 | emit_insn (gen_adddi3 (src_reg, src_reg, | |
2247 | GEN_INT (move_bytes))); | |
2248 | emit_insn (gen_adddi3 (dest_reg, dest_reg, | |
2249 | GEN_INT (move_bytes))); | |
2250 | } | |
015892ee | 2251 | } |
4c64a852 | 2252 | } |
3933e0e1 MM |
2253 | } |
2254 | ||
2255 | else /* string instructions not available */ | |
2256 | { | |
2257 | num_reg = offset = 0; | |
2258 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 2259 | { |
3933e0e1 MM |
2260 | /* Calculate the correct offset for src/dest */ |
2261 | if (offset == 0) | |
7e69e155 | 2262 | { |
3933e0e1 MM |
2263 | src_addr = src_reg; |
2264 | dest_addr = dest_reg; | |
2265 | } | |
2266 | else | |
2267 | { | |
c5c76735 JL |
2268 | src_addr = plus_constant (src_reg, offset); |
2269 | dest_addr = plus_constant (dest_reg, offset); | |
3933e0e1 MM |
2270 | } |
2271 | ||
cc0d9ba8 DE |
2272 | /* Generate the appropriate load and store, saving the stores |
2273 | for later. */ | |
2274 | if (bytes >= 8 && TARGET_POWERPC64 | |
2275 | /* 64-bit loads and stores require word-aligned displacements. */ | |
2276 | && (align >= 8 || (! STRICT_ALIGNMENT && align >= 4))) | |
b6c9286a MM |
2277 | { |
2278 | move_bytes = 8; | |
2279 | tmp_reg = gen_reg_rtx (DImode); | |
cc0d9ba8 DE |
2280 | emit_insn (gen_movdi (tmp_reg, |
2281 | expand_block_move_mem (DImode, | |
2282 | src_addr, | |
2283 | orig_src))); | |
2284 | stores[num_reg++] = gen_movdi (expand_block_move_mem (DImode, | |
2285 | dest_addr, | |
2286 | orig_dest), | |
2287 | tmp_reg); | |
b6c9286a | 2288 | } |
cc0d9ba8 | 2289 | else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT)) |
3933e0e1 MM |
2290 | { |
2291 | move_bytes = 4; | |
2292 | tmp_reg = gen_reg_rtx (SImode); | |
cc0d9ba8 DE |
2293 | emit_insn (gen_movsi (tmp_reg, |
2294 | expand_block_move_mem (SImode, | |
2295 | src_addr, | |
2296 | orig_src))); | |
2297 | stores[num_reg++] = gen_movsi (expand_block_move_mem (SImode, | |
2298 | dest_addr, | |
2299 | orig_dest), | |
2300 | tmp_reg); | |
3933e0e1 | 2301 | } |
cc0d9ba8 | 2302 | else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT)) |
3933e0e1 MM |
2303 | { |
2304 | move_bytes = 2; | |
2305 | tmp_reg = gen_reg_rtx (HImode); | |
c81fc13e | 2306 | emit_insn (gen_movhi (tmp_reg, |
cc0d9ba8 DE |
2307 | expand_block_move_mem (HImode, |
2308 | src_addr, | |
2309 | orig_src))); | |
2310 | stores[num_reg++] = gen_movhi (expand_block_move_mem (HImode, | |
2311 | dest_addr, | |
2312 | orig_dest), | |
2313 | tmp_reg); | |
3933e0e1 MM |
2314 | } |
2315 | else | |
2316 | { | |
2317 | move_bytes = 1; | |
2318 | tmp_reg = gen_reg_rtx (QImode); | |
c81fc13e | 2319 | emit_insn (gen_movqi (tmp_reg, |
cc0d9ba8 DE |
2320 | expand_block_move_mem (QImode, |
2321 | src_addr, | |
2322 | orig_src))); | |
2323 | stores[num_reg++] = gen_movqi (expand_block_move_mem (QImode, | |
2324 | dest_addr, | |
2325 | orig_dest), | |
2326 | tmp_reg); | |
3933e0e1 MM |
2327 | } |
2328 | ||
2329 | if (num_reg >= MAX_MOVE_REG) | |
2330 | { | |
2331 | for (i = 0; i < num_reg; i++) | |
2332 | emit_insn (stores[i]); | |
2333 | num_reg = 0; | |
7e69e155 MM |
2334 | } |
2335 | } | |
3933e0e1 | 2336 | |
b6c9286a MM |
2337 | for (i = 0; i < num_reg; i++) |
2338 | emit_insn (stores[i]); | |
7e69e155 MM |
2339 | } |
2340 | ||
2341 | return 1; | |
2342 | } | |
2343 | ||
9878760c RK |
2344 | \f |
2345 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
2346 | PARALLEL and the first section will be tested. */ | |
2347 | ||
2348 | int | |
2349 | load_multiple_operation (op, mode) | |
2350 | rtx op; | |
296b8152 | 2351 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2352 | { |
2353 | int count = XVECLEN (op, 0); | |
2354 | int dest_regno; | |
2355 | rtx src_addr; | |
2356 | int i; | |
2357 | ||
2358 | /* Perform a quick check so we don't blow up below. */ | |
2359 | if (count <= 1 | |
2360 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2361 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
2362 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
2363 | return 0; | |
2364 | ||
2365 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
2366 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
2367 | ||
2368 | for (i = 1; i < count; i++) | |
2369 | { | |
2370 | rtx elt = XVECEXP (op, 0, i); | |
2371 | ||
2372 | if (GET_CODE (elt) != SET | |
2373 | || GET_CODE (SET_DEST (elt)) != REG | |
2374 | || GET_MODE (SET_DEST (elt)) != SImode | |
2375 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
2376 | || GET_CODE (SET_SRC (elt)) != MEM | |
2377 | || GET_MODE (SET_SRC (elt)) != SImode | |
2378 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
2379 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
2380 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
2381 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
2382 | return 0; | |
2383 | } | |
2384 | ||
2385 | return 1; | |
2386 | } | |
2387 | ||
2388 | /* Similar, but tests for store multiple. Here, the second vector element | |
2389 | is a CLOBBER. It will be tested later. */ | |
2390 | ||
2391 | int | |
2392 | store_multiple_operation (op, mode) | |
2393 | rtx op; | |
296b8152 | 2394 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2395 | { |
2396 | int count = XVECLEN (op, 0) - 1; | |
2397 | int src_regno; | |
2398 | rtx dest_addr; | |
2399 | int i; | |
2400 | ||
2401 | /* Perform a quick check so we don't blow up below. */ | |
2402 | if (count <= 1 | |
2403 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2404 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
2405 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
2406 | return 0; | |
2407 | ||
2408 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
2409 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
2410 | ||
2411 | for (i = 1; i < count; i++) | |
2412 | { | |
2413 | rtx elt = XVECEXP (op, 0, i + 1); | |
2414 | ||
2415 | if (GET_CODE (elt) != SET | |
2416 | || GET_CODE (SET_SRC (elt)) != REG | |
2417 | || GET_MODE (SET_SRC (elt)) != SImode | |
2418 | || REGNO (SET_SRC (elt)) != src_regno + i | |
2419 | || GET_CODE (SET_DEST (elt)) != MEM | |
2420 | || GET_MODE (SET_DEST (elt)) != SImode | |
2421 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
2422 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
2423 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
2424 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
2425 | return 0; | |
2426 | } | |
2427 | ||
2428 | return 1; | |
2429 | } | |
2430 | \f | |
2431 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2432 | We only check the opcode against the mode of the CC value here. */ | |
2433 | ||
2434 | int | |
2435 | branch_comparison_operator (op, mode) | |
2436 | register rtx op; | |
296b8152 | 2437 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2438 | { |
2439 | enum rtx_code code = GET_CODE (op); | |
2440 | enum machine_mode cc_mode; | |
2441 | ||
2442 | if (GET_RTX_CLASS (code) != '<') | |
2443 | return 0; | |
2444 | ||
2445 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2446 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2447 | return 0; | |
2448 | ||
2449 | if ((code == GT || code == LT || code == GE || code == LE) | |
2450 | && cc_mode == CCUNSmode) | |
2451 | return 0; | |
2452 | ||
2453 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2454 | && (cc_mode != CCUNSmode)) | |
2455 | return 0; | |
2456 | ||
2457 | return 1; | |
2458 | } | |
2459 | ||
2460 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2461 | We check the opcode against the mode of the CC value and disallow EQ or | |
2462 | NE comparisons for integers. */ | |
2463 | ||
2464 | int | |
2465 | scc_comparison_operator (op, mode) | |
2466 | register rtx op; | |
2467 | enum machine_mode mode; | |
2468 | { | |
2469 | enum rtx_code code = GET_CODE (op); | |
2470 | enum machine_mode cc_mode; | |
2471 | ||
2472 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2473 | return 0; | |
2474 | ||
2475 | if (GET_RTX_CLASS (code) != '<') | |
2476 | return 0; | |
2477 | ||
2478 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2479 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2480 | return 0; | |
2481 | ||
2482 | if (code == NE && cc_mode != CCFPmode) | |
2483 | return 0; | |
2484 | ||
2485 | if ((code == GT || code == LT || code == GE || code == LE) | |
2486 | && cc_mode == CCUNSmode) | |
2487 | return 0; | |
2488 | ||
2489 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2490 | && (cc_mode != CCUNSmode)) | |
2491 | return 0; | |
2492 | ||
c5defebb RK |
2493 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2494 | return 0; | |
2495 | ||
9878760c RK |
2496 | return 1; |
2497 | } | |
e0cd0770 JC |
2498 | |
2499 | int | |
2500 | trap_comparison_operator (op, mode) | |
2501 | rtx op; | |
2502 | enum machine_mode mode; | |
2503 | { | |
2504 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2505 | return 0; | |
2506 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2507 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2508 | } | |
9878760c RK |
2509 | \f |
2510 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2511 | mask required to convert the result of a rotate insn into a shift | |
2512 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2513 | ||
2514 | int | |
2515 | includes_lshift_p (shiftop, andop) | |
2516 | register rtx shiftop; | |
2517 | register rtx andop; | |
2518 | { | |
2519 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2520 | ||
2521 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2522 | } | |
2523 | ||
2524 | /* Similar, but for right shift. */ | |
2525 | ||
2526 | int | |
2527 | includes_rshift_p (shiftop, andop) | |
2528 | register rtx shiftop; | |
2529 | register rtx andop; | |
2530 | { | |
a7653a2c | 2531 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2532 | |
2533 | shift_mask >>= INTVAL (shiftop); | |
2534 | ||
2535 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2536 | } | |
35068b43 RK |
2537 | |
2538 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2539 | for lfq and stfq insns. | |
2540 | ||
2541 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2542 | abort if we are passed pseudo registers. */ | |
2543 | ||
2544 | int | |
2545 | registers_ok_for_quad_peep (reg1, reg2) | |
2546 | rtx reg1, reg2; | |
2547 | { | |
2548 | /* We might have been passed a SUBREG. */ | |
2549 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2550 | return 0; | |
2551 | ||
2552 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2553 | } | |
2554 | ||
2555 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2556 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2557 | ||
2558 | int | |
2559 | addrs_ok_for_quad_peep (addr1, addr2) | |
2560 | register rtx addr1; | |
2561 | register rtx addr2; | |
2562 | { | |
2563 | int reg1; | |
2564 | int offset1; | |
2565 | ||
2566 | /* Extract an offset (if used) from the first addr. */ | |
2567 | if (GET_CODE (addr1) == PLUS) | |
2568 | { | |
2569 | /* If not a REG, return zero. */ | |
2570 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2571 | return 0; | |
2572 | else | |
2573 | { | |
2574 | reg1 = REGNO (XEXP (addr1, 0)); | |
2575 | /* The offset must be constant! */ | |
2576 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2577 | return 0; | |
2578 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2579 | } | |
2580 | } | |
2581 | else if (GET_CODE (addr1) != REG) | |
2582 | return 0; | |
2583 | else | |
2584 | { | |
2585 | reg1 = REGNO (addr1); | |
2586 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2587 | offset1 = 0; | |
2588 | } | |
2589 | ||
2590 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2591 | if (GET_CODE (addr2) != PLUS) | |
2592 | return 0; | |
2593 | ||
2594 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2595 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2596 | return 0; | |
2597 | ||
2598 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2599 | return 0; | |
2600 | ||
2601 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2602 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2603 | return 0; | |
2604 | ||
2605 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2606 | instructions. */ | |
2607 | return 1; | |
2608 | } | |
9878760c RK |
2609 | \f |
2610 | /* Return the register class of a scratch register needed to copy IN into | |
2611 | or out of a register in CLASS in MODE. If it can be done directly, | |
2612 | NO_REGS is returned. */ | |
2613 | ||
2614 | enum reg_class | |
2615 | secondary_reload_class (class, mode, in) | |
2616 | enum reg_class class; | |
296b8152 | 2617 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2618 | rtx in; |
2619 | { | |
5accd822 | 2620 | int regno; |
9878760c | 2621 | |
3cb999d8 | 2622 | #if TARGET_ELF |
1427100a | 2623 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2624 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2625 | is needed as an intermediate register. */ | |
3cb999d8 | 2626 | if (class != BASE_REGS |
e7b7998a | 2627 | && (GET_CODE (in) == SYMBOL_REF |
201b6183 | 2628 | || GET_CODE (in) == HIGH |
e7b7998a JL |
2629 | || GET_CODE (in) == LABEL_REF |
2630 | || GET_CODE (in) == CONST)) | |
2631 | return BASE_REGS; | |
3cb999d8 | 2632 | #endif |
e7b7998a | 2633 | |
5accd822 DE |
2634 | if (GET_CODE (in) == REG) |
2635 | { | |
2636 | regno = REGNO (in); | |
2637 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2638 | { | |
2639 | regno = true_regnum (in); | |
2640 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2641 | regno = -1; | |
2642 | } | |
2643 | } | |
2644 | else if (GET_CODE (in) == SUBREG) | |
2645 | { | |
2646 | regno = true_regnum (in); | |
2647 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2648 | regno = -1; | |
2649 | } | |
2650 | else | |
2651 | regno = -1; | |
2652 | ||
9878760c RK |
2653 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2654 | into anything. */ | |
2655 | if (class == GENERAL_REGS || class == BASE_REGS | |
2656 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2657 | return NO_REGS; | |
2658 | ||
2659 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2660 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2661 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2662 | return NO_REGS; | |
2663 | ||
2664 | /* We can copy among the CR registers. */ | |
2665 | if ((class == CR_REGS || class == CR0_REGS) | |
2666 | && regno >= 0 && CR_REGNO_P (regno)) | |
2667 | return NO_REGS; | |
2668 | ||
2669 | /* Otherwise, we need GENERAL_REGS. */ | |
2670 | return GENERAL_REGS; | |
2671 | } | |
2672 | \f | |
2673 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2674 | know this is a valid comparison. | |
2675 | ||
2676 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2677 | used instead of %C, so the bits will be in different places. | |
2678 | ||
b4ac57ab | 2679 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2680 | |
2681 | int | |
2682 | ccr_bit (op, scc_p) | |
2683 | register rtx op; | |
2684 | int scc_p; | |
2685 | { | |
2686 | enum rtx_code code = GET_CODE (op); | |
2687 | enum machine_mode cc_mode; | |
2688 | int cc_regnum; | |
2689 | int base_bit; | |
2690 | ||
2691 | if (GET_RTX_CLASS (code) != '<') | |
2692 | return -1; | |
2693 | ||
2694 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2695 | cc_regnum = REGNO (XEXP (op, 0)); | |
2696 | base_bit = 4 * (cc_regnum - 68); | |
2697 | ||
c5defebb RK |
2698 | /* In CCEQmode cases we have made sure that the result is always in the |
2699 | third bit of the CR field. */ | |
2700 | ||
2701 | if (cc_mode == CCEQmode) | |
2702 | return base_bit + 3; | |
2703 | ||
9878760c RK |
2704 | switch (code) |
2705 | { | |
2706 | case NE: | |
2707 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2708 | case EQ: | |
2709 | return base_bit + 2; | |
2710 | case GT: case GTU: | |
2711 | return base_bit + 1; | |
2712 | case LT: case LTU: | |
2713 | return base_bit; | |
2714 | ||
2715 | case GE: case GEU: | |
2716 | /* If floating-point, we will have done a cror to put the bit in the | |
2717 | unordered position. So test that bit. For integer, this is ! LT | |
2718 | unless this is an scc insn. */ | |
2719 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2720 | ||
2721 | case LE: case LEU: | |
2722 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2723 | ||
2724 | default: | |
2725 | abort (); | |
2726 | } | |
2727 | } | |
1ff7789b | 2728 | \f |
8d30c4ee | 2729 | /* Return the GOT register. */ |
1ff7789b MM |
2730 | |
2731 | struct rtx_def * | |
2732 | rs6000_got_register (value) | |
5f59ecb7 | 2733 | rtx value ATTRIBUTE_UNUSED; |
1ff7789b | 2734 | { |
8d30c4ee FS |
2735 | /* The second flow pass currently (June 1999) can't update regs_ever_live |
2736 | without disturbing other parts of the compiler, so update it here to | |
2737 | make the prolog/epilogue code happy. */ | |
3cb999d8 | 2738 | if (no_new_pseudos && ! regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) |
8d30c4ee | 2739 | regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; |
1ff7789b | 2740 | |
8d30c4ee | 2741 | current_function_uses_pic_offset_table = 1; |
3cb999d8 | 2742 | |
1ff7789b MM |
2743 | return pic_offset_table_rtx; |
2744 | } | |
2745 | ||
956d6950 | 2746 | /* Search for any occurrence of the GOT_TOC register marker that should |
8d30c4ee FS |
2747 | have been eliminated, but may have crept back in. |
2748 | ||
2749 | This function could completely go away now (June 1999), but we leave it | |
2750 | in for a while until all the possible issues with the new -fpic handling | |
2751 | are resolved. */ | |
30ea98f1 MM |
2752 | |
2753 | void | |
2754 | rs6000_reorg (insn) | |
2755 | rtx insn; | |
2756 | { | |
2757 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2758 | { | |
8d30c4ee | 2759 | rtx got_reg = gen_rtx_REG (Pmode, 2); |
30ea98f1 MM |
2760 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2761 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2762 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2763 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2764 | } | |
2765 | } | |
2766 | ||
a7df97e6 MM |
2767 | \f |
2768 | /* Define the structure for the machine field in struct function. */ | |
2769 | struct machine_function | |
2770 | { | |
2771 | int sysv_varargs_p; | |
2772 | int save_toc_p; | |
2773 | int fpmem_size; | |
2774 | int fpmem_offset; | |
2775 | }; | |
2776 | ||
2777 | /* Functions to save and restore rs6000_fpmem_size. | |
2778 | These will be called, via pointer variables, | |
2779 | from push_function_context and pop_function_context. */ | |
2780 | ||
2781 | void | |
2782 | rs6000_save_machine_status (p) | |
2783 | struct function *p; | |
2784 | { | |
2785 | struct machine_function *machine = | |
2786 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2787 | ||
2788 | p->machine = machine; | |
2789 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2790 | machine->fpmem_size = rs6000_fpmem_size; |
2791 | machine->fpmem_offset = rs6000_fpmem_offset; | |
2792 | } | |
2793 | ||
2794 | void | |
2795 | rs6000_restore_machine_status (p) | |
2796 | struct function *p; | |
2797 | { | |
2798 | struct machine_function *machine = p->machine; | |
2799 | ||
2800 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2801 | rs6000_fpmem_size = machine->fpmem_size; |
2802 | rs6000_fpmem_offset = machine->fpmem_offset; | |
2803 | ||
2804 | free (machine); | |
2805 | p->machine = (struct machine_function *)0; | |
2806 | } | |
2807 | ||
2808 | /* Do anything needed before RTL is emitted for each function. */ | |
2809 | ||
2810 | void | |
2811 | rs6000_init_expanders () | |
2812 | { | |
2813 | /* Reset varargs and save TOC indicator */ | |
2814 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2815 | rs6000_fpmem_size = 0; |
2816 | rs6000_fpmem_offset = 0; | |
a7df97e6 MM |
2817 | |
2818 | /* Arrange to save and restore machine status around nested functions. */ | |
2819 | save_machine_status = rs6000_save_machine_status; | |
2820 | restore_machine_status = rs6000_restore_machine_status; | |
2821 | } | |
2822 | ||
9878760c RK |
2823 | \f |
2824 | /* Print an operand. Recognize special options, documented below. */ | |
2825 | ||
38c1f2d7 | 2826 | #if TARGET_ELF |
d9407988 | 2827 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2828 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2829 | #else |
2830 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2831 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2832 | #endif |
2833 | ||
9878760c RK |
2834 | void |
2835 | print_operand (file, x, code) | |
2836 | FILE *file; | |
2837 | rtx x; | |
2838 | char code; | |
2839 | { | |
2840 | int i; | |
a260abc9 | 2841 | HOST_WIDE_INT val; |
9878760c RK |
2842 | |
2843 | /* These macros test for integers and extract the low-order bits. */ | |
2844 | #define INT_P(X) \ | |
2845 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2846 | && GET_MODE (X) == VOIDmode) | |
2847 | ||
2848 | #define INT_LOWPART(X) \ | |
2849 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2850 | ||
2851 | switch (code) | |
2852 | { | |
a8b3aeda | 2853 | case '.': |
a85d226b RK |
2854 | /* Write out an instruction after the call which may be replaced |
2855 | with glue code by the loader. This depends on the AIX version. */ | |
2856 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2857 | return; |
2858 | ||
cfaaaf2e RK |
2859 | case '*': |
2860 | /* Write the register number of the TOC register. */ | |
8d30c4ee | 2861 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file); |
cfaaaf2e RK |
2862 | return; |
2863 | ||
c81bebd7 MM |
2864 | case '$': |
2865 | /* Write out either a '.' or '$' for the current location, depending | |
2866 | on whether this is Solaris or not. */ | |
2867 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2868 | return; | |
2869 | ||
9854d9ed RK |
2870 | case 'A': |
2871 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2872 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2873 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2874 | write a trash instruction. */ |
2875 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2876 | putc ('l', file); |
9854d9ed | 2877 | else |
76229ac8 | 2878 | putc ('r', file); |
9854d9ed RK |
2879 | return; |
2880 | ||
2881 | case 'b': | |
2882 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2883 | if (! INT_P (x)) |
9854d9ed | 2884 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2885 | |
5f59ecb7 | 2886 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2887 | return; |
2888 | ||
a260abc9 DE |
2889 | case 'B': |
2890 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2891 | for 64-bit mask direction. */ | |
296b8152 | 2892 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2893 | return; |
a260abc9 | 2894 | |
9854d9ed RK |
2895 | case 'C': |
2896 | /* This is an optional cror needed for LE or GE floating-point | |
2897 | comparisons. Otherwise write nothing. */ | |
2898 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2899 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2900 | { | |
2901 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2902 | ||
2903 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2904 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2905 | } | |
2906 | return; | |
2907 | ||
2908 | case 'D': | |
2909 | /* Similar, except that this is for an scc, so we must be able to | |
2910 | encode the test in a single bit that is one. We do the above | |
2911 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2912 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2913 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2914 | { | |
2915 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2916 | ||
2917 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2918 | base_bit + 2, | |
2919 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2920 | } | |
2921 | ||
2922 | else if (GET_CODE (x) == NE) | |
2923 | { | |
2924 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2925 | ||
2926 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2927 | base_bit + 2, base_bit + 2); | |
2928 | } | |
2929 | return; | |
2930 | ||
2931 | case 'E': | |
2932 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2933 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2934 | output_operand_lossage ("invalid %%E value"); | |
2935 | ||
2936 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2937 | return; |
9854d9ed RK |
2938 | |
2939 | case 'f': | |
2940 | /* X is a CR register. Print the shift count needed to move it | |
2941 | to the high-order four bits. */ | |
2942 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2943 | output_operand_lossage ("invalid %%f value"); | |
2944 | else | |
2945 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2946 | return; | |
2947 | ||
2948 | case 'F': | |
2949 | /* Similar, but print the count for the rotate in the opposite | |
2950 | direction. */ | |
2951 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2952 | output_operand_lossage ("invalid %%F value"); | |
2953 | else | |
2954 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2955 | return; | |
2956 | ||
2957 | case 'G': | |
2958 | /* X is a constant integer. If it is negative, print "m", | |
2959 | otherwise print "z". This is to make a aze or ame insn. */ | |
2960 | if (GET_CODE (x) != CONST_INT) | |
2961 | output_operand_lossage ("invalid %%G value"); | |
2962 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2963 | putc ('z', file); |
9854d9ed | 2964 | else |
76229ac8 | 2965 | putc ('m', file); |
9854d9ed RK |
2966 | return; |
2967 | ||
9878760c | 2968 | case 'h': |
df3d94ed RK |
2969 | /* If constant, output low-order five bits. Otherwise, |
2970 | write normally. */ | |
9878760c | 2971 | if (INT_P (x)) |
5f59ecb7 | 2972 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 31); |
9878760c RK |
2973 | else |
2974 | print_operand (file, x, 0); | |
2975 | return; | |
2976 | ||
64305719 DE |
2977 | case 'H': |
2978 | /* If constant, output low-order six bits. Otherwise, | |
2979 | write normally. */ | |
2980 | if (INT_P (x)) | |
5f59ecb7 | 2981 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 63); |
64305719 DE |
2982 | else |
2983 | print_operand (file, x, 0); | |
2984 | return; | |
2985 | ||
9854d9ed RK |
2986 | case 'I': |
2987 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2988 | if (INT_P (x)) |
76229ac8 | 2989 | putc ('i', file); |
9878760c RK |
2990 | return; |
2991 | ||
9854d9ed RK |
2992 | case 'j': |
2993 | /* Write the bit number in CCR for jump. */ | |
2994 | i = ccr_bit (x, 0); | |
2995 | if (i == -1) | |
2996 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2997 | else |
9854d9ed | 2998 | fprintf (file, "%d", i); |
9878760c RK |
2999 | return; |
3000 | ||
9854d9ed RK |
3001 | case 'J': |
3002 | /* Similar, but add one for shift count in rlinm for scc and pass | |
3003 | scc flag to `ccr_bit'. */ | |
3004 | i = ccr_bit (x, 1); | |
3005 | if (i == -1) | |
3006 | output_operand_lossage ("invalid %%J code"); | |
3007 | else | |
a0466a68 RK |
3008 | /* If we want bit 31, write a shift count of zero, not 32. */ |
3009 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
3010 | return; |
3011 | ||
9854d9ed RK |
3012 | case 'k': |
3013 | /* X must be a constant. Write the 1's complement of the | |
3014 | constant. */ | |
9878760c | 3015 | if (! INT_P (x)) |
9854d9ed | 3016 | output_operand_lossage ("invalid %%k value"); |
9878760c | 3017 | |
5f59ecb7 | 3018 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INT_LOWPART (x)); |
9878760c RK |
3019 | return; |
3020 | ||
9854d9ed RK |
3021 | case 'L': |
3022 | /* Write second word of DImode or DFmode reference. Works on register | |
3023 | or non-indexed memory only. */ | |
3024 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3025 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
3026 | else if (GET_CODE (x) == MEM) |
3027 | { | |
3028 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 3029 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
3030 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3031 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
19087b1c DE |
3032 | output_address (plus_constant_for_output (XEXP (XEXP (x, 0), 0), |
3033 | UNITS_PER_WORD)); | |
9854d9ed | 3034 | else |
19087b1c DE |
3035 | output_address (plus_constant_for_output (XEXP (x, 0), |
3036 | UNITS_PER_WORD)); | |
ba5e43aa | 3037 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3038 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3039 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3040 | } |
9878760c | 3041 | return; |
9854d9ed | 3042 | |
9878760c RK |
3043 | case 'm': |
3044 | /* MB value for a mask operand. */ | |
3045 | if (! mask_operand (x, VOIDmode)) | |
3046 | output_operand_lossage ("invalid %%m value"); | |
3047 | ||
3048 | val = INT_LOWPART (x); | |
3049 | ||
3050 | /* If the high bit is set and the low bit is not, the value is zero. | |
3051 | If the high bit is zero, the value is the first 1 bit we find from | |
3052 | the left. */ | |
34792e82 | 3053 | if ((val & 0x80000000) && ((val & 1) == 0)) |
9878760c | 3054 | { |
19d2d16f | 3055 | putc ('0', file); |
9878760c RK |
3056 | return; |
3057 | } | |
34792e82 | 3058 | else if ((val & 0x80000000) == 0) |
9878760c RK |
3059 | { |
3060 | for (i = 1; i < 32; i++) | |
34792e82 | 3061 | if ((val <<= 1) & 0x80000000) |
9878760c RK |
3062 | break; |
3063 | fprintf (file, "%d", i); | |
3064 | return; | |
3065 | } | |
3066 | ||
3067 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
3068 | number plus 1. We know the low-order bit is one. */ | |
3069 | for (i = 0; i < 32; i++) | |
3070 | if (((val >>= 1) & 1) == 0) | |
3071 | break; | |
3072 | ||
a260abc9 | 3073 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
3074 | we want 31 - i. */ |
3075 | fprintf (file, "%d", 31 - i); | |
3076 | return; | |
3077 | ||
3078 | case 'M': | |
3079 | /* ME value for a mask operand. */ | |
3080 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 3081 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
3082 | |
3083 | val = INT_LOWPART (x); | |
3084 | ||
3085 | /* If the low bit is set and the high bit is not, the value is 31. | |
3086 | If the low bit is zero, the value is the first 1 bit we find from | |
3087 | the right. */ | |
34792e82 | 3088 | if ((val & 1) && ((val & 0x80000000) == 0)) |
9878760c | 3089 | { |
76229ac8 | 3090 | fputs ("31", file); |
9878760c RK |
3091 | return; |
3092 | } | |
3093 | else if ((val & 1) == 0) | |
3094 | { | |
3095 | for (i = 0; i < 32; i++) | |
3096 | if ((val >>= 1) & 1) | |
3097 | break; | |
3098 | ||
a260abc9 | 3099 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
3100 | 30, so we need 30 - i. */ |
3101 | fprintf (file, "%d", 30 - i); | |
3102 | return; | |
3103 | } | |
3104 | ||
3105 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
3106 | number minus 1. We know the high-order bit is one. */ | |
3107 | for (i = 0; i < 32; i++) | |
34792e82 | 3108 | if (((val <<= 1) & 0x80000000) == 0) |
9878760c RK |
3109 | break; |
3110 | ||
3111 | fprintf (file, "%d", i); | |
3112 | return; | |
3113 | ||
9878760c RK |
3114 | case 'N': |
3115 | /* Write the number of elements in the vector times 4. */ | |
3116 | if (GET_CODE (x) != PARALLEL) | |
3117 | output_operand_lossage ("invalid %%N value"); | |
3118 | ||
3119 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
3120 | return; | |
3121 | ||
3122 | case 'O': | |
3123 | /* Similar, but subtract 1 first. */ | |
3124 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 3125 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
3126 | |
3127 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
3128 | return; | |
3129 | ||
9854d9ed RK |
3130 | case 'p': |
3131 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
3132 | if (! INT_P (x) | |
3133 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
3134 | output_operand_lossage ("invalid %%p value"); | |
3135 | ||
3136 | fprintf (file, "%d", i); | |
3137 | return; | |
3138 | ||
9878760c RK |
3139 | case 'P': |
3140 | /* The operand must be an indirect memory reference. The result | |
3141 | is the register number. */ | |
3142 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
3143 | || REGNO (XEXP (x, 0)) >= 32) | |
3144 | output_operand_lossage ("invalid %%P value"); | |
3145 | ||
3146 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
3147 | return; | |
3148 | ||
9854d9ed RK |
3149 | case 'R': |
3150 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
3151 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
3152 | output_operand_lossage ("invalid %%R value"); | |
3153 | else | |
3154 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 3155 | return; |
9854d9ed RK |
3156 | |
3157 | case 's': | |
3158 | /* Low 5 bits of 32 - value */ | |
3159 | if (! INT_P (x)) | |
3160 | output_operand_lossage ("invalid %%s value"); | |
3161 | ||
5f59ecb7 | 3162 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, (32 - INT_LOWPART (x)) & 31); |
9878760c | 3163 | return; |
9854d9ed | 3164 | |
a260abc9 DE |
3165 | case 'S': |
3166 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
3167 | CONST_INT 32-bit mask is considered sign-extended so any | |
3168 | transition must occur within the CONST_INT, not on the boundary. */ | |
3169 | if (! mask64_operand (x, VOIDmode)) | |
3170 | output_operand_lossage ("invalid %%S value"); | |
3171 | ||
3172 | val = INT_LOWPART (x); | |
3173 | ||
3174 | if (val & 1) /* Clear Left */ | |
3175 | { | |
a238cd8b DE |
3176 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
3177 | if (!((val >>= 1) & 1)) | |
3178 | break; | |
a260abc9 | 3179 | |
a238cd8b DE |
3180 | #if HOST_BITS_PER_WIDE_INT == 32 |
3181 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
3182 | { | |
3183 | val = CONST_DOUBLE_HIGH (x); | |
3184 | ||
3185 | if (val == 0) | |
3186 | --i; | |
3187 | else | |
3188 | for (i = 32; i < 64; i++) | |
3189 | if (!((val >>= 1) & 1)) | |
3190 | break; | |
3191 | } | |
a260abc9 | 3192 | #endif |
a238cd8b DE |
3193 | /* i = index of last set bit from right |
3194 | mask begins at 63 - i from left */ | |
3195 | if (i > 63) | |
3196 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
3197 | fprintf (file, "%d", 63 - i); |
3198 | return; | |
3199 | } | |
3200 | else /* Clear Right */ | |
3201 | { | |
a238cd8b DE |
3202 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
3203 | if ((val >>= 1) & 1) | |
3204 | break; | |
a260abc9 | 3205 | |
a238cd8b | 3206 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
3207 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
3208 | { | |
a238cd8b | 3209 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 3210 | |
a238cd8b | 3211 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 3212 | --i; |
a260abc9 | 3213 | else |
a238cd8b DE |
3214 | for (i = 32; i < 64; i++) |
3215 | if ((val >>= 1) & 1) | |
a260abc9 DE |
3216 | break; |
3217 | } | |
3218 | #endif | |
a238cd8b DE |
3219 | /* i = index of last clear bit from right |
3220 | mask ends at 62 - i from left */ | |
3221 | if (i > 62) | |
3222 | output_operand_lossage ("%%S computed all 0's mask"); | |
3223 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
3224 | return; |
3225 | } | |
3226 | ||
9878760c RK |
3227 | case 't': |
3228 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
3229 | All floating-point operations except NE branch true and integer | |
3230 | EQ, LT, GT, LTU and GTU also branch true. */ | |
3231 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
3232 | output_operand_lossage ("invalid %%t value"); | |
3233 | ||
3234 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
3235 | && GET_CODE (x) != NE) | |
3236 | || GET_CODE (x) == EQ | |
3237 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
3238 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 3239 | fputs ("12", file); |
9878760c | 3240 | else |
76229ac8 | 3241 | putc ('4', file); |
9878760c RK |
3242 | return; |
3243 | ||
3244 | case 'T': | |
3245 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
3246 | 12 otherwise. */ | |
3247 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 3248 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
3249 | |
3250 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
3251 | && GET_CODE (x) != NE) | |
3252 | || GET_CODE (x) == EQ | |
3253 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
3254 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 3255 | putc ('4', file); |
9878760c | 3256 | else |
76229ac8 | 3257 | fputs ("12", file); |
9878760c RK |
3258 | return; |
3259 | ||
9854d9ed | 3260 | case 'u': |
802a0058 | 3261 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
3262 | if (! INT_P (x)) |
3263 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 3264 | |
5f59ecb7 DE |
3265 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3266 | (INT_LOWPART (x) >> 16) & 0xffff); | |
9878760c RK |
3267 | return; |
3268 | ||
802a0058 MM |
3269 | case 'v': |
3270 | /* High-order 16 bits of constant for use in signed operand. */ | |
3271 | if (! INT_P (x)) | |
3272 | output_operand_lossage ("invalid %%v value"); | |
3273 | ||
3274 | { | |
3275 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
3276 | ||
9615f239 | 3277 | /* Solaris assembler doesn't like lis 0,0x8000 */ |
802a0058 MM |
3278 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) |
3279 | fprintf (file, "%d", value | (~0 << 16)); | |
3280 | else | |
3281 | fprintf (file, "0x%x", value); | |
3282 | return; | |
3283 | } | |
3284 | ||
9854d9ed RK |
3285 | case 'U': |
3286 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
3287 | if (GET_CODE (x) == MEM | |
3288 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3289 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 3290 | putc ('u', file); |
9854d9ed | 3291 | return; |
9878760c | 3292 | |
e0cd0770 JC |
3293 | case 'V': |
3294 | /* Print the trap code for this operand. */ | |
3295 | switch (GET_CODE (x)) | |
3296 | { | |
3297 | case EQ: | |
3298 | fputs ("eq", file); /* 4 */ | |
3299 | break; | |
3300 | case NE: | |
3301 | fputs ("ne", file); /* 24 */ | |
3302 | break; | |
3303 | case LT: | |
3304 | fputs ("lt", file); /* 16 */ | |
3305 | break; | |
3306 | case LE: | |
3307 | fputs ("le", file); /* 20 */ | |
3308 | break; | |
3309 | case GT: | |
3310 | fputs ("gt", file); /* 8 */ | |
3311 | break; | |
3312 | case GE: | |
3313 | fputs ("ge", file); /* 12 */ | |
3314 | break; | |
3315 | case LTU: | |
3316 | fputs ("llt", file); /* 2 */ | |
3317 | break; | |
3318 | case LEU: | |
3319 | fputs ("lle", file); /* 6 */ | |
3320 | break; | |
3321 | case GTU: | |
3322 | fputs ("lgt", file); /* 1 */ | |
3323 | break; | |
3324 | case GEU: | |
3325 | fputs ("lge", file); /* 5 */ | |
3326 | break; | |
3327 | default: | |
3328 | abort (); | |
3329 | } | |
3330 | break; | |
3331 | ||
9854d9ed RK |
3332 | case 'w': |
3333 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3334 | normally. */ | |
3335 | if (INT_P (x)) | |
5f59ecb7 DE |
3336 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, |
3337 | ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000); | |
9854d9ed RK |
3338 | else |
3339 | print_operand (file, x, 0); | |
9878760c RK |
3340 | return; |
3341 | ||
9854d9ed RK |
3342 | case 'W': |
3343 | /* If constant, low-order 16 bits of constant, unsigned. | |
3344 | Otherwise, write normally. */ | |
3345 | if (INT_P (x)) | |
5f59ecb7 | 3346 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff); |
9854d9ed RK |
3347 | else |
3348 | print_operand (file, x, 0); | |
3349 | return; | |
9878760c | 3350 | |
9854d9ed RK |
3351 | case 'X': |
3352 | if (GET_CODE (x) == MEM | |
3353 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3354 | putc ('x', file); |
9854d9ed | 3355 | return; |
9878760c | 3356 | |
9854d9ed RK |
3357 | case 'Y': |
3358 | /* Like 'L', for third word of TImode */ | |
3359 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3360 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3361 | else if (GET_CODE (x) == MEM) |
9878760c | 3362 | { |
9854d9ed RK |
3363 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3364 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3365 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3366 | else |
a54d04b7 | 3367 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3368 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3369 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3370 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3371 | } |
3372 | return; | |
9854d9ed | 3373 | |
9878760c | 3374 | case 'z': |
b4ac57ab RS |
3375 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3376 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3377 | names. If we are configured for System V (or the embedded ABI) on |
3378 | the PowerPC, do not emit the period, since those systems do not use | |
3379 | TOCs and the like. */ | |
9878760c RK |
3380 | if (GET_CODE (x) != SYMBOL_REF) |
3381 | abort (); | |
3382 | ||
b6c9286a MM |
3383 | if (XSTR (x, 0)[0] != '.') |
3384 | { | |
3385 | switch (DEFAULT_ABI) | |
3386 | { | |
3387 | default: | |
3388 | abort (); | |
3389 | ||
3390 | case ABI_AIX: | |
3391 | putc ('.', file); | |
3392 | break; | |
3393 | ||
3394 | case ABI_V4: | |
3395 | case ABI_AIX_NODESC: | |
c81bebd7 | 3396 | case ABI_SOLARIS: |
b6c9286a MM |
3397 | break; |
3398 | ||
3399 | case ABI_NT: | |
3400 | fputs ("..", file); | |
3401 | break; | |
3402 | } | |
3403 | } | |
9878760c RK |
3404 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3405 | return; | |
3406 | ||
9854d9ed RK |
3407 | case 'Z': |
3408 | /* Like 'L', for last word of TImode. */ | |
3409 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3410 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3411 | else if (GET_CODE (x) == MEM) |
3412 | { | |
3413 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3414 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3415 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3416 | else |
a54d04b7 | 3417 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3418 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3419 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3420 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3421 | } |
5c23c401 | 3422 | return; |
9854d9ed | 3423 | |
9878760c RK |
3424 | case 0: |
3425 | if (GET_CODE (x) == REG) | |
3426 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3427 | else if (GET_CODE (x) == MEM) | |
3428 | { | |
3429 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3430 | know the width from the mode. */ | |
3431 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3432 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3433 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3434 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3435 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3436 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3437 | else | |
a54d04b7 | 3438 | output_address (XEXP (x, 0)); |
9878760c RK |
3439 | } |
3440 | else | |
a54d04b7 | 3441 | output_addr_const (file, x); |
a85d226b | 3442 | return; |
9878760c RK |
3443 | |
3444 | default: | |
3445 | output_operand_lossage ("invalid %%xn code"); | |
3446 | } | |
3447 | } | |
3448 | \f | |
3449 | /* Print the address of an operand. */ | |
3450 | ||
3451 | void | |
3452 | print_operand_address (file, x) | |
3453 | FILE *file; | |
3454 | register rtx x; | |
3455 | { | |
3456 | if (GET_CODE (x) == REG) | |
4697a36c | 3457 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3458 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3459 | { |
3460 | output_addr_const (file, x); | |
ba5e43aa | 3461 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3462 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3463 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3464 | |
4697a36c | 3465 | #ifdef TARGET_NO_TOC |
7509c759 | 3466 | else if (TARGET_NO_TOC) |
4697a36c | 3467 | ; |
4697a36c | 3468 | #endif |
7509c759 | 3469 | else |
8d30c4ee | 3470 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]); |
9878760c RK |
3471 | } |
3472 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3473 | { | |
3474 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3475 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3476 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3477 | else |
4697a36c MM |
3478 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3479 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3480 | } |
3481 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
5f59ecb7 DE |
3482 | { |
3483 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (x, 1))); | |
3484 | fprintf (file, "(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3485 | } | |
3cb999d8 DE |
3486 | #if TARGET_ELF |
3487 | else if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 0)) == REG | |
3488 | && CONSTANT_P (XEXP (x, 1))) | |
4697a36c MM |
3489 | { |
3490 | output_addr_const (file, XEXP (x, 1)); | |
3491 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3492 | } | |
3cb999d8 | 3493 | #endif |
9878760c RK |
3494 | else |
3495 | abort (); | |
3496 | } | |
3497 | \f | |
3498 | /* This page contains routines that are used to determine what the function | |
3499 | prologue and epilogue code will do and write them out. */ | |
3500 | ||
3501 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3502 | none. */ | |
3503 | ||
3504 | int | |
3505 | first_reg_to_save () | |
3506 | { | |
3507 | int first_reg; | |
3508 | ||
3509 | /* Find lowest numbered live register. */ | |
3510 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
a38d360d GK |
3511 | if (regs_ever_live[first_reg] |
3512 | && (! call_used_regs[first_reg] | |
3513 | || (first_reg == PIC_OFFSET_TABLE_REGNUM | |
3514 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
3515 | && flag_pic == 1))) | |
9878760c RK |
3516 | break; |
3517 | ||
b5253831 DE |
3518 | if (profile_flag) |
3519 | { | |
3520 | /* AIX must save/restore every register that contains a parameter | |
3521 | before/after the .__mcount call plus an additional register | |
3522 | for the static chain, if needed; use registers from 30 down to 22 | |
3523 | to do this. */ | |
3524 | if (DEFAULT_ABI == ABI_AIX) | |
3525 | { | |
3526 | int last_parm_reg, profile_first_reg; | |
3527 | ||
3528 | /* Figure out last used parameter register. The proper thing | |
3529 | to do is to walk incoming args of the function. A function | |
3530 | might have live parameter registers even if it has no | |
3531 | incoming args. */ | |
3532 | for (last_parm_reg = 10; | |
3533 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
3534 | last_parm_reg--) | |
3535 | ; | |
3536 | ||
3537 | /* Calculate first reg for saving parameter registers | |
3538 | and static chain. | |
3539 | Skip reg 31 which may contain the frame pointer. */ | |
3540 | profile_first_reg = (33 - last_parm_reg | |
3541 | - (current_function_needs_context ? 1 : 0)); | |
3542 | /* Do not save frame pointer if no parameters needs to be saved. */ | |
3543 | if (profile_first_reg == 31) | |
3544 | profile_first_reg = 32; | |
3545 | ||
3546 | if (first_reg > profile_first_reg) | |
3547 | first_reg = profile_first_reg; | |
3548 | } | |
e165f3f0 | 3549 | |
b5253831 DE |
3550 | /* SVR4 may need one register to preserve the static chain. */ |
3551 | else if (current_function_needs_context) | |
3552 | { | |
3553 | /* Skip reg 31 which may contain the frame pointer. */ | |
3554 | if (first_reg > 30) | |
3555 | first_reg = 30; | |
3556 | } | |
3557 | } | |
e165f3f0 | 3558 | |
9878760c RK |
3559 | return first_reg; |
3560 | } | |
3561 | ||
3562 | /* Similar, for FP regs. */ | |
3563 | ||
3564 | int | |
3565 | first_fp_reg_to_save () | |
3566 | { | |
3567 | int first_reg; | |
3568 | ||
3569 | /* Find lowest numbered live register. */ | |
3570 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3571 | if (regs_ever_live[first_reg]) | |
3572 | break; | |
3573 | ||
3574 | return first_reg; | |
3575 | } | |
3576 | ||
9878760c RK |
3577 | /* Return non-zero if this function makes calls. */ |
3578 | ||
3579 | int | |
3580 | rs6000_makes_calls () | |
3581 | { | |
3582 | rtx insn; | |
3583 | ||
38c1f2d7 MM |
3584 | /* If we are profiling, we will be making a call to __mcount. |
3585 | Under the System V ABI's, we store the LR directly, so | |
3586 | we don't need to do it here. */ | |
3587 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3588 | return 1; |
3589 | ||
9878760c RK |
3590 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3591 | if (GET_CODE (insn) == CALL_INSN) | |
3592 | return 1; | |
3593 | ||
3594 | return 0; | |
3595 | } | |
3596 | ||
4697a36c MM |
3597 | \f |
3598 | /* Calculate the stack information for the current function. This is | |
3599 | complicated by having two separate calling sequences, the AIX calling | |
3600 | sequence and the V.4 calling sequence. | |
3601 | ||
3602 | AIX stack frames look like: | |
a260abc9 | 3603 | 32-bit 64-bit |
4697a36c | 3604 | SP----> +---------------------------------------+ |
a260abc9 | 3605 | | back chain to caller | 0 0 |
4697a36c | 3606 | +---------------------------------------+ |
a260abc9 | 3607 | | saved CR | 4 8 (8-11) |
4697a36c | 3608 | +---------------------------------------+ |
a260abc9 | 3609 | | saved LR | 8 16 |
4697a36c | 3610 | +---------------------------------------+ |
a260abc9 | 3611 | | reserved for compilers | 12 24 |
4697a36c | 3612 | +---------------------------------------+ |
a260abc9 | 3613 | | reserved for binders | 16 32 |
4697a36c | 3614 | +---------------------------------------+ |
a260abc9 | 3615 | | saved TOC pointer | 20 40 |
4697a36c | 3616 | +---------------------------------------+ |
a260abc9 | 3617 | | Parameter save area (P) | 24 48 |
4697a36c | 3618 | +---------------------------------------+ |
a260abc9 | 3619 | | Alloca space (A) | 24+P etc. |
802a0058 | 3620 | +---------------------------------------+ |
a7df97e6 | 3621 | | Local variable space (L) | 24+P+A |
4697a36c | 3622 | +---------------------------------------+ |
a7df97e6 | 3623 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3624 | +---------------------------------------+ |
a7df97e6 | 3625 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3626 | +---------------------------------------+ |
a7df97e6 | 3627 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3628 | +---------------------------------------+ |
3629 | old SP->| back chain to caller's caller | | |
3630 | +---------------------------------------+ | |
3631 | ||
5376a30c KR |
3632 | The required alignment for AIX configurations is two words (i.e., 8 |
3633 | or 16 bytes). | |
3634 | ||
3635 | ||
4697a36c MM |
3636 | V.4 stack frames look like: |
3637 | ||
3638 | SP----> +---------------------------------------+ | |
3639 | | back chain to caller | 0 | |
3640 | +---------------------------------------+ | |
5eb387b8 | 3641 | | caller's saved LR | 4 |
4697a36c MM |
3642 | +---------------------------------------+ |
3643 | | Parameter save area (P) | 8 | |
3644 | +---------------------------------------+ | |
a7df97e6 MM |
3645 | | Alloca space (A) | 8+P |
3646 | +---------------------------------------+ | |
3647 | | Varargs save area (V) | 8+P+A | |
3648 | +---------------------------------------+ | |
3649 | | Local variable space (L) | 8+P+A+V | |
3650 | +---------------------------------------+ | |
3651 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3652 | +---------------------------------------+ |
a7df97e6 MM |
3653 | | saved CR (C) | 8+P+A+V+L+X |
3654 | +---------------------------------------+ | |
3655 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3656 | +---------------------------------------+ | |
3657 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3658 | +---------------------------------------+ |
3659 | old SP->| back chain to caller's caller | | |
3660 | +---------------------------------------+ | |
b6c9286a | 3661 | |
5376a30c KR |
3662 | The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is |
3663 | given. (But note below and in sysv4.h that we require only 8 and | |
3664 | may round up the size of our stack frame anyways. The historical | |
3665 | reason is early versions of powerpc-linux which didn't properly | |
3666 | align the stack at program startup. A happy side-effect is that | |
3667 | -mno-eabi libraries can be used with -meabi programs.) | |
3668 | ||
b6c9286a MM |
3669 | |
3670 | A PowerPC Windows/NT frame looks like: | |
3671 | ||
3672 | SP----> +---------------------------------------+ | |
3673 | | back chain to caller | 0 | |
3674 | +---------------------------------------+ | |
3675 | | reserved | 4 | |
3676 | +---------------------------------------+ | |
3677 | | reserved | 8 | |
3678 | +---------------------------------------+ | |
3679 | | reserved | 12 | |
3680 | +---------------------------------------+ | |
3681 | | reserved | 16 | |
3682 | +---------------------------------------+ | |
3683 | | reserved | 20 | |
3684 | +---------------------------------------+ | |
3685 | | Parameter save area (P) | 24 | |
3686 | +---------------------------------------+ | |
a7df97e6 MM |
3687 | | Alloca space (A) | 24+P |
3688 | +---------------------------------------+ | |
3689 | | Local variable space (L) | 24+P+A | |
3690 | +---------------------------------------+ | |
3691 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3692 | +---------------------------------------+ |
a7df97e6 MM |
3693 | | Save area for FP registers (F) | 24+P+A+L+X |
3694 | +---------------------------------------+ | |
3695 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3696 | +---------------------------------------+ | |
3697 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3698 | +---------------------------------------+ | |
3699 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3700 | +---------------------------------------+ | |
3701 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3702 | +---------------------------------------+ | |
3703 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3704 | +---------------------------------------+ |
3705 | old SP->| back chain to caller's caller | | |
3706 | +---------------------------------------+ | |
3707 | ||
3708 | For NT, there is no specific order to save the registers, but in | |
3709 | order to support __builtin_return_address, the save area for the | |
3710 | link register needs to be in a known place, so we use -4 off of the | |
3711 | old SP. To support calls through pointers, we also allocate a | |
5376a30c KR |
3712 | fixed slot to store the TOC, -8 off the old SP. |
3713 | ||
3714 | The required alignment for NT is 16 bytes. | |
3715 | ||
3716 | ||
3717 | The EABI configuration defaults to the V.4 layout, unless | |
3718 | -mcall-aix is used, in which case the AIX layout is used. However, | |
3719 | the stack alignment requirements may differ. If -mno-eabi is not | |
3720 | given, the required stack alignment is 8 bytes; if -mno-eabi is | |
3721 | given, the required alignment is 16 bytes. (But see V.4 comment | |
3722 | above.) */ | |
4697a36c | 3723 | |
61b2fbe7 MM |
3724 | #ifndef ABI_STACK_BOUNDARY |
3725 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3726 | #endif | |
3727 | ||
4697a36c MM |
3728 | rs6000_stack_t * |
3729 | rs6000_stack_info () | |
3730 | { | |
3731 | static rs6000_stack_t info, zero_info; | |
3732 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3733 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3734 | enum rs6000_abi abi; |
b6c9286a | 3735 | int total_raw_size; |
4697a36c MM |
3736 | |
3737 | /* Zero all fields portably */ | |
3738 | info = zero_info; | |
3739 | ||
3740 | /* Select which calling sequence */ | |
b6c9286a | 3741 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3742 | |
4697a36c MM |
3743 | /* Calculate which registers need to be saved & save area size */ |
3744 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
906fb125 GK |
3745 | /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM, |
3746 | even if it currently looks like we won't. */ | |
3747 | if (flag_pic == 1 | |
3748 | && (abi == ABI_V4 || abi == ABI_SOLARIS) | |
3749 | && info_ptr->first_gp_reg_save > PIC_OFFSET_TABLE_REGNUM) | |
3750 | info_ptr->gp_size = reg_size * (32 - PIC_OFFSET_TABLE_REGNUM); | |
3751 | else | |
3752 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
4697a36c MM |
3753 | |
3754 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3755 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3756 | ||
3757 | /* Does this function call anything? */ | |
3758 | info_ptr->calls_p = rs6000_makes_calls (); | |
3759 | ||
62c0fb87 | 3760 | /* Allocate space to save the toc. */ |
82280d5e | 3761 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3762 | { |
3763 | info_ptr->toc_save_p = 1; | |
3764 | info_ptr->toc_size = reg_size; | |
3765 | } | |
3766 | ||
802a0058 MM |
3767 | /* Does this machine need the float/int conversion area? */ |
3768 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3769 | ||
b6c9286a MM |
3770 | /* If this is main and we need to call a function to set things up, |
3771 | save main's arguments around the call. */ | |
c81bebd7 MM |
3772 | #ifdef TARGET_EABI |
3773 | if (TARGET_EABI) | |
3774 | #endif | |
b6c9286a | 3775 | { |
c5c76735 JL |
3776 | if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), |
3777 | "main") | |
30ccf55d | 3778 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) |
b6c9286a | 3779 | { |
c81bebd7 | 3780 | info_ptr->main_p = 1; |
b6c9286a | 3781 | |
c81bebd7 MM |
3782 | #ifdef NAME__MAIN |
3783 | info_ptr->calls_p = 1; | |
b6c9286a | 3784 | |
c81bebd7 | 3785 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3786 | { |
c81bebd7 MM |
3787 | int i; |
3788 | tree arg; | |
3789 | ||
3790 | info_ptr->main_save_p = 1; | |
3791 | info_ptr->main_size = 0; | |
3792 | ||
3793 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3794 | arg != NULL_TREE && i < 8; | |
3795 | (arg = TREE_CHAIN (arg)), i++) | |
3796 | { | |
3797 | info_ptr->main_size += reg_size; | |
3798 | } | |
b6c9286a | 3799 | } |
b6c9286a | 3800 | #endif |
c81bebd7 | 3801 | } |
b6c9286a MM |
3802 | } |
3803 | ||
4697a36c | 3804 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3805 | if (regs_ever_live[65] |
3806 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3807 | #ifdef TARGET_RELOCATABLE |
3808 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3809 | #endif | |
3810 | || (info_ptr->first_fp_reg_save != 64 | |
3811 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3812 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3813 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3814 | || info_ptr->calls_p) |
3815 | { | |
3816 | info_ptr->lr_save_p = 1; | |
3817 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3818 | if (abi == ABI_NT) |
3819 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3820 | } |
3821 | ||
3822 | /* Determine if we need to save the condition code registers */ | |
3823 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3824 | { | |
3825 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3826 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3827 | info_ptr->cr_size = reg_size; |
3828 | } | |
3829 | ||
3830 | /* Determine various sizes */ | |
3831 | info_ptr->reg_size = reg_size; | |
3832 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3833 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3834 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3835 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3836 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3837 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3838 | + info_ptr->gp_size |
3839 | + info_ptr->cr_size | |
3840 | + info_ptr->lr_size | |
3841 | + info_ptr->toc_size | |
3842 | + info_ptr->main_size, 8); | |
3843 | ||
4697a36c | 3844 | /* Calculate the offsets */ |
24d304eb | 3845 | switch (abi) |
4697a36c | 3846 | { |
b6c9286a | 3847 | case ABI_NONE: |
24d304eb | 3848 | default: |
b6c9286a MM |
3849 | abort (); |
3850 | ||
3851 | case ABI_AIX: | |
3852 | case ABI_AIX_NODESC: | |
3853 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3854 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3855 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3856 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3857 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3858 | break; |
3859 | ||
3860 | case ABI_V4: | |
c81bebd7 | 3861 | case ABI_SOLARIS: |
b6c9286a MM |
3862 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3863 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3864 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3865 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3866 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3867 | info_ptr->lr_save_offset = reg_size; |
3868 | break; | |
3869 | ||
3870 | case ABI_NT: | |
a260abc9 | 3871 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3872 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3873 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3874 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3875 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3876 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3877 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3878 | |
3879 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3880 | break; |
4697a36c MM |
3881 | } |
3882 | ||
34792e82 | 3883 | /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ |
ff381587 MM |
3884 | if (info_ptr->fpmem_p |
3885 | && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) | |
3886 | info_ptr->fpmem_size += reg_size; | |
3887 | ||
3888 | total_raw_size = (info_ptr->vars_size | |
3889 | + info_ptr->parm_size | |
3890 | + info_ptr->fpmem_size | |
3891 | + info_ptr->save_size | |
3892 | + info_ptr->varargs_size | |
3893 | + info_ptr->fixed_size); | |
3894 | ||
3895 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); | |
3896 | ||
3897 | /* Determine if we need to allocate any stack frame: | |
3898 | ||
3899 | For AIX we need to push the stack if a frame pointer is needed (because | |
3900 | the stack might be dynamically adjusted), if we are debugging, if we | |
3901 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3902 | are more than the space needed to save all non-volatile registers: | |
bfc79d3b | 3903 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved). |
ff381587 MM |
3904 | |
3905 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3906 | the debugger can handle stackless frames. */ | |
3907 | ||
3908 | if (info_ptr->calls_p) | |
3909 | info_ptr->push_p = 1; | |
3910 | ||
3911 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) | |
3912 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size | |
3913 | || (abi == ABI_NT ? info_ptr->lr_save_p | |
3914 | : info_ptr->calls_p)); | |
3915 | ||
3916 | else | |
3917 | info_ptr->push_p = (frame_pointer_needed | |
3918 | || write_symbols != NO_DEBUG | |
3919 | || ((total_raw_size - info_ptr->fixed_size) | |
bfc79d3b | 3920 | > (TARGET_32BIT ? 220 : 288))); |
ff381587 | 3921 | |
a7df97e6 | 3922 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3923 | { |
3924 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3925 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3926 | rs6000_fpmem_offset = (info_ptr->push_p |
3927 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3928 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3929 | } |
3930 | else | |
3931 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3932 | |
4697a36c | 3933 | /* Zero offsets if we're not saving those registers */ |
8dda1a21 | 3934 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3935 | info_ptr->fp_save_offset = 0; |
3936 | ||
8dda1a21 | 3937 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3938 | info_ptr->gp_save_offset = 0; |
3939 | ||
c81fc13e | 3940 | if (! info_ptr->lr_save_p) |
4697a36c MM |
3941 | info_ptr->lr_save_offset = 0; |
3942 | ||
c81fc13e | 3943 | if (! info_ptr->cr_save_p) |
4697a36c MM |
3944 | info_ptr->cr_save_offset = 0; |
3945 | ||
c81fc13e | 3946 | if (! info_ptr->toc_save_p) |
b6c9286a MM |
3947 | info_ptr->toc_save_offset = 0; |
3948 | ||
c81fc13e | 3949 | if (! info_ptr->main_save_p) |
b6c9286a MM |
3950 | info_ptr->main_save_offset = 0; |
3951 | ||
4697a36c MM |
3952 | return info_ptr; |
3953 | } | |
3954 | ||
3955 | void | |
3956 | debug_stack_info (info) | |
3957 | rs6000_stack_t *info; | |
9878760c | 3958 | { |
d330fd93 | 3959 | const char *abi_string; |
24d304eb | 3960 | |
c81fc13e | 3961 | if (! info) |
4697a36c MM |
3962 | info = rs6000_stack_info (); |
3963 | ||
3964 | fprintf (stderr, "\nStack information for function %s:\n", | |
3965 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3966 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3967 | : "<unknown>")); | |
3968 | ||
24d304eb RK |
3969 | switch (info->abi) |
3970 | { | |
b6c9286a MM |
3971 | default: abi_string = "Unknown"; break; |
3972 | case ABI_NONE: abi_string = "NONE"; break; | |
3973 | case ABI_AIX: abi_string = "AIX"; break; | |
3974 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3975 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3976 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3977 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3978 | } |
3979 | ||
3980 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3981 | ||
4697a36c MM |
3982 | if (info->first_gp_reg_save != 32) |
3983 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3984 | ||
3985 | if (info->first_fp_reg_save != 64) | |
3986 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3987 | |
4697a36c MM |
3988 | if (info->lr_save_p) |
3989 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3990 | |
4697a36c MM |
3991 | if (info->cr_save_p) |
3992 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3993 | ||
b6c9286a MM |
3994 | if (info->toc_save_p) |
3995 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3996 | ||
4697a36c MM |
3997 | if (info->push_p) |
3998 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3999 | ||
4000 | if (info->calls_p) | |
4001 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
4002 | ||
b6c9286a MM |
4003 | if (info->main_p) |
4004 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
4005 | ||
4006 | if (info->main_save_p) | |
4007 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
4008 | ||
802a0058 MM |
4009 | if (info->fpmem_p) |
4010 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
4011 | ||
4697a36c MM |
4012 | if (info->gp_save_offset) |
4013 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
4014 | ||
4015 | if (info->fp_save_offset) | |
4016 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
4017 | ||
4018 | if (info->lr_save_offset) | |
4019 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
4020 | ||
4021 | if (info->cr_save_offset) | |
4022 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
4023 | ||
b6c9286a MM |
4024 | if (info->toc_save_offset) |
4025 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
4026 | ||
4697a36c MM |
4027 | if (info->varargs_save_offset) |
4028 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
4029 | ||
b6c9286a MM |
4030 | if (info->main_save_offset) |
4031 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
4032 | ||
802a0058 MM |
4033 | if (info->fpmem_offset) |
4034 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
4035 | ||
4697a36c MM |
4036 | if (info->total_size) |
4037 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
4038 | ||
4039 | if (info->varargs_size) | |
4040 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
4041 | ||
4042 | if (info->vars_size) | |
4043 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
4044 | ||
4045 | if (info->parm_size) | |
4046 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
4047 | ||
802a0058 MM |
4048 | if (info->fpmem_size) |
4049 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
4050 | ||
4697a36c MM |
4051 | if (info->fixed_size) |
4052 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
4053 | ||
4054 | if (info->gp_size) | |
4055 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
4056 | ||
4057 | if (info->fp_size) | |
4058 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
4059 | ||
b6c9286a MM |
4060 | if (info->lr_size) |
4061 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
4062 | ||
4697a36c MM |
4063 | if (info->cr_size) |
4064 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
4065 | ||
b6c9286a MM |
4066 | if (info->toc_size) |
4067 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
4068 | ||
4069 | if (info->main_size) | |
4070 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
4071 | ||
4697a36c MM |
4072 | if (info->save_size) |
4073 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
4074 | ||
4075 | if (info->reg_size != 4) | |
4076 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
4077 | ||
4078 | fprintf (stderr, "\n"); | |
9878760c | 4079 | } |
4697a36c | 4080 | \f |
c7ca610e RK |
4081 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
4082 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
4083 | a constant pool. */ | |
4084 | ||
4085 | void | |
38c1f2d7 | 4086 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 4087 | FILE *file; |
38c1f2d7 | 4088 | int reg; |
c7ca610e RK |
4089 | { |
4090 | char buf[256]; | |
4091 | ||
4092 | #ifdef USING_SVR4_H | |
4093 | if (TARGET_RELOCATABLE) | |
4094 | { | |
4095 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
4096 | fprintf (file, "\tbl "); | |
4097 | assemble_name (file, buf); | |
4098 | fprintf (file, "\n"); | |
4099 | ||
38c1f2d7 | 4100 | /* possibly create the toc section */ |
c81fc13e | 4101 | if (! toc_initialized) |
38c1f2d7 MM |
4102 | { |
4103 | toc_section (); | |
4104 | function_section (current_function_decl); | |
4105 | } | |
4106 | ||
4107 | /* If not first call in this function, we need to put the | |
4108 | different between .LCTOC1 and the address we get to right | |
4109 | after the bl. It will mess up disassembling the instructions | |
4110 | but that can't be helped. We will later need to bias the | |
4111 | address before loading. */ | |
4112 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
4113 | { | |
d330fd93 | 4114 | const char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
ec940faa | 4115 | const char *buf_ptr; |
38c1f2d7 MM |
4116 | |
4117 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
4118 | ||
4119 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
4120 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
4121 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
4122 | ||
4123 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
4124 | fprintf (file, "%s\n", buf_ptr); | |
4125 | } | |
4126 | ||
c7ca610e | 4127 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
4128 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
4129 | ||
4130 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
4131 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
4132 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 4133 | |
a260abc9 DE |
4134 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
4135 | reg_names[0]); | |
38c1f2d7 | 4136 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 4137 | assemble_name (file, buf); |
949ea356 | 4138 | putc ('-', file); |
c7ca610e RK |
4139 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
4140 | assemble_name (file, buf); | |
38c1f2d7 | 4141 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 4142 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 4143 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
4144 | rs6000_pic_labelno++; |
4145 | } | |
9615f239 | 4146 | else if (! TARGET_64BIT) |
c7ca610e RK |
4147 | { |
4148 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 4149 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 4150 | assemble_name (file, buf); |
dfdfa60f | 4151 | fputs ("@ha\n", file); |
a260abc9 DE |
4152 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
4153 | assemble_name (file, buf); | |
4154 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
4155 | } |
4156 | else | |
4157 | abort (); | |
4158 | ||
4159 | #else /* !USING_SVR4_H */ | |
4160 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
4161 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
4162 | reg_names[reg]); | |
c7ca610e RK |
4163 | assemble_name (file, buf); |
4164 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4165 | #endif /* USING_SVR4_H */ | |
4166 | } | |
4167 | ||
38c1f2d7 MM |
4168 | \f |
4169 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
4170 | of the old frame is left in r12. */ | |
4171 | ||
4172 | void | |
4173 | rs6000_allocate_stack_space (file, size, copy_r12) | |
4174 | FILE *file; | |
4175 | int size; | |
4176 | int copy_r12; | |
4177 | { | |
4178 | int neg_size = -size; | |
4179 | if (TARGET_UPDATE) | |
4180 | { | |
4181 | if (size < 32767) | |
4182 | asm_fprintf (file, | |
4183 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
4184 | reg_names[1], neg_size, reg_names[1]); | |
4185 | else | |
4186 | { | |
4187 | if (copy_r12) | |
4188 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4189 | ||
9615f239 | 4190 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
4191 | reg_names[0], (neg_size >> 16) & 0xffff, |
4192 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
4193 | asm_fprintf (file, | |
4194 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
4195 | reg_names[1], reg_names[1], reg_names[0]); | |
4196 | } | |
4197 | } | |
4198 | else | |
4199 | { | |
4200 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4201 | if (size < 32767) | |
aa4201ad | 4202 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 4203 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
4204 | else |
4205 | { | |
9615f239 | 4206 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
4207 | reg_names[0], (neg_size >> 16) & 0xffff, |
4208 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
4209 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
4210 | reg_names[0], reg_names[1]); | |
4211 | } | |
4212 | ||
4213 | asm_fprintf (file, | |
4214 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
4215 | reg_names[12], reg_names[1]); | |
4216 | } | |
4217 | } | |
4218 | ||
4219 | \f | |
9878760c | 4220 | /* Write function prologue. */ |
9878760c RK |
4221 | void |
4222 | output_prolog (file, size) | |
4223 | FILE *file; | |
296b8152 | 4224 | int size ATTRIBUTE_UNUSED; |
9878760c | 4225 | { |
4697a36c | 4226 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a | 4227 | int reg_size = info->reg_size; |
d330fd93 KG |
4228 | const char *store_reg; |
4229 | const char *load_reg; | |
979721f8 MM |
4230 | int sp_reg = 1; |
4231 | int sp_offset = 0; | |
b6c9286a | 4232 | |
8f802bfb | 4233 | if (TARGET_32BIT) |
b6c9286a | 4234 | { |
8f802bfb DE |
4235 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
4236 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
4237 | } |
4238 | else | |
4239 | { | |
8f802bfb DE |
4240 | store_reg = "\tstd %s,%d(%s)\n"; |
4241 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 4242 | } |
9878760c | 4243 | |
4697a36c MM |
4244 | if (TARGET_DEBUG_STACK) |
4245 | debug_stack_info (info); | |
9878760c RK |
4246 | |
4247 | /* Write .extern for any function we will call to save and restore fp | |
4248 | values. */ | |
b6c9286a | 4249 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 4250 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
4251 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
4252 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
4253 | |
4254 | /* Write .extern for truncation routines, if needed. */ | |
4255 | if (rs6000_trunc_used && ! trunc_defined) | |
4256 | { | |
e138174b ILT |
4257 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
4258 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
4259 | trunc_defined = 1; |
4260 | } | |
4697a36c | 4261 | |
c764f757 RK |
4262 | /* Write .extern for AIX common mode routines, if needed. */ |
4263 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
4264 | { | |
f6709c70 JW |
4265 | fputs ("\t.extern __mulh\n", file); |
4266 | fputs ("\t.extern __mull\n", file); | |
4267 | fputs ("\t.extern __divss\n", file); | |
4268 | fputs ("\t.extern __divus\n", file); | |
4269 | fputs ("\t.extern __quoss\n", file); | |
4270 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
4271 | common_mode_defined = 1; |
4272 | } | |
9878760c | 4273 | |
979721f8 | 4274 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 4275 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
4276 | { |
4277 | if (info->total_size < 32767) | |
38c1f2d7 | 4278 | sp_offset = info->total_size; |
979721f8 | 4279 | else |
38c1f2d7 MM |
4280 | sp_reg = 12; |
4281 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
4282 | } |
4283 | ||
9878760c | 4284 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
4285 | if (info->lr_save_p) |
4286 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
4287 | |
4288 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 4289 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 4290 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
4291 | |
4292 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
4293 | ourself. Otherwise, call function. Note that since they are statically |
4294 | linked, we do not need a nop following them. */ | |
4697a36c | 4295 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 4296 | { |
4697a36c | 4297 | int regno = info->first_fp_reg_save; |
979721f8 | 4298 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4299 | |
4300 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4301 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 4302 | } |
4697a36c MM |
4303 | else if (info->first_fp_reg_save != 64) |
4304 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
4305 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
4306 | |
4307 | /* Now save gpr's. */ | |
4697a36c | 4308 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4309 | { |
4697a36c | 4310 | int regno = info->first_gp_reg_save; |
979721f8 | 4311 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 4312 | |
4697a36c | 4313 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4314 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4315 | } |
4316 | ||
4697a36c MM |
4317 | else if (info->first_gp_reg_save != 32) |
4318 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
4319 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4320 | info->gp_save_offset + sp_offset, |
4321 | reg_names[sp_reg]); | |
9878760c | 4322 | |
b6c9286a MM |
4323 | /* Save main's arguments if we need to call a function */ |
4324 | #ifdef NAME__MAIN | |
4325 | if (info->main_save_p) | |
4326 | { | |
4327 | int regno; | |
5ebfb2ba | 4328 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
4329 | int size = info->main_size; |
4330 | ||
2682eae9 | 4331 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 4332 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
4333 | } |
4334 | #endif | |
4335 | ||
9878760c | 4336 | /* Save lr if we used it. */ |
4697a36c | 4337 | if (info->lr_save_p) |
979721f8 MM |
4338 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
4339 | reg_names[sp_reg]); | |
9878760c RK |
4340 | |
4341 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 4342 | if (info->cr_save_p) |
979721f8 MM |
4343 | { |
4344 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
4345 | { | |
4346 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
4347 | asm_fprintf (file, store_reg, reg_names[0], | |
4348 | info->cr_save_offset + sp_offset, | |
4349 | reg_names[sp_reg]); | |
4350 | } | |
4351 | else | |
4352 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
4353 | reg_names[sp_reg]); | |
4354 | } | |
9878760c | 4355 | |
8d30c4ee FS |
4356 | /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */ |
4357 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
4358 | && flag_pic == 1 && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) | |
4359 | { | |
c81fc13e | 4360 | if (! info->lr_save_p) |
8d30c4ee FS |
4361 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); |
4362 | ||
4363 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4364 | asm_fprintf (file, "\tmflr %s\n", reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
4365 | ||
c81fc13e | 4366 | if (! info->lr_save_p) |
8d30c4ee FS |
4367 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); |
4368 | } | |
4369 | ||
979721f8 MM |
4370 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
4371 | do it here. */ | |
4372 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
4373 | { | |
4374 | if (info->total_size < 32768) | |
4375 | { | |
4376 | int probe_offset = 4096; | |
4377 | while (probe_offset < info->total_size) | |
4378 | { | |
4379 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
4380 | probe_offset += 4096; | |
4381 | } | |
4382 | } | |
4383 | else | |
4384 | { | |
4385 | int probe_iterations = info->total_size / 4096; | |
4386 | static int probe_labelno = 0; | |
4387 | char buf[256]; | |
4388 | ||
4389 | if (probe_iterations < 32768) | |
4390 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
4391 | else | |
4392 | { | |
4393 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
4394 | if (probe_iterations & 0xffff) | |
4395 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
4396 | probe_iterations & 0xffff); | |
4397 | } | |
4398 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
4399 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4400 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
4401 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 4402 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
4403 | fputs ("\tbdnz ", file); |
4404 | assemble_name (file, buf); | |
949ea356 | 4405 | putc ('\n', file); |
979721f8 MM |
4406 | } |
4407 | } | |
4408 | ||
38c1f2d7 | 4409 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4410 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4411 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4412 | |
4413 | /* Set frame pointer, if needed. */ | |
4414 | if (frame_pointer_needed) | |
4697a36c | 4415 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4416 | |
b6c9286a MM |
4417 | #ifdef NAME__MAIN |
4418 | /* If we need to call a function to set things up for main, do so now | |
4419 | before dealing with the TOC. */ | |
4420 | if (info->main_p) | |
4421 | { | |
d330fd93 | 4422 | const char *prefix = ""; |
b6c9286a MM |
4423 | |
4424 | switch (DEFAULT_ABI) | |
4425 | { | |
4426 | case ABI_AIX: prefix = "."; break; | |
4427 | case ABI_NT: prefix = ".."; break; | |
4428 | } | |
4429 | ||
4430 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4431 | #ifdef RS6000_CALL_GLUE2 | |
4432 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4433 | #else | |
4434 | #ifdef RS6000_CALL_GLUE | |
4435 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
13f1623b DE |
4436 | { |
4437 | putc('\t', file); | |
4438 | asm_fprintf (file, RS6000_CALL_GLUE); | |
4439 | putc('\n', file); | |
4440 | } | |
b6c9286a MM |
4441 | #endif |
4442 | #endif | |
4443 | ||
4444 | if (info->main_save_p) | |
4445 | { | |
4446 | int regno; | |
4447 | int loc; | |
4448 | int size = info->main_size; | |
4449 | ||
4450 | if (info->total_size < 32767) | |
4451 | { | |
4452 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4453 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4454 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4455 | } | |
4456 | else | |
5ebfb2ba MM |
4457 | { |
4458 | int neg_size = info->main_save_offset - info->total_size; | |
4459 | loc = 0; | |
9615f239 | 4460 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
5ebfb2ba MM |
4461 | reg_names[0], (neg_size >> 16) & 0xffff, |
4462 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4463 | |
b6c9286a MM |
4464 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4465 | reg_names[1]); | |
4466 | ||
2682eae9 | 4467 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4468 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4469 | } | |
4470 | } | |
4471 | } | |
4472 | #endif | |
4473 | ||
4474 | ||
1875cc88 JW |
4475 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4476 | TOC_TABLE address into register 30. */ | |
4697a36c | 4477 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4478 | { |
4479 | #ifdef USING_SVR4_H | |
c81fc13e | 4480 | if (! profile_flag) |
38c1f2d7 | 4481 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
ab9eef41 | 4482 | #endif |
38c1f2d7 | 4483 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4484 | } |
4697a36c | 4485 | |
b6c9286a MM |
4486 | if (DEFAULT_ABI == ABI_NT) |
4487 | { | |
4488 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4489 | fputs (".b:\n", file); | |
3daf36a4 | 4490 | } |
9878760c RK |
4491 | } |
4492 | ||
4493 | /* Write function epilogue. */ | |
4494 | ||
4495 | void | |
4496 | output_epilog (file, size) | |
4497 | FILE *file; | |
296b8152 | 4498 | int size ATTRIBUTE_UNUSED; |
9878760c | 4499 | { |
4697a36c | 4500 | rs6000_stack_t *info = rs6000_stack_info (); |
d330fd93 | 4501 | const char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4502 | rtx insn = get_last_insn (); |
979721f8 MM |
4503 | int sp_reg = 1; |
4504 | int sp_offset = 0; | |
9878760c | 4505 | |
9878760c RK |
4506 | /* If the last insn was a BARRIER, we don't have to write anything except |
4507 | the trace table. */ | |
4508 | if (GET_CODE (insn) == NOTE) | |
4509 | insn = prev_nonnote_insn (insn); | |
4510 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4511 | { | |
4512 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4513 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4514 | we know what size to update it with. */ | |
4515 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4516 | || info->total_size > 32767) |
979721f8 MM |
4517 | { |
4518 | /* Under V.4, don't reset the stack pointer until after we're done | |
4519 | loading the saved registers. */ | |
c81bebd7 | 4520 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4521 | sp_reg = 11; |
4522 | ||
4523 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4524 | } | |
4697a36c MM |
4525 | else if (info->push_p) |
4526 | { | |
c81bebd7 | 4527 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4528 | sp_offset = info->total_size; |
4697a36c | 4529 | else |
a260abc9 DE |
4530 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4531 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4532 | } |
9878760c | 4533 | |
b4ac57ab | 4534 | /* Get the old lr if we saved it. */ |
4697a36c | 4535 | if (info->lr_save_p) |
979721f8 | 4536 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4537 | |
4538 | /* Get the old cr if we saved it. */ | |
4697a36c | 4539 | if (info->cr_save_p) |
979721f8 | 4540 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4541 | |
b4ac57ab | 4542 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4543 | if (info->lr_save_p) |
4544 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4545 | |
9878760c | 4546 | /* Restore gpr's. */ |
4697a36c | 4547 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4548 | { |
4697a36c | 4549 | int regno = info->first_gp_reg_save; |
979721f8 | 4550 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4551 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4552 | |
4697a36c | 4553 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4554 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4555 | } |
4556 | ||
4697a36c MM |
4557 | else if (info->first_gp_reg_save != 32) |
4558 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4559 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4560 | info->gp_save_offset + sp_offset, |
4561 | reg_names[sp_reg]); | |
9878760c | 4562 | |
b4ac57ab | 4563 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4564 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4565 | { | |
4566 | int regno = info->first_fp_reg_save; | |
979721f8 | 4567 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4568 | |
4569 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4570 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4571 | } |
9878760c | 4572 | |
28edebac RK |
4573 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4574 | that were used. */ | |
4697a36c MM |
4575 | if (info->cr_save_p) |
4576 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4577 | (regs_ever_live[70] != 0) * 0x20 |
4578 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4579 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4580 | |
a6c2a102 DE |
4581 | /* If this is V.4, unwind the stack pointer after all of the loads |
4582 | have been done */ | |
4583 | if (sp_offset != 0) | |
a260abc9 DE |
4584 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4585 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4586 | else if (sp_reg != 1) |
4587 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4588 | ||
b4ac57ab RS |
4589 | /* If we have to restore more than two FP registers, branch to the |
4590 | restore function. It will return to our caller. */ | |
4697a36c MM |
4591 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4592 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4593 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4594 | else |
85638c0d | 4595 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4596 | } |
b4ac57ab | 4597 | |
9b30bae2 | 4598 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4599 | on its format. |
4600 | ||
4601 | We don't output a traceback table if -finhibit-size-directive was | |
4602 | used. The documentation for -finhibit-size-directive reads | |
4603 | ``don't output a @code{.size} assembler directive, or anything | |
4604 | else that would cause trouble if the function is split in the | |
4605 | middle, and the two halves are placed at locations far apart in | |
4606 | memory.'' The traceback table has this property, since it | |
4607 | includes the offset from the start of the function to the | |
4d30c363 MM |
4608 | traceback table itself. |
4609 | ||
4610 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4611 | different traceback table. */ |
4612 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4613 | { |
314fc5a9 ILT |
4614 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4615 | int fixed_parms, float_parms, parm_info; | |
4616 | int i; | |
4617 | ||
b6c9286a MM |
4618 | while (*fname == '.') /* V.4 encodes . in the name */ |
4619 | fname++; | |
4620 | ||
314fc5a9 ILT |
4621 | /* Need label immediately before tbtab, so we can compute its offset |
4622 | from the function start. */ | |
4623 | if (*fname == '*') | |
4624 | ++fname; | |
4625 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4626 | ASM_OUTPUT_LABEL (file, fname); | |
4627 | ||
4628 | /* The .tbtab pseudo-op can only be used for the first eight | |
4629 | expressions, since it can't handle the possibly variable | |
4630 | length fields that follow. However, if you omit the optional | |
4631 | fields, the assembler outputs zeros for all optional fields | |
4632 | anyways, giving each variable length field is minimum length | |
4633 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4634 | pseudo-op at all. */ | |
4635 | ||
4636 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4637 | that have to find it by searching forward from the entry | |
4638 | point or from the current pc. */ | |
19d2d16f | 4639 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4640 | |
4641 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4642 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4643 | |
4644 | /* Language type. Unfortunately, there doesn't seem to be any | |
4645 | official way to get this info, so we use language_string. C | |
4646 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
9517ead8 | 4647 | value for C for now. There is no official value for Java, |
6f573ff9 JL |
4648 | although IBM appears to be using 13. There is no official value |
4649 | for Chill, so we've choosen 44 pseudo-randomly. */ | |
314fc5a9 ILT |
4650 | if (! strcmp (language_string, "GNU C") |
4651 | || ! strcmp (language_string, "GNU Obj-C")) | |
4652 | i = 0; | |
4653 | else if (! strcmp (language_string, "GNU F77")) | |
4654 | i = 1; | |
4655 | else if (! strcmp (language_string, "GNU Ada")) | |
4656 | i = 3; | |
8b83775b | 4657 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4658 | i = 2; |
4659 | else if (! strcmp (language_string, "GNU C++")) | |
4660 | i = 9; | |
9517ead8 AG |
4661 | else if (! strcmp (language_string, "GNU Java")) |
4662 | i = 13; | |
6f573ff9 JL |
4663 | else if (! strcmp (language_string, "GNU CHILL")) |
4664 | i = 44; | |
314fc5a9 ILT |
4665 | else |
4666 | abort (); | |
4667 | fprintf (file, "%d,", i); | |
4668 | ||
4669 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4670 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4671 | from start of procedure stored in tbtab, internal function, function | |
4672 | has controlled storage, function has no toc, function uses fp, | |
4673 | function logs/aborts fp operations. */ | |
4674 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4675 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4676 | |
4677 | /* 6 bitfields: function is interrupt handler, name present in | |
4678 | proc table, function calls alloca, on condition directives | |
4679 | (controls stack walks, 3 bits), saves condition reg, saves | |
4680 | link reg. */ | |
4681 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4682 | set up as a frame pointer, even when there is no alloca call. */ | |
4683 | fprintf (file, "%d,", | |
4684 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4685 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4686 | |
4687 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4688 | (6 bits). */ | |
4689 | fprintf (file, "%d,", | |
4697a36c | 4690 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4691 | |
4692 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4693 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4694 | ||
4695 | { | |
4696 | /* Compute the parameter info from the function decl argument | |
4697 | list. */ | |
4698 | tree decl; | |
4699 | int next_parm_info_bit; | |
4700 | ||
4701 | next_parm_info_bit = 31; | |
4702 | parm_info = 0; | |
4703 | fixed_parms = 0; | |
4704 | float_parms = 0; | |
4705 | ||
4706 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4707 | decl; decl = TREE_CHAIN (decl)) | |
4708 | { | |
4709 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4710 | enum machine_mode mode = GET_MODE (parameter); | |
4711 | ||
4712 | if (GET_CODE (parameter) == REG) | |
4713 | { | |
4714 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4715 | { | |
4716 | int bits; | |
4717 | ||
4718 | float_parms++; | |
4719 | ||
4720 | if (mode == SFmode) | |
4721 | bits = 0x2; | |
4722 | else if (mode == DFmode) | |
4723 | bits = 0x3; | |
4724 | else | |
4725 | abort (); | |
4726 | ||
4727 | /* If only one bit will fit, don't or in this entry. */ | |
4728 | if (next_parm_info_bit > 0) | |
4729 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4730 | next_parm_info_bit -= 2; | |
4731 | } | |
4732 | else | |
4733 | { | |
4734 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4735 | + (UNITS_PER_WORD - 1)) | |
4736 | / UNITS_PER_WORD); | |
4737 | next_parm_info_bit -= 1; | |
4738 | } | |
4739 | } | |
4740 | } | |
4741 | } | |
4742 | ||
4743 | /* Number of fixed point parameters. */ | |
4744 | /* This is actually the number of words of fixed point parameters; thus | |
4745 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4746 | fprintf (file, "%d,", fixed_parms); | |
4747 | ||
4748 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4749 | all on stack. */ | |
4750 | /* This is actually the number of fp registers that hold parameters; | |
4751 | and thus the maximum value is 13. */ | |
4752 | /* Set parameters on stack bit if parameters are not in their original | |
4753 | registers, regardless of whether they are on the stack? Xlc | |
4754 | seems to set the bit when not optimizing. */ | |
4755 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4756 | ||
4757 | /* Optional fields follow. Some are variable length. */ | |
4758 | ||
4759 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4760 | 11 double float. */ | |
4761 | /* There is an entry for each parameter in a register, in the order that | |
4762 | they occur in the parameter list. Any intervening arguments on the | |
4763 | stack are ignored. If the list overflows a long (max possible length | |
4764 | 34 bits) then completely leave off all elements that don't fit. */ | |
4765 | /* Only emit this long if there was at least one parameter. */ | |
4766 | if (fixed_parms || float_parms) | |
4767 | fprintf (file, "\t.long %d\n", parm_info); | |
4768 | ||
4769 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4770 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4771 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4772 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4773 | fputs ("-.", file); |
314fc5a9 | 4774 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4775 | putc ('\n', file); |
314fc5a9 ILT |
4776 | |
4777 | /* Interrupt handler mask. */ | |
4778 | /* Omit this long, since we never set the interrupt handler bit | |
4779 | above. */ | |
4780 | ||
4781 | /* Number of CTL (controlled storage) anchors. */ | |
4782 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4783 | ||
4784 | /* Displacement into stack of each CTL anchor. */ | |
4785 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4786 | ||
4787 | /* Length of function name. */ | |
296b8152 | 4788 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4789 | |
4790 | /* Function name. */ | |
4791 | assemble_string (fname, strlen (fname)); | |
4792 | ||
4793 | /* Register for alloca automatic storage; this is always reg 31. | |
4794 | Only emit this if the alloca bit was set above. */ | |
4795 | if (frame_pointer_needed) | |
19d2d16f | 4796 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4797 | } |
4697a36c | 4798 | |
b6c9286a MM |
4799 | if (DEFAULT_ABI == ABI_NT) |
4800 | { | |
4801 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4802 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4803 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4804 | fputs (":\n", file); | |
4805 | } | |
9878760c | 4806 | } |
17167fd8 MM |
4807 | \f |
4808 | /* A C compound statement that outputs the assembler code for a thunk function, | |
4809 | used to implement C++ virtual function calls with multiple inheritance. The | |
4810 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
4811 | object parameter before handing control off to the real function. | |
4812 | ||
4813 | First, emit code to add the integer DELTA to the location that contains the | |
4814 | incoming first argument. Assume that this argument contains a pointer, and | |
4815 | is the one used to pass the `this' pointer in C++. This is the incoming | |
4816 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
4817 | addition must preserve the values of all other incoming arguments. | |
4818 | ||
4819 | After the addition, emit code to jump to FUNCTION, which is a | |
4820 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
4821 | the return address. Hence returning from FUNCTION will return to whoever | |
4822 | called the current `thunk'. | |
4823 | ||
4824 | The effect must be as if FUNCTION had been called directly with the adjusted | |
4825 | first argument. This macro is responsible for emitting all of the code for | |
4826 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
4827 | invoked. | |
4828 | ||
4829 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
4830 | extracted from it.) It might possibly be useful on some targets, but | |
4831 | probably not. | |
4832 | ||
4833 | If you do not define this macro, the target-independent code in the C++ | |
4834 | frontend will generate a less efficient heavyweight thunk that calls | |
4835 | FUNCTION instead of jumping to it. The generic approach does not support | |
4836 | varargs. */ | |
4837 | ||
4838 | void | |
4839 | output_mi_thunk (file, thunk_fndecl, delta, function) | |
4840 | FILE *file; | |
d330fd93 | 4841 | tree thunk_fndecl ATTRIBUTE_UNUSED; |
17167fd8 MM |
4842 | int delta; |
4843 | tree function; | |
4844 | { | |
d330fd93 KG |
4845 | const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; |
4846 | const char *prefix; | |
17167fd8 | 4847 | char *fname; |
d330fd93 KG |
4848 | const char *r0 = reg_names[0]; |
4849 | const char *sp = reg_names[1]; | |
4850 | const char *toc = reg_names[2]; | |
4851 | const char *schain = reg_names[11]; | |
4852 | const char *r12 = reg_names[12]; | |
17167fd8 MM |
4853 | char buf[512]; |
4854 | static int labelno = 0; | |
4855 | ||
4856 | /* Small constants that can be done by one add instruction */ | |
4857 | if (delta >= -32768 && delta <= 32767) | |
4858 | { | |
22b4a3b0 | 4859 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4860 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); |
4861 | else | |
4862 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); | |
4863 | } | |
4864 | ||
4865 | /* Large constants that can be done by one addis instruction */ | |
4866 | else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) | |
4867 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4868 | delta >> 16); | |
4869 | ||
4870 | /* 32-bit constants that can be done by an add and addis instruction. */ | |
4871 | else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) | |
4872 | { | |
22b4a3b0 | 4873 | /* Break into two pieces, propagating the sign bit from the low word to |
17167fd8 MM |
4874 | the upper word. */ |
4875 | int delta_high = delta >> 16; | |
4876 | int delta_low = delta & 0xffff; | |
4877 | if ((delta_low & 0x8000) != 0) | |
4878 | { | |
4879 | delta_high++; | |
4880 | delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ | |
4881 | } | |
4882 | ||
4883 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4884 | delta_high); | |
4885 | ||
22b4a3b0 | 4886 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4887 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); |
4888 | else | |
4889 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); | |
4890 | } | |
4891 | ||
4892 | /* 64-bit constants, fixme */ | |
4893 | else | |
4894 | abort (); | |
4895 | ||
4896 | /* Get the prefix in front of the names. */ | |
4897 | switch (DEFAULT_ABI) | |
4898 | { | |
4899 | default: | |
4900 | abort (); | |
4901 | ||
4902 | case ABI_AIX: | |
4903 | prefix = "."; | |
4904 | break; | |
4905 | ||
4906 | case ABI_V4: | |
4907 | case ABI_AIX_NODESC: | |
4908 | case ABI_SOLARIS: | |
4909 | prefix = ""; | |
4910 | break; | |
4911 | ||
4912 | case ABI_NT: | |
4913 | prefix = ".."; | |
4914 | break; | |
4915 | } | |
4916 | ||
4917 | /* If the function is compiled in this module, jump to it directly. | |
4918 | Otherwise, load up its address and jump to it. */ | |
4919 | ||
4920 | fname = XSTR (XEXP (DECL_RTL (function), 0), 0); | |
42820a49 | 4921 | |
efc97ef0 | 4922 | if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) |
22b4a3b0 FS |
4923 | && ! lookup_attribute ("longcall", |
4924 | TYPE_ATTRIBUTES (TREE_TYPE (function)))) | |
17167fd8 MM |
4925 | { |
4926 | fprintf (file, "\tb %s", prefix); | |
4927 | assemble_name (file, fname); | |
22b4a3b0 | 4928 | if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file); |
949ea356 | 4929 | putc ('\n', file); |
17167fd8 MM |
4930 | } |
4931 | ||
4932 | else | |
4933 | { | |
4934 | switch (DEFAULT_ABI) | |
4935 | { | |
4936 | default: | |
4937 | case ABI_NT: | |
4938 | abort (); | |
4939 | ||
4940 | case ABI_AIX: | |
4941 | /* Set up a TOC entry for the function. */ | |
4942 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4943 | toc_section (); | |
4944 | ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); | |
4945 | labelno++; | |
4946 | ||
4947 | /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since | |
4948 | there will be only one TOC entry for this function. */ | |
4949 | fputs ("\t.tc\t", file); | |
4950 | assemble_name (file, buf); | |
4951 | fputs ("[TC],", file); | |
4952 | assemble_name (file, buf); | |
4953 | putc ('\n', file); | |
4954 | text_section (); | |
4955 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); | |
4956 | assemble_name (file, buf); | |
4957 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4958 | asm_fprintf (file, | |
4959 | (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", | |
4960 | r0, r12); | |
4961 | ||
4962 | asm_fprintf (file, | |
4963 | (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", | |
4964 | toc, r12); | |
4965 | ||
4966 | asm_fprintf (file, "\tmtctr %s\n", r0); | |
4967 | asm_fprintf (file, | |
4968 | (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", | |
4969 | schain, r12); | |
4970 | ||
4971 | asm_fprintf (file, "\tbctr\n"); | |
4972 | break; | |
4973 | ||
17167fd8 | 4974 | case ABI_V4: |
22b4a3b0 FS |
4975 | fprintf (file, "\tb %s", prefix); |
4976 | assemble_name (file, fname); | |
4977 | if (flag_pic) fputs ("@plt", file); | |
949ea356 | 4978 | putc ('\n', file); |
22b4a3b0 FS |
4979 | break; |
4980 | ||
4981 | /* Don't use r11, that contains the static chain, just use r0/r12. */ | |
17167fd8 MM |
4982 | case ABI_AIX_NODESC: |
4983 | case ABI_SOLARIS: | |
4984 | if (flag_pic == 1) | |
4985 | { | |
4986 | fprintf (file, "\tmflr %s\n", r0); | |
4987 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4988 | asm_fprintf (file, "\tmflr %s\n", r12); | |
4989 | asm_fprintf (file, "\tmtlr %s\n", r0); | |
4990 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4991 | assemble_name (file, fname); | |
4992 | asm_fprintf (file, "@got(%s)\n", r12); | |
42820a49 MM |
4993 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4994 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4995 | } |
4996 | #if TARGET_ELF | |
4997 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4998 | { | |
4999 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
5000 | labelno++; | |
5001 | fprintf (file, "\tmflr %s\n", r0); | |
5002 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); | |
5003 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
5004 | rs6000_output_load_toc_table (file, 12); | |
5005 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
5006 | assemble_name (file, buf); | |
5007 | asm_fprintf (file, "(%s)\n", r12); | |
5008 | asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); | |
5009 | asm_fprintf (file, "\tmtlr %s\n", r12); | |
42820a49 MM |
5010 | asm_fprintf (file, "\tmtctr %s\n", r0); |
5011 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
5012 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
5013 | assemble_name (file, buf); | |
5014 | fputs (" = .-.LCTOC1\n", file); | |
5015 | fputs ("\t.long ", file); | |
5016 | assemble_name (file, fname); | |
5017 | fputs ("\n\t.previous\n", file); | |
5018 | } | |
42820a49 MM |
5019 | #endif /* TARGET_ELF */ |
5020 | ||
17167fd8 MM |
5021 | else |
5022 | { | |
42820a49 | 5023 | asm_fprintf (file, "\t{liu|lis} %s,", r12); |
17167fd8 MM |
5024 | assemble_name (file, fname); |
5025 | asm_fprintf (file, "@ha\n"); | |
42820a49 | 5026 | asm_fprintf (file, "\t{cal|la} %s,", r12); |
17167fd8 | 5027 | assemble_name (file, fname); |
42820a49 MM |
5028 | asm_fprintf (file, "@l(%s)\n", r12); |
5029 | asm_fprintf (file, "\tmtctr %s\n", r12); | |
5030 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
5031 | } |
5032 | ||
17167fd8 MM |
5033 | break; |
5034 | } | |
5035 | } | |
5036 | } | |
5037 | ||
9878760c RK |
5038 | \f |
5039 | /* Output a TOC entry. We derive the entry name from what is | |
5040 | being written. */ | |
5041 | ||
5042 | void | |
5043 | output_toc (file, x, labelno) | |
5044 | FILE *file; | |
5045 | rtx x; | |
5046 | int labelno; | |
5047 | { | |
5048 | char buf[256]; | |
5049 | char *name = buf; | |
ec940faa | 5050 | const char *real_name; |
9878760c RK |
5051 | rtx base = x; |
5052 | int offset = 0; | |
5053 | ||
4697a36c MM |
5054 | if (TARGET_NO_TOC) |
5055 | abort (); | |
5056 | ||
ff1720ed RK |
5057 | /* if we're going to put a double constant in the TOC, make sure it's |
5058 | aligned properly when strict alignment is on. */ | |
5059 | if (GET_CODE (x) == CONST_DOUBLE | |
5060 | && STRICT_ALIGNMENT | |
5061 | && GET_MODE (x) == DFmode | |
5062 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
5063 | ASM_OUTPUT_ALIGN (file, 3); | |
5064 | } | |
5065 | ||
5066 | ||
b6c9286a | 5067 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
5068 | { |
5069 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
5070 | fprintf (file, "%d = .-", labelno); | |
5071 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 5072 | fputs ("1\n", file); |
d14a6d05 MM |
5073 | } |
5074 | else | |
d14a6d05 | 5075 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 5076 | |
37c37a57 RK |
5077 | /* Handle FP constants specially. Note that if we have a minimal |
5078 | TOC, things we put here aren't actually in the TOC, so we can allow | |
5079 | FP constants. */ | |
042259f2 | 5080 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 5081 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 5082 | { |
042259f2 DE |
5083 | REAL_VALUE_TYPE rv; |
5084 | long k[2]; | |
0adc764e | 5085 | |
042259f2 DE |
5086 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
5087 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
31bfaa0b | 5088 | |
13ded975 DE |
5089 | if (TARGET_64BIT) |
5090 | { | |
5091 | if (TARGET_MINIMAL_TOC) | |
5092 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
5093 | else | |
5094 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
5095 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
5096 | return; | |
5097 | } | |
1875cc88 | 5098 | else |
13ded975 DE |
5099 | { |
5100 | if (TARGET_MINIMAL_TOC) | |
31bfaa0b | 5101 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]); |
13ded975 | 5102 | else |
31bfaa0b | 5103 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
5104 | k[0], k[1], k[0], k[1]); |
5105 | return; | |
5106 | } | |
9878760c RK |
5107 | } |
5108 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 5109 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 5110 | { |
042259f2 DE |
5111 | REAL_VALUE_TYPE rv; |
5112 | long l; | |
9878760c | 5113 | |
042259f2 DE |
5114 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
5115 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
5116 | ||
31bfaa0b DE |
5117 | if (TARGET_64BIT) |
5118 | { | |
5119 | if (TARGET_MINIMAL_TOC) | |
5120 | fprintf (file, "\t.llong 0x%lx00000000\n", l); | |
5121 | else | |
5122 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l); | |
5123 | return; | |
5124 | } | |
042259f2 | 5125 | else |
31bfaa0b DE |
5126 | { |
5127 | if (TARGET_MINIMAL_TOC) | |
5128 | fprintf (file, "\t.long 0x%lx\n", l); | |
5129 | else | |
5130 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l); | |
5131 | return; | |
5132 | } | |
042259f2 DE |
5133 | } |
5134 | else if (GET_MODE (x) == DImode | |
5135 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
5136 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
5137 | { | |
5138 | HOST_WIDE_INT low; | |
5139 | HOST_WIDE_INT high; | |
5140 | ||
5141 | if (GET_CODE (x) == CONST_DOUBLE) | |
5142 | { | |
5143 | low = CONST_DOUBLE_LOW (x); | |
5144 | high = CONST_DOUBLE_HIGH (x); | |
5145 | } | |
5146 | else | |
5147 | #if HOST_BITS_PER_WIDE_INT == 32 | |
5148 | { | |
5149 | low = INTVAL (x); | |
5150 | high = (low < 0) ? ~0 : 0; | |
5151 | } | |
5152 | #else | |
5153 | { | |
5154 | low = INTVAL (x) & 0xffffffff; | |
5155 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
5156 | } | |
5157 | #endif | |
9878760c | 5158 | |
13ded975 DE |
5159 | if (TARGET_64BIT) |
5160 | { | |
5161 | if (TARGET_MINIMAL_TOC) | |
5162 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
5163 | else | |
5164 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
5165 | (long)high, (long)low, (long)high, (long)low); | |
5166 | return; | |
5167 | } | |
1875cc88 | 5168 | else |
13ded975 DE |
5169 | { |
5170 | if (TARGET_MINIMAL_TOC) | |
3cb999d8 | 5171 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", |
13ded975 DE |
5172 | (long)high, (long)low); |
5173 | else | |
3cb999d8 | 5174 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
5175 | (long)high, (long)low, (long)high, (long)low); |
5176 | return; | |
5177 | } | |
9878760c RK |
5178 | } |
5179 | ||
5180 | if (GET_CODE (x) == CONST) | |
5181 | { | |
5182 | base = XEXP (XEXP (x, 0), 0); | |
5183 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
5184 | } | |
5185 | ||
5186 | if (GET_CODE (base) == SYMBOL_REF) | |
5187 | name = XSTR (base, 0); | |
5188 | else if (GET_CODE (base) == LABEL_REF) | |
5189 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
5190 | else if (GET_CODE (base) == CODE_LABEL) | |
5191 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
5192 | else | |
5193 | abort (); | |
5194 | ||
2e4eb9b0 | 5195 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 5196 | if (TARGET_MINIMAL_TOC) |
13ded975 | 5197 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
5198 | else |
5199 | { | |
b6c9286a | 5200 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 5201 | |
1875cc88 JW |
5202 | if (offset < 0) |
5203 | fprintf (file, ".N%d", - offset); | |
5204 | else if (offset) | |
5205 | fprintf (file, ".P%d", offset); | |
9878760c | 5206 | |
19d2d16f | 5207 | fputs ("[TC],", file); |
1875cc88 | 5208 | } |
581bc4de MM |
5209 | |
5210 | /* Currently C++ toc references to vtables can be emitted before it | |
5211 | is decided whether the vtable is public or private. If this is | |
5212 | the case, then the linker will eventually complain that there is | |
5213 | a TOC reference to an unknown section. Thus, for vtables only, | |
5214 | we emit the TOC reference to reference the symbol and not the | |
5215 | section. */ | |
c81fc13e | 5216 | if (! strncmp ("_vt.", name, 4)) |
581bc4de | 5217 | { |
3807773b | 5218 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
5219 | if (offset < 0) |
5220 | fprintf (file, "%d", offset); | |
5221 | else if (offset > 0) | |
5222 | fprintf (file, "+%d", offset); | |
5223 | } | |
5224 | else | |
5225 | output_addr_const (file, x); | |
19d2d16f | 5226 | putc ('\n', file); |
9878760c RK |
5227 | } |
5228 | \f | |
5229 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
5230 | starting at P to FILE. | |
5231 | ||
5232 | On the RS/6000, we have to do this using the .byte operation and | |
5233 | write out special characters outside the quoted string. | |
5234 | Also, the assembler is broken; very long strings are truncated, | |
5235 | so we must artificially break them up early. */ | |
5236 | ||
5237 | void | |
5238 | output_ascii (file, p, n) | |
5239 | FILE *file; | |
d330fd93 | 5240 | const char *p; |
9878760c RK |
5241 | int n; |
5242 | { | |
5243 | char c; | |
5244 | int i, count_string; | |
d330fd93 KG |
5245 | const char *for_string = "\t.byte \""; |
5246 | const char *for_decimal = "\t.byte "; | |
5247 | const char *to_close = NULL; | |
9878760c RK |
5248 | |
5249 | count_string = 0; | |
5250 | for (i = 0; i < n; i++) | |
5251 | { | |
5252 | c = *p++; | |
5253 | if (c >= ' ' && c < 0177) | |
5254 | { | |
5255 | if (for_string) | |
5256 | fputs (for_string, file); | |
5257 | putc (c, file); | |
5258 | ||
5259 | /* Write two quotes to get one. */ | |
5260 | if (c == '"') | |
5261 | { | |
5262 | putc (c, file); | |
5263 | ++count_string; | |
5264 | } | |
5265 | ||
5266 | for_string = NULL; | |
5267 | for_decimal = "\"\n\t.byte "; | |
5268 | to_close = "\"\n"; | |
5269 | ++count_string; | |
5270 | ||
5271 | if (count_string >= 512) | |
5272 | { | |
5273 | fputs (to_close, file); | |
5274 | ||
5275 | for_string = "\t.byte \""; | |
5276 | for_decimal = "\t.byte "; | |
5277 | to_close = NULL; | |
5278 | count_string = 0; | |
5279 | } | |
5280 | } | |
5281 | else | |
5282 | { | |
5283 | if (for_decimal) | |
5284 | fputs (for_decimal, file); | |
5285 | fprintf (file, "%d", c); | |
5286 | ||
5287 | for_string = "\n\t.byte \""; | |
5288 | for_decimal = ", "; | |
5289 | to_close = "\n"; | |
5290 | count_string = 0; | |
5291 | } | |
5292 | } | |
5293 | ||
5294 | /* Now close the string if we have written one. Then end the line. */ | |
5295 | if (to_close) | |
5296 | fprintf (file, to_close); | |
5297 | } | |
5298 | \f | |
5299 | /* Generate a unique section name for FILENAME for a section type | |
5300 | represented by SECTION_DESC. Output goes into BUF. | |
5301 | ||
5302 | SECTION_DESC can be any string, as long as it is different for each | |
5303 | possible section type. | |
5304 | ||
5305 | We name the section in the same manner as xlc. The name begins with an | |
5306 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
5307 | names) with the last period replaced by the string SECTION_DESC. If |
5308 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
5309 | the name. */ | |
9878760c RK |
5310 | |
5311 | void | |
5312 | rs6000_gen_section_name (buf, filename, section_desc) | |
5313 | char **buf; | |
5314 | char *filename; | |
5315 | char *section_desc; | |
5316 | { | |
d330fd93 | 5317 | char *q, *after_last_slash, *last_period = 0; |
9878760c RK |
5318 | char *p; |
5319 | int len; | |
9878760c RK |
5320 | |
5321 | after_last_slash = filename; | |
5322 | for (q = filename; *q; q++) | |
11e5fe42 RK |
5323 | { |
5324 | if (*q == '/') | |
5325 | after_last_slash = q + 1; | |
5326 | else if (*q == '.') | |
5327 | last_period = q; | |
5328 | } | |
9878760c | 5329 | |
11e5fe42 | 5330 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
5331 | *buf = (char *) permalloc (len); |
5332 | ||
5333 | p = *buf; | |
5334 | *p++ = '_'; | |
5335 | ||
5336 | for (q = after_last_slash; *q; q++) | |
5337 | { | |
11e5fe42 | 5338 | if (q == last_period) |
9878760c RK |
5339 | { |
5340 | strcpy (p, section_desc); | |
5341 | p += strlen (section_desc); | |
9878760c RK |
5342 | } |
5343 | ||
e9a780ec | 5344 | else if (ISALNUM (*q)) |
9878760c RK |
5345 | *p++ = *q; |
5346 | } | |
5347 | ||
11e5fe42 | 5348 | if (last_period == 0) |
9878760c RK |
5349 | strcpy (p, section_desc); |
5350 | else | |
5351 | *p = '\0'; | |
5352 | } | |
e165f3f0 RK |
5353 | \f |
5354 | /* Write function profiler code. */ | |
5355 | ||
5356 | void | |
5357 | output_function_profiler (file, labelno) | |
5358 | FILE *file; | |
5359 | int labelno; | |
5360 | { | |
5361 | /* The last used parameter register. */ | |
5362 | int last_parm_reg; | |
5363 | int i, j; | |
3daf36a4 | 5364 | char buf[100]; |
e165f3f0 | 5365 | |
3daf36a4 | 5366 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 5367 | switch (DEFAULT_ABI) |
3daf36a4 | 5368 | { |
38c1f2d7 MM |
5369 | default: |
5370 | abort (); | |
5371 | ||
5372 | case ABI_V4: | |
5373 | case ABI_SOLARIS: | |
5374 | case ABI_AIX_NODESC: | |
5375 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
5376 | if (flag_pic == 1) | |
5377 | { | |
dfdfa60f DE |
5378 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
5379 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
5380 | reg_names[0], reg_names[1]); | |
17167fd8 | 5381 | asm_fprintf (file, "\tmflr %s\n", reg_names[12]); |
dfdfa60f | 5382 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); |
38c1f2d7 | 5383 | assemble_name (file, buf); |
17167fd8 | 5384 | asm_fprintf (file, "@got(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5385 | } |
5386 | #if TARGET_ELF | |
5387 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
5388 | { | |
dfdfa60f DE |
5389 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5390 | reg_names[0], reg_names[1]); | |
38c1f2d7 | 5391 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
17167fd8 MM |
5392 | rs6000_output_load_toc_table (file, 12); |
5393 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); | |
38c1f2d7 | 5394 | assemble_name (file, buf); |
17167fd8 | 5395 | asm_fprintf (file, "X(%s)\n", reg_names[12]); |
dfdfa60f | 5396 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
034e84c4 | 5397 | assemble_name (file, buf); |
dfdfa60f DE |
5398 | fputs ("X = .-.LCTOC1\n", file); |
5399 | fputs ("\t.long ", file); | |
034e84c4 MM |
5400 | assemble_name (file, buf); |
5401 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
5402 | } |
5403 | #endif | |
38c1f2d7 MM |
5404 | else |
5405 | { | |
17167fd8 | 5406 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); |
38c1f2d7 | 5407 | assemble_name (file, buf); |
dfdfa60f | 5408 | fputs ("@ha\n", file); |
b5253831 DE |
5409 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5410 | reg_names[0], reg_names[1]); | |
a260abc9 | 5411 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); |
38c1f2d7 | 5412 | assemble_name (file, buf); |
17167fd8 | 5413 | asm_fprintf (file, "@l(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5414 | } |
5415 | ||
b5253831 DE |
5416 | if (current_function_needs_context) |
5417 | asm_fprintf (file, "\tmr %s,%s\n", | |
5418 | reg_names[30], reg_names[STATIC_CHAIN_REGNUM]); | |
38c1f2d7 | 5419 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); |
b5253831 DE |
5420 | if (current_function_needs_context) |
5421 | asm_fprintf (file, "\tmr %s,%s\n", | |
5422 | reg_names[STATIC_CHAIN_REGNUM], reg_names[30]); | |
38c1f2d7 MM |
5423 | break; |
5424 | ||
5425 | case ABI_AIX: | |
5426 | /* Set up a TOC entry for the profiler label. */ | |
5427 | toc_section (); | |
5428 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
5429 | if (TARGET_MINIMAL_TOC) | |
5430 | { | |
13ded975 | 5431 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
5432 | assemble_name (file, buf); |
5433 | putc ('\n', file); | |
5434 | } | |
5435 | else | |
5436 | { | |
5437 | fputs ("\t.tc\t", file); | |
5438 | assemble_name (file, buf); | |
5439 | fputs ("[TC],", file); | |
5440 | assemble_name (file, buf); | |
5441 | putc ('\n', file); | |
5442 | } | |
5443 | text_section (); | |
e165f3f0 RK |
5444 | |
5445 | /* Figure out last used parameter register. The proper thing to do is | |
5446 | to walk incoming args of the function. A function might have live | |
5447 | parameter registers even if it has no incoming args. */ | |
5448 | ||
38c1f2d7 MM |
5449 | for (last_parm_reg = 10; |
5450 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
5451 | last_parm_reg--) | |
5452 | ; | |
e165f3f0 | 5453 | |
b5253831 DE |
5454 | /* Save parameter registers in regs 23-30 and static chain in r22. |
5455 | Don't overwrite reg 31, since it might be set up as the frame pointer. */ | |
e165f3f0 | 5456 | |
38c1f2d7 MM |
5457 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5458 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
b5253831 DE |
5459 | if (current_function_needs_context) |
5460 | asm_fprintf (file, "\tmr %d,%d\n", j, STATIC_CHAIN_REGNUM); | |
e165f3f0 RK |
5461 | |
5462 | /* Load location address into r3, and call mcount. */ | |
5463 | ||
38c1f2d7 | 5464 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
5465 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
5466 | reg_names[3]); | |
38c1f2d7 | 5467 | assemble_name (file, buf); |
13f1623b DE |
5468 | asm_fprintf (file, "(%s)\n\tbl %s\n\t", reg_names[2], RS6000_MCOUNT); |
5469 | asm_fprintf (file, RS6000_CALL_GLUE); | |
5470 | putc('\n', file); | |
e165f3f0 | 5471 | |
b5253831 | 5472 | /* Restore parameter registers and static chain. */ |
e165f3f0 | 5473 | |
38c1f2d7 MM |
5474 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5475 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
b5253831 DE |
5476 | if (current_function_needs_context) |
5477 | asm_fprintf (file, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM, j); | |
5478 | ||
38c1f2d7 MM |
5479 | break; |
5480 | } | |
e165f3f0 | 5481 | } |
a251ffd0 TG |
5482 | |
5483 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
5484 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
5485 | ||
5486 | int | |
a06faf84 | 5487 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
5488 | rtx insn; |
5489 | rtx link; | |
296b8152 | 5490 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
5491 | int cost; |
5492 | { | |
5493 | if (! recog_memoized (insn)) | |
5494 | return 0; | |
5495 | ||
5496 | if (REG_NOTE_KIND (link) != 0) | |
5497 | return 0; | |
5498 | ||
5499 | if (REG_NOTE_KIND (link) == 0) | |
5500 | { | |
5501 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
5502 | cycles later. */ | |
5503 | ||
5504 | /* Tell the first scheduling pass about the latency between a mtctr | |
5505 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
5506 | know about this latency since the mtctr instruction, which has the | |
5507 | latency associated to it, will be generated by reload. */ | |
5508 | if (get_attr_type (insn) == TYPE_JMPREG) | |
5509 | return TARGET_POWER ? 5 : 4; | |
5510 | ||
5511 | /* Fall out to return default cost. */ | |
5512 | } | |
5513 | ||
5514 | return cost; | |
5515 | } | |
b6c9286a | 5516 | |
bef84347 VM |
5517 | /* A C statement (sans semicolon) to update the integer scheduling priority |
5518 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
5519 | increase the priority to execute INSN later. Do not define this macro if | |
5520 | you do not need to adjust the scheduling priorities of insns. */ | |
5521 | ||
5522 | int | |
5523 | rs6000_adjust_priority (insn, priority) | |
d330fd93 | 5524 | rtx insn ATTRIBUTE_UNUSED; |
bef84347 VM |
5525 | int priority; |
5526 | { | |
5527 | /* On machines (like the 750) which have asymetric integer units, where one | |
5528 | integer unit can do multiply and divides and the other can't, reduce the | |
5529 | priority of multiply/divide so it is scheduled before other integer | |
5530 | operationss. */ | |
5531 | ||
5532 | #if 0 | |
5533 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
5534 | return priority; | |
5535 | ||
5536 | if (GET_CODE (PATTERN (insn)) == USE) | |
5537 | return priority; | |
5538 | ||
5539 | switch (rs6000_cpu_attr) { | |
5540 | case CPU_PPC750: | |
5541 | switch (get_attr_type (insn)) | |
5542 | { | |
5543 | default: | |
5544 | break; | |
5545 | ||
5546 | case TYPE_IMUL: | |
5547 | case TYPE_IDIV: | |
3cb999d8 DE |
5548 | fprintf (stderr, "priority was %#x (%d) before adjustment\n", |
5549 | priority, priority); | |
bef84347 VM |
5550 | if (priority >= 0 && priority < 0x01000000) |
5551 | priority >>= 3; | |
5552 | break; | |
5553 | } | |
5554 | } | |
5555 | #endif | |
5556 | ||
5557 | return priority; | |
5558 | } | |
5559 | ||
b6c9286a MM |
5560 | /* Return how many instructions the machine can issue per cycle */ |
5561 | int get_issue_rate() | |
5562 | { | |
5563 | switch (rs6000_cpu_attr) { | |
3cb999d8 DE |
5564 | case CPU_RIOS1: /* ? */ |
5565 | case CPU_RS64A: | |
5566 | case CPU_PPC601: /* ? */ | |
5567 | return 3; | |
b6c9286a | 5568 | case CPU_PPC603: |
bef84347 VM |
5569 | case CPU_PPC750: |
5570 | return 2; | |
3cb999d8 | 5571 | case CPU_RIOS2: |
b6c9286a | 5572 | case CPU_PPC604: |
19684119 | 5573 | case CPU_PPC604E: |
b6c9286a | 5574 | case CPU_PPC620: |
3cb999d8 | 5575 | case CPU_PPC630: |
b6c9286a MM |
5576 | return 4; |
5577 | default: | |
5578 | return 1; | |
5579 | } | |
5580 | } | |
5581 | ||
b6c9286a MM |
5582 | \f |
5583 | /* Output assembler code for a block containing the constant parts | |
5584 | of a trampoline, leaving space for the variable parts. | |
5585 | ||
5586 | The trampoline should set the static chain pointer to value placed | |
5587 | into the trampoline and should branch to the specified routine. */ | |
5588 | ||
5589 | void | |
5590 | rs6000_trampoline_template (file) | |
5591 | FILE *file; | |
5592 | { | |
d330fd93 KG |
5593 | const char *sc = reg_names[STATIC_CHAIN_REGNUM]; |
5594 | const char *r0 = reg_names[0]; | |
5595 | const char *r2 = reg_names[2]; | |
b6c9286a MM |
5596 | |
5597 | switch (DEFAULT_ABI) | |
5598 | { | |
5599 | default: | |
5600 | abort (); | |
5601 | ||
5602 | /* Under AIX, this is not code at all, but merely a data area, | |
5603 | since that is the way all functions are called. The first word is | |
5604 | the address of the function, the second word is the TOC pointer (r2), | |
5605 | and the third word is the static chain value. */ | |
5606 | case ABI_AIX: | |
b6c9286a MM |
5607 | break; |
5608 | ||
5609 | ||
5610 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
5611 | do the full gory code to load up the static chain. */ | |
5612 | case ABI_V4: | |
c81bebd7 | 5613 | case ABI_SOLARIS: |
b6c9286a | 5614 | case ABI_AIX_NODESC: |
b6c9286a MM |
5615 | break; |
5616 | ||
5617 | /* NT function pointers point to a two word area (real address, TOC) | |
5618 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
5619 | use the function field to point to ..LTRAMP1 and the toc field |
5620 | to point to the whole table. */ | |
b6c9286a | 5621 | case ABI_NT: |
7c59dc5d MM |
5622 | if (STATIC_CHAIN_REGNUM == 0 |
5623 | || STATIC_CHAIN_REGNUM == 2 | |
5624 | || TARGET_64BIT | |
5625 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
5626 | abort (); |
5627 | ||
7c59dc5d MM |
5628 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
5629 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
5630 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
5631 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
5632 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 5633 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
5634 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
5635 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
5636 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
5637 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
5638 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
5639 | break; |
5640 | } | |
5641 | ||
5642 | return; | |
5643 | } | |
5644 | ||
5645 | /* Length in units of the trampoline for entering a nested function. */ | |
5646 | ||
5647 | int | |
5648 | rs6000_trampoline_size () | |
5649 | { | |
5650 | int ret = 0; | |
5651 | ||
5652 | switch (DEFAULT_ABI) | |
5653 | { | |
5654 | default: | |
5655 | abort (); | |
5656 | ||
5657 | case ABI_AIX: | |
8f802bfb | 5658 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
5659 | break; |
5660 | ||
5661 | case ABI_V4: | |
c81bebd7 | 5662 | case ABI_SOLARIS: |
b6c9286a | 5663 | case ABI_AIX_NODESC: |
03a7e1a5 | 5664 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
5665 | break; |
5666 | ||
5667 | case ABI_NT: | |
7c59dc5d | 5668 | ret = 20; |
b6c9286a MM |
5669 | break; |
5670 | } | |
5671 | ||
5672 | return ret; | |
5673 | } | |
5674 | ||
5675 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
5676 | FNADDR is an RTX for the address of the function's pure code. | |
5677 | CXT is an RTX for the static chain value for the function. */ | |
5678 | ||
5679 | void | |
5680 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
5681 | rtx addr; | |
5682 | rtx fnaddr; | |
5683 | rtx cxt; | |
5684 | { | |
ac2a93a1 | 5685 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
5686 | int regsize = (TARGET_32BIT) ? 4 : 8; |
5687 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
5688 | |
5689 | switch (DEFAULT_ABI) | |
5690 | { | |
5691 | default: | |
5692 | abort (); | |
5693 | ||
8bd04c56 | 5694 | /* Macros to shorten the code expansions below. */ |
39403d82 | 5695 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
c5c76735 JL |
5696 | #define MEM_PLUS(addr,offset) \ |
5697 | gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 5698 | |
b6c9286a MM |
5699 | /* Under AIX, just build the 3 word function descriptor */ |
5700 | case ABI_AIX: | |
8bd04c56 MM |
5701 | { |
5702 | rtx fn_reg = gen_reg_rtx (pmode); | |
5703 | rtx toc_reg = gen_reg_rtx (pmode); | |
5704 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5705 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
5706 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
5707 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
5708 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
5709 | } | |
b6c9286a MM |
5710 | break; |
5711 | ||
eaf1bcf1 | 5712 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 5713 | case ABI_V4: |
c81bebd7 | 5714 | case ABI_SOLARIS: |
b6c9286a | 5715 | case ABI_AIX_NODESC: |
39403d82 | 5716 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
5717 | FALSE, VOIDmode, 4, |
5718 | addr, pmode, | |
5719 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5720 | fnaddr, pmode, | |
5721 | ctx_reg, pmode); | |
b6c9286a MM |
5722 | break; |
5723 | ||
8bd04c56 MM |
5724 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5725 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5726 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5727 | case ABI_NT: |
8bd04c56 MM |
5728 | { |
5729 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5730 | rtx fn_reg = gen_reg_rtx (pmode); | |
5731 | rtx toc_reg = gen_reg_rtx (pmode); | |
5732 | ||
39403d82 | 5733 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5734 | addr = force_reg (pmode, addr); |
5735 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5736 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5737 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5738 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5739 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5740 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5741 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5742 | } |
b6c9286a MM |
5743 | break; |
5744 | } | |
5745 | ||
5746 | return; | |
5747 | } | |
7509c759 MM |
5748 | |
5749 | \f | |
5750 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5751 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5752 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5753 | ||
5754 | int | |
5755 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5756 | tree decl ATTRIBUTE_UNUSED; |
5757 | tree attributes ATTRIBUTE_UNUSED; | |
5758 | tree identifier ATTRIBUTE_UNUSED; | |
5759 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5760 | { |
5761 | return 0; | |
5762 | } | |
5763 | ||
5764 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5765 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5766 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5767 | ||
5768 | int | |
5769 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5770 | tree type; | |
296b8152 | 5771 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5772 | tree identifier; |
5773 | tree args; | |
5774 | { | |
5775 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5776 | && TREE_CODE (type) != FIELD_DECL | |
5777 | && TREE_CODE (type) != TYPE_DECL) | |
5778 | return 0; | |
5779 | ||
6a4cee5f MM |
5780 | /* Longcall attribute says that the function is not within 2**26 bytes |
5781 | of the current function, and to do an indirect call. */ | |
5782 | if (is_attribute_p ("longcall", identifier)) | |
5783 | return (args == NULL_TREE); | |
5784 | ||
7509c759 MM |
5785 | if (DEFAULT_ABI == ABI_NT) |
5786 | { | |
5787 | /* Stdcall attribute says callee is responsible for popping arguments | |
5788 | if they are not variable. */ | |
5789 | if (is_attribute_p ("stdcall", identifier)) | |
5790 | return (args == NULL_TREE); | |
5791 | ||
5792 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5793 | if (is_attribute_p ("cdecl", identifier)) | |
5794 | return (args == NULL_TREE); | |
5795 | ||
38e01259 | 5796 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5797 | indirectly through a __imp_<name> pointer. */ |
5798 | if (is_attribute_p ("dllimport", identifier)) | |
5799 | return (args == NULL_TREE); | |
5800 | ||
38e01259 | 5801 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5802 | pointer. */ |
5803 | if (is_attribute_p ("dllexport", identifier)) | |
5804 | return (args == NULL_TREE); | |
e56bb9ed | 5805 | |
3cb999d8 DE |
5806 | /* Exception attribute allows the user to specify 1-2 strings |
5807 | or identifiers that will fill in the 3rd and 4th fields | |
5808 | of the structured exception table. */ | |
e56bb9ed MM |
5809 | if (is_attribute_p ("exception", identifier)) |
5810 | { | |
5811 | int i; | |
5812 | ||
5813 | if (args == NULL_TREE) | |
5814 | return 0; | |
5815 | ||
5816 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5817 | { | |
5818 | tree this_arg = TREE_VALUE (args); | |
5819 | args = TREE_PURPOSE (args); | |
5820 | ||
5821 | if (TREE_CODE (this_arg) != STRING_CST | |
5822 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5823 | return 0; | |
5824 | } | |
5825 | ||
5826 | return (args == NULL_TREE); | |
5827 | } | |
7509c759 MM |
5828 | } |
5829 | ||
5830 | return 0; | |
5831 | } | |
5832 | ||
5833 | /* If defined, a C expression whose value is zero if the attributes on | |
5834 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5835 | two if they are nearly compatible (which causes a warning to be | |
5836 | generated). */ | |
5837 | ||
5838 | int | |
5839 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5840 | tree type1 ATTRIBUTE_UNUSED; |
5841 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5842 | { |
5843 | return 1; | |
5844 | } | |
5845 | ||
5846 | /* If defined, a C statement that assigns default attributes to newly | |
5847 | defined TYPE. */ | |
5848 | ||
5849 | void | |
5850 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5851 | tree type ATTRIBUTE_UNUSED; |
7509c759 | 5852 | { |
3cb999d8 | 5853 | return; |
7509c759 MM |
5854 | } |
5855 | ||
38e01259 | 5856 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5857 | struct rtx_def * |
5858 | rs6000_dll_import_ref (call_ref) | |
5859 | rtx call_ref; | |
5860 | { | |
d330fd93 | 5861 | const char *call_name; |
7509c759 MM |
5862 | int len; |
5863 | char *p; | |
5864 | rtx reg1, reg2; | |
5865 | tree node; | |
5866 | ||
5867 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5868 | abort (); | |
5869 | ||
5870 | call_name = XSTR (call_ref, 0); | |
5871 | len = sizeof ("__imp_") + strlen (call_name); | |
5872 | p = alloca (len); | |
5873 | reg2 = gen_reg_rtx (Pmode); | |
5874 | ||
5875 | strcpy (p, "__imp_"); | |
5876 | strcat (p, call_name); | |
5877 | node = get_identifier (p); | |
5878 | ||
3cb999d8 DE |
5879 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, |
5880 | IDENTIFIER_POINTER (node))); | |
39403d82 | 5881 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); |
7509c759 MM |
5882 | |
5883 | return reg2; | |
5884 | } | |
5885 | ||
3cb999d8 DE |
5886 | /* Return a reference suitable for calling a function with the |
5887 | longcall attribute. */ | |
6a4cee5f MM |
5888 | struct rtx_def * |
5889 | rs6000_longcall_ref (call_ref) | |
5890 | rtx call_ref; | |
5891 | { | |
d330fd93 | 5892 | const char *call_name; |
6a4cee5f MM |
5893 | tree node; |
5894 | ||
5895 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5896 | return call_ref; | |
5897 | ||
5898 | /* System V adds '.' to the internal name, so skip them. */ | |
5899 | call_name = XSTR (call_ref, 0); | |
5900 | if (*call_name == '.') | |
5901 | { | |
5902 | while (*call_name == '.') | |
5903 | call_name++; | |
5904 | ||
5905 | node = get_identifier (call_name); | |
39403d82 | 5906 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5907 | } |
5908 | ||
5909 | return force_reg (Pmode, call_ref); | |
5910 | } | |
5911 | ||
7509c759 MM |
5912 | \f |
5913 | /* A C statement or statements to switch to the appropriate section | |
5914 | for output of RTX in mode MODE. You can assume that RTX is some | |
5915 | kind of constant in RTL. The argument MODE is redundant except in | |
5916 | the case of a `const_int' rtx. Select the section by calling | |
5917 | `text_section' or one of the alternatives for other sections. | |
5918 | ||
5919 | Do not define this macro if you put all constants in the read-only | |
5920 | data section. */ | |
5921 | ||
5922 | #ifdef USING_SVR4_H | |
5923 | ||
5924 | void | |
5925 | rs6000_select_rtx_section (mode, x) | |
5f59ecb7 | 5926 | enum machine_mode mode ATTRIBUTE_UNUSED; |
7509c759 MM |
5927 | rtx x; |
5928 | { | |
5929 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5930 | toc_section (); | |
7509c759 MM |
5931 | else |
5932 | const_section (); | |
5933 | } | |
5934 | ||
5935 | /* A C statement or statements to switch to the appropriate | |
5936 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5937 | or a constant of some sort. RELOC indicates whether forming | |
5938 | the initial value of DECL requires link-time relocations. */ | |
5939 | ||
5940 | void | |
5941 | rs6000_select_section (decl, reloc) | |
5942 | tree decl; | |
5943 | int reloc; | |
5944 | { | |
5945 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5946 | ||
5947 | if (TREE_CODE (decl) == STRING_CST) | |
5948 | { | |
88228c4b | 5949 | if (! flag_writable_strings) |
7509c759 | 5950 | const_section (); |
7509c759 MM |
5951 | else |
5952 | data_section (); | |
5953 | } | |
5954 | else if (TREE_CODE (decl) == VAR_DECL) | |
5955 | { | |
5956 | if ((flag_pic && reloc) | |
3cb999d8 | 5957 | || ! TREE_READONLY (decl) |
7509c759 | 5958 | || TREE_SIDE_EFFECTS (decl) |
3cb999d8 | 5959 | || ! DECL_INITIAL (decl) |
7509c759 | 5960 | || (DECL_INITIAL (decl) != error_mark_node |
3cb999d8 | 5961 | && ! TREE_CONSTANT (DECL_INITIAL (decl)))) |
7509c759 | 5962 | { |
3cb999d8 DE |
5963 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5964 | && (size <= g_switch_value)) | |
7509c759 MM |
5965 | sdata_section (); |
5966 | else | |
5967 | data_section (); | |
5968 | } | |
5969 | else | |
5970 | { | |
3cb999d8 DE |
5971 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5972 | && (size <= g_switch_value)) | |
c81bebd7 | 5973 | { |
d9407988 | 5974 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5975 | sdata2_section (); |
5976 | else | |
3cb999d8 | 5977 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ |
c81bebd7 | 5978 | } |
7509c759 MM |
5979 | else |
5980 | const_section (); | |
5981 | } | |
5982 | } | |
5983 | else | |
5984 | const_section (); | |
5985 | } | |
d9407988 MM |
5986 | |
5987 | \f | |
d9407988 MM |
5988 | /* If we are referencing a function that is static or is known to be |
5989 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5990 | that we can branch to this function without emitting a no-op after the | |
5991 | call. For real AIX and NT calling sequences, we also replace the | |
5992 | function name with the real name (1 or 2 leading .'s), rather than | |
5993 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5994 | to read the prefixes. */ |
d9407988 MM |
5995 | |
5996 | void | |
5997 | rs6000_encode_section_info (decl) | |
5998 | tree decl; | |
5999 | { | |
6000 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
6001 | { | |
6002 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
8f1b829e | 6003 | if ((TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) |
c81fc13e | 6004 | && ! DECL_WEAK (decl)) |
d9407988 MM |
6005 | SYMBOL_REF_FLAG (sym_ref) = 1; |
6006 | ||
6007 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
6008 | { | |
ff669a6c RH |
6009 | size_t len1 = (DEFAULT_ABI == ABI_AIX) ? 1 : 2; |
6010 | size_t len2 = strlen (XSTR (sym_ref, 0)); | |
6011 | char *str; | |
6012 | ||
6013 | if (ggc_p) | |
6014 | str = ggc_alloc_string (NULL, len1 + len2); | |
6015 | else | |
6016 | str = permalloc (len1 + len2 + 1); | |
6017 | ||
6018 | str[0] = '.'; | |
6019 | str[1] = '.'; | |
6020 | memcpy (str + len1, XSTR (sym_ref, 0), len2 + 1); | |
6021 | ||
d9407988 MM |
6022 | XSTR (sym_ref, 0) = str; |
6023 | } | |
6024 | } | |
6025 | else if (rs6000_sdata != SDATA_NONE | |
6026 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
6027 | && TREE_CODE (decl) == VAR_DECL) | |
6028 | { | |
6029 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
6030 | tree section_name = DECL_SECTION_NAME (decl); | |
d330fd93 | 6031 | const char *name = (char *)0; |
d9407988 MM |
6032 | int len = 0; |
6033 | ||
6034 | if (section_name) | |
6035 | { | |
6036 | if (TREE_CODE (section_name) == STRING_CST) | |
6037 | { | |
6038 | name = TREE_STRING_POINTER (section_name); | |
6039 | len = TREE_STRING_LENGTH (section_name); | |
6040 | } | |
6041 | else | |
6042 | abort (); | |
6043 | } | |
6044 | ||
6045 | if ((size > 0 && size <= g_switch_value) | |
6046 | || (name | |
5f59ecb7 | 6047 | && ((len == sizeof (".sdata") - 1 |
3cb999d8 | 6048 | && strcmp (name, ".sdata") == 0) |
5f59ecb7 | 6049 | || (len == sizeof (".sdata2") - 1 |
3cb999d8 | 6050 | && strcmp (name, ".sdata2") == 0) |
5f59ecb7 | 6051 | || (len == sizeof (".sbss") - 1 |
3cb999d8 | 6052 | && strcmp (name, ".sbss") == 0) |
5f59ecb7 | 6053 | || (len == sizeof (".sbss2") - 1 |
3cb999d8 | 6054 | && strcmp (name, ".sbss2") == 0) |
5f59ecb7 | 6055 | || (len == sizeof (".PPC.EMB.sdata0") - 1 |
3cb999d8 | 6056 | && strcmp (name, ".PPC.EMB.sdata0") == 0) |
5f59ecb7 | 6057 | || (len == sizeof (".PPC.EMB.sbss0") - 1 |
3cb999d8 | 6058 | && strcmp (name, ".PPC.EMB.sbss0") == 0)))) |
d9407988 MM |
6059 | { |
6060 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
ff669a6c RH |
6061 | size_t len = strlen (XSTR (sym_ref, 0)); |
6062 | char *str; | |
6063 | ||
6064 | if (ggc_p) | |
6065 | str = ggc_alloc_string (NULL, len + 1); | |
6066 | else | |
6067 | str = permalloc (len + 2); | |
6068 | str[0] = '@'; | |
6069 | memcpy (str + 1, XSTR (sym_ref, 0), len + 1); | |
6070 | ||
d9407988 MM |
6071 | XSTR (sym_ref, 0) = str; |
6072 | } | |
6073 | } | |
6074 | } | |
6075 | ||
7509c759 | 6076 | #endif /* USING_SVR4_H */ |
000034eb | 6077 | |
a6c2a102 | 6078 | \f |
000034eb | 6079 | /* Return a REG that occurs in ADDR with coefficient 1. |
02441cd6 JL |
6080 | ADDR can be effectively incremented by incrementing REG. |
6081 | ||
6082 | r0 is special and we must not select it as an address | |
6083 | register by this routine since our caller will try to | |
6084 | increment the returned register via an "la" instruction. */ | |
000034eb DE |
6085 | |
6086 | struct rtx_def * | |
6087 | find_addr_reg (addr) | |
6088 | rtx addr; | |
6089 | { | |
6090 | while (GET_CODE (addr) == PLUS) | |
6091 | { | |
02441cd6 JL |
6092 | if (GET_CODE (XEXP (addr, 0)) == REG |
6093 | && REGNO (XEXP (addr, 0)) != 0) | |
000034eb | 6094 | addr = XEXP (addr, 0); |
02441cd6 JL |
6095 | else if (GET_CODE (XEXP (addr, 1)) == REG |
6096 | && REGNO (XEXP (addr, 1)) != 0) | |
000034eb DE |
6097 | addr = XEXP (addr, 1); |
6098 | else if (CONSTANT_P (XEXP (addr, 0))) | |
6099 | addr = XEXP (addr, 1); | |
6100 | else if (CONSTANT_P (XEXP (addr, 1))) | |
6101 | addr = XEXP (addr, 0); | |
6102 | else | |
6103 | abort (); | |
6104 | } | |
02441cd6 | 6105 | if (GET_CODE (addr) == REG && REGNO (addr) != 0) |
000034eb DE |
6106 | return addr; |
6107 | abort (); | |
6108 | } | |
6109 | ||
a6c2a102 DE |
6110 | void |
6111 | rs6000_fatal_bad_address (op) | |
6112 | rtx op; | |
6113 | { | |
6114 | fatal_insn ("bad address", op); | |
6115 | } | |
c8023011 MM |
6116 | |
6117 | /* Called to register all of our global variables with the garbage | |
6118 | collector. */ | |
6119 | ||
6120 | static void | |
6121 | rs6000_add_gc_roots () | |
6122 | { | |
6123 | ggc_add_rtx_root (&rs6000_compare_op0, 1); | |
6124 | ggc_add_rtx_root (&rs6000_compare_op1, 1); | |
6125 | } |