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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
34f94b1f | 2 | Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 | 36 | #include "tree.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
815cdc52 MM |
57 | /* switch name, tune arch */ |
58 | { (const char *)0, "--with-cpu=", 1, 1 }, | |
59 | { (const char *)0, "-mcpu=", 1, 1 }, | |
60 | { (const char *)0, "-mtune=", 1, 0 }, | |
8e3f41e7 | 61 | }; |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
815cdc52 | 87 | const char *rs6000_abi_name = RS6000_ABI_NAME; |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
815cdc52 | 93 | const char *rs6000_sdata_name = (char *)0; |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 | 107 | /* Debug flags */ |
815cdc52 | 108 | const char *rs6000_debug_name; |
38c1f2d7 MM |
109 | int rs6000_debug_stack; /* debug stack applications */ |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c81bebd7 MM |
115 | \f |
116 | /* Default register names. */ | |
117 | char rs6000_reg_names[][8] = | |
118 | { | |
802a0058 MM |
119 | "0", "1", "2", "3", "4", "5", "6", "7", |
120 | "8", "9", "10", "11", "12", "13", "14", "15", | |
121 | "16", "17", "18", "19", "20", "21", "22", "23", | |
122 | "24", "25", "26", "27", "28", "29", "30", "31", | |
123 | "0", "1", "2", "3", "4", "5", "6", "7", | |
124 | "8", "9", "10", "11", "12", "13", "14", "15", | |
125 | "16", "17", "18", "19", "20", "21", "22", "23", | |
126 | "24", "25", "26", "27", "28", "29", "30", "31", | |
127 | "mq", "lr", "ctr","ap", | |
128 | "0", "1", "2", "3", "4", "5", "6", "7", | |
129 | "fpmem" | |
c81bebd7 MM |
130 | }; |
131 | ||
132 | #ifdef TARGET_REGNAMES | |
133 | static char alt_reg_names[][8] = | |
134 | { | |
802a0058 MM |
135 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
136 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
137 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
138 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
139 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
140 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
141 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
142 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
143 | "mq", "lr", "ctr", "ap", | |
144 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
145 | "fpmem" | |
c81bebd7 MM |
146 | }; |
147 | #endif | |
9878760c | 148 | \f |
daf11973 MM |
149 | #ifndef MASK_STRICT_ALIGN |
150 | #define MASK_STRICT_ALIGN 0 | |
151 | #endif | |
152 | ||
5248c961 RK |
153 | /* Override command line options. Mostly we process the processor |
154 | type and sometimes adjust other TARGET_ options. */ | |
155 | ||
156 | void | |
8e3f41e7 | 157 | rs6000_override_options (default_cpu) |
d330fd93 | 158 | const char *default_cpu; |
5248c961 | 159 | { |
c4d38ccb | 160 | size_t i, j; |
8e3f41e7 | 161 | struct rs6000_cpu_select *ptr; |
5248c961 | 162 | |
85638c0d RK |
163 | /* Simplify the entries below by making a mask for any POWER |
164 | variant and any PowerPC variant. */ | |
165 | ||
938937d8 | 166 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
167 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
168 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
169 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 170 | |
5248c961 RK |
171 | static struct ptt |
172 | { | |
d330fd93 | 173 | const char *name; /* Canonical processor name. */ |
5248c961 RK |
174 | enum processor_type processor; /* Processor type enum value. */ |
175 | int target_enable; /* Target flags to enable. */ | |
176 | int target_disable; /* Target flags to disable. */ | |
177 | } processor_target_table[] | |
cf27b467 MM |
178 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
179 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 180 | {"power", PROCESSOR_POWER, |
938937d8 | 181 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 182 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
183 | {"power2", PROCESSOR_POWER, |
184 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
185 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
186 | {"powerpc", PROCESSOR_POWERPC, |
187 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 188 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
3cb999d8 DE |
189 | {"powerpc64", PROCESSOR_POWERPC64, |
190 | MASK_POWERPC | MASK_POWERPC64 | MASK_NEW_MNEMONICS, | |
191 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
db7f1e43 | 192 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 193 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
194 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
195 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 196 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
197 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
198 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 199 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
200 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
201 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 202 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
203 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
204 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 205 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 206 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
3cb999d8 DE |
207 | {"rs64a", PROCESSOR_RS64A, |
208 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
209 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
a3a1dbf6 MM |
210 | {"401", PROCESSOR_PPC403, |
211 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
212 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 213 | {"403", PROCESSOR_PPC403, |
daf11973 | 214 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 215 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
216 | {"505", PROCESSOR_MPCCORE, |
217 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
218 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 219 | {"601", PROCESSOR_PPC601, |
938937d8 | 220 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 221 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 222 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
223 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
224 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 225 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
226 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
227 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
228 | {"603e", PROCESSOR_PPC603, |
229 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
230 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 231 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
232 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
233 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 234 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
235 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
236 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
cac8ce95 | 237 | {"604e", PROCESSOR_PPC604e, |
07e6159a MM |
238 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
239 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 240 | {"620", PROCESSOR_PPC620, |
68c49ffa | 241 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 242 | POWER_MASKS | MASK_PPC_GPOPT}, |
3cb999d8 DE |
243 | {"630", PROCESSOR_PPC630, |
244 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
245 | POWER_MASKS | MASK_PPC_GPOPT}, | |
bef84347 VM |
246 | {"740", PROCESSOR_PPC750, |
247 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
248 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
249 | {"750", PROCESSOR_PPC750, | |
250 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
251 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
252 | {"801", PROCESSOR_MPCCORE, |
253 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
254 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
255 | {"821", PROCESSOR_MPCCORE, |
256 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
257 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
258 | {"823", PROCESSOR_MPCCORE, |
259 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
260 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
261 | {"860", PROCESSOR_MPCCORE, |
262 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
263 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 264 | |
c4d38ccb | 265 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 266 | |
8a61d227 | 267 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 268 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 269 | |
5248c961 RK |
270 | profile_block_flag = 0; |
271 | ||
272 | /* Identify the processor type */ | |
8e3f41e7 | 273 | rs6000_select[0].string = default_cpu; |
3cb999d8 | 274 | rs6000_cpu = TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT; |
8e3f41e7 MM |
275 | |
276 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 277 | { |
8e3f41e7 MM |
278 | ptr = &rs6000_select[i]; |
279 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 280 | { |
8e3f41e7 MM |
281 | for (j = 0; j < ptt_size; j++) |
282 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
283 | { | |
284 | if (ptr->set_tune_p) | |
285 | rs6000_cpu = processor_target_table[j].processor; | |
286 | ||
287 | if (ptr->set_arch_p) | |
288 | { | |
289 | target_flags |= processor_target_table[j].target_enable; | |
290 | target_flags &= ~processor_target_table[j].target_disable; | |
291 | } | |
292 | break; | |
293 | } | |
294 | ||
295 | if (i == ptt_size) | |
296 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
297 | } |
298 | } | |
8a61d227 | 299 | |
ef792183 MM |
300 | /* If we are optimizing big endian systems for space, use the |
301 | store multiple instructions. */ | |
302 | if (BYTES_BIG_ENDIAN && optimize_size) | |
303 | target_flags |= MASK_MULTIPLE; | |
304 | ||
8a61d227 MM |
305 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
306 | override with the processor default */ | |
307 | if (TARGET_MULTIPLE_SET) | |
308 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 309 | |
938937d8 MM |
310 | /* If -mstring or -mno-string was explicitly used, don't |
311 | override with the processor default */ | |
312 | if (TARGET_STRING_SET) | |
1f5515bf | 313 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 314 | |
bef84347 VM |
315 | /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu |
316 | is a 750, because the hardware doesn't support the instructions used in | |
317 | little endian mode, and causes an alignment trap. The 750 does not cause | |
318 | an alignment trap (except when the target is unaligned). */ | |
319 | ||
bfc79d3b | 320 | if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) |
7e69e155 MM |
321 | { |
322 | if (TARGET_MULTIPLE) | |
323 | { | |
324 | target_flags &= ~MASK_MULTIPLE; | |
325 | if (TARGET_MULTIPLE_SET) | |
326 | warning ("-mmultiple is not supported on little endian systems"); | |
327 | } | |
328 | ||
329 | if (TARGET_STRING) | |
330 | { | |
331 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
332 | if (TARGET_STRING_SET) |
333 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
334 | } |
335 | } | |
3933e0e1 | 336 | |
a260abc9 DE |
337 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
338 | { | |
339 | warning ("-f%s ignored for AIX (all code is position independent)", | |
340 | (flag_pic > 1) ? "PIC" : "pic"); | |
341 | flag_pic = 0; | |
342 | } | |
343 | ||
38c1f2d7 MM |
344 | /* Set debug flags */ |
345 | if (rs6000_debug_name) | |
346 | { | |
bfc79d3b | 347 | if (! strcmp (rs6000_debug_name, "all")) |
38c1f2d7 | 348 | rs6000_debug_stack = rs6000_debug_arg = 1; |
bfc79d3b | 349 | else if (! strcmp (rs6000_debug_name, "stack")) |
38c1f2d7 | 350 | rs6000_debug_stack = 1; |
bfc79d3b | 351 | else if (! strcmp (rs6000_debug_name, "arg")) |
38c1f2d7 MM |
352 | rs6000_debug_arg = 1; |
353 | else | |
354 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
355 | } | |
356 | ||
c81bebd7 MM |
357 | #ifdef TARGET_REGNAMES |
358 | /* If the user desires alternate register names, copy in the alternate names | |
359 | now. */ | |
360 | if (TARGET_REGNAMES) | |
bfc79d3b DE |
361 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, |
362 | sizeof (rs6000_reg_names)); | |
c81bebd7 MM |
363 | #endif |
364 | ||
3933e0e1 MM |
365 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
366 | SUBTARGET_OVERRIDE_OPTIONS; | |
367 | #endif | |
5248c961 | 368 | } |
5accd822 DE |
369 | |
370 | void | |
371 | optimization_options (level, size) | |
372 | int level; | |
373 | int size ATTRIBUTE_UNUSED; | |
374 | { | |
fca812fa | 375 | #ifdef HAVE_decrement_and_branch_on_count |
5accd822 DE |
376 | /* When optimizing, enable use of BCT instruction. */ |
377 | if (level >= 1) | |
378 | flag_branch_on_count_reg = 1; | |
379 | #endif | |
5accd822 | 380 | } |
3cfa4909 MM |
381 | \f |
382 | /* Do anything needed at the start of the asm file. */ | |
383 | ||
384 | void | |
385 | rs6000_file_start (file, default_cpu) | |
386 | FILE *file; | |
d330fd93 | 387 | const char *default_cpu; |
3cfa4909 | 388 | { |
c4d38ccb | 389 | size_t i; |
3cfa4909 | 390 | char buffer[80]; |
d330fd93 | 391 | const char *start = buffer; |
3cfa4909 MM |
392 | struct rs6000_cpu_select *ptr; |
393 | ||
394 | if (flag_verbose_asm) | |
395 | { | |
396 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
397 | rs6000_select[0].string = default_cpu; | |
398 | ||
399 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
400 | { | |
401 | ptr = &rs6000_select[i]; | |
402 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
403 | { | |
404 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
405 | start = ""; | |
406 | } | |
407 | } | |
408 | ||
409 | #ifdef USING_SVR4_H | |
410 | switch (rs6000_sdata) | |
411 | { | |
412 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
413 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
414 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
415 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
416 | } | |
417 | ||
418 | if (rs6000_sdata && g_switch_value) | |
419 | { | |
420 | fprintf (file, "%s -G %d", start, g_switch_value); | |
421 | start = ""; | |
422 | } | |
423 | #endif | |
424 | ||
425 | if (*start == '\0') | |
949ea356 | 426 | putc ('\n', file); |
3cfa4909 MM |
427 | } |
428 | } | |
429 | ||
24d304eb RK |
430 | \f |
431 | /* Create a CONST_DOUBLE from a string. */ | |
432 | ||
433 | struct rtx_def * | |
434 | rs6000_float_const (string, mode) | |
d330fd93 | 435 | const char *string; |
24d304eb RK |
436 | enum machine_mode mode; |
437 | { | |
438 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
439 | return immed_real_const_1 (value, mode); | |
440 | } | |
5248c961 | 441 | \f |
9878760c RK |
442 | /* Return non-zero if this function is known to have a null epilogue. */ |
443 | ||
444 | int | |
445 | direct_return () | |
446 | { | |
4697a36c MM |
447 | if (reload_completed) |
448 | { | |
449 | rs6000_stack_t *info = rs6000_stack_info (); | |
450 | ||
451 | if (info->first_gp_reg_save == 32 | |
452 | && info->first_fp_reg_save == 64 | |
453 | && !info->lr_save_p | |
1b4a2731 | 454 | && !info->cr_save_p |
4697a36c MM |
455 | && !info->push_p) |
456 | return 1; | |
457 | } | |
458 | ||
459 | return 0; | |
9878760c RK |
460 | } |
461 | ||
462 | /* Returns 1 always. */ | |
463 | ||
464 | int | |
465 | any_operand (op, mode) | |
296b8152 KG |
466 | register rtx op ATTRIBUTE_UNUSED; |
467 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
468 | { |
469 | return 1; | |
470 | } | |
471 | ||
b6c9286a | 472 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
473 | int |
474 | count_register_operand(op, mode) | |
b6c9286a | 475 | register rtx op; |
296b8152 | 476 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
477 | { |
478 | if (GET_CODE (op) != REG) | |
479 | return 0; | |
480 | ||
481 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
482 | return 1; | |
483 | ||
484 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
485 | return 1; | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
802a0058 MM |
490 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
491 | as a register. */ | |
38c1f2d7 MM |
492 | int |
493 | fpmem_operand(op, mode) | |
802a0058 | 494 | register rtx op; |
296b8152 | 495 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
496 | { |
497 | if (GET_CODE (op) != REG) | |
498 | return 0; | |
499 | ||
500 | if (FPMEM_REGNO_P (REGNO (op))) | |
501 | return 1; | |
502 | ||
503 | #if 0 | |
504 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
505 | return 1; | |
506 | #endif | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
9878760c RK |
511 | /* Return 1 if OP is a constant that can fit in a D field. */ |
512 | ||
513 | int | |
514 | short_cint_operand (op, mode) | |
515 | register rtx op; | |
296b8152 | 516 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 517 | { |
5f59ecb7 DE |
518 | return (GET_CODE (op) == CONST_INT |
519 | && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')); | |
9878760c RK |
520 | } |
521 | ||
522 | /* Similar for a unsigned D field. */ | |
523 | ||
524 | int | |
525 | u_short_cint_operand (op, mode) | |
526 | register rtx op; | |
296b8152 | 527 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 528 | { |
19684119 | 529 | return (GET_CODE (op) == CONST_INT |
5f59ecb7 | 530 | && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')); |
9878760c RK |
531 | } |
532 | ||
dcfedcd0 RK |
533 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
534 | ||
535 | int | |
536 | non_short_cint_operand (op, mode) | |
537 | register rtx op; | |
296b8152 | 538 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
539 | { |
540 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 541 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
542 | } |
543 | ||
9878760c RK |
544 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
545 | ctr, or lr). */ | |
546 | ||
547 | int | |
cd2b37d9 | 548 | gpc_reg_operand (op, mode) |
9878760c RK |
549 | register rtx op; |
550 | enum machine_mode mode; | |
551 | { | |
552 | return (register_operand (op, mode) | |
802a0058 MM |
553 | && (GET_CODE (op) != REG |
554 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
555 | || REGNO (op) < 64)); | |
9878760c RK |
556 | } |
557 | ||
558 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
559 | CR field. */ | |
560 | ||
561 | int | |
562 | cc_reg_operand (op, mode) | |
563 | register rtx op; | |
564 | enum machine_mode mode; | |
565 | { | |
566 | return (register_operand (op, mode) | |
567 | && (GET_CODE (op) != REG | |
568 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
569 | || CR_REGNO_P (REGNO (op)))); | |
570 | } | |
571 | ||
815cdc52 MM |
572 | /* Returns 1 if OP is either a pseudo-register or a register denoting a |
573 | CR field that isn't CR0. */ | |
574 | ||
575 | int | |
576 | cc_reg_not_cr0_operand (op, mode) | |
577 | register rtx op; | |
578 | enum machine_mode mode; | |
579 | { | |
580 | return (register_operand (op, mode) | |
581 | && (GET_CODE (op) != REG | |
582 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
583 | || CR_REGNO_NOT_CR0_P (REGNO (op)))); | |
584 | } | |
585 | ||
9878760c RK |
586 | /* Returns 1 if OP is either a constant integer valid for a D-field or a |
587 | non-special register. If a register, it must be in the proper mode unless | |
588 | MODE is VOIDmode. */ | |
589 | ||
590 | int | |
591 | reg_or_short_operand (op, mode) | |
592 | register rtx op; | |
593 | enum machine_mode mode; | |
594 | { | |
f5a28898 | 595 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
596 | } |
597 | ||
598 | /* Similar, except check if the negation of the constant would be valid for | |
599 | a D-field. */ | |
600 | ||
601 | int | |
602 | reg_or_neg_short_operand (op, mode) | |
603 | register rtx op; | |
604 | enum machine_mode mode; | |
605 | { | |
606 | if (GET_CODE (op) == CONST_INT) | |
607 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
608 | ||
cd2b37d9 | 609 | return gpc_reg_operand (op, mode); |
9878760c RK |
610 | } |
611 | ||
612 | /* Return 1 if the operand is either a register or an integer whose high-order | |
613 | 16 bits are zero. */ | |
614 | ||
615 | int | |
616 | reg_or_u_short_operand (op, mode) | |
617 | register rtx op; | |
618 | enum machine_mode mode; | |
619 | { | |
e675f625 | 620 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
621 | } |
622 | ||
623 | /* Return 1 is the operand is either a non-special register or ANY | |
624 | constant integer. */ | |
625 | ||
626 | int | |
627 | reg_or_cint_operand (op, mode) | |
628 | register rtx op; | |
629 | enum machine_mode mode; | |
630 | { | |
e675f625 | 631 | return (GET_CODE (op) == CONST_INT |
e675f625 | 632 | || gpc_reg_operand (op, mode)); |
9878760c RK |
633 | } |
634 | ||
766a866c MM |
635 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
636 | ||
637 | int | |
638 | got_operand (op, mode) | |
639 | register rtx op; | |
296b8152 | 640 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
641 | { |
642 | return (GET_CODE (op) == SYMBOL_REF | |
643 | || GET_CODE (op) == CONST | |
644 | || GET_CODE (op) == LABEL_REF); | |
645 | } | |
646 | ||
38c1f2d7 MM |
647 | /* Return 1 if the operand is a simple references that can be loaded via |
648 | the GOT (labels involving addition aren't allowed). */ | |
649 | ||
650 | int | |
651 | got_no_const_operand (op, mode) | |
652 | register rtx op; | |
296b8152 | 653 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
654 | { |
655 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
656 | } | |
657 | ||
4e74d8ec MM |
658 | /* Return the number of instructions it takes to form a constant in an |
659 | integer register. */ | |
660 | ||
661 | static int | |
662 | num_insns_constant_wide (value) | |
663 | HOST_WIDE_INT value; | |
664 | { | |
665 | /* signed constant loadable with {cal|addi} */ | |
5f59ecb7 | 666 | if (CONST_OK_FOR_LETTER_P (value, 'I')) |
0865c631 GK |
667 | return 1; |
668 | ||
4e74d8ec | 669 | /* constant loadable with {cau|addis} */ |
5f59ecb7 | 670 | else if (CONST_OK_FOR_LETTER_P (value, 'L')) |
4e74d8ec MM |
671 | return 1; |
672 | ||
5f59ecb7 | 673 | #if HOST_BITS_PER_WIDE_INT == 64 |
4e74d8ec MM |
674 | else if (TARGET_64BIT) |
675 | { | |
676 | HOST_WIDE_INT low = value & 0xffffffff; | |
677 | HOST_WIDE_INT high = value >> 32; | |
678 | ||
679 | if (high == 0 && (low & 0x80000000) == 0) | |
680 | return 2; | |
681 | ||
682 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
683 | return 2; | |
684 | ||
685 | else if (!low) | |
686 | return num_insns_constant_wide (high) + 1; | |
687 | ||
688 | else | |
689 | return (num_insns_constant_wide (high) | |
e396202a | 690 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
691 | } |
692 | #endif | |
693 | ||
694 | else | |
695 | return 2; | |
696 | } | |
697 | ||
698 | int | |
699 | num_insns_constant (op, mode) | |
700 | rtx op; | |
701 | enum machine_mode mode; | |
702 | { | |
4e74d8ec MM |
703 | if (GET_CODE (op) == CONST_INT) |
704 | return num_insns_constant_wide (INTVAL (op)); | |
705 | ||
6fc48950 MM |
706 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
707 | { | |
708 | long l; | |
709 | REAL_VALUE_TYPE rv; | |
710 | ||
711 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
712 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
713 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
714 | } | |
715 | ||
47ad8c61 | 716 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 717 | { |
47ad8c61 MM |
718 | HOST_WIDE_INT low; |
719 | HOST_WIDE_INT high; | |
720 | long l[2]; | |
721 | REAL_VALUE_TYPE rv; | |
722 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 723 | |
47ad8c61 MM |
724 | if (mode == VOIDmode || mode == DImode) |
725 | { | |
726 | high = CONST_DOUBLE_HIGH (op); | |
727 | low = CONST_DOUBLE_LOW (op); | |
728 | } | |
729 | else | |
730 | { | |
731 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
732 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
733 | high = l[endian]; | |
734 | low = l[1 - endian]; | |
735 | } | |
4e74d8ec | 736 | |
47ad8c61 MM |
737 | if (TARGET_32BIT) |
738 | return (num_insns_constant_wide (low) | |
739 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
740 | |
741 | else | |
47ad8c61 MM |
742 | { |
743 | if (high == 0 && (low & 0x80000000) == 0) | |
744 | return num_insns_constant_wide (low); | |
745 | ||
746 | else if (((high & 0xffffffff) == 0xffffffff) | |
747 | && ((low & 0x80000000) != 0)) | |
748 | return num_insns_constant_wide (low); | |
749 | ||
a260abc9 DE |
750 | else if (mask64_operand (op, mode)) |
751 | return 2; | |
752 | ||
47ad8c61 MM |
753 | else if (low == 0) |
754 | return num_insns_constant_wide (high) + 1; | |
755 | ||
756 | else | |
757 | return (num_insns_constant_wide (high) | |
758 | + num_insns_constant_wide (low) + 1); | |
759 | } | |
4e74d8ec MM |
760 | } |
761 | ||
762 | else | |
763 | abort (); | |
764 | } | |
765 | ||
6f2f8311 RK |
766 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
767 | with one instruction per word. We only do this if we can safely read | |
768 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
769 | |
770 | int | |
771 | easy_fp_constant (op, mode) | |
772 | register rtx op; | |
773 | register enum machine_mode mode; | |
774 | { | |
9878760c RK |
775 | if (GET_CODE (op) != CONST_DOUBLE |
776 | || GET_MODE (op) != mode | |
4e74d8ec | 777 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
778 | return 0; |
779 | ||
b6c9286a | 780 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 781 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
782 | return 1; |
783 | ||
a7273471 MM |
784 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
785 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
786 | return 0; | |
787 | ||
5ae4759c MM |
788 | #ifdef TARGET_RELOCATABLE |
789 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
790 | if (TARGET_RELOCATABLE) | |
791 | return 0; | |
792 | #endif | |
793 | ||
042259f2 DE |
794 | if (mode == DFmode) |
795 | { | |
796 | long k[2]; | |
797 | REAL_VALUE_TYPE rv; | |
798 | ||
799 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
800 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 801 | |
4e74d8ec MM |
802 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
803 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 804 | } |
4e74d8ec MM |
805 | |
806 | else if (mode == SFmode) | |
042259f2 DE |
807 | { |
808 | long l; | |
809 | REAL_VALUE_TYPE rv; | |
810 | ||
811 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
812 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 813 | |
4e74d8ec | 814 | return num_insns_constant_wide (l) == 1; |
042259f2 | 815 | } |
4e74d8ec | 816 | |
a260abc9 DE |
817 | else if (mode == DImode) |
818 | return ((TARGET_64BIT | |
819 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) | |
820 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
821 | |
822 | else | |
823 | abort (); | |
9878760c | 824 | } |
8f75773e | 825 | |
b6c9286a MM |
826 | /* Return 1 if the operand is in volatile memory. Note that during the |
827 | RTL generation phase, memory_operand does not return TRUE for | |
828 | volatile memory references. So this function allows us to | |
829 | recognize volatile references where its safe. */ | |
830 | ||
831 | int | |
832 | volatile_mem_operand (op, mode) | |
833 | register rtx op; | |
834 | enum machine_mode mode; | |
835 | { | |
836 | if (GET_CODE (op) != MEM) | |
837 | return 0; | |
838 | ||
839 | if (!MEM_VOLATILE_P (op)) | |
840 | return 0; | |
841 | ||
842 | if (mode != GET_MODE (op)) | |
843 | return 0; | |
844 | ||
845 | if (reload_completed) | |
846 | return memory_operand (op, mode); | |
847 | ||
848 | if (reload_in_progress) | |
849 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
850 | ||
851 | return memory_address_p (mode, XEXP (op, 0)); | |
852 | } | |
853 | ||
97f6e72f | 854 | /* Return 1 if the operand is an offsettable memory operand. */ |
914c2e77 RK |
855 | |
856 | int | |
97f6e72f | 857 | offsettable_mem_operand (op, mode) |
914c2e77 RK |
858 | register rtx op; |
859 | enum machine_mode mode; | |
860 | { | |
97f6e72f | 861 | return ((GET_CODE (op) == MEM) |
677a9668 | 862 | && offsettable_address_p (reload_completed || reload_in_progress, |
97f6e72f | 863 | mode, XEXP (op, 0))); |
914c2e77 RK |
864 | } |
865 | ||
9878760c RK |
866 | /* Return 1 if the operand is either an easy FP constant (see above) or |
867 | memory. */ | |
868 | ||
869 | int | |
870 | mem_or_easy_const_operand (op, mode) | |
871 | register rtx op; | |
872 | enum machine_mode mode; | |
873 | { | |
874 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
875 | } | |
876 | ||
877 | /* Return 1 if the operand is either a non-special register or an item | |
5f59ecb7 | 878 | that can be used as the operand of a `mode' add insn. */ |
9878760c RK |
879 | |
880 | int | |
881 | add_operand (op, mode) | |
882 | register rtx op; | |
883 | enum machine_mode mode; | |
884 | { | |
885 | return (reg_or_short_operand (op, mode) | |
19684119 | 886 | || (GET_CODE (op) == CONST_INT |
5f59ecb7 | 887 | && CONST_OK_FOR_LETTER_P (INTVAL(op), 'L'))); |
9878760c RK |
888 | } |
889 | ||
dcfedcd0 RK |
890 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
891 | ||
892 | int | |
893 | non_add_cint_operand (op, mode) | |
894 | register rtx op; | |
296b8152 | 895 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
896 | { |
897 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 898 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
5f59ecb7 | 899 | && ! CONST_OK_FOR_LETTER_P (INTVAL(op), 'L')); |
dcfedcd0 RK |
900 | } |
901 | ||
9878760c RK |
902 | /* Return 1 if the operand is a non-special register or a constant that |
903 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
904 | ||
905 | int | |
906 | logical_operand (op, mode) | |
907 | register rtx op; | |
908 | enum machine_mode mode; | |
909 | { | |
cd2b37d9 | 910 | return (gpc_reg_operand (op, mode) |
9878760c | 911 | || (GET_CODE (op) == CONST_INT |
5f59ecb7 DE |
912 | && ((INTVAL (op) & GET_MODE_MASK (mode) |
913 | & (~ (HOST_WIDE_INT) 0xffff)) == 0 | |
914 | || (INTVAL (op) & GET_MODE_MASK (mode) | |
915 | & (~ (HOST_WIDE_INT) 0xffff0000)) == 0))); | |
9878760c RK |
916 | } |
917 | ||
dcfedcd0 RK |
918 | /* Return 1 if C is a constant that is not a logical operand (as |
919 | above). */ | |
920 | ||
921 | int | |
922 | non_logical_cint_operand (op, mode) | |
923 | register rtx op; | |
5f59ecb7 | 924 | enum machine_mode mode; |
dcfedcd0 RK |
925 | { |
926 | return (GET_CODE (op) == CONST_INT | |
5f59ecb7 DE |
927 | && (INTVAL (op) & GET_MODE_MASK (mode) & |
928 | (~ (HOST_WIDE_INT) 0xffff)) != 0 | |
929 | && (INTVAL (op) & GET_MODE_MASK (mode) & | |
930 | (~ (HOST_WIDE_INT) 0xffff0000)) != 0); | |
dcfedcd0 RK |
931 | } |
932 | ||
19ba8161 | 933 | /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the |
9878760c RK |
934 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. |
935 | Reject all ones and all zeros, since these should have been optimized | |
936 | away and confuse the making of MB and ME. */ | |
937 | ||
938 | int | |
19ba8161 DE |
939 | mask_operand (op, mode) |
940 | register rtx op; | |
941 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c | 942 | { |
19ba8161 | 943 | HOST_WIDE_INT c; |
9878760c RK |
944 | int i; |
945 | int last_bit_value; | |
946 | int transitions = 0; | |
947 | ||
19ba8161 DE |
948 | if (GET_CODE (op) != CONST_INT) |
949 | return 0; | |
950 | ||
951 | c = INTVAL (op); | |
952 | ||
9878760c RK |
953 | if (c == 0 || c == ~0) |
954 | return 0; | |
955 | ||
956 | last_bit_value = c & 1; | |
957 | ||
958 | for (i = 1; i < 32; i++) | |
959 | if (((c >>= 1) & 1) != last_bit_value) | |
960 | last_bit_value ^= 1, transitions++; | |
961 | ||
962 | return transitions <= 2; | |
963 | } | |
964 | ||
a260abc9 DE |
965 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
966 | It is if there are no more than one 1->0 or 0->1 transitions. | |
967 | Reject all ones and all zeros, since these should have been optimized | |
968 | away and confuse the making of MB and ME. */ | |
9878760c RK |
969 | |
970 | int | |
a260abc9 DE |
971 | mask64_operand (op, mode) |
972 | register rtx op; | |
973 | enum machine_mode mode; | |
974 | { | |
975 | if (GET_CODE (op) == CONST_INT) | |
976 | { | |
977 | HOST_WIDE_INT c = INTVAL (op); | |
978 | int i; | |
979 | int last_bit_value; | |
980 | int transitions = 0; | |
981 | ||
982 | if (c == 0 || c == ~0) | |
983 | return 0; | |
984 | ||
985 | last_bit_value = c & 1; | |
986 | ||
987 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
988 | if (((c >>= 1) & 1) != last_bit_value) | |
989 | last_bit_value ^= 1, transitions++; | |
990 | ||
a238cd8b | 991 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
992 | /* Consider CONST_INT sign-extended. */ |
993 | transitions += (last_bit_value != 1); | |
994 | #endif | |
995 | ||
996 | return transitions <= 1; | |
997 | } | |
998 | else if (GET_CODE (op) == CONST_DOUBLE | |
999 | && (mode == VOIDmode || mode == DImode)) | |
1000 | { | |
1001 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 1002 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1003 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
1004 | #endif | |
1005 | int i; | |
1006 | int last_bit_value; | |
1007 | int transitions = 0; | |
1008 | ||
1009 | if ((low == 0 | |
a238cd8b | 1010 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1011 | && high == 0 |
1012 | #endif | |
1013 | ) | |
1014 | || (low == ~0 | |
a238cd8b | 1015 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1016 | && high == ~0 |
1017 | #endif | |
1018 | )) | |
1019 | return 0; | |
1020 | ||
1021 | last_bit_value = low & 1; | |
1022 | ||
1023 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1024 | if (((low >>= 1) & 1) != last_bit_value) | |
1025 | last_bit_value ^= 1, transitions++; | |
1026 | ||
a238cd8b | 1027 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1028 | if ((high & 1) != last_bit_value) |
1029 | last_bit_value ^= 1, transitions++; | |
1030 | ||
1031 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1032 | if (((high >>= 1) & 1) != last_bit_value) | |
1033 | last_bit_value ^= 1, transitions++; | |
1034 | #endif | |
1035 | ||
1036 | return transitions <= 1; | |
1037 | } | |
1038 | else | |
1039 | return 0; | |
1040 | } | |
1041 | ||
1042 | /* Return 1 if the operand is either a non-special register or a constant | |
1043 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1044 | ||
1045 | int | |
1046 | and64_operand (op, mode) | |
9878760c RK |
1047 | register rtx op; |
1048 | enum machine_mode mode; | |
1049 | { | |
52d3af72 DE |
1050 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1051 | return (gpc_reg_operand (op, mode) || mask64_operand (op, mode)); | |
1052 | ||
1053 | return (logical_operand (op, mode) || mask64_operand (op, mode)); | |
9878760c RK |
1054 | } |
1055 | ||
a260abc9 DE |
1056 | /* Return 1 if the operand is either a non-special register or a |
1057 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1058 | |
1059 | int | |
a260abc9 DE |
1060 | and_operand (op, mode) |
1061 | register rtx op; | |
1062 | enum machine_mode mode; | |
dcfedcd0 | 1063 | { |
52d3af72 DE |
1064 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1065 | return (gpc_reg_operand (op, mode) || mask_operand (op, mode)); | |
1066 | ||
1067 | return (logical_operand (op, mode) || mask_operand (op, mode)); | |
dcfedcd0 RK |
1068 | } |
1069 | ||
9878760c RK |
1070 | /* Return 1 if the operand is a general register or memory operand. */ |
1071 | ||
1072 | int | |
1073 | reg_or_mem_operand (op, mode) | |
1074 | register rtx op; | |
1075 | register enum machine_mode mode; | |
1076 | { | |
b6c9286a MM |
1077 | return (gpc_reg_operand (op, mode) |
1078 | || memory_operand (op, mode) | |
1079 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1080 | } |
1081 | ||
a7a813f7 | 1082 | /* Return 1 if the operand is a general register or memory operand without |
3cb999d8 | 1083 | pre_inc or pre_dec which produces invalid form of PowerPC lwa |
a7a813f7 RK |
1084 | instruction. */ |
1085 | ||
1086 | int | |
1087 | lwa_operand (op, mode) | |
1088 | register rtx op; | |
1089 | register enum machine_mode mode; | |
1090 | { | |
1091 | rtx inner = op; | |
1092 | ||
1093 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1094 | inner = SUBREG_REG (inner); | |
1095 | ||
1096 | return gpc_reg_operand (inner, mode) | |
1097 | || (memory_operand (inner, mode) | |
1098 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1099 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1100 | } | |
1101 | ||
9878760c RK |
1102 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1103 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1104 | forced to lr. */ | |
1105 | ||
1106 | int | |
1107 | call_operand (op, mode) | |
1108 | register rtx op; | |
1109 | enum machine_mode mode; | |
1110 | { | |
1111 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1112 | return 0; | |
1113 | ||
1114 | return (GET_CODE (op) == SYMBOL_REF | |
1115 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1116 | } | |
1117 | ||
2af3d377 RK |
1118 | |
1119 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
1120 | this file. */ | |
1121 | ||
1122 | int | |
1123 | current_file_function_operand (op, mode) | |
1124 | register rtx op; | |
296b8152 | 1125 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1126 | { |
1127 | return (GET_CODE (op) == SYMBOL_REF | |
1128 | && (SYMBOL_REF_FLAG (op) | |
1129 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
1130 | } | |
1131 | ||
1132 | ||
9878760c RK |
1133 | /* Return 1 if this operand is a valid input for a move insn. */ |
1134 | ||
1135 | int | |
1136 | input_operand (op, mode) | |
1137 | register rtx op; | |
1138 | enum machine_mode mode; | |
1139 | { | |
eb4e8003 | 1140 | /* Memory is always valid. */ |
9878760c RK |
1141 | if (memory_operand (op, mode)) |
1142 | return 1; | |
1143 | ||
34792e82 | 1144 | /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ |
01b4cf2b | 1145 | if (GET_CODE (op) == CONSTANT_P_RTX) |
34792e82 JL |
1146 | return 1; |
1147 | ||
eb4e8003 RK |
1148 | /* For floating-point, easy constants are valid. */ |
1149 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1150 | && CONSTANT_P (op) | |
1151 | && easy_fp_constant (op, mode)) | |
1152 | return 1; | |
1153 | ||
4e74d8ec MM |
1154 | /* Allow any integer constant. */ |
1155 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 | 1156 | && (GET_CODE (op) == CONST_INT |
e675f625 | 1157 | || GET_CODE (op) == CONST_DOUBLE)) |
4e74d8ec MM |
1158 | return 1; |
1159 | ||
eb4e8003 RK |
1160 | /* For floating-point or multi-word mode, the only remaining valid type |
1161 | is a register. */ | |
9878760c RK |
1162 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1163 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1164 | return register_operand (op, mode); |
9878760c | 1165 | |
88fe15a1 RK |
1166 | /* The only cases left are integral modes one word or smaller (we |
1167 | do not get called for MODE_CC values). These can be in any | |
1168 | register. */ | |
1169 | if (register_operand (op, mode)) | |
a8b3aeda | 1170 | return 1; |
88fe15a1 | 1171 | |
84cf9dda | 1172 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1173 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1174 | return 1; |
1175 | ||
b6c9286a MM |
1176 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1177 | directly in the instruction stream */ | |
1178 | if (DEFAULT_ABI == ABI_NT | |
1179 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1180 | return 1; | |
1181 | ||
88228c4b MM |
1182 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1183 | to be valid. */ | |
c81bebd7 | 1184 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1185 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1186 | && small_data_operand (op, Pmode)) | |
1187 | return 1; | |
1188 | ||
042259f2 | 1189 | return 0; |
9878760c | 1190 | } |
7509c759 MM |
1191 | |
1192 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1193 | ||
1194 | int | |
1195 | small_data_operand (op, mode) | |
296b8152 KG |
1196 | rtx op ATTRIBUTE_UNUSED; |
1197 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
7509c759 | 1198 | { |
38c1f2d7 | 1199 | #if TARGET_ELF |
5f59ecb7 | 1200 | rtx sym_ref; |
7509c759 | 1201 | |
d9407988 | 1202 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1203 | return 0; |
a54d04b7 | 1204 | |
5b9d9a0c | 1205 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1206 | return 0; |
1207 | ||
88228c4b MM |
1208 | if (GET_CODE (op) == SYMBOL_REF) |
1209 | sym_ref = op; | |
1210 | ||
1211 | else if (GET_CODE (op) != CONST | |
1212 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1213 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1214 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1215 | return 0; |
1216 | ||
88228c4b | 1217 | else |
dbf55e53 MM |
1218 | { |
1219 | rtx sum = XEXP (op, 0); | |
1220 | HOST_WIDE_INT summand; | |
1221 | ||
1222 | /* We have to be careful here, because it is the referenced address | |
1223 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1224 | summand = INTVAL (XEXP (sum, 1)); | |
1225 | if (summand < 0 || summand > g_switch_value) | |
1226 | return 0; | |
1227 | ||
1228 | sym_ref = XEXP (sum, 0); | |
1229 | } | |
88228c4b MM |
1230 | |
1231 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1232 | return 0; |
1233 | ||
1234 | return 1; | |
d9407988 MM |
1235 | |
1236 | #else | |
1237 | return 0; | |
1238 | #endif | |
7509c759 MM |
1239 | } |
1240 | ||
4697a36c MM |
1241 | \f |
1242 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1243 | for a call to a function whose data type is FNTYPE. | |
1244 | For a library call, FNTYPE is 0. | |
1245 | ||
1246 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1247 | so we never return a PARALLEL. */ |
4697a36c MM |
1248 | |
1249 | void | |
1250 | init_cumulative_args (cum, fntype, libname, incoming) | |
1251 | CUMULATIVE_ARGS *cum; | |
1252 | tree fntype; | |
296b8152 | 1253 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1254 | int incoming; |
1255 | { | |
1256 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1257 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1258 | |
1259 | *cum = zero_cumulative; | |
1260 | cum->words = 0; | |
1261 | cum->fregno = FP_ARG_MIN_REG; | |
1262 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1263 | cum->call_cookie = CALL_NORMAL; |
4cc833b7 | 1264 | cum->sysv_gregno = GP_ARG_MIN_REG; |
4697a36c MM |
1265 | |
1266 | if (incoming) | |
bd227acc | 1267 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
4697a36c MM |
1268 | |
1269 | else if (cum->prototype) | |
1270 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1271 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1272 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1273 | ||
1274 | else | |
1275 | cum->nargs_prototype = 0; | |
1276 | ||
1277 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1278 | |
1279 | /* Check for DLL import functions */ | |
1280 | if (abi == ABI_NT | |
1281 | && fntype | |
1282 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1283 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1284 | ||
6a4cee5f MM |
1285 | /* Also check for longcall's */ |
1286 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1287 | cum->call_cookie = CALL_LONG; | |
1288 | ||
4697a36c MM |
1289 | if (TARGET_DEBUG_ARG) |
1290 | { | |
1291 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1292 | if (fntype) | |
1293 | { | |
1294 | tree ret_type = TREE_TYPE (fntype); | |
1295 | fprintf (stderr, " ret code = %s,", | |
1296 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1297 | } | |
1298 | ||
6a4cee5f | 1299 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1300 | fprintf (stderr, " dllimport,"); |
4697a36c | 1301 | |
6a4cee5f MM |
1302 | if (cum->call_cookie & CALL_LONG) |
1303 | fprintf (stderr, " longcall,"); | |
1304 | ||
4697a36c MM |
1305 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1306 | cum->prototype, cum->nargs_prototype); | |
1307 | } | |
1308 | } | |
1309 | \f | |
c229cba9 DE |
1310 | /* If defined, a C expression which determines whether, and in which |
1311 | direction, to pad out an argument with extra space. The value | |
1312 | should be of type `enum direction': either `upward' to pad above | |
1313 | the argument, `downward' to pad below, or `none' to inhibit | |
1314 | padding. | |
1315 | ||
1316 | For the AIX ABI structs are always stored left shifted in their | |
1317 | argument slot. */ | |
1318 | ||
c4d38ccb | 1319 | int |
c229cba9 DE |
1320 | function_arg_padding (mode, type) |
1321 | enum machine_mode mode; | |
1322 | tree type; | |
1323 | { | |
c85f7c16 | 1324 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1325 | return (int)upward; |
c229cba9 DE |
1326 | |
1327 | /* This is the default definition. */ | |
1328 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1329 | ? (int)upward |
c229cba9 DE |
1330 | : ((mode == BLKmode |
1331 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1332 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1333 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1334 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1335 | } |
1336 | ||
b6c9286a MM |
1337 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1338 | of an argument with the specified mode and type. If it is not defined, | |
1339 | PARM_BOUNDARY is used for all arguments. | |
1340 | ||
e1f83b4d MM |
1341 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1342 | ||
2310f99a | 1343 | V.4 wants long longs to be double word aligned. */ |
b6c9286a MM |
1344 | |
1345 | int | |
1346 | function_arg_boundary (mode, type) | |
1347 | enum machine_mode mode; | |
1348 | tree type; | |
1349 | { | |
4cc833b7 RH |
1350 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1351 | && (mode == DImode || mode == DFmode)) | |
e1f83b4d MM |
1352 | return 64; |
1353 | ||
b6c9286a MM |
1354 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1355 | return PARM_BOUNDARY; | |
1356 | ||
1357 | if (mode != BLKmode) | |
1358 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1359 | ||
1360 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1361 | } | |
1362 | \f | |
4697a36c MM |
1363 | /* Update the data in CUM to advance over an argument |
1364 | of mode MODE and data type TYPE. | |
1365 | (TYPE is null for libcalls where that information may not be available.) */ | |
1366 | ||
1367 | void | |
1368 | function_arg_advance (cum, mode, type, named) | |
1369 | CUMULATIVE_ARGS *cum; | |
1370 | enum machine_mode mode; | |
1371 | tree type; | |
1372 | int named; | |
1373 | { | |
1374 | cum->nargs_prototype--; | |
1375 | ||
c81bebd7 | 1376 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1377 | { |
4cc833b7 RH |
1378 | if (TARGET_HARD_FLOAT |
1379 | && (mode == SFmode || mode == DFmode)) | |
4697a36c | 1380 | { |
4cc833b7 RH |
1381 | if (cum->fregno <= FP_ARG_V4_MAX_REG) |
1382 | cum->fregno++; | |
1383 | else | |
1384 | { | |
1385 | if (mode == DFmode) | |
1386 | cum->words += cum->words & 1; | |
1387 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1388 | } | |
4697a36c | 1389 | } |
4cc833b7 RH |
1390 | else |
1391 | { | |
1392 | int n_words; | |
1393 | int gregno = cum->sysv_gregno; | |
1394 | ||
1395 | /* Aggregates and IEEE quad get passed by reference. */ | |
1396 | if ((type && AGGREGATE_TYPE_P (type)) | |
1397 | || mode == TFmode) | |
1398 | n_words = 1; | |
1399 | else | |
1400 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1401 | ||
1402 | /* Long long is put in odd registers. */ | |
1403 | if (n_words == 2 && (gregno & 1) == 0) | |
1404 | gregno += 1; | |
1405 | ||
1406 | /* Long long is not split between registers and stack. */ | |
1407 | if (gregno + n_words - 1 > GP_ARG_MAX_REG) | |
1408 | { | |
1409 | /* Long long is aligned on the stack. */ | |
1410 | if (n_words == 2) | |
1411 | cum->words += cum->words & 1; | |
1412 | cum->words += n_words; | |
1413 | } | |
4697a36c | 1414 | |
4cc833b7 RH |
1415 | /* Note: continuing to accumulate gregno past when we've started |
1416 | spilling to the stack indicates the fact that we've started | |
1417 | spilling to the stack to expand_builtin_saveregs. */ | |
1418 | cum->sysv_gregno = gregno + n_words; | |
1419 | } | |
4697a36c | 1420 | |
4cc833b7 RH |
1421 | if (TARGET_DEBUG_ARG) |
1422 | { | |
1423 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1424 | cum->words, cum->fregno); | |
1425 | fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ", | |
1426 | cum->sysv_gregno, cum->nargs_prototype, cum->prototype); | |
1427 | fprintf (stderr, "mode = %4s, named = %d\n", | |
1428 | GET_MODE_NAME (mode), named); | |
1429 | } | |
4697a36c MM |
1430 | } |
1431 | else | |
4cc833b7 RH |
1432 | { |
1433 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1434 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1435 | cum->words += align; | |
4697a36c | 1436 | |
4cc833b7 RH |
1437 | if (named) |
1438 | { | |
1439 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1440 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1441 | cum->fregno++; | |
1442 | } | |
1443 | ||
1444 | if (TARGET_DEBUG_ARG) | |
1445 | { | |
1446 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1447 | cum->words, cum->fregno); | |
1448 | fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ", | |
1449 | cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode)); | |
1450 | fprintf (stderr, "named = %d, align = %d\n", named, align); | |
1451 | } | |
1452 | } | |
4697a36c MM |
1453 | } |
1454 | \f | |
1455 | /* Determine where to put an argument to a function. | |
1456 | Value is zero to push the argument on the stack, | |
1457 | or a hard register in which to store the argument. | |
1458 | ||
1459 | MODE is the argument's machine mode. | |
1460 | TYPE is the data type of the argument (as a tree). | |
1461 | This is null for libcalls where that information may | |
1462 | not be available. | |
1463 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1464 | the preceding args and about the function being called. | |
1465 | NAMED is nonzero if this argument is a named parameter | |
1466 | (otherwise it is an extra parameter matching an ellipsis). | |
1467 | ||
1468 | On RS/6000 the first eight words of non-FP are normally in registers | |
1469 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1470 | Under V.4, the first 8 FP args are in registers. | |
1471 | ||
1472 | If this is floating-point and no prototype is specified, we use | |
1473 | both an FP and integer register (or possibly FP reg and stack). Library | |
1474 | functions (when TYPE is zero) always have the proper types for args, | |
1475 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1476 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1477 | |
1478 | struct rtx_def * | |
1479 | function_arg (cum, mode, type, named) | |
1480 | CUMULATIVE_ARGS *cum; | |
1481 | enum machine_mode mode; | |
1482 | tree type; | |
1483 | int named; | |
1484 | { | |
4cc833b7 | 1485 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c | 1486 | |
4cc833b7 RH |
1487 | /* Return a marker to indicate whether CR1 needs to set or clear the bit |
1488 | that V.4 uses to say fp args were passed in registers. Assume that we | |
1489 | don't need the marker for software floating point, or compiler generated | |
1490 | library calls. */ | |
4697a36c MM |
1491 | if (mode == VOIDmode) |
1492 | { | |
c81bebd7 | 1493 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1494 | && TARGET_HARD_FLOAT |
1495 | && cum->nargs_prototype < 0 | |
4697a36c | 1496 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1497 | { |
6a4cee5f MM |
1498 | return GEN_INT (cum->call_cookie |
1499 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1500 | ? CALL_V4_SET_FP_ARGS | |
1501 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1502 | } |
4697a36c | 1503 | |
7509c759 | 1504 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1505 | } |
1506 | ||
4cc833b7 | 1507 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1508 | { |
4cc833b7 RH |
1509 | if (TARGET_HARD_FLOAT |
1510 | && (mode == SFmode || mode == DFmode)) | |
1511 | { | |
1512 | if (cum->fregno <= FP_ARG_V4_MAX_REG) | |
1513 | return gen_rtx_REG (mode, cum->fregno); | |
1514 | else | |
1515 | return NULL; | |
1516 | } | |
1517 | else | |
1518 | { | |
1519 | int n_words; | |
1520 | int gregno = cum->sysv_gregno; | |
1521 | ||
1522 | /* Aggregates and IEEE quad get passed by reference. */ | |
1523 | if ((type && AGGREGATE_TYPE_P (type)) | |
1524 | || mode == TFmode) | |
1525 | n_words = 1; | |
1526 | else | |
1527 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1528 | ||
1529 | /* Long long is put in odd registers. */ | |
1530 | if (n_words == 2 && (gregno & 1) == 0) | |
1531 | gregno += 1; | |
1532 | ||
1533 | /* Long long is not split between registers and stack. */ | |
1534 | if (gregno + n_words - 1 <= GP_ARG_MAX_REG) | |
1535 | return gen_rtx_REG (mode, gregno); | |
1536 | else | |
1537 | return NULL; | |
1538 | } | |
4697a36c | 1539 | } |
4cc833b7 RH |
1540 | else |
1541 | { | |
1542 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1543 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1544 | int align_words = cum->words + align; | |
4697a36c | 1545 | |
4cc833b7 RH |
1546 | if (!named) |
1547 | return NULL_RTX; | |
4697a36c | 1548 | |
4cc833b7 RH |
1549 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) |
1550 | return NULL_RTX; | |
1551 | ||
1552 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1553 | { | |
1554 | if (! type | |
1555 | || ((cum->nargs_prototype > 0) | |
1556 | /* IBM AIX extended its linkage convention definition always | |
1557 | to require FP args after register save area hole on the | |
1558 | stack. */ | |
1559 | && (DEFAULT_ABI != ABI_AIX | |
1560 | || ! TARGET_XL_CALL | |
1561 | || (align_words < GP_ARG_NUM_REG)))) | |
1562 | return gen_rtx_REG (mode, cum->fregno); | |
1563 | ||
1564 | return gen_rtx_PARALLEL (mode, | |
1565 | gen_rtvec (2, | |
39403d82 | 1566 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1567 | ((align_words >= GP_ARG_NUM_REG) |
1568 | ? NULL_RTX | |
1569 | : (align_words | |
1570 | + RS6000_ARG_SIZE (mode, type, named) | |
1571 | > GP_ARG_NUM_REG | |
1572 | /* If this is partially on the stack, then | |
1573 | we only include the portion actually | |
1574 | in registers here. */ | |
39403d82 | 1575 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1576 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1577 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1578 | GP_ARG_MIN_REG + align_words))), |
1579 | const0_rtx), | |
39403d82 DE |
1580 | gen_rtx_EXPR_LIST (VOIDmode, |
1581 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1582 | const0_rtx))); |
4cc833b7 RH |
1583 | } |
1584 | else if (align_words < GP_ARG_NUM_REG) | |
1585 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1586 | else | |
1587 | return NULL_RTX; | |
4697a36c | 1588 | } |
4697a36c MM |
1589 | } |
1590 | \f | |
1591 | /* For an arg passed partly in registers and partly in memory, | |
1592 | this is the number of registers used. | |
1593 | For args passed entirely in registers or entirely in memory, zero. */ | |
1594 | ||
1595 | int | |
1596 | function_arg_partial_nregs (cum, mode, type, named) | |
1597 | CUMULATIVE_ARGS *cum; | |
1598 | enum machine_mode mode; | |
1599 | tree type; | |
1600 | int named; | |
1601 | { | |
1602 | if (! named) | |
1603 | return 0; | |
1604 | ||
c81bebd7 | 1605 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1606 | return 0; |
4697a36c MM |
1607 | |
1608 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1609 | { | |
1610 | if (cum->nargs_prototype >= 0) | |
1611 | return 0; | |
1612 | } | |
1613 | ||
1614 | if (cum->words < GP_ARG_NUM_REG | |
1615 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1616 | { | |
1617 | int ret = GP_ARG_NUM_REG - cum->words; | |
1618 | if (ret && TARGET_DEBUG_ARG) | |
1619 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1620 | ||
1621 | return ret; | |
1622 | } | |
1623 | ||
1624 | return 0; | |
1625 | } | |
1626 | \f | |
1627 | /* A C expression that indicates when an argument must be passed by | |
1628 | reference. If nonzero for an argument, a copy of that argument is | |
1629 | made in memory and a pointer to the argument is passed instead of | |
1630 | the argument itself. The pointer is passed in whatever way is | |
1631 | appropriate for passing a pointer to that type. | |
1632 | ||
1633 | Under V.4, structures and unions are passed by reference. */ | |
1634 | ||
1635 | int | |
1636 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1637 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1638 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1639 | tree type; |
296b8152 | 1640 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1641 | { |
c81bebd7 | 1642 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4cc833b7 RH |
1643 | && ((type && AGGREGATE_TYPE_P (type)) |
1644 | || mode == TFmode)) | |
4697a36c MM |
1645 | { |
1646 | if (TARGET_DEBUG_ARG) | |
1647 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1648 | ||
1649 | return 1; | |
1650 | } | |
4697a36c MM |
1651 | |
1652 | return 0; | |
1653 | } | |
1654 | ||
1655 | \f | |
1656 | /* Perform any needed actions needed for a function that is receiving a | |
1657 | variable number of arguments. | |
1658 | ||
1659 | CUM is as above. | |
1660 | ||
1661 | MODE and TYPE are the mode and type of the current parameter. | |
1662 | ||
1663 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1664 | that must be pushed by the prolog to pretend that our caller pushed | |
1665 | it. | |
1666 | ||
1667 | Normally, this macro will push all remaining incoming registers on the | |
1668 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1669 | ||
1670 | void | |
1671 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1672 | CUMULATIVE_ARGS *cum; | |
1673 | enum machine_mode mode; | |
1674 | tree type; | |
1675 | int *pretend_size; | |
1676 | int no_rtl; | |
1677 | ||
1678 | { | |
4cc833b7 RH |
1679 | CUMULATIVE_ARGS next_cum; |
1680 | int reg_size = TARGET_32BIT ? 4 : 8; | |
1681 | rtx save_area; | |
1682 | int first_reg_offset; | |
4697a36c | 1683 | |
60e2d0ca | 1684 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1685 | { |
4cc833b7 RH |
1686 | tree fntype; |
1687 | int stdarg_p; | |
1688 | ||
1689 | fntype = TREE_TYPE (current_function_decl); | |
1690 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1691 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1692 | != void_type_node)); | |
1693 | ||
1694 | /* For varargs, we do not want to skip the dummy va_dcl argument. | |
1695 | For stdargs, we do want to skip the last named argument. */ | |
1696 | next_cum = *cum; | |
1697 | if (stdarg_p) | |
1698 | function_arg_advance (&next_cum, mode, type, 1); | |
1699 | ||
1700 | /* Indicate to allocate space on the stack for varargs save area. */ | |
1701 | /* ??? Does this really have to be located at a magic spot on the | |
1702 | stack, or can we allocate this with assign_stack_local instead. */ | |
4697a36c | 1703 | rs6000_sysv_varargs_p = 1; |
60e2d0ca | 1704 | if (! no_rtl) |
2c4974b7 | 1705 | save_area = plus_constant (virtual_stack_vars_rtx, |
bd227acc | 1706 | - RS6000_VARARGS_SIZE); |
4cc833b7 RH |
1707 | |
1708 | first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG; | |
4697a36c | 1709 | } |
60e2d0ca | 1710 | else |
4697a36c | 1711 | { |
4cc833b7 RH |
1712 | save_area = virtual_incoming_args_rtx; |
1713 | rs6000_sysv_varargs_p = 0; | |
4697a36c | 1714 | |
4cc833b7 | 1715 | first_reg_offset = cum->words; |
4697a36c MM |
1716 | if (MUST_PASS_IN_STACK (mode, type)) |
1717 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
4cc833b7 | 1718 | } |
4697a36c | 1719 | |
4cc833b7 RH |
1720 | if (!no_rtl && first_reg_offset < GP_ARG_NUM_REG) |
1721 | { | |
1722 | move_block_from_reg | |
1723 | (GP_ARG_MIN_REG + first_reg_offset, | |
1724 | gen_rtx_MEM (BLKmode, | |
1725 | plus_constant (save_area, first_reg_offset * reg_size)), | |
1726 | GP_ARG_NUM_REG - first_reg_offset, | |
1727 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1728 | ||
1729 | /* ??? Does ABI_V4 need this at all? */ | |
4697a36c MM |
1730 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; |
1731 | } | |
1732 | ||
4697a36c | 1733 | /* Save FP registers if needed. */ |
4cc833b7 RH |
1734 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1735 | && TARGET_HARD_FLOAT && !no_rtl | |
1736 | && next_cum.fregno <= FP_ARG_V4_MAX_REG) | |
4697a36c | 1737 | { |
4cc833b7 RH |
1738 | int fregno = next_cum.fregno; |
1739 | rtx cr1 = gen_rtx_REG (CCmode, 69); | |
1740 | rtx lab = gen_label_rtx (); | |
1741 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
4697a36c | 1742 | |
4cc833b7 | 1743 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1744 | pc_rtx, |
39403d82 | 1745 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
4cc833b7 RH |
1746 | gen_rtx_NE (VOIDmode, cr1, |
1747 | const0_rtx), | |
39403d82 | 1748 | gen_rtx_LABEL_REF (VOIDmode, lab), |
4697a36c MM |
1749 | pc_rtx))); |
1750 | ||
4cc833b7 RH |
1751 | while (fregno <= FP_ARG_V4_MAX_REG) |
1752 | { | |
1753 | emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), | |
1754 | gen_rtx_REG (DFmode, fregno)); | |
1755 | fregno++; | |
1756 | off += 8; | |
4697a36c | 1757 | } |
4cc833b7 RH |
1758 | |
1759 | emit_label (lab); | |
4697a36c | 1760 | } |
4697a36c MM |
1761 | } |
1762 | \f | |
1763 | /* If defined, is a C expression that produces the machine-specific | |
1764 | code for a call to `__builtin_saveregs'. This code will be moved | |
1765 | to the very beginning of the function, before any parameter access | |
1766 | are made. The return value of this function should be an RTX that | |
1767 | contains the value to use as the return of `__builtin_saveregs'. | |
1768 | ||
4697a36c MM |
1769 | On the Power/PowerPC return the address of the area on the stack |
1770 | used to hold arguments. Under AIX, this includes the 8 word register | |
2c4974b7 RH |
1771 | save area. |
1772 | ||
1773 | Under V.4, things are more complicated. We do not have access to | |
1774 | all of the virtual registers required for va_start to do its job, | |
1775 | so we construct the va_list in its entirity here, and reduce va_start | |
1776 | to a block copy. This is similar to the way we do things on Alpha. */ | |
4697a36c MM |
1777 | |
1778 | struct rtx_def * | |
05e4a2ab | 1779 | rs6000_expand_builtin_saveregs () |
4697a36c | 1780 | { |
2c4974b7 RH |
1781 | rtx block, mem_gpr_fpr, mem_reg_save_area, mem_overflow, tmp; |
1782 | tree fntype; | |
1783 | int stdarg_p; | |
1784 | HOST_WIDE_INT words, gpr, fpr; | |
1785 | ||
1786 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) | |
1787 | return virtual_incoming_args_rtx; | |
1788 | ||
1789 | fntype = TREE_TYPE (current_function_decl); | |
1790 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1791 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1792 | != void_type_node)); | |
1793 | ||
1794 | /* Allocate the va_list constructor. */ | |
1795 | block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD); | |
1796 | RTX_UNCHANGING_P (block) = 1; | |
1797 | RTX_UNCHANGING_P (XEXP (block, 0)) = 1; | |
1798 | ||
1799 | mem_gpr_fpr = change_address (block, word_mode, XEXP (block, 0)); | |
1800 | mem_overflow = change_address (block, ptr_mode, | |
1801 | plus_constant (XEXP (block, 0), | |
1802 | UNITS_PER_WORD)); | |
1803 | mem_reg_save_area = change_address (block, ptr_mode, | |
1804 | plus_constant (XEXP (block, 0), | |
1805 | 2 * UNITS_PER_WORD)); | |
1806 | ||
1807 | /* Construct the two characters of `gpr' and `fpr' as a unit. */ | |
4cc833b7 RH |
1808 | words = current_function_args_info.words; |
1809 | gpr = current_function_args_info.sysv_gregno - GP_ARG_MIN_REG; | |
1810 | fpr = current_function_args_info.fregno - FP_ARG_MIN_REG; | |
1811 | ||
1812 | /* Varargs has the va_dcl argument, but we don't count it. */ | |
1813 | if (!stdarg_p) | |
1814 | { | |
1815 | if (gpr > GP_ARG_NUM_REG) | |
1816 | words -= 1; | |
1817 | else | |
1818 | gpr -= 1; | |
1819 | } | |
2c4974b7 RH |
1820 | |
1821 | if (BYTES_BIG_ENDIAN) | |
1822 | { | |
1823 | HOST_WIDE_INT bits = gpr << 8 | fpr; | |
1824 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD) | |
1825 | tmp = GEN_INT (bits << (BITS_PER_WORD - 16)); | |
1826 | else | |
1827 | { | |
1828 | bits <<= BITS_PER_WORD - HOST_BITS_PER_WIDE_INT - 16; | |
1829 | tmp = immed_double_const (0, bits, word_mode); | |
1830 | } | |
1831 | } | |
1832 | else | |
1833 | tmp = GEN_INT (fpr << 8 | gpr); | |
1834 | ||
1835 | emit_move_insn (mem_gpr_fpr, tmp); | |
1836 | ||
1837 | /* Find the overflow area. */ | |
4cc833b7 RH |
1838 | tmp = expand_binop (Pmode, add_optab, virtual_incoming_args_rtx, |
1839 | GEN_INT (words * UNITS_PER_WORD), | |
1840 | mem_overflow, 0, OPTAB_WIDEN); | |
2c4974b7 RH |
1841 | if (tmp != mem_overflow) |
1842 | emit_move_insn (mem_overflow, tmp); | |
1843 | ||
1844 | /* Find the register save area. */ | |
1845 | tmp = expand_binop (Pmode, add_optab, virtual_stack_vars_rtx, | |
1846 | GEN_INT (-RS6000_VARARGS_SIZE), | |
1847 | mem_reg_save_area, 0, OPTAB_WIDEN); | |
1848 | if (tmp != mem_reg_save_area) | |
1849 | emit_move_insn (mem_reg_save_area, tmp); | |
1850 | ||
1851 | /* Return the address of the va_list constructor. */ | |
1852 | return XEXP (block, 0); | |
4697a36c | 1853 | } |
5b5040b9 RK |
1854 | \f |
1855 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1856 | and other bits from an original memory reference. */ | |
1857 | ||
1858 | static rtx | |
1859 | expand_block_move_mem (mode, addr, orig_mem) | |
1860 | enum machine_mode mode; | |
1861 | rtx addr; | |
1862 | rtx orig_mem; | |
1863 | { | |
39403d82 | 1864 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
1865 | |
1866 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
c6df88cb | 1867 | MEM_COPY_ATTRIBUTES (mem, orig_mem); |
b6c9286a MM |
1868 | #ifdef MEM_UNALIGNED_P |
1869 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1870 | #endif | |
5b5040b9 RK |
1871 | return mem; |
1872 | } | |
1873 | ||
7e69e155 MM |
1874 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1875 | if we should let the compiler generate normal code. | |
1876 | ||
1877 | operands[0] is the destination | |
1878 | operands[1] is the source | |
1879 | operands[2] is the length | |
1880 | operands[3] is the alignment */ | |
1881 | ||
3933e0e1 MM |
1882 | #define MAX_MOVE_REG 4 |
1883 | ||
7e69e155 MM |
1884 | int |
1885 | expand_block_move (operands) | |
1886 | rtx operands[]; | |
1887 | { | |
b6c9286a MM |
1888 | rtx orig_dest = operands[0]; |
1889 | rtx orig_src = operands[1]; | |
7e69e155 | 1890 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1891 | rtx align_rtx = operands[3]; |
3933e0e1 | 1892 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1893 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1894 | int bytes; |
1895 | int offset; | |
1896 | int num_reg; | |
1897 | int i; | |
7e69e155 MM |
1898 | rtx src_reg; |
1899 | rtx dest_reg; | |
3933e0e1 MM |
1900 | rtx src_addr; |
1901 | rtx dest_addr; | |
7e69e155 | 1902 | rtx tmp_reg; |
3933e0e1 | 1903 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1904 | int move_bytes; |
1905 | ||
3933e0e1 MM |
1906 | /* If this is not a fixed size move, just call memcpy */ |
1907 | if (!constp) | |
1908 | return 0; | |
1909 | ||
7e69e155 | 1910 | /* Anything to move? */ |
3933e0e1 MM |
1911 | bytes = INTVAL (bytes_rtx); |
1912 | if (bytes <= 0) | |
7e69e155 MM |
1913 | return 1; |
1914 | ||
3933e0e1 MM |
1915 | /* Don't support real large moves. If string instructions are not used, |
1916 | then don't generate more than 8 loads. */ | |
1917 | if (TARGET_STRING) | |
1918 | { | |
1cab3be1 | 1919 | if (bytes > 4*8) |
3933e0e1 MM |
1920 | return 0; |
1921 | } | |
1922 | else if (!STRICT_ALIGNMENT) | |
1923 | { | |
1924 | if (bytes > 4*8) | |
1925 | return 0; | |
1926 | } | |
1927 | else if (bytes > 8*align) | |
7e69e155 MM |
1928 | return 0; |
1929 | ||
1930 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1931 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1932 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1933 | |
3933e0e1 | 1934 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1935 | { |
3933e0e1 | 1936 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1937 | { |
3933e0e1 MM |
1938 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1939 | && !fixed_regs[5] | |
1940 | && !fixed_regs[6] | |
1941 | && !fixed_regs[7] | |
1942 | && !fixed_regs[8] | |
1943 | && !fixed_regs[9] | |
1944 | && !fixed_regs[10] | |
1945 | && !fixed_regs[11] | |
1946 | && !fixed_regs[12]) | |
1947 | { | |
1948 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1949 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1950 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1951 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1952 | align_rtx)); |
3933e0e1 MM |
1953 | } |
1954 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1955 | && !fixed_regs[7] | |
1956 | && !fixed_regs[8] | |
1957 | && !fixed_regs[9] | |
1958 | && !fixed_regs[10] | |
1959 | && !fixed_regs[11] | |
1960 | && !fixed_regs[12]) | |
1961 | { | |
1962 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1963 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1964 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1965 | GEN_INT (move_bytes), |
4c64a852 | 1966 | align_rtx)); |
3933e0e1 MM |
1967 | } |
1968 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1969 | && !fixed_regs[9] | |
1970 | && !fixed_regs[10] | |
1971 | && !fixed_regs[11] | |
1972 | && !fixed_regs[12]) | |
1973 | { | |
1974 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1975 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1976 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1977 | GEN_INT (move_bytes), |
4c64a852 | 1978 | align_rtx)); |
3933e0e1 | 1979 | } |
d679bebf | 1980 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1981 | { /* move up to 8 bytes at a time */ |
1982 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1983 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1984 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1985 | GEN_INT (move_bytes), |
4c64a852 | 1986 | align_rtx)); |
3933e0e1 MM |
1987 | } |
1988 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1989 | { /* move 4 bytes */ | |
1990 | move_bytes = 4; | |
1991 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1992 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1993 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1994 | } |
1995 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1996 | { /* move 2 bytes */ | |
1997 | move_bytes = 2; | |
1998 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1999 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
2000 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
2001 | } |
2002 | else if (bytes == 1) /* move 1 byte */ | |
2003 | { | |
2004 | move_bytes = 1; | |
2005 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
2006 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
2007 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
2008 | } |
2009 | else | |
2010 | { /* move up to 4 bytes at a time */ | |
2011 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
2012 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
2013 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 2014 | GEN_INT (move_bytes), |
4c64a852 | 2015 | align_rtx)); |
3933e0e1 | 2016 | } |
4c64a852 | 2017 | |
015892ee RK |
2018 | if (bytes > move_bytes) |
2019 | { | |
2020 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
2021 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
2022 | } | |
4c64a852 | 2023 | } |
3933e0e1 MM |
2024 | } |
2025 | ||
2026 | else /* string instructions not available */ | |
2027 | { | |
2028 | num_reg = offset = 0; | |
2029 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 2030 | { |
3933e0e1 MM |
2031 | /* Calculate the correct offset for src/dest */ |
2032 | if (offset == 0) | |
7e69e155 | 2033 | { |
3933e0e1 MM |
2034 | src_addr = src_reg; |
2035 | dest_addr = dest_reg; | |
2036 | } | |
2037 | else | |
2038 | { | |
39403d82 DE |
2039 | src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); |
2040 | dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); | |
3933e0e1 MM |
2041 | } |
2042 | ||
2043 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
2044 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
2045 | { | |
2046 | move_bytes = 8; | |
2047 | tmp_reg = gen_reg_rtx (DImode); | |
2048 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
2049 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
2050 | } | |
2051 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
2052 | { |
2053 | move_bytes = 4; | |
2054 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
2055 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
2056 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2057 | } |
2058 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
2059 | { | |
2060 | move_bytes = 2; | |
2061 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
2062 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
2063 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2064 | } |
2065 | else | |
2066 | { | |
2067 | move_bytes = 1; | |
2068 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
2069 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
2070 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2071 | } |
2072 | ||
2073 | if (num_reg >= MAX_MOVE_REG) | |
2074 | { | |
2075 | for (i = 0; i < num_reg; i++) | |
2076 | emit_insn (stores[i]); | |
2077 | num_reg = 0; | |
7e69e155 MM |
2078 | } |
2079 | } | |
3933e0e1 | 2080 | |
b6c9286a MM |
2081 | for (i = 0; i < num_reg; i++) |
2082 | emit_insn (stores[i]); | |
7e69e155 MM |
2083 | } |
2084 | ||
2085 | return 1; | |
2086 | } | |
2087 | ||
9878760c RK |
2088 | \f |
2089 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
2090 | PARALLEL and the first section will be tested. */ | |
2091 | ||
2092 | int | |
2093 | load_multiple_operation (op, mode) | |
2094 | rtx op; | |
296b8152 | 2095 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2096 | { |
2097 | int count = XVECLEN (op, 0); | |
2098 | int dest_regno; | |
2099 | rtx src_addr; | |
2100 | int i; | |
2101 | ||
2102 | /* Perform a quick check so we don't blow up below. */ | |
2103 | if (count <= 1 | |
2104 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2105 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
2106 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
2107 | return 0; | |
2108 | ||
2109 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
2110 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
2111 | ||
2112 | for (i = 1; i < count; i++) | |
2113 | { | |
2114 | rtx elt = XVECEXP (op, 0, i); | |
2115 | ||
2116 | if (GET_CODE (elt) != SET | |
2117 | || GET_CODE (SET_DEST (elt)) != REG | |
2118 | || GET_MODE (SET_DEST (elt)) != SImode | |
2119 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
2120 | || GET_CODE (SET_SRC (elt)) != MEM | |
2121 | || GET_MODE (SET_SRC (elt)) != SImode | |
2122 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
2123 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
2124 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
2125 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
2126 | return 0; | |
2127 | } | |
2128 | ||
2129 | return 1; | |
2130 | } | |
2131 | ||
2132 | /* Similar, but tests for store multiple. Here, the second vector element | |
2133 | is a CLOBBER. It will be tested later. */ | |
2134 | ||
2135 | int | |
2136 | store_multiple_operation (op, mode) | |
2137 | rtx op; | |
296b8152 | 2138 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2139 | { |
2140 | int count = XVECLEN (op, 0) - 1; | |
2141 | int src_regno; | |
2142 | rtx dest_addr; | |
2143 | int i; | |
2144 | ||
2145 | /* Perform a quick check so we don't blow up below. */ | |
2146 | if (count <= 1 | |
2147 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2148 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
2149 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
2150 | return 0; | |
2151 | ||
2152 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
2153 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
2154 | ||
2155 | for (i = 1; i < count; i++) | |
2156 | { | |
2157 | rtx elt = XVECEXP (op, 0, i + 1); | |
2158 | ||
2159 | if (GET_CODE (elt) != SET | |
2160 | || GET_CODE (SET_SRC (elt)) != REG | |
2161 | || GET_MODE (SET_SRC (elt)) != SImode | |
2162 | || REGNO (SET_SRC (elt)) != src_regno + i | |
2163 | || GET_CODE (SET_DEST (elt)) != MEM | |
2164 | || GET_MODE (SET_DEST (elt)) != SImode | |
2165 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
2166 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
2167 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
2168 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
2169 | return 0; | |
2170 | } | |
2171 | ||
2172 | return 1; | |
2173 | } | |
2174 | \f | |
2175 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2176 | We only check the opcode against the mode of the CC value here. */ | |
2177 | ||
2178 | int | |
2179 | branch_comparison_operator (op, mode) | |
2180 | register rtx op; | |
296b8152 | 2181 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2182 | { |
2183 | enum rtx_code code = GET_CODE (op); | |
2184 | enum machine_mode cc_mode; | |
2185 | ||
2186 | if (GET_RTX_CLASS (code) != '<') | |
2187 | return 0; | |
2188 | ||
2189 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2190 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2191 | return 0; | |
2192 | ||
2193 | if ((code == GT || code == LT || code == GE || code == LE) | |
2194 | && cc_mode == CCUNSmode) | |
2195 | return 0; | |
2196 | ||
2197 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2198 | && (cc_mode != CCUNSmode)) | |
2199 | return 0; | |
2200 | ||
2201 | return 1; | |
2202 | } | |
2203 | ||
2204 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2205 | We check the opcode against the mode of the CC value and disallow EQ or | |
2206 | NE comparisons for integers. */ | |
2207 | ||
2208 | int | |
2209 | scc_comparison_operator (op, mode) | |
2210 | register rtx op; | |
2211 | enum machine_mode mode; | |
2212 | { | |
2213 | enum rtx_code code = GET_CODE (op); | |
2214 | enum machine_mode cc_mode; | |
2215 | ||
2216 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2217 | return 0; | |
2218 | ||
2219 | if (GET_RTX_CLASS (code) != '<') | |
2220 | return 0; | |
2221 | ||
2222 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2223 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2224 | return 0; | |
2225 | ||
2226 | if (code == NE && cc_mode != CCFPmode) | |
2227 | return 0; | |
2228 | ||
2229 | if ((code == GT || code == LT || code == GE || code == LE) | |
2230 | && cc_mode == CCUNSmode) | |
2231 | return 0; | |
2232 | ||
2233 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2234 | && (cc_mode != CCUNSmode)) | |
2235 | return 0; | |
2236 | ||
c5defebb RK |
2237 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2238 | return 0; | |
2239 | ||
9878760c RK |
2240 | return 1; |
2241 | } | |
e0cd0770 JC |
2242 | |
2243 | int | |
2244 | trap_comparison_operator (op, mode) | |
2245 | rtx op; | |
2246 | enum machine_mode mode; | |
2247 | { | |
2248 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2249 | return 0; | |
2250 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2251 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2252 | } | |
9878760c RK |
2253 | \f |
2254 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2255 | mask required to convert the result of a rotate insn into a shift | |
2256 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2257 | ||
2258 | int | |
2259 | includes_lshift_p (shiftop, andop) | |
2260 | register rtx shiftop; | |
2261 | register rtx andop; | |
2262 | { | |
2263 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2264 | ||
2265 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2266 | } | |
2267 | ||
2268 | /* Similar, but for right shift. */ | |
2269 | ||
2270 | int | |
2271 | includes_rshift_p (shiftop, andop) | |
2272 | register rtx shiftop; | |
2273 | register rtx andop; | |
2274 | { | |
a7653a2c | 2275 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2276 | |
2277 | shift_mask >>= INTVAL (shiftop); | |
2278 | ||
2279 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2280 | } | |
35068b43 RK |
2281 | |
2282 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2283 | for lfq and stfq insns. | |
2284 | ||
2285 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2286 | abort if we are passed pseudo registers. */ | |
2287 | ||
2288 | int | |
2289 | registers_ok_for_quad_peep (reg1, reg2) | |
2290 | rtx reg1, reg2; | |
2291 | { | |
2292 | /* We might have been passed a SUBREG. */ | |
2293 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2294 | return 0; | |
2295 | ||
2296 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2297 | } | |
2298 | ||
2299 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2300 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2301 | ||
2302 | int | |
2303 | addrs_ok_for_quad_peep (addr1, addr2) | |
2304 | register rtx addr1; | |
2305 | register rtx addr2; | |
2306 | { | |
2307 | int reg1; | |
2308 | int offset1; | |
2309 | ||
2310 | /* Extract an offset (if used) from the first addr. */ | |
2311 | if (GET_CODE (addr1) == PLUS) | |
2312 | { | |
2313 | /* If not a REG, return zero. */ | |
2314 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2315 | return 0; | |
2316 | else | |
2317 | { | |
2318 | reg1 = REGNO (XEXP (addr1, 0)); | |
2319 | /* The offset must be constant! */ | |
2320 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2321 | return 0; | |
2322 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2323 | } | |
2324 | } | |
2325 | else if (GET_CODE (addr1) != REG) | |
2326 | return 0; | |
2327 | else | |
2328 | { | |
2329 | reg1 = REGNO (addr1); | |
2330 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2331 | offset1 = 0; | |
2332 | } | |
2333 | ||
2334 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2335 | if (GET_CODE (addr2) != PLUS) | |
2336 | return 0; | |
2337 | ||
2338 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2339 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2340 | return 0; | |
2341 | ||
2342 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2343 | return 0; | |
2344 | ||
2345 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2346 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2347 | return 0; | |
2348 | ||
2349 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2350 | instructions. */ | |
2351 | return 1; | |
2352 | } | |
9878760c RK |
2353 | \f |
2354 | /* Return the register class of a scratch register needed to copy IN into | |
2355 | or out of a register in CLASS in MODE. If it can be done directly, | |
2356 | NO_REGS is returned. */ | |
2357 | ||
2358 | enum reg_class | |
2359 | secondary_reload_class (class, mode, in) | |
2360 | enum reg_class class; | |
296b8152 | 2361 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2362 | rtx in; |
2363 | { | |
5accd822 | 2364 | int regno; |
9878760c | 2365 | |
3cb999d8 | 2366 | #if TARGET_ELF |
1427100a | 2367 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2368 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2369 | is needed as an intermediate register. */ | |
3cb999d8 | 2370 | if (class != BASE_REGS |
e7b7998a JL |
2371 | && (GET_CODE (in) == SYMBOL_REF |
2372 | || GET_CODE (in) == LABEL_REF | |
2373 | || GET_CODE (in) == CONST)) | |
2374 | return BASE_REGS; | |
3cb999d8 | 2375 | #endif |
e7b7998a | 2376 | |
5accd822 DE |
2377 | if (GET_CODE (in) == REG) |
2378 | { | |
2379 | regno = REGNO (in); | |
2380 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2381 | { | |
2382 | regno = true_regnum (in); | |
2383 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2384 | regno = -1; | |
2385 | } | |
2386 | } | |
2387 | else if (GET_CODE (in) == SUBREG) | |
2388 | { | |
2389 | regno = true_regnum (in); | |
2390 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2391 | regno = -1; | |
2392 | } | |
2393 | else | |
2394 | regno = -1; | |
2395 | ||
9878760c RK |
2396 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2397 | into anything. */ | |
2398 | if (class == GENERAL_REGS || class == BASE_REGS | |
2399 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2400 | return NO_REGS; | |
2401 | ||
2402 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2403 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2404 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2405 | return NO_REGS; | |
2406 | ||
2407 | /* We can copy among the CR registers. */ | |
2408 | if ((class == CR_REGS || class == CR0_REGS) | |
2409 | && regno >= 0 && CR_REGNO_P (regno)) | |
2410 | return NO_REGS; | |
2411 | ||
2412 | /* Otherwise, we need GENERAL_REGS. */ | |
2413 | return GENERAL_REGS; | |
2414 | } | |
2415 | \f | |
2416 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2417 | know this is a valid comparison. | |
2418 | ||
2419 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2420 | used instead of %C, so the bits will be in different places. | |
2421 | ||
b4ac57ab | 2422 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2423 | |
2424 | int | |
2425 | ccr_bit (op, scc_p) | |
2426 | register rtx op; | |
2427 | int scc_p; | |
2428 | { | |
2429 | enum rtx_code code = GET_CODE (op); | |
2430 | enum machine_mode cc_mode; | |
2431 | int cc_regnum; | |
2432 | int base_bit; | |
2433 | ||
2434 | if (GET_RTX_CLASS (code) != '<') | |
2435 | return -1; | |
2436 | ||
2437 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2438 | cc_regnum = REGNO (XEXP (op, 0)); | |
2439 | base_bit = 4 * (cc_regnum - 68); | |
2440 | ||
c5defebb RK |
2441 | /* In CCEQmode cases we have made sure that the result is always in the |
2442 | third bit of the CR field. */ | |
2443 | ||
2444 | if (cc_mode == CCEQmode) | |
2445 | return base_bit + 3; | |
2446 | ||
9878760c RK |
2447 | switch (code) |
2448 | { | |
2449 | case NE: | |
2450 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2451 | case EQ: | |
2452 | return base_bit + 2; | |
2453 | case GT: case GTU: | |
2454 | return base_bit + 1; | |
2455 | case LT: case LTU: | |
2456 | return base_bit; | |
2457 | ||
2458 | case GE: case GEU: | |
2459 | /* If floating-point, we will have done a cror to put the bit in the | |
2460 | unordered position. So test that bit. For integer, this is ! LT | |
2461 | unless this is an scc insn. */ | |
2462 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2463 | ||
2464 | case LE: case LEU: | |
2465 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2466 | ||
2467 | default: | |
2468 | abort (); | |
2469 | } | |
2470 | } | |
1ff7789b | 2471 | \f |
8d30c4ee | 2472 | /* Return the GOT register. */ |
1ff7789b MM |
2473 | |
2474 | struct rtx_def * | |
2475 | rs6000_got_register (value) | |
5f59ecb7 | 2476 | rtx value ATTRIBUTE_UNUSED; |
1ff7789b | 2477 | { |
8d30c4ee FS |
2478 | /* The second flow pass currently (June 1999) can't update regs_ever_live |
2479 | without disturbing other parts of the compiler, so update it here to | |
2480 | make the prolog/epilogue code happy. */ | |
3cb999d8 | 2481 | if (no_new_pseudos && ! regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) |
8d30c4ee | 2482 | regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; |
1ff7789b | 2483 | |
8d30c4ee | 2484 | current_function_uses_pic_offset_table = 1; |
3cb999d8 | 2485 | |
1ff7789b MM |
2486 | return pic_offset_table_rtx; |
2487 | } | |
2488 | ||
956d6950 | 2489 | /* Search for any occurrence of the GOT_TOC register marker that should |
8d30c4ee FS |
2490 | have been eliminated, but may have crept back in. |
2491 | ||
2492 | This function could completely go away now (June 1999), but we leave it | |
2493 | in for a while until all the possible issues with the new -fpic handling | |
2494 | are resolved. */ | |
30ea98f1 MM |
2495 | |
2496 | void | |
2497 | rs6000_reorg (insn) | |
2498 | rtx insn; | |
2499 | { | |
2500 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2501 | { | |
8d30c4ee | 2502 | rtx got_reg = gen_rtx_REG (Pmode, 2); |
30ea98f1 MM |
2503 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2504 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2505 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2506 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2507 | } | |
2508 | } | |
2509 | ||
a7df97e6 MM |
2510 | \f |
2511 | /* Define the structure for the machine field in struct function. */ | |
2512 | struct machine_function | |
2513 | { | |
2514 | int sysv_varargs_p; | |
2515 | int save_toc_p; | |
2516 | int fpmem_size; | |
2517 | int fpmem_offset; | |
2518 | }; | |
2519 | ||
2520 | /* Functions to save and restore rs6000_fpmem_size. | |
2521 | These will be called, via pointer variables, | |
2522 | from push_function_context and pop_function_context. */ | |
2523 | ||
2524 | void | |
2525 | rs6000_save_machine_status (p) | |
2526 | struct function *p; | |
2527 | { | |
2528 | struct machine_function *machine = | |
2529 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2530 | ||
2531 | p->machine = machine; | |
2532 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2533 | machine->fpmem_size = rs6000_fpmem_size; |
2534 | machine->fpmem_offset = rs6000_fpmem_offset; | |
2535 | } | |
2536 | ||
2537 | void | |
2538 | rs6000_restore_machine_status (p) | |
2539 | struct function *p; | |
2540 | { | |
2541 | struct machine_function *machine = p->machine; | |
2542 | ||
2543 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2544 | rs6000_fpmem_size = machine->fpmem_size; |
2545 | rs6000_fpmem_offset = machine->fpmem_offset; | |
2546 | ||
2547 | free (machine); | |
2548 | p->machine = (struct machine_function *)0; | |
2549 | } | |
2550 | ||
2551 | /* Do anything needed before RTL is emitted for each function. */ | |
2552 | ||
2553 | void | |
2554 | rs6000_init_expanders () | |
2555 | { | |
2556 | /* Reset varargs and save TOC indicator */ | |
2557 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2558 | rs6000_fpmem_size = 0; |
2559 | rs6000_fpmem_offset = 0; | |
a7df97e6 MM |
2560 | |
2561 | /* Arrange to save and restore machine status around nested functions. */ | |
2562 | save_machine_status = rs6000_save_machine_status; | |
2563 | restore_machine_status = rs6000_restore_machine_status; | |
2564 | } | |
2565 | ||
9878760c RK |
2566 | \f |
2567 | /* Print an operand. Recognize special options, documented below. */ | |
2568 | ||
38c1f2d7 | 2569 | #if TARGET_ELF |
d9407988 | 2570 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2571 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2572 | #else |
2573 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2574 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2575 | #endif |
2576 | ||
9878760c RK |
2577 | void |
2578 | print_operand (file, x, code) | |
2579 | FILE *file; | |
2580 | rtx x; | |
2581 | char code; | |
2582 | { | |
2583 | int i; | |
a260abc9 | 2584 | HOST_WIDE_INT val; |
9878760c RK |
2585 | |
2586 | /* These macros test for integers and extract the low-order bits. */ | |
2587 | #define INT_P(X) \ | |
2588 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2589 | && GET_MODE (X) == VOIDmode) | |
2590 | ||
2591 | #define INT_LOWPART(X) \ | |
2592 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2593 | ||
2594 | switch (code) | |
2595 | { | |
a8b3aeda | 2596 | case '.': |
a85d226b RK |
2597 | /* Write out an instruction after the call which may be replaced |
2598 | with glue code by the loader. This depends on the AIX version. */ | |
2599 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2600 | return; |
2601 | ||
cfaaaf2e RK |
2602 | case '*': |
2603 | /* Write the register number of the TOC register. */ | |
8d30c4ee | 2604 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file); |
cfaaaf2e RK |
2605 | return; |
2606 | ||
c81bebd7 MM |
2607 | case '$': |
2608 | /* Write out either a '.' or '$' for the current location, depending | |
2609 | on whether this is Solaris or not. */ | |
2610 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2611 | return; | |
2612 | ||
9854d9ed RK |
2613 | case 'A': |
2614 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2615 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2616 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2617 | write a trash instruction. */ |
2618 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2619 | putc ('l', file); |
9854d9ed | 2620 | else |
76229ac8 | 2621 | putc ('r', file); |
9854d9ed RK |
2622 | return; |
2623 | ||
2624 | case 'b': | |
2625 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2626 | if (! INT_P (x)) |
9854d9ed | 2627 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2628 | |
5f59ecb7 | 2629 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2630 | return; |
2631 | ||
a260abc9 DE |
2632 | case 'B': |
2633 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2634 | for 64-bit mask direction. */ | |
296b8152 | 2635 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2636 | return; |
a260abc9 | 2637 | |
9854d9ed RK |
2638 | case 'C': |
2639 | /* This is an optional cror needed for LE or GE floating-point | |
2640 | comparisons. Otherwise write nothing. */ | |
2641 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2642 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2643 | { | |
2644 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2645 | ||
2646 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2647 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2648 | } | |
2649 | return; | |
2650 | ||
2651 | case 'D': | |
2652 | /* Similar, except that this is for an scc, so we must be able to | |
2653 | encode the test in a single bit that is one. We do the above | |
2654 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2655 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2656 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2657 | { | |
2658 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2659 | ||
2660 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2661 | base_bit + 2, | |
2662 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2663 | } | |
2664 | ||
2665 | else if (GET_CODE (x) == NE) | |
2666 | { | |
2667 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2668 | ||
2669 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2670 | base_bit + 2, base_bit + 2); | |
2671 | } | |
2672 | return; | |
2673 | ||
2674 | case 'E': | |
2675 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2676 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2677 | output_operand_lossage ("invalid %%E value"); | |
2678 | ||
2679 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2680 | return; |
9854d9ed RK |
2681 | |
2682 | case 'f': | |
2683 | /* X is a CR register. Print the shift count needed to move it | |
2684 | to the high-order four bits. */ | |
2685 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2686 | output_operand_lossage ("invalid %%f value"); | |
2687 | else | |
2688 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2689 | return; | |
2690 | ||
2691 | case 'F': | |
2692 | /* Similar, but print the count for the rotate in the opposite | |
2693 | direction. */ | |
2694 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2695 | output_operand_lossage ("invalid %%F value"); | |
2696 | else | |
2697 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2698 | return; | |
2699 | ||
2700 | case 'G': | |
2701 | /* X is a constant integer. If it is negative, print "m", | |
2702 | otherwise print "z". This is to make a aze or ame insn. */ | |
2703 | if (GET_CODE (x) != CONST_INT) | |
2704 | output_operand_lossage ("invalid %%G value"); | |
2705 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2706 | putc ('z', file); |
9854d9ed | 2707 | else |
76229ac8 | 2708 | putc ('m', file); |
9854d9ed RK |
2709 | return; |
2710 | ||
9878760c | 2711 | case 'h': |
df3d94ed RK |
2712 | /* If constant, output low-order five bits. Otherwise, |
2713 | write normally. */ | |
9878760c | 2714 | if (INT_P (x)) |
5f59ecb7 | 2715 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 31); |
9878760c RK |
2716 | else |
2717 | print_operand (file, x, 0); | |
2718 | return; | |
2719 | ||
64305719 DE |
2720 | case 'H': |
2721 | /* If constant, output low-order six bits. Otherwise, | |
2722 | write normally. */ | |
2723 | if (INT_P (x)) | |
5f59ecb7 | 2724 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 63); |
64305719 DE |
2725 | else |
2726 | print_operand (file, x, 0); | |
2727 | return; | |
2728 | ||
9854d9ed RK |
2729 | case 'I': |
2730 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2731 | if (INT_P (x)) |
76229ac8 | 2732 | putc ('i', file); |
9878760c RK |
2733 | return; |
2734 | ||
9854d9ed RK |
2735 | case 'j': |
2736 | /* Write the bit number in CCR for jump. */ | |
2737 | i = ccr_bit (x, 0); | |
2738 | if (i == -1) | |
2739 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2740 | else |
9854d9ed | 2741 | fprintf (file, "%d", i); |
9878760c RK |
2742 | return; |
2743 | ||
9854d9ed RK |
2744 | case 'J': |
2745 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2746 | scc flag to `ccr_bit'. */ | |
2747 | i = ccr_bit (x, 1); | |
2748 | if (i == -1) | |
2749 | output_operand_lossage ("invalid %%J code"); | |
2750 | else | |
a0466a68 RK |
2751 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2752 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2753 | return; |
2754 | ||
9854d9ed RK |
2755 | case 'k': |
2756 | /* X must be a constant. Write the 1's complement of the | |
2757 | constant. */ | |
9878760c | 2758 | if (! INT_P (x)) |
9854d9ed | 2759 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2760 | |
5f59ecb7 | 2761 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INT_LOWPART (x)); |
9878760c RK |
2762 | return; |
2763 | ||
9854d9ed RK |
2764 | case 'L': |
2765 | /* Write second word of DImode or DFmode reference. Works on register | |
2766 | or non-indexed memory only. */ | |
2767 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2768 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2769 | else if (GET_CODE (x) == MEM) |
2770 | { | |
2771 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 2772 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
2773 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2774 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
19087b1c DE |
2775 | output_address (plus_constant_for_output (XEXP (XEXP (x, 0), 0), |
2776 | UNITS_PER_WORD)); | |
9854d9ed | 2777 | else |
19087b1c DE |
2778 | output_address (plus_constant_for_output (XEXP (x, 0), |
2779 | UNITS_PER_WORD)); | |
ba5e43aa | 2780 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2781 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2782 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2783 | } |
9878760c | 2784 | return; |
9854d9ed | 2785 | |
9878760c RK |
2786 | case 'm': |
2787 | /* MB value for a mask operand. */ | |
2788 | if (! mask_operand (x, VOIDmode)) | |
2789 | output_operand_lossage ("invalid %%m value"); | |
2790 | ||
2791 | val = INT_LOWPART (x); | |
2792 | ||
2793 | /* If the high bit is set and the low bit is not, the value is zero. | |
2794 | If the high bit is zero, the value is the first 1 bit we find from | |
2795 | the left. */ | |
34792e82 | 2796 | if ((val & 0x80000000) && ((val & 1) == 0)) |
9878760c | 2797 | { |
19d2d16f | 2798 | putc ('0', file); |
9878760c RK |
2799 | return; |
2800 | } | |
34792e82 | 2801 | else if ((val & 0x80000000) == 0) |
9878760c RK |
2802 | { |
2803 | for (i = 1; i < 32; i++) | |
34792e82 | 2804 | if ((val <<= 1) & 0x80000000) |
9878760c RK |
2805 | break; |
2806 | fprintf (file, "%d", i); | |
2807 | return; | |
2808 | } | |
2809 | ||
2810 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2811 | number plus 1. We know the low-order bit is one. */ | |
2812 | for (i = 0; i < 32; i++) | |
2813 | if (((val >>= 1) & 1) == 0) | |
2814 | break; | |
2815 | ||
a260abc9 | 2816 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
2817 | we want 31 - i. */ |
2818 | fprintf (file, "%d", 31 - i); | |
2819 | return; | |
2820 | ||
2821 | case 'M': | |
2822 | /* ME value for a mask operand. */ | |
2823 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 2824 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
2825 | |
2826 | val = INT_LOWPART (x); | |
2827 | ||
2828 | /* If the low bit is set and the high bit is not, the value is 31. | |
2829 | If the low bit is zero, the value is the first 1 bit we find from | |
2830 | the right. */ | |
34792e82 | 2831 | if ((val & 1) && ((val & 0x80000000) == 0)) |
9878760c | 2832 | { |
76229ac8 | 2833 | fputs ("31", file); |
9878760c RK |
2834 | return; |
2835 | } | |
2836 | else if ((val & 1) == 0) | |
2837 | { | |
2838 | for (i = 0; i < 32; i++) | |
2839 | if ((val >>= 1) & 1) | |
2840 | break; | |
2841 | ||
a260abc9 | 2842 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
2843 | 30, so we need 30 - i. */ |
2844 | fprintf (file, "%d", 30 - i); | |
2845 | return; | |
2846 | } | |
2847 | ||
2848 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2849 | number minus 1. We know the high-order bit is one. */ | |
2850 | for (i = 0; i < 32; i++) | |
34792e82 | 2851 | if (((val <<= 1) & 0x80000000) == 0) |
9878760c RK |
2852 | break; |
2853 | ||
2854 | fprintf (file, "%d", i); | |
2855 | return; | |
2856 | ||
9878760c RK |
2857 | case 'N': |
2858 | /* Write the number of elements in the vector times 4. */ | |
2859 | if (GET_CODE (x) != PARALLEL) | |
2860 | output_operand_lossage ("invalid %%N value"); | |
2861 | ||
2862 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2863 | return; | |
2864 | ||
2865 | case 'O': | |
2866 | /* Similar, but subtract 1 first. */ | |
2867 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 2868 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
2869 | |
2870 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2871 | return; | |
2872 | ||
9854d9ed RK |
2873 | case 'p': |
2874 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2875 | if (! INT_P (x) | |
2876 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2877 | output_operand_lossage ("invalid %%p value"); | |
2878 | ||
2879 | fprintf (file, "%d", i); | |
2880 | return; | |
2881 | ||
9878760c RK |
2882 | case 'P': |
2883 | /* The operand must be an indirect memory reference. The result | |
2884 | is the register number. */ | |
2885 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2886 | || REGNO (XEXP (x, 0)) >= 32) | |
2887 | output_operand_lossage ("invalid %%P value"); | |
2888 | ||
2889 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2890 | return; | |
2891 | ||
9854d9ed RK |
2892 | case 'R': |
2893 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2894 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2895 | output_operand_lossage ("invalid %%R value"); | |
2896 | else | |
2897 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2898 | return; |
9854d9ed RK |
2899 | |
2900 | case 's': | |
2901 | /* Low 5 bits of 32 - value */ | |
2902 | if (! INT_P (x)) | |
2903 | output_operand_lossage ("invalid %%s value"); | |
2904 | ||
5f59ecb7 | 2905 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, (32 - INT_LOWPART (x)) & 31); |
9878760c | 2906 | return; |
9854d9ed | 2907 | |
a260abc9 DE |
2908 | case 'S': |
2909 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
2910 | CONST_INT 32-bit mask is considered sign-extended so any | |
2911 | transition must occur within the CONST_INT, not on the boundary. */ | |
2912 | if (! mask64_operand (x, VOIDmode)) | |
2913 | output_operand_lossage ("invalid %%S value"); | |
2914 | ||
2915 | val = INT_LOWPART (x); | |
2916 | ||
2917 | if (val & 1) /* Clear Left */ | |
2918 | { | |
a238cd8b DE |
2919 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2920 | if (!((val >>= 1) & 1)) | |
2921 | break; | |
a260abc9 | 2922 | |
a238cd8b DE |
2923 | #if HOST_BITS_PER_WIDE_INT == 32 |
2924 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
2925 | { | |
2926 | val = CONST_DOUBLE_HIGH (x); | |
2927 | ||
2928 | if (val == 0) | |
2929 | --i; | |
2930 | else | |
2931 | for (i = 32; i < 64; i++) | |
2932 | if (!((val >>= 1) & 1)) | |
2933 | break; | |
2934 | } | |
a260abc9 | 2935 | #endif |
a238cd8b DE |
2936 | /* i = index of last set bit from right |
2937 | mask begins at 63 - i from left */ | |
2938 | if (i > 63) | |
2939 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
2940 | fprintf (file, "%d", 63 - i); |
2941 | return; | |
2942 | } | |
2943 | else /* Clear Right */ | |
2944 | { | |
a238cd8b DE |
2945 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2946 | if ((val >>= 1) & 1) | |
2947 | break; | |
a260abc9 | 2948 | |
a238cd8b | 2949 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
2950 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
2951 | { | |
a238cd8b | 2952 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 2953 | |
a238cd8b | 2954 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 2955 | --i; |
a260abc9 | 2956 | else |
a238cd8b DE |
2957 | for (i = 32; i < 64; i++) |
2958 | if ((val >>= 1) & 1) | |
a260abc9 DE |
2959 | break; |
2960 | } | |
2961 | #endif | |
a238cd8b DE |
2962 | /* i = index of last clear bit from right |
2963 | mask ends at 62 - i from left */ | |
2964 | if (i > 62) | |
2965 | output_operand_lossage ("%%S computed all 0's mask"); | |
2966 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
2967 | return; |
2968 | } | |
2969 | ||
9878760c RK |
2970 | case 't': |
2971 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2972 | All floating-point operations except NE branch true and integer | |
2973 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2974 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2975 | output_operand_lossage ("invalid %%t value"); | |
2976 | ||
2977 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2978 | && GET_CODE (x) != NE) | |
2979 | || GET_CODE (x) == EQ | |
2980 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2981 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2982 | fputs ("12", file); |
9878760c | 2983 | else |
76229ac8 | 2984 | putc ('4', file); |
9878760c RK |
2985 | return; |
2986 | ||
2987 | case 'T': | |
2988 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2989 | 12 otherwise. */ | |
2990 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 2991 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
2992 | |
2993 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2994 | && GET_CODE (x) != NE) | |
2995 | || GET_CODE (x) == EQ | |
2996 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2997 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2998 | putc ('4', file); |
9878760c | 2999 | else |
76229ac8 | 3000 | fputs ("12", file); |
9878760c RK |
3001 | return; |
3002 | ||
9854d9ed | 3003 | case 'u': |
802a0058 | 3004 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
3005 | if (! INT_P (x)) |
3006 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 3007 | |
5f59ecb7 DE |
3008 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3009 | (INT_LOWPART (x) >> 16) & 0xffff); | |
9878760c RK |
3010 | return; |
3011 | ||
802a0058 MM |
3012 | case 'v': |
3013 | /* High-order 16 bits of constant for use in signed operand. */ | |
3014 | if (! INT_P (x)) | |
3015 | output_operand_lossage ("invalid %%v value"); | |
3016 | ||
3017 | { | |
3018 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
3019 | ||
9615f239 | 3020 | /* Solaris assembler doesn't like lis 0,0x8000 */ |
802a0058 MM |
3021 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) |
3022 | fprintf (file, "%d", value | (~0 << 16)); | |
3023 | else | |
3024 | fprintf (file, "0x%x", value); | |
3025 | return; | |
3026 | } | |
3027 | ||
9854d9ed RK |
3028 | case 'U': |
3029 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
3030 | if (GET_CODE (x) == MEM | |
3031 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3032 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 3033 | putc ('u', file); |
9854d9ed | 3034 | return; |
9878760c | 3035 | |
e0cd0770 JC |
3036 | case 'V': |
3037 | /* Print the trap code for this operand. */ | |
3038 | switch (GET_CODE (x)) | |
3039 | { | |
3040 | case EQ: | |
3041 | fputs ("eq", file); /* 4 */ | |
3042 | break; | |
3043 | case NE: | |
3044 | fputs ("ne", file); /* 24 */ | |
3045 | break; | |
3046 | case LT: | |
3047 | fputs ("lt", file); /* 16 */ | |
3048 | break; | |
3049 | case LE: | |
3050 | fputs ("le", file); /* 20 */ | |
3051 | break; | |
3052 | case GT: | |
3053 | fputs ("gt", file); /* 8 */ | |
3054 | break; | |
3055 | case GE: | |
3056 | fputs ("ge", file); /* 12 */ | |
3057 | break; | |
3058 | case LTU: | |
3059 | fputs ("llt", file); /* 2 */ | |
3060 | break; | |
3061 | case LEU: | |
3062 | fputs ("lle", file); /* 6 */ | |
3063 | break; | |
3064 | case GTU: | |
3065 | fputs ("lgt", file); /* 1 */ | |
3066 | break; | |
3067 | case GEU: | |
3068 | fputs ("lge", file); /* 5 */ | |
3069 | break; | |
3070 | default: | |
3071 | abort (); | |
3072 | } | |
3073 | break; | |
3074 | ||
9854d9ed RK |
3075 | case 'w': |
3076 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3077 | normally. */ | |
3078 | if (INT_P (x)) | |
5f59ecb7 DE |
3079 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, |
3080 | ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000); | |
9854d9ed RK |
3081 | else |
3082 | print_operand (file, x, 0); | |
9878760c RK |
3083 | return; |
3084 | ||
9854d9ed RK |
3085 | case 'W': |
3086 | /* If constant, low-order 16 bits of constant, unsigned. | |
3087 | Otherwise, write normally. */ | |
3088 | if (INT_P (x)) | |
5f59ecb7 | 3089 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff); |
9854d9ed RK |
3090 | else |
3091 | print_operand (file, x, 0); | |
3092 | return; | |
9878760c | 3093 | |
9854d9ed RK |
3094 | case 'X': |
3095 | if (GET_CODE (x) == MEM | |
3096 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3097 | putc ('x', file); |
9854d9ed | 3098 | return; |
9878760c | 3099 | |
9854d9ed RK |
3100 | case 'Y': |
3101 | /* Like 'L', for third word of TImode */ | |
3102 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3103 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3104 | else if (GET_CODE (x) == MEM) |
9878760c | 3105 | { |
9854d9ed RK |
3106 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3107 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3108 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3109 | else |
a54d04b7 | 3110 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3111 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3112 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3113 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3114 | } |
3115 | return; | |
9854d9ed | 3116 | |
9878760c | 3117 | case 'z': |
b4ac57ab RS |
3118 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3119 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3120 | names. If we are configured for System V (or the embedded ABI) on |
3121 | the PowerPC, do not emit the period, since those systems do not use | |
3122 | TOCs and the like. */ | |
9878760c RK |
3123 | if (GET_CODE (x) != SYMBOL_REF) |
3124 | abort (); | |
3125 | ||
b6c9286a MM |
3126 | if (XSTR (x, 0)[0] != '.') |
3127 | { | |
3128 | switch (DEFAULT_ABI) | |
3129 | { | |
3130 | default: | |
3131 | abort (); | |
3132 | ||
3133 | case ABI_AIX: | |
3134 | putc ('.', file); | |
3135 | break; | |
3136 | ||
3137 | case ABI_V4: | |
3138 | case ABI_AIX_NODESC: | |
c81bebd7 | 3139 | case ABI_SOLARIS: |
b6c9286a MM |
3140 | break; |
3141 | ||
3142 | case ABI_NT: | |
3143 | fputs ("..", file); | |
3144 | break; | |
3145 | } | |
3146 | } | |
9878760c RK |
3147 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3148 | return; | |
3149 | ||
9854d9ed RK |
3150 | case 'Z': |
3151 | /* Like 'L', for last word of TImode. */ | |
3152 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3153 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3154 | else if (GET_CODE (x) == MEM) |
3155 | { | |
3156 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3157 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3158 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3159 | else |
a54d04b7 | 3160 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3161 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3162 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3163 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3164 | } |
5c23c401 | 3165 | return; |
9854d9ed | 3166 | |
9878760c RK |
3167 | case 0: |
3168 | if (GET_CODE (x) == REG) | |
3169 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3170 | else if (GET_CODE (x) == MEM) | |
3171 | { | |
3172 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3173 | know the width from the mode. */ | |
3174 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3175 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3176 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3177 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3178 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3179 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3180 | else | |
a54d04b7 | 3181 | output_address (XEXP (x, 0)); |
9878760c RK |
3182 | } |
3183 | else | |
a54d04b7 | 3184 | output_addr_const (file, x); |
a85d226b | 3185 | return; |
9878760c RK |
3186 | |
3187 | default: | |
3188 | output_operand_lossage ("invalid %%xn code"); | |
3189 | } | |
3190 | } | |
3191 | \f | |
3192 | /* Print the address of an operand. */ | |
3193 | ||
3194 | void | |
3195 | print_operand_address (file, x) | |
3196 | FILE *file; | |
3197 | register rtx x; | |
3198 | { | |
3199 | if (GET_CODE (x) == REG) | |
4697a36c | 3200 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3201 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3202 | { |
3203 | output_addr_const (file, x); | |
ba5e43aa | 3204 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3205 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3206 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3207 | |
4697a36c | 3208 | #ifdef TARGET_NO_TOC |
7509c759 | 3209 | else if (TARGET_NO_TOC) |
4697a36c | 3210 | ; |
4697a36c | 3211 | #endif |
7509c759 | 3212 | else |
8d30c4ee | 3213 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]); |
9878760c RK |
3214 | } |
3215 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3216 | { | |
3217 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3218 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3219 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3220 | else |
4697a36c MM |
3221 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3222 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3223 | } |
3224 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
5f59ecb7 DE |
3225 | { |
3226 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (x, 1))); | |
3227 | fprintf (file, "(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3228 | } | |
3cb999d8 DE |
3229 | #if TARGET_ELF |
3230 | else if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 0)) == REG | |
3231 | && CONSTANT_P (XEXP (x, 1))) | |
4697a36c MM |
3232 | { |
3233 | output_addr_const (file, XEXP (x, 1)); | |
3234 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3235 | } | |
3cb999d8 | 3236 | #endif |
9878760c RK |
3237 | else |
3238 | abort (); | |
3239 | } | |
3240 | \f | |
3241 | /* This page contains routines that are used to determine what the function | |
3242 | prologue and epilogue code will do and write them out. */ | |
3243 | ||
3244 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3245 | none. */ | |
3246 | ||
3247 | int | |
3248 | first_reg_to_save () | |
3249 | { | |
3250 | int first_reg; | |
3251 | ||
3252 | /* Find lowest numbered live register. */ | |
3253 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
3254 | if (regs_ever_live[first_reg]) | |
3255 | break; | |
3256 | ||
b5253831 DE |
3257 | if (profile_flag) |
3258 | { | |
3259 | /* AIX must save/restore every register that contains a parameter | |
3260 | before/after the .__mcount call plus an additional register | |
3261 | for the static chain, if needed; use registers from 30 down to 22 | |
3262 | to do this. */ | |
3263 | if (DEFAULT_ABI == ABI_AIX) | |
3264 | { | |
3265 | int last_parm_reg, profile_first_reg; | |
3266 | ||
3267 | /* Figure out last used parameter register. The proper thing | |
3268 | to do is to walk incoming args of the function. A function | |
3269 | might have live parameter registers even if it has no | |
3270 | incoming args. */ | |
3271 | for (last_parm_reg = 10; | |
3272 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
3273 | last_parm_reg--) | |
3274 | ; | |
3275 | ||
3276 | /* Calculate first reg for saving parameter registers | |
3277 | and static chain. | |
3278 | Skip reg 31 which may contain the frame pointer. */ | |
3279 | profile_first_reg = (33 - last_parm_reg | |
3280 | - (current_function_needs_context ? 1 : 0)); | |
3281 | /* Do not save frame pointer if no parameters needs to be saved. */ | |
3282 | if (profile_first_reg == 31) | |
3283 | profile_first_reg = 32; | |
3284 | ||
3285 | if (first_reg > profile_first_reg) | |
3286 | first_reg = profile_first_reg; | |
3287 | } | |
e165f3f0 | 3288 | |
b5253831 DE |
3289 | /* SVR4 may need one register to preserve the static chain. */ |
3290 | else if (current_function_needs_context) | |
3291 | { | |
3292 | /* Skip reg 31 which may contain the frame pointer. */ | |
3293 | if (first_reg > 30) | |
3294 | first_reg = 30; | |
3295 | } | |
3296 | } | |
e165f3f0 | 3297 | |
9878760c RK |
3298 | return first_reg; |
3299 | } | |
3300 | ||
3301 | /* Similar, for FP regs. */ | |
3302 | ||
3303 | int | |
3304 | first_fp_reg_to_save () | |
3305 | { | |
3306 | int first_reg; | |
3307 | ||
3308 | /* Find lowest numbered live register. */ | |
3309 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3310 | if (regs_ever_live[first_reg]) | |
3311 | break; | |
3312 | ||
3313 | return first_reg; | |
3314 | } | |
3315 | ||
9878760c RK |
3316 | /* Return non-zero if this function makes calls. */ |
3317 | ||
3318 | int | |
3319 | rs6000_makes_calls () | |
3320 | { | |
3321 | rtx insn; | |
3322 | ||
38c1f2d7 MM |
3323 | /* If we are profiling, we will be making a call to __mcount. |
3324 | Under the System V ABI's, we store the LR directly, so | |
3325 | we don't need to do it here. */ | |
3326 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3327 | return 1; |
3328 | ||
9878760c RK |
3329 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3330 | if (GET_CODE (insn) == CALL_INSN) | |
3331 | return 1; | |
3332 | ||
3333 | return 0; | |
3334 | } | |
3335 | ||
4697a36c MM |
3336 | \f |
3337 | /* Calculate the stack information for the current function. This is | |
3338 | complicated by having two separate calling sequences, the AIX calling | |
3339 | sequence and the V.4 calling sequence. | |
3340 | ||
3341 | AIX stack frames look like: | |
a260abc9 | 3342 | 32-bit 64-bit |
4697a36c | 3343 | SP----> +---------------------------------------+ |
a260abc9 | 3344 | | back chain to caller | 0 0 |
4697a36c | 3345 | +---------------------------------------+ |
a260abc9 | 3346 | | saved CR | 4 8 (8-11) |
4697a36c | 3347 | +---------------------------------------+ |
a260abc9 | 3348 | | saved LR | 8 16 |
4697a36c | 3349 | +---------------------------------------+ |
a260abc9 | 3350 | | reserved for compilers | 12 24 |
4697a36c | 3351 | +---------------------------------------+ |
a260abc9 | 3352 | | reserved for binders | 16 32 |
4697a36c | 3353 | +---------------------------------------+ |
a260abc9 | 3354 | | saved TOC pointer | 20 40 |
4697a36c | 3355 | +---------------------------------------+ |
a260abc9 | 3356 | | Parameter save area (P) | 24 48 |
4697a36c | 3357 | +---------------------------------------+ |
a260abc9 | 3358 | | Alloca space (A) | 24+P etc. |
802a0058 | 3359 | +---------------------------------------+ |
a7df97e6 | 3360 | | Local variable space (L) | 24+P+A |
4697a36c | 3361 | +---------------------------------------+ |
a7df97e6 | 3362 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3363 | +---------------------------------------+ |
a7df97e6 | 3364 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3365 | +---------------------------------------+ |
a7df97e6 | 3366 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3367 | +---------------------------------------+ |
3368 | old SP->| back chain to caller's caller | | |
3369 | +---------------------------------------+ | |
3370 | ||
5376a30c KR |
3371 | The required alignment for AIX configurations is two words (i.e., 8 |
3372 | or 16 bytes). | |
3373 | ||
3374 | ||
4697a36c MM |
3375 | V.4 stack frames look like: |
3376 | ||
3377 | SP----> +---------------------------------------+ | |
3378 | | back chain to caller | 0 | |
3379 | +---------------------------------------+ | |
5eb387b8 | 3380 | | caller's saved LR | 4 |
4697a36c MM |
3381 | +---------------------------------------+ |
3382 | | Parameter save area (P) | 8 | |
3383 | +---------------------------------------+ | |
a7df97e6 MM |
3384 | | Alloca space (A) | 8+P |
3385 | +---------------------------------------+ | |
3386 | | Varargs save area (V) | 8+P+A | |
3387 | +---------------------------------------+ | |
3388 | | Local variable space (L) | 8+P+A+V | |
3389 | +---------------------------------------+ | |
3390 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3391 | +---------------------------------------+ |
a7df97e6 MM |
3392 | | saved CR (C) | 8+P+A+V+L+X |
3393 | +---------------------------------------+ | |
3394 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3395 | +---------------------------------------+ | |
3396 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3397 | +---------------------------------------+ |
3398 | old SP->| back chain to caller's caller | | |
3399 | +---------------------------------------+ | |
b6c9286a | 3400 | |
5376a30c KR |
3401 | The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is |
3402 | given. (But note below and in sysv4.h that we require only 8 and | |
3403 | may round up the size of our stack frame anyways. The historical | |
3404 | reason is early versions of powerpc-linux which didn't properly | |
3405 | align the stack at program startup. A happy side-effect is that | |
3406 | -mno-eabi libraries can be used with -meabi programs.) | |
3407 | ||
b6c9286a MM |
3408 | |
3409 | A PowerPC Windows/NT frame looks like: | |
3410 | ||
3411 | SP----> +---------------------------------------+ | |
3412 | | back chain to caller | 0 | |
3413 | +---------------------------------------+ | |
3414 | | reserved | 4 | |
3415 | +---------------------------------------+ | |
3416 | | reserved | 8 | |
3417 | +---------------------------------------+ | |
3418 | | reserved | 12 | |
3419 | +---------------------------------------+ | |
3420 | | reserved | 16 | |
3421 | +---------------------------------------+ | |
3422 | | reserved | 20 | |
3423 | +---------------------------------------+ | |
3424 | | Parameter save area (P) | 24 | |
3425 | +---------------------------------------+ | |
a7df97e6 MM |
3426 | | Alloca space (A) | 24+P |
3427 | +---------------------------------------+ | |
3428 | | Local variable space (L) | 24+P+A | |
3429 | +---------------------------------------+ | |
3430 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3431 | +---------------------------------------+ |
a7df97e6 MM |
3432 | | Save area for FP registers (F) | 24+P+A+L+X |
3433 | +---------------------------------------+ | |
3434 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3435 | +---------------------------------------+ | |
3436 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3437 | +---------------------------------------+ | |
3438 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3439 | +---------------------------------------+ | |
3440 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3441 | +---------------------------------------+ | |
3442 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3443 | +---------------------------------------+ |
3444 | old SP->| back chain to caller's caller | | |
3445 | +---------------------------------------+ | |
3446 | ||
3447 | For NT, there is no specific order to save the registers, but in | |
3448 | order to support __builtin_return_address, the save area for the | |
3449 | link register needs to be in a known place, so we use -4 off of the | |
3450 | old SP. To support calls through pointers, we also allocate a | |
5376a30c KR |
3451 | fixed slot to store the TOC, -8 off the old SP. |
3452 | ||
3453 | The required alignment for NT is 16 bytes. | |
3454 | ||
3455 | ||
3456 | The EABI configuration defaults to the V.4 layout, unless | |
3457 | -mcall-aix is used, in which case the AIX layout is used. However, | |
3458 | the stack alignment requirements may differ. If -mno-eabi is not | |
3459 | given, the required stack alignment is 8 bytes; if -mno-eabi is | |
3460 | given, the required alignment is 16 bytes. (But see V.4 comment | |
3461 | above.) */ | |
4697a36c | 3462 | |
61b2fbe7 MM |
3463 | #ifndef ABI_STACK_BOUNDARY |
3464 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3465 | #endif | |
3466 | ||
4697a36c MM |
3467 | rs6000_stack_t * |
3468 | rs6000_stack_info () | |
3469 | { | |
3470 | static rs6000_stack_t info, zero_info; | |
3471 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3472 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3473 | enum rs6000_abi abi; |
b6c9286a | 3474 | int total_raw_size; |
4697a36c MM |
3475 | |
3476 | /* Zero all fields portably */ | |
3477 | info = zero_info; | |
3478 | ||
3479 | /* Select which calling sequence */ | |
b6c9286a | 3480 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3481 | |
4697a36c MM |
3482 | /* Calculate which registers need to be saved & save area size */ |
3483 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3484 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3485 | ||
3486 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3487 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3488 | ||
3489 | /* Does this function call anything? */ | |
3490 | info_ptr->calls_p = rs6000_makes_calls (); | |
3491 | ||
62c0fb87 | 3492 | /* Allocate space to save the toc. */ |
82280d5e | 3493 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3494 | { |
3495 | info_ptr->toc_save_p = 1; | |
3496 | info_ptr->toc_size = reg_size; | |
3497 | } | |
3498 | ||
802a0058 MM |
3499 | /* Does this machine need the float/int conversion area? */ |
3500 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3501 | ||
b6c9286a MM |
3502 | /* If this is main and we need to call a function to set things up, |
3503 | save main's arguments around the call. */ | |
c81bebd7 MM |
3504 | #ifdef TARGET_EABI |
3505 | if (TARGET_EABI) | |
3506 | #endif | |
b6c9286a | 3507 | { |
30ccf55d MS |
3508 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3509 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3510 | { |
c81bebd7 | 3511 | info_ptr->main_p = 1; |
b6c9286a | 3512 | |
c81bebd7 MM |
3513 | #ifdef NAME__MAIN |
3514 | info_ptr->calls_p = 1; | |
b6c9286a | 3515 | |
c81bebd7 | 3516 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3517 | { |
c81bebd7 MM |
3518 | int i; |
3519 | tree arg; | |
3520 | ||
3521 | info_ptr->main_save_p = 1; | |
3522 | info_ptr->main_size = 0; | |
3523 | ||
3524 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3525 | arg != NULL_TREE && i < 8; | |
3526 | (arg = TREE_CHAIN (arg)), i++) | |
3527 | { | |
3528 | info_ptr->main_size += reg_size; | |
3529 | } | |
b6c9286a | 3530 | } |
b6c9286a | 3531 | #endif |
c81bebd7 | 3532 | } |
b6c9286a MM |
3533 | } |
3534 | ||
4697a36c | 3535 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3536 | if (regs_ever_live[65] |
3537 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3538 | #ifdef TARGET_RELOCATABLE |
3539 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3540 | #endif | |
3541 | || (info_ptr->first_fp_reg_save != 64 | |
3542 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3543 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3544 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3545 | || info_ptr->calls_p) |
3546 | { | |
3547 | info_ptr->lr_save_p = 1; | |
3548 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3549 | if (abi == ABI_NT) |
3550 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3551 | } |
3552 | ||
3553 | /* Determine if we need to save the condition code registers */ | |
3554 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3555 | { | |
3556 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3557 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3558 | info_ptr->cr_size = reg_size; |
3559 | } | |
3560 | ||
3561 | /* Determine various sizes */ | |
3562 | info_ptr->reg_size = reg_size; | |
3563 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3564 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3565 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3566 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3567 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3568 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3569 | + info_ptr->gp_size |
3570 | + info_ptr->cr_size | |
3571 | + info_ptr->lr_size | |
3572 | + info_ptr->toc_size | |
3573 | + info_ptr->main_size, 8); | |
3574 | ||
4697a36c | 3575 | /* Calculate the offsets */ |
24d304eb | 3576 | switch (abi) |
4697a36c | 3577 | { |
b6c9286a | 3578 | case ABI_NONE: |
24d304eb | 3579 | default: |
b6c9286a MM |
3580 | abort (); |
3581 | ||
3582 | case ABI_AIX: | |
3583 | case ABI_AIX_NODESC: | |
3584 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3585 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3586 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3587 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3588 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3589 | break; |
3590 | ||
3591 | case ABI_V4: | |
c81bebd7 | 3592 | case ABI_SOLARIS: |
b6c9286a MM |
3593 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3594 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3595 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3596 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3597 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3598 | info_ptr->lr_save_offset = reg_size; |
3599 | break; | |
3600 | ||
3601 | case ABI_NT: | |
a260abc9 | 3602 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3603 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3604 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3605 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3606 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3607 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3608 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3609 | |
3610 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3611 | break; |
4697a36c MM |
3612 | } |
3613 | ||
34792e82 | 3614 | /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ |
ff381587 MM |
3615 | if (info_ptr->fpmem_p |
3616 | && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) | |
3617 | info_ptr->fpmem_size += reg_size; | |
3618 | ||
3619 | total_raw_size = (info_ptr->vars_size | |
3620 | + info_ptr->parm_size | |
3621 | + info_ptr->fpmem_size | |
3622 | + info_ptr->save_size | |
3623 | + info_ptr->varargs_size | |
3624 | + info_ptr->fixed_size); | |
3625 | ||
3626 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); | |
3627 | ||
3628 | /* Determine if we need to allocate any stack frame: | |
3629 | ||
3630 | For AIX we need to push the stack if a frame pointer is needed (because | |
3631 | the stack might be dynamically adjusted), if we are debugging, if we | |
3632 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3633 | are more than the space needed to save all non-volatile registers: | |
bfc79d3b | 3634 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved). |
ff381587 MM |
3635 | |
3636 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3637 | the debugger can handle stackless frames. */ | |
3638 | ||
3639 | if (info_ptr->calls_p) | |
3640 | info_ptr->push_p = 1; | |
3641 | ||
3642 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) | |
3643 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size | |
3644 | || (abi == ABI_NT ? info_ptr->lr_save_p | |
3645 | : info_ptr->calls_p)); | |
3646 | ||
3647 | else | |
3648 | info_ptr->push_p = (frame_pointer_needed | |
3649 | || write_symbols != NO_DEBUG | |
3650 | || ((total_raw_size - info_ptr->fixed_size) | |
bfc79d3b | 3651 | > (TARGET_32BIT ? 220 : 288))); |
ff381587 | 3652 | |
a7df97e6 | 3653 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3654 | { |
3655 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3656 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3657 | rs6000_fpmem_offset = (info_ptr->push_p |
3658 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3659 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3660 | } |
3661 | else | |
3662 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3663 | |
4697a36c | 3664 | /* Zero offsets if we're not saving those registers */ |
8dda1a21 | 3665 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3666 | info_ptr->fp_save_offset = 0; |
3667 | ||
8dda1a21 | 3668 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3669 | info_ptr->gp_save_offset = 0; |
3670 | ||
3671 | if (!info_ptr->lr_save_p) | |
3672 | info_ptr->lr_save_offset = 0; | |
3673 | ||
3674 | if (!info_ptr->cr_save_p) | |
3675 | info_ptr->cr_save_offset = 0; | |
3676 | ||
b6c9286a MM |
3677 | if (!info_ptr->toc_save_p) |
3678 | info_ptr->toc_save_offset = 0; | |
3679 | ||
3680 | if (!info_ptr->main_save_p) | |
3681 | info_ptr->main_save_offset = 0; | |
3682 | ||
4697a36c MM |
3683 | return info_ptr; |
3684 | } | |
3685 | ||
3686 | void | |
3687 | debug_stack_info (info) | |
3688 | rs6000_stack_t *info; | |
9878760c | 3689 | { |
d330fd93 | 3690 | const char *abi_string; |
24d304eb | 3691 | |
4697a36c MM |
3692 | if (!info) |
3693 | info = rs6000_stack_info (); | |
3694 | ||
3695 | fprintf (stderr, "\nStack information for function %s:\n", | |
3696 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3697 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3698 | : "<unknown>")); | |
3699 | ||
24d304eb RK |
3700 | switch (info->abi) |
3701 | { | |
b6c9286a MM |
3702 | default: abi_string = "Unknown"; break; |
3703 | case ABI_NONE: abi_string = "NONE"; break; | |
3704 | case ABI_AIX: abi_string = "AIX"; break; | |
3705 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3706 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3707 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3708 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3709 | } |
3710 | ||
3711 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3712 | ||
4697a36c MM |
3713 | if (info->first_gp_reg_save != 32) |
3714 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3715 | ||
3716 | if (info->first_fp_reg_save != 64) | |
3717 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3718 | |
4697a36c MM |
3719 | if (info->lr_save_p) |
3720 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3721 | |
4697a36c MM |
3722 | if (info->cr_save_p) |
3723 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3724 | ||
b6c9286a MM |
3725 | if (info->toc_save_p) |
3726 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3727 | ||
4697a36c MM |
3728 | if (info->push_p) |
3729 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3730 | ||
3731 | if (info->calls_p) | |
3732 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3733 | ||
b6c9286a MM |
3734 | if (info->main_p) |
3735 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3736 | ||
3737 | if (info->main_save_p) | |
3738 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3739 | ||
802a0058 MM |
3740 | if (info->fpmem_p) |
3741 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3742 | ||
4697a36c MM |
3743 | if (info->gp_save_offset) |
3744 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3745 | ||
3746 | if (info->fp_save_offset) | |
3747 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3748 | ||
3749 | if (info->lr_save_offset) | |
3750 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3751 | ||
3752 | if (info->cr_save_offset) | |
3753 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3754 | ||
b6c9286a MM |
3755 | if (info->toc_save_offset) |
3756 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3757 | ||
4697a36c MM |
3758 | if (info->varargs_save_offset) |
3759 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3760 | ||
b6c9286a MM |
3761 | if (info->main_save_offset) |
3762 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3763 | ||
802a0058 MM |
3764 | if (info->fpmem_offset) |
3765 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3766 | ||
4697a36c MM |
3767 | if (info->total_size) |
3768 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3769 | ||
3770 | if (info->varargs_size) | |
3771 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3772 | ||
3773 | if (info->vars_size) | |
3774 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3775 | ||
3776 | if (info->parm_size) | |
3777 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3778 | ||
802a0058 MM |
3779 | if (info->fpmem_size) |
3780 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3781 | ||
4697a36c MM |
3782 | if (info->fixed_size) |
3783 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3784 | ||
3785 | if (info->gp_size) | |
3786 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3787 | ||
3788 | if (info->fp_size) | |
3789 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3790 | ||
b6c9286a MM |
3791 | if (info->lr_size) |
3792 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3793 | ||
4697a36c MM |
3794 | if (info->cr_size) |
3795 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3796 | ||
b6c9286a MM |
3797 | if (info->toc_size) |
3798 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3799 | ||
3800 | if (info->main_size) | |
3801 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3802 | ||
4697a36c MM |
3803 | if (info->save_size) |
3804 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3805 | ||
3806 | if (info->reg_size != 4) | |
3807 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3808 | ||
3809 | fprintf (stderr, "\n"); | |
9878760c | 3810 | } |
4697a36c | 3811 | \f |
c7ca610e RK |
3812 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3813 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3814 | a constant pool. */ | |
3815 | ||
3816 | void | |
38c1f2d7 | 3817 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3818 | FILE *file; |
38c1f2d7 | 3819 | int reg; |
c7ca610e RK |
3820 | { |
3821 | char buf[256]; | |
3822 | ||
3823 | #ifdef USING_SVR4_H | |
3824 | if (TARGET_RELOCATABLE) | |
3825 | { | |
3826 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3827 | fprintf (file, "\tbl "); | |
3828 | assemble_name (file, buf); | |
3829 | fprintf (file, "\n"); | |
3830 | ||
38c1f2d7 MM |
3831 | /* possibly create the toc section */ |
3832 | if (!toc_initialized) | |
3833 | { | |
3834 | toc_section (); | |
3835 | function_section (current_function_decl); | |
3836 | } | |
3837 | ||
3838 | /* If not first call in this function, we need to put the | |
3839 | different between .LCTOC1 and the address we get to right | |
3840 | after the bl. It will mess up disassembling the instructions | |
3841 | but that can't be helped. We will later need to bias the | |
3842 | address before loading. */ | |
3843 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3844 | { | |
d330fd93 | 3845 | const char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
38c1f2d7 MM |
3846 | char *buf_ptr; |
3847 | ||
3848 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3849 | ||
3850 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3851 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3852 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3853 | ||
3854 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3855 | fprintf (file, "%s\n", buf_ptr); | |
3856 | } | |
3857 | ||
c7ca610e | 3858 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3859 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3860 | ||
3861 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
3862 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
3863 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 3864 | |
a260abc9 DE |
3865 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
3866 | reg_names[0]); | |
38c1f2d7 | 3867 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 3868 | assemble_name (file, buf); |
949ea356 | 3869 | putc ('-', file); |
c7ca610e RK |
3870 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3871 | assemble_name (file, buf); | |
38c1f2d7 | 3872 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3873 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3874 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3875 | rs6000_pic_labelno++; |
3876 | } | |
9615f239 | 3877 | else if (! TARGET_64BIT) |
c7ca610e RK |
3878 | { |
3879 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 3880 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 3881 | assemble_name (file, buf); |
dfdfa60f | 3882 | fputs ("@ha\n", file); |
a260abc9 DE |
3883 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
3884 | assemble_name (file, buf); | |
3885 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
3886 | } |
3887 | else | |
3888 | abort (); | |
3889 | ||
3890 | #else /* !USING_SVR4_H */ | |
3891 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
3892 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
3893 | reg_names[reg]); | |
c7ca610e RK |
3894 | assemble_name (file, buf); |
3895 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3896 | #endif /* USING_SVR4_H */ | |
3897 | } | |
3898 | ||
38c1f2d7 MM |
3899 | \f |
3900 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3901 | of the old frame is left in r12. */ | |
3902 | ||
3903 | void | |
3904 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3905 | FILE *file; | |
3906 | int size; | |
3907 | int copy_r12; | |
3908 | { | |
3909 | int neg_size = -size; | |
3910 | if (TARGET_UPDATE) | |
3911 | { | |
3912 | if (size < 32767) | |
3913 | asm_fprintf (file, | |
3914 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3915 | reg_names[1], neg_size, reg_names[1]); | |
3916 | else | |
3917 | { | |
3918 | if (copy_r12) | |
3919 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3920 | ||
9615f239 | 3921 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3922 | reg_names[0], (neg_size >> 16) & 0xffff, |
3923 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3924 | asm_fprintf (file, | |
3925 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3926 | reg_names[1], reg_names[1], reg_names[0]); | |
3927 | } | |
3928 | } | |
3929 | else | |
3930 | { | |
3931 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3932 | if (size < 32767) | |
aa4201ad | 3933 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 3934 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
3935 | else |
3936 | { | |
9615f239 | 3937 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3938 | reg_names[0], (neg_size >> 16) & 0xffff, |
3939 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3940 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3941 | reg_names[0], reg_names[1]); | |
3942 | } | |
3943 | ||
3944 | asm_fprintf (file, | |
3945 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3946 | reg_names[12], reg_names[1]); | |
3947 | } | |
3948 | } | |
3949 | ||
3950 | \f | |
9878760c | 3951 | /* Write function prologue. */ |
9878760c RK |
3952 | void |
3953 | output_prolog (file, size) | |
3954 | FILE *file; | |
296b8152 | 3955 | int size ATTRIBUTE_UNUSED; |
9878760c | 3956 | { |
4697a36c | 3957 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a | 3958 | int reg_size = info->reg_size; |
d330fd93 KG |
3959 | const char *store_reg; |
3960 | const char *load_reg; | |
979721f8 MM |
3961 | int sp_reg = 1; |
3962 | int sp_offset = 0; | |
b6c9286a | 3963 | |
8f802bfb | 3964 | if (TARGET_32BIT) |
b6c9286a | 3965 | { |
8f802bfb DE |
3966 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3967 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3968 | } |
3969 | else | |
3970 | { | |
8f802bfb DE |
3971 | store_reg = "\tstd %s,%d(%s)\n"; |
3972 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3973 | } |
9878760c | 3974 | |
4697a36c MM |
3975 | if (TARGET_DEBUG_STACK) |
3976 | debug_stack_info (info); | |
9878760c RK |
3977 | |
3978 | /* Write .extern for any function we will call to save and restore fp | |
3979 | values. */ | |
b6c9286a | 3980 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3981 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3982 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3983 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3984 | |
3985 | /* Write .extern for truncation routines, if needed. */ | |
3986 | if (rs6000_trunc_used && ! trunc_defined) | |
3987 | { | |
e138174b ILT |
3988 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3989 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3990 | trunc_defined = 1; |
3991 | } | |
4697a36c | 3992 | |
c764f757 RK |
3993 | /* Write .extern for AIX common mode routines, if needed. */ |
3994 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3995 | { | |
f6709c70 JW |
3996 | fputs ("\t.extern __mulh\n", file); |
3997 | fputs ("\t.extern __mull\n", file); | |
3998 | fputs ("\t.extern __divss\n", file); | |
3999 | fputs ("\t.extern __divus\n", file); | |
4000 | fputs ("\t.extern __quoss\n", file); | |
4001 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
4002 | common_mode_defined = 1; |
4003 | } | |
9878760c | 4004 | |
979721f8 | 4005 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 4006 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
4007 | { |
4008 | if (info->total_size < 32767) | |
38c1f2d7 | 4009 | sp_offset = info->total_size; |
979721f8 | 4010 | else |
38c1f2d7 MM |
4011 | sp_reg = 12; |
4012 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
4013 | } |
4014 | ||
9878760c | 4015 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
4016 | if (info->lr_save_p) |
4017 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
4018 | |
4019 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 4020 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 4021 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
4022 | |
4023 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
4024 | ourself. Otherwise, call function. Note that since they are statically |
4025 | linked, we do not need a nop following them. */ | |
4697a36c | 4026 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 4027 | { |
4697a36c | 4028 | int regno = info->first_fp_reg_save; |
979721f8 | 4029 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4030 | |
4031 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4032 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 4033 | } |
4697a36c MM |
4034 | else if (info->first_fp_reg_save != 64) |
4035 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
4036 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
4037 | |
4038 | /* Now save gpr's. */ | |
4697a36c | 4039 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4040 | { |
4697a36c | 4041 | int regno = info->first_gp_reg_save; |
979721f8 | 4042 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 4043 | |
4697a36c | 4044 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4045 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4046 | } |
4047 | ||
4697a36c MM |
4048 | else if (info->first_gp_reg_save != 32) |
4049 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
4050 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4051 | info->gp_save_offset + sp_offset, |
4052 | reg_names[sp_reg]); | |
9878760c | 4053 | |
b6c9286a MM |
4054 | /* Save main's arguments if we need to call a function */ |
4055 | #ifdef NAME__MAIN | |
4056 | if (info->main_save_p) | |
4057 | { | |
4058 | int regno; | |
5ebfb2ba | 4059 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
4060 | int size = info->main_size; |
4061 | ||
2682eae9 | 4062 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 4063 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
4064 | } |
4065 | #endif | |
4066 | ||
9878760c | 4067 | /* Save lr if we used it. */ |
4697a36c | 4068 | if (info->lr_save_p) |
979721f8 MM |
4069 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
4070 | reg_names[sp_reg]); | |
9878760c RK |
4071 | |
4072 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 4073 | if (info->cr_save_p) |
979721f8 MM |
4074 | { |
4075 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
4076 | { | |
4077 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
4078 | asm_fprintf (file, store_reg, reg_names[0], | |
4079 | info->cr_save_offset + sp_offset, | |
4080 | reg_names[sp_reg]); | |
4081 | } | |
4082 | else | |
4083 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
4084 | reg_names[sp_reg]); | |
4085 | } | |
9878760c | 4086 | |
8d30c4ee FS |
4087 | /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */ |
4088 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
4089 | && flag_pic == 1 && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) | |
4090 | { | |
4091 | if (!info->lr_save_p) | |
4092 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
4093 | ||
4094 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4095 | asm_fprintf (file, "\tmflr %s\n", reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
4096 | ||
4097 | if (!info->lr_save_p) | |
4098 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
4099 | } | |
4100 | ||
979721f8 MM |
4101 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
4102 | do it here. */ | |
4103 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
4104 | { | |
4105 | if (info->total_size < 32768) | |
4106 | { | |
4107 | int probe_offset = 4096; | |
4108 | while (probe_offset < info->total_size) | |
4109 | { | |
4110 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
4111 | probe_offset += 4096; | |
4112 | } | |
4113 | } | |
4114 | else | |
4115 | { | |
4116 | int probe_iterations = info->total_size / 4096; | |
4117 | static int probe_labelno = 0; | |
4118 | char buf[256]; | |
4119 | ||
4120 | if (probe_iterations < 32768) | |
4121 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
4122 | else | |
4123 | { | |
4124 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
4125 | if (probe_iterations & 0xffff) | |
4126 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
4127 | probe_iterations & 0xffff); | |
4128 | } | |
4129 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
4130 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4131 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
4132 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 4133 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
4134 | fputs ("\tbdnz ", file); |
4135 | assemble_name (file, buf); | |
949ea356 | 4136 | putc ('\n', file); |
979721f8 MM |
4137 | } |
4138 | } | |
4139 | ||
38c1f2d7 | 4140 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4141 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4142 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4143 | |
4144 | /* Set frame pointer, if needed. */ | |
4145 | if (frame_pointer_needed) | |
4697a36c | 4146 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4147 | |
b6c9286a MM |
4148 | #ifdef NAME__MAIN |
4149 | /* If we need to call a function to set things up for main, do so now | |
4150 | before dealing with the TOC. */ | |
4151 | if (info->main_p) | |
4152 | { | |
d330fd93 | 4153 | const char *prefix = ""; |
b6c9286a MM |
4154 | |
4155 | switch (DEFAULT_ABI) | |
4156 | { | |
4157 | case ABI_AIX: prefix = "."; break; | |
4158 | case ABI_NT: prefix = ".."; break; | |
4159 | } | |
4160 | ||
4161 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4162 | #ifdef RS6000_CALL_GLUE2 | |
4163 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4164 | #else | |
4165 | #ifdef RS6000_CALL_GLUE | |
4166 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
13f1623b DE |
4167 | { |
4168 | putc('\t', file); | |
4169 | asm_fprintf (file, RS6000_CALL_GLUE); | |
4170 | putc('\n', file); | |
4171 | } | |
b6c9286a MM |
4172 | #endif |
4173 | #endif | |
4174 | ||
4175 | if (info->main_save_p) | |
4176 | { | |
4177 | int regno; | |
4178 | int loc; | |
4179 | int size = info->main_size; | |
4180 | ||
4181 | if (info->total_size < 32767) | |
4182 | { | |
4183 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4184 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4185 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4186 | } | |
4187 | else | |
5ebfb2ba MM |
4188 | { |
4189 | int neg_size = info->main_save_offset - info->total_size; | |
4190 | loc = 0; | |
9615f239 | 4191 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
5ebfb2ba MM |
4192 | reg_names[0], (neg_size >> 16) & 0xffff, |
4193 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4194 | |
b6c9286a MM |
4195 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4196 | reg_names[1]); | |
4197 | ||
2682eae9 | 4198 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4199 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4200 | } | |
4201 | } | |
4202 | } | |
4203 | #endif | |
4204 | ||
4205 | ||
1875cc88 JW |
4206 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4207 | TOC_TABLE address into register 30. */ | |
4697a36c | 4208 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4209 | { |
4210 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
4211 | if (!profile_flag) |
4212 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 4213 | #endif |
38c1f2d7 | 4214 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4215 | } |
4697a36c | 4216 | |
b6c9286a MM |
4217 | if (DEFAULT_ABI == ABI_NT) |
4218 | { | |
4219 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4220 | fputs (".b:\n", file); | |
3daf36a4 | 4221 | } |
9878760c RK |
4222 | } |
4223 | ||
4224 | /* Write function epilogue. */ | |
4225 | ||
4226 | void | |
4227 | output_epilog (file, size) | |
4228 | FILE *file; | |
296b8152 | 4229 | int size ATTRIBUTE_UNUSED; |
9878760c | 4230 | { |
4697a36c | 4231 | rs6000_stack_t *info = rs6000_stack_info (); |
d330fd93 | 4232 | const char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4233 | rtx insn = get_last_insn (); |
979721f8 MM |
4234 | int sp_reg = 1; |
4235 | int sp_offset = 0; | |
9878760c | 4236 | |
9878760c RK |
4237 | /* If the last insn was a BARRIER, we don't have to write anything except |
4238 | the trace table. */ | |
4239 | if (GET_CODE (insn) == NOTE) | |
4240 | insn = prev_nonnote_insn (insn); | |
4241 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4242 | { | |
4243 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4244 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4245 | we know what size to update it with. */ | |
4246 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4247 | || info->total_size > 32767) |
979721f8 MM |
4248 | { |
4249 | /* Under V.4, don't reset the stack pointer until after we're done | |
4250 | loading the saved registers. */ | |
c81bebd7 | 4251 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4252 | sp_reg = 11; |
4253 | ||
4254 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4255 | } | |
4697a36c MM |
4256 | else if (info->push_p) |
4257 | { | |
c81bebd7 | 4258 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4259 | sp_offset = info->total_size; |
4697a36c | 4260 | else |
a260abc9 DE |
4261 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4262 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4263 | } |
9878760c | 4264 | |
b4ac57ab | 4265 | /* Get the old lr if we saved it. */ |
4697a36c | 4266 | if (info->lr_save_p) |
979721f8 | 4267 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4268 | |
4269 | /* Get the old cr if we saved it. */ | |
4697a36c | 4270 | if (info->cr_save_p) |
979721f8 | 4271 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4272 | |
b4ac57ab | 4273 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4274 | if (info->lr_save_p) |
4275 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4276 | |
9878760c | 4277 | /* Restore gpr's. */ |
4697a36c | 4278 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4279 | { |
4697a36c | 4280 | int regno = info->first_gp_reg_save; |
979721f8 | 4281 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4282 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4283 | |
4697a36c | 4284 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4285 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4286 | } |
4287 | ||
4697a36c MM |
4288 | else if (info->first_gp_reg_save != 32) |
4289 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4290 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4291 | info->gp_save_offset + sp_offset, |
4292 | reg_names[sp_reg]); | |
9878760c | 4293 | |
b4ac57ab | 4294 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4295 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4296 | { | |
4297 | int regno = info->first_fp_reg_save; | |
979721f8 | 4298 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4299 | |
4300 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4301 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4302 | } |
9878760c | 4303 | |
28edebac RK |
4304 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4305 | that were used. */ | |
4697a36c MM |
4306 | if (info->cr_save_p) |
4307 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4308 | (regs_ever_live[70] != 0) * 0x20 |
4309 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4310 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4311 | |
a6c2a102 DE |
4312 | /* If this is V.4, unwind the stack pointer after all of the loads |
4313 | have been done */ | |
4314 | if (sp_offset != 0) | |
a260abc9 DE |
4315 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4316 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4317 | else if (sp_reg != 1) |
4318 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4319 | ||
b4ac57ab RS |
4320 | /* If we have to restore more than two FP registers, branch to the |
4321 | restore function. It will return to our caller. */ | |
4697a36c MM |
4322 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4323 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4324 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4325 | else |
85638c0d | 4326 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4327 | } |
b4ac57ab | 4328 | |
9b30bae2 | 4329 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4330 | on its format. |
4331 | ||
4332 | We don't output a traceback table if -finhibit-size-directive was | |
4333 | used. The documentation for -finhibit-size-directive reads | |
4334 | ``don't output a @code{.size} assembler directive, or anything | |
4335 | else that would cause trouble if the function is split in the | |
4336 | middle, and the two halves are placed at locations far apart in | |
4337 | memory.'' The traceback table has this property, since it | |
4338 | includes the offset from the start of the function to the | |
4d30c363 MM |
4339 | traceback table itself. |
4340 | ||
4341 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4342 | different traceback table. */ |
4343 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4344 | { |
314fc5a9 ILT |
4345 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4346 | int fixed_parms, float_parms, parm_info; | |
4347 | int i; | |
4348 | ||
b6c9286a MM |
4349 | while (*fname == '.') /* V.4 encodes . in the name */ |
4350 | fname++; | |
4351 | ||
314fc5a9 ILT |
4352 | /* Need label immediately before tbtab, so we can compute its offset |
4353 | from the function start. */ | |
4354 | if (*fname == '*') | |
4355 | ++fname; | |
4356 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4357 | ASM_OUTPUT_LABEL (file, fname); | |
4358 | ||
4359 | /* The .tbtab pseudo-op can only be used for the first eight | |
4360 | expressions, since it can't handle the possibly variable | |
4361 | length fields that follow. However, if you omit the optional | |
4362 | fields, the assembler outputs zeros for all optional fields | |
4363 | anyways, giving each variable length field is minimum length | |
4364 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4365 | pseudo-op at all. */ | |
4366 | ||
4367 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4368 | that have to find it by searching forward from the entry | |
4369 | point or from the current pc. */ | |
19d2d16f | 4370 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4371 | |
4372 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4373 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4374 | |
4375 | /* Language type. Unfortunately, there doesn't seem to be any | |
4376 | official way to get this info, so we use language_string. C | |
4377 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
9517ead8 | 4378 | value for C for now. There is no official value for Java, |
6f573ff9 JL |
4379 | although IBM appears to be using 13. There is no official value |
4380 | for Chill, so we've choosen 44 pseudo-randomly. */ | |
314fc5a9 ILT |
4381 | if (! strcmp (language_string, "GNU C") |
4382 | || ! strcmp (language_string, "GNU Obj-C")) | |
4383 | i = 0; | |
4384 | else if (! strcmp (language_string, "GNU F77")) | |
4385 | i = 1; | |
4386 | else if (! strcmp (language_string, "GNU Ada")) | |
4387 | i = 3; | |
8b83775b | 4388 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4389 | i = 2; |
4390 | else if (! strcmp (language_string, "GNU C++")) | |
4391 | i = 9; | |
9517ead8 AG |
4392 | else if (! strcmp (language_string, "GNU Java")) |
4393 | i = 13; | |
6f573ff9 JL |
4394 | else if (! strcmp (language_string, "GNU CHILL")) |
4395 | i = 44; | |
314fc5a9 ILT |
4396 | else |
4397 | abort (); | |
4398 | fprintf (file, "%d,", i); | |
4399 | ||
4400 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4401 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4402 | from start of procedure stored in tbtab, internal function, function | |
4403 | has controlled storage, function has no toc, function uses fp, | |
4404 | function logs/aborts fp operations. */ | |
4405 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4406 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4407 | |
4408 | /* 6 bitfields: function is interrupt handler, name present in | |
4409 | proc table, function calls alloca, on condition directives | |
4410 | (controls stack walks, 3 bits), saves condition reg, saves | |
4411 | link reg. */ | |
4412 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4413 | set up as a frame pointer, even when there is no alloca call. */ | |
4414 | fprintf (file, "%d,", | |
4415 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4416 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4417 | |
4418 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4419 | (6 bits). */ | |
4420 | fprintf (file, "%d,", | |
4697a36c | 4421 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4422 | |
4423 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4424 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4425 | ||
4426 | { | |
4427 | /* Compute the parameter info from the function decl argument | |
4428 | list. */ | |
4429 | tree decl; | |
4430 | int next_parm_info_bit; | |
4431 | ||
4432 | next_parm_info_bit = 31; | |
4433 | parm_info = 0; | |
4434 | fixed_parms = 0; | |
4435 | float_parms = 0; | |
4436 | ||
4437 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4438 | decl; decl = TREE_CHAIN (decl)) | |
4439 | { | |
4440 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4441 | enum machine_mode mode = GET_MODE (parameter); | |
4442 | ||
4443 | if (GET_CODE (parameter) == REG) | |
4444 | { | |
4445 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4446 | { | |
4447 | int bits; | |
4448 | ||
4449 | float_parms++; | |
4450 | ||
4451 | if (mode == SFmode) | |
4452 | bits = 0x2; | |
4453 | else if (mode == DFmode) | |
4454 | bits = 0x3; | |
4455 | else | |
4456 | abort (); | |
4457 | ||
4458 | /* If only one bit will fit, don't or in this entry. */ | |
4459 | if (next_parm_info_bit > 0) | |
4460 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4461 | next_parm_info_bit -= 2; | |
4462 | } | |
4463 | else | |
4464 | { | |
4465 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4466 | + (UNITS_PER_WORD - 1)) | |
4467 | / UNITS_PER_WORD); | |
4468 | next_parm_info_bit -= 1; | |
4469 | } | |
4470 | } | |
4471 | } | |
4472 | } | |
4473 | ||
4474 | /* Number of fixed point parameters. */ | |
4475 | /* This is actually the number of words of fixed point parameters; thus | |
4476 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4477 | fprintf (file, "%d,", fixed_parms); | |
4478 | ||
4479 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4480 | all on stack. */ | |
4481 | /* This is actually the number of fp registers that hold parameters; | |
4482 | and thus the maximum value is 13. */ | |
4483 | /* Set parameters on stack bit if parameters are not in their original | |
4484 | registers, regardless of whether they are on the stack? Xlc | |
4485 | seems to set the bit when not optimizing. */ | |
4486 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4487 | ||
4488 | /* Optional fields follow. Some are variable length. */ | |
4489 | ||
4490 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4491 | 11 double float. */ | |
4492 | /* There is an entry for each parameter in a register, in the order that | |
4493 | they occur in the parameter list. Any intervening arguments on the | |
4494 | stack are ignored. If the list overflows a long (max possible length | |
4495 | 34 bits) then completely leave off all elements that don't fit. */ | |
4496 | /* Only emit this long if there was at least one parameter. */ | |
4497 | if (fixed_parms || float_parms) | |
4498 | fprintf (file, "\t.long %d\n", parm_info); | |
4499 | ||
4500 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4501 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4502 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4503 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4504 | fputs ("-.", file); |
314fc5a9 | 4505 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4506 | putc ('\n', file); |
314fc5a9 ILT |
4507 | |
4508 | /* Interrupt handler mask. */ | |
4509 | /* Omit this long, since we never set the interrupt handler bit | |
4510 | above. */ | |
4511 | ||
4512 | /* Number of CTL (controlled storage) anchors. */ | |
4513 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4514 | ||
4515 | /* Displacement into stack of each CTL anchor. */ | |
4516 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4517 | ||
4518 | /* Length of function name. */ | |
296b8152 | 4519 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4520 | |
4521 | /* Function name. */ | |
4522 | assemble_string (fname, strlen (fname)); | |
4523 | ||
4524 | /* Register for alloca automatic storage; this is always reg 31. | |
4525 | Only emit this if the alloca bit was set above. */ | |
4526 | if (frame_pointer_needed) | |
19d2d16f | 4527 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4528 | } |
4697a36c | 4529 | |
b6c9286a MM |
4530 | if (DEFAULT_ABI == ABI_NT) |
4531 | { | |
4532 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4533 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4534 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4535 | fputs (":\n", file); | |
4536 | } | |
9878760c | 4537 | } |
17167fd8 MM |
4538 | \f |
4539 | /* A C compound statement that outputs the assembler code for a thunk function, | |
4540 | used to implement C++ virtual function calls with multiple inheritance. The | |
4541 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
4542 | object parameter before handing control off to the real function. | |
4543 | ||
4544 | First, emit code to add the integer DELTA to the location that contains the | |
4545 | incoming first argument. Assume that this argument contains a pointer, and | |
4546 | is the one used to pass the `this' pointer in C++. This is the incoming | |
4547 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
4548 | addition must preserve the values of all other incoming arguments. | |
4549 | ||
4550 | After the addition, emit code to jump to FUNCTION, which is a | |
4551 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
4552 | the return address. Hence returning from FUNCTION will return to whoever | |
4553 | called the current `thunk'. | |
4554 | ||
4555 | The effect must be as if FUNCTION had been called directly with the adjusted | |
4556 | first argument. This macro is responsible for emitting all of the code for | |
4557 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
4558 | invoked. | |
4559 | ||
4560 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
4561 | extracted from it.) It might possibly be useful on some targets, but | |
4562 | probably not. | |
4563 | ||
4564 | If you do not define this macro, the target-independent code in the C++ | |
4565 | frontend will generate a less efficient heavyweight thunk that calls | |
4566 | FUNCTION instead of jumping to it. The generic approach does not support | |
4567 | varargs. */ | |
4568 | ||
4569 | void | |
4570 | output_mi_thunk (file, thunk_fndecl, delta, function) | |
4571 | FILE *file; | |
d330fd93 | 4572 | tree thunk_fndecl ATTRIBUTE_UNUSED; |
17167fd8 MM |
4573 | int delta; |
4574 | tree function; | |
4575 | { | |
d330fd93 KG |
4576 | const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; |
4577 | const char *prefix; | |
17167fd8 | 4578 | char *fname; |
d330fd93 KG |
4579 | const char *r0 = reg_names[0]; |
4580 | const char *sp = reg_names[1]; | |
4581 | const char *toc = reg_names[2]; | |
4582 | const char *schain = reg_names[11]; | |
4583 | const char *r12 = reg_names[12]; | |
17167fd8 MM |
4584 | char buf[512]; |
4585 | static int labelno = 0; | |
4586 | ||
4587 | /* Small constants that can be done by one add instruction */ | |
4588 | if (delta >= -32768 && delta <= 32767) | |
4589 | { | |
22b4a3b0 | 4590 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4591 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); |
4592 | else | |
4593 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); | |
4594 | } | |
4595 | ||
4596 | /* Large constants that can be done by one addis instruction */ | |
4597 | else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) | |
4598 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4599 | delta >> 16); | |
4600 | ||
4601 | /* 32-bit constants that can be done by an add and addis instruction. */ | |
4602 | else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) | |
4603 | { | |
22b4a3b0 | 4604 | /* Break into two pieces, propagating the sign bit from the low word to |
17167fd8 MM |
4605 | the upper word. */ |
4606 | int delta_high = delta >> 16; | |
4607 | int delta_low = delta & 0xffff; | |
4608 | if ((delta_low & 0x8000) != 0) | |
4609 | { | |
4610 | delta_high++; | |
4611 | delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ | |
4612 | } | |
4613 | ||
4614 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4615 | delta_high); | |
4616 | ||
22b4a3b0 | 4617 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4618 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); |
4619 | else | |
4620 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); | |
4621 | } | |
4622 | ||
4623 | /* 64-bit constants, fixme */ | |
4624 | else | |
4625 | abort (); | |
4626 | ||
4627 | /* Get the prefix in front of the names. */ | |
4628 | switch (DEFAULT_ABI) | |
4629 | { | |
4630 | default: | |
4631 | abort (); | |
4632 | ||
4633 | case ABI_AIX: | |
4634 | prefix = "."; | |
4635 | break; | |
4636 | ||
4637 | case ABI_V4: | |
4638 | case ABI_AIX_NODESC: | |
4639 | case ABI_SOLARIS: | |
4640 | prefix = ""; | |
4641 | break; | |
4642 | ||
4643 | case ABI_NT: | |
4644 | prefix = ".."; | |
4645 | break; | |
4646 | } | |
4647 | ||
4648 | /* If the function is compiled in this module, jump to it directly. | |
4649 | Otherwise, load up its address and jump to it. */ | |
4650 | ||
4651 | fname = XSTR (XEXP (DECL_RTL (function), 0), 0); | |
42820a49 | 4652 | |
efc97ef0 | 4653 | if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) |
22b4a3b0 FS |
4654 | && ! lookup_attribute ("longcall", |
4655 | TYPE_ATTRIBUTES (TREE_TYPE (function)))) | |
17167fd8 MM |
4656 | { |
4657 | fprintf (file, "\tb %s", prefix); | |
4658 | assemble_name (file, fname); | |
22b4a3b0 | 4659 | if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file); |
949ea356 | 4660 | putc ('\n', file); |
17167fd8 MM |
4661 | } |
4662 | ||
4663 | else | |
4664 | { | |
4665 | switch (DEFAULT_ABI) | |
4666 | { | |
4667 | default: | |
4668 | case ABI_NT: | |
4669 | abort (); | |
4670 | ||
4671 | case ABI_AIX: | |
4672 | /* Set up a TOC entry for the function. */ | |
4673 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4674 | toc_section (); | |
4675 | ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); | |
4676 | labelno++; | |
4677 | ||
4678 | /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since | |
4679 | there will be only one TOC entry for this function. */ | |
4680 | fputs ("\t.tc\t", file); | |
4681 | assemble_name (file, buf); | |
4682 | fputs ("[TC],", file); | |
4683 | assemble_name (file, buf); | |
4684 | putc ('\n', file); | |
4685 | text_section (); | |
4686 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); | |
4687 | assemble_name (file, buf); | |
4688 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4689 | asm_fprintf (file, | |
4690 | (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", | |
4691 | r0, r12); | |
4692 | ||
4693 | asm_fprintf (file, | |
4694 | (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", | |
4695 | toc, r12); | |
4696 | ||
4697 | asm_fprintf (file, "\tmtctr %s\n", r0); | |
4698 | asm_fprintf (file, | |
4699 | (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", | |
4700 | schain, r12); | |
4701 | ||
4702 | asm_fprintf (file, "\tbctr\n"); | |
4703 | break; | |
4704 | ||
17167fd8 | 4705 | case ABI_V4: |
22b4a3b0 FS |
4706 | fprintf (file, "\tb %s", prefix); |
4707 | assemble_name (file, fname); | |
4708 | if (flag_pic) fputs ("@plt", file); | |
949ea356 | 4709 | putc ('\n', file); |
22b4a3b0 FS |
4710 | break; |
4711 | ||
4712 | /* Don't use r11, that contains the static chain, just use r0/r12. */ | |
17167fd8 MM |
4713 | case ABI_AIX_NODESC: |
4714 | case ABI_SOLARIS: | |
4715 | if (flag_pic == 1) | |
4716 | { | |
4717 | fprintf (file, "\tmflr %s\n", r0); | |
4718 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4719 | asm_fprintf (file, "\tmflr %s\n", r12); | |
4720 | asm_fprintf (file, "\tmtlr %s\n", r0); | |
4721 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4722 | assemble_name (file, fname); | |
4723 | asm_fprintf (file, "@got(%s)\n", r12); | |
42820a49 MM |
4724 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4725 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4726 | } |
4727 | #if TARGET_ELF | |
4728 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4729 | { | |
4730 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4731 | labelno++; | |
4732 | fprintf (file, "\tmflr %s\n", r0); | |
4733 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); | |
4734 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
4735 | rs6000_output_load_toc_table (file, 12); | |
4736 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4737 | assemble_name (file, buf); | |
4738 | asm_fprintf (file, "(%s)\n", r12); | |
4739 | asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); | |
4740 | asm_fprintf (file, "\tmtlr %s\n", r12); | |
42820a49 MM |
4741 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4742 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4743 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
4744 | assemble_name (file, buf); | |
4745 | fputs (" = .-.LCTOC1\n", file); | |
4746 | fputs ("\t.long ", file); | |
4747 | assemble_name (file, fname); | |
4748 | fputs ("\n\t.previous\n", file); | |
4749 | } | |
42820a49 MM |
4750 | #endif /* TARGET_ELF */ |
4751 | ||
17167fd8 MM |
4752 | else |
4753 | { | |
42820a49 | 4754 | asm_fprintf (file, "\t{liu|lis} %s,", r12); |
17167fd8 MM |
4755 | assemble_name (file, fname); |
4756 | asm_fprintf (file, "@ha\n"); | |
42820a49 | 4757 | asm_fprintf (file, "\t{cal|la} %s,", r12); |
17167fd8 | 4758 | assemble_name (file, fname); |
42820a49 MM |
4759 | asm_fprintf (file, "@l(%s)\n", r12); |
4760 | asm_fprintf (file, "\tmtctr %s\n", r12); | |
4761 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4762 | } |
4763 | ||
17167fd8 MM |
4764 | break; |
4765 | } | |
4766 | } | |
4767 | } | |
4768 | ||
9878760c RK |
4769 | \f |
4770 | /* Output a TOC entry. We derive the entry name from what is | |
4771 | being written. */ | |
4772 | ||
4773 | void | |
4774 | output_toc (file, x, labelno) | |
4775 | FILE *file; | |
4776 | rtx x; | |
4777 | int labelno; | |
4778 | { | |
4779 | char buf[256]; | |
4780 | char *name = buf; | |
b6c9286a | 4781 | char *real_name; |
9878760c RK |
4782 | rtx base = x; |
4783 | int offset = 0; | |
4784 | ||
4697a36c MM |
4785 | if (TARGET_NO_TOC) |
4786 | abort (); | |
4787 | ||
ff1720ed RK |
4788 | /* if we're going to put a double constant in the TOC, make sure it's |
4789 | aligned properly when strict alignment is on. */ | |
4790 | if (GET_CODE (x) == CONST_DOUBLE | |
4791 | && STRICT_ALIGNMENT | |
4792 | && GET_MODE (x) == DFmode | |
4793 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4794 | ASM_OUTPUT_ALIGN (file, 3); | |
4795 | } | |
4796 | ||
4797 | ||
b6c9286a | 4798 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4799 | { |
4800 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4801 | fprintf (file, "%d = .-", labelno); | |
4802 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4803 | fputs ("1\n", file); |
d14a6d05 MM |
4804 | } |
4805 | else | |
d14a6d05 | 4806 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4807 | |
37c37a57 RK |
4808 | /* Handle FP constants specially. Note that if we have a minimal |
4809 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4810 | FP constants. */ | |
042259f2 | 4811 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4812 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4813 | { |
042259f2 DE |
4814 | REAL_VALUE_TYPE rv; |
4815 | long k[2]; | |
0adc764e | 4816 | |
042259f2 DE |
4817 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4818 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
31bfaa0b | 4819 | |
13ded975 DE |
4820 | if (TARGET_64BIT) |
4821 | { | |
4822 | if (TARGET_MINIMAL_TOC) | |
4823 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
4824 | else | |
4825 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
4826 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
4827 | return; | |
4828 | } | |
1875cc88 | 4829 | else |
13ded975 DE |
4830 | { |
4831 | if (TARGET_MINIMAL_TOC) | |
31bfaa0b | 4832 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]); |
13ded975 | 4833 | else |
31bfaa0b | 4834 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
4835 | k[0], k[1], k[0], k[1]); |
4836 | return; | |
4837 | } | |
9878760c RK |
4838 | } |
4839 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4840 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4841 | { |
042259f2 DE |
4842 | REAL_VALUE_TYPE rv; |
4843 | long l; | |
9878760c | 4844 | |
042259f2 DE |
4845 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4846 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4847 | ||
31bfaa0b DE |
4848 | if (TARGET_64BIT) |
4849 | { | |
4850 | if (TARGET_MINIMAL_TOC) | |
4851 | fprintf (file, "\t.llong 0x%lx00000000\n", l); | |
4852 | else | |
4853 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l); | |
4854 | return; | |
4855 | } | |
042259f2 | 4856 | else |
31bfaa0b DE |
4857 | { |
4858 | if (TARGET_MINIMAL_TOC) | |
4859 | fprintf (file, "\t.long 0x%lx\n", l); | |
4860 | else | |
4861 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l); | |
4862 | return; | |
4863 | } | |
042259f2 DE |
4864 | } |
4865 | else if (GET_MODE (x) == DImode | |
4866 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4867 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4868 | { | |
4869 | HOST_WIDE_INT low; | |
4870 | HOST_WIDE_INT high; | |
4871 | ||
4872 | if (GET_CODE (x) == CONST_DOUBLE) | |
4873 | { | |
4874 | low = CONST_DOUBLE_LOW (x); | |
4875 | high = CONST_DOUBLE_HIGH (x); | |
4876 | } | |
4877 | else | |
4878 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4879 | { | |
4880 | low = INTVAL (x); | |
4881 | high = (low < 0) ? ~0 : 0; | |
4882 | } | |
4883 | #else | |
4884 | { | |
4885 | low = INTVAL (x) & 0xffffffff; | |
4886 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4887 | } | |
4888 | #endif | |
9878760c | 4889 | |
13ded975 DE |
4890 | if (TARGET_64BIT) |
4891 | { | |
4892 | if (TARGET_MINIMAL_TOC) | |
4893 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
4894 | else | |
4895 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
4896 | (long)high, (long)low, (long)high, (long)low); | |
4897 | return; | |
4898 | } | |
1875cc88 | 4899 | else |
13ded975 DE |
4900 | { |
4901 | if (TARGET_MINIMAL_TOC) | |
3cb999d8 | 4902 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", |
13ded975 DE |
4903 | (long)high, (long)low); |
4904 | else | |
3cb999d8 | 4905 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
4906 | (long)high, (long)low, (long)high, (long)low); |
4907 | return; | |
4908 | } | |
9878760c RK |
4909 | } |
4910 | ||
4911 | if (GET_CODE (x) == CONST) | |
4912 | { | |
4913 | base = XEXP (XEXP (x, 0), 0); | |
4914 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4915 | } | |
4916 | ||
4917 | if (GET_CODE (base) == SYMBOL_REF) | |
4918 | name = XSTR (base, 0); | |
4919 | else if (GET_CODE (base) == LABEL_REF) | |
4920 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4921 | else if (GET_CODE (base) == CODE_LABEL) | |
4922 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4923 | else | |
4924 | abort (); | |
4925 | ||
2e4eb9b0 | 4926 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4927 | if (TARGET_MINIMAL_TOC) |
13ded975 | 4928 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
4929 | else |
4930 | { | |
b6c9286a | 4931 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4932 | |
1875cc88 JW |
4933 | if (offset < 0) |
4934 | fprintf (file, ".N%d", - offset); | |
4935 | else if (offset) | |
4936 | fprintf (file, ".P%d", offset); | |
9878760c | 4937 | |
19d2d16f | 4938 | fputs ("[TC],", file); |
1875cc88 | 4939 | } |
581bc4de MM |
4940 | |
4941 | /* Currently C++ toc references to vtables can be emitted before it | |
4942 | is decided whether the vtable is public or private. If this is | |
4943 | the case, then the linker will eventually complain that there is | |
4944 | a TOC reference to an unknown section. Thus, for vtables only, | |
4945 | we emit the TOC reference to reference the symbol and not the | |
4946 | section. */ | |
3807773b | 4947 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4948 | { |
3807773b | 4949 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4950 | if (offset < 0) |
4951 | fprintf (file, "%d", offset); | |
4952 | else if (offset > 0) | |
4953 | fprintf (file, "+%d", offset); | |
4954 | } | |
4955 | else | |
4956 | output_addr_const (file, x); | |
19d2d16f | 4957 | putc ('\n', file); |
9878760c RK |
4958 | } |
4959 | \f | |
4960 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4961 | starting at P to FILE. | |
4962 | ||
4963 | On the RS/6000, we have to do this using the .byte operation and | |
4964 | write out special characters outside the quoted string. | |
4965 | Also, the assembler is broken; very long strings are truncated, | |
4966 | so we must artificially break them up early. */ | |
4967 | ||
4968 | void | |
4969 | output_ascii (file, p, n) | |
4970 | FILE *file; | |
d330fd93 | 4971 | const char *p; |
9878760c RK |
4972 | int n; |
4973 | { | |
4974 | char c; | |
4975 | int i, count_string; | |
d330fd93 KG |
4976 | const char *for_string = "\t.byte \""; |
4977 | const char *for_decimal = "\t.byte "; | |
4978 | const char *to_close = NULL; | |
9878760c RK |
4979 | |
4980 | count_string = 0; | |
4981 | for (i = 0; i < n; i++) | |
4982 | { | |
4983 | c = *p++; | |
4984 | if (c >= ' ' && c < 0177) | |
4985 | { | |
4986 | if (for_string) | |
4987 | fputs (for_string, file); | |
4988 | putc (c, file); | |
4989 | ||
4990 | /* Write two quotes to get one. */ | |
4991 | if (c == '"') | |
4992 | { | |
4993 | putc (c, file); | |
4994 | ++count_string; | |
4995 | } | |
4996 | ||
4997 | for_string = NULL; | |
4998 | for_decimal = "\"\n\t.byte "; | |
4999 | to_close = "\"\n"; | |
5000 | ++count_string; | |
5001 | ||
5002 | if (count_string >= 512) | |
5003 | { | |
5004 | fputs (to_close, file); | |
5005 | ||
5006 | for_string = "\t.byte \""; | |
5007 | for_decimal = "\t.byte "; | |
5008 | to_close = NULL; | |
5009 | count_string = 0; | |
5010 | } | |
5011 | } | |
5012 | else | |
5013 | { | |
5014 | if (for_decimal) | |
5015 | fputs (for_decimal, file); | |
5016 | fprintf (file, "%d", c); | |
5017 | ||
5018 | for_string = "\n\t.byte \""; | |
5019 | for_decimal = ", "; | |
5020 | to_close = "\n"; | |
5021 | count_string = 0; | |
5022 | } | |
5023 | } | |
5024 | ||
5025 | /* Now close the string if we have written one. Then end the line. */ | |
5026 | if (to_close) | |
5027 | fprintf (file, to_close); | |
5028 | } | |
5029 | \f | |
5030 | /* Generate a unique section name for FILENAME for a section type | |
5031 | represented by SECTION_DESC. Output goes into BUF. | |
5032 | ||
5033 | SECTION_DESC can be any string, as long as it is different for each | |
5034 | possible section type. | |
5035 | ||
5036 | We name the section in the same manner as xlc. The name begins with an | |
5037 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
5038 | names) with the last period replaced by the string SECTION_DESC. If |
5039 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
5040 | the name. */ | |
9878760c RK |
5041 | |
5042 | void | |
5043 | rs6000_gen_section_name (buf, filename, section_desc) | |
5044 | char **buf; | |
5045 | char *filename; | |
5046 | char *section_desc; | |
5047 | { | |
d330fd93 | 5048 | char *q, *after_last_slash, *last_period = 0; |
9878760c RK |
5049 | char *p; |
5050 | int len; | |
9878760c RK |
5051 | |
5052 | after_last_slash = filename; | |
5053 | for (q = filename; *q; q++) | |
11e5fe42 RK |
5054 | { |
5055 | if (*q == '/') | |
5056 | after_last_slash = q + 1; | |
5057 | else if (*q == '.') | |
5058 | last_period = q; | |
5059 | } | |
9878760c | 5060 | |
11e5fe42 | 5061 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
5062 | *buf = (char *) permalloc (len); |
5063 | ||
5064 | p = *buf; | |
5065 | *p++ = '_'; | |
5066 | ||
5067 | for (q = after_last_slash; *q; q++) | |
5068 | { | |
11e5fe42 | 5069 | if (q == last_period) |
9878760c RK |
5070 | { |
5071 | strcpy (p, section_desc); | |
5072 | p += strlen (section_desc); | |
9878760c RK |
5073 | } |
5074 | ||
e9a780ec | 5075 | else if (ISALNUM (*q)) |
9878760c RK |
5076 | *p++ = *q; |
5077 | } | |
5078 | ||
11e5fe42 | 5079 | if (last_period == 0) |
9878760c RK |
5080 | strcpy (p, section_desc); |
5081 | else | |
5082 | *p = '\0'; | |
5083 | } | |
e165f3f0 RK |
5084 | \f |
5085 | /* Write function profiler code. */ | |
5086 | ||
5087 | void | |
5088 | output_function_profiler (file, labelno) | |
5089 | FILE *file; | |
5090 | int labelno; | |
5091 | { | |
5092 | /* The last used parameter register. */ | |
5093 | int last_parm_reg; | |
5094 | int i, j; | |
3daf36a4 | 5095 | char buf[100]; |
e165f3f0 | 5096 | |
3daf36a4 | 5097 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 5098 | switch (DEFAULT_ABI) |
3daf36a4 | 5099 | { |
38c1f2d7 MM |
5100 | default: |
5101 | abort (); | |
5102 | ||
5103 | case ABI_V4: | |
5104 | case ABI_SOLARIS: | |
5105 | case ABI_AIX_NODESC: | |
5106 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
5107 | if (flag_pic == 1) | |
5108 | { | |
dfdfa60f DE |
5109 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
5110 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
5111 | reg_names[0], reg_names[1]); | |
17167fd8 | 5112 | asm_fprintf (file, "\tmflr %s\n", reg_names[12]); |
dfdfa60f | 5113 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); |
38c1f2d7 | 5114 | assemble_name (file, buf); |
17167fd8 | 5115 | asm_fprintf (file, "@got(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5116 | } |
5117 | #if TARGET_ELF | |
5118 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
5119 | { | |
dfdfa60f DE |
5120 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5121 | reg_names[0], reg_names[1]); | |
38c1f2d7 | 5122 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
17167fd8 MM |
5123 | rs6000_output_load_toc_table (file, 12); |
5124 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); | |
38c1f2d7 | 5125 | assemble_name (file, buf); |
17167fd8 | 5126 | asm_fprintf (file, "X(%s)\n", reg_names[12]); |
dfdfa60f | 5127 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
034e84c4 | 5128 | assemble_name (file, buf); |
dfdfa60f DE |
5129 | fputs ("X = .-.LCTOC1\n", file); |
5130 | fputs ("\t.long ", file); | |
034e84c4 MM |
5131 | assemble_name (file, buf); |
5132 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
5133 | } |
5134 | #endif | |
38c1f2d7 MM |
5135 | else |
5136 | { | |
17167fd8 | 5137 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); |
38c1f2d7 | 5138 | assemble_name (file, buf); |
dfdfa60f | 5139 | fputs ("@ha\n", file); |
b5253831 DE |
5140 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5141 | reg_names[0], reg_names[1]); | |
a260abc9 | 5142 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); |
38c1f2d7 | 5143 | assemble_name (file, buf); |
17167fd8 | 5144 | asm_fprintf (file, "@l(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5145 | } |
5146 | ||
b5253831 DE |
5147 | if (current_function_needs_context) |
5148 | asm_fprintf (file, "\tmr %s,%s\n", | |
5149 | reg_names[30], reg_names[STATIC_CHAIN_REGNUM]); | |
38c1f2d7 | 5150 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); |
b5253831 DE |
5151 | if (current_function_needs_context) |
5152 | asm_fprintf (file, "\tmr %s,%s\n", | |
5153 | reg_names[STATIC_CHAIN_REGNUM], reg_names[30]); | |
38c1f2d7 MM |
5154 | break; |
5155 | ||
5156 | case ABI_AIX: | |
5157 | /* Set up a TOC entry for the profiler label. */ | |
5158 | toc_section (); | |
5159 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
5160 | if (TARGET_MINIMAL_TOC) | |
5161 | { | |
13ded975 | 5162 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
5163 | assemble_name (file, buf); |
5164 | putc ('\n', file); | |
5165 | } | |
5166 | else | |
5167 | { | |
5168 | fputs ("\t.tc\t", file); | |
5169 | assemble_name (file, buf); | |
5170 | fputs ("[TC],", file); | |
5171 | assemble_name (file, buf); | |
5172 | putc ('\n', file); | |
5173 | } | |
5174 | text_section (); | |
e165f3f0 RK |
5175 | |
5176 | /* Figure out last used parameter register. The proper thing to do is | |
5177 | to walk incoming args of the function. A function might have live | |
5178 | parameter registers even if it has no incoming args. */ | |
5179 | ||
38c1f2d7 MM |
5180 | for (last_parm_reg = 10; |
5181 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
5182 | last_parm_reg--) | |
5183 | ; | |
e165f3f0 | 5184 | |
b5253831 DE |
5185 | /* Save parameter registers in regs 23-30 and static chain in r22. |
5186 | Don't overwrite reg 31, since it might be set up as the frame pointer. */ | |
e165f3f0 | 5187 | |
38c1f2d7 MM |
5188 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5189 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
b5253831 DE |
5190 | if (current_function_needs_context) |
5191 | asm_fprintf (file, "\tmr %d,%d\n", j, STATIC_CHAIN_REGNUM); | |
e165f3f0 RK |
5192 | |
5193 | /* Load location address into r3, and call mcount. */ | |
5194 | ||
38c1f2d7 | 5195 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
5196 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
5197 | reg_names[3]); | |
38c1f2d7 | 5198 | assemble_name (file, buf); |
13f1623b DE |
5199 | asm_fprintf (file, "(%s)\n\tbl %s\n\t", reg_names[2], RS6000_MCOUNT); |
5200 | asm_fprintf (file, RS6000_CALL_GLUE); | |
5201 | putc('\n', file); | |
e165f3f0 | 5202 | |
b5253831 | 5203 | /* Restore parameter registers and static chain. */ |
e165f3f0 | 5204 | |
38c1f2d7 MM |
5205 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5206 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
b5253831 DE |
5207 | if (current_function_needs_context) |
5208 | asm_fprintf (file, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM, j); | |
5209 | ||
38c1f2d7 MM |
5210 | break; |
5211 | } | |
e165f3f0 | 5212 | } |
a251ffd0 TG |
5213 | |
5214 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
5215 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
5216 | ||
5217 | int | |
a06faf84 | 5218 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
5219 | rtx insn; |
5220 | rtx link; | |
296b8152 | 5221 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
5222 | int cost; |
5223 | { | |
5224 | if (! recog_memoized (insn)) | |
5225 | return 0; | |
5226 | ||
5227 | if (REG_NOTE_KIND (link) != 0) | |
5228 | return 0; | |
5229 | ||
5230 | if (REG_NOTE_KIND (link) == 0) | |
5231 | { | |
5232 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
5233 | cycles later. */ | |
5234 | ||
5235 | /* Tell the first scheduling pass about the latency between a mtctr | |
5236 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
5237 | know about this latency since the mtctr instruction, which has the | |
5238 | latency associated to it, will be generated by reload. */ | |
5239 | if (get_attr_type (insn) == TYPE_JMPREG) | |
5240 | return TARGET_POWER ? 5 : 4; | |
5241 | ||
5242 | /* Fall out to return default cost. */ | |
5243 | } | |
5244 | ||
5245 | return cost; | |
5246 | } | |
b6c9286a | 5247 | |
bef84347 VM |
5248 | /* A C statement (sans semicolon) to update the integer scheduling priority |
5249 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
5250 | increase the priority to execute INSN later. Do not define this macro if | |
5251 | you do not need to adjust the scheduling priorities of insns. */ | |
5252 | ||
5253 | int | |
5254 | rs6000_adjust_priority (insn, priority) | |
d330fd93 | 5255 | rtx insn ATTRIBUTE_UNUSED; |
bef84347 VM |
5256 | int priority; |
5257 | { | |
5258 | /* On machines (like the 750) which have asymetric integer units, where one | |
5259 | integer unit can do multiply and divides and the other can't, reduce the | |
5260 | priority of multiply/divide so it is scheduled before other integer | |
5261 | operationss. */ | |
5262 | ||
5263 | #if 0 | |
5264 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
5265 | return priority; | |
5266 | ||
5267 | if (GET_CODE (PATTERN (insn)) == USE) | |
5268 | return priority; | |
5269 | ||
5270 | switch (rs6000_cpu_attr) { | |
5271 | case CPU_PPC750: | |
5272 | switch (get_attr_type (insn)) | |
5273 | { | |
5274 | default: | |
5275 | break; | |
5276 | ||
5277 | case TYPE_IMUL: | |
5278 | case TYPE_IDIV: | |
3cb999d8 DE |
5279 | fprintf (stderr, "priority was %#x (%d) before adjustment\n", |
5280 | priority, priority); | |
bef84347 VM |
5281 | if (priority >= 0 && priority < 0x01000000) |
5282 | priority >>= 3; | |
5283 | break; | |
5284 | } | |
5285 | } | |
5286 | #endif | |
5287 | ||
5288 | return priority; | |
5289 | } | |
5290 | ||
b6c9286a MM |
5291 | /* Return how many instructions the machine can issue per cycle */ |
5292 | int get_issue_rate() | |
5293 | { | |
5294 | switch (rs6000_cpu_attr) { | |
3cb999d8 DE |
5295 | case CPU_RIOS1: /* ? */ |
5296 | case CPU_RS64A: | |
5297 | case CPU_PPC601: /* ? */ | |
5298 | return 3; | |
b6c9286a | 5299 | case CPU_PPC603: |
bef84347 VM |
5300 | case CPU_PPC750: |
5301 | return 2; | |
3cb999d8 | 5302 | case CPU_RIOS2: |
b6c9286a | 5303 | case CPU_PPC604: |
19684119 | 5304 | case CPU_PPC604E: |
b6c9286a | 5305 | case CPU_PPC620: |
3cb999d8 | 5306 | case CPU_PPC630: |
b6c9286a MM |
5307 | return 4; |
5308 | default: | |
5309 | return 1; | |
5310 | } | |
5311 | } | |
5312 | ||
b6c9286a MM |
5313 | \f |
5314 | /* Output assembler code for a block containing the constant parts | |
5315 | of a trampoline, leaving space for the variable parts. | |
5316 | ||
5317 | The trampoline should set the static chain pointer to value placed | |
5318 | into the trampoline and should branch to the specified routine. */ | |
5319 | ||
5320 | void | |
5321 | rs6000_trampoline_template (file) | |
5322 | FILE *file; | |
5323 | { | |
d330fd93 KG |
5324 | const char *sc = reg_names[STATIC_CHAIN_REGNUM]; |
5325 | const char *r0 = reg_names[0]; | |
5326 | const char *r2 = reg_names[2]; | |
b6c9286a MM |
5327 | |
5328 | switch (DEFAULT_ABI) | |
5329 | { | |
5330 | default: | |
5331 | abort (); | |
5332 | ||
5333 | /* Under AIX, this is not code at all, but merely a data area, | |
5334 | since that is the way all functions are called. The first word is | |
5335 | the address of the function, the second word is the TOC pointer (r2), | |
5336 | and the third word is the static chain value. */ | |
5337 | case ABI_AIX: | |
b6c9286a MM |
5338 | break; |
5339 | ||
5340 | ||
5341 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
5342 | do the full gory code to load up the static chain. */ | |
5343 | case ABI_V4: | |
c81bebd7 | 5344 | case ABI_SOLARIS: |
b6c9286a | 5345 | case ABI_AIX_NODESC: |
b6c9286a MM |
5346 | break; |
5347 | ||
5348 | /* NT function pointers point to a two word area (real address, TOC) | |
5349 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
5350 | use the function field to point to ..LTRAMP1 and the toc field |
5351 | to point to the whole table. */ | |
b6c9286a | 5352 | case ABI_NT: |
7c59dc5d MM |
5353 | if (STATIC_CHAIN_REGNUM == 0 |
5354 | || STATIC_CHAIN_REGNUM == 2 | |
5355 | || TARGET_64BIT | |
5356 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
5357 | abort (); |
5358 | ||
7c59dc5d MM |
5359 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
5360 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
5361 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
5362 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
5363 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 5364 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
5365 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
5366 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
5367 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
5368 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
5369 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
5370 | break; |
5371 | } | |
5372 | ||
5373 | return; | |
5374 | } | |
5375 | ||
5376 | /* Length in units of the trampoline for entering a nested function. */ | |
5377 | ||
5378 | int | |
5379 | rs6000_trampoline_size () | |
5380 | { | |
5381 | int ret = 0; | |
5382 | ||
5383 | switch (DEFAULT_ABI) | |
5384 | { | |
5385 | default: | |
5386 | abort (); | |
5387 | ||
5388 | case ABI_AIX: | |
8f802bfb | 5389 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
5390 | break; |
5391 | ||
5392 | case ABI_V4: | |
c81bebd7 | 5393 | case ABI_SOLARIS: |
b6c9286a | 5394 | case ABI_AIX_NODESC: |
03a7e1a5 | 5395 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
5396 | break; |
5397 | ||
5398 | case ABI_NT: | |
7c59dc5d | 5399 | ret = 20; |
b6c9286a MM |
5400 | break; |
5401 | } | |
5402 | ||
5403 | return ret; | |
5404 | } | |
5405 | ||
5406 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
5407 | FNADDR is an RTX for the address of the function's pure code. | |
5408 | CXT is an RTX for the static chain value for the function. */ | |
5409 | ||
5410 | void | |
5411 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
5412 | rtx addr; | |
5413 | rtx fnaddr; | |
5414 | rtx cxt; | |
5415 | { | |
ac2a93a1 | 5416 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
5417 | int regsize = (TARGET_32BIT) ? 4 : 8; |
5418 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
5419 | |
5420 | switch (DEFAULT_ABI) | |
5421 | { | |
5422 | default: | |
5423 | abort (); | |
5424 | ||
8bd04c56 | 5425 | /* Macros to shorten the code expansions below. */ |
39403d82 DE |
5426 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
5427 | #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 5428 | |
b6c9286a MM |
5429 | /* Under AIX, just build the 3 word function descriptor */ |
5430 | case ABI_AIX: | |
8bd04c56 MM |
5431 | { |
5432 | rtx fn_reg = gen_reg_rtx (pmode); | |
5433 | rtx toc_reg = gen_reg_rtx (pmode); | |
5434 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5435 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
5436 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
5437 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
5438 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
5439 | } | |
b6c9286a MM |
5440 | break; |
5441 | ||
eaf1bcf1 | 5442 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 5443 | case ABI_V4: |
c81bebd7 | 5444 | case ABI_SOLARIS: |
b6c9286a | 5445 | case ABI_AIX_NODESC: |
39403d82 | 5446 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
5447 | FALSE, VOIDmode, 4, |
5448 | addr, pmode, | |
5449 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5450 | fnaddr, pmode, | |
5451 | ctx_reg, pmode); | |
b6c9286a MM |
5452 | break; |
5453 | ||
8bd04c56 MM |
5454 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5455 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5456 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5457 | case ABI_NT: |
8bd04c56 MM |
5458 | { |
5459 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5460 | rtx fn_reg = gen_reg_rtx (pmode); | |
5461 | rtx toc_reg = gen_reg_rtx (pmode); | |
5462 | ||
39403d82 | 5463 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5464 | addr = force_reg (pmode, addr); |
5465 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5466 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5467 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5468 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5469 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5470 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5471 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5472 | } |
b6c9286a MM |
5473 | break; |
5474 | } | |
5475 | ||
5476 | return; | |
5477 | } | |
7509c759 MM |
5478 | |
5479 | \f | |
5480 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5481 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5482 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5483 | ||
5484 | int | |
5485 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5486 | tree decl ATTRIBUTE_UNUSED; |
5487 | tree attributes ATTRIBUTE_UNUSED; | |
5488 | tree identifier ATTRIBUTE_UNUSED; | |
5489 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5490 | { |
5491 | return 0; | |
5492 | } | |
5493 | ||
5494 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5495 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5496 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5497 | ||
5498 | int | |
5499 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5500 | tree type; | |
296b8152 | 5501 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5502 | tree identifier; |
5503 | tree args; | |
5504 | { | |
5505 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5506 | && TREE_CODE (type) != FIELD_DECL | |
5507 | && TREE_CODE (type) != TYPE_DECL) | |
5508 | return 0; | |
5509 | ||
6a4cee5f MM |
5510 | /* Longcall attribute says that the function is not within 2**26 bytes |
5511 | of the current function, and to do an indirect call. */ | |
5512 | if (is_attribute_p ("longcall", identifier)) | |
5513 | return (args == NULL_TREE); | |
5514 | ||
7509c759 MM |
5515 | if (DEFAULT_ABI == ABI_NT) |
5516 | { | |
5517 | /* Stdcall attribute says callee is responsible for popping arguments | |
5518 | if they are not variable. */ | |
5519 | if (is_attribute_p ("stdcall", identifier)) | |
5520 | return (args == NULL_TREE); | |
5521 | ||
5522 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5523 | if (is_attribute_p ("cdecl", identifier)) | |
5524 | return (args == NULL_TREE); | |
5525 | ||
38e01259 | 5526 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5527 | indirectly through a __imp_<name> pointer. */ |
5528 | if (is_attribute_p ("dllimport", identifier)) | |
5529 | return (args == NULL_TREE); | |
5530 | ||
38e01259 | 5531 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5532 | pointer. */ |
5533 | if (is_attribute_p ("dllexport", identifier)) | |
5534 | return (args == NULL_TREE); | |
e56bb9ed | 5535 | |
3cb999d8 DE |
5536 | /* Exception attribute allows the user to specify 1-2 strings |
5537 | or identifiers that will fill in the 3rd and 4th fields | |
5538 | of the structured exception table. */ | |
e56bb9ed MM |
5539 | if (is_attribute_p ("exception", identifier)) |
5540 | { | |
5541 | int i; | |
5542 | ||
5543 | if (args == NULL_TREE) | |
5544 | return 0; | |
5545 | ||
5546 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5547 | { | |
5548 | tree this_arg = TREE_VALUE (args); | |
5549 | args = TREE_PURPOSE (args); | |
5550 | ||
5551 | if (TREE_CODE (this_arg) != STRING_CST | |
5552 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5553 | return 0; | |
5554 | } | |
5555 | ||
5556 | return (args == NULL_TREE); | |
5557 | } | |
7509c759 MM |
5558 | } |
5559 | ||
5560 | return 0; | |
5561 | } | |
5562 | ||
5563 | /* If defined, a C expression whose value is zero if the attributes on | |
5564 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5565 | two if they are nearly compatible (which causes a warning to be | |
5566 | generated). */ | |
5567 | ||
5568 | int | |
5569 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5570 | tree type1 ATTRIBUTE_UNUSED; |
5571 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5572 | { |
5573 | return 1; | |
5574 | } | |
5575 | ||
5576 | /* If defined, a C statement that assigns default attributes to newly | |
5577 | defined TYPE. */ | |
5578 | ||
5579 | void | |
5580 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5581 | tree type ATTRIBUTE_UNUSED; |
7509c759 | 5582 | { |
3cb999d8 | 5583 | return; |
7509c759 MM |
5584 | } |
5585 | ||
38e01259 | 5586 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5587 | struct rtx_def * |
5588 | rs6000_dll_import_ref (call_ref) | |
5589 | rtx call_ref; | |
5590 | { | |
d330fd93 | 5591 | const char *call_name; |
7509c759 MM |
5592 | int len; |
5593 | char *p; | |
5594 | rtx reg1, reg2; | |
5595 | tree node; | |
5596 | ||
5597 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5598 | abort (); | |
5599 | ||
5600 | call_name = XSTR (call_ref, 0); | |
5601 | len = sizeof ("__imp_") + strlen (call_name); | |
5602 | p = alloca (len); | |
5603 | reg2 = gen_reg_rtx (Pmode); | |
5604 | ||
5605 | strcpy (p, "__imp_"); | |
5606 | strcat (p, call_name); | |
5607 | node = get_identifier (p); | |
5608 | ||
3cb999d8 DE |
5609 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, |
5610 | IDENTIFIER_POINTER (node))); | |
39403d82 | 5611 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); |
7509c759 MM |
5612 | |
5613 | return reg2; | |
5614 | } | |
5615 | ||
3cb999d8 DE |
5616 | /* Return a reference suitable for calling a function with the |
5617 | longcall attribute. */ | |
6a4cee5f MM |
5618 | struct rtx_def * |
5619 | rs6000_longcall_ref (call_ref) | |
5620 | rtx call_ref; | |
5621 | { | |
d330fd93 | 5622 | const char *call_name; |
6a4cee5f MM |
5623 | tree node; |
5624 | ||
5625 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5626 | return call_ref; | |
5627 | ||
5628 | /* System V adds '.' to the internal name, so skip them. */ | |
5629 | call_name = XSTR (call_ref, 0); | |
5630 | if (*call_name == '.') | |
5631 | { | |
5632 | while (*call_name == '.') | |
5633 | call_name++; | |
5634 | ||
5635 | node = get_identifier (call_name); | |
39403d82 | 5636 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5637 | } |
5638 | ||
5639 | return force_reg (Pmode, call_ref); | |
5640 | } | |
5641 | ||
7509c759 MM |
5642 | \f |
5643 | /* A C statement or statements to switch to the appropriate section | |
5644 | for output of RTX in mode MODE. You can assume that RTX is some | |
5645 | kind of constant in RTL. The argument MODE is redundant except in | |
5646 | the case of a `const_int' rtx. Select the section by calling | |
5647 | `text_section' or one of the alternatives for other sections. | |
5648 | ||
5649 | Do not define this macro if you put all constants in the read-only | |
5650 | data section. */ | |
5651 | ||
5652 | #ifdef USING_SVR4_H | |
5653 | ||
5654 | void | |
5655 | rs6000_select_rtx_section (mode, x) | |
5f59ecb7 | 5656 | enum machine_mode mode ATTRIBUTE_UNUSED; |
7509c759 MM |
5657 | rtx x; |
5658 | { | |
5659 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5660 | toc_section (); | |
7509c759 MM |
5661 | else |
5662 | const_section (); | |
5663 | } | |
5664 | ||
5665 | /* A C statement or statements to switch to the appropriate | |
5666 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5667 | or a constant of some sort. RELOC indicates whether forming | |
5668 | the initial value of DECL requires link-time relocations. */ | |
5669 | ||
5670 | void | |
5671 | rs6000_select_section (decl, reloc) | |
5672 | tree decl; | |
5673 | int reloc; | |
5674 | { | |
5675 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5676 | ||
5677 | if (TREE_CODE (decl) == STRING_CST) | |
5678 | { | |
88228c4b | 5679 | if (! flag_writable_strings) |
7509c759 | 5680 | const_section (); |
7509c759 MM |
5681 | else |
5682 | data_section (); | |
5683 | } | |
5684 | else if (TREE_CODE (decl) == VAR_DECL) | |
5685 | { | |
5686 | if ((flag_pic && reloc) | |
3cb999d8 | 5687 | || ! TREE_READONLY (decl) |
7509c759 | 5688 | || TREE_SIDE_EFFECTS (decl) |
3cb999d8 | 5689 | || ! DECL_INITIAL (decl) |
7509c759 | 5690 | || (DECL_INITIAL (decl) != error_mark_node |
3cb999d8 | 5691 | && ! TREE_CONSTANT (DECL_INITIAL (decl)))) |
7509c759 | 5692 | { |
3cb999d8 DE |
5693 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5694 | && (size <= g_switch_value)) | |
7509c759 MM |
5695 | sdata_section (); |
5696 | else | |
5697 | data_section (); | |
5698 | } | |
5699 | else | |
5700 | { | |
3cb999d8 DE |
5701 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5702 | && (size <= g_switch_value)) | |
c81bebd7 | 5703 | { |
d9407988 | 5704 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5705 | sdata2_section (); |
5706 | else | |
3cb999d8 | 5707 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ |
c81bebd7 | 5708 | } |
7509c759 MM |
5709 | else |
5710 | const_section (); | |
5711 | } | |
5712 | } | |
5713 | else | |
5714 | const_section (); | |
5715 | } | |
d9407988 MM |
5716 | |
5717 | \f | |
d9407988 MM |
5718 | /* If we are referencing a function that is static or is known to be |
5719 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5720 | that we can branch to this function without emitting a no-op after the | |
5721 | call. For real AIX and NT calling sequences, we also replace the | |
5722 | function name with the real name (1 or 2 leading .'s), rather than | |
5723 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5724 | to read the prefixes. */ |
d9407988 MM |
5725 | |
5726 | void | |
5727 | rs6000_encode_section_info (decl) | |
5728 | tree decl; | |
5729 | { | |
5730 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5731 | { | |
5732 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5733 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5734 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5735 | ||
5736 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5737 | { | |
d330fd93 | 5738 | const char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; |
d9407988 MM |
5739 | char *str = permalloc (strlen (prefix) + 1 |
5740 | + strlen (XSTR (sym_ref, 0))); | |
5741 | strcpy (str, prefix); | |
5742 | strcat (str, XSTR (sym_ref, 0)); | |
5743 | XSTR (sym_ref, 0) = str; | |
5744 | } | |
5745 | } | |
5746 | else if (rs6000_sdata != SDATA_NONE | |
5747 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5748 | && TREE_CODE (decl) == VAR_DECL) | |
5749 | { | |
5750 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5751 | tree section_name = DECL_SECTION_NAME (decl); | |
d330fd93 | 5752 | const char *name = (char *)0; |
d9407988 MM |
5753 | int len = 0; |
5754 | ||
5755 | if (section_name) | |
5756 | { | |
5757 | if (TREE_CODE (section_name) == STRING_CST) | |
5758 | { | |
5759 | name = TREE_STRING_POINTER (section_name); | |
5760 | len = TREE_STRING_LENGTH (section_name); | |
5761 | } | |
5762 | else | |
5763 | abort (); | |
5764 | } | |
5765 | ||
5766 | if ((size > 0 && size <= g_switch_value) | |
5767 | || (name | |
5f59ecb7 | 5768 | && ((len == sizeof (".sdata") - 1 |
3cb999d8 | 5769 | && strcmp (name, ".sdata") == 0) |
5f59ecb7 | 5770 | || (len == sizeof (".sdata2") - 1 |
3cb999d8 | 5771 | && strcmp (name, ".sdata2") == 0) |
5f59ecb7 | 5772 | || (len == sizeof (".sbss") - 1 |
3cb999d8 | 5773 | && strcmp (name, ".sbss") == 0) |
5f59ecb7 | 5774 | || (len == sizeof (".sbss2") - 1 |
3cb999d8 | 5775 | && strcmp (name, ".sbss2") == 0) |
5f59ecb7 | 5776 | || (len == sizeof (".PPC.EMB.sdata0") - 1 |
3cb999d8 | 5777 | && strcmp (name, ".PPC.EMB.sdata0") == 0) |
5f59ecb7 | 5778 | || (len == sizeof (".PPC.EMB.sbss0") - 1 |
3cb999d8 | 5779 | && strcmp (name, ".PPC.EMB.sbss0") == 0)))) |
d9407988 MM |
5780 | { |
5781 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5782 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5783 | strcpy (str, "@"); | |
5784 | strcat (str, XSTR (sym_ref, 0)); | |
5785 | XSTR (sym_ref, 0) = str; | |
5786 | } | |
5787 | } | |
5788 | } | |
5789 | ||
7509c759 | 5790 | #endif /* USING_SVR4_H */ |
000034eb | 5791 | |
a6c2a102 | 5792 | \f |
000034eb | 5793 | /* Return a REG that occurs in ADDR with coefficient 1. |
02441cd6 JL |
5794 | ADDR can be effectively incremented by incrementing REG. |
5795 | ||
5796 | r0 is special and we must not select it as an address | |
5797 | register by this routine since our caller will try to | |
5798 | increment the returned register via an "la" instruction. */ | |
000034eb DE |
5799 | |
5800 | struct rtx_def * | |
5801 | find_addr_reg (addr) | |
5802 | rtx addr; | |
5803 | { | |
5804 | while (GET_CODE (addr) == PLUS) | |
5805 | { | |
02441cd6 JL |
5806 | if (GET_CODE (XEXP (addr, 0)) == REG |
5807 | && REGNO (XEXP (addr, 0)) != 0) | |
000034eb | 5808 | addr = XEXP (addr, 0); |
02441cd6 JL |
5809 | else if (GET_CODE (XEXP (addr, 1)) == REG |
5810 | && REGNO (XEXP (addr, 1)) != 0) | |
000034eb DE |
5811 | addr = XEXP (addr, 1); |
5812 | else if (CONSTANT_P (XEXP (addr, 0))) | |
5813 | addr = XEXP (addr, 1); | |
5814 | else if (CONSTANT_P (XEXP (addr, 1))) | |
5815 | addr = XEXP (addr, 0); | |
5816 | else | |
5817 | abort (); | |
5818 | } | |
02441cd6 | 5819 | if (GET_CODE (addr) == REG && REGNO (addr) != 0) |
000034eb DE |
5820 | return addr; |
5821 | abort (); | |
5822 | } | |
5823 | ||
a6c2a102 DE |
5824 | void |
5825 | rs6000_fatal_bad_address (op) | |
5826 | rtx op; | |
5827 | { | |
5828 | fatal_insn ("bad address", op); | |
5829 | } |