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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
a7653a2c | 2 | Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c RK |
21 | |
22 | #include <stdio.h> | |
127b0efc | 23 | #include <ctype.h> |
9878760c RK |
24 | #include "config.h" |
25 | #include "rtl.h" | |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "real.h" | |
29 | #include "insn-config.h" | |
30 | #include "conditions.h" | |
31 | #include "insn-flags.h" | |
32 | #include "output.h" | |
33 | #include "insn-attr.h" | |
34 | #include "flags.h" | |
35 | #include "recog.h" | |
36 | #include "expr.h" | |
37 | #include "obstack.h" | |
9b30bae2 | 38 | #include "tree.h" |
2a430ec1 | 39 | #include "except.h" |
a7df97e6 | 40 | #include "function.h" |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
57 | /* switch name, tune arch */ | |
5d6426e0 | 58 | { (char *)0, "--with-cpu=", 1, 1 }, |
8e3f41e7 MM |
59 | { (char *)0, "-mcpu=", 1, 1 }, |
60 | { (char *)0, "-mtune=", 1, 0 }, | |
61 | }; | |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
87 | char *rs6000_abi_name = RS6000_ABI_NAME; | |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
93 | char *rs6000_sdata_name = (char *)0; | |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
c81bebd7 MM |
107 | \f |
108 | /* Default register names. */ | |
109 | char rs6000_reg_names[][8] = | |
110 | { | |
802a0058 MM |
111 | "0", "1", "2", "3", "4", "5", "6", "7", |
112 | "8", "9", "10", "11", "12", "13", "14", "15", | |
113 | "16", "17", "18", "19", "20", "21", "22", "23", | |
114 | "24", "25", "26", "27", "28", "29", "30", "31", | |
115 | "0", "1", "2", "3", "4", "5", "6", "7", | |
116 | "8", "9", "10", "11", "12", "13", "14", "15", | |
117 | "16", "17", "18", "19", "20", "21", "22", "23", | |
118 | "24", "25", "26", "27", "28", "29", "30", "31", | |
119 | "mq", "lr", "ctr","ap", | |
120 | "0", "1", "2", "3", "4", "5", "6", "7", | |
121 | "fpmem" | |
c81bebd7 MM |
122 | }; |
123 | ||
124 | #ifdef TARGET_REGNAMES | |
125 | static char alt_reg_names[][8] = | |
126 | { | |
802a0058 MM |
127 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
128 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
129 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
130 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
131 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
132 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
133 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
134 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
135 | "mq", "lr", "ctr", "ap", | |
136 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
137 | "fpmem" | |
c81bebd7 MM |
138 | }; |
139 | #endif | |
9878760c | 140 | \f |
daf11973 MM |
141 | #ifndef MASK_STRICT_ALIGN |
142 | #define MASK_STRICT_ALIGN 0 | |
143 | #endif | |
144 | ||
5248c961 RK |
145 | /* Override command line options. Mostly we process the processor |
146 | type and sometimes adjust other TARGET_ options. */ | |
147 | ||
148 | void | |
8e3f41e7 MM |
149 | rs6000_override_options (default_cpu) |
150 | char *default_cpu; | |
5248c961 | 151 | { |
8e3f41e7 MM |
152 | int i, j; |
153 | struct rs6000_cpu_select *ptr; | |
5248c961 | 154 | |
85638c0d RK |
155 | /* Simplify the entries below by making a mask for any POWER |
156 | variant and any PowerPC variant. */ | |
157 | ||
938937d8 | 158 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
159 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
160 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
161 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 162 | |
5248c961 RK |
163 | static struct ptt |
164 | { | |
165 | char *name; /* Canonical processor name. */ | |
166 | enum processor_type processor; /* Processor type enum value. */ | |
167 | int target_enable; /* Target flags to enable. */ | |
168 | int target_disable; /* Target flags to disable. */ | |
169 | } processor_target_table[] | |
cf27b467 MM |
170 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
171 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 172 | {"power", PROCESSOR_POWER, |
938937d8 | 173 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 174 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
175 | {"power2", PROCESSOR_POWER, |
176 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
177 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
178 | {"powerpc", PROCESSOR_POWERPC, |
179 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 180 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 181 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 182 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
183 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
184 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 185 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
186 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
187 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 188 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
189 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
190 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 191 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
192 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
193 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 194 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 195 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
49a0b204 | 196 | {"403", PROCESSOR_PPC403, |
daf11973 | 197 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 198 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
199 | {"505", PROCESSOR_MPCCORE, |
200 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
201 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 202 | {"601", PROCESSOR_PPC601, |
938937d8 | 203 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 204 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 205 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
206 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
207 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 208 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
209 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
210 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
211 | {"603e", PROCESSOR_PPC603, |
212 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
213 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 214 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
215 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
216 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
217 | {"604e", PROCESSOR_PPC604, |
218 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
219 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 220 | {"620", PROCESSOR_PPC620, |
68c49ffa | 221 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
cf27b467 | 222 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, |
07e6159a MM |
223 | {"801", PROCESSOR_MPCCORE, |
224 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
225 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
226 | {"821", PROCESSOR_MPCCORE, |
227 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
228 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
229 | {"823", PROCESSOR_MPCCORE, |
230 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
231 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
232 | {"860", PROCESSOR_MPCCORE, |
233 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
234 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 RK |
235 | |
236 | int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); | |
237 | ||
8a61d227 | 238 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 239 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 240 | |
5248c961 RK |
241 | profile_block_flag = 0; |
242 | ||
243 | /* Identify the processor type */ | |
8e3f41e7 MM |
244 | rs6000_select[0].string = default_cpu; |
245 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
246 | |
247 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 248 | { |
8e3f41e7 MM |
249 | ptr = &rs6000_select[i]; |
250 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 251 | { |
8e3f41e7 MM |
252 | for (j = 0; j < ptt_size; j++) |
253 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
254 | { | |
255 | if (ptr->set_tune_p) | |
256 | rs6000_cpu = processor_target_table[j].processor; | |
257 | ||
258 | if (ptr->set_arch_p) | |
259 | { | |
260 | target_flags |= processor_target_table[j].target_enable; | |
261 | target_flags &= ~processor_target_table[j].target_disable; | |
262 | } | |
263 | break; | |
264 | } | |
265 | ||
266 | if (i == ptt_size) | |
267 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
268 | } |
269 | } | |
8a61d227 MM |
270 | |
271 | /* If -mmultiple or -mno-multiple was explicitly used, don't | |
272 | override with the processor default */ | |
273 | if (TARGET_MULTIPLE_SET) | |
274 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 275 | |
938937d8 MM |
276 | /* If -mstring or -mno-string was explicitly used, don't |
277 | override with the processor default */ | |
278 | if (TARGET_STRING_SET) | |
1f5515bf | 279 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 280 | |
7e69e155 MM |
281 | /* Don't allow -mmultiple or -mstring on little endian systems, because the |
282 | hardware doesn't support the instructions used in little endian mode */ | |
283 | if (!BYTES_BIG_ENDIAN) | |
284 | { | |
285 | if (TARGET_MULTIPLE) | |
286 | { | |
287 | target_flags &= ~MASK_MULTIPLE; | |
288 | if (TARGET_MULTIPLE_SET) | |
289 | warning ("-mmultiple is not supported on little endian systems"); | |
290 | } | |
291 | ||
292 | if (TARGET_STRING) | |
293 | { | |
294 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
295 | if (TARGET_STRING_SET) |
296 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
297 | } |
298 | } | |
3933e0e1 | 299 | |
c81bebd7 MM |
300 | #ifdef TARGET_REGNAMES |
301 | /* If the user desires alternate register names, copy in the alternate names | |
302 | now. */ | |
303 | if (TARGET_REGNAMES) | |
304 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names)); | |
305 | #endif | |
306 | ||
3933e0e1 MM |
307 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
308 | SUBTARGET_OVERRIDE_OPTIONS; | |
309 | #endif | |
5248c961 | 310 | } |
3cfa4909 MM |
311 | \f |
312 | /* Do anything needed at the start of the asm file. */ | |
313 | ||
314 | void | |
315 | rs6000_file_start (file, default_cpu) | |
316 | FILE *file; | |
317 | char *default_cpu; | |
318 | { | |
319 | int i; | |
320 | char buffer[80]; | |
321 | char *start = buffer; | |
322 | struct rs6000_cpu_select *ptr; | |
323 | ||
324 | if (flag_verbose_asm) | |
325 | { | |
326 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
327 | rs6000_select[0].string = default_cpu; | |
328 | ||
329 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
330 | { | |
331 | ptr = &rs6000_select[i]; | |
332 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
333 | { | |
334 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
335 | start = ""; | |
336 | } | |
337 | } | |
338 | ||
339 | #ifdef USING_SVR4_H | |
340 | switch (rs6000_sdata) | |
341 | { | |
342 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
343 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
344 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
345 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
346 | } | |
347 | ||
348 | if (rs6000_sdata && g_switch_value) | |
349 | { | |
350 | fprintf (file, "%s -G %d", start, g_switch_value); | |
351 | start = ""; | |
352 | } | |
353 | #endif | |
354 | ||
355 | if (*start == '\0') | |
356 | fputs ("\n", file); | |
357 | } | |
358 | } | |
359 | ||
24d304eb RK |
360 | \f |
361 | /* Create a CONST_DOUBLE from a string. */ | |
362 | ||
363 | struct rtx_def * | |
364 | rs6000_float_const (string, mode) | |
365 | char *string; | |
366 | enum machine_mode mode; | |
367 | { | |
368 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
369 | return immed_real_const_1 (value, mode); | |
370 | } | |
371 | ||
75814ad4 MM |
372 | \f |
373 | /* Create a CONST_DOUBLE like immed_double_const, except reverse the | |
374 | two parts of the constant if the target is little endian. */ | |
375 | ||
d679bebf RK |
376 | struct rtx_def * |
377 | rs6000_immed_double_const (i0, i1, mode) | |
75814ad4 MM |
378 | HOST_WIDE_INT i0, i1; |
379 | enum machine_mode mode; | |
380 | { | |
381 | if (! WORDS_BIG_ENDIAN) | |
382 | return immed_double_const (i1, i0, mode); | |
383 | ||
384 | return immed_double_const (i0, i1, mode); | |
385 | } | |
386 | ||
5248c961 | 387 | \f |
9878760c RK |
388 | /* Return non-zero if this function is known to have a null epilogue. */ |
389 | ||
390 | int | |
391 | direct_return () | |
392 | { | |
4697a36c MM |
393 | if (reload_completed) |
394 | { | |
395 | rs6000_stack_t *info = rs6000_stack_info (); | |
396 | ||
397 | if (info->first_gp_reg_save == 32 | |
398 | && info->first_fp_reg_save == 64 | |
399 | && !info->lr_save_p | |
1b4a2731 | 400 | && !info->cr_save_p |
4697a36c MM |
401 | && !info->push_p) |
402 | return 1; | |
403 | } | |
404 | ||
405 | return 0; | |
9878760c RK |
406 | } |
407 | ||
408 | /* Returns 1 always. */ | |
409 | ||
410 | int | |
411 | any_operand (op, mode) | |
412 | register rtx op; | |
413 | enum machine_mode mode; | |
414 | { | |
415 | return 1; | |
416 | } | |
417 | ||
b6c9286a MM |
418 | /* Returns 1 if op is the count register */ |
419 | int count_register_operand(op, mode) | |
420 | register rtx op; | |
421 | enum machine_mode mode; | |
422 | { | |
423 | if (GET_CODE (op) != REG) | |
424 | return 0; | |
425 | ||
426 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
427 | return 1; | |
428 | ||
429 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
430 | return 1; | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
802a0058 MM |
435 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
436 | as a register. */ | |
437 | int fpmem_operand(op, mode) | |
438 | register rtx op; | |
439 | enum machine_mode mode; | |
440 | { | |
441 | if (GET_CODE (op) != REG) | |
442 | return 0; | |
443 | ||
444 | if (FPMEM_REGNO_P (REGNO (op))) | |
445 | return 1; | |
446 | ||
447 | #if 0 | |
448 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
449 | return 1; | |
450 | #endif | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
9878760c RK |
455 | /* Return 1 if OP is a constant that can fit in a D field. */ |
456 | ||
457 | int | |
458 | short_cint_operand (op, mode) | |
459 | register rtx op; | |
460 | enum machine_mode mode; | |
461 | { | |
462 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 463 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000); |
9878760c RK |
464 | } |
465 | ||
466 | /* Similar for a unsigned D field. */ | |
467 | ||
468 | int | |
469 | u_short_cint_operand (op, mode) | |
470 | register rtx op; | |
471 | enum machine_mode mode; | |
472 | { | |
473 | return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); | |
474 | } | |
475 | ||
dcfedcd0 RK |
476 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
477 | ||
478 | int | |
479 | non_short_cint_operand (op, mode) | |
480 | register rtx op; | |
481 | enum machine_mode mode; | |
482 | { | |
483 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 484 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
485 | } |
486 | ||
9878760c RK |
487 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
488 | ctr, or lr). */ | |
489 | ||
490 | int | |
cd2b37d9 | 491 | gpc_reg_operand (op, mode) |
9878760c RK |
492 | register rtx op; |
493 | enum machine_mode mode; | |
494 | { | |
495 | return (register_operand (op, mode) | |
802a0058 MM |
496 | && (GET_CODE (op) != REG |
497 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
498 | || REGNO (op) < 64)); | |
9878760c RK |
499 | } |
500 | ||
501 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
502 | CR field. */ | |
503 | ||
504 | int | |
505 | cc_reg_operand (op, mode) | |
506 | register rtx op; | |
507 | enum machine_mode mode; | |
508 | { | |
509 | return (register_operand (op, mode) | |
510 | && (GET_CODE (op) != REG | |
511 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
512 | || CR_REGNO_P (REGNO (op)))); | |
513 | } | |
514 | ||
515 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
516 | non-special register. If a register, it must be in the proper mode unless | |
517 | MODE is VOIDmode. */ | |
518 | ||
519 | int | |
520 | reg_or_short_operand (op, mode) | |
521 | register rtx op; | |
522 | enum machine_mode mode; | |
523 | { | |
f5a28898 | 524 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
525 | } |
526 | ||
527 | /* Similar, except check if the negation of the constant would be valid for | |
528 | a D-field. */ | |
529 | ||
530 | int | |
531 | reg_or_neg_short_operand (op, mode) | |
532 | register rtx op; | |
533 | enum machine_mode mode; | |
534 | { | |
535 | if (GET_CODE (op) == CONST_INT) | |
536 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
537 | ||
cd2b37d9 | 538 | return gpc_reg_operand (op, mode); |
9878760c RK |
539 | } |
540 | ||
541 | /* Return 1 if the operand is either a register or an integer whose high-order | |
542 | 16 bits are zero. */ | |
543 | ||
544 | int | |
545 | reg_or_u_short_operand (op, mode) | |
546 | register rtx op; | |
547 | enum machine_mode mode; | |
548 | { | |
549 | if (GET_CODE (op) == CONST_INT | |
550 | && (INTVAL (op) & 0xffff0000) == 0) | |
551 | return 1; | |
552 | ||
cd2b37d9 | 553 | return gpc_reg_operand (op, mode); |
9878760c RK |
554 | } |
555 | ||
556 | /* Return 1 is the operand is either a non-special register or ANY | |
557 | constant integer. */ | |
558 | ||
559 | int | |
560 | reg_or_cint_operand (op, mode) | |
561 | register rtx op; | |
562 | enum machine_mode mode; | |
563 | { | |
cd2b37d9 | 564 | return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode); |
9878760c RK |
565 | } |
566 | ||
766a866c MM |
567 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
568 | ||
569 | int | |
570 | got_operand (op, mode) | |
571 | register rtx op; | |
572 | enum machine_mode mode; | |
573 | { | |
574 | return (GET_CODE (op) == SYMBOL_REF | |
575 | || GET_CODE (op) == CONST | |
576 | || GET_CODE (op) == LABEL_REF); | |
577 | } | |
578 | ||
4e74d8ec MM |
579 | /* Return the number of instructions it takes to form a constant in an |
580 | integer register. */ | |
581 | ||
582 | static int | |
583 | num_insns_constant_wide (value) | |
584 | HOST_WIDE_INT value; | |
585 | { | |
586 | /* signed constant loadable with {cal|addi} */ | |
587 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
588 | return 1; | |
589 | ||
590 | #if HOST_BITS_PER_WIDE_INT == 32 | |
591 | /* constant loadable with {cau|addis} */ | |
592 | else if ((value & 0xffff) == 0) | |
593 | return 1; | |
594 | ||
595 | #else | |
596 | /* constant loadable with {cau|addis} */ | |
597 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
598 | return 1; | |
599 | ||
600 | else if (TARGET_64BIT) | |
601 | { | |
602 | HOST_WIDE_INT low = value & 0xffffffff; | |
603 | HOST_WIDE_INT high = value >> 32; | |
604 | ||
605 | if (high == 0 && (low & 0x80000000) == 0) | |
606 | return 2; | |
607 | ||
608 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
609 | return 2; | |
610 | ||
611 | else if (!low) | |
612 | return num_insns_constant_wide (high) + 1; | |
613 | ||
614 | else | |
615 | return (num_insns_constant_wide (high) | |
e396202a | 616 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
617 | } |
618 | #endif | |
619 | ||
620 | else | |
621 | return 2; | |
622 | } | |
623 | ||
624 | int | |
625 | num_insns_constant (op, mode) | |
626 | rtx op; | |
627 | enum machine_mode mode; | |
628 | { | |
4e74d8ec MM |
629 | if (GET_CODE (op) == CONST_INT) |
630 | return num_insns_constant_wide (INTVAL (op)); | |
631 | ||
6fc48950 MM |
632 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
633 | { | |
634 | long l; | |
635 | REAL_VALUE_TYPE rv; | |
636 | ||
637 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
638 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
639 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
640 | } | |
641 | ||
4e74d8ec MM |
642 | else if (GET_CODE (op) == CONST_DOUBLE && TARGET_32BIT) |
643 | return (num_insns_constant_wide (CONST_DOUBLE_LOW (op)) | |
644 | + num_insns_constant_wide (CONST_DOUBLE_HIGH (op))); | |
645 | ||
646 | else if (GET_CODE (op) == CONST_DOUBLE && TARGET_64BIT) | |
647 | { | |
648 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
649 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); | |
650 | ||
651 | if (high == 0 && (low & 0x80000000) == 0) | |
652 | return num_insns_constant_wide (low); | |
653 | ||
654 | else if (((high & 0xffffffff) == 0xffffffff) | |
655 | && ((low & 0x80000000) != 0)) | |
656 | return num_insns_constant_wide (low); | |
657 | ||
658 | else if (low == 0) | |
659 | return num_insns_constant_wide (high) + 1; | |
660 | ||
661 | else | |
662 | return (num_insns_constant_wide (high) | |
663 | + num_insns_constant_wide (low) + 1); | |
664 | } | |
665 | ||
666 | else | |
667 | abort (); | |
668 | } | |
669 | ||
6f2f8311 RK |
670 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
671 | with one instruction per word. We only do this if we can safely read | |
672 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
673 | |
674 | int | |
675 | easy_fp_constant (op, mode) | |
676 | register rtx op; | |
677 | register enum machine_mode mode; | |
678 | { | |
9878760c RK |
679 | if (GET_CODE (op) != CONST_DOUBLE |
680 | || GET_MODE (op) != mode | |
4e74d8ec | 681 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
682 | return 0; |
683 | ||
b6c9286a | 684 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 685 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
686 | return 1; |
687 | ||
a7273471 MM |
688 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
689 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
690 | return 0; | |
691 | ||
5ae4759c MM |
692 | #ifdef TARGET_RELOCATABLE |
693 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
694 | if (TARGET_RELOCATABLE) | |
695 | return 0; | |
696 | #endif | |
697 | ||
042259f2 DE |
698 | if (mode == DFmode) |
699 | { | |
700 | long k[2]; | |
701 | REAL_VALUE_TYPE rv; | |
702 | ||
703 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
704 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 705 | |
4e74d8ec MM |
706 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
707 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 708 | } |
4e74d8ec MM |
709 | |
710 | else if (mode == SFmode) | |
042259f2 DE |
711 | { |
712 | long l; | |
713 | REAL_VALUE_TYPE rv; | |
714 | ||
715 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
716 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 717 | |
4e74d8ec | 718 | return num_insns_constant_wide (l) == 1; |
042259f2 | 719 | } |
4e74d8ec MM |
720 | |
721 | else if (mode == DImode && TARGET_32BIT) | |
722 | return num_insns_constant (op, DImode) == 2; | |
723 | ||
724 | else | |
725 | abort (); | |
9878760c | 726 | } |
8f75773e | 727 | |
b6c9286a MM |
728 | /* Return 1 if the operand is in volatile memory. Note that during the |
729 | RTL generation phase, memory_operand does not return TRUE for | |
730 | volatile memory references. So this function allows us to | |
731 | recognize volatile references where its safe. */ | |
732 | ||
733 | int | |
734 | volatile_mem_operand (op, mode) | |
735 | register rtx op; | |
736 | enum machine_mode mode; | |
737 | { | |
738 | if (GET_CODE (op) != MEM) | |
739 | return 0; | |
740 | ||
741 | if (!MEM_VOLATILE_P (op)) | |
742 | return 0; | |
743 | ||
744 | if (mode != GET_MODE (op)) | |
745 | return 0; | |
746 | ||
747 | if (reload_completed) | |
748 | return memory_operand (op, mode); | |
749 | ||
750 | if (reload_in_progress) | |
751 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
752 | ||
753 | return memory_address_p (mode, XEXP (op, 0)); | |
754 | } | |
755 | ||
5b5040b9 | 756 | /* Return 1 if the operand is an offsettable memory address. */ |
914c2e77 RK |
757 | |
758 | int | |
5b5040b9 | 759 | offsettable_addr_operand (op, mode) |
914c2e77 RK |
760 | register rtx op; |
761 | enum machine_mode mode; | |
762 | { | |
8f75773e | 763 | return offsettable_address_p (reload_completed | reload_in_progress, |
5b5040b9 | 764 | mode, op); |
914c2e77 RK |
765 | } |
766 | ||
9878760c RK |
767 | /* Return 1 if the operand is either an easy FP constant (see above) or |
768 | memory. */ | |
769 | ||
770 | int | |
771 | mem_or_easy_const_operand (op, mode) | |
772 | register rtx op; | |
773 | enum machine_mode mode; | |
774 | { | |
775 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
776 | } | |
777 | ||
778 | /* Return 1 if the operand is either a non-special register or an item | |
779 | that can be used as the operand of an SI add insn. */ | |
780 | ||
781 | int | |
782 | add_operand (op, mode) | |
783 | register rtx op; | |
784 | enum machine_mode mode; | |
785 | { | |
786 | return (reg_or_short_operand (op, mode) | |
787 | || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); | |
788 | } | |
789 | ||
dcfedcd0 RK |
790 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
791 | ||
792 | int | |
793 | non_add_cint_operand (op, mode) | |
794 | register rtx op; | |
795 | enum machine_mode mode; | |
796 | { | |
797 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 798 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
dcfedcd0 RK |
799 | && (INTVAL (op) & 0xffff) != 0); |
800 | } | |
801 | ||
9878760c RK |
802 | /* Return 1 if the operand is a non-special register or a constant that |
803 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
804 | ||
805 | int | |
806 | logical_operand (op, mode) | |
807 | register rtx op; | |
808 | enum machine_mode mode; | |
809 | { | |
cd2b37d9 | 810 | return (gpc_reg_operand (op, mode) |
9878760c RK |
811 | || (GET_CODE (op) == CONST_INT |
812 | && ((INTVAL (op) & 0xffff0000) == 0 | |
813 | || (INTVAL (op) & 0xffff) == 0))); | |
814 | } | |
815 | ||
dcfedcd0 RK |
816 | /* Return 1 if C is a constant that is not a logical operand (as |
817 | above). */ | |
818 | ||
819 | int | |
820 | non_logical_cint_operand (op, mode) | |
821 | register rtx op; | |
822 | enum machine_mode mode; | |
823 | { | |
824 | return (GET_CODE (op) == CONST_INT | |
825 | && (INTVAL (op) & 0xffff0000) != 0 | |
826 | && (INTVAL (op) & 0xffff) != 0); | |
827 | } | |
828 | ||
9878760c RK |
829 | /* Return 1 if C is a constant that can be encoded in a mask on the |
830 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
831 | Reject all ones and all zeros, since these should have been optimized | |
832 | away and confuse the making of MB and ME. */ | |
833 | ||
834 | int | |
835 | mask_constant (c) | |
836 | register int c; | |
837 | { | |
838 | int i; | |
839 | int last_bit_value; | |
840 | int transitions = 0; | |
841 | ||
842 | if (c == 0 || c == ~0) | |
843 | return 0; | |
844 | ||
845 | last_bit_value = c & 1; | |
846 | ||
847 | for (i = 1; i < 32; i++) | |
848 | if (((c >>= 1) & 1) != last_bit_value) | |
849 | last_bit_value ^= 1, transitions++; | |
850 | ||
851 | return transitions <= 2; | |
852 | } | |
853 | ||
854 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
855 | ||
856 | int | |
857 | mask_operand (op, mode) | |
858 | register rtx op; | |
859 | enum machine_mode mode; | |
860 | { | |
861 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
862 | } | |
863 | ||
864 | /* Return 1 if the operand is either a non-special register or a | |
865 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
866 | ||
867 | int | |
868 | and_operand (op, mode) | |
869 | register rtx op; | |
870 | enum machine_mode mode; | |
871 | { | |
872 | return (reg_or_short_operand (op, mode) | |
873 | || logical_operand (op, mode) | |
874 | || mask_operand (op, mode)); | |
875 | } | |
876 | ||
dcfedcd0 RK |
877 | /* Return 1 if the operand is a constant but not a valid operand for an AND |
878 | insn. */ | |
879 | ||
880 | int | |
881 | non_and_cint_operand (op, mode) | |
882 | register rtx op; | |
883 | enum machine_mode mode; | |
884 | { | |
885 | return GET_CODE (op) == CONST_INT && ! and_operand (op, mode); | |
886 | } | |
887 | ||
9878760c RK |
888 | /* Return 1 if the operand is a general register or memory operand. */ |
889 | ||
890 | int | |
891 | reg_or_mem_operand (op, mode) | |
892 | register rtx op; | |
893 | register enum machine_mode mode; | |
894 | { | |
b6c9286a MM |
895 | return (gpc_reg_operand (op, mode) |
896 | || memory_operand (op, mode) | |
897 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
898 | } |
899 | ||
a7a813f7 RK |
900 | /* Return 1 if the operand is a general register or memory operand without |
901 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
902 | instruction. */ | |
903 | ||
904 | int | |
905 | lwa_operand (op, mode) | |
906 | register rtx op; | |
907 | register enum machine_mode mode; | |
908 | { | |
909 | rtx inner = op; | |
910 | ||
911 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
912 | inner = SUBREG_REG (inner); | |
913 | ||
914 | return gpc_reg_operand (inner, mode) | |
915 | || (memory_operand (inner, mode) | |
916 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
917 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
918 | } | |
919 | ||
9878760c RK |
920 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
921 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
922 | forced to lr. */ | |
923 | ||
924 | int | |
925 | call_operand (op, mode) | |
926 | register rtx op; | |
927 | enum machine_mode mode; | |
928 | { | |
929 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
930 | return 0; | |
931 | ||
932 | return (GET_CODE (op) == SYMBOL_REF | |
933 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
934 | } | |
935 | ||
2af3d377 RK |
936 | |
937 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
938 | this file. */ | |
939 | ||
940 | int | |
941 | current_file_function_operand (op, mode) | |
942 | register rtx op; | |
943 | enum machine_mode mode; | |
944 | { | |
945 | return (GET_CODE (op) == SYMBOL_REF | |
946 | && (SYMBOL_REF_FLAG (op) | |
947 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
948 | } | |
949 | ||
950 | ||
9878760c RK |
951 | /* Return 1 if this operand is a valid input for a move insn. */ |
952 | ||
953 | int | |
954 | input_operand (op, mode) | |
955 | register rtx op; | |
956 | enum machine_mode mode; | |
957 | { | |
eb4e8003 | 958 | /* Memory is always valid. */ |
9878760c RK |
959 | if (memory_operand (op, mode)) |
960 | return 1; | |
961 | ||
eb4e8003 RK |
962 | /* For floating-point, easy constants are valid. */ |
963 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
964 | && CONSTANT_P (op) | |
965 | && easy_fp_constant (op, mode)) | |
966 | return 1; | |
967 | ||
4e74d8ec MM |
968 | /* Allow any integer constant. */ |
969 | if (GET_MODE_CLASS (mode) == MODE_INT | |
970 | && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)) | |
971 | return 1; | |
972 | ||
eb4e8003 RK |
973 | /* For floating-point or multi-word mode, the only remaining valid type |
974 | is a register. */ | |
9878760c RK |
975 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
976 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 977 | return register_operand (op, mode); |
9878760c | 978 | |
88fe15a1 RK |
979 | /* The only cases left are integral modes one word or smaller (we |
980 | do not get called for MODE_CC values). These can be in any | |
981 | register. */ | |
982 | if (register_operand (op, mode)) | |
a8b3aeda | 983 | return 1; |
88fe15a1 | 984 | |
84cf9dda | 985 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 986 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
987 | return 1; |
988 | ||
b6c9286a MM |
989 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
990 | directly in the instruction stream */ | |
991 | if (DEFAULT_ABI == ABI_NT | |
992 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
993 | return 1; | |
994 | ||
88228c4b MM |
995 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
996 | to be valid. */ | |
c81bebd7 | 997 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
998 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
999 | && small_data_operand (op, Pmode)) | |
1000 | return 1; | |
1001 | ||
042259f2 | 1002 | return 0; |
9878760c | 1003 | } |
7509c759 MM |
1004 | |
1005 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1006 | ||
1007 | int | |
1008 | small_data_operand (op, mode) | |
1009 | rtx op; | |
1010 | enum machine_mode mode; | |
1011 | { | |
d9407988 | 1012 | #ifdef TARGET_SDATA |
7509c759 MM |
1013 | rtx sym_ref, const_part; |
1014 | ||
d9407988 | 1015 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1016 | return 0; |
a54d04b7 | 1017 | |
5b9d9a0c | 1018 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1019 | return 0; |
1020 | ||
88228c4b MM |
1021 | if (GET_CODE (op) == SYMBOL_REF) |
1022 | sym_ref = op; | |
1023 | ||
1024 | else if (GET_CODE (op) != CONST | |
1025 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1026 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1027 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1028 | return 0; |
1029 | ||
88228c4b MM |
1030 | else |
1031 | sym_ref = XEXP (XEXP (op, 0), 0); | |
1032 | ||
1033 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1034 | return 0; |
1035 | ||
1036 | return 1; | |
d9407988 MM |
1037 | |
1038 | #else | |
1039 | return 0; | |
1040 | #endif | |
7509c759 MM |
1041 | } |
1042 | ||
4697a36c MM |
1043 | \f |
1044 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1045 | for a call to a function whose data type is FNTYPE. | |
1046 | For a library call, FNTYPE is 0. | |
1047 | ||
1048 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1049 | so we never return a PARALLEL. */ |
4697a36c MM |
1050 | |
1051 | void | |
1052 | init_cumulative_args (cum, fntype, libname, incoming) | |
1053 | CUMULATIVE_ARGS *cum; | |
1054 | tree fntype; | |
1055 | rtx libname; | |
1056 | int incoming; | |
1057 | { | |
1058 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1059 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1060 | |
1061 | *cum = zero_cumulative; | |
1062 | cum->words = 0; | |
1063 | cum->fregno = FP_ARG_MIN_REG; | |
1064 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1065 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1066 | |
1067 | if (incoming) | |
1068 | { | |
1c20ae99 | 1069 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
c81bebd7 | 1070 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1071 | cum->varargs_offset = RS6000_VARARGS_OFFSET; |
4697a36c MM |
1072 | } |
1073 | ||
1074 | else if (cum->prototype) | |
1075 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1076 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1077 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1078 | ||
1079 | else | |
1080 | cum->nargs_prototype = 0; | |
1081 | ||
1082 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1083 | |
1084 | /* Check for DLL import functions */ | |
1085 | if (abi == ABI_NT | |
1086 | && fntype | |
1087 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1088 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1089 | ||
6a4cee5f MM |
1090 | /* Also check for longcall's */ |
1091 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1092 | cum->call_cookie = CALL_LONG; | |
1093 | ||
4697a36c MM |
1094 | if (TARGET_DEBUG_ARG) |
1095 | { | |
1096 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1097 | if (fntype) | |
1098 | { | |
1099 | tree ret_type = TREE_TYPE (fntype); | |
1100 | fprintf (stderr, " ret code = %s,", | |
1101 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1102 | } | |
1103 | ||
c81bebd7 | 1104 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming) |
4697a36c | 1105 | fprintf (stderr, " varargs = %d, ", cum->varargs_offset); |
7509c759 | 1106 | |
6a4cee5f | 1107 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1108 | fprintf (stderr, " dllimport,"); |
4697a36c | 1109 | |
6a4cee5f MM |
1110 | if (cum->call_cookie & CALL_LONG) |
1111 | fprintf (stderr, " longcall,"); | |
1112 | ||
4697a36c MM |
1113 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1114 | cum->prototype, cum->nargs_prototype); | |
1115 | } | |
1116 | } | |
1117 | \f | |
b6c9286a MM |
1118 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1119 | of an argument with the specified mode and type. If it is not defined, | |
1120 | PARM_BOUNDARY is used for all arguments. | |
1121 | ||
e1f83b4d MM |
1122 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1123 | ||
1124 | V.4 wants long longs to be double word aligned. */ | |
b6c9286a MM |
1125 | |
1126 | int | |
1127 | function_arg_boundary (mode, type) | |
1128 | enum machine_mode mode; | |
1129 | tree type; | |
1130 | { | |
c81bebd7 | 1131 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1132 | return 64; |
1133 | ||
b6c9286a MM |
1134 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1135 | return PARM_BOUNDARY; | |
1136 | ||
1137 | if (mode != BLKmode) | |
1138 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1139 | ||
1140 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1141 | } | |
1142 | \f | |
4697a36c MM |
1143 | /* Update the data in CUM to advance over an argument |
1144 | of mode MODE and data type TYPE. | |
1145 | (TYPE is null for libcalls where that information may not be available.) */ | |
1146 | ||
1147 | void | |
1148 | function_arg_advance (cum, mode, type, named) | |
1149 | CUMULATIVE_ARGS *cum; | |
1150 | enum machine_mode mode; | |
1151 | tree type; | |
1152 | int named; | |
1153 | { | |
b6c9286a MM |
1154 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1155 | cum->words += align; | |
4697a36c MM |
1156 | cum->nargs_prototype--; |
1157 | ||
c81bebd7 | 1158 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1159 | { |
1160 | /* Long longs must not be split between registers and stack */ | |
1161 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1162 | && type && !AGGREGATE_TYPE_P (type) | |
1163 | && cum->words < GP_ARG_NUM_REG | |
1164 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1165 | { | |
1166 | cum->words = GP_ARG_NUM_REG; | |
1167 | } | |
1168 | ||
1169 | /* Aggregates get passed as pointers */ | |
1170 | if (type && AGGREGATE_TYPE_P (type)) | |
1171 | cum->words++; | |
1172 | ||
1173 | /* Floats go in registers, & don't occupy space in the GP registers | |
1174 | like they do for AIX unless software floating point. */ | |
1175 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1176 | && TARGET_HARD_FLOAT | |
1177 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1178 | cum->fregno++; | |
1179 | ||
1180 | else | |
1181 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1182 | } | |
1183 | else | |
4697a36c MM |
1184 | if (named) |
1185 | { | |
1186 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1187 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1188 | cum->fregno++; | |
1189 | } | |
1190 | ||
1191 | if (TARGET_DEBUG_ARG) | |
1192 | fprintf (stderr, | |
b6c9286a MM |
1193 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1194 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1195 | } |
1196 | \f | |
1197 | /* Determine where to put an argument to a function. | |
1198 | Value is zero to push the argument on the stack, | |
1199 | or a hard register in which to store the argument. | |
1200 | ||
1201 | MODE is the argument's machine mode. | |
1202 | TYPE is the data type of the argument (as a tree). | |
1203 | This is null for libcalls where that information may | |
1204 | not be available. | |
1205 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1206 | the preceding args and about the function being called. | |
1207 | NAMED is nonzero if this argument is a named parameter | |
1208 | (otherwise it is an extra parameter matching an ellipsis). | |
1209 | ||
1210 | On RS/6000 the first eight words of non-FP are normally in registers | |
1211 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1212 | Under V.4, the first 8 FP args are in registers. | |
1213 | ||
1214 | If this is floating-point and no prototype is specified, we use | |
1215 | both an FP and integer register (or possibly FP reg and stack). Library | |
1216 | functions (when TYPE is zero) always have the proper types for args, | |
1217 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1218 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1219 | |
1220 | struct rtx_def * | |
1221 | function_arg (cum, mode, type, named) | |
1222 | CUMULATIVE_ARGS *cum; | |
1223 | enum machine_mode mode; | |
1224 | tree type; | |
1225 | int named; | |
1226 | { | |
b6c9286a MM |
1227 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1228 | int align_words = cum->words + align; | |
1229 | ||
4697a36c MM |
1230 | if (TARGET_DEBUG_ARG) |
1231 | fprintf (stderr, | |
b6c9286a MM |
1232 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1233 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1234 | |
1235 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1236 | uses to say fp args were passed in registers. Assume that we don't need the | |
1237 | marker for software floating point, or compiler generated library calls. */ | |
1238 | if (mode == VOIDmode) | |
1239 | { | |
7509c759 MM |
1240 | enum rs6000_abi abi = DEFAULT_ABI; |
1241 | ||
c81bebd7 | 1242 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1243 | && TARGET_HARD_FLOAT |
1244 | && cum->nargs_prototype < 0 | |
4697a36c | 1245 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1246 | { |
6a4cee5f MM |
1247 | return GEN_INT (cum->call_cookie |
1248 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1249 | ? CALL_V4_SET_FP_ARGS | |
1250 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1251 | } |
4697a36c | 1252 | |
7509c759 | 1253 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1254 | } |
1255 | ||
1256 | if (!named) | |
1257 | { | |
c81bebd7 | 1258 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1259 | return NULL_RTX; |
1260 | } | |
1261 | ||
1262 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1263 | return NULL_RTX; | |
1264 | ||
1265 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1266 | { | |
5b9d9a0c | 1267 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1268 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1269 | || ! type |
1270 | || ((cum->nargs_prototype > 0) | |
1271 | /* IBM AIX extended its linkage convention definition always to | |
1272 | require FP args after register save area hole on the stack. */ | |
1273 | && (DEFAULT_ABI != ABI_AIX | |
1274 | || ! TARGET_XL_CALL | |
1275 | || (align_words < GP_ARG_NUM_REG)))) | |
4697a36c MM |
1276 | return gen_rtx (REG, mode, cum->fregno); |
1277 | ||
1c20ae99 JW |
1278 | return gen_rtx (PARALLEL, mode, |
1279 | gen_rtvec | |
1280 | (2, | |
1281 | gen_rtx (EXPR_LIST, VOIDmode, | |
1282 | ((align_words >= GP_ARG_NUM_REG) | |
1283 | ? NULL_RTX | |
1284 | : (align_words | |
1285 | + RS6000_ARG_SIZE (mode, type, named) | |
1286 | > GP_ARG_NUM_REG | |
1287 | /* If this is partially on the stack, then | |
1288 | we only include the portion actually | |
1289 | in registers here. */ | |
1290 | ? gen_rtx (REG, SImode, | |
1291 | GP_ARG_MIN_REG + align_words) | |
1292 | : gen_rtx (REG, mode, | |
1293 | GP_ARG_MIN_REG + align_words))), | |
1294 | const0_rtx), | |
1295 | gen_rtx (EXPR_LIST, VOIDmode, | |
1296 | gen_rtx (REG, mode, cum->fregno), | |
1297 | const0_rtx))); | |
4697a36c MM |
1298 | } |
1299 | ||
4697a36c | 1300 | /* Long longs won't be split between register and stack */ |
c81bebd7 | 1301 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
b6c9286a | 1302 | align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) |
4697a36c MM |
1303 | { |
1304 | return NULL_RTX; | |
1305 | } | |
4697a36c | 1306 | |
b6c9286a MM |
1307 | else if (align_words < GP_ARG_NUM_REG) |
1308 | return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words); | |
4697a36c MM |
1309 | |
1310 | return NULL_RTX; | |
1311 | } | |
1312 | \f | |
1313 | /* For an arg passed partly in registers and partly in memory, | |
1314 | this is the number of registers used. | |
1315 | For args passed entirely in registers or entirely in memory, zero. */ | |
1316 | ||
1317 | int | |
1318 | function_arg_partial_nregs (cum, mode, type, named) | |
1319 | CUMULATIVE_ARGS *cum; | |
1320 | enum machine_mode mode; | |
1321 | tree type; | |
1322 | int named; | |
1323 | { | |
1324 | if (! named) | |
1325 | return 0; | |
1326 | ||
c81bebd7 | 1327 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1328 | return 0; |
4697a36c MM |
1329 | |
1330 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1331 | { | |
1332 | if (cum->nargs_prototype >= 0) | |
1333 | return 0; | |
1334 | } | |
1335 | ||
1336 | if (cum->words < GP_ARG_NUM_REG | |
1337 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1338 | { | |
1339 | int ret = GP_ARG_NUM_REG - cum->words; | |
1340 | if (ret && TARGET_DEBUG_ARG) | |
1341 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1342 | ||
1343 | return ret; | |
1344 | } | |
1345 | ||
1346 | return 0; | |
1347 | } | |
1348 | \f | |
1349 | /* A C expression that indicates when an argument must be passed by | |
1350 | reference. If nonzero for an argument, a copy of that argument is | |
1351 | made in memory and a pointer to the argument is passed instead of | |
1352 | the argument itself. The pointer is passed in whatever way is | |
1353 | appropriate for passing a pointer to that type. | |
1354 | ||
1355 | Under V.4, structures and unions are passed by reference. */ | |
1356 | ||
1357 | int | |
1358 | function_arg_pass_by_reference (cum, mode, type, named) | |
1359 | CUMULATIVE_ARGS *cum; | |
1360 | enum machine_mode mode; | |
1361 | tree type; | |
1362 | int named; | |
1363 | { | |
c81bebd7 MM |
1364 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1365 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1366 | { |
1367 | if (TARGET_DEBUG_ARG) | |
1368 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1369 | ||
1370 | return 1; | |
1371 | } | |
4697a36c MM |
1372 | |
1373 | return 0; | |
1374 | } | |
1375 | ||
1376 | \f | |
1377 | /* Perform any needed actions needed for a function that is receiving a | |
1378 | variable number of arguments. | |
1379 | ||
1380 | CUM is as above. | |
1381 | ||
1382 | MODE and TYPE are the mode and type of the current parameter. | |
1383 | ||
1384 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1385 | that must be pushed by the prolog to pretend that our caller pushed | |
1386 | it. | |
1387 | ||
1388 | Normally, this macro will push all remaining incoming registers on the | |
1389 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1390 | ||
1391 | void | |
1392 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1393 | CUMULATIVE_ARGS *cum; | |
1394 | enum machine_mode mode; | |
1395 | tree type; | |
1396 | int *pretend_size; | |
1397 | int no_rtl; | |
1398 | ||
1399 | { | |
1400 | rtx save_area = virtual_incoming_args_rtx; | |
1401 | int reg_size = (TARGET_64BIT) ? 8 : 4; | |
1402 | ||
1403 | if (TARGET_DEBUG_ARG) | |
1404 | fprintf (stderr, | |
1405 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1406 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1407 | ||
c81bebd7 | 1408 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && !no_rtl) |
4697a36c MM |
1409 | { |
1410 | rs6000_sysv_varargs_p = 1; | |
1411 | save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); | |
1412 | } | |
4697a36c MM |
1413 | |
1414 | if (cum->words < 8) | |
1415 | { | |
1416 | int first_reg_offset = cum->words; | |
1417 | ||
1418 | if (MUST_PASS_IN_STACK (mode, type)) | |
1419 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1420 | ||
1421 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1422 | first_reg_offset = GP_ARG_NUM_REG; | |
1423 | ||
1424 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1425 | move_block_from_reg | |
1426 | (GP_ARG_MIN_REG + first_reg_offset, | |
1427 | gen_rtx (MEM, BLKmode, | |
1428 | plus_constant (save_area, first_reg_offset * reg_size)), | |
1429 | GP_ARG_NUM_REG - first_reg_offset, | |
1430 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1431 | ||
1432 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1433 | } | |
1434 | ||
4697a36c | 1435 | /* Save FP registers if needed. */ |
c81bebd7 | 1436 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1437 | { |
1438 | int fregno = cum->fregno; | |
1439 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1440 | ||
1441 | if (num_fp_reg >= 0) | |
1442 | { | |
1443 | rtx cr1 = gen_rtx (REG, CCmode, 69); | |
1444 | rtx lab = gen_label_rtx (); | |
1445 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1446 | ||
1447 | emit_jump_insn (gen_rtx (SET, VOIDmode, | |
1448 | pc_rtx, | |
1449 | gen_rtx (IF_THEN_ELSE, VOIDmode, | |
1450 | gen_rtx (NE, VOIDmode, cr1, const0_rtx), | |
1451 | gen_rtx (LABEL_REF, VOIDmode, lab), | |
1452 | pc_rtx))); | |
1453 | ||
1454 | while ( num_fp_reg-- >= 0) | |
1455 | { | |
1456 | emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), | |
1457 | gen_rtx (REG, DFmode, fregno++)); | |
1458 | off += 8; | |
1459 | } | |
1460 | ||
1461 | emit_label (lab); | |
1462 | } | |
1463 | } | |
4697a36c MM |
1464 | } |
1465 | \f | |
1466 | /* If defined, is a C expression that produces the machine-specific | |
1467 | code for a call to `__builtin_saveregs'. This code will be moved | |
1468 | to the very beginning of the function, before any parameter access | |
1469 | are made. The return value of this function should be an RTX that | |
1470 | contains the value to use as the return of `__builtin_saveregs'. | |
1471 | ||
1472 | The argument ARGS is a `tree_list' containing the arguments that | |
1473 | were passed to `__builtin_saveregs'. | |
1474 | ||
1475 | If this macro is not defined, the compiler will output an ordinary | |
1476 | call to the library function `__builtin_saveregs'. | |
1477 | ||
1478 | On the Power/PowerPC return the address of the area on the stack | |
1479 | used to hold arguments. Under AIX, this includes the 8 word register | |
1480 | save area. Under V.4 this does not. */ | |
1481 | ||
1482 | struct rtx_def * | |
1483 | expand_builtin_saveregs (args) | |
1484 | tree args; | |
1485 | { | |
1486 | return virtual_incoming_args_rtx; | |
1487 | } | |
1488 | ||
5b5040b9 RK |
1489 | \f |
1490 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1491 | and other bits from an original memory reference. */ | |
1492 | ||
1493 | static rtx | |
1494 | expand_block_move_mem (mode, addr, orig_mem) | |
1495 | enum machine_mode mode; | |
1496 | rtx addr; | |
1497 | rtx orig_mem; | |
1498 | { | |
1499 | rtx mem = gen_rtx (MEM, mode, addr); | |
b6c9286a MM |
1500 | |
1501 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
5b5040b9 RK |
1502 | MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); |
1503 | MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem); | |
b6c9286a MM |
1504 | #ifdef MEM_UNALIGNED_P |
1505 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1506 | #endif | |
5b5040b9 RK |
1507 | return mem; |
1508 | } | |
1509 | ||
7e69e155 MM |
1510 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1511 | if we should let the compiler generate normal code. | |
1512 | ||
1513 | operands[0] is the destination | |
1514 | operands[1] is the source | |
1515 | operands[2] is the length | |
1516 | operands[3] is the alignment */ | |
1517 | ||
3933e0e1 MM |
1518 | #define MAX_MOVE_REG 4 |
1519 | ||
7e69e155 MM |
1520 | int |
1521 | expand_block_move (operands) | |
1522 | rtx operands[]; | |
1523 | { | |
b6c9286a MM |
1524 | rtx orig_dest = operands[0]; |
1525 | rtx orig_src = operands[1]; | |
7e69e155 | 1526 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1527 | rtx align_rtx = operands[3]; |
3933e0e1 | 1528 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1529 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1530 | int bytes; |
1531 | int offset; | |
1532 | int num_reg; | |
1533 | int i; | |
7e69e155 MM |
1534 | rtx src_reg; |
1535 | rtx dest_reg; | |
3933e0e1 MM |
1536 | rtx src_addr; |
1537 | rtx dest_addr; | |
7e69e155 | 1538 | rtx tmp_reg; |
3933e0e1 | 1539 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1540 | int move_bytes; |
1541 | ||
3933e0e1 MM |
1542 | /* If this is not a fixed size move, just call memcpy */ |
1543 | if (!constp) | |
1544 | return 0; | |
1545 | ||
7e69e155 | 1546 | /* Anything to move? */ |
3933e0e1 MM |
1547 | bytes = INTVAL (bytes_rtx); |
1548 | if (bytes <= 0) | |
7e69e155 MM |
1549 | return 1; |
1550 | ||
3933e0e1 MM |
1551 | /* Don't support real large moves. If string instructions are not used, |
1552 | then don't generate more than 8 loads. */ | |
1553 | if (TARGET_STRING) | |
1554 | { | |
1cab3be1 | 1555 | if (bytes > 4*8) |
3933e0e1 MM |
1556 | return 0; |
1557 | } | |
1558 | else if (!STRICT_ALIGNMENT) | |
1559 | { | |
1560 | if (bytes > 4*8) | |
1561 | return 0; | |
1562 | } | |
1563 | else if (bytes > 8*align) | |
7e69e155 MM |
1564 | return 0; |
1565 | ||
1566 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1567 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1568 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1569 | |
3933e0e1 | 1570 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1571 | { |
3933e0e1 | 1572 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1573 | { |
3933e0e1 MM |
1574 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1575 | && !fixed_regs[5] | |
1576 | && !fixed_regs[6] | |
1577 | && !fixed_regs[7] | |
1578 | && !fixed_regs[8] | |
1579 | && !fixed_regs[9] | |
1580 | && !fixed_regs[10] | |
1581 | && !fixed_regs[11] | |
1582 | && !fixed_regs[12]) | |
1583 | { | |
1584 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1585 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1586 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1587 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1588 | align_rtx)); |
3933e0e1 MM |
1589 | } |
1590 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1591 | && !fixed_regs[7] | |
1592 | && !fixed_regs[8] | |
1593 | && !fixed_regs[9] | |
1594 | && !fixed_regs[10] | |
1595 | && !fixed_regs[11] | |
1596 | && !fixed_regs[12]) | |
1597 | { | |
1598 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1599 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1600 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1601 | GEN_INT (move_bytes), |
4c64a852 | 1602 | align_rtx)); |
3933e0e1 MM |
1603 | } |
1604 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1605 | && !fixed_regs[9] | |
1606 | && !fixed_regs[10] | |
1607 | && !fixed_regs[11] | |
1608 | && !fixed_regs[12]) | |
1609 | { | |
1610 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1611 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1612 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1613 | GEN_INT (move_bytes), |
4c64a852 | 1614 | align_rtx)); |
3933e0e1 | 1615 | } |
d679bebf | 1616 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1617 | { /* move up to 8 bytes at a time */ |
1618 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1619 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1620 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1621 | GEN_INT (move_bytes), |
4c64a852 | 1622 | align_rtx)); |
3933e0e1 MM |
1623 | } |
1624 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1625 | { /* move 4 bytes */ | |
1626 | move_bytes = 4; | |
1627 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1628 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1629 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1630 | } |
1631 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1632 | { /* move 2 bytes */ | |
1633 | move_bytes = 2; | |
1634 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1635 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1636 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1637 | } |
1638 | else if (bytes == 1) /* move 1 byte */ | |
1639 | { | |
1640 | move_bytes = 1; | |
1641 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1642 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1643 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1644 | } |
1645 | else | |
1646 | { /* move up to 4 bytes at a time */ | |
1647 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1648 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1649 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1650 | GEN_INT (move_bytes), |
4c64a852 | 1651 | align_rtx)); |
3933e0e1 | 1652 | } |
4c64a852 | 1653 | |
015892ee RK |
1654 | if (bytes > move_bytes) |
1655 | { | |
1656 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1657 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1658 | } | |
4c64a852 | 1659 | } |
3933e0e1 MM |
1660 | } |
1661 | ||
1662 | else /* string instructions not available */ | |
1663 | { | |
1664 | num_reg = offset = 0; | |
1665 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1666 | { |
3933e0e1 MM |
1667 | /* Calculate the correct offset for src/dest */ |
1668 | if (offset == 0) | |
7e69e155 | 1669 | { |
3933e0e1 MM |
1670 | src_addr = src_reg; |
1671 | dest_addr = dest_reg; | |
1672 | } | |
1673 | else | |
1674 | { | |
1675 | src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); | |
1676 | dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); | |
1677 | } | |
1678 | ||
1679 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1680 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1681 | { | |
1682 | move_bytes = 8; | |
1683 | tmp_reg = gen_reg_rtx (DImode); | |
1684 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1685 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1686 | } | |
1687 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1688 | { |
1689 | move_bytes = 4; | |
1690 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1691 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1692 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1693 | } |
1694 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1695 | { | |
1696 | move_bytes = 2; | |
1697 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1698 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1699 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1700 | } |
1701 | else | |
1702 | { | |
1703 | move_bytes = 1; | |
1704 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1705 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1706 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1707 | } |
1708 | ||
1709 | if (num_reg >= MAX_MOVE_REG) | |
1710 | { | |
1711 | for (i = 0; i < num_reg; i++) | |
1712 | emit_insn (stores[i]); | |
1713 | num_reg = 0; | |
7e69e155 MM |
1714 | } |
1715 | } | |
3933e0e1 | 1716 | |
b6c9286a MM |
1717 | for (i = 0; i < num_reg; i++) |
1718 | emit_insn (stores[i]); | |
7e69e155 MM |
1719 | } |
1720 | ||
1721 | return 1; | |
1722 | } | |
1723 | ||
9878760c RK |
1724 | \f |
1725 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
1726 | PARALLEL and the first section will be tested. */ | |
1727 | ||
1728 | int | |
1729 | load_multiple_operation (op, mode) | |
1730 | rtx op; | |
1731 | enum machine_mode mode; | |
1732 | { | |
1733 | int count = XVECLEN (op, 0); | |
1734 | int dest_regno; | |
1735 | rtx src_addr; | |
1736 | int i; | |
1737 | ||
1738 | /* Perform a quick check so we don't blow up below. */ | |
1739 | if (count <= 1 | |
1740 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1741 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
1742 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
1743 | return 0; | |
1744 | ||
1745 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
1746 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
1747 | ||
1748 | for (i = 1; i < count; i++) | |
1749 | { | |
1750 | rtx elt = XVECEXP (op, 0, i); | |
1751 | ||
1752 | if (GET_CODE (elt) != SET | |
1753 | || GET_CODE (SET_DEST (elt)) != REG | |
1754 | || GET_MODE (SET_DEST (elt)) != SImode | |
1755 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
1756 | || GET_CODE (SET_SRC (elt)) != MEM | |
1757 | || GET_MODE (SET_SRC (elt)) != SImode | |
1758 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
1759 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
1760 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
1761 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
1762 | return 0; | |
1763 | } | |
1764 | ||
1765 | return 1; | |
1766 | } | |
1767 | ||
1768 | /* Similar, but tests for store multiple. Here, the second vector element | |
1769 | is a CLOBBER. It will be tested later. */ | |
1770 | ||
1771 | int | |
1772 | store_multiple_operation (op, mode) | |
1773 | rtx op; | |
1774 | enum machine_mode mode; | |
1775 | { | |
1776 | int count = XVECLEN (op, 0) - 1; | |
1777 | int src_regno; | |
1778 | rtx dest_addr; | |
1779 | int i; | |
1780 | ||
1781 | /* Perform a quick check so we don't blow up below. */ | |
1782 | if (count <= 1 | |
1783 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1784 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
1785 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
1786 | return 0; | |
1787 | ||
1788 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
1789 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
1790 | ||
1791 | for (i = 1; i < count; i++) | |
1792 | { | |
1793 | rtx elt = XVECEXP (op, 0, i + 1); | |
1794 | ||
1795 | if (GET_CODE (elt) != SET | |
1796 | || GET_CODE (SET_SRC (elt)) != REG | |
1797 | || GET_MODE (SET_SRC (elt)) != SImode | |
1798 | || REGNO (SET_SRC (elt)) != src_regno + i | |
1799 | || GET_CODE (SET_DEST (elt)) != MEM | |
1800 | || GET_MODE (SET_DEST (elt)) != SImode | |
1801 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
1802 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
1803 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
1804 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
1805 | return 0; | |
1806 | } | |
1807 | ||
1808 | return 1; | |
1809 | } | |
1810 | \f | |
1811 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
1812 | We only check the opcode against the mode of the CC value here. */ | |
1813 | ||
1814 | int | |
1815 | branch_comparison_operator (op, mode) | |
1816 | register rtx op; | |
1817 | enum machine_mode mode; | |
1818 | { | |
1819 | enum rtx_code code = GET_CODE (op); | |
1820 | enum machine_mode cc_mode; | |
1821 | ||
1822 | if (GET_RTX_CLASS (code) != '<') | |
1823 | return 0; | |
1824 | ||
1825 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1826 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1827 | return 0; | |
1828 | ||
1829 | if ((code == GT || code == LT || code == GE || code == LE) | |
1830 | && cc_mode == CCUNSmode) | |
1831 | return 0; | |
1832 | ||
1833 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1834 | && (cc_mode != CCUNSmode)) | |
1835 | return 0; | |
1836 | ||
1837 | return 1; | |
1838 | } | |
1839 | ||
1840 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
1841 | We check the opcode against the mode of the CC value and disallow EQ or | |
1842 | NE comparisons for integers. */ | |
1843 | ||
1844 | int | |
1845 | scc_comparison_operator (op, mode) | |
1846 | register rtx op; | |
1847 | enum machine_mode mode; | |
1848 | { | |
1849 | enum rtx_code code = GET_CODE (op); | |
1850 | enum machine_mode cc_mode; | |
1851 | ||
1852 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
1853 | return 0; | |
1854 | ||
1855 | if (GET_RTX_CLASS (code) != '<') | |
1856 | return 0; | |
1857 | ||
1858 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1859 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1860 | return 0; | |
1861 | ||
1862 | if (code == NE && cc_mode != CCFPmode) | |
1863 | return 0; | |
1864 | ||
1865 | if ((code == GT || code == LT || code == GE || code == LE) | |
1866 | && cc_mode == CCUNSmode) | |
1867 | return 0; | |
1868 | ||
1869 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1870 | && (cc_mode != CCUNSmode)) | |
1871 | return 0; | |
1872 | ||
c5defebb RK |
1873 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
1874 | return 0; | |
1875 | ||
9878760c RK |
1876 | return 1; |
1877 | } | |
1878 | \f | |
1879 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
1880 | mask required to convert the result of a rotate insn into a shift | |
1881 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
1882 | ||
1883 | int | |
1884 | includes_lshift_p (shiftop, andop) | |
1885 | register rtx shiftop; | |
1886 | register rtx andop; | |
1887 | { | |
1888 | int shift_mask = (~0 << INTVAL (shiftop)); | |
1889 | ||
1890 | return (INTVAL (andop) & ~shift_mask) == 0; | |
1891 | } | |
1892 | ||
1893 | /* Similar, but for right shift. */ | |
1894 | ||
1895 | int | |
1896 | includes_rshift_p (shiftop, andop) | |
1897 | register rtx shiftop; | |
1898 | register rtx andop; | |
1899 | { | |
a7653a2c | 1900 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
1901 | |
1902 | shift_mask >>= INTVAL (shiftop); | |
1903 | ||
1904 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
1905 | } | |
35068b43 RK |
1906 | |
1907 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
1908 | for lfq and stfq insns. | |
1909 | ||
1910 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
1911 | abort if we are passed pseudo registers. */ | |
1912 | ||
1913 | int | |
1914 | registers_ok_for_quad_peep (reg1, reg2) | |
1915 | rtx reg1, reg2; | |
1916 | { | |
1917 | /* We might have been passed a SUBREG. */ | |
1918 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
1919 | return 0; | |
1920 | ||
1921 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
1922 | } | |
1923 | ||
1924 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
1925 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
1926 | ||
1927 | int | |
1928 | addrs_ok_for_quad_peep (addr1, addr2) | |
1929 | register rtx addr1; | |
1930 | register rtx addr2; | |
1931 | { | |
1932 | int reg1; | |
1933 | int offset1; | |
1934 | ||
1935 | /* Extract an offset (if used) from the first addr. */ | |
1936 | if (GET_CODE (addr1) == PLUS) | |
1937 | { | |
1938 | /* If not a REG, return zero. */ | |
1939 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
1940 | return 0; | |
1941 | else | |
1942 | { | |
1943 | reg1 = REGNO (XEXP (addr1, 0)); | |
1944 | /* The offset must be constant! */ | |
1945 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
1946 | return 0; | |
1947 | offset1 = INTVAL (XEXP (addr1, 1)); | |
1948 | } | |
1949 | } | |
1950 | else if (GET_CODE (addr1) != REG) | |
1951 | return 0; | |
1952 | else | |
1953 | { | |
1954 | reg1 = REGNO (addr1); | |
1955 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
1956 | offset1 = 0; | |
1957 | } | |
1958 | ||
1959 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
1960 | if (GET_CODE (addr2) != PLUS) | |
1961 | return 0; | |
1962 | ||
1963 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
1964 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
1965 | return 0; | |
1966 | ||
1967 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
1968 | return 0; | |
1969 | ||
1970 | /* The offset for the second addr must be 8 more than the first addr. */ | |
1971 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
1972 | return 0; | |
1973 | ||
1974 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
1975 | instructions. */ | |
1976 | return 1; | |
1977 | } | |
9878760c RK |
1978 | \f |
1979 | /* Return the register class of a scratch register needed to copy IN into | |
1980 | or out of a register in CLASS in MODE. If it can be done directly, | |
1981 | NO_REGS is returned. */ | |
1982 | ||
1983 | enum reg_class | |
1984 | secondary_reload_class (class, mode, in) | |
1985 | enum reg_class class; | |
1986 | enum machine_mode mode; | |
1987 | rtx in; | |
1988 | { | |
1989 | int regno = true_regnum (in); | |
1990 | ||
1991 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1992 | regno = -1; | |
1993 | ||
1994 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS | |
1995 | into anything. */ | |
1996 | if (class == GENERAL_REGS || class == BASE_REGS | |
1997 | || (regno >= 0 && INT_REGNO_P (regno))) | |
1998 | return NO_REGS; | |
1999 | ||
2000 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2001 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2002 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2003 | return NO_REGS; | |
2004 | ||
2005 | /* We can copy among the CR registers. */ | |
2006 | if ((class == CR_REGS || class == CR0_REGS) | |
2007 | && regno >= 0 && CR_REGNO_P (regno)) | |
2008 | return NO_REGS; | |
2009 | ||
2010 | /* Otherwise, we need GENERAL_REGS. */ | |
2011 | return GENERAL_REGS; | |
2012 | } | |
2013 | \f | |
2014 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2015 | know this is a valid comparison. | |
2016 | ||
2017 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2018 | used instead of %C, so the bits will be in different places. | |
2019 | ||
b4ac57ab | 2020 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2021 | |
2022 | int | |
2023 | ccr_bit (op, scc_p) | |
2024 | register rtx op; | |
2025 | int scc_p; | |
2026 | { | |
2027 | enum rtx_code code = GET_CODE (op); | |
2028 | enum machine_mode cc_mode; | |
2029 | int cc_regnum; | |
2030 | int base_bit; | |
2031 | ||
2032 | if (GET_RTX_CLASS (code) != '<') | |
2033 | return -1; | |
2034 | ||
2035 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2036 | cc_regnum = REGNO (XEXP (op, 0)); | |
2037 | base_bit = 4 * (cc_regnum - 68); | |
2038 | ||
c5defebb RK |
2039 | /* In CCEQmode cases we have made sure that the result is always in the |
2040 | third bit of the CR field. */ | |
2041 | ||
2042 | if (cc_mode == CCEQmode) | |
2043 | return base_bit + 3; | |
2044 | ||
9878760c RK |
2045 | switch (code) |
2046 | { | |
2047 | case NE: | |
2048 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2049 | case EQ: | |
2050 | return base_bit + 2; | |
2051 | case GT: case GTU: | |
2052 | return base_bit + 1; | |
2053 | case LT: case LTU: | |
2054 | return base_bit; | |
2055 | ||
2056 | case GE: case GEU: | |
2057 | /* If floating-point, we will have done a cror to put the bit in the | |
2058 | unordered position. So test that bit. For integer, this is ! LT | |
2059 | unless this is an scc insn. */ | |
2060 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2061 | ||
2062 | case LE: case LEU: | |
2063 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2064 | ||
2065 | default: | |
2066 | abort (); | |
2067 | } | |
2068 | } | |
1ff7789b MM |
2069 | \f |
2070 | /* Return the GOT register, creating it if needed. */ | |
2071 | ||
2072 | struct rtx_def * | |
2073 | rs6000_got_register (value) | |
2074 | rtx value; | |
2075 | { | |
da39823a | 2076 | if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx) |
1ff7789b MM |
2077 | { |
2078 | if (reload_in_progress || reload_completed) | |
2079 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); | |
2080 | ||
2081 | current_function_uses_pic_offset_table = 1; | |
2082 | pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2083 | } | |
2084 | ||
2085 | return pic_offset_table_rtx; | |
2086 | } | |
2087 | ||
2088 | \f | |
2089 | /* Replace all occurances of register FROM with an new pseduo register in an insn X. | |
2090 | Store the pseudo register used in REG. | |
2091 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2092 | yet. */ | |
2093 | ||
2094 | static rtx | |
2095 | rs6000_replace_regno (x, from, reg) | |
2096 | rtx x; | |
2097 | int from; | |
2098 | rtx *reg; | |
2099 | { | |
2100 | register int i, j; | |
2101 | register char *fmt; | |
2102 | ||
2103 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2104 | if (!x) | |
2105 | return x; | |
2106 | ||
2107 | switch (GET_CODE (x)) | |
2108 | { | |
2109 | case SCRATCH: | |
2110 | case PC: | |
2111 | case CC0: | |
2112 | case CONST_INT: | |
2113 | case CONST_DOUBLE: | |
2114 | case CONST: | |
2115 | case SYMBOL_REF: | |
2116 | case LABEL_REF: | |
2117 | return x; | |
2118 | ||
2119 | case REG: | |
2120 | if (REGNO (x) == from) | |
2121 | { | |
2122 | if (! *reg) | |
84f414bc | 2123 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2124 | |
2125 | return *reg; | |
2126 | } | |
2127 | ||
2128 | return x; | |
2129 | } | |
2130 | ||
2131 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2132 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2133 | { | |
2134 | if (fmt[i] == 'e') | |
2135 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2136 | else if (fmt[i] == 'E') | |
2137 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2138 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2139 | } | |
2140 | ||
2141 | return x; | |
2142 | } | |
2143 | ||
d266da75 MM |
2144 | \f |
2145 | /* By generating position-independent code, when two different | |
2146 | programs (A and B) share a common library (libC.a), the text of | |
2147 | the library can be shared whether or not the library is linked at | |
2148 | the same address for both programs. In some of these | |
2149 | environments, position-independent code requires not only the use | |
2150 | of different addressing modes, but also special code to enable the | |
2151 | use of these addressing modes. | |
2152 | ||
2153 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2154 | codes once the function is being compiled into assembly code, but | |
2155 | not before. (It is not done before, because in the case of | |
2156 | compiling an inline function, it would lead to multiple PIC | |
2157 | prologues being included in functions which used inline functions | |
2158 | and were compiled to assembly language.) */ | |
2159 | ||
2160 | void | |
2161 | rs6000_finalize_pic () | |
2162 | { | |
30ea98f1 MM |
2163 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
2164 | with an appropriate pseduo register. If we find we need GOT/TOC, | |
2165 | add the appropriate init code. */ | |
2166 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2167 | { |
30ea98f1 MM |
2168 | rtx insn = get_insns (); |
2169 | rtx reg = NULL_RTX; | |
2170 | rtx first_insn; | |
d266da75 | 2171 | |
30ea98f1 MM |
2172 | if (GET_CODE (insn) == NOTE) |
2173 | insn = next_nonnote_insn (insn); | |
d266da75 | 2174 | |
30ea98f1 MM |
2175 | first_insn = insn; |
2176 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2177 | { | |
2178 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2179 | { |
30ea98f1 MM |
2180 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2181 | GOT_TOC_REGNUM, | |
2182 | ®); | |
2183 | ||
2184 | if (REG_NOTES (insn)) | |
2185 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2186 | GOT_TOC_REGNUM, |
2187 | ®); | |
1ff7789b | 2188 | } |
30ea98f1 | 2189 | } |
1ff7789b | 2190 | |
30ea98f1 MM |
2191 | if (reg) |
2192 | { | |
2193 | rtx init = gen_init_v4_pic (reg); | |
2194 | emit_insn_before (init, first_insn); | |
d266da75 MM |
2195 | } |
2196 | } | |
2197 | } | |
2198 | ||
30ea98f1 MM |
2199 | \f |
2200 | /* Search for any occurrance of the GOT_TOC register marker that should | |
2201 | have been eliminated, but may have crept back in. */ | |
2202 | ||
2203 | void | |
2204 | rs6000_reorg (insn) | |
2205 | rtx insn; | |
2206 | { | |
2207 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2208 | { | |
2209 | rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2210 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2211 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2212 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2213 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2214 | } | |
2215 | } | |
2216 | ||
a7df97e6 MM |
2217 | \f |
2218 | /* Define the structure for the machine field in struct function. */ | |
2219 | struct machine_function | |
2220 | { | |
2221 | int sysv_varargs_p; | |
2222 | int save_toc_p; | |
2223 | int fpmem_size; | |
2224 | int fpmem_offset; | |
2225 | }; | |
2226 | ||
2227 | /* Functions to save and restore rs6000_fpmem_size. | |
2228 | These will be called, via pointer variables, | |
2229 | from push_function_context and pop_function_context. */ | |
2230 | ||
2231 | void | |
2232 | rs6000_save_machine_status (p) | |
2233 | struct function *p; | |
2234 | { | |
2235 | struct machine_function *machine = | |
2236 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2237 | ||
2238 | p->machine = machine; | |
2239 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2240 | machine->fpmem_size = rs6000_fpmem_size; |
2241 | machine->fpmem_offset = rs6000_fpmem_offset; | |
2242 | } | |
2243 | ||
2244 | void | |
2245 | rs6000_restore_machine_status (p) | |
2246 | struct function *p; | |
2247 | { | |
2248 | struct machine_function *machine = p->machine; | |
2249 | ||
2250 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2251 | rs6000_fpmem_size = machine->fpmem_size; |
2252 | rs6000_fpmem_offset = machine->fpmem_offset; | |
2253 | ||
2254 | free (machine); | |
2255 | p->machine = (struct machine_function *)0; | |
2256 | } | |
2257 | ||
2258 | /* Do anything needed before RTL is emitted for each function. */ | |
2259 | ||
2260 | void | |
2261 | rs6000_init_expanders () | |
2262 | { | |
2263 | /* Reset varargs and save TOC indicator */ | |
2264 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2265 | rs6000_fpmem_size = 0; |
2266 | rs6000_fpmem_offset = 0; | |
2267 | pic_offset_table_rtx = (rtx)0; | |
2268 | ||
2269 | /* Arrange to save and restore machine status around nested functions. */ | |
2270 | save_machine_status = rs6000_save_machine_status; | |
2271 | restore_machine_status = rs6000_restore_machine_status; | |
2272 | } | |
2273 | ||
9878760c RK |
2274 | \f |
2275 | /* Print an operand. Recognize special options, documented below. */ | |
2276 | ||
d9407988 MM |
2277 | #ifdef TARGET_SDATA |
2278 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") | |
ba5e43aa MM |
2279 | #else |
2280 | #define SMALL_DATA_RELOC "sda21" | |
2281 | #endif | |
2282 | ||
9878760c RK |
2283 | void |
2284 | print_operand (file, x, code) | |
2285 | FILE *file; | |
2286 | rtx x; | |
2287 | char code; | |
2288 | { | |
2289 | int i; | |
2290 | int val; | |
2291 | ||
2292 | /* These macros test for integers and extract the low-order bits. */ | |
2293 | #define INT_P(X) \ | |
2294 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2295 | && GET_MODE (X) == VOIDmode) | |
2296 | ||
2297 | #define INT_LOWPART(X) \ | |
2298 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2299 | ||
2300 | switch (code) | |
2301 | { | |
a8b3aeda | 2302 | case '.': |
a85d226b RK |
2303 | /* Write out an instruction after the call which may be replaced |
2304 | with glue code by the loader. This depends on the AIX version. */ | |
2305 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2306 | return; |
2307 | ||
cfaaaf2e RK |
2308 | case '*': |
2309 | /* Write the register number of the TOC register. */ | |
4697a36c | 2310 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2311 | return; |
2312 | ||
c81bebd7 MM |
2313 | case '$': |
2314 | /* Write out either a '.' or '$' for the current location, depending | |
2315 | on whether this is Solaris or not. */ | |
2316 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2317 | return; | |
2318 | ||
9854d9ed RK |
2319 | case 'A': |
2320 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2321 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2322 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2323 | write a trash instruction. */ |
2324 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2325 | putc ('l', file); |
9854d9ed | 2326 | else |
76229ac8 | 2327 | putc ('r', file); |
9854d9ed RK |
2328 | return; |
2329 | ||
2330 | case 'b': | |
2331 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2332 | if (! INT_P (x)) |
9854d9ed | 2333 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2334 | |
9854d9ed | 2335 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2336 | return; |
2337 | ||
9854d9ed RK |
2338 | case 'C': |
2339 | /* This is an optional cror needed for LE or GE floating-point | |
2340 | comparisons. Otherwise write nothing. */ | |
2341 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2342 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2343 | { | |
2344 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2345 | ||
2346 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2347 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2348 | } | |
2349 | return; | |
2350 | ||
2351 | case 'D': | |
2352 | /* Similar, except that this is for an scc, so we must be able to | |
2353 | encode the test in a single bit that is one. We do the above | |
2354 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2355 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2356 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2357 | { | |
2358 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2359 | ||
2360 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2361 | base_bit + 2, | |
2362 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2363 | } | |
2364 | ||
2365 | else if (GET_CODE (x) == NE) | |
2366 | { | |
2367 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2368 | ||
2369 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2370 | base_bit + 2, base_bit + 2); | |
2371 | } | |
2372 | return; | |
2373 | ||
2374 | case 'E': | |
2375 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2376 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2377 | output_operand_lossage ("invalid %%E value"); | |
2378 | ||
2379 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2380 | return; |
9854d9ed RK |
2381 | |
2382 | case 'f': | |
2383 | /* X is a CR register. Print the shift count needed to move it | |
2384 | to the high-order four bits. */ | |
2385 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2386 | output_operand_lossage ("invalid %%f value"); | |
2387 | else | |
2388 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2389 | return; | |
2390 | ||
2391 | case 'F': | |
2392 | /* Similar, but print the count for the rotate in the opposite | |
2393 | direction. */ | |
2394 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2395 | output_operand_lossage ("invalid %%F value"); | |
2396 | else | |
2397 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2398 | return; | |
2399 | ||
2400 | case 'G': | |
2401 | /* X is a constant integer. If it is negative, print "m", | |
2402 | otherwise print "z". This is to make a aze or ame insn. */ | |
2403 | if (GET_CODE (x) != CONST_INT) | |
2404 | output_operand_lossage ("invalid %%G value"); | |
2405 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2406 | putc ('z', file); |
9854d9ed | 2407 | else |
76229ac8 | 2408 | putc ('m', file); |
9854d9ed RK |
2409 | return; |
2410 | ||
9878760c | 2411 | case 'h': |
df3d94ed RK |
2412 | /* If constant, output low-order five bits. Otherwise, |
2413 | write normally. */ | |
9878760c RK |
2414 | if (INT_P (x)) |
2415 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2416 | else | |
2417 | print_operand (file, x, 0); | |
2418 | return; | |
2419 | ||
64305719 DE |
2420 | case 'H': |
2421 | /* If constant, output low-order six bits. Otherwise, | |
2422 | write normally. */ | |
2423 | if (INT_P (x)) | |
2424 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2425 | else | |
2426 | print_operand (file, x, 0); | |
2427 | return; | |
2428 | ||
9854d9ed RK |
2429 | case 'I': |
2430 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2431 | if (INT_P (x)) |
76229ac8 | 2432 | putc ('i', file); |
9878760c RK |
2433 | return; |
2434 | ||
9854d9ed RK |
2435 | case 'j': |
2436 | /* Write the bit number in CCR for jump. */ | |
2437 | i = ccr_bit (x, 0); | |
2438 | if (i == -1) | |
2439 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2440 | else |
9854d9ed | 2441 | fprintf (file, "%d", i); |
9878760c RK |
2442 | return; |
2443 | ||
9854d9ed RK |
2444 | case 'J': |
2445 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2446 | scc flag to `ccr_bit'. */ | |
2447 | i = ccr_bit (x, 1); | |
2448 | if (i == -1) | |
2449 | output_operand_lossage ("invalid %%J code"); | |
2450 | else | |
a0466a68 RK |
2451 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2452 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2453 | return; |
2454 | ||
9854d9ed RK |
2455 | case 'k': |
2456 | /* X must be a constant. Write the 1's complement of the | |
2457 | constant. */ | |
9878760c | 2458 | if (! INT_P (x)) |
9854d9ed | 2459 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2460 | |
9854d9ed | 2461 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2462 | return; |
2463 | ||
9854d9ed RK |
2464 | case 'L': |
2465 | /* Write second word of DImode or DFmode reference. Works on register | |
2466 | or non-indexed memory only. */ | |
2467 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2468 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2469 | else if (GET_CODE (x) == MEM) |
2470 | { | |
2471 | /* Handle possible auto-increment. Since it is pre-increment and | |
2472 | we have already done it, we can just use an offset of four. */ | |
2473 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2474 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2475 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4)); |
9854d9ed | 2476 | else |
a54d04b7 | 2477 | output_address (plus_constant (XEXP (x, 0), 4)); |
ba5e43aa MM |
2478 | if (small_data_operand (x, GET_MODE (x))) |
2479 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9854d9ed | 2480 | } |
9878760c | 2481 | return; |
9854d9ed | 2482 | |
9878760c RK |
2483 | case 'm': |
2484 | /* MB value for a mask operand. */ | |
2485 | if (! mask_operand (x, VOIDmode)) | |
2486 | output_operand_lossage ("invalid %%m value"); | |
2487 | ||
2488 | val = INT_LOWPART (x); | |
2489 | ||
2490 | /* If the high bit is set and the low bit is not, the value is zero. | |
2491 | If the high bit is zero, the value is the first 1 bit we find from | |
2492 | the left. */ | |
2493 | if (val < 0 && (val & 1) == 0) | |
2494 | { | |
19d2d16f | 2495 | putc ('0', file); |
9878760c RK |
2496 | return; |
2497 | } | |
2498 | else if (val >= 0) | |
2499 | { | |
2500 | for (i = 1; i < 32; i++) | |
2501 | if ((val <<= 1) < 0) | |
2502 | break; | |
2503 | fprintf (file, "%d", i); | |
2504 | return; | |
2505 | } | |
2506 | ||
2507 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2508 | number plus 1. We know the low-order bit is one. */ | |
2509 | for (i = 0; i < 32; i++) | |
2510 | if (((val >>= 1) & 1) == 0) | |
2511 | break; | |
2512 | ||
2513 | /* If we ended in ...01, I would be 0. The correct value is 31, so | |
2514 | we want 31 - i. */ | |
2515 | fprintf (file, "%d", 31 - i); | |
2516 | return; | |
2517 | ||
2518 | case 'M': | |
2519 | /* ME value for a mask operand. */ | |
2520 | if (! mask_operand (x, VOIDmode)) | |
2521 | output_operand_lossage ("invalid %%m value"); | |
2522 | ||
2523 | val = INT_LOWPART (x); | |
2524 | ||
2525 | /* If the low bit is set and the high bit is not, the value is 31. | |
2526 | If the low bit is zero, the value is the first 1 bit we find from | |
2527 | the right. */ | |
2528 | if ((val & 1) && val >= 0) | |
2529 | { | |
76229ac8 | 2530 | fputs ("31", file); |
9878760c RK |
2531 | return; |
2532 | } | |
2533 | else if ((val & 1) == 0) | |
2534 | { | |
2535 | for (i = 0; i < 32; i++) | |
2536 | if ((val >>= 1) & 1) | |
2537 | break; | |
2538 | ||
2539 | /* If we had ....10, I would be 0. The result should be | |
2540 | 30, so we need 30 - i. */ | |
2541 | fprintf (file, "%d", 30 - i); | |
2542 | return; | |
2543 | } | |
2544 | ||
2545 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2546 | number minus 1. We know the high-order bit is one. */ | |
2547 | for (i = 0; i < 32; i++) | |
2548 | if ((val <<= 1) >= 0) | |
2549 | break; | |
2550 | ||
2551 | fprintf (file, "%d", i); | |
2552 | return; | |
2553 | ||
9878760c RK |
2554 | case 'N': |
2555 | /* Write the number of elements in the vector times 4. */ | |
2556 | if (GET_CODE (x) != PARALLEL) | |
2557 | output_operand_lossage ("invalid %%N value"); | |
2558 | ||
2559 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2560 | return; | |
2561 | ||
2562 | case 'O': | |
2563 | /* Similar, but subtract 1 first. */ | |
2564 | if (GET_CODE (x) != PARALLEL) | |
2565 | output_operand_lossage ("invalid %%N value"); | |
2566 | ||
2567 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2568 | return; | |
2569 | ||
9854d9ed RK |
2570 | case 'p': |
2571 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2572 | if (! INT_P (x) | |
2573 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2574 | output_operand_lossage ("invalid %%p value"); | |
2575 | ||
2576 | fprintf (file, "%d", i); | |
2577 | return; | |
2578 | ||
9878760c RK |
2579 | case 'P': |
2580 | /* The operand must be an indirect memory reference. The result | |
2581 | is the register number. */ | |
2582 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2583 | || REGNO (XEXP (x, 0)) >= 32) | |
2584 | output_operand_lossage ("invalid %%P value"); | |
2585 | ||
2586 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2587 | return; | |
2588 | ||
9854d9ed RK |
2589 | case 'R': |
2590 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2591 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2592 | output_operand_lossage ("invalid %%R value"); | |
2593 | else | |
2594 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2595 | return; |
9854d9ed RK |
2596 | |
2597 | case 's': | |
2598 | /* Low 5 bits of 32 - value */ | |
2599 | if (! INT_P (x)) | |
2600 | output_operand_lossage ("invalid %%s value"); | |
2601 | ||
2602 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2603 | return; |
9854d9ed | 2604 | |
9878760c RK |
2605 | case 't': |
2606 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2607 | All floating-point operations except NE branch true and integer | |
2608 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2609 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2610 | output_operand_lossage ("invalid %%t value"); | |
2611 | ||
2612 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2613 | && GET_CODE (x) != NE) | |
2614 | || GET_CODE (x) == EQ | |
2615 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2616 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2617 | fputs ("12", file); |
9878760c | 2618 | else |
76229ac8 | 2619 | putc ('4', file); |
9878760c RK |
2620 | return; |
2621 | ||
2622 | case 'T': | |
2623 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2624 | 12 otherwise. */ | |
2625 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2626 | output_operand_lossage ("invalid %%t value"); | |
2627 | ||
2628 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2629 | && GET_CODE (x) != NE) | |
2630 | || GET_CODE (x) == EQ | |
2631 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2632 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2633 | putc ('4', file); |
9878760c | 2634 | else |
76229ac8 | 2635 | fputs ("12", file); |
9878760c RK |
2636 | return; |
2637 | ||
9854d9ed | 2638 | case 'u': |
802a0058 | 2639 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
2640 | if (! INT_P (x)) |
2641 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 2642 | |
76229ac8 | 2643 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
2644 | return; |
2645 | ||
802a0058 MM |
2646 | case 'v': |
2647 | /* High-order 16 bits of constant for use in signed operand. */ | |
2648 | if (! INT_P (x)) | |
2649 | output_operand_lossage ("invalid %%v value"); | |
2650 | ||
2651 | { | |
2652 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
2653 | ||
2654 | /* Solaris assembler doesn't like lis 0,0x80000 */ | |
2655 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) | |
2656 | fprintf (file, "%d", value | (~0 << 16)); | |
2657 | else | |
2658 | fprintf (file, "0x%x", value); | |
2659 | return; | |
2660 | } | |
2661 | ||
9854d9ed RK |
2662 | case 'U': |
2663 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
2664 | if (GET_CODE (x) == MEM | |
2665 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2666 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 2667 | putc ('u', file); |
9854d9ed | 2668 | return; |
9878760c | 2669 | |
9854d9ed RK |
2670 | case 'w': |
2671 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
2672 | normally. */ | |
2673 | if (INT_P (x)) | |
2674 | fprintf (file, "%d", | |
2675 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
2676 | else | |
2677 | print_operand (file, x, 0); | |
9878760c RK |
2678 | return; |
2679 | ||
9854d9ed RK |
2680 | case 'W': |
2681 | /* If constant, low-order 16 bits of constant, unsigned. | |
2682 | Otherwise, write normally. */ | |
2683 | if (INT_P (x)) | |
2684 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
2685 | else | |
2686 | print_operand (file, x, 0); | |
2687 | return; | |
9878760c | 2688 | |
9854d9ed RK |
2689 | case 'X': |
2690 | if (GET_CODE (x) == MEM | |
2691 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 2692 | putc ('x', file); |
9854d9ed | 2693 | return; |
9878760c | 2694 | |
9854d9ed RK |
2695 | case 'Y': |
2696 | /* Like 'L', for third word of TImode */ | |
2697 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2698 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 2699 | else if (GET_CODE (x) == MEM) |
9878760c | 2700 | { |
9854d9ed RK |
2701 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2702 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2703 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 2704 | else |
a54d04b7 | 2705 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa MM |
2706 | if (small_data_operand (x, GET_MODE (x))) |
2707 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9878760c RK |
2708 | } |
2709 | return; | |
9854d9ed | 2710 | |
9878760c | 2711 | case 'z': |
b4ac57ab RS |
2712 | /* X is a SYMBOL_REF. Write out the name preceded by a |
2713 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
2714 | names. If we are configured for System V (or the embedded ABI) on |
2715 | the PowerPC, do not emit the period, since those systems do not use | |
2716 | TOCs and the like. */ | |
9878760c RK |
2717 | if (GET_CODE (x) != SYMBOL_REF) |
2718 | abort (); | |
2719 | ||
b6c9286a MM |
2720 | if (XSTR (x, 0)[0] != '.') |
2721 | { | |
2722 | switch (DEFAULT_ABI) | |
2723 | { | |
2724 | default: | |
2725 | abort (); | |
2726 | ||
2727 | case ABI_AIX: | |
2728 | putc ('.', file); | |
2729 | break; | |
2730 | ||
2731 | case ABI_V4: | |
2732 | case ABI_AIX_NODESC: | |
c81bebd7 | 2733 | case ABI_SOLARIS: |
b6c9286a MM |
2734 | break; |
2735 | ||
2736 | case ABI_NT: | |
2737 | fputs ("..", file); | |
2738 | break; | |
2739 | } | |
2740 | } | |
9878760c RK |
2741 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
2742 | return; | |
2743 | ||
9854d9ed RK |
2744 | case 'Z': |
2745 | /* Like 'L', for last word of TImode. */ | |
2746 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2747 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
2748 | else if (GET_CODE (x) == MEM) |
2749 | { | |
2750 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2751 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2752 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 2753 | else |
a54d04b7 | 2754 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa MM |
2755 | if (small_data_operand (x, GET_MODE (x))) |
2756 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
9854d9ed | 2757 | } |
5c23c401 | 2758 | return; |
9854d9ed | 2759 | |
9878760c RK |
2760 | case 0: |
2761 | if (GET_CODE (x) == REG) | |
2762 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
2763 | else if (GET_CODE (x) == MEM) | |
2764 | { | |
2765 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
2766 | know the width from the mode. */ | |
2767 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
2768 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
2769 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2770 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
2771 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
2772 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2773 | else | |
a54d04b7 | 2774 | output_address (XEXP (x, 0)); |
9878760c RK |
2775 | } |
2776 | else | |
a54d04b7 | 2777 | output_addr_const (file, x); |
a85d226b | 2778 | return; |
9878760c RK |
2779 | |
2780 | default: | |
2781 | output_operand_lossage ("invalid %%xn code"); | |
2782 | } | |
2783 | } | |
2784 | \f | |
2785 | /* Print the address of an operand. */ | |
2786 | ||
2787 | void | |
2788 | print_operand_address (file, x) | |
2789 | FILE *file; | |
2790 | register rtx x; | |
2791 | { | |
2792 | if (GET_CODE (x) == REG) | |
4697a36c | 2793 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 2794 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
2795 | { |
2796 | output_addr_const (file, x); | |
ba5e43aa MM |
2797 | if (small_data_operand (x, GET_MODE (x))) |
2798 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]); | |
7509c759 | 2799 | |
4697a36c | 2800 | #ifdef TARGET_NO_TOC |
7509c759 | 2801 | else if (TARGET_NO_TOC) |
4697a36c | 2802 | ; |
4697a36c | 2803 | #endif |
7509c759 | 2804 | else |
4697a36c | 2805 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
2806 | } |
2807 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
2808 | { | |
2809 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
2810 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
2811 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 2812 | else |
4697a36c MM |
2813 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
2814 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
2815 | } |
2816 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
2817 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
2818 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
2819 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
2820 | { | |
2821 | output_addr_const (file, XEXP (x, 1)); | |
2822 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
2823 | } | |
9878760c RK |
2824 | else |
2825 | abort (); | |
2826 | } | |
2827 | \f | |
2828 | /* This page contains routines that are used to determine what the function | |
2829 | prologue and epilogue code will do and write them out. */ | |
2830 | ||
2831 | /* Return the first fixed-point register that is required to be saved. 32 if | |
2832 | none. */ | |
2833 | ||
2834 | int | |
2835 | first_reg_to_save () | |
2836 | { | |
2837 | int first_reg; | |
2838 | ||
2839 | /* Find lowest numbered live register. */ | |
2840 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
2841 | if (regs_ever_live[first_reg]) | |
2842 | break; | |
2843 | ||
e165f3f0 | 2844 | /* If profiling, then we must save/restore every register that contains |
9c849d2a | 2845 | a parameter before/after the .__mcount call. Use registers from 30 down |
e165f3f0 RK |
2846 | to 23 to do this. Don't use the frame pointer in reg 31. |
2847 | ||
2848 | For now, save enough room for all of the parameter registers. */ | |
b6c9286a | 2849 | if (DEFAULT_ABI == ABI_AIX && profile_flag) |
e165f3f0 RK |
2850 | if (first_reg > 23) |
2851 | first_reg = 23; | |
2852 | ||
9878760c RK |
2853 | return first_reg; |
2854 | } | |
2855 | ||
2856 | /* Similar, for FP regs. */ | |
2857 | ||
2858 | int | |
2859 | first_fp_reg_to_save () | |
2860 | { | |
2861 | int first_reg; | |
2862 | ||
2863 | /* Find lowest numbered live register. */ | |
2864 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
2865 | if (regs_ever_live[first_reg]) | |
2866 | break; | |
2867 | ||
2868 | return first_reg; | |
2869 | } | |
2870 | ||
9878760c RK |
2871 | /* Return non-zero if this function makes calls. */ |
2872 | ||
2873 | int | |
2874 | rs6000_makes_calls () | |
2875 | { | |
2876 | rtx insn; | |
2877 | ||
9c849d2a | 2878 | /* If we are profiling, we will be making a call to __mcount. */ |
0c61c946 RK |
2879 | if (profile_flag) |
2880 | return 1; | |
2881 | ||
9878760c RK |
2882 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
2883 | if (GET_CODE (insn) == CALL_INSN) | |
2884 | return 1; | |
2885 | ||
2886 | return 0; | |
2887 | } | |
2888 | ||
4697a36c MM |
2889 | \f |
2890 | /* Calculate the stack information for the current function. This is | |
2891 | complicated by having two separate calling sequences, the AIX calling | |
2892 | sequence and the V.4 calling sequence. | |
2893 | ||
2894 | AIX stack frames look like: | |
2895 | ||
2896 | SP----> +---------------------------------------+ | |
2897 | | back chain to caller | 0 | |
2898 | +---------------------------------------+ | |
2899 | | saved CR | 4 | |
2900 | +---------------------------------------+ | |
2901 | | saved LR | 8 | |
2902 | +---------------------------------------+ | |
2903 | | reserved for compilers | 12 | |
2904 | +---------------------------------------+ | |
2905 | | reserved for binders | 16 | |
2906 | +---------------------------------------+ | |
2907 | | saved TOC pointer | 20 | |
2908 | +---------------------------------------+ | |
2909 | | Parameter save area (P) | 24 | |
2910 | +---------------------------------------+ | |
a7df97e6 | 2911 | | Alloca space (A) | 24+P |
802a0058 | 2912 | +---------------------------------------+ |
a7df97e6 | 2913 | | Local variable space (L) | 24+P+A |
4697a36c | 2914 | +---------------------------------------+ |
a7df97e6 | 2915 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 2916 | +---------------------------------------+ |
a7df97e6 | 2917 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 2918 | +---------------------------------------+ |
a7df97e6 | 2919 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
2920 | +---------------------------------------+ |
2921 | old SP->| back chain to caller's caller | | |
2922 | +---------------------------------------+ | |
2923 | ||
2924 | V.4 stack frames look like: | |
2925 | ||
2926 | SP----> +---------------------------------------+ | |
2927 | | back chain to caller | 0 | |
2928 | +---------------------------------------+ | |
5eb387b8 | 2929 | | caller's saved LR | 4 |
4697a36c MM |
2930 | +---------------------------------------+ |
2931 | | Parameter save area (P) | 8 | |
2932 | +---------------------------------------+ | |
a7df97e6 MM |
2933 | | Alloca space (A) | 8+P |
2934 | +---------------------------------------+ | |
2935 | | Varargs save area (V) | 8+P+A | |
2936 | +---------------------------------------+ | |
2937 | | Local variable space (L) | 8+P+A+V | |
2938 | +---------------------------------------+ | |
2939 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 2940 | +---------------------------------------+ |
a7df97e6 MM |
2941 | | saved CR (C) | 8+P+A+V+L+X |
2942 | +---------------------------------------+ | |
2943 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
2944 | +---------------------------------------+ | |
2945 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
2946 | +---------------------------------------+ |
2947 | old SP->| back chain to caller's caller | | |
2948 | +---------------------------------------+ | |
b6c9286a MM |
2949 | |
2950 | ||
2951 | A PowerPC Windows/NT frame looks like: | |
2952 | ||
2953 | SP----> +---------------------------------------+ | |
2954 | | back chain to caller | 0 | |
2955 | +---------------------------------------+ | |
2956 | | reserved | 4 | |
2957 | +---------------------------------------+ | |
2958 | | reserved | 8 | |
2959 | +---------------------------------------+ | |
2960 | | reserved | 12 | |
2961 | +---------------------------------------+ | |
2962 | | reserved | 16 | |
2963 | +---------------------------------------+ | |
2964 | | reserved | 20 | |
2965 | +---------------------------------------+ | |
2966 | | Parameter save area (P) | 24 | |
2967 | +---------------------------------------+ | |
a7df97e6 MM |
2968 | | Alloca space (A) | 24+P |
2969 | +---------------------------------------+ | |
2970 | | Local variable space (L) | 24+P+A | |
2971 | +---------------------------------------+ | |
2972 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 2973 | +---------------------------------------+ |
a7df97e6 MM |
2974 | | Save area for FP registers (F) | 24+P+A+L+X |
2975 | +---------------------------------------+ | |
2976 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
2977 | +---------------------------------------+ | |
2978 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
2979 | +---------------------------------------+ | |
2980 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
2981 | +---------------------------------------+ | |
2982 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
2983 | +---------------------------------------+ | |
2984 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
2985 | +---------------------------------------+ |
2986 | old SP->| back chain to caller's caller | | |
2987 | +---------------------------------------+ | |
2988 | ||
2989 | For NT, there is no specific order to save the registers, but in | |
2990 | order to support __builtin_return_address, the save area for the | |
2991 | link register needs to be in a known place, so we use -4 off of the | |
2992 | old SP. To support calls through pointers, we also allocate a | |
2993 | fixed slot to store the TOC, -8 off the old SP. */ | |
4697a36c | 2994 | |
61b2fbe7 MM |
2995 | #ifndef ABI_STACK_BOUNDARY |
2996 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
2997 | #endif | |
2998 | ||
4697a36c MM |
2999 | rs6000_stack_t * |
3000 | rs6000_stack_info () | |
3001 | { | |
3002 | static rs6000_stack_t info, zero_info; | |
3003 | rs6000_stack_t *info_ptr = &info; | |
3004 | int reg_size = TARGET_64BIT ? 8 : 4; | |
24d304eb | 3005 | enum rs6000_abi abi; |
b6c9286a | 3006 | int total_raw_size; |
4697a36c MM |
3007 | |
3008 | /* Zero all fields portably */ | |
3009 | info = zero_info; | |
3010 | ||
3011 | /* Select which calling sequence */ | |
b6c9286a | 3012 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3013 | |
4697a36c MM |
3014 | /* Calculate which registers need to be saved & save area size */ |
3015 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3016 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3017 | ||
3018 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3019 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3020 | ||
3021 | /* Does this function call anything? */ | |
3022 | info_ptr->calls_p = rs6000_makes_calls (); | |
3023 | ||
62c0fb87 | 3024 | /* Allocate space to save the toc. */ |
82280d5e | 3025 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3026 | { |
3027 | info_ptr->toc_save_p = 1; | |
3028 | info_ptr->toc_size = reg_size; | |
3029 | } | |
3030 | ||
802a0058 MM |
3031 | /* Does this machine need the float/int conversion area? */ |
3032 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3033 | ||
b6c9286a MM |
3034 | /* If this is main and we need to call a function to set things up, |
3035 | save main's arguments around the call. */ | |
c81bebd7 MM |
3036 | #ifdef TARGET_EABI |
3037 | if (TARGET_EABI) | |
3038 | #endif | |
b6c9286a | 3039 | { |
30ccf55d MS |
3040 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3041 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3042 | { |
c81bebd7 | 3043 | info_ptr->main_p = 1; |
b6c9286a | 3044 | |
c81bebd7 MM |
3045 | #ifdef NAME__MAIN |
3046 | info_ptr->calls_p = 1; | |
b6c9286a | 3047 | |
c81bebd7 | 3048 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3049 | { |
c81bebd7 MM |
3050 | int i; |
3051 | tree arg; | |
3052 | ||
3053 | info_ptr->main_save_p = 1; | |
3054 | info_ptr->main_size = 0; | |
3055 | ||
3056 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3057 | arg != NULL_TREE && i < 8; | |
3058 | (arg = TREE_CHAIN (arg)), i++) | |
3059 | { | |
3060 | info_ptr->main_size += reg_size; | |
3061 | } | |
b6c9286a | 3062 | } |
b6c9286a | 3063 | #endif |
c81bebd7 | 3064 | } |
b6c9286a MM |
3065 | } |
3066 | ||
c81bebd7 | 3067 | |
4697a36c MM |
3068 | /* Determine if we need to save the link register */ |
3069 | if (regs_ever_live[65] || profile_flag | |
3070 | #ifdef TARGET_RELOCATABLE | |
3071 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3072 | #endif | |
3073 | || (info_ptr->first_fp_reg_save != 64 | |
3074 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3075 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3076 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3077 | || info_ptr->calls_p) |
3078 | { | |
3079 | info_ptr->lr_save_p = 1; | |
3080 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3081 | if (abi == ABI_NT) |
3082 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3083 | } |
3084 | ||
3085 | /* Determine if we need to save the condition code registers */ | |
3086 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3087 | { | |
3088 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3089 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3090 | info_ptr->cr_size = reg_size; |
3091 | } | |
3092 | ||
3093 | /* Determine various sizes */ | |
3094 | info_ptr->reg_size = reg_size; | |
3095 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3096 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3097 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3098 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3099 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3100 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3101 | + info_ptr->gp_size |
3102 | + info_ptr->cr_size | |
3103 | + info_ptr->lr_size | |
3104 | + info_ptr->toc_size | |
3105 | + info_ptr->main_size, 8); | |
3106 | ||
3107 | total_raw_size = (info_ptr->vars_size | |
3108 | + info_ptr->parm_size | |
802a0058 | 3109 | + info_ptr->fpmem_size |
b6c9286a MM |
3110 | + info_ptr->save_size |
3111 | + info_ptr->varargs_size | |
3112 | + info_ptr->fixed_size); | |
3113 | ||
189e03e3 | 3114 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); |
4697a36c MM |
3115 | |
3116 | /* Determine if we need to allocate any stack frame. | |
3117 | For AIX We need to push the stack if a frame pointer is needed (because | |
3118 | the stack might be dynamically adjusted), if we are debugging, if the | |
3119 | total stack size is more than 220 bytes, or if we make calls. | |
3120 | ||
3121 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3122 | the debugger can handle stackless frames. */ | |
3123 | ||
3124 | if (info_ptr->calls_p) | |
3125 | info_ptr->push_p = 1; | |
3126 | ||
c81bebd7 | 3127 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
b6c9286a | 3128 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size |
4697a36c MM |
3129 | || info_ptr->lr_save_p); |
3130 | ||
3131 | else | |
3132 | info_ptr->push_p = (frame_pointer_needed | |
3133 | || write_symbols != NO_DEBUG | |
3134 | || info_ptr->total_size > 220); | |
3135 | ||
3136 | /* Calculate the offsets */ | |
24d304eb | 3137 | switch (abi) |
4697a36c | 3138 | { |
b6c9286a | 3139 | case ABI_NONE: |
24d304eb | 3140 | default: |
b6c9286a MM |
3141 | abort (); |
3142 | ||
3143 | case ABI_AIX: | |
3144 | case ABI_AIX_NODESC: | |
3145 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3146 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3147 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
3148 | info_ptr->cr_save_offset = 4; | |
3149 | info_ptr->lr_save_offset = 8; | |
24d304eb RK |
3150 | break; |
3151 | ||
3152 | case ABI_V4: | |
c81bebd7 | 3153 | case ABI_SOLARIS: |
b6c9286a MM |
3154 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3155 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3156 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3157 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3158 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3159 | info_ptr->lr_save_offset = reg_size; |
3160 | break; | |
3161 | ||
3162 | case ABI_NT: | |
3163 | info_ptr->lr_save_offset = -4; | |
3164 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; | |
3165 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3166 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3167 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3168 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
3169 | info_ptr->fp_save_offset -= 4; | |
3170 | ||
3171 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3172 | break; |
4697a36c MM |
3173 | } |
3174 | ||
a7df97e6 MM |
3175 | if (info_ptr->fpmem_p) |
3176 | info_ptr->fpmem_offset = STARTING_FRAME_OFFSET - info_ptr->total_size + info_ptr->vars_size; | |
3177 | ||
4697a36c MM |
3178 | /* Zero offsets if we're not saving those registers */ |
3179 | if (!info_ptr->fp_size) | |
3180 | info_ptr->fp_save_offset = 0; | |
3181 | ||
3182 | if (!info_ptr->gp_size) | |
3183 | info_ptr->gp_save_offset = 0; | |
3184 | ||
3185 | if (!info_ptr->lr_save_p) | |
3186 | info_ptr->lr_save_offset = 0; | |
3187 | ||
3188 | if (!info_ptr->cr_save_p) | |
3189 | info_ptr->cr_save_offset = 0; | |
3190 | ||
b6c9286a MM |
3191 | if (!info_ptr->toc_save_p) |
3192 | info_ptr->toc_save_offset = 0; | |
3193 | ||
3194 | if (!info_ptr->main_save_p) | |
3195 | info_ptr->main_save_offset = 0; | |
3196 | ||
802a0058 MM |
3197 | if (!info_ptr->fpmem_p) |
3198 | info_ptr->fpmem_offset = 0; | |
3199 | else | |
3200 | { | |
3201 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a7df97e6 | 3202 | rs6000_fpmem_offset = info_ptr->total_size + info_ptr->fpmem_offset; |
802a0058 MM |
3203 | } |
3204 | ||
4697a36c MM |
3205 | return info_ptr; |
3206 | } | |
3207 | ||
3208 | void | |
3209 | debug_stack_info (info) | |
3210 | rs6000_stack_t *info; | |
9878760c | 3211 | { |
24d304eb RK |
3212 | char *abi_string; |
3213 | ||
4697a36c MM |
3214 | if (!info) |
3215 | info = rs6000_stack_info (); | |
3216 | ||
3217 | fprintf (stderr, "\nStack information for function %s:\n", | |
3218 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3219 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3220 | : "<unknown>")); | |
3221 | ||
24d304eb RK |
3222 | switch (info->abi) |
3223 | { | |
b6c9286a MM |
3224 | default: abi_string = "Unknown"; break; |
3225 | case ABI_NONE: abi_string = "NONE"; break; | |
3226 | case ABI_AIX: abi_string = "AIX"; break; | |
3227 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3228 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3229 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3230 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3231 | } |
3232 | ||
3233 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3234 | ||
4697a36c MM |
3235 | if (info->first_gp_reg_save != 32) |
3236 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3237 | ||
3238 | if (info->first_fp_reg_save != 64) | |
3239 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3240 | |
4697a36c MM |
3241 | if (info->lr_save_p) |
3242 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3243 | |
4697a36c MM |
3244 | if (info->cr_save_p) |
3245 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3246 | ||
b6c9286a MM |
3247 | if (info->toc_save_p) |
3248 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3249 | ||
4697a36c MM |
3250 | if (info->push_p) |
3251 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3252 | ||
3253 | if (info->calls_p) | |
3254 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3255 | ||
b6c9286a MM |
3256 | if (info->main_p) |
3257 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3258 | ||
3259 | if (info->main_save_p) | |
3260 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3261 | ||
802a0058 MM |
3262 | if (info->fpmem_p) |
3263 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3264 | ||
4697a36c MM |
3265 | if (info->gp_save_offset) |
3266 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3267 | ||
3268 | if (info->fp_save_offset) | |
3269 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3270 | ||
3271 | if (info->lr_save_offset) | |
3272 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3273 | ||
3274 | if (info->cr_save_offset) | |
3275 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3276 | ||
b6c9286a MM |
3277 | if (info->toc_save_offset) |
3278 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3279 | ||
4697a36c MM |
3280 | if (info->varargs_save_offset) |
3281 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3282 | ||
b6c9286a MM |
3283 | if (info->main_save_offset) |
3284 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3285 | ||
802a0058 MM |
3286 | if (info->fpmem_offset) |
3287 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3288 | ||
4697a36c MM |
3289 | if (info->total_size) |
3290 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3291 | ||
3292 | if (info->varargs_size) | |
3293 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3294 | ||
3295 | if (info->vars_size) | |
3296 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3297 | ||
3298 | if (info->parm_size) | |
3299 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3300 | ||
802a0058 MM |
3301 | if (info->fpmem_size) |
3302 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3303 | ||
4697a36c MM |
3304 | if (info->fixed_size) |
3305 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3306 | ||
3307 | if (info->gp_size) | |
3308 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3309 | ||
3310 | if (info->fp_size) | |
3311 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3312 | ||
b6c9286a MM |
3313 | if (info->lr_size) |
3314 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3315 | ||
4697a36c MM |
3316 | if (info->cr_size) |
3317 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3318 | ||
b6c9286a MM |
3319 | if (info->toc_size) |
3320 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3321 | ||
3322 | if (info->main_size) | |
3323 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3324 | ||
4697a36c MM |
3325 | if (info->save_size) |
3326 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3327 | ||
3328 | if (info->reg_size != 4) | |
3329 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3330 | ||
3331 | fprintf (stderr, "\n"); | |
9878760c | 3332 | } |
4697a36c | 3333 | \f |
c7ca610e RK |
3334 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3335 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3336 | a constant pool. */ | |
3337 | ||
3338 | void | |
3339 | rs6000_output_load_toc_table (file) | |
3340 | FILE *file; | |
3341 | { | |
3342 | char buf[256]; | |
3343 | ||
3344 | #ifdef USING_SVR4_H | |
3345 | if (TARGET_RELOCATABLE) | |
3346 | { | |
3347 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3348 | fprintf (file, "\tbl "); | |
3349 | assemble_name (file, buf); | |
3350 | fprintf (file, "\n"); | |
3351 | ||
3352 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); | |
3353 | fprintf (file, "\tmflr %s\n", reg_names[30]); | |
3354 | ||
3355 | if (TARGET_POWERPC64) | |
3356 | fprintf (file, "\tld"); | |
3357 | else if (TARGET_NEW_MNEMONICS) | |
3358 | fprintf (file, "\tlwz"); | |
3359 | else | |
3360 | fprintf (file, "\tl"); | |
3361 | ||
3362 | fprintf (file, " %s,(", reg_names[0]); | |
ab9eef41 | 3363 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_func_labelno); |
c7ca610e RK |
3364 | assemble_name (file, buf); |
3365 | fprintf (file, "-"); | |
3366 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3367 | assemble_name (file, buf); | |
3368 | fprintf (file, ")(%s)\n", reg_names[30]); | |
3369 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", | |
3370 | reg_names[30], reg_names[0], reg_names[30]); | |
3371 | rs6000_pic_labelno++; | |
3372 | } | |
3373 | else if (!TARGET_64BIT) | |
3374 | { | |
3375 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3376 | asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]); | |
3377 | assemble_name (file, buf); | |
3378 | asm_fprintf (file, "@ha\n"); | |
3379 | if (TARGET_NEW_MNEMONICS) | |
3380 | { | |
3381 | asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]); | |
3382 | assemble_name (file, buf); | |
3383 | asm_fprintf (file, "@l\n"); | |
3384 | } | |
3385 | else | |
3386 | { | |
3387 | asm_fprintf (file, "\tcal %s,", reg_names[30]); | |
3388 | assemble_name (file, buf); | |
3389 | asm_fprintf (file, "@l(%s)\n", reg_names[30]); | |
3390 | } | |
3391 | } | |
3392 | else | |
3393 | abort (); | |
3394 | ||
3395 | #else /* !USING_SVR4_H */ | |
3396 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
3397 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]); | |
3398 | assemble_name (file, buf); | |
3399 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3400 | #endif /* USING_SVR4_H */ | |
3401 | } | |
3402 | ||
9878760c | 3403 | /* Write function prologue. */ |
9878760c RK |
3404 | void |
3405 | output_prolog (file, size) | |
3406 | FILE *file; | |
3407 | int size; | |
3408 | { | |
4697a36c | 3409 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a MM |
3410 | int reg_size = info->reg_size; |
3411 | char *store_reg; | |
3412 | char *load_reg; | |
979721f8 MM |
3413 | int sp_reg = 1; |
3414 | int sp_offset = 0; | |
b6c9286a | 3415 | |
8f802bfb | 3416 | if (TARGET_32BIT) |
b6c9286a | 3417 | { |
8f802bfb DE |
3418 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3419 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3420 | } |
3421 | else | |
3422 | { | |
8f802bfb DE |
3423 | store_reg = "\tstd %s,%d(%s)\n"; |
3424 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3425 | } |
9878760c | 3426 | |
4697a36c MM |
3427 | if (TARGET_DEBUG_STACK) |
3428 | debug_stack_info (info); | |
9878760c RK |
3429 | |
3430 | /* Write .extern for any function we will call to save and restore fp | |
3431 | values. */ | |
b6c9286a | 3432 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3433 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3434 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3435 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3436 | |
3437 | /* Write .extern for truncation routines, if needed. */ | |
3438 | if (rs6000_trunc_used && ! trunc_defined) | |
3439 | { | |
e138174b ILT |
3440 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3441 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3442 | trunc_defined = 1; |
3443 | } | |
4697a36c | 3444 | |
c764f757 RK |
3445 | /* Write .extern for AIX common mode routines, if needed. */ |
3446 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3447 | { | |
f6709c70 JW |
3448 | fputs ("\t.extern __mulh\n", file); |
3449 | fputs ("\t.extern __mull\n", file); | |
3450 | fputs ("\t.extern __divss\n", file); | |
3451 | fputs ("\t.extern __divus\n", file); | |
3452 | fputs ("\t.extern __quoss\n", file); | |
3453 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3454 | common_mode_defined = 1; |
3455 | } | |
9878760c | 3456 | |
979721f8 | 3457 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 3458 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
3459 | { |
3460 | if (info->total_size < 32767) | |
3461 | { | |
3462 | asm_fprintf (file, | |
3463 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3464 | reg_names[1], - info->total_size, reg_names[1]); | |
3465 | sp_offset = info->total_size; | |
3466 | } | |
3467 | else | |
3468 | { | |
3469 | int neg_size = - info->total_size; | |
3470 | sp_reg = 12; | |
3471 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3472 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3473 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3474 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3475 | asm_fprintf (file, | |
3476 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3477 | reg_names[1], reg_names[1], reg_names[0]); | |
3478 | } | |
3479 | } | |
3480 | ||
9878760c | 3481 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
3482 | if (info->lr_save_p) |
3483 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
3484 | |
3485 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 3486 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 3487 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
3488 | |
3489 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
3490 | ourself. Otherwise, call function. Note that since they are statically |
3491 | linked, we do not need a nop following them. */ | |
4697a36c | 3492 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 3493 | { |
4697a36c | 3494 | int regno = info->first_fp_reg_save; |
979721f8 | 3495 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3496 | |
3497 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3498 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 3499 | } |
4697a36c MM |
3500 | else if (info->first_fp_reg_save != 64) |
3501 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
3502 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
3503 | |
3504 | /* Now save gpr's. */ | |
4697a36c | 3505 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3506 | { |
4697a36c | 3507 | int regno = info->first_gp_reg_save; |
979721f8 | 3508 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 3509 | |
4697a36c | 3510 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3511 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3512 | } |
3513 | ||
4697a36c MM |
3514 | else if (info->first_gp_reg_save != 32) |
3515 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
3516 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3517 | info->gp_save_offset + sp_offset, |
3518 | reg_names[sp_reg]); | |
9878760c | 3519 | |
b6c9286a MM |
3520 | /* Save main's arguments if we need to call a function */ |
3521 | #ifdef NAME__MAIN | |
3522 | if (info->main_save_p) | |
3523 | { | |
3524 | int regno; | |
5ebfb2ba | 3525 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
3526 | int size = info->main_size; |
3527 | ||
3528 | for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size) | |
979721f8 | 3529 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
3530 | } |
3531 | #endif | |
3532 | ||
9878760c | 3533 | /* Save lr if we used it. */ |
4697a36c | 3534 | if (info->lr_save_p) |
979721f8 MM |
3535 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
3536 | reg_names[sp_reg]); | |
9878760c RK |
3537 | |
3538 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 3539 | if (info->cr_save_p) |
979721f8 MM |
3540 | { |
3541 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
3542 | { | |
3543 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
3544 | asm_fprintf (file, store_reg, reg_names[0], | |
3545 | info->cr_save_offset + sp_offset, | |
3546 | reg_names[sp_reg]); | |
3547 | } | |
3548 | else | |
3549 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
3550 | reg_names[sp_reg]); | |
3551 | } | |
9878760c | 3552 | |
979721f8 MM |
3553 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
3554 | do it here. */ | |
3555 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
3556 | { | |
3557 | if (info->total_size < 32768) | |
3558 | { | |
3559 | int probe_offset = 4096; | |
3560 | while (probe_offset < info->total_size) | |
3561 | { | |
3562 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
3563 | probe_offset += 4096; | |
3564 | } | |
3565 | } | |
3566 | else | |
3567 | { | |
3568 | int probe_iterations = info->total_size / 4096; | |
3569 | static int probe_labelno = 0; | |
3570 | char buf[256]; | |
3571 | ||
3572 | if (probe_iterations < 32768) | |
3573 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
3574 | else | |
3575 | { | |
3576 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
3577 | if (probe_iterations & 0xffff) | |
3578 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
3579 | probe_iterations & 0xffff); | |
3580 | } | |
3581 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
3582 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3583 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
3584 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 3585 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
3586 | fputs ("\tbdnz ", file); |
3587 | assemble_name (file, buf); | |
3588 | fputs ("\n", file); | |
3589 | } | |
3590 | } | |
3591 | ||
3592 | /* Update stack and set back pointer and we have already done so for V.4. */ | |
c81bebd7 | 3593 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
9878760c | 3594 | { |
4697a36c MM |
3595 | if (info->total_size < 32767) |
3596 | asm_fprintf (file, | |
8f802bfb | 3597 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", |
4697a36c | 3598 | reg_names[1], - info->total_size, reg_names[1]); |
9878760c RK |
3599 | else |
3600 | { | |
ef7a1424 | 3601 | int neg_size = - info->total_size; |
4697a36c | 3602 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", |
ef7a1424 RK |
3603 | reg_names[0], (neg_size >> 16) & 0xffff, |
3604 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
4697a36c | 3605 | asm_fprintf (file, |
8f802bfb | 3606 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", |
4697a36c | 3607 | reg_names[1], reg_names[1], reg_names[0]); |
9878760c RK |
3608 | } |
3609 | } | |
3610 | ||
3611 | /* Set frame pointer, if needed. */ | |
3612 | if (frame_pointer_needed) | |
4697a36c | 3613 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 3614 | |
b6c9286a MM |
3615 | #ifdef NAME__MAIN |
3616 | /* If we need to call a function to set things up for main, do so now | |
3617 | before dealing with the TOC. */ | |
3618 | if (info->main_p) | |
3619 | { | |
3620 | char *prefix = ""; | |
3621 | ||
3622 | switch (DEFAULT_ABI) | |
3623 | { | |
3624 | case ABI_AIX: prefix = "."; break; | |
3625 | case ABI_NT: prefix = ".."; break; | |
3626 | } | |
3627 | ||
3628 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
3629 | #ifdef RS6000_CALL_GLUE2 | |
3630 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
3631 | #else | |
3632 | #ifdef RS6000_CALL_GLUE | |
3633 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
3634 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
3635 | #endif | |
3636 | #endif | |
3637 | ||
3638 | if (info->main_save_p) | |
3639 | { | |
3640 | int regno; | |
3641 | int loc; | |
3642 | int size = info->main_size; | |
3643 | ||
3644 | if (info->total_size < 32767) | |
3645 | { | |
3646 | loc = info->total_size + info->main_save_offset; | |
3647 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3648 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); | |
3649 | } | |
3650 | else | |
5ebfb2ba MM |
3651 | { |
3652 | int neg_size = info->main_save_offset - info->total_size; | |
3653 | loc = 0; | |
3654 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3655 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3656 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 3657 | |
b6c9286a MM |
3658 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
3659 | reg_names[1]); | |
3660 | ||
3661 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3662 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); | |
3663 | } | |
3664 | } | |
3665 | } | |
3666 | #endif | |
3667 | ||
3668 | ||
1875cc88 JW |
3669 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
3670 | TOC_TABLE address into register 30. */ | |
4697a36c | 3671 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
3672 | { |
3673 | #ifdef USING_SVR4_H | |
3674 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
3675 | #endif | |
3676 | rs6000_output_load_toc_table (file); | |
3677 | } | |
4697a36c | 3678 | |
b6c9286a MM |
3679 | if (DEFAULT_ABI == ABI_NT) |
3680 | { | |
3681 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3682 | fputs (".b:\n", file); | |
3daf36a4 | 3683 | } |
9878760c RK |
3684 | } |
3685 | ||
3686 | /* Write function epilogue. */ | |
3687 | ||
3688 | void | |
3689 | output_epilog (file, size) | |
3690 | FILE *file; | |
3691 | int size; | |
3692 | { | |
4697a36c | 3693 | rs6000_stack_t *info = rs6000_stack_info (); |
8f802bfb | 3694 | char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 3695 | rtx insn = get_last_insn (); |
979721f8 MM |
3696 | int sp_reg = 1; |
3697 | int sp_offset = 0; | |
5b5040b9 | 3698 | int i; |
9878760c | 3699 | |
9878760c RK |
3700 | /* If the last insn was a BARRIER, we don't have to write anything except |
3701 | the trace table. */ | |
3702 | if (GET_CODE (insn) == NOTE) | |
3703 | insn = prev_nonnote_insn (insn); | |
3704 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
3705 | { | |
3706 | /* If we have a frame pointer, a call to alloca, or a large stack | |
3707 | frame, restore the old stack pointer using the backchain. Otherwise, | |
3708 | we know what size to update it with. */ | |
3709 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 3710 | || info->total_size > 32767) |
979721f8 MM |
3711 | { |
3712 | /* Under V.4, don't reset the stack pointer until after we're done | |
3713 | loading the saved registers. */ | |
c81bebd7 | 3714 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3715 | sp_reg = 11; |
3716 | ||
3717 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
3718 | } | |
4697a36c MM |
3719 | else if (info->push_p) |
3720 | { | |
c81bebd7 | 3721 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3722 | sp_offset = info->total_size; |
3723 | else if (TARGET_NEW_MNEMONICS) | |
4697a36c MM |
3724 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size); |
3725 | else | |
3726 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]); | |
3727 | } | |
9878760c | 3728 | |
b4ac57ab | 3729 | /* Get the old lr if we saved it. */ |
4697a36c | 3730 | if (info->lr_save_p) |
979721f8 | 3731 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
3732 | |
3733 | /* Get the old cr if we saved it. */ | |
4697a36c | 3734 | if (info->cr_save_p) |
979721f8 | 3735 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 3736 | |
b4ac57ab | 3737 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
3738 | if (info->lr_save_p) |
3739 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 3740 | |
9878760c | 3741 | /* Restore gpr's. */ |
4697a36c | 3742 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3743 | { |
4697a36c | 3744 | int regno = info->first_gp_reg_save; |
979721f8 | 3745 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 3746 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 3747 | |
4697a36c | 3748 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3749 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3750 | } |
3751 | ||
4697a36c MM |
3752 | else if (info->first_gp_reg_save != 32) |
3753 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
3754 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3755 | info->gp_save_offset + sp_offset, |
3756 | reg_names[sp_reg]); | |
9878760c | 3757 | |
b4ac57ab | 3758 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
3759 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
3760 | { | |
3761 | int regno = info->first_fp_reg_save; | |
979721f8 | 3762 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3763 | |
3764 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3765 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 3766 | } |
9878760c | 3767 | |
28edebac RK |
3768 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
3769 | that were used. */ | |
4697a36c MM |
3770 | if (info->cr_save_p) |
3771 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
3772 | (regs_ever_live[70] != 0) * 0x20 |
3773 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 3774 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 3775 | |
979721f8 MM |
3776 | /* If this is V.4, unwind the stack pointer after all of the loads have been done */ |
3777 | if (sp_offset) | |
3778 | { | |
3779 | if (TARGET_NEW_MNEMONICS) | |
3780 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset); | |
3781 | else | |
3782 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]); | |
3783 | } | |
3784 | else if (sp_reg != 1) | |
3785 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
3786 | ||
b4ac57ab RS |
3787 | /* If we have to restore more than two FP registers, branch to the |
3788 | restore function. It will return to our caller. */ | |
4697a36c MM |
3789 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
3790 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
3791 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 3792 | else |
85638c0d | 3793 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 3794 | } |
b4ac57ab | 3795 | |
9b30bae2 | 3796 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
3797 | on its format. |
3798 | ||
3799 | We don't output a traceback table if -finhibit-size-directive was | |
3800 | used. The documentation for -finhibit-size-directive reads | |
3801 | ``don't output a @code{.size} assembler directive, or anything | |
3802 | else that would cause trouble if the function is split in the | |
3803 | middle, and the two halves are placed at locations far apart in | |
3804 | memory.'' The traceback table has this property, since it | |
3805 | includes the offset from the start of the function to the | |
4d30c363 MM |
3806 | traceback table itself. |
3807 | ||
3808 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
3809 | different traceback table. */ |
3810 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 3811 | { |
314fc5a9 ILT |
3812 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
3813 | int fixed_parms, float_parms, parm_info; | |
3814 | int i; | |
3815 | ||
b6c9286a MM |
3816 | while (*fname == '.') /* V.4 encodes . in the name */ |
3817 | fname++; | |
3818 | ||
314fc5a9 ILT |
3819 | /* Need label immediately before tbtab, so we can compute its offset |
3820 | from the function start. */ | |
3821 | if (*fname == '*') | |
3822 | ++fname; | |
3823 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
3824 | ASM_OUTPUT_LABEL (file, fname); | |
3825 | ||
3826 | /* The .tbtab pseudo-op can only be used for the first eight | |
3827 | expressions, since it can't handle the possibly variable | |
3828 | length fields that follow. However, if you omit the optional | |
3829 | fields, the assembler outputs zeros for all optional fields | |
3830 | anyways, giving each variable length field is minimum length | |
3831 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
3832 | pseudo-op at all. */ | |
3833 | ||
3834 | /* An all-zero word flags the start of the tbtab, for debuggers | |
3835 | that have to find it by searching forward from the entry | |
3836 | point or from the current pc. */ | |
19d2d16f | 3837 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
3838 | |
3839 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 3840 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
3841 | |
3842 | /* Language type. Unfortunately, there doesn't seem to be any | |
3843 | official way to get this info, so we use language_string. C | |
3844 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
3845 | value for C for now. */ | |
3846 | if (! strcmp (language_string, "GNU C") | |
3847 | || ! strcmp (language_string, "GNU Obj-C")) | |
3848 | i = 0; | |
3849 | else if (! strcmp (language_string, "GNU F77")) | |
3850 | i = 1; | |
3851 | else if (! strcmp (language_string, "GNU Ada")) | |
3852 | i = 3; | |
8b83775b | 3853 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
3854 | i = 2; |
3855 | else if (! strcmp (language_string, "GNU C++")) | |
3856 | i = 9; | |
3857 | else | |
3858 | abort (); | |
3859 | fprintf (file, "%d,", i); | |
3860 | ||
3861 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
3862 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
3863 | from start of procedure stored in tbtab, internal function, function | |
3864 | has controlled storage, function has no toc, function uses fp, | |
3865 | function logs/aborts fp operations. */ | |
3866 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 3867 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
3868 | |
3869 | /* 6 bitfields: function is interrupt handler, name present in | |
3870 | proc table, function calls alloca, on condition directives | |
3871 | (controls stack walks, 3 bits), saves condition reg, saves | |
3872 | link reg. */ | |
3873 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
3874 | set up as a frame pointer, even when there is no alloca call. */ | |
3875 | fprintf (file, "%d,", | |
3876 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 3877 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
3878 | |
3879 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
3880 | (6 bits). */ | |
3881 | fprintf (file, "%d,", | |
4697a36c | 3882 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
3883 | |
3884 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
3885 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
3886 | ||
3887 | { | |
3888 | /* Compute the parameter info from the function decl argument | |
3889 | list. */ | |
3890 | tree decl; | |
3891 | int next_parm_info_bit; | |
3892 | ||
3893 | next_parm_info_bit = 31; | |
3894 | parm_info = 0; | |
3895 | fixed_parms = 0; | |
3896 | float_parms = 0; | |
3897 | ||
3898 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
3899 | decl; decl = TREE_CHAIN (decl)) | |
3900 | { | |
3901 | rtx parameter = DECL_INCOMING_RTL (decl); | |
3902 | enum machine_mode mode = GET_MODE (parameter); | |
3903 | ||
3904 | if (GET_CODE (parameter) == REG) | |
3905 | { | |
3906 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
3907 | { | |
3908 | int bits; | |
3909 | ||
3910 | float_parms++; | |
3911 | ||
3912 | if (mode == SFmode) | |
3913 | bits = 0x2; | |
3914 | else if (mode == DFmode) | |
3915 | bits = 0x3; | |
3916 | else | |
3917 | abort (); | |
3918 | ||
3919 | /* If only one bit will fit, don't or in this entry. */ | |
3920 | if (next_parm_info_bit > 0) | |
3921 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
3922 | next_parm_info_bit -= 2; | |
3923 | } | |
3924 | else | |
3925 | { | |
3926 | fixed_parms += ((GET_MODE_SIZE (mode) | |
3927 | + (UNITS_PER_WORD - 1)) | |
3928 | / UNITS_PER_WORD); | |
3929 | next_parm_info_bit -= 1; | |
3930 | } | |
3931 | } | |
3932 | } | |
3933 | } | |
3934 | ||
3935 | /* Number of fixed point parameters. */ | |
3936 | /* This is actually the number of words of fixed point parameters; thus | |
3937 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
3938 | fprintf (file, "%d,", fixed_parms); | |
3939 | ||
3940 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
3941 | all on stack. */ | |
3942 | /* This is actually the number of fp registers that hold parameters; | |
3943 | and thus the maximum value is 13. */ | |
3944 | /* Set parameters on stack bit if parameters are not in their original | |
3945 | registers, regardless of whether they are on the stack? Xlc | |
3946 | seems to set the bit when not optimizing. */ | |
3947 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
3948 | ||
3949 | /* Optional fields follow. Some are variable length. */ | |
3950 | ||
3951 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
3952 | 11 double float. */ | |
3953 | /* There is an entry for each parameter in a register, in the order that | |
3954 | they occur in the parameter list. Any intervening arguments on the | |
3955 | stack are ignored. If the list overflows a long (max possible length | |
3956 | 34 bits) then completely leave off all elements that don't fit. */ | |
3957 | /* Only emit this long if there was at least one parameter. */ | |
3958 | if (fixed_parms || float_parms) | |
3959 | fprintf (file, "\t.long %d\n", parm_info); | |
3960 | ||
3961 | /* Offset from start of code to tb table. */ | |
19d2d16f | 3962 | fputs ("\t.long ", file); |
314fc5a9 ILT |
3963 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
3964 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 3965 | fputs ("-.", file); |
314fc5a9 | 3966 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 3967 | putc ('\n', file); |
314fc5a9 ILT |
3968 | |
3969 | /* Interrupt handler mask. */ | |
3970 | /* Omit this long, since we never set the interrupt handler bit | |
3971 | above. */ | |
3972 | ||
3973 | /* Number of CTL (controlled storage) anchors. */ | |
3974 | /* Omit this long, since the has_ctl bit is never set above. */ | |
3975 | ||
3976 | /* Displacement into stack of each CTL anchor. */ | |
3977 | /* Omit this list of longs, because there are no CTL anchors. */ | |
3978 | ||
3979 | /* Length of function name. */ | |
3980 | fprintf (file, "\t.short %d\n", strlen (fname)); | |
3981 | ||
3982 | /* Function name. */ | |
3983 | assemble_string (fname, strlen (fname)); | |
3984 | ||
3985 | /* Register for alloca automatic storage; this is always reg 31. | |
3986 | Only emit this if the alloca bit was set above. */ | |
3987 | if (frame_pointer_needed) | |
19d2d16f | 3988 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 3989 | } |
4697a36c | 3990 | |
b6c9286a MM |
3991 | if (DEFAULT_ABI == ABI_NT) |
3992 | { | |
3993 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3994 | fputs (".e:\nFE_MOT_RESVD..", file); | |
3995 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3996 | fputs (":\n", file); | |
3997 | } | |
9878760c RK |
3998 | } |
3999 | \f | |
4000 | /* Output a TOC entry. We derive the entry name from what is | |
4001 | being written. */ | |
4002 | ||
4003 | void | |
4004 | output_toc (file, x, labelno) | |
4005 | FILE *file; | |
4006 | rtx x; | |
4007 | int labelno; | |
4008 | { | |
4009 | char buf[256]; | |
4010 | char *name = buf; | |
b6c9286a | 4011 | char *real_name; |
9878760c RK |
4012 | rtx base = x; |
4013 | int offset = 0; | |
4014 | ||
4697a36c MM |
4015 | if (TARGET_NO_TOC) |
4016 | abort (); | |
4017 | ||
ff1720ed RK |
4018 | /* if we're going to put a double constant in the TOC, make sure it's |
4019 | aligned properly when strict alignment is on. */ | |
4020 | if (GET_CODE (x) == CONST_DOUBLE | |
4021 | && STRICT_ALIGNMENT | |
4022 | && GET_MODE (x) == DFmode | |
4023 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4024 | ASM_OUTPUT_ALIGN (file, 3); | |
4025 | } | |
4026 | ||
4027 | ||
b6c9286a | 4028 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4029 | { |
4030 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4031 | fprintf (file, "%d = .-", labelno); | |
4032 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4033 | fputs ("1\n", file); |
d14a6d05 MM |
4034 | } |
4035 | else | |
d14a6d05 | 4036 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4037 | |
37c37a57 RK |
4038 | /* Handle FP constants specially. Note that if we have a minimal |
4039 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4040 | FP constants. */ | |
042259f2 | 4041 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4042 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4043 | { |
042259f2 DE |
4044 | REAL_VALUE_TYPE rv; |
4045 | long k[2]; | |
0adc764e | 4046 | |
042259f2 DE |
4047 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4048 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
1875cc88 | 4049 | if (TARGET_MINIMAL_TOC) |
042259f2 | 4050 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); |
1875cc88 | 4051 | else |
0adc764e | 4052 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", |
042259f2 | 4053 | k[0], k[1], k[0], k[1]); |
9878760c RK |
4054 | return; |
4055 | } | |
4056 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4057 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4058 | { |
042259f2 DE |
4059 | REAL_VALUE_TYPE rv; |
4060 | long l; | |
9878760c | 4061 | |
042259f2 DE |
4062 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4063 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4064 | ||
4065 | if (TARGET_MINIMAL_TOC) | |
1883e716 | 4066 | fprintf (file, "\t.long %ld\n", l); |
042259f2 | 4067 | else |
1883e716 | 4068 | fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l); |
042259f2 DE |
4069 | return; |
4070 | } | |
4071 | else if (GET_MODE (x) == DImode | |
4072 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4073 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4074 | { | |
4075 | HOST_WIDE_INT low; | |
4076 | HOST_WIDE_INT high; | |
4077 | ||
4078 | if (GET_CODE (x) == CONST_DOUBLE) | |
4079 | { | |
4080 | low = CONST_DOUBLE_LOW (x); | |
4081 | high = CONST_DOUBLE_HIGH (x); | |
4082 | } | |
4083 | else | |
4084 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4085 | { | |
4086 | low = INTVAL (x); | |
4087 | high = (low < 0) ? ~0 : 0; | |
4088 | } | |
4089 | #else | |
4090 | { | |
4091 | low = INTVAL (x) & 0xffffffff; | |
4092 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4093 | } | |
4094 | #endif | |
9878760c | 4095 | |
1875cc88 | 4096 | if (TARGET_MINIMAL_TOC) |
1883e716 | 4097 | fprintf (file, "\t.long %ld\n\t.long %ld\n", (long)high, (long)low); |
1875cc88 | 4098 | else |
042259f2 | 4099 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", |
1883e716 | 4100 | (long)high, (long)low, (long)high, (long)low); |
9878760c RK |
4101 | return; |
4102 | } | |
4103 | ||
4104 | if (GET_CODE (x) == CONST) | |
4105 | { | |
4106 | base = XEXP (XEXP (x, 0), 0); | |
4107 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4108 | } | |
4109 | ||
4110 | if (GET_CODE (base) == SYMBOL_REF) | |
4111 | name = XSTR (base, 0); | |
4112 | else if (GET_CODE (base) == LABEL_REF) | |
4113 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4114 | else if (GET_CODE (base) == CODE_LABEL) | |
4115 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4116 | else | |
4117 | abort (); | |
4118 | ||
2e4eb9b0 | 4119 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4120 | if (TARGET_MINIMAL_TOC) |
19d2d16f | 4121 | fputs ("\t.long ", file); |
1875cc88 JW |
4122 | else |
4123 | { | |
b6c9286a | 4124 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4125 | |
1875cc88 JW |
4126 | if (offset < 0) |
4127 | fprintf (file, ".N%d", - offset); | |
4128 | else if (offset) | |
4129 | fprintf (file, ".P%d", offset); | |
9878760c | 4130 | |
19d2d16f | 4131 | fputs ("[TC],", file); |
1875cc88 | 4132 | } |
581bc4de MM |
4133 | |
4134 | /* Currently C++ toc references to vtables can be emitted before it | |
4135 | is decided whether the vtable is public or private. If this is | |
4136 | the case, then the linker will eventually complain that there is | |
4137 | a TOC reference to an unknown section. Thus, for vtables only, | |
4138 | we emit the TOC reference to reference the symbol and not the | |
4139 | section. */ | |
3807773b | 4140 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4141 | { |
3807773b | 4142 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4143 | if (offset < 0) |
4144 | fprintf (file, "%d", offset); | |
4145 | else if (offset > 0) | |
4146 | fprintf (file, "+%d", offset); | |
4147 | } | |
4148 | else | |
4149 | output_addr_const (file, x); | |
19d2d16f | 4150 | putc ('\n', file); |
9878760c RK |
4151 | } |
4152 | \f | |
4153 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4154 | starting at P to FILE. | |
4155 | ||
4156 | On the RS/6000, we have to do this using the .byte operation and | |
4157 | write out special characters outside the quoted string. | |
4158 | Also, the assembler is broken; very long strings are truncated, | |
4159 | so we must artificially break them up early. */ | |
4160 | ||
4161 | void | |
4162 | output_ascii (file, p, n) | |
4163 | FILE *file; | |
4164 | char *p; | |
4165 | int n; | |
4166 | { | |
4167 | char c; | |
4168 | int i, count_string; | |
4169 | char *for_string = "\t.byte \""; | |
4170 | char *for_decimal = "\t.byte "; | |
4171 | char *to_close = NULL; | |
4172 | ||
4173 | count_string = 0; | |
4174 | for (i = 0; i < n; i++) | |
4175 | { | |
4176 | c = *p++; | |
4177 | if (c >= ' ' && c < 0177) | |
4178 | { | |
4179 | if (for_string) | |
4180 | fputs (for_string, file); | |
4181 | putc (c, file); | |
4182 | ||
4183 | /* Write two quotes to get one. */ | |
4184 | if (c == '"') | |
4185 | { | |
4186 | putc (c, file); | |
4187 | ++count_string; | |
4188 | } | |
4189 | ||
4190 | for_string = NULL; | |
4191 | for_decimal = "\"\n\t.byte "; | |
4192 | to_close = "\"\n"; | |
4193 | ++count_string; | |
4194 | ||
4195 | if (count_string >= 512) | |
4196 | { | |
4197 | fputs (to_close, file); | |
4198 | ||
4199 | for_string = "\t.byte \""; | |
4200 | for_decimal = "\t.byte "; | |
4201 | to_close = NULL; | |
4202 | count_string = 0; | |
4203 | } | |
4204 | } | |
4205 | else | |
4206 | { | |
4207 | if (for_decimal) | |
4208 | fputs (for_decimal, file); | |
4209 | fprintf (file, "%d", c); | |
4210 | ||
4211 | for_string = "\n\t.byte \""; | |
4212 | for_decimal = ", "; | |
4213 | to_close = "\n"; | |
4214 | count_string = 0; | |
4215 | } | |
4216 | } | |
4217 | ||
4218 | /* Now close the string if we have written one. Then end the line. */ | |
4219 | if (to_close) | |
4220 | fprintf (file, to_close); | |
4221 | } | |
4222 | \f | |
4223 | /* Generate a unique section name for FILENAME for a section type | |
4224 | represented by SECTION_DESC. Output goes into BUF. | |
4225 | ||
4226 | SECTION_DESC can be any string, as long as it is different for each | |
4227 | possible section type. | |
4228 | ||
4229 | We name the section in the same manner as xlc. The name begins with an | |
4230 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
4231 | names) with the last period replaced by the string SECTION_DESC. If |
4232 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
4233 | the name. */ | |
9878760c RK |
4234 | |
4235 | void | |
4236 | rs6000_gen_section_name (buf, filename, section_desc) | |
4237 | char **buf; | |
4238 | char *filename; | |
4239 | char *section_desc; | |
4240 | { | |
11e5fe42 | 4241 | char *q, *after_last_slash, *last_period; |
9878760c RK |
4242 | char *p; |
4243 | int len; | |
9878760c RK |
4244 | |
4245 | after_last_slash = filename; | |
4246 | for (q = filename; *q; q++) | |
11e5fe42 RK |
4247 | { |
4248 | if (*q == '/') | |
4249 | after_last_slash = q + 1; | |
4250 | else if (*q == '.') | |
4251 | last_period = q; | |
4252 | } | |
9878760c | 4253 | |
11e5fe42 | 4254 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
4255 | *buf = (char *) permalloc (len); |
4256 | ||
4257 | p = *buf; | |
4258 | *p++ = '_'; | |
4259 | ||
4260 | for (q = after_last_slash; *q; q++) | |
4261 | { | |
11e5fe42 | 4262 | if (q == last_period) |
9878760c RK |
4263 | { |
4264 | strcpy (p, section_desc); | |
4265 | p += strlen (section_desc); | |
9878760c RK |
4266 | } |
4267 | ||
4268 | else if (isalnum (*q)) | |
4269 | *p++ = *q; | |
4270 | } | |
4271 | ||
11e5fe42 | 4272 | if (last_period == 0) |
9878760c RK |
4273 | strcpy (p, section_desc); |
4274 | else | |
4275 | *p = '\0'; | |
4276 | } | |
e165f3f0 RK |
4277 | \f |
4278 | /* Write function profiler code. */ | |
4279 | ||
4280 | void | |
4281 | output_function_profiler (file, labelno) | |
4282 | FILE *file; | |
4283 | int labelno; | |
4284 | { | |
4285 | /* The last used parameter register. */ | |
4286 | int last_parm_reg; | |
4287 | int i, j; | |
3daf36a4 | 4288 | char buf[100]; |
e165f3f0 | 4289 | |
b6c9286a MM |
4290 | if (DEFAULT_ABI != ABI_AIX) |
4291 | abort (); | |
4292 | ||
e165f3f0 RK |
4293 | /* Set up a TOC entry for the profiler label. */ |
4294 | toc_section (); | |
3daf36a4 ILT |
4295 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); |
4296 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); | |
35fc1624 | 4297 | if (TARGET_MINIMAL_TOC) |
3daf36a4 | 4298 | { |
19d2d16f | 4299 | fputs ("\t.long ", file); |
3daf36a4 | 4300 | assemble_name (file, buf); |
19d2d16f | 4301 | putc ('\n', file); |
3daf36a4 | 4302 | } |
35fc1624 | 4303 | else |
3daf36a4 | 4304 | { |
19d2d16f | 4305 | fputs ("\t.tc\t", file); |
3daf36a4 | 4306 | assemble_name (file, buf); |
19d2d16f | 4307 | fputs ("[TC],", file); |
3daf36a4 | 4308 | assemble_name (file, buf); |
19d2d16f | 4309 | putc ('\n', file); |
3daf36a4 | 4310 | } |
e165f3f0 RK |
4311 | text_section (); |
4312 | ||
4313 | /* Figure out last used parameter register. The proper thing to do is | |
4314 | to walk incoming args of the function. A function might have live | |
4315 | parameter registers even if it has no incoming args. */ | |
4316 | ||
4317 | for (last_parm_reg = 10; | |
4318 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
4319 | last_parm_reg--) | |
4320 | ; | |
4321 | ||
4322 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
4323 | it might be set up as the frame pointer. */ | |
4324 | ||
4325 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
19d2d16f | 4326 | asm_fprintf (file, "\tmr %d,%d\n", j, i); |
e165f3f0 RK |
4327 | |
4328 | /* Load location address into r3, and call mcount. */ | |
4329 | ||
3daf36a4 | 4330 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
19d2d16f | 4331 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]); |
3daf36a4 | 4332 | assemble_name (file, buf); |
9c849d2a | 4333 | asm_fprintf (file, "(%s)\n\tbl %s\n", reg_names[2], RS6000_MCOUNT); |
e165f3f0 RK |
4334 | |
4335 | /* Restore parameter registers. */ | |
4336 | ||
4337 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) | |
19d2d16f | 4338 | asm_fprintf (file, "\tmr %d,%d\n", i, j); |
e165f3f0 | 4339 | } |
a251ffd0 TG |
4340 | |
4341 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
4342 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
4343 | ||
4344 | int | |
a06faf84 | 4345 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
4346 | rtx insn; |
4347 | rtx link; | |
4348 | rtx dep_insn; | |
4349 | int cost; | |
4350 | { | |
4351 | if (! recog_memoized (insn)) | |
4352 | return 0; | |
4353 | ||
4354 | if (REG_NOTE_KIND (link) != 0) | |
4355 | return 0; | |
4356 | ||
4357 | if (REG_NOTE_KIND (link) == 0) | |
4358 | { | |
4359 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
4360 | cycles later. */ | |
4361 | ||
4362 | /* Tell the first scheduling pass about the latency between a mtctr | |
4363 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
4364 | know about this latency since the mtctr instruction, which has the | |
4365 | latency associated to it, will be generated by reload. */ | |
4366 | if (get_attr_type (insn) == TYPE_JMPREG) | |
4367 | return TARGET_POWER ? 5 : 4; | |
4368 | ||
4369 | /* Fall out to return default cost. */ | |
4370 | } | |
4371 | ||
4372 | return cost; | |
4373 | } | |
b6c9286a MM |
4374 | |
4375 | /* Return how many instructions the machine can issue per cycle */ | |
4376 | int get_issue_rate() | |
4377 | { | |
4378 | switch (rs6000_cpu_attr) { | |
4379 | case CPU_RIOS1: | |
4380 | return 3; /* ? */ | |
4381 | case CPU_RIOS2: | |
4382 | return 4; | |
4383 | case CPU_PPC601: | |
4384 | return 3; /* ? */ | |
b6c9286a MM |
4385 | case CPU_PPC603: |
4386 | return 2; | |
4387 | case CPU_PPC604: | |
4388 | return 4; | |
4389 | case CPU_PPC620: | |
4390 | return 4; | |
4391 | default: | |
4392 | return 1; | |
4393 | } | |
4394 | } | |
4395 | ||
b6c9286a MM |
4396 | |
4397 | \f | |
4398 | /* Output assembler code for a block containing the constant parts | |
4399 | of a trampoline, leaving space for the variable parts. | |
4400 | ||
4401 | The trampoline should set the static chain pointer to value placed | |
4402 | into the trampoline and should branch to the specified routine. */ | |
4403 | ||
4404 | void | |
4405 | rs6000_trampoline_template (file) | |
4406 | FILE *file; | |
4407 | { | |
4408 | char *sc = reg_names[STATIC_CHAIN_REGNUM]; | |
4409 | char *r0 = reg_names[0]; | |
7c59dc5d | 4410 | char *r2 = reg_names[2]; |
b6c9286a MM |
4411 | |
4412 | switch (DEFAULT_ABI) | |
4413 | { | |
4414 | default: | |
4415 | abort (); | |
4416 | ||
4417 | /* Under AIX, this is not code at all, but merely a data area, | |
4418 | since that is the way all functions are called. The first word is | |
4419 | the address of the function, the second word is the TOC pointer (r2), | |
4420 | and the third word is the static chain value. */ | |
4421 | case ABI_AIX: | |
b6c9286a MM |
4422 | break; |
4423 | ||
4424 | ||
4425 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
4426 | do the full gory code to load up the static chain. */ | |
4427 | case ABI_V4: | |
c81bebd7 | 4428 | case ABI_SOLARIS: |
b6c9286a | 4429 | case ABI_AIX_NODESC: |
b6c9286a MM |
4430 | break; |
4431 | ||
4432 | /* NT function pointers point to a two word area (real address, TOC) | |
4433 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
4434 | use the function field to point to ..LTRAMP1 and the toc field |
4435 | to point to the whole table. */ | |
b6c9286a | 4436 | case ABI_NT: |
7c59dc5d MM |
4437 | if (STATIC_CHAIN_REGNUM == 0 |
4438 | || STATIC_CHAIN_REGNUM == 2 | |
4439 | || TARGET_64BIT | |
4440 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
4441 | abort (); |
4442 | ||
7c59dc5d MM |
4443 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
4444 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
4445 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
4446 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
4447 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 4448 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
4449 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
4450 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
4451 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
4452 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
4453 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
4454 | break; |
4455 | } | |
4456 | ||
4457 | return; | |
4458 | } | |
4459 | ||
4460 | /* Length in units of the trampoline for entering a nested function. */ | |
4461 | ||
4462 | int | |
4463 | rs6000_trampoline_size () | |
4464 | { | |
4465 | int ret = 0; | |
4466 | ||
4467 | switch (DEFAULT_ABI) | |
4468 | { | |
4469 | default: | |
4470 | abort (); | |
4471 | ||
4472 | case ABI_AIX: | |
8f802bfb | 4473 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
4474 | break; |
4475 | ||
4476 | case ABI_V4: | |
c81bebd7 | 4477 | case ABI_SOLARIS: |
b6c9286a | 4478 | case ABI_AIX_NODESC: |
03a7e1a5 | 4479 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
4480 | break; |
4481 | ||
4482 | case ABI_NT: | |
7c59dc5d | 4483 | ret = 20; |
b6c9286a MM |
4484 | break; |
4485 | } | |
4486 | ||
4487 | return ret; | |
4488 | } | |
4489 | ||
4490 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
4491 | FNADDR is an RTX for the address of the function's pure code. | |
4492 | CXT is an RTX for the static chain value for the function. */ | |
4493 | ||
4494 | void | |
4495 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
4496 | rtx addr; | |
4497 | rtx fnaddr; | |
4498 | rtx cxt; | |
4499 | { | |
ac2a93a1 | 4500 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
4501 | int regsize = (TARGET_32BIT) ? 4 : 8; |
4502 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
4503 | |
4504 | switch (DEFAULT_ABI) | |
4505 | { | |
4506 | default: | |
4507 | abort (); | |
4508 | ||
8bd04c56 MM |
4509 | /* Macros to shorten the code expansions below. */ |
4510 | #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr)) | |
7c59dc5d MM |
4511 | #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset))) |
4512 | ||
b6c9286a MM |
4513 | /* Under AIX, just build the 3 word function descriptor */ |
4514 | case ABI_AIX: | |
8bd04c56 MM |
4515 | { |
4516 | rtx fn_reg = gen_reg_rtx (pmode); | |
4517 | rtx toc_reg = gen_reg_rtx (pmode); | |
4518 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4519 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
4520 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
4521 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
4522 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
4523 | } | |
b6c9286a MM |
4524 | break; |
4525 | ||
eaf1bcf1 | 4526 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 4527 | case ABI_V4: |
c81bebd7 | 4528 | case ABI_SOLARIS: |
b6c9286a | 4529 | case ABI_AIX_NODESC: |
eaf1bcf1 MM |
4530 | emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"), |
4531 | FALSE, VOIDmode, 4, | |
4532 | addr, pmode, | |
4533 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
4534 | fnaddr, pmode, | |
4535 | ctx_reg, pmode); | |
b6c9286a MM |
4536 | break; |
4537 | ||
8bd04c56 MM |
4538 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
4539 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 4540 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 4541 | case ABI_NT: |
8bd04c56 MM |
4542 | { |
4543 | rtx tramp_reg = gen_reg_rtx (pmode); | |
4544 | rtx fn_reg = gen_reg_rtx (pmode); | |
4545 | rtx toc_reg = gen_reg_rtx (pmode); | |
4546 | ||
4547 | emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0")); | |
4548 | addr = force_reg (pmode, addr); | |
4549 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4550 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
4551 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
4552 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
4553 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
4554 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
4555 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2)); | |
4556 | } | |
b6c9286a MM |
4557 | break; |
4558 | } | |
4559 | ||
4560 | return; | |
4561 | } | |
7509c759 MM |
4562 | |
4563 | \f | |
4564 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4565 | with arguments ARGS is a valid machine specific attribute for DECL. | |
4566 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
4567 | ||
4568 | int | |
4569 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
4570 | tree decl; | |
4571 | tree attributes; | |
4572 | tree identifier; | |
4573 | tree args; | |
4574 | { | |
4575 | return 0; | |
4576 | } | |
4577 | ||
4578 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4579 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
4580 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
4581 | ||
4582 | int | |
4583 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
4584 | tree type; | |
4585 | tree attributes; | |
4586 | tree identifier; | |
4587 | tree args; | |
4588 | { | |
4589 | if (TREE_CODE (type) != FUNCTION_TYPE | |
4590 | && TREE_CODE (type) != FIELD_DECL | |
4591 | && TREE_CODE (type) != TYPE_DECL) | |
4592 | return 0; | |
4593 | ||
6a4cee5f MM |
4594 | /* Longcall attribute says that the function is not within 2**26 bytes |
4595 | of the current function, and to do an indirect call. */ | |
4596 | if (is_attribute_p ("longcall", identifier)) | |
4597 | return (args == NULL_TREE); | |
4598 | ||
7509c759 MM |
4599 | if (DEFAULT_ABI == ABI_NT) |
4600 | { | |
4601 | /* Stdcall attribute says callee is responsible for popping arguments | |
4602 | if they are not variable. */ | |
4603 | if (is_attribute_p ("stdcall", identifier)) | |
4604 | return (args == NULL_TREE); | |
4605 | ||
4606 | /* Cdecl attribute says the callee is a normal C declaration */ | |
4607 | if (is_attribute_p ("cdecl", identifier)) | |
4608 | return (args == NULL_TREE); | |
4609 | ||
4610 | /* Dllimport attribute says says the caller is to call the function | |
4611 | indirectly through a __imp_<name> pointer. */ | |
4612 | if (is_attribute_p ("dllimport", identifier)) | |
4613 | return (args == NULL_TREE); | |
4614 | ||
4615 | /* Dllexport attribute says says the callee is to create a __imp_<name> | |
4616 | pointer. */ | |
4617 | if (is_attribute_p ("dllexport", identifier)) | |
4618 | return (args == NULL_TREE); | |
e56bb9ed MM |
4619 | |
4620 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
4621 | that will fill in the 3rd and 4th fields of the structured exception | |
4622 | table. */ | |
4623 | if (is_attribute_p ("exception", identifier)) | |
4624 | { | |
4625 | int i; | |
4626 | ||
4627 | if (args == NULL_TREE) | |
4628 | return 0; | |
4629 | ||
4630 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
4631 | { | |
4632 | tree this_arg = TREE_VALUE (args); | |
4633 | args = TREE_PURPOSE (args); | |
4634 | ||
4635 | if (TREE_CODE (this_arg) != STRING_CST | |
4636 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
4637 | return 0; | |
4638 | } | |
4639 | ||
4640 | return (args == NULL_TREE); | |
4641 | } | |
7509c759 MM |
4642 | } |
4643 | ||
4644 | return 0; | |
4645 | } | |
4646 | ||
4647 | /* If defined, a C expression whose value is zero if the attributes on | |
4648 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
4649 | two if they are nearly compatible (which causes a warning to be | |
4650 | generated). */ | |
4651 | ||
4652 | int | |
4653 | rs6000_comp_type_attributes (type1, type2) | |
4654 | tree type1; | |
4655 | tree type2; | |
4656 | { | |
4657 | return 1; | |
4658 | } | |
4659 | ||
4660 | /* If defined, a C statement that assigns default attributes to newly | |
4661 | defined TYPE. */ | |
4662 | ||
4663 | void | |
4664 | rs6000_set_default_type_attributes (type) | |
4665 | tree type; | |
4666 | { | |
4667 | } | |
4668 | ||
4669 | /* Return a dll import reference corresponding to to a call's SYMBOL_REF */ | |
4670 | struct rtx_def * | |
4671 | rs6000_dll_import_ref (call_ref) | |
4672 | rtx call_ref; | |
4673 | { | |
4674 | char *call_name; | |
4675 | int len; | |
4676 | char *p; | |
4677 | rtx reg1, reg2; | |
4678 | tree node; | |
4679 | ||
4680 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4681 | abort (); | |
4682 | ||
4683 | call_name = XSTR (call_ref, 0); | |
4684 | len = sizeof ("__imp_") + strlen (call_name); | |
4685 | p = alloca (len); | |
4686 | reg2 = gen_reg_rtx (Pmode); | |
4687 | ||
4688 | strcpy (p, "__imp_"); | |
4689 | strcat (p, call_name); | |
4690 | node = get_identifier (p); | |
4691 | ||
4692 | reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node))); | |
4693 | emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1)); | |
4694 | ||
4695 | return reg2; | |
4696 | } | |
4697 | ||
6a4cee5f MM |
4698 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
4699 | struct rtx_def * | |
4700 | rs6000_longcall_ref (call_ref) | |
4701 | rtx call_ref; | |
4702 | { | |
4703 | char *call_name; | |
4704 | int len; | |
4705 | char *p; | |
4706 | rtx reg1, reg2; | |
4707 | tree node; | |
4708 | ||
4709 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4710 | return call_ref; | |
4711 | ||
4712 | /* System V adds '.' to the internal name, so skip them. */ | |
4713 | call_name = XSTR (call_ref, 0); | |
4714 | if (*call_name == '.') | |
4715 | { | |
4716 | while (*call_name == '.') | |
4717 | call_name++; | |
4718 | ||
4719 | node = get_identifier (call_name); | |
4720 | call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)); | |
4721 | } | |
4722 | ||
4723 | return force_reg (Pmode, call_ref); | |
4724 | } | |
4725 | ||
7509c759 MM |
4726 | \f |
4727 | /* A C statement or statements to switch to the appropriate section | |
4728 | for output of RTX in mode MODE. You can assume that RTX is some | |
4729 | kind of constant in RTL. The argument MODE is redundant except in | |
4730 | the case of a `const_int' rtx. Select the section by calling | |
4731 | `text_section' or one of the alternatives for other sections. | |
4732 | ||
4733 | Do not define this macro if you put all constants in the read-only | |
4734 | data section. */ | |
4735 | ||
4736 | #ifdef USING_SVR4_H | |
4737 | ||
4738 | void | |
4739 | rs6000_select_rtx_section (mode, x) | |
4740 | enum machine_mode mode; | |
4741 | rtx x; | |
4742 | { | |
4743 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
4744 | toc_section (); | |
7509c759 MM |
4745 | else |
4746 | const_section (); | |
4747 | } | |
4748 | ||
4749 | /* A C statement or statements to switch to the appropriate | |
4750 | section for output of DECL. DECL is either a `VAR_DECL' node | |
4751 | or a constant of some sort. RELOC indicates whether forming | |
4752 | the initial value of DECL requires link-time relocations. */ | |
4753 | ||
4754 | void | |
4755 | rs6000_select_section (decl, reloc) | |
4756 | tree decl; | |
4757 | int reloc; | |
4758 | { | |
4759 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
4760 | ||
4761 | if (TREE_CODE (decl) == STRING_CST) | |
4762 | { | |
88228c4b | 4763 | if (! flag_writable_strings) |
7509c759 | 4764 | const_section (); |
7509c759 MM |
4765 | else |
4766 | data_section (); | |
4767 | } | |
4768 | else if (TREE_CODE (decl) == VAR_DECL) | |
4769 | { | |
4770 | if ((flag_pic && reloc) | |
4771 | || !TREE_READONLY (decl) | |
4772 | || TREE_SIDE_EFFECTS (decl) | |
4773 | || !DECL_INITIAL (decl) | |
4774 | || (DECL_INITIAL (decl) != error_mark_node | |
4775 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
4776 | { | |
d9407988 | 4777 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
4778 | sdata_section (); |
4779 | else | |
4780 | data_section (); | |
4781 | } | |
4782 | else | |
4783 | { | |
d9407988 | 4784 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 4785 | { |
d9407988 | 4786 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
4787 | sdata2_section (); |
4788 | else | |
4789 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
4790 | } | |
7509c759 MM |
4791 | else |
4792 | const_section (); | |
4793 | } | |
4794 | } | |
4795 | else | |
4796 | const_section (); | |
4797 | } | |
d9407988 MM |
4798 | |
4799 | \f | |
4800 | ||
4801 | /* If we are referencing a function that is static or is known to be | |
4802 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
4803 | that we can branch to this function without emitting a no-op after the | |
4804 | call. For real AIX and NT calling sequences, we also replace the | |
4805 | function name with the real name (1 or 2 leading .'s), rather than | |
4806 | the function descriptor name. This saves a lot of overriding code | |
4807 | to readd the prefixes. */ | |
4808 | ||
4809 | void | |
4810 | rs6000_encode_section_info (decl) | |
4811 | tree decl; | |
4812 | { | |
4813 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
4814 | { | |
4815 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
4816 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
4817 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
4818 | ||
4819 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
4820 | { | |
4821 | char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; | |
4822 | char *str = permalloc (strlen (prefix) + 1 | |
4823 | + strlen (XSTR (sym_ref, 0))); | |
4824 | strcpy (str, prefix); | |
4825 | strcat (str, XSTR (sym_ref, 0)); | |
4826 | XSTR (sym_ref, 0) = str; | |
4827 | } | |
4828 | } | |
4829 | else if (rs6000_sdata != SDATA_NONE | |
4830 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
4831 | && TREE_CODE (decl) == VAR_DECL) | |
4832 | { | |
4833 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
4834 | tree section_name = DECL_SECTION_NAME (decl); | |
4835 | char *name = (char *)0; | |
4836 | int len = 0; | |
4837 | ||
4838 | if (section_name) | |
4839 | { | |
4840 | if (TREE_CODE (section_name) == STRING_CST) | |
4841 | { | |
4842 | name = TREE_STRING_POINTER (section_name); | |
4843 | len = TREE_STRING_LENGTH (section_name); | |
4844 | } | |
4845 | else | |
4846 | abort (); | |
4847 | } | |
4848 | ||
4849 | if ((size > 0 && size <= g_switch_value) | |
4850 | || (name | |
4851 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
4852 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
4853 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
4854 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
4855 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
4856 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
4857 | { | |
4858 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
4859 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
4860 | strcpy (str, "@"); | |
4861 | strcat (str, XSTR (sym_ref, 0)); | |
4862 | XSTR (sym_ref, 0) = str; | |
4863 | } | |
4864 | } | |
4865 | } | |
4866 | ||
7509c759 | 4867 | #endif /* USING_SVR4_H */ |