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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
a260abc9 | 2 | Copyright (C) 1991, 93-7, 1998 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 | 36 | #include "tree.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
57 | /* switch name, tune arch */ | |
5d6426e0 | 58 | { (char *)0, "--with-cpu=", 1, 1 }, |
8e3f41e7 MM |
59 | { (char *)0, "-mcpu=", 1, 1 }, |
60 | { (char *)0, "-mtune=", 1, 0 }, | |
61 | }; | |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
87 | char *rs6000_abi_name = RS6000_ABI_NAME; | |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
93 | char *rs6000_sdata_name = (char *)0; | |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 MM |
107 | /* Debug flags */ |
108 | char *rs6000_debug_name; | |
109 | int rs6000_debug_stack; /* debug stack applications */ | |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c81bebd7 MM |
115 | \f |
116 | /* Default register names. */ | |
117 | char rs6000_reg_names[][8] = | |
118 | { | |
802a0058 MM |
119 | "0", "1", "2", "3", "4", "5", "6", "7", |
120 | "8", "9", "10", "11", "12", "13", "14", "15", | |
121 | "16", "17", "18", "19", "20", "21", "22", "23", | |
122 | "24", "25", "26", "27", "28", "29", "30", "31", | |
123 | "0", "1", "2", "3", "4", "5", "6", "7", | |
124 | "8", "9", "10", "11", "12", "13", "14", "15", | |
125 | "16", "17", "18", "19", "20", "21", "22", "23", | |
126 | "24", "25", "26", "27", "28", "29", "30", "31", | |
127 | "mq", "lr", "ctr","ap", | |
128 | "0", "1", "2", "3", "4", "5", "6", "7", | |
129 | "fpmem" | |
c81bebd7 MM |
130 | }; |
131 | ||
132 | #ifdef TARGET_REGNAMES | |
133 | static char alt_reg_names[][8] = | |
134 | { | |
802a0058 MM |
135 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
136 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
137 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
138 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
139 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
140 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
141 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
142 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
143 | "mq", "lr", "ctr", "ap", | |
144 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
145 | "fpmem" | |
c81bebd7 MM |
146 | }; |
147 | #endif | |
9878760c | 148 | \f |
daf11973 MM |
149 | #ifndef MASK_STRICT_ALIGN |
150 | #define MASK_STRICT_ALIGN 0 | |
151 | #endif | |
152 | ||
5248c961 RK |
153 | /* Override command line options. Mostly we process the processor |
154 | type and sometimes adjust other TARGET_ options. */ | |
155 | ||
156 | void | |
8e3f41e7 MM |
157 | rs6000_override_options (default_cpu) |
158 | char *default_cpu; | |
5248c961 | 159 | { |
c4d38ccb | 160 | size_t i, j; |
8e3f41e7 | 161 | struct rs6000_cpu_select *ptr; |
5248c961 | 162 | |
85638c0d RK |
163 | /* Simplify the entries below by making a mask for any POWER |
164 | variant and any PowerPC variant. */ | |
165 | ||
938937d8 | 166 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
167 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
168 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
169 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 170 | |
5248c961 RK |
171 | static struct ptt |
172 | { | |
173 | char *name; /* Canonical processor name. */ | |
174 | enum processor_type processor; /* Processor type enum value. */ | |
175 | int target_enable; /* Target flags to enable. */ | |
176 | int target_disable; /* Target flags to disable. */ | |
177 | } processor_target_table[] | |
cf27b467 MM |
178 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
179 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 180 | {"power", PROCESSOR_POWER, |
938937d8 | 181 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 182 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
183 | {"power2", PROCESSOR_POWER, |
184 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
185 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
186 | {"powerpc", PROCESSOR_POWERPC, |
187 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 188 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 189 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 190 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
191 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
192 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 193 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
194 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
195 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 196 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
197 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
198 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 199 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
200 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
201 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 202 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 203 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
a3a1dbf6 MM |
204 | {"401", PROCESSOR_PPC403, |
205 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
206 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 207 | {"403", PROCESSOR_PPC403, |
daf11973 | 208 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 209 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
210 | {"505", PROCESSOR_MPCCORE, |
211 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
212 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 213 | {"601", PROCESSOR_PPC601, |
938937d8 | 214 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 215 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 216 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
217 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
218 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 219 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
220 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
221 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
222 | {"603e", PROCESSOR_PPC603, |
223 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
224 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 225 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
226 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
227 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 228 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
229 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
230 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
231 | {"604e", PROCESSOR_PPC604, |
232 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
233 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 234 | {"620", PROCESSOR_PPC620, |
68c49ffa | 235 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 236 | POWER_MASKS | MASK_PPC_GPOPT}, |
07e6159a MM |
237 | {"801", PROCESSOR_MPCCORE, |
238 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
239 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
240 | {"821", PROCESSOR_MPCCORE, |
241 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
242 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
243 | {"823", PROCESSOR_MPCCORE, |
244 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
245 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
246 | {"860", PROCESSOR_MPCCORE, |
247 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
248 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 249 | |
c4d38ccb | 250 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 251 | |
8a61d227 | 252 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 253 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 254 | |
5248c961 RK |
255 | profile_block_flag = 0; |
256 | ||
257 | /* Identify the processor type */ | |
8e3f41e7 MM |
258 | rs6000_select[0].string = default_cpu; |
259 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
260 | |
261 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 262 | { |
8e3f41e7 MM |
263 | ptr = &rs6000_select[i]; |
264 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 265 | { |
8e3f41e7 MM |
266 | for (j = 0; j < ptt_size; j++) |
267 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
268 | { | |
269 | if (ptr->set_tune_p) | |
270 | rs6000_cpu = processor_target_table[j].processor; | |
271 | ||
272 | if (ptr->set_arch_p) | |
273 | { | |
274 | target_flags |= processor_target_table[j].target_enable; | |
275 | target_flags &= ~processor_target_table[j].target_disable; | |
276 | } | |
277 | break; | |
278 | } | |
279 | ||
280 | if (i == ptt_size) | |
281 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
282 | } |
283 | } | |
8a61d227 | 284 | |
ef792183 MM |
285 | /* If we are optimizing big endian systems for space, use the |
286 | store multiple instructions. */ | |
287 | if (BYTES_BIG_ENDIAN && optimize_size) | |
288 | target_flags |= MASK_MULTIPLE; | |
289 | ||
8a61d227 MM |
290 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
291 | override with the processor default */ | |
292 | if (TARGET_MULTIPLE_SET) | |
293 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 294 | |
938937d8 MM |
295 | /* If -mstring or -mno-string was explicitly used, don't |
296 | override with the processor default */ | |
297 | if (TARGET_STRING_SET) | |
1f5515bf | 298 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 299 | |
7e69e155 MM |
300 | /* Don't allow -mmultiple or -mstring on little endian systems, because the |
301 | hardware doesn't support the instructions used in little endian mode */ | |
302 | if (!BYTES_BIG_ENDIAN) | |
303 | { | |
304 | if (TARGET_MULTIPLE) | |
305 | { | |
306 | target_flags &= ~MASK_MULTIPLE; | |
307 | if (TARGET_MULTIPLE_SET) | |
308 | warning ("-mmultiple is not supported on little endian systems"); | |
309 | } | |
310 | ||
311 | if (TARGET_STRING) | |
312 | { | |
313 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
314 | if (TARGET_STRING_SET) |
315 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
316 | } |
317 | } | |
3933e0e1 | 318 | |
a260abc9 DE |
319 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
320 | { | |
321 | warning ("-f%s ignored for AIX (all code is position independent)", | |
322 | (flag_pic > 1) ? "PIC" : "pic"); | |
323 | flag_pic = 0; | |
324 | } | |
325 | ||
38c1f2d7 MM |
326 | /* Set debug flags */ |
327 | if (rs6000_debug_name) | |
328 | { | |
329 | if (!strcmp (rs6000_debug_name, "all")) | |
330 | rs6000_debug_stack = rs6000_debug_arg = 1; | |
331 | else if (!strcmp (rs6000_debug_name, "stack")) | |
332 | rs6000_debug_stack = 1; | |
333 | else if (!strcmp (rs6000_debug_name, "arg")) | |
334 | rs6000_debug_arg = 1; | |
335 | else | |
336 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
337 | } | |
338 | ||
c81bebd7 MM |
339 | #ifdef TARGET_REGNAMES |
340 | /* If the user desires alternate register names, copy in the alternate names | |
341 | now. */ | |
342 | if (TARGET_REGNAMES) | |
343 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names)); | |
344 | #endif | |
345 | ||
3933e0e1 MM |
346 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
347 | SUBTARGET_OVERRIDE_OPTIONS; | |
348 | #endif | |
5248c961 | 349 | } |
3cfa4909 MM |
350 | \f |
351 | /* Do anything needed at the start of the asm file. */ | |
352 | ||
353 | void | |
354 | rs6000_file_start (file, default_cpu) | |
355 | FILE *file; | |
356 | char *default_cpu; | |
357 | { | |
c4d38ccb | 358 | size_t i; |
3cfa4909 MM |
359 | char buffer[80]; |
360 | char *start = buffer; | |
361 | struct rs6000_cpu_select *ptr; | |
362 | ||
363 | if (flag_verbose_asm) | |
364 | { | |
365 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
366 | rs6000_select[0].string = default_cpu; | |
367 | ||
368 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
369 | { | |
370 | ptr = &rs6000_select[i]; | |
371 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
372 | { | |
373 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
374 | start = ""; | |
375 | } | |
376 | } | |
377 | ||
378 | #ifdef USING_SVR4_H | |
379 | switch (rs6000_sdata) | |
380 | { | |
381 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
382 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
383 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
384 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
385 | } | |
386 | ||
387 | if (rs6000_sdata && g_switch_value) | |
388 | { | |
389 | fprintf (file, "%s -G %d", start, g_switch_value); | |
390 | start = ""; | |
391 | } | |
392 | #endif | |
393 | ||
394 | if (*start == '\0') | |
395 | fputs ("\n", file); | |
396 | } | |
397 | } | |
398 | ||
24d304eb RK |
399 | \f |
400 | /* Create a CONST_DOUBLE from a string. */ | |
401 | ||
402 | struct rtx_def * | |
403 | rs6000_float_const (string, mode) | |
404 | char *string; | |
405 | enum machine_mode mode; | |
406 | { | |
407 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
408 | return immed_real_const_1 (value, mode); | |
409 | } | |
5248c961 | 410 | \f |
9878760c RK |
411 | /* Return non-zero if this function is known to have a null epilogue. */ |
412 | ||
413 | int | |
414 | direct_return () | |
415 | { | |
4697a36c MM |
416 | if (reload_completed) |
417 | { | |
418 | rs6000_stack_t *info = rs6000_stack_info (); | |
419 | ||
420 | if (info->first_gp_reg_save == 32 | |
421 | && info->first_fp_reg_save == 64 | |
422 | && !info->lr_save_p | |
1b4a2731 | 423 | && !info->cr_save_p |
4697a36c MM |
424 | && !info->push_p) |
425 | return 1; | |
426 | } | |
427 | ||
428 | return 0; | |
9878760c RK |
429 | } |
430 | ||
431 | /* Returns 1 always. */ | |
432 | ||
433 | int | |
434 | any_operand (op, mode) | |
296b8152 KG |
435 | register rtx op ATTRIBUTE_UNUSED; |
436 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
437 | { |
438 | return 1; | |
439 | } | |
440 | ||
b6c9286a | 441 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
442 | int |
443 | count_register_operand(op, mode) | |
b6c9286a | 444 | register rtx op; |
296b8152 | 445 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
446 | { |
447 | if (GET_CODE (op) != REG) | |
448 | return 0; | |
449 | ||
450 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
451 | return 1; | |
452 | ||
453 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
454 | return 1; | |
455 | ||
456 | return 0; | |
457 | } | |
458 | ||
802a0058 MM |
459 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
460 | as a register. */ | |
38c1f2d7 MM |
461 | int |
462 | fpmem_operand(op, mode) | |
802a0058 | 463 | register rtx op; |
296b8152 | 464 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
465 | { |
466 | if (GET_CODE (op) != REG) | |
467 | return 0; | |
468 | ||
469 | if (FPMEM_REGNO_P (REGNO (op))) | |
470 | return 1; | |
471 | ||
472 | #if 0 | |
473 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
474 | return 1; | |
475 | #endif | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
9878760c RK |
480 | /* Return 1 if OP is a constant that can fit in a D field. */ |
481 | ||
482 | int | |
483 | short_cint_operand (op, mode) | |
484 | register rtx op; | |
296b8152 | 485 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 486 | { |
e675f625 DE |
487 | return ((GET_CODE (op) == CONST_INT |
488 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000) | |
489 | || GET_CODE (op) == CONSTANT_P_RTX); | |
9878760c RK |
490 | } |
491 | ||
492 | /* Similar for a unsigned D field. */ | |
493 | ||
494 | int | |
495 | u_short_cint_operand (op, mode) | |
496 | register rtx op; | |
296b8152 | 497 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 498 | { |
e675f625 DE |
499 | return ((GET_CODE (op) == CONST_INT |
500 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0) | |
501 | || GET_CODE (op) == CONSTANT_P_RTX); | |
9878760c RK |
502 | } |
503 | ||
dcfedcd0 RK |
504 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
505 | ||
506 | int | |
507 | non_short_cint_operand (op, mode) | |
508 | register rtx op; | |
296b8152 | 509 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
510 | { |
511 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 512 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
513 | } |
514 | ||
9878760c RK |
515 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
516 | ctr, or lr). */ | |
517 | ||
518 | int | |
cd2b37d9 | 519 | gpc_reg_operand (op, mode) |
9878760c RK |
520 | register rtx op; |
521 | enum machine_mode mode; | |
522 | { | |
523 | return (register_operand (op, mode) | |
802a0058 MM |
524 | && (GET_CODE (op) != REG |
525 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
526 | || REGNO (op) < 64)); | |
9878760c RK |
527 | } |
528 | ||
529 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
530 | CR field. */ | |
531 | ||
532 | int | |
533 | cc_reg_operand (op, mode) | |
534 | register rtx op; | |
535 | enum machine_mode mode; | |
536 | { | |
537 | return (register_operand (op, mode) | |
538 | && (GET_CODE (op) != REG | |
539 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
540 | || CR_REGNO_P (REGNO (op)))); | |
541 | } | |
542 | ||
543 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
544 | non-special register. If a register, it must be in the proper mode unless | |
545 | MODE is VOIDmode. */ | |
546 | ||
547 | int | |
548 | reg_or_short_operand (op, mode) | |
549 | register rtx op; | |
550 | enum machine_mode mode; | |
551 | { | |
f5a28898 | 552 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
553 | } |
554 | ||
555 | /* Similar, except check if the negation of the constant would be valid for | |
556 | a D-field. */ | |
557 | ||
558 | int | |
559 | reg_or_neg_short_operand (op, mode) | |
560 | register rtx op; | |
561 | enum machine_mode mode; | |
562 | { | |
563 | if (GET_CODE (op) == CONST_INT) | |
564 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
565 | ||
cd2b37d9 | 566 | return gpc_reg_operand (op, mode); |
9878760c RK |
567 | } |
568 | ||
569 | /* Return 1 if the operand is either a register or an integer whose high-order | |
570 | 16 bits are zero. */ | |
571 | ||
572 | int | |
573 | reg_or_u_short_operand (op, mode) | |
574 | register rtx op; | |
575 | enum machine_mode mode; | |
576 | { | |
e675f625 | 577 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
578 | } |
579 | ||
580 | /* Return 1 is the operand is either a non-special register or ANY | |
581 | constant integer. */ | |
582 | ||
583 | int | |
584 | reg_or_cint_operand (op, mode) | |
585 | register rtx op; | |
586 | enum machine_mode mode; | |
587 | { | |
e675f625 DE |
588 | return (GET_CODE (op) == CONST_INT |
589 | || GET_CODE (op) == CONSTANT_P_RTX | |
590 | || gpc_reg_operand (op, mode)); | |
9878760c RK |
591 | } |
592 | ||
766a866c MM |
593 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
594 | ||
595 | int | |
596 | got_operand (op, mode) | |
597 | register rtx op; | |
296b8152 | 598 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
599 | { |
600 | return (GET_CODE (op) == SYMBOL_REF | |
601 | || GET_CODE (op) == CONST | |
602 | || GET_CODE (op) == LABEL_REF); | |
603 | } | |
604 | ||
38c1f2d7 MM |
605 | /* Return 1 if the operand is a simple references that can be loaded via |
606 | the GOT (labels involving addition aren't allowed). */ | |
607 | ||
608 | int | |
609 | got_no_const_operand (op, mode) | |
610 | register rtx op; | |
296b8152 | 611 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
612 | { |
613 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
614 | } | |
615 | ||
4e74d8ec MM |
616 | /* Return the number of instructions it takes to form a constant in an |
617 | integer register. */ | |
618 | ||
619 | static int | |
620 | num_insns_constant_wide (value) | |
621 | HOST_WIDE_INT value; | |
622 | { | |
623 | /* signed constant loadable with {cal|addi} */ | |
624 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
625 | return 1; | |
626 | ||
627 | #if HOST_BITS_PER_WIDE_INT == 32 | |
628 | /* constant loadable with {cau|addis} */ | |
629 | else if ((value & 0xffff) == 0) | |
630 | return 1; | |
631 | ||
632 | #else | |
633 | /* constant loadable with {cau|addis} */ | |
634 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
635 | return 1; | |
636 | ||
637 | else if (TARGET_64BIT) | |
638 | { | |
639 | HOST_WIDE_INT low = value & 0xffffffff; | |
640 | HOST_WIDE_INT high = value >> 32; | |
641 | ||
642 | if (high == 0 && (low & 0x80000000) == 0) | |
643 | return 2; | |
644 | ||
645 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
646 | return 2; | |
647 | ||
648 | else if (!low) | |
649 | return num_insns_constant_wide (high) + 1; | |
650 | ||
651 | else | |
652 | return (num_insns_constant_wide (high) | |
e396202a | 653 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
654 | } |
655 | #endif | |
656 | ||
657 | else | |
658 | return 2; | |
659 | } | |
660 | ||
661 | int | |
662 | num_insns_constant (op, mode) | |
663 | rtx op; | |
664 | enum machine_mode mode; | |
665 | { | |
4e74d8ec MM |
666 | if (GET_CODE (op) == CONST_INT) |
667 | return num_insns_constant_wide (INTVAL (op)); | |
668 | ||
6fc48950 MM |
669 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
670 | { | |
671 | long l; | |
672 | REAL_VALUE_TYPE rv; | |
673 | ||
674 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
675 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
676 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
677 | } | |
678 | ||
47ad8c61 | 679 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 680 | { |
47ad8c61 MM |
681 | HOST_WIDE_INT low; |
682 | HOST_WIDE_INT high; | |
683 | long l[2]; | |
684 | REAL_VALUE_TYPE rv; | |
685 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 686 | |
47ad8c61 MM |
687 | if (mode == VOIDmode || mode == DImode) |
688 | { | |
689 | high = CONST_DOUBLE_HIGH (op); | |
690 | low = CONST_DOUBLE_LOW (op); | |
691 | } | |
692 | else | |
693 | { | |
694 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
695 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
696 | high = l[endian]; | |
697 | low = l[1 - endian]; | |
698 | } | |
4e74d8ec | 699 | |
47ad8c61 MM |
700 | if (TARGET_32BIT) |
701 | return (num_insns_constant_wide (low) | |
702 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
703 | |
704 | else | |
47ad8c61 MM |
705 | { |
706 | if (high == 0 && (low & 0x80000000) == 0) | |
707 | return num_insns_constant_wide (low); | |
708 | ||
709 | else if (((high & 0xffffffff) == 0xffffffff) | |
710 | && ((low & 0x80000000) != 0)) | |
711 | return num_insns_constant_wide (low); | |
712 | ||
a260abc9 DE |
713 | else if (mask64_operand (op, mode)) |
714 | return 2; | |
715 | ||
47ad8c61 MM |
716 | else if (low == 0) |
717 | return num_insns_constant_wide (high) + 1; | |
718 | ||
719 | else | |
720 | return (num_insns_constant_wide (high) | |
721 | + num_insns_constant_wide (low) + 1); | |
722 | } | |
4e74d8ec MM |
723 | } |
724 | ||
725 | else | |
726 | abort (); | |
727 | } | |
728 | ||
6f2f8311 RK |
729 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
730 | with one instruction per word. We only do this if we can safely read | |
731 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
732 | |
733 | int | |
734 | easy_fp_constant (op, mode) | |
735 | register rtx op; | |
736 | register enum machine_mode mode; | |
737 | { | |
9878760c RK |
738 | if (GET_CODE (op) != CONST_DOUBLE |
739 | || GET_MODE (op) != mode | |
4e74d8ec | 740 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
741 | return 0; |
742 | ||
b6c9286a | 743 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 744 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
745 | return 1; |
746 | ||
a7273471 MM |
747 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
748 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
749 | return 0; | |
750 | ||
5ae4759c MM |
751 | #ifdef TARGET_RELOCATABLE |
752 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
753 | if (TARGET_RELOCATABLE) | |
754 | return 0; | |
755 | #endif | |
756 | ||
042259f2 DE |
757 | if (mode == DFmode) |
758 | { | |
759 | long k[2]; | |
760 | REAL_VALUE_TYPE rv; | |
761 | ||
762 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
763 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 764 | |
4e74d8ec MM |
765 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
766 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 767 | } |
4e74d8ec MM |
768 | |
769 | else if (mode == SFmode) | |
042259f2 DE |
770 | { |
771 | long l; | |
772 | REAL_VALUE_TYPE rv; | |
773 | ||
774 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
775 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 776 | |
4e74d8ec | 777 | return num_insns_constant_wide (l) == 1; |
042259f2 | 778 | } |
4e74d8ec | 779 | |
a260abc9 DE |
780 | else if (mode == DImode) |
781 | return ((TARGET_64BIT | |
782 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) | |
783 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
784 | |
785 | else | |
786 | abort (); | |
9878760c | 787 | } |
8f75773e | 788 | |
b6c9286a MM |
789 | /* Return 1 if the operand is in volatile memory. Note that during the |
790 | RTL generation phase, memory_operand does not return TRUE for | |
791 | volatile memory references. So this function allows us to | |
792 | recognize volatile references where its safe. */ | |
793 | ||
794 | int | |
795 | volatile_mem_operand (op, mode) | |
796 | register rtx op; | |
797 | enum machine_mode mode; | |
798 | { | |
799 | if (GET_CODE (op) != MEM) | |
800 | return 0; | |
801 | ||
802 | if (!MEM_VOLATILE_P (op)) | |
803 | return 0; | |
804 | ||
805 | if (mode != GET_MODE (op)) | |
806 | return 0; | |
807 | ||
808 | if (reload_completed) | |
809 | return memory_operand (op, mode); | |
810 | ||
811 | if (reload_in_progress) | |
812 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
813 | ||
814 | return memory_address_p (mode, XEXP (op, 0)); | |
815 | } | |
816 | ||
5b5040b9 | 817 | /* Return 1 if the operand is an offsettable memory address. */ |
914c2e77 RK |
818 | |
819 | int | |
5b5040b9 | 820 | offsettable_addr_operand (op, mode) |
914c2e77 RK |
821 | register rtx op; |
822 | enum machine_mode mode; | |
823 | { | |
8f75773e | 824 | return offsettable_address_p (reload_completed | reload_in_progress, |
5b5040b9 | 825 | mode, op); |
914c2e77 RK |
826 | } |
827 | ||
9878760c RK |
828 | /* Return 1 if the operand is either an easy FP constant (see above) or |
829 | memory. */ | |
830 | ||
831 | int | |
832 | mem_or_easy_const_operand (op, mode) | |
833 | register rtx op; | |
834 | enum machine_mode mode; | |
835 | { | |
836 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
837 | } | |
838 | ||
839 | /* Return 1 if the operand is either a non-special register or an item | |
840 | that can be used as the operand of an SI add insn. */ | |
841 | ||
842 | int | |
843 | add_operand (op, mode) | |
844 | register rtx op; | |
845 | enum machine_mode mode; | |
846 | { | |
847 | return (reg_or_short_operand (op, mode) | |
848 | || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); | |
849 | } | |
850 | ||
dcfedcd0 RK |
851 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
852 | ||
853 | int | |
854 | non_add_cint_operand (op, mode) | |
855 | register rtx op; | |
296b8152 | 856 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
857 | { |
858 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 859 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
dcfedcd0 RK |
860 | && (INTVAL (op) & 0xffff) != 0); |
861 | } | |
862 | ||
9878760c RK |
863 | /* Return 1 if the operand is a non-special register or a constant that |
864 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
865 | ||
866 | int | |
867 | logical_operand (op, mode) | |
868 | register rtx op; | |
869 | enum machine_mode mode; | |
870 | { | |
cd2b37d9 | 871 | return (gpc_reg_operand (op, mode) |
9878760c | 872 | || (GET_CODE (op) == CONST_INT |
a260abc9 | 873 | && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0 |
e675f625 DE |
874 | || (INTVAL (op) & 0xffff) == 0)) |
875 | || GET_CODE (op) == CONSTANT_P_RTX); | |
9878760c RK |
876 | } |
877 | ||
dcfedcd0 RK |
878 | /* Return 1 if C is a constant that is not a logical operand (as |
879 | above). */ | |
880 | ||
881 | int | |
882 | non_logical_cint_operand (op, mode) | |
883 | register rtx op; | |
296b8152 | 884 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
885 | { |
886 | return (GET_CODE (op) == CONST_INT | |
a260abc9 | 887 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0 |
dcfedcd0 RK |
888 | && (INTVAL (op) & 0xffff) != 0); |
889 | } | |
890 | ||
9878760c RK |
891 | /* Return 1 if C is a constant that can be encoded in a mask on the |
892 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
893 | Reject all ones and all zeros, since these should have been optimized | |
894 | away and confuse the making of MB and ME. */ | |
895 | ||
896 | int | |
897 | mask_constant (c) | |
a260abc9 | 898 | register HOST_WIDE_INT c; |
9878760c RK |
899 | { |
900 | int i; | |
901 | int last_bit_value; | |
902 | int transitions = 0; | |
903 | ||
904 | if (c == 0 || c == ~0) | |
905 | return 0; | |
906 | ||
907 | last_bit_value = c & 1; | |
908 | ||
909 | for (i = 1; i < 32; i++) | |
910 | if (((c >>= 1) & 1) != last_bit_value) | |
911 | last_bit_value ^= 1, transitions++; | |
912 | ||
913 | return transitions <= 2; | |
914 | } | |
915 | ||
916 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
917 | ||
918 | int | |
919 | mask_operand (op, mode) | |
920 | register rtx op; | |
296b8152 | 921 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
922 | { |
923 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
924 | } | |
925 | ||
a260abc9 DE |
926 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
927 | It is if there are no more than one 1->0 or 0->1 transitions. | |
928 | Reject all ones and all zeros, since these should have been optimized | |
929 | away and confuse the making of MB and ME. */ | |
9878760c RK |
930 | |
931 | int | |
a260abc9 DE |
932 | mask64_operand (op, mode) |
933 | register rtx op; | |
934 | enum machine_mode mode; | |
935 | { | |
936 | if (GET_CODE (op) == CONST_INT) | |
937 | { | |
938 | HOST_WIDE_INT c = INTVAL (op); | |
939 | int i; | |
940 | int last_bit_value; | |
941 | int transitions = 0; | |
942 | ||
943 | if (c == 0 || c == ~0) | |
944 | return 0; | |
945 | ||
946 | last_bit_value = c & 1; | |
947 | ||
948 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
949 | if (((c >>= 1) & 1) != last_bit_value) | |
950 | last_bit_value ^= 1, transitions++; | |
951 | ||
a238cd8b | 952 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
953 | /* Consider CONST_INT sign-extended. */ |
954 | transitions += (last_bit_value != 1); | |
955 | #endif | |
956 | ||
957 | return transitions <= 1; | |
958 | } | |
959 | else if (GET_CODE (op) == CONST_DOUBLE | |
960 | && (mode == VOIDmode || mode == DImode)) | |
961 | { | |
962 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 963 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
964 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
965 | #endif | |
966 | int i; | |
967 | int last_bit_value; | |
968 | int transitions = 0; | |
969 | ||
970 | if ((low == 0 | |
a238cd8b | 971 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
972 | && high == 0 |
973 | #endif | |
974 | ) | |
975 | || (low == ~0 | |
a238cd8b | 976 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
977 | && high == ~0 |
978 | #endif | |
979 | )) | |
980 | return 0; | |
981 | ||
982 | last_bit_value = low & 1; | |
983 | ||
984 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
985 | if (((low >>= 1) & 1) != last_bit_value) | |
986 | last_bit_value ^= 1, transitions++; | |
987 | ||
a238cd8b | 988 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
989 | if ((high & 1) != last_bit_value) |
990 | last_bit_value ^= 1, transitions++; | |
991 | ||
992 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
993 | if (((high >>= 1) & 1) != last_bit_value) | |
994 | last_bit_value ^= 1, transitions++; | |
995 | #endif | |
996 | ||
997 | return transitions <= 1; | |
998 | } | |
999 | else | |
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | /* Return 1 if the operand is either a non-special register or a constant | |
1004 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1005 | ||
1006 | int | |
1007 | and64_operand (op, mode) | |
9878760c RK |
1008 | register rtx op; |
1009 | enum machine_mode mode; | |
1010 | { | |
38c1f2d7 | 1011 | return (logical_operand (op, mode) |
a260abc9 | 1012 | || mask64_operand (op, mode)); |
9878760c RK |
1013 | } |
1014 | ||
a260abc9 DE |
1015 | /* Return 1 if the operand is either a non-special register or a |
1016 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1017 | |
1018 | int | |
a260abc9 DE |
1019 | and_operand (op, mode) |
1020 | register rtx op; | |
1021 | enum machine_mode mode; | |
dcfedcd0 | 1022 | { |
a260abc9 DE |
1023 | return (logical_operand (op, mode) |
1024 | || mask_operand (op, mode)); | |
dcfedcd0 RK |
1025 | } |
1026 | ||
9878760c RK |
1027 | /* Return 1 if the operand is a general register or memory operand. */ |
1028 | ||
1029 | int | |
1030 | reg_or_mem_operand (op, mode) | |
1031 | register rtx op; | |
1032 | register enum machine_mode mode; | |
1033 | { | |
b6c9286a MM |
1034 | return (gpc_reg_operand (op, mode) |
1035 | || memory_operand (op, mode) | |
1036 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1037 | } |
1038 | ||
a7a813f7 RK |
1039 | /* Return 1 if the operand is a general register or memory operand without |
1040 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
1041 | instruction. */ | |
1042 | ||
1043 | int | |
1044 | lwa_operand (op, mode) | |
1045 | register rtx op; | |
1046 | register enum machine_mode mode; | |
1047 | { | |
1048 | rtx inner = op; | |
1049 | ||
1050 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1051 | inner = SUBREG_REG (inner); | |
1052 | ||
1053 | return gpc_reg_operand (inner, mode) | |
1054 | || (memory_operand (inner, mode) | |
1055 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1056 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1057 | } | |
1058 | ||
9878760c RK |
1059 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1060 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1061 | forced to lr. */ | |
1062 | ||
1063 | int | |
1064 | call_operand (op, mode) | |
1065 | register rtx op; | |
1066 | enum machine_mode mode; | |
1067 | { | |
1068 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1069 | return 0; | |
1070 | ||
1071 | return (GET_CODE (op) == SYMBOL_REF | |
1072 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1073 | } | |
1074 | ||
2af3d377 RK |
1075 | |
1076 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
1077 | this file. */ | |
1078 | ||
1079 | int | |
1080 | current_file_function_operand (op, mode) | |
1081 | register rtx op; | |
296b8152 | 1082 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1083 | { |
1084 | return (GET_CODE (op) == SYMBOL_REF | |
1085 | && (SYMBOL_REF_FLAG (op) | |
1086 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
1087 | } | |
1088 | ||
1089 | ||
9878760c RK |
1090 | /* Return 1 if this operand is a valid input for a move insn. */ |
1091 | ||
1092 | int | |
1093 | input_operand (op, mode) | |
1094 | register rtx op; | |
1095 | enum machine_mode mode; | |
1096 | { | |
eb4e8003 | 1097 | /* Memory is always valid. */ |
9878760c RK |
1098 | if (memory_operand (op, mode)) |
1099 | return 1; | |
1100 | ||
eb4e8003 RK |
1101 | /* For floating-point, easy constants are valid. */ |
1102 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1103 | && CONSTANT_P (op) | |
1104 | && easy_fp_constant (op, mode)) | |
1105 | return 1; | |
1106 | ||
4e74d8ec MM |
1107 | /* Allow any integer constant. */ |
1108 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 DE |
1109 | && (GET_CODE (op) == CONST_INT |
1110 | || GET_CODE (op) == CONSTANT_P_RTX | |
1111 | || GET_CODE (op) == CONST_DOUBLE)) | |
4e74d8ec MM |
1112 | return 1; |
1113 | ||
eb4e8003 RK |
1114 | /* For floating-point or multi-word mode, the only remaining valid type |
1115 | is a register. */ | |
9878760c RK |
1116 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1117 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1118 | return register_operand (op, mode); |
9878760c | 1119 | |
88fe15a1 RK |
1120 | /* The only cases left are integral modes one word or smaller (we |
1121 | do not get called for MODE_CC values). These can be in any | |
1122 | register. */ | |
1123 | if (register_operand (op, mode)) | |
a8b3aeda | 1124 | return 1; |
88fe15a1 | 1125 | |
84cf9dda | 1126 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1127 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1128 | return 1; |
1129 | ||
b6c9286a MM |
1130 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1131 | directly in the instruction stream */ | |
1132 | if (DEFAULT_ABI == ABI_NT | |
1133 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1134 | return 1; | |
1135 | ||
88228c4b MM |
1136 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1137 | to be valid. */ | |
c81bebd7 | 1138 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1139 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1140 | && small_data_operand (op, Pmode)) | |
1141 | return 1; | |
1142 | ||
042259f2 | 1143 | return 0; |
9878760c | 1144 | } |
7509c759 MM |
1145 | |
1146 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1147 | ||
1148 | int | |
1149 | small_data_operand (op, mode) | |
296b8152 | 1150 | #if TARGET_ELF |
7509c759 MM |
1151 | rtx op; |
1152 | enum machine_mode mode; | |
296b8152 KG |
1153 | #else |
1154 | rtx op ATTRIBUTE_UNUSED; | |
1155 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
1156 | #endif | |
7509c759 | 1157 | { |
38c1f2d7 | 1158 | #if TARGET_ELF |
7509c759 MM |
1159 | rtx sym_ref, const_part; |
1160 | ||
d9407988 | 1161 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1162 | return 0; |
a54d04b7 | 1163 | |
5b9d9a0c | 1164 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1165 | return 0; |
1166 | ||
88228c4b MM |
1167 | if (GET_CODE (op) == SYMBOL_REF) |
1168 | sym_ref = op; | |
1169 | ||
1170 | else if (GET_CODE (op) != CONST | |
1171 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1172 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1173 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1174 | return 0; |
1175 | ||
88228c4b | 1176 | else |
dbf55e53 MM |
1177 | { |
1178 | rtx sum = XEXP (op, 0); | |
1179 | HOST_WIDE_INT summand; | |
1180 | ||
1181 | /* We have to be careful here, because it is the referenced address | |
1182 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1183 | summand = INTVAL (XEXP (sum, 1)); | |
1184 | if (summand < 0 || summand > g_switch_value) | |
1185 | return 0; | |
1186 | ||
1187 | sym_ref = XEXP (sum, 0); | |
1188 | } | |
88228c4b MM |
1189 | |
1190 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1191 | return 0; |
1192 | ||
1193 | return 1; | |
d9407988 MM |
1194 | |
1195 | #else | |
1196 | return 0; | |
1197 | #endif | |
7509c759 MM |
1198 | } |
1199 | ||
4697a36c MM |
1200 | \f |
1201 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1202 | for a call to a function whose data type is FNTYPE. | |
1203 | For a library call, FNTYPE is 0. | |
1204 | ||
1205 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1206 | so we never return a PARALLEL. */ |
4697a36c MM |
1207 | |
1208 | void | |
1209 | init_cumulative_args (cum, fntype, libname, incoming) | |
1210 | CUMULATIVE_ARGS *cum; | |
1211 | tree fntype; | |
296b8152 | 1212 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1213 | int incoming; |
1214 | { | |
1215 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1216 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1217 | |
1218 | *cum = zero_cumulative; | |
1219 | cum->words = 0; | |
1220 | cum->fregno = FP_ARG_MIN_REG; | |
1221 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1222 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1223 | |
1224 | if (incoming) | |
1225 | { | |
1c20ae99 | 1226 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
c81bebd7 | 1227 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1228 | cum->varargs_offset = RS6000_VARARGS_OFFSET; |
4697a36c MM |
1229 | } |
1230 | ||
1231 | else if (cum->prototype) | |
1232 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1233 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1234 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1235 | ||
1236 | else | |
1237 | cum->nargs_prototype = 0; | |
1238 | ||
1239 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1240 | |
1241 | /* Check for DLL import functions */ | |
1242 | if (abi == ABI_NT | |
1243 | && fntype | |
1244 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1245 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1246 | ||
6a4cee5f MM |
1247 | /* Also check for longcall's */ |
1248 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1249 | cum->call_cookie = CALL_LONG; | |
1250 | ||
4697a36c MM |
1251 | if (TARGET_DEBUG_ARG) |
1252 | { | |
1253 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1254 | if (fntype) | |
1255 | { | |
1256 | tree ret_type = TREE_TYPE (fntype); | |
1257 | fprintf (stderr, " ret code = %s,", | |
1258 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1259 | } | |
1260 | ||
c81bebd7 | 1261 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming) |
4697a36c | 1262 | fprintf (stderr, " varargs = %d, ", cum->varargs_offset); |
7509c759 | 1263 | |
6a4cee5f | 1264 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1265 | fprintf (stderr, " dllimport,"); |
4697a36c | 1266 | |
6a4cee5f MM |
1267 | if (cum->call_cookie & CALL_LONG) |
1268 | fprintf (stderr, " longcall,"); | |
1269 | ||
4697a36c MM |
1270 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1271 | cum->prototype, cum->nargs_prototype); | |
1272 | } | |
1273 | } | |
1274 | \f | |
c229cba9 DE |
1275 | /* If defined, a C expression which determines whether, and in which |
1276 | direction, to pad out an argument with extra space. The value | |
1277 | should be of type `enum direction': either `upward' to pad above | |
1278 | the argument, `downward' to pad below, or `none' to inhibit | |
1279 | padding. | |
1280 | ||
1281 | For the AIX ABI structs are always stored left shifted in their | |
1282 | argument slot. */ | |
1283 | ||
c4d38ccb | 1284 | int |
c229cba9 DE |
1285 | function_arg_padding (mode, type) |
1286 | enum machine_mode mode; | |
1287 | tree type; | |
1288 | { | |
c85f7c16 | 1289 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1290 | return (int)upward; |
c229cba9 DE |
1291 | |
1292 | /* This is the default definition. */ | |
1293 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1294 | ? (int)upward |
c229cba9 DE |
1295 | : ((mode == BLKmode |
1296 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1297 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1298 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1299 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1300 | } |
1301 | ||
b6c9286a MM |
1302 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1303 | of an argument with the specified mode and type. If it is not defined, | |
1304 | PARM_BOUNDARY is used for all arguments. | |
1305 | ||
e1f83b4d MM |
1306 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1307 | ||
1308 | V.4 wants long longs to be double word aligned. */ | |
b6c9286a MM |
1309 | |
1310 | int | |
1311 | function_arg_boundary (mode, type) | |
1312 | enum machine_mode mode; | |
1313 | tree type; | |
1314 | { | |
c81bebd7 | 1315 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1316 | return 64; |
1317 | ||
b6c9286a MM |
1318 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1319 | return PARM_BOUNDARY; | |
1320 | ||
1321 | if (mode != BLKmode) | |
1322 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1323 | ||
1324 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1325 | } | |
1326 | \f | |
4697a36c MM |
1327 | /* Update the data in CUM to advance over an argument |
1328 | of mode MODE and data type TYPE. | |
1329 | (TYPE is null for libcalls where that information may not be available.) */ | |
1330 | ||
1331 | void | |
1332 | function_arg_advance (cum, mode, type, named) | |
1333 | CUMULATIVE_ARGS *cum; | |
1334 | enum machine_mode mode; | |
1335 | tree type; | |
1336 | int named; | |
1337 | { | |
a260abc9 DE |
1338 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1339 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a | 1340 | cum->words += align; |
4697a36c MM |
1341 | cum->nargs_prototype--; |
1342 | ||
c81bebd7 | 1343 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1344 | { |
1345 | /* Long longs must not be split between registers and stack */ | |
1346 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1347 | && type && !AGGREGATE_TYPE_P (type) | |
1348 | && cum->words < GP_ARG_NUM_REG | |
1349 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1350 | { | |
1351 | cum->words = GP_ARG_NUM_REG; | |
1352 | } | |
1353 | ||
1354 | /* Aggregates get passed as pointers */ | |
1355 | if (type && AGGREGATE_TYPE_P (type)) | |
1356 | cum->words++; | |
1357 | ||
1358 | /* Floats go in registers, & don't occupy space in the GP registers | |
1359 | like they do for AIX unless software floating point. */ | |
1360 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1361 | && TARGET_HARD_FLOAT | |
1362 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1363 | cum->fregno++; | |
1364 | ||
1365 | else | |
1366 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1367 | } | |
1368 | else | |
4697a36c MM |
1369 | if (named) |
1370 | { | |
1371 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1372 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1373 | cum->fregno++; | |
1374 | } | |
1375 | ||
1376 | if (TARGET_DEBUG_ARG) | |
1377 | fprintf (stderr, | |
b6c9286a MM |
1378 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1379 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1380 | } |
1381 | \f | |
1382 | /* Determine where to put an argument to a function. | |
1383 | Value is zero to push the argument on the stack, | |
1384 | or a hard register in which to store the argument. | |
1385 | ||
1386 | MODE is the argument's machine mode. | |
1387 | TYPE is the data type of the argument (as a tree). | |
1388 | This is null for libcalls where that information may | |
1389 | not be available. | |
1390 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1391 | the preceding args and about the function being called. | |
1392 | NAMED is nonzero if this argument is a named parameter | |
1393 | (otherwise it is an extra parameter matching an ellipsis). | |
1394 | ||
1395 | On RS/6000 the first eight words of non-FP are normally in registers | |
1396 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1397 | Under V.4, the first 8 FP args are in registers. | |
1398 | ||
1399 | If this is floating-point and no prototype is specified, we use | |
1400 | both an FP and integer register (or possibly FP reg and stack). Library | |
1401 | functions (when TYPE is zero) always have the proper types for args, | |
1402 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1403 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1404 | |
1405 | struct rtx_def * | |
1406 | function_arg (cum, mode, type, named) | |
1407 | CUMULATIVE_ARGS *cum; | |
1408 | enum machine_mode mode; | |
1409 | tree type; | |
1410 | int named; | |
1411 | { | |
a260abc9 DE |
1412 | int align = (TARGET_32BIT && (cum->words & 1) != 0 |
1413 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
b6c9286a MM |
1414 | int align_words = cum->words + align; |
1415 | ||
4697a36c MM |
1416 | if (TARGET_DEBUG_ARG) |
1417 | fprintf (stderr, | |
b6c9286a MM |
1418 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1419 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1420 | |
1421 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1422 | uses to say fp args were passed in registers. Assume that we don't need the | |
1423 | marker for software floating point, or compiler generated library calls. */ | |
1424 | if (mode == VOIDmode) | |
1425 | { | |
7509c759 MM |
1426 | enum rs6000_abi abi = DEFAULT_ABI; |
1427 | ||
c81bebd7 | 1428 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1429 | && TARGET_HARD_FLOAT |
1430 | && cum->nargs_prototype < 0 | |
4697a36c | 1431 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1432 | { |
6a4cee5f MM |
1433 | return GEN_INT (cum->call_cookie |
1434 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1435 | ? CALL_V4_SET_FP_ARGS | |
1436 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1437 | } |
4697a36c | 1438 | |
7509c759 | 1439 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1440 | } |
1441 | ||
1442 | if (!named) | |
1443 | { | |
c81bebd7 | 1444 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1445 | return NULL_RTX; |
1446 | } | |
1447 | ||
1448 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1449 | return NULL_RTX; | |
1450 | ||
1451 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1452 | { | |
5b9d9a0c | 1453 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1454 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1455 | || ! type |
1456 | || ((cum->nargs_prototype > 0) | |
1457 | /* IBM AIX extended its linkage convention definition always to | |
1458 | require FP args after register save area hole on the stack. */ | |
1459 | && (DEFAULT_ABI != ABI_AIX | |
1460 | || ! TARGET_XL_CALL | |
1461 | || (align_words < GP_ARG_NUM_REG)))) | |
39403d82 | 1462 | return gen_rtx_REG (mode, cum->fregno); |
4697a36c | 1463 | |
39403d82 | 1464 | return gen_rtx_PARALLEL (mode, |
1c20ae99 JW |
1465 | gen_rtvec |
1466 | (2, | |
39403d82 | 1467 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1468 | ((align_words >= GP_ARG_NUM_REG) |
1469 | ? NULL_RTX | |
1470 | : (align_words | |
1471 | + RS6000_ARG_SIZE (mode, type, named) | |
1472 | > GP_ARG_NUM_REG | |
1473 | /* If this is partially on the stack, then | |
1474 | we only include the portion actually | |
1475 | in registers here. */ | |
39403d82 | 1476 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1477 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1478 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1479 | GP_ARG_MIN_REG + align_words))), |
1480 | const0_rtx), | |
39403d82 DE |
1481 | gen_rtx_EXPR_LIST (VOIDmode, |
1482 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1483 | const0_rtx))); |
4697a36c MM |
1484 | } |
1485 | ||
92dcf4c8 MM |
1486 | /* Long longs won't be split between register and stack; |
1487 | FP arguments get passed on the stack if they didn't get a register. */ | |
c81bebd7 | 1488 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
92dcf4c8 MM |
1489 | (align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG |
1490 | || (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT))) | |
4697a36c MM |
1491 | { |
1492 | return NULL_RTX; | |
1493 | } | |
4697a36c | 1494 | |
b6c9286a | 1495 | else if (align_words < GP_ARG_NUM_REG) |
39403d82 | 1496 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); |
4697a36c MM |
1497 | |
1498 | return NULL_RTX; | |
1499 | } | |
1500 | \f | |
1501 | /* For an arg passed partly in registers and partly in memory, | |
1502 | this is the number of registers used. | |
1503 | For args passed entirely in registers or entirely in memory, zero. */ | |
1504 | ||
1505 | int | |
1506 | function_arg_partial_nregs (cum, mode, type, named) | |
1507 | CUMULATIVE_ARGS *cum; | |
1508 | enum machine_mode mode; | |
1509 | tree type; | |
1510 | int named; | |
1511 | { | |
1512 | if (! named) | |
1513 | return 0; | |
1514 | ||
c81bebd7 | 1515 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1516 | return 0; |
4697a36c MM |
1517 | |
1518 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1519 | { | |
1520 | if (cum->nargs_prototype >= 0) | |
1521 | return 0; | |
1522 | } | |
1523 | ||
1524 | if (cum->words < GP_ARG_NUM_REG | |
1525 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1526 | { | |
1527 | int ret = GP_ARG_NUM_REG - cum->words; | |
1528 | if (ret && TARGET_DEBUG_ARG) | |
1529 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1530 | ||
1531 | return ret; | |
1532 | } | |
1533 | ||
1534 | return 0; | |
1535 | } | |
1536 | \f | |
1537 | /* A C expression that indicates when an argument must be passed by | |
1538 | reference. If nonzero for an argument, a copy of that argument is | |
1539 | made in memory and a pointer to the argument is passed instead of | |
1540 | the argument itself. The pointer is passed in whatever way is | |
1541 | appropriate for passing a pointer to that type. | |
1542 | ||
1543 | Under V.4, structures and unions are passed by reference. */ | |
1544 | ||
1545 | int | |
1546 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1547 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1548 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1549 | tree type; |
296b8152 | 1550 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1551 | { |
c81bebd7 MM |
1552 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1553 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1554 | { |
1555 | if (TARGET_DEBUG_ARG) | |
1556 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1557 | ||
1558 | return 1; | |
1559 | } | |
4697a36c MM |
1560 | |
1561 | return 0; | |
1562 | } | |
1563 | ||
1564 | \f | |
1565 | /* Perform any needed actions needed for a function that is receiving a | |
1566 | variable number of arguments. | |
1567 | ||
1568 | CUM is as above. | |
1569 | ||
1570 | MODE and TYPE are the mode and type of the current parameter. | |
1571 | ||
1572 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1573 | that must be pushed by the prolog to pretend that our caller pushed | |
1574 | it. | |
1575 | ||
1576 | Normally, this macro will push all remaining incoming registers on the | |
1577 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1578 | ||
1579 | void | |
1580 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1581 | CUMULATIVE_ARGS *cum; | |
1582 | enum machine_mode mode; | |
1583 | tree type; | |
1584 | int *pretend_size; | |
1585 | int no_rtl; | |
1586 | ||
1587 | { | |
1588 | rtx save_area = virtual_incoming_args_rtx; | |
a260abc9 | 1589 | int reg_size = TARGET_32BIT ? 4 : 8; |
4697a36c MM |
1590 | |
1591 | if (TARGET_DEBUG_ARG) | |
1592 | fprintf (stderr, | |
1593 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1594 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1595 | ||
60e2d0ca | 1596 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1597 | { |
1598 | rs6000_sysv_varargs_p = 1; | |
60e2d0ca RK |
1599 | if (! no_rtl) |
1600 | save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); | |
4697a36c | 1601 | } |
60e2d0ca RK |
1602 | else |
1603 | rs6000_sysv_varargs_p = 0; | |
4697a36c MM |
1604 | |
1605 | if (cum->words < 8) | |
1606 | { | |
1607 | int first_reg_offset = cum->words; | |
1608 | ||
1609 | if (MUST_PASS_IN_STACK (mode, type)) | |
1610 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1611 | ||
1612 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1613 | first_reg_offset = GP_ARG_NUM_REG; | |
1614 | ||
1615 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1616 | move_block_from_reg | |
1617 | (GP_ARG_MIN_REG + first_reg_offset, | |
39403d82 | 1618 | gen_rtx_MEM (BLKmode, |
4697a36c MM |
1619 | plus_constant (save_area, first_reg_offset * reg_size)), |
1620 | GP_ARG_NUM_REG - first_reg_offset, | |
1621 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1622 | ||
1623 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1624 | } | |
1625 | ||
4697a36c | 1626 | /* Save FP registers if needed. */ |
c81bebd7 | 1627 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1628 | { |
1629 | int fregno = cum->fregno; | |
1630 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1631 | ||
1632 | if (num_fp_reg >= 0) | |
1633 | { | |
39403d82 | 1634 | rtx cr1 = gen_rtx_REG (CCmode, 69); |
4697a36c MM |
1635 | rtx lab = gen_label_rtx (); |
1636 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1637 | ||
39403d82 | 1638 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1639 | pc_rtx, |
39403d82 DE |
1640 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
1641 | gen_rtx_NE (VOIDmode, cr1, const0_rtx), | |
1642 | gen_rtx_LABEL_REF (VOIDmode, lab), | |
4697a36c MM |
1643 | pc_rtx))); |
1644 | ||
1645 | while ( num_fp_reg-- >= 0) | |
1646 | { | |
39403d82 DE |
1647 | emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), |
1648 | gen_rtx_REG (DFmode, fregno++)); | |
4697a36c MM |
1649 | off += 8; |
1650 | } | |
1651 | ||
1652 | emit_label (lab); | |
1653 | } | |
1654 | } | |
4697a36c MM |
1655 | } |
1656 | \f | |
1657 | /* If defined, is a C expression that produces the machine-specific | |
1658 | code for a call to `__builtin_saveregs'. This code will be moved | |
1659 | to the very beginning of the function, before any parameter access | |
1660 | are made. The return value of this function should be an RTX that | |
1661 | contains the value to use as the return of `__builtin_saveregs'. | |
1662 | ||
1663 | The argument ARGS is a `tree_list' containing the arguments that | |
1664 | were passed to `__builtin_saveregs'. | |
1665 | ||
1666 | If this macro is not defined, the compiler will output an ordinary | |
1667 | call to the library function `__builtin_saveregs'. | |
1668 | ||
1669 | On the Power/PowerPC return the address of the area on the stack | |
1670 | used to hold arguments. Under AIX, this includes the 8 word register | |
1671 | save area. Under V.4 this does not. */ | |
1672 | ||
1673 | struct rtx_def * | |
1674 | expand_builtin_saveregs (args) | |
296b8152 | 1675 | tree args ATTRIBUTE_UNUSED; |
4697a36c MM |
1676 | { |
1677 | return virtual_incoming_args_rtx; | |
1678 | } | |
1679 | ||
5b5040b9 RK |
1680 | \f |
1681 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1682 | and other bits from an original memory reference. */ | |
1683 | ||
1684 | static rtx | |
1685 | expand_block_move_mem (mode, addr, orig_mem) | |
1686 | enum machine_mode mode; | |
1687 | rtx addr; | |
1688 | rtx orig_mem; | |
1689 | { | |
39403d82 | 1690 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
1691 | |
1692 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
5b5040b9 RK |
1693 | MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); |
1694 | MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem); | |
b6c9286a MM |
1695 | #ifdef MEM_UNALIGNED_P |
1696 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1697 | #endif | |
5b5040b9 RK |
1698 | return mem; |
1699 | } | |
1700 | ||
7e69e155 MM |
1701 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1702 | if we should let the compiler generate normal code. | |
1703 | ||
1704 | operands[0] is the destination | |
1705 | operands[1] is the source | |
1706 | operands[2] is the length | |
1707 | operands[3] is the alignment */ | |
1708 | ||
3933e0e1 MM |
1709 | #define MAX_MOVE_REG 4 |
1710 | ||
7e69e155 MM |
1711 | int |
1712 | expand_block_move (operands) | |
1713 | rtx operands[]; | |
1714 | { | |
b6c9286a MM |
1715 | rtx orig_dest = operands[0]; |
1716 | rtx orig_src = operands[1]; | |
7e69e155 | 1717 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1718 | rtx align_rtx = operands[3]; |
3933e0e1 | 1719 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1720 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1721 | int bytes; |
1722 | int offset; | |
1723 | int num_reg; | |
1724 | int i; | |
7e69e155 MM |
1725 | rtx src_reg; |
1726 | rtx dest_reg; | |
3933e0e1 MM |
1727 | rtx src_addr; |
1728 | rtx dest_addr; | |
7e69e155 | 1729 | rtx tmp_reg; |
3933e0e1 | 1730 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1731 | int move_bytes; |
1732 | ||
3933e0e1 MM |
1733 | /* If this is not a fixed size move, just call memcpy */ |
1734 | if (!constp) | |
1735 | return 0; | |
1736 | ||
7e69e155 | 1737 | /* Anything to move? */ |
3933e0e1 MM |
1738 | bytes = INTVAL (bytes_rtx); |
1739 | if (bytes <= 0) | |
7e69e155 MM |
1740 | return 1; |
1741 | ||
3933e0e1 MM |
1742 | /* Don't support real large moves. If string instructions are not used, |
1743 | then don't generate more than 8 loads. */ | |
1744 | if (TARGET_STRING) | |
1745 | { | |
1cab3be1 | 1746 | if (bytes > 4*8) |
3933e0e1 MM |
1747 | return 0; |
1748 | } | |
1749 | else if (!STRICT_ALIGNMENT) | |
1750 | { | |
1751 | if (bytes > 4*8) | |
1752 | return 0; | |
1753 | } | |
1754 | else if (bytes > 8*align) | |
7e69e155 MM |
1755 | return 0; |
1756 | ||
1757 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1758 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1759 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1760 | |
3933e0e1 | 1761 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1762 | { |
3933e0e1 | 1763 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1764 | { |
3933e0e1 MM |
1765 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1766 | && !fixed_regs[5] | |
1767 | && !fixed_regs[6] | |
1768 | && !fixed_regs[7] | |
1769 | && !fixed_regs[8] | |
1770 | && !fixed_regs[9] | |
1771 | && !fixed_regs[10] | |
1772 | && !fixed_regs[11] | |
1773 | && !fixed_regs[12]) | |
1774 | { | |
1775 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1776 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1777 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1778 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1779 | align_rtx)); |
3933e0e1 MM |
1780 | } |
1781 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1782 | && !fixed_regs[7] | |
1783 | && !fixed_regs[8] | |
1784 | && !fixed_regs[9] | |
1785 | && !fixed_regs[10] | |
1786 | && !fixed_regs[11] | |
1787 | && !fixed_regs[12]) | |
1788 | { | |
1789 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1790 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1791 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1792 | GEN_INT (move_bytes), |
4c64a852 | 1793 | align_rtx)); |
3933e0e1 MM |
1794 | } |
1795 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1796 | && !fixed_regs[9] | |
1797 | && !fixed_regs[10] | |
1798 | && !fixed_regs[11] | |
1799 | && !fixed_regs[12]) | |
1800 | { | |
1801 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1802 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1803 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1804 | GEN_INT (move_bytes), |
4c64a852 | 1805 | align_rtx)); |
3933e0e1 | 1806 | } |
d679bebf | 1807 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1808 | { /* move up to 8 bytes at a time */ |
1809 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1810 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1811 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1812 | GEN_INT (move_bytes), |
4c64a852 | 1813 | align_rtx)); |
3933e0e1 MM |
1814 | } |
1815 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1816 | { /* move 4 bytes */ | |
1817 | move_bytes = 4; | |
1818 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1819 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1820 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1821 | } |
1822 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1823 | { /* move 2 bytes */ | |
1824 | move_bytes = 2; | |
1825 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1826 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1827 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1828 | } |
1829 | else if (bytes == 1) /* move 1 byte */ | |
1830 | { | |
1831 | move_bytes = 1; | |
1832 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1833 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1834 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1835 | } |
1836 | else | |
1837 | { /* move up to 4 bytes at a time */ | |
1838 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1839 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1840 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1841 | GEN_INT (move_bytes), |
4c64a852 | 1842 | align_rtx)); |
3933e0e1 | 1843 | } |
4c64a852 | 1844 | |
015892ee RK |
1845 | if (bytes > move_bytes) |
1846 | { | |
1847 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1848 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1849 | } | |
4c64a852 | 1850 | } |
3933e0e1 MM |
1851 | } |
1852 | ||
1853 | else /* string instructions not available */ | |
1854 | { | |
1855 | num_reg = offset = 0; | |
1856 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1857 | { |
3933e0e1 MM |
1858 | /* Calculate the correct offset for src/dest */ |
1859 | if (offset == 0) | |
7e69e155 | 1860 | { |
3933e0e1 MM |
1861 | src_addr = src_reg; |
1862 | dest_addr = dest_reg; | |
1863 | } | |
1864 | else | |
1865 | { | |
39403d82 DE |
1866 | src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); |
1867 | dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); | |
3933e0e1 MM |
1868 | } |
1869 | ||
1870 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1871 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1872 | { | |
1873 | move_bytes = 8; | |
1874 | tmp_reg = gen_reg_rtx (DImode); | |
1875 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1876 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1877 | } | |
1878 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1879 | { |
1880 | move_bytes = 4; | |
1881 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1882 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1883 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1884 | } |
1885 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1886 | { | |
1887 | move_bytes = 2; | |
1888 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1889 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1890 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1891 | } |
1892 | else | |
1893 | { | |
1894 | move_bytes = 1; | |
1895 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1896 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1897 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1898 | } |
1899 | ||
1900 | if (num_reg >= MAX_MOVE_REG) | |
1901 | { | |
1902 | for (i = 0; i < num_reg; i++) | |
1903 | emit_insn (stores[i]); | |
1904 | num_reg = 0; | |
7e69e155 MM |
1905 | } |
1906 | } | |
3933e0e1 | 1907 | |
b6c9286a MM |
1908 | for (i = 0; i < num_reg; i++) |
1909 | emit_insn (stores[i]); | |
7e69e155 MM |
1910 | } |
1911 | ||
1912 | return 1; | |
1913 | } | |
1914 | ||
9878760c RK |
1915 | \f |
1916 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
1917 | PARALLEL and the first section will be tested. */ | |
1918 | ||
1919 | int | |
1920 | load_multiple_operation (op, mode) | |
1921 | rtx op; | |
296b8152 | 1922 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
1923 | { |
1924 | int count = XVECLEN (op, 0); | |
1925 | int dest_regno; | |
1926 | rtx src_addr; | |
1927 | int i; | |
1928 | ||
1929 | /* Perform a quick check so we don't blow up below. */ | |
1930 | if (count <= 1 | |
1931 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1932 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
1933 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
1934 | return 0; | |
1935 | ||
1936 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
1937 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
1938 | ||
1939 | for (i = 1; i < count; i++) | |
1940 | { | |
1941 | rtx elt = XVECEXP (op, 0, i); | |
1942 | ||
1943 | if (GET_CODE (elt) != SET | |
1944 | || GET_CODE (SET_DEST (elt)) != REG | |
1945 | || GET_MODE (SET_DEST (elt)) != SImode | |
1946 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
1947 | || GET_CODE (SET_SRC (elt)) != MEM | |
1948 | || GET_MODE (SET_SRC (elt)) != SImode | |
1949 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
1950 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
1951 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
1952 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
1953 | return 0; | |
1954 | } | |
1955 | ||
1956 | return 1; | |
1957 | } | |
1958 | ||
1959 | /* Similar, but tests for store multiple. Here, the second vector element | |
1960 | is a CLOBBER. It will be tested later. */ | |
1961 | ||
1962 | int | |
1963 | store_multiple_operation (op, mode) | |
1964 | rtx op; | |
296b8152 | 1965 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
1966 | { |
1967 | int count = XVECLEN (op, 0) - 1; | |
1968 | int src_regno; | |
1969 | rtx dest_addr; | |
1970 | int i; | |
1971 | ||
1972 | /* Perform a quick check so we don't blow up below. */ | |
1973 | if (count <= 1 | |
1974 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1975 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
1976 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
1977 | return 0; | |
1978 | ||
1979 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
1980 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
1981 | ||
1982 | for (i = 1; i < count; i++) | |
1983 | { | |
1984 | rtx elt = XVECEXP (op, 0, i + 1); | |
1985 | ||
1986 | if (GET_CODE (elt) != SET | |
1987 | || GET_CODE (SET_SRC (elt)) != REG | |
1988 | || GET_MODE (SET_SRC (elt)) != SImode | |
1989 | || REGNO (SET_SRC (elt)) != src_regno + i | |
1990 | || GET_CODE (SET_DEST (elt)) != MEM | |
1991 | || GET_MODE (SET_DEST (elt)) != SImode | |
1992 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
1993 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
1994 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
1995 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
1996 | return 0; | |
1997 | } | |
1998 | ||
1999 | return 1; | |
2000 | } | |
2001 | \f | |
2002 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2003 | We only check the opcode against the mode of the CC value here. */ | |
2004 | ||
2005 | int | |
2006 | branch_comparison_operator (op, mode) | |
2007 | register rtx op; | |
296b8152 | 2008 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2009 | { |
2010 | enum rtx_code code = GET_CODE (op); | |
2011 | enum machine_mode cc_mode; | |
2012 | ||
2013 | if (GET_RTX_CLASS (code) != '<') | |
2014 | return 0; | |
2015 | ||
2016 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2017 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2018 | return 0; | |
2019 | ||
2020 | if ((code == GT || code == LT || code == GE || code == LE) | |
2021 | && cc_mode == CCUNSmode) | |
2022 | return 0; | |
2023 | ||
2024 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2025 | && (cc_mode != CCUNSmode)) | |
2026 | return 0; | |
2027 | ||
2028 | return 1; | |
2029 | } | |
2030 | ||
2031 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2032 | We check the opcode against the mode of the CC value and disallow EQ or | |
2033 | NE comparisons for integers. */ | |
2034 | ||
2035 | int | |
2036 | scc_comparison_operator (op, mode) | |
2037 | register rtx op; | |
2038 | enum machine_mode mode; | |
2039 | { | |
2040 | enum rtx_code code = GET_CODE (op); | |
2041 | enum machine_mode cc_mode; | |
2042 | ||
2043 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2044 | return 0; | |
2045 | ||
2046 | if (GET_RTX_CLASS (code) != '<') | |
2047 | return 0; | |
2048 | ||
2049 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2050 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2051 | return 0; | |
2052 | ||
2053 | if (code == NE && cc_mode != CCFPmode) | |
2054 | return 0; | |
2055 | ||
2056 | if ((code == GT || code == LT || code == GE || code == LE) | |
2057 | && cc_mode == CCUNSmode) | |
2058 | return 0; | |
2059 | ||
2060 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2061 | && (cc_mode != CCUNSmode)) | |
2062 | return 0; | |
2063 | ||
c5defebb RK |
2064 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2065 | return 0; | |
2066 | ||
9878760c RK |
2067 | return 1; |
2068 | } | |
e0cd0770 JC |
2069 | |
2070 | int | |
2071 | trap_comparison_operator (op, mode) | |
2072 | rtx op; | |
2073 | enum machine_mode mode; | |
2074 | { | |
2075 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2076 | return 0; | |
2077 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2078 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2079 | } | |
9878760c RK |
2080 | \f |
2081 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2082 | mask required to convert the result of a rotate insn into a shift | |
2083 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2084 | ||
2085 | int | |
2086 | includes_lshift_p (shiftop, andop) | |
2087 | register rtx shiftop; | |
2088 | register rtx andop; | |
2089 | { | |
2090 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2091 | ||
2092 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2093 | } | |
2094 | ||
2095 | /* Similar, but for right shift. */ | |
2096 | ||
2097 | int | |
2098 | includes_rshift_p (shiftop, andop) | |
2099 | register rtx shiftop; | |
2100 | register rtx andop; | |
2101 | { | |
a7653a2c | 2102 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2103 | |
2104 | shift_mask >>= INTVAL (shiftop); | |
2105 | ||
2106 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2107 | } | |
35068b43 RK |
2108 | |
2109 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2110 | for lfq and stfq insns. | |
2111 | ||
2112 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2113 | abort if we are passed pseudo registers. */ | |
2114 | ||
2115 | int | |
2116 | registers_ok_for_quad_peep (reg1, reg2) | |
2117 | rtx reg1, reg2; | |
2118 | { | |
2119 | /* We might have been passed a SUBREG. */ | |
2120 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2121 | return 0; | |
2122 | ||
2123 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2124 | } | |
2125 | ||
2126 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2127 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2128 | ||
2129 | int | |
2130 | addrs_ok_for_quad_peep (addr1, addr2) | |
2131 | register rtx addr1; | |
2132 | register rtx addr2; | |
2133 | { | |
2134 | int reg1; | |
2135 | int offset1; | |
2136 | ||
2137 | /* Extract an offset (if used) from the first addr. */ | |
2138 | if (GET_CODE (addr1) == PLUS) | |
2139 | { | |
2140 | /* If not a REG, return zero. */ | |
2141 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2142 | return 0; | |
2143 | else | |
2144 | { | |
2145 | reg1 = REGNO (XEXP (addr1, 0)); | |
2146 | /* The offset must be constant! */ | |
2147 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2148 | return 0; | |
2149 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2150 | } | |
2151 | } | |
2152 | else if (GET_CODE (addr1) != REG) | |
2153 | return 0; | |
2154 | else | |
2155 | { | |
2156 | reg1 = REGNO (addr1); | |
2157 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2158 | offset1 = 0; | |
2159 | } | |
2160 | ||
2161 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2162 | if (GET_CODE (addr2) != PLUS) | |
2163 | return 0; | |
2164 | ||
2165 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2166 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2167 | return 0; | |
2168 | ||
2169 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2170 | return 0; | |
2171 | ||
2172 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2173 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2174 | return 0; | |
2175 | ||
2176 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2177 | instructions. */ | |
2178 | return 1; | |
2179 | } | |
9878760c RK |
2180 | \f |
2181 | /* Return the register class of a scratch register needed to copy IN into | |
2182 | or out of a register in CLASS in MODE. If it can be done directly, | |
2183 | NO_REGS is returned. */ | |
2184 | ||
2185 | enum reg_class | |
2186 | secondary_reload_class (class, mode, in) | |
2187 | enum reg_class class; | |
296b8152 | 2188 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2189 | rtx in; |
2190 | { | |
2191 | int regno = true_regnum (in); | |
2192 | ||
2193 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2194 | regno = -1; | |
2195 | ||
1427100a | 2196 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2197 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2198 | is needed as an intermediate register. */ | |
2199 | if (TARGET_ELF | |
2200 | && class != BASE_REGS | |
2201 | && (GET_CODE (in) == SYMBOL_REF | |
2202 | || GET_CODE (in) == LABEL_REF | |
2203 | || GET_CODE (in) == CONST)) | |
2204 | return BASE_REGS; | |
2205 | ||
9878760c RK |
2206 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2207 | into anything. */ | |
2208 | if (class == GENERAL_REGS || class == BASE_REGS | |
2209 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2210 | return NO_REGS; | |
2211 | ||
2212 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2213 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2214 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2215 | return NO_REGS; | |
2216 | ||
2217 | /* We can copy among the CR registers. */ | |
2218 | if ((class == CR_REGS || class == CR0_REGS) | |
2219 | && regno >= 0 && CR_REGNO_P (regno)) | |
2220 | return NO_REGS; | |
2221 | ||
2222 | /* Otherwise, we need GENERAL_REGS. */ | |
2223 | return GENERAL_REGS; | |
2224 | } | |
2225 | \f | |
2226 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2227 | know this is a valid comparison. | |
2228 | ||
2229 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2230 | used instead of %C, so the bits will be in different places. | |
2231 | ||
b4ac57ab | 2232 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2233 | |
2234 | int | |
2235 | ccr_bit (op, scc_p) | |
2236 | register rtx op; | |
2237 | int scc_p; | |
2238 | { | |
2239 | enum rtx_code code = GET_CODE (op); | |
2240 | enum machine_mode cc_mode; | |
2241 | int cc_regnum; | |
2242 | int base_bit; | |
2243 | ||
2244 | if (GET_RTX_CLASS (code) != '<') | |
2245 | return -1; | |
2246 | ||
2247 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2248 | cc_regnum = REGNO (XEXP (op, 0)); | |
2249 | base_bit = 4 * (cc_regnum - 68); | |
2250 | ||
c5defebb RK |
2251 | /* In CCEQmode cases we have made sure that the result is always in the |
2252 | third bit of the CR field. */ | |
2253 | ||
2254 | if (cc_mode == CCEQmode) | |
2255 | return base_bit + 3; | |
2256 | ||
9878760c RK |
2257 | switch (code) |
2258 | { | |
2259 | case NE: | |
2260 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2261 | case EQ: | |
2262 | return base_bit + 2; | |
2263 | case GT: case GTU: | |
2264 | return base_bit + 1; | |
2265 | case LT: case LTU: | |
2266 | return base_bit; | |
2267 | ||
2268 | case GE: case GEU: | |
2269 | /* If floating-point, we will have done a cror to put the bit in the | |
2270 | unordered position. So test that bit. For integer, this is ! LT | |
2271 | unless this is an scc insn. */ | |
2272 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2273 | ||
2274 | case LE: case LEU: | |
2275 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2276 | ||
2277 | default: | |
2278 | abort (); | |
2279 | } | |
2280 | } | |
1ff7789b MM |
2281 | \f |
2282 | /* Return the GOT register, creating it if needed. */ | |
2283 | ||
2284 | struct rtx_def * | |
2285 | rs6000_got_register (value) | |
2286 | rtx value; | |
2287 | { | |
da39823a | 2288 | if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx) |
1ff7789b MM |
2289 | { |
2290 | if (reload_in_progress || reload_completed) | |
2291 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); | |
2292 | ||
2293 | current_function_uses_pic_offset_table = 1; | |
39403d82 | 2294 | pic_offset_table_rtx = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
1ff7789b MM |
2295 | } |
2296 | ||
2297 | return pic_offset_table_rtx; | |
2298 | } | |
2299 | ||
2300 | \f | |
956d6950 | 2301 | /* Replace all occurrences of register FROM with an new pseudo register in an insn X. |
1ff7789b MM |
2302 | Store the pseudo register used in REG. |
2303 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2304 | yet. */ | |
2305 | ||
2306 | static rtx | |
2307 | rs6000_replace_regno (x, from, reg) | |
2308 | rtx x; | |
2309 | int from; | |
2310 | rtx *reg; | |
2311 | { | |
2312 | register int i, j; | |
2313 | register char *fmt; | |
2314 | ||
2315 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2316 | if (!x) | |
2317 | return x; | |
2318 | ||
2319 | switch (GET_CODE (x)) | |
2320 | { | |
2321 | case SCRATCH: | |
2322 | case PC: | |
2323 | case CC0: | |
2324 | case CONST_INT: | |
2325 | case CONST_DOUBLE: | |
2326 | case CONST: | |
2327 | case SYMBOL_REF: | |
2328 | case LABEL_REF: | |
2329 | return x; | |
2330 | ||
2331 | case REG: | |
2332 | if (REGNO (x) == from) | |
2333 | { | |
2334 | if (! *reg) | |
84f414bc | 2335 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2336 | |
2337 | return *reg; | |
2338 | } | |
2339 | ||
2340 | return x; | |
c4d38ccb MM |
2341 | |
2342 | default: | |
2343 | break; | |
1ff7789b MM |
2344 | } |
2345 | ||
2346 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2347 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2348 | { | |
2349 | if (fmt[i] == 'e') | |
2350 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2351 | else if (fmt[i] == 'E') | |
2352 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2353 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2354 | } | |
2355 | ||
2356 | return x; | |
2357 | } | |
2358 | ||
d266da75 MM |
2359 | \f |
2360 | /* By generating position-independent code, when two different | |
2361 | programs (A and B) share a common library (libC.a), the text of | |
2362 | the library can be shared whether or not the library is linked at | |
2363 | the same address for both programs. In some of these | |
2364 | environments, position-independent code requires not only the use | |
2365 | of different addressing modes, but also special code to enable the | |
2366 | use of these addressing modes. | |
2367 | ||
2368 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2369 | codes once the function is being compiled into assembly code, but | |
2370 | not before. (It is not done before, because in the case of | |
2371 | compiling an inline function, it would lead to multiple PIC | |
2372 | prologues being included in functions which used inline functions | |
2373 | and were compiled to assembly language.) */ | |
2374 | ||
2375 | void | |
2376 | rs6000_finalize_pic () | |
2377 | { | |
30ea98f1 | 2378 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
956d6950 | 2379 | with an appropriate pseudo register. If we find we need GOT/TOC, |
30ea98f1 MM |
2380 | add the appropriate init code. */ |
2381 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2382 | { |
30ea98f1 MM |
2383 | rtx insn = get_insns (); |
2384 | rtx reg = NULL_RTX; | |
2385 | rtx first_insn; | |
38c1f2d7 | 2386 | rtx last_insn = NULL_RTX; |
d266da75 | 2387 | |
30ea98f1 MM |
2388 | if (GET_CODE (insn) == NOTE) |
2389 | insn = next_nonnote_insn (insn); | |
d266da75 | 2390 | |
30ea98f1 MM |
2391 | first_insn = insn; |
2392 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2393 | { | |
2394 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2395 | { |
30ea98f1 MM |
2396 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2397 | GOT_TOC_REGNUM, | |
2398 | ®); | |
2399 | ||
2400 | if (REG_NOTES (insn)) | |
2401 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2402 | GOT_TOC_REGNUM, |
2403 | ®); | |
1ff7789b | 2404 | } |
38c1f2d7 MM |
2405 | |
2406 | if (GET_CODE (insn) != NOTE) | |
2407 | last_insn = insn; | |
30ea98f1 | 2408 | } |
1ff7789b | 2409 | |
30ea98f1 MM |
2410 | if (reg) |
2411 | { | |
2412 | rtx init = gen_init_v4_pic (reg); | |
2413 | emit_insn_before (init, first_insn); | |
38c1f2d7 | 2414 | if (!optimize && last_insn) |
39403d82 | 2415 | emit_insn_after (gen_rtx_USE (VOIDmode, reg), last_insn); |
d266da75 MM |
2416 | } |
2417 | } | |
2418 | } | |
2419 | ||
30ea98f1 | 2420 | \f |
956d6950 | 2421 | /* Search for any occurrence of the GOT_TOC register marker that should |
30ea98f1 MM |
2422 | have been eliminated, but may have crept back in. */ |
2423 | ||
2424 | void | |
2425 | rs6000_reorg (insn) | |
2426 | rtx insn; | |
2427 | { | |
2428 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2429 | { | |
39403d82 | 2430 | rtx got_reg = gen_rtx_REG (Pmode, GOT_TOC_REGNUM); |
30ea98f1 MM |
2431 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2432 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2433 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2434 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2435 | } | |
2436 | } | |
2437 | ||
a7df97e6 MM |
2438 | \f |
2439 | /* Define the structure for the machine field in struct function. */ | |
2440 | struct machine_function | |
2441 | { | |
2442 | int sysv_varargs_p; | |
2443 | int save_toc_p; | |
2444 | int fpmem_size; | |
2445 | int fpmem_offset; | |
a04232e5 | 2446 | rtx pic_offset_table_rtx; |
a7df97e6 MM |
2447 | }; |
2448 | ||
2449 | /* Functions to save and restore rs6000_fpmem_size. | |
2450 | These will be called, via pointer variables, | |
2451 | from push_function_context and pop_function_context. */ | |
2452 | ||
2453 | void | |
2454 | rs6000_save_machine_status (p) | |
2455 | struct function *p; | |
2456 | { | |
2457 | struct machine_function *machine = | |
2458 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2459 | ||
2460 | p->machine = machine; | |
2461 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2462 | machine->fpmem_size = rs6000_fpmem_size; |
2463 | machine->fpmem_offset = rs6000_fpmem_offset; | |
a04232e5 | 2464 | machine->pic_offset_table_rtx = pic_offset_table_rtx; |
a7df97e6 MM |
2465 | } |
2466 | ||
2467 | void | |
2468 | rs6000_restore_machine_status (p) | |
2469 | struct function *p; | |
2470 | { | |
2471 | struct machine_function *machine = p->machine; | |
2472 | ||
2473 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2474 | rs6000_fpmem_size = machine->fpmem_size; |
2475 | rs6000_fpmem_offset = machine->fpmem_offset; | |
a04232e5 | 2476 | pic_offset_table_rtx = machine->pic_offset_table_rtx; |
a7df97e6 MM |
2477 | |
2478 | free (machine); | |
2479 | p->machine = (struct machine_function *)0; | |
2480 | } | |
2481 | ||
2482 | /* Do anything needed before RTL is emitted for each function. */ | |
2483 | ||
2484 | void | |
2485 | rs6000_init_expanders () | |
2486 | { | |
2487 | /* Reset varargs and save TOC indicator */ | |
2488 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2489 | rs6000_fpmem_size = 0; |
2490 | rs6000_fpmem_offset = 0; | |
2491 | pic_offset_table_rtx = (rtx)0; | |
2492 | ||
2493 | /* Arrange to save and restore machine status around nested functions. */ | |
2494 | save_machine_status = rs6000_save_machine_status; | |
2495 | restore_machine_status = rs6000_restore_machine_status; | |
2496 | } | |
2497 | ||
9878760c RK |
2498 | \f |
2499 | /* Print an operand. Recognize special options, documented below. */ | |
2500 | ||
38c1f2d7 | 2501 | #if TARGET_ELF |
d9407988 | 2502 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2503 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2504 | #else |
2505 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2506 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2507 | #endif |
2508 | ||
9878760c RK |
2509 | void |
2510 | print_operand (file, x, code) | |
2511 | FILE *file; | |
2512 | rtx x; | |
2513 | char code; | |
2514 | { | |
2515 | int i; | |
a260abc9 | 2516 | HOST_WIDE_INT val; |
9878760c RK |
2517 | |
2518 | /* These macros test for integers and extract the low-order bits. */ | |
2519 | #define INT_P(X) \ | |
2520 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2521 | && GET_MODE (X) == VOIDmode) | |
2522 | ||
2523 | #define INT_LOWPART(X) \ | |
2524 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2525 | ||
2526 | switch (code) | |
2527 | { | |
a8b3aeda | 2528 | case '.': |
a85d226b RK |
2529 | /* Write out an instruction after the call which may be replaced |
2530 | with glue code by the loader. This depends on the AIX version. */ | |
2531 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2532 | return; |
2533 | ||
cfaaaf2e RK |
2534 | case '*': |
2535 | /* Write the register number of the TOC register. */ | |
4697a36c | 2536 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2537 | return; |
2538 | ||
c81bebd7 MM |
2539 | case '$': |
2540 | /* Write out either a '.' or '$' for the current location, depending | |
2541 | on whether this is Solaris or not. */ | |
2542 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2543 | return; | |
2544 | ||
9854d9ed RK |
2545 | case 'A': |
2546 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2547 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2548 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2549 | write a trash instruction. */ |
2550 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2551 | putc ('l', file); |
9854d9ed | 2552 | else |
76229ac8 | 2553 | putc ('r', file); |
9854d9ed RK |
2554 | return; |
2555 | ||
2556 | case 'b': | |
2557 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2558 | if (! INT_P (x)) |
9854d9ed | 2559 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2560 | |
9854d9ed | 2561 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2562 | return; |
2563 | ||
a260abc9 DE |
2564 | case 'B': |
2565 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2566 | for 64-bit mask direction. */ | |
296b8152 | 2567 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2568 | return; |
a260abc9 | 2569 | |
9854d9ed RK |
2570 | case 'C': |
2571 | /* This is an optional cror needed for LE or GE floating-point | |
2572 | comparisons. Otherwise write nothing. */ | |
2573 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2574 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2575 | { | |
2576 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2577 | ||
2578 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2579 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2580 | } | |
2581 | return; | |
2582 | ||
2583 | case 'D': | |
2584 | /* Similar, except that this is for an scc, so we must be able to | |
2585 | encode the test in a single bit that is one. We do the above | |
2586 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2587 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2588 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2589 | { | |
2590 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2591 | ||
2592 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2593 | base_bit + 2, | |
2594 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2595 | } | |
2596 | ||
2597 | else if (GET_CODE (x) == NE) | |
2598 | { | |
2599 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2600 | ||
2601 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2602 | base_bit + 2, base_bit + 2); | |
2603 | } | |
2604 | return; | |
2605 | ||
2606 | case 'E': | |
2607 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2608 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2609 | output_operand_lossage ("invalid %%E value"); | |
2610 | ||
2611 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2612 | return; |
9854d9ed RK |
2613 | |
2614 | case 'f': | |
2615 | /* X is a CR register. Print the shift count needed to move it | |
2616 | to the high-order four bits. */ | |
2617 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2618 | output_operand_lossage ("invalid %%f value"); | |
2619 | else | |
2620 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2621 | return; | |
2622 | ||
2623 | case 'F': | |
2624 | /* Similar, but print the count for the rotate in the opposite | |
2625 | direction. */ | |
2626 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2627 | output_operand_lossage ("invalid %%F value"); | |
2628 | else | |
2629 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2630 | return; | |
2631 | ||
2632 | case 'G': | |
2633 | /* X is a constant integer. If it is negative, print "m", | |
2634 | otherwise print "z". This is to make a aze or ame insn. */ | |
2635 | if (GET_CODE (x) != CONST_INT) | |
2636 | output_operand_lossage ("invalid %%G value"); | |
2637 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2638 | putc ('z', file); |
9854d9ed | 2639 | else |
76229ac8 | 2640 | putc ('m', file); |
9854d9ed RK |
2641 | return; |
2642 | ||
9878760c | 2643 | case 'h': |
df3d94ed RK |
2644 | /* If constant, output low-order five bits. Otherwise, |
2645 | write normally. */ | |
9878760c RK |
2646 | if (INT_P (x)) |
2647 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2648 | else | |
2649 | print_operand (file, x, 0); | |
2650 | return; | |
2651 | ||
64305719 DE |
2652 | case 'H': |
2653 | /* If constant, output low-order six bits. Otherwise, | |
2654 | write normally. */ | |
2655 | if (INT_P (x)) | |
2656 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2657 | else | |
2658 | print_operand (file, x, 0); | |
2659 | return; | |
2660 | ||
9854d9ed RK |
2661 | case 'I': |
2662 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2663 | if (INT_P (x)) |
76229ac8 | 2664 | putc ('i', file); |
9878760c RK |
2665 | return; |
2666 | ||
9854d9ed RK |
2667 | case 'j': |
2668 | /* Write the bit number in CCR for jump. */ | |
2669 | i = ccr_bit (x, 0); | |
2670 | if (i == -1) | |
2671 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2672 | else |
9854d9ed | 2673 | fprintf (file, "%d", i); |
9878760c RK |
2674 | return; |
2675 | ||
9854d9ed RK |
2676 | case 'J': |
2677 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2678 | scc flag to `ccr_bit'. */ | |
2679 | i = ccr_bit (x, 1); | |
2680 | if (i == -1) | |
2681 | output_operand_lossage ("invalid %%J code"); | |
2682 | else | |
a0466a68 RK |
2683 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2684 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2685 | return; |
2686 | ||
9854d9ed RK |
2687 | case 'k': |
2688 | /* X must be a constant. Write the 1's complement of the | |
2689 | constant. */ | |
9878760c | 2690 | if (! INT_P (x)) |
9854d9ed | 2691 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2692 | |
9854d9ed | 2693 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2694 | return; |
2695 | ||
9854d9ed RK |
2696 | case 'L': |
2697 | /* Write second word of DImode or DFmode reference. Works on register | |
2698 | or non-indexed memory only. */ | |
2699 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2700 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2701 | else if (GET_CODE (x) == MEM) |
2702 | { | |
2703 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 2704 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
2705 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2706 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
1427100a DE |
2707 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), |
2708 | UNITS_PER_WORD)); | |
9854d9ed | 2709 | else |
1427100a | 2710 | output_address (plus_constant (XEXP (x, 0), UNITS_PER_WORD)); |
ba5e43aa | 2711 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2712 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2713 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2714 | } |
9878760c | 2715 | return; |
9854d9ed | 2716 | |
9878760c RK |
2717 | case 'm': |
2718 | /* MB value for a mask operand. */ | |
2719 | if (! mask_operand (x, VOIDmode)) | |
2720 | output_operand_lossage ("invalid %%m value"); | |
2721 | ||
2722 | val = INT_LOWPART (x); | |
2723 | ||
2724 | /* If the high bit is set and the low bit is not, the value is zero. | |
2725 | If the high bit is zero, the value is the first 1 bit we find from | |
2726 | the left. */ | |
2727 | if (val < 0 && (val & 1) == 0) | |
2728 | { | |
19d2d16f | 2729 | putc ('0', file); |
9878760c RK |
2730 | return; |
2731 | } | |
2732 | else if (val >= 0) | |
2733 | { | |
2734 | for (i = 1; i < 32; i++) | |
2735 | if ((val <<= 1) < 0) | |
2736 | break; | |
2737 | fprintf (file, "%d", i); | |
2738 | return; | |
2739 | } | |
2740 | ||
2741 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2742 | number plus 1. We know the low-order bit is one. */ | |
2743 | for (i = 0; i < 32; i++) | |
2744 | if (((val >>= 1) & 1) == 0) | |
2745 | break; | |
2746 | ||
a260abc9 | 2747 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
2748 | we want 31 - i. */ |
2749 | fprintf (file, "%d", 31 - i); | |
2750 | return; | |
2751 | ||
2752 | case 'M': | |
2753 | /* ME value for a mask operand. */ | |
2754 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 2755 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
2756 | |
2757 | val = INT_LOWPART (x); | |
2758 | ||
2759 | /* If the low bit is set and the high bit is not, the value is 31. | |
2760 | If the low bit is zero, the value is the first 1 bit we find from | |
2761 | the right. */ | |
2762 | if ((val & 1) && val >= 0) | |
2763 | { | |
76229ac8 | 2764 | fputs ("31", file); |
9878760c RK |
2765 | return; |
2766 | } | |
2767 | else if ((val & 1) == 0) | |
2768 | { | |
2769 | for (i = 0; i < 32; i++) | |
2770 | if ((val >>= 1) & 1) | |
2771 | break; | |
2772 | ||
a260abc9 | 2773 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
2774 | 30, so we need 30 - i. */ |
2775 | fprintf (file, "%d", 30 - i); | |
2776 | return; | |
2777 | } | |
2778 | ||
2779 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2780 | number minus 1. We know the high-order bit is one. */ | |
2781 | for (i = 0; i < 32; i++) | |
2782 | if ((val <<= 1) >= 0) | |
2783 | break; | |
2784 | ||
2785 | fprintf (file, "%d", i); | |
2786 | return; | |
2787 | ||
9878760c RK |
2788 | case 'N': |
2789 | /* Write the number of elements in the vector times 4. */ | |
2790 | if (GET_CODE (x) != PARALLEL) | |
2791 | output_operand_lossage ("invalid %%N value"); | |
2792 | ||
2793 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2794 | return; | |
2795 | ||
2796 | case 'O': | |
2797 | /* Similar, but subtract 1 first. */ | |
2798 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 2799 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
2800 | |
2801 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2802 | return; | |
2803 | ||
9854d9ed RK |
2804 | case 'p': |
2805 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2806 | if (! INT_P (x) | |
2807 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2808 | output_operand_lossage ("invalid %%p value"); | |
2809 | ||
2810 | fprintf (file, "%d", i); | |
2811 | return; | |
2812 | ||
9878760c RK |
2813 | case 'P': |
2814 | /* The operand must be an indirect memory reference. The result | |
2815 | is the register number. */ | |
2816 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2817 | || REGNO (XEXP (x, 0)) >= 32) | |
2818 | output_operand_lossage ("invalid %%P value"); | |
2819 | ||
2820 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2821 | return; | |
2822 | ||
9854d9ed RK |
2823 | case 'R': |
2824 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2825 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2826 | output_operand_lossage ("invalid %%R value"); | |
2827 | else | |
2828 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2829 | return; |
9854d9ed RK |
2830 | |
2831 | case 's': | |
2832 | /* Low 5 bits of 32 - value */ | |
2833 | if (! INT_P (x)) | |
2834 | output_operand_lossage ("invalid %%s value"); | |
2835 | ||
2836 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2837 | return; |
9854d9ed | 2838 | |
a260abc9 DE |
2839 | case 'S': |
2840 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
2841 | CONST_INT 32-bit mask is considered sign-extended so any | |
2842 | transition must occur within the CONST_INT, not on the boundary. */ | |
2843 | if (! mask64_operand (x, VOIDmode)) | |
2844 | output_operand_lossage ("invalid %%S value"); | |
2845 | ||
2846 | val = INT_LOWPART (x); | |
2847 | ||
2848 | if (val & 1) /* Clear Left */ | |
2849 | { | |
a238cd8b DE |
2850 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2851 | if (!((val >>= 1) & 1)) | |
2852 | break; | |
a260abc9 | 2853 | |
a238cd8b DE |
2854 | #if HOST_BITS_PER_WIDE_INT == 32 |
2855 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
2856 | { | |
2857 | val = CONST_DOUBLE_HIGH (x); | |
2858 | ||
2859 | if (val == 0) | |
2860 | --i; | |
2861 | else | |
2862 | for (i = 32; i < 64; i++) | |
2863 | if (!((val >>= 1) & 1)) | |
2864 | break; | |
2865 | } | |
a260abc9 | 2866 | #endif |
a238cd8b DE |
2867 | /* i = index of last set bit from right |
2868 | mask begins at 63 - i from left */ | |
2869 | if (i > 63) | |
2870 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
2871 | fprintf (file, "%d", 63 - i); |
2872 | return; | |
2873 | } | |
2874 | else /* Clear Right */ | |
2875 | { | |
a238cd8b DE |
2876 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2877 | if ((val >>= 1) & 1) | |
2878 | break; | |
a260abc9 | 2879 | |
a238cd8b | 2880 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
2881 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
2882 | { | |
a238cd8b | 2883 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 2884 | |
a238cd8b | 2885 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 2886 | --i; |
a260abc9 | 2887 | else |
a238cd8b DE |
2888 | for (i = 32; i < 64; i++) |
2889 | if ((val >>= 1) & 1) | |
a260abc9 DE |
2890 | break; |
2891 | } | |
2892 | #endif | |
a238cd8b DE |
2893 | /* i = index of last clear bit from right |
2894 | mask ends at 62 - i from left */ | |
2895 | if (i > 62) | |
2896 | output_operand_lossage ("%%S computed all 0's mask"); | |
2897 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
2898 | return; |
2899 | } | |
2900 | ||
9878760c RK |
2901 | case 't': |
2902 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2903 | All floating-point operations except NE branch true and integer | |
2904 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2905 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2906 | output_operand_lossage ("invalid %%t value"); | |
2907 | ||
2908 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2909 | && GET_CODE (x) != NE) | |
2910 | || GET_CODE (x) == EQ | |
2911 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2912 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2913 | fputs ("12", file); |
9878760c | 2914 | else |
76229ac8 | 2915 | putc ('4', file); |
9878760c RK |
2916 | return; |
2917 | ||
2918 | case 'T': | |
2919 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2920 | 12 otherwise. */ | |
2921 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 2922 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
2923 | |
2924 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2925 | && GET_CODE (x) != NE) | |
2926 | || GET_CODE (x) == EQ | |
2927 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2928 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2929 | putc ('4', file); |
9878760c | 2930 | else |
76229ac8 | 2931 | fputs ("12", file); |
9878760c RK |
2932 | return; |
2933 | ||
9854d9ed | 2934 | case 'u': |
802a0058 | 2935 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
2936 | if (! INT_P (x)) |
2937 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 2938 | |
76229ac8 | 2939 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
2940 | return; |
2941 | ||
802a0058 MM |
2942 | case 'v': |
2943 | /* High-order 16 bits of constant for use in signed operand. */ | |
2944 | if (! INT_P (x)) | |
2945 | output_operand_lossage ("invalid %%v value"); | |
2946 | ||
2947 | { | |
2948 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
2949 | ||
2950 | /* Solaris assembler doesn't like lis 0,0x80000 */ | |
2951 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) | |
2952 | fprintf (file, "%d", value | (~0 << 16)); | |
2953 | else | |
2954 | fprintf (file, "0x%x", value); | |
2955 | return; | |
2956 | } | |
2957 | ||
9854d9ed RK |
2958 | case 'U': |
2959 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
2960 | if (GET_CODE (x) == MEM | |
2961 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2962 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 2963 | putc ('u', file); |
9854d9ed | 2964 | return; |
9878760c | 2965 | |
e0cd0770 JC |
2966 | case 'V': |
2967 | /* Print the trap code for this operand. */ | |
2968 | switch (GET_CODE (x)) | |
2969 | { | |
2970 | case EQ: | |
2971 | fputs ("eq", file); /* 4 */ | |
2972 | break; | |
2973 | case NE: | |
2974 | fputs ("ne", file); /* 24 */ | |
2975 | break; | |
2976 | case LT: | |
2977 | fputs ("lt", file); /* 16 */ | |
2978 | break; | |
2979 | case LE: | |
2980 | fputs ("le", file); /* 20 */ | |
2981 | break; | |
2982 | case GT: | |
2983 | fputs ("gt", file); /* 8 */ | |
2984 | break; | |
2985 | case GE: | |
2986 | fputs ("ge", file); /* 12 */ | |
2987 | break; | |
2988 | case LTU: | |
2989 | fputs ("llt", file); /* 2 */ | |
2990 | break; | |
2991 | case LEU: | |
2992 | fputs ("lle", file); /* 6 */ | |
2993 | break; | |
2994 | case GTU: | |
2995 | fputs ("lgt", file); /* 1 */ | |
2996 | break; | |
2997 | case GEU: | |
2998 | fputs ("lge", file); /* 5 */ | |
2999 | break; | |
3000 | default: | |
3001 | abort (); | |
3002 | } | |
3003 | break; | |
3004 | ||
9854d9ed RK |
3005 | case 'w': |
3006 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3007 | normally. */ | |
3008 | if (INT_P (x)) | |
3009 | fprintf (file, "%d", | |
3010 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
3011 | else | |
3012 | print_operand (file, x, 0); | |
9878760c RK |
3013 | return; |
3014 | ||
9854d9ed RK |
3015 | case 'W': |
3016 | /* If constant, low-order 16 bits of constant, unsigned. | |
3017 | Otherwise, write normally. */ | |
3018 | if (INT_P (x)) | |
3019 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
3020 | else | |
3021 | print_operand (file, x, 0); | |
3022 | return; | |
9878760c | 3023 | |
9854d9ed RK |
3024 | case 'X': |
3025 | if (GET_CODE (x) == MEM | |
3026 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3027 | putc ('x', file); |
9854d9ed | 3028 | return; |
9878760c | 3029 | |
9854d9ed RK |
3030 | case 'Y': |
3031 | /* Like 'L', for third word of TImode */ | |
3032 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3033 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3034 | else if (GET_CODE (x) == MEM) |
9878760c | 3035 | { |
9854d9ed RK |
3036 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3037 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3038 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3039 | else |
a54d04b7 | 3040 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3041 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3042 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3043 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3044 | } |
3045 | return; | |
9854d9ed | 3046 | |
9878760c | 3047 | case 'z': |
b4ac57ab RS |
3048 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3049 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3050 | names. If we are configured for System V (or the embedded ABI) on |
3051 | the PowerPC, do not emit the period, since those systems do not use | |
3052 | TOCs and the like. */ | |
9878760c RK |
3053 | if (GET_CODE (x) != SYMBOL_REF) |
3054 | abort (); | |
3055 | ||
b6c9286a MM |
3056 | if (XSTR (x, 0)[0] != '.') |
3057 | { | |
3058 | switch (DEFAULT_ABI) | |
3059 | { | |
3060 | default: | |
3061 | abort (); | |
3062 | ||
3063 | case ABI_AIX: | |
3064 | putc ('.', file); | |
3065 | break; | |
3066 | ||
3067 | case ABI_V4: | |
3068 | case ABI_AIX_NODESC: | |
c81bebd7 | 3069 | case ABI_SOLARIS: |
b6c9286a MM |
3070 | break; |
3071 | ||
3072 | case ABI_NT: | |
3073 | fputs ("..", file); | |
3074 | break; | |
3075 | } | |
3076 | } | |
9878760c RK |
3077 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3078 | return; | |
3079 | ||
9854d9ed RK |
3080 | case 'Z': |
3081 | /* Like 'L', for last word of TImode. */ | |
3082 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3083 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3084 | else if (GET_CODE (x) == MEM) |
3085 | { | |
3086 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3087 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3088 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3089 | else |
a54d04b7 | 3090 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3091 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3092 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3093 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3094 | } |
5c23c401 | 3095 | return; |
9854d9ed | 3096 | |
9878760c RK |
3097 | case 0: |
3098 | if (GET_CODE (x) == REG) | |
3099 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3100 | else if (GET_CODE (x) == MEM) | |
3101 | { | |
3102 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3103 | know the width from the mode. */ | |
3104 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3105 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3106 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3107 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3108 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3109 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3110 | else | |
a54d04b7 | 3111 | output_address (XEXP (x, 0)); |
9878760c RK |
3112 | } |
3113 | else | |
a54d04b7 | 3114 | output_addr_const (file, x); |
a85d226b | 3115 | return; |
9878760c RK |
3116 | |
3117 | default: | |
3118 | output_operand_lossage ("invalid %%xn code"); | |
3119 | } | |
3120 | } | |
3121 | \f | |
3122 | /* Print the address of an operand. */ | |
3123 | ||
3124 | void | |
3125 | print_operand_address (file, x) | |
3126 | FILE *file; | |
3127 | register rtx x; | |
3128 | { | |
3129 | if (GET_CODE (x) == REG) | |
4697a36c | 3130 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3131 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3132 | { |
3133 | output_addr_const (file, x); | |
ba5e43aa | 3134 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3135 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3136 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3137 | |
4697a36c | 3138 | #ifdef TARGET_NO_TOC |
7509c759 | 3139 | else if (TARGET_NO_TOC) |
4697a36c | 3140 | ; |
4697a36c | 3141 | #endif |
7509c759 | 3142 | else |
4697a36c | 3143 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
3144 | } |
3145 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3146 | { | |
3147 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3148 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3149 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3150 | else |
4697a36c MM |
3151 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3152 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3153 | } |
3154 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
3155 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
3156 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
3157 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
3158 | { | |
3159 | output_addr_const (file, XEXP (x, 1)); | |
3160 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3161 | } | |
9878760c RK |
3162 | else |
3163 | abort (); | |
3164 | } | |
3165 | \f | |
3166 | /* This page contains routines that are used to determine what the function | |
3167 | prologue and epilogue code will do and write them out. */ | |
3168 | ||
3169 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3170 | none. */ | |
3171 | ||
3172 | int | |
3173 | first_reg_to_save () | |
3174 | { | |
3175 | int first_reg; | |
3176 | ||
3177 | /* Find lowest numbered live register. */ | |
3178 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
3179 | if (regs_ever_live[first_reg]) | |
3180 | break; | |
3181 | ||
e165f3f0 | 3182 | /* If profiling, then we must save/restore every register that contains |
9c849d2a | 3183 | a parameter before/after the .__mcount call. Use registers from 30 down |
e165f3f0 RK |
3184 | to 23 to do this. Don't use the frame pointer in reg 31. |
3185 | ||
3186 | For now, save enough room for all of the parameter registers. */ | |
b6c9286a | 3187 | if (DEFAULT_ABI == ABI_AIX && profile_flag) |
e165f3f0 RK |
3188 | if (first_reg > 23) |
3189 | first_reg = 23; | |
3190 | ||
9878760c RK |
3191 | return first_reg; |
3192 | } | |
3193 | ||
3194 | /* Similar, for FP regs. */ | |
3195 | ||
3196 | int | |
3197 | first_fp_reg_to_save () | |
3198 | { | |
3199 | int first_reg; | |
3200 | ||
3201 | /* Find lowest numbered live register. */ | |
3202 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3203 | if (regs_ever_live[first_reg]) | |
3204 | break; | |
3205 | ||
3206 | return first_reg; | |
3207 | } | |
3208 | ||
9878760c RK |
3209 | /* Return non-zero if this function makes calls. */ |
3210 | ||
3211 | int | |
3212 | rs6000_makes_calls () | |
3213 | { | |
3214 | rtx insn; | |
3215 | ||
38c1f2d7 MM |
3216 | /* If we are profiling, we will be making a call to __mcount. |
3217 | Under the System V ABI's, we store the LR directly, so | |
3218 | we don't need to do it here. */ | |
3219 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3220 | return 1; |
3221 | ||
9878760c RK |
3222 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3223 | if (GET_CODE (insn) == CALL_INSN) | |
3224 | return 1; | |
3225 | ||
3226 | return 0; | |
3227 | } | |
3228 | ||
4697a36c MM |
3229 | \f |
3230 | /* Calculate the stack information for the current function. This is | |
3231 | complicated by having two separate calling sequences, the AIX calling | |
3232 | sequence and the V.4 calling sequence. | |
3233 | ||
3234 | AIX stack frames look like: | |
a260abc9 | 3235 | 32-bit 64-bit |
4697a36c | 3236 | SP----> +---------------------------------------+ |
a260abc9 | 3237 | | back chain to caller | 0 0 |
4697a36c | 3238 | +---------------------------------------+ |
a260abc9 | 3239 | | saved CR | 4 8 (8-11) |
4697a36c | 3240 | +---------------------------------------+ |
a260abc9 | 3241 | | saved LR | 8 16 |
4697a36c | 3242 | +---------------------------------------+ |
a260abc9 | 3243 | | reserved for compilers | 12 24 |
4697a36c | 3244 | +---------------------------------------+ |
a260abc9 | 3245 | | reserved for binders | 16 32 |
4697a36c | 3246 | +---------------------------------------+ |
a260abc9 | 3247 | | saved TOC pointer | 20 40 |
4697a36c | 3248 | +---------------------------------------+ |
a260abc9 | 3249 | | Parameter save area (P) | 24 48 |
4697a36c | 3250 | +---------------------------------------+ |
a260abc9 | 3251 | | Alloca space (A) | 24+P etc. |
802a0058 | 3252 | +---------------------------------------+ |
a7df97e6 | 3253 | | Local variable space (L) | 24+P+A |
4697a36c | 3254 | +---------------------------------------+ |
a7df97e6 | 3255 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3256 | +---------------------------------------+ |
a7df97e6 | 3257 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3258 | +---------------------------------------+ |
a7df97e6 | 3259 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3260 | +---------------------------------------+ |
3261 | old SP->| back chain to caller's caller | | |
3262 | +---------------------------------------+ | |
3263 | ||
3264 | V.4 stack frames look like: | |
3265 | ||
3266 | SP----> +---------------------------------------+ | |
3267 | | back chain to caller | 0 | |
3268 | +---------------------------------------+ | |
5eb387b8 | 3269 | | caller's saved LR | 4 |
4697a36c MM |
3270 | +---------------------------------------+ |
3271 | | Parameter save area (P) | 8 | |
3272 | +---------------------------------------+ | |
a7df97e6 MM |
3273 | | Alloca space (A) | 8+P |
3274 | +---------------------------------------+ | |
3275 | | Varargs save area (V) | 8+P+A | |
3276 | +---------------------------------------+ | |
3277 | | Local variable space (L) | 8+P+A+V | |
3278 | +---------------------------------------+ | |
3279 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3280 | +---------------------------------------+ |
a7df97e6 MM |
3281 | | saved CR (C) | 8+P+A+V+L+X |
3282 | +---------------------------------------+ | |
3283 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3284 | +---------------------------------------+ | |
3285 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3286 | +---------------------------------------+ |
3287 | old SP->| back chain to caller's caller | | |
3288 | +---------------------------------------+ | |
b6c9286a MM |
3289 | |
3290 | ||
3291 | A PowerPC Windows/NT frame looks like: | |
3292 | ||
3293 | SP----> +---------------------------------------+ | |
3294 | | back chain to caller | 0 | |
3295 | +---------------------------------------+ | |
3296 | | reserved | 4 | |
3297 | +---------------------------------------+ | |
3298 | | reserved | 8 | |
3299 | +---------------------------------------+ | |
3300 | | reserved | 12 | |
3301 | +---------------------------------------+ | |
3302 | | reserved | 16 | |
3303 | +---------------------------------------+ | |
3304 | | reserved | 20 | |
3305 | +---------------------------------------+ | |
3306 | | Parameter save area (P) | 24 | |
3307 | +---------------------------------------+ | |
a7df97e6 MM |
3308 | | Alloca space (A) | 24+P |
3309 | +---------------------------------------+ | |
3310 | | Local variable space (L) | 24+P+A | |
3311 | +---------------------------------------+ | |
3312 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3313 | +---------------------------------------+ |
a7df97e6 MM |
3314 | | Save area for FP registers (F) | 24+P+A+L+X |
3315 | +---------------------------------------+ | |
3316 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3317 | +---------------------------------------+ | |
3318 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3319 | +---------------------------------------+ | |
3320 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3321 | +---------------------------------------+ | |
3322 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3323 | +---------------------------------------+ | |
3324 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3325 | +---------------------------------------+ |
3326 | old SP->| back chain to caller's caller | | |
3327 | +---------------------------------------+ | |
3328 | ||
3329 | For NT, there is no specific order to save the registers, but in | |
3330 | order to support __builtin_return_address, the save area for the | |
3331 | link register needs to be in a known place, so we use -4 off of the | |
3332 | old SP. To support calls through pointers, we also allocate a | |
3333 | fixed slot to store the TOC, -8 off the old SP. */ | |
4697a36c | 3334 | |
61b2fbe7 MM |
3335 | #ifndef ABI_STACK_BOUNDARY |
3336 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3337 | #endif | |
3338 | ||
4697a36c MM |
3339 | rs6000_stack_t * |
3340 | rs6000_stack_info () | |
3341 | { | |
3342 | static rs6000_stack_t info, zero_info; | |
3343 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3344 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3345 | enum rs6000_abi abi; |
b6c9286a | 3346 | int total_raw_size; |
4697a36c MM |
3347 | |
3348 | /* Zero all fields portably */ | |
3349 | info = zero_info; | |
3350 | ||
3351 | /* Select which calling sequence */ | |
b6c9286a | 3352 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3353 | |
4697a36c MM |
3354 | /* Calculate which registers need to be saved & save area size */ |
3355 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3356 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3357 | ||
3358 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3359 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3360 | ||
3361 | /* Does this function call anything? */ | |
3362 | info_ptr->calls_p = rs6000_makes_calls (); | |
3363 | ||
62c0fb87 | 3364 | /* Allocate space to save the toc. */ |
82280d5e | 3365 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3366 | { |
3367 | info_ptr->toc_save_p = 1; | |
3368 | info_ptr->toc_size = reg_size; | |
3369 | } | |
3370 | ||
802a0058 MM |
3371 | /* Does this machine need the float/int conversion area? */ |
3372 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3373 | ||
b6c9286a MM |
3374 | /* If this is main and we need to call a function to set things up, |
3375 | save main's arguments around the call. */ | |
c81bebd7 MM |
3376 | #ifdef TARGET_EABI |
3377 | if (TARGET_EABI) | |
3378 | #endif | |
b6c9286a | 3379 | { |
30ccf55d MS |
3380 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3381 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3382 | { |
c81bebd7 | 3383 | info_ptr->main_p = 1; |
b6c9286a | 3384 | |
c81bebd7 MM |
3385 | #ifdef NAME__MAIN |
3386 | info_ptr->calls_p = 1; | |
b6c9286a | 3387 | |
c81bebd7 | 3388 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3389 | { |
c81bebd7 MM |
3390 | int i; |
3391 | tree arg; | |
3392 | ||
3393 | info_ptr->main_save_p = 1; | |
3394 | info_ptr->main_size = 0; | |
3395 | ||
3396 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3397 | arg != NULL_TREE && i < 8; | |
3398 | (arg = TREE_CHAIN (arg)), i++) | |
3399 | { | |
3400 | info_ptr->main_size += reg_size; | |
3401 | } | |
b6c9286a | 3402 | } |
b6c9286a | 3403 | #endif |
c81bebd7 | 3404 | } |
b6c9286a MM |
3405 | } |
3406 | ||
c81bebd7 | 3407 | |
4697a36c | 3408 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3409 | if (regs_ever_live[65] |
3410 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3411 | #ifdef TARGET_RELOCATABLE |
3412 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3413 | #endif | |
3414 | || (info_ptr->first_fp_reg_save != 64 | |
3415 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3416 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3417 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3418 | || info_ptr->calls_p) |
3419 | { | |
3420 | info_ptr->lr_save_p = 1; | |
3421 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3422 | if (abi == ABI_NT) |
3423 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3424 | } |
3425 | ||
3426 | /* Determine if we need to save the condition code registers */ | |
3427 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3428 | { | |
3429 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3430 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3431 | info_ptr->cr_size = reg_size; |
3432 | } | |
3433 | ||
92834d7d BM |
3434 | /* Ensure that fp_save_offset will be aligned to an 8-byte boundary. */ |
3435 | if (info_ptr->fpmem_p) | |
3436 | { | |
3437 | info_ptr->gp_size = RS6000_ALIGN (info_ptr->gp_size, 8); | |
3438 | info_ptr->main_size = RS6000_ALIGN (info_ptr->main_size, 8); | |
3439 | } | |
3440 | ||
4697a36c MM |
3441 | /* Determine various sizes */ |
3442 | info_ptr->reg_size = reg_size; | |
3443 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3444 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3445 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3446 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3447 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3448 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3449 | + info_ptr->gp_size |
3450 | + info_ptr->cr_size | |
3451 | + info_ptr->lr_size | |
3452 | + info_ptr->toc_size | |
3453 | + info_ptr->main_size, 8); | |
3454 | ||
3455 | total_raw_size = (info_ptr->vars_size | |
3456 | + info_ptr->parm_size | |
802a0058 | 3457 | + info_ptr->fpmem_size |
b6c9286a MM |
3458 | + info_ptr->save_size |
3459 | + info_ptr->varargs_size | |
3460 | + info_ptr->fixed_size); | |
3461 | ||
189e03e3 | 3462 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); |
4697a36c | 3463 | |
db72d7a1 DE |
3464 | /* Determine if we need to allocate any stack frame: |
3465 | ||
3466 | For AIX we need to push the stack if a frame pointer is needed (because | |
3467 | the stack might be dynamically adjusted), if we are debugging, if we | |
3468 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3469 | are more than the space needed to save all non-volatile registers: | |
3470 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 19*8 = 296 | |
4697a36c MM |
3471 | |
3472 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3473 | the debugger can handle stackless frames. */ | |
3474 | ||
3475 | if (info_ptr->calls_p) | |
3476 | info_ptr->push_p = 1; | |
3477 | ||
c81bebd7 | 3478 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
b6c9286a | 3479 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size |
1a986152 GK |
3480 | || (abi == ABI_NT ? info_ptr->lr_save_p |
3481 | : info_ptr->calls_p)); | |
4697a36c MM |
3482 | |
3483 | else | |
3484 | info_ptr->push_p = (frame_pointer_needed | |
3485 | || write_symbols != NO_DEBUG | |
a260abc9 | 3486 | || ((total_raw_size - info_ptr->fixed_size) |
db72d7a1 | 3487 | > (TARGET_32BIT ? 220 : 296))); |
4697a36c MM |
3488 | |
3489 | /* Calculate the offsets */ | |
24d304eb | 3490 | switch (abi) |
4697a36c | 3491 | { |
b6c9286a | 3492 | case ABI_NONE: |
24d304eb | 3493 | default: |
b6c9286a MM |
3494 | abort (); |
3495 | ||
3496 | case ABI_AIX: | |
3497 | case ABI_AIX_NODESC: | |
3498 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3499 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3500 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3501 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3502 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3503 | break; |
3504 | ||
3505 | case ABI_V4: | |
c81bebd7 | 3506 | case ABI_SOLARIS: |
b6c9286a MM |
3507 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3508 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3509 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3510 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3511 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3512 | info_ptr->lr_save_offset = reg_size; |
3513 | break; | |
3514 | ||
3515 | case ABI_NT: | |
a260abc9 | 3516 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3517 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3518 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3519 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3520 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3521 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3522 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3523 | |
3524 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3525 | break; |
4697a36c MM |
3526 | } |
3527 | ||
a7df97e6 | 3528 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3529 | { |
3530 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3531 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3532 | rs6000_fpmem_offset = (info_ptr->push_p |
3533 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3534 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3535 | } |
3536 | else | |
3537 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3538 | |
4697a36c | 3539 | /* Zero offsets if we're not saving those registers */ |
a6c2a102 | 3540 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3541 | info_ptr->fp_save_offset = 0; |
3542 | ||
a6c2a102 | 3543 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3544 | info_ptr->gp_save_offset = 0; |
3545 | ||
3546 | if (!info_ptr->lr_save_p) | |
3547 | info_ptr->lr_save_offset = 0; | |
3548 | ||
3549 | if (!info_ptr->cr_save_p) | |
3550 | info_ptr->cr_save_offset = 0; | |
3551 | ||
b6c9286a MM |
3552 | if (!info_ptr->toc_save_p) |
3553 | info_ptr->toc_save_offset = 0; | |
3554 | ||
3555 | if (!info_ptr->main_save_p) | |
3556 | info_ptr->main_save_offset = 0; | |
3557 | ||
4697a36c MM |
3558 | return info_ptr; |
3559 | } | |
3560 | ||
3561 | void | |
3562 | debug_stack_info (info) | |
3563 | rs6000_stack_t *info; | |
9878760c | 3564 | { |
24d304eb RK |
3565 | char *abi_string; |
3566 | ||
4697a36c MM |
3567 | if (!info) |
3568 | info = rs6000_stack_info (); | |
3569 | ||
3570 | fprintf (stderr, "\nStack information for function %s:\n", | |
3571 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3572 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3573 | : "<unknown>")); | |
3574 | ||
24d304eb RK |
3575 | switch (info->abi) |
3576 | { | |
b6c9286a MM |
3577 | default: abi_string = "Unknown"; break; |
3578 | case ABI_NONE: abi_string = "NONE"; break; | |
3579 | case ABI_AIX: abi_string = "AIX"; break; | |
3580 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3581 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3582 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3583 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3584 | } |
3585 | ||
3586 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3587 | ||
4697a36c MM |
3588 | if (info->first_gp_reg_save != 32) |
3589 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3590 | ||
3591 | if (info->first_fp_reg_save != 64) | |
3592 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3593 | |
4697a36c MM |
3594 | if (info->lr_save_p) |
3595 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3596 | |
4697a36c MM |
3597 | if (info->cr_save_p) |
3598 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3599 | ||
b6c9286a MM |
3600 | if (info->toc_save_p) |
3601 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3602 | ||
4697a36c MM |
3603 | if (info->push_p) |
3604 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3605 | ||
3606 | if (info->calls_p) | |
3607 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3608 | ||
b6c9286a MM |
3609 | if (info->main_p) |
3610 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3611 | ||
3612 | if (info->main_save_p) | |
3613 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3614 | ||
802a0058 MM |
3615 | if (info->fpmem_p) |
3616 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3617 | ||
4697a36c MM |
3618 | if (info->gp_save_offset) |
3619 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3620 | ||
3621 | if (info->fp_save_offset) | |
3622 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3623 | ||
3624 | if (info->lr_save_offset) | |
3625 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3626 | ||
3627 | if (info->cr_save_offset) | |
3628 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3629 | ||
b6c9286a MM |
3630 | if (info->toc_save_offset) |
3631 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3632 | ||
4697a36c MM |
3633 | if (info->varargs_save_offset) |
3634 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3635 | ||
b6c9286a MM |
3636 | if (info->main_save_offset) |
3637 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3638 | ||
802a0058 MM |
3639 | if (info->fpmem_offset) |
3640 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3641 | ||
4697a36c MM |
3642 | if (info->total_size) |
3643 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3644 | ||
3645 | if (info->varargs_size) | |
3646 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3647 | ||
3648 | if (info->vars_size) | |
3649 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3650 | ||
3651 | if (info->parm_size) | |
3652 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3653 | ||
802a0058 MM |
3654 | if (info->fpmem_size) |
3655 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3656 | ||
4697a36c MM |
3657 | if (info->fixed_size) |
3658 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3659 | ||
3660 | if (info->gp_size) | |
3661 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3662 | ||
3663 | if (info->fp_size) | |
3664 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3665 | ||
b6c9286a MM |
3666 | if (info->lr_size) |
3667 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3668 | ||
4697a36c MM |
3669 | if (info->cr_size) |
3670 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3671 | ||
b6c9286a MM |
3672 | if (info->toc_size) |
3673 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3674 | ||
3675 | if (info->main_size) | |
3676 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3677 | ||
4697a36c MM |
3678 | if (info->save_size) |
3679 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3680 | ||
3681 | if (info->reg_size != 4) | |
3682 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3683 | ||
3684 | fprintf (stderr, "\n"); | |
9878760c | 3685 | } |
4697a36c | 3686 | \f |
c7ca610e RK |
3687 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3688 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3689 | a constant pool. */ | |
3690 | ||
3691 | void | |
38c1f2d7 | 3692 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3693 | FILE *file; |
38c1f2d7 | 3694 | int reg; |
c7ca610e RK |
3695 | { |
3696 | char buf[256]; | |
3697 | ||
3698 | #ifdef USING_SVR4_H | |
3699 | if (TARGET_RELOCATABLE) | |
3700 | { | |
3701 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3702 | fprintf (file, "\tbl "); | |
3703 | assemble_name (file, buf); | |
3704 | fprintf (file, "\n"); | |
3705 | ||
38c1f2d7 MM |
3706 | /* possibly create the toc section */ |
3707 | if (!toc_initialized) | |
3708 | { | |
3709 | toc_section (); | |
3710 | function_section (current_function_decl); | |
3711 | } | |
3712 | ||
3713 | /* If not first call in this function, we need to put the | |
3714 | different between .LCTOC1 and the address we get to right | |
3715 | after the bl. It will mess up disassembling the instructions | |
3716 | but that can't be helped. We will later need to bias the | |
3717 | address before loading. */ | |
3718 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3719 | { | |
a260abc9 | 3720 | char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
38c1f2d7 MM |
3721 | char *buf_ptr; |
3722 | ||
3723 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3724 | ||
3725 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3726 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3727 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3728 | ||
3729 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3730 | fprintf (file, "%s\n", buf_ptr); | |
3731 | } | |
3732 | ||
c7ca610e | 3733 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3734 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3735 | ||
3736 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
3737 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
3738 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 3739 | |
a260abc9 DE |
3740 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
3741 | reg_names[0]); | |
38c1f2d7 | 3742 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 3743 | assemble_name (file, buf); |
a260abc9 | 3744 | fputs ("-", file); |
c7ca610e RK |
3745 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3746 | assemble_name (file, buf); | |
38c1f2d7 | 3747 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3748 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3749 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3750 | rs6000_pic_labelno++; |
3751 | } | |
3752 | else if (!TARGET_64BIT) | |
3753 | { | |
3754 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 3755 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 3756 | assemble_name (file, buf); |
dfdfa60f | 3757 | fputs ("@ha\n", file); |
a260abc9 DE |
3758 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
3759 | assemble_name (file, buf); | |
3760 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
3761 | } |
3762 | else | |
3763 | abort (); | |
3764 | ||
3765 | #else /* !USING_SVR4_H */ | |
3766 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
3767 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
3768 | reg_names[reg]); | |
c7ca610e RK |
3769 | assemble_name (file, buf); |
3770 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3771 | #endif /* USING_SVR4_H */ | |
3772 | } | |
3773 | ||
38c1f2d7 MM |
3774 | \f |
3775 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3776 | of the old frame is left in r12. */ | |
3777 | ||
3778 | void | |
3779 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3780 | FILE *file; | |
3781 | int size; | |
3782 | int copy_r12; | |
3783 | { | |
3784 | int neg_size = -size; | |
3785 | if (TARGET_UPDATE) | |
3786 | { | |
3787 | if (size < 32767) | |
3788 | asm_fprintf (file, | |
3789 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3790 | reg_names[1], neg_size, reg_names[1]); | |
3791 | else | |
3792 | { | |
3793 | if (copy_r12) | |
3794 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3795 | ||
3796 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3797 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3798 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3799 | asm_fprintf (file, | |
3800 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3801 | reg_names[1], reg_names[1], reg_names[0]); | |
3802 | } | |
3803 | } | |
3804 | else | |
3805 | { | |
3806 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3807 | if (size < 32767) | |
aa4201ad | 3808 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 3809 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
3810 | else |
3811 | { | |
3812 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3813 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3814 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3815 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3816 | reg_names[0], reg_names[1]); | |
3817 | } | |
3818 | ||
3819 | asm_fprintf (file, | |
3820 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3821 | reg_names[12], reg_names[1]); | |
3822 | } | |
3823 | } | |
3824 | ||
3825 | \f | |
9878760c | 3826 | /* Write function prologue. */ |
9878760c RK |
3827 | void |
3828 | output_prolog (file, size) | |
3829 | FILE *file; | |
296b8152 | 3830 | int size ATTRIBUTE_UNUSED; |
9878760c | 3831 | { |
4697a36c | 3832 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a MM |
3833 | int reg_size = info->reg_size; |
3834 | char *store_reg; | |
3835 | char *load_reg; | |
979721f8 MM |
3836 | int sp_reg = 1; |
3837 | int sp_offset = 0; | |
b6c9286a | 3838 | |
8f802bfb | 3839 | if (TARGET_32BIT) |
b6c9286a | 3840 | { |
8f802bfb DE |
3841 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3842 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3843 | } |
3844 | else | |
3845 | { | |
8f802bfb DE |
3846 | store_reg = "\tstd %s,%d(%s)\n"; |
3847 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3848 | } |
9878760c | 3849 | |
4697a36c MM |
3850 | if (TARGET_DEBUG_STACK) |
3851 | debug_stack_info (info); | |
9878760c RK |
3852 | |
3853 | /* Write .extern for any function we will call to save and restore fp | |
3854 | values. */ | |
b6c9286a | 3855 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3856 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3857 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3858 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3859 | |
3860 | /* Write .extern for truncation routines, if needed. */ | |
3861 | if (rs6000_trunc_used && ! trunc_defined) | |
3862 | { | |
e138174b ILT |
3863 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3864 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3865 | trunc_defined = 1; |
3866 | } | |
4697a36c | 3867 | |
c764f757 RK |
3868 | /* Write .extern for AIX common mode routines, if needed. */ |
3869 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3870 | { | |
f6709c70 JW |
3871 | fputs ("\t.extern __mulh\n", file); |
3872 | fputs ("\t.extern __mull\n", file); | |
3873 | fputs ("\t.extern __divss\n", file); | |
3874 | fputs ("\t.extern __divus\n", file); | |
3875 | fputs ("\t.extern __quoss\n", file); | |
3876 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3877 | common_mode_defined = 1; |
3878 | } | |
9878760c | 3879 | |
979721f8 | 3880 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 3881 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
3882 | { |
3883 | if (info->total_size < 32767) | |
38c1f2d7 | 3884 | sp_offset = info->total_size; |
979721f8 | 3885 | else |
38c1f2d7 MM |
3886 | sp_reg = 12; |
3887 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
3888 | } |
3889 | ||
9878760c | 3890 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
3891 | if (info->lr_save_p) |
3892 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
3893 | |
3894 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 3895 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 3896 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
3897 | |
3898 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
3899 | ourself. Otherwise, call function. Note that since they are statically |
3900 | linked, we do not need a nop following them. */ | |
4697a36c | 3901 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 3902 | { |
4697a36c | 3903 | int regno = info->first_fp_reg_save; |
979721f8 | 3904 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3905 | |
3906 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3907 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 3908 | } |
4697a36c MM |
3909 | else if (info->first_fp_reg_save != 64) |
3910 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
3911 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
3912 | |
3913 | /* Now save gpr's. */ | |
4697a36c | 3914 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3915 | { |
4697a36c | 3916 | int regno = info->first_gp_reg_save; |
979721f8 | 3917 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 3918 | |
4697a36c | 3919 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3920 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3921 | } |
3922 | ||
4697a36c MM |
3923 | else if (info->first_gp_reg_save != 32) |
3924 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
3925 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3926 | info->gp_save_offset + sp_offset, |
3927 | reg_names[sp_reg]); | |
9878760c | 3928 | |
b6c9286a MM |
3929 | /* Save main's arguments if we need to call a function */ |
3930 | #ifdef NAME__MAIN | |
3931 | if (info->main_save_p) | |
3932 | { | |
3933 | int regno; | |
5ebfb2ba | 3934 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
3935 | int size = info->main_size; |
3936 | ||
2682eae9 | 3937 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 3938 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
3939 | } |
3940 | #endif | |
3941 | ||
9878760c | 3942 | /* Save lr if we used it. */ |
4697a36c | 3943 | if (info->lr_save_p) |
979721f8 MM |
3944 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
3945 | reg_names[sp_reg]); | |
9878760c RK |
3946 | |
3947 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 3948 | if (info->cr_save_p) |
979721f8 MM |
3949 | { |
3950 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
3951 | { | |
3952 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
3953 | asm_fprintf (file, store_reg, reg_names[0], | |
3954 | info->cr_save_offset + sp_offset, | |
3955 | reg_names[sp_reg]); | |
3956 | } | |
3957 | else | |
3958 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
3959 | reg_names[sp_reg]); | |
3960 | } | |
9878760c | 3961 | |
979721f8 MM |
3962 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
3963 | do it here. */ | |
3964 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
3965 | { | |
3966 | if (info->total_size < 32768) | |
3967 | { | |
3968 | int probe_offset = 4096; | |
3969 | while (probe_offset < info->total_size) | |
3970 | { | |
3971 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
3972 | probe_offset += 4096; | |
3973 | } | |
3974 | } | |
3975 | else | |
3976 | { | |
3977 | int probe_iterations = info->total_size / 4096; | |
3978 | static int probe_labelno = 0; | |
3979 | char buf[256]; | |
3980 | ||
3981 | if (probe_iterations < 32768) | |
3982 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
3983 | else | |
3984 | { | |
3985 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
3986 | if (probe_iterations & 0xffff) | |
3987 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
3988 | probe_iterations & 0xffff); | |
3989 | } | |
3990 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
3991 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3992 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
3993 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 3994 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
3995 | fputs ("\tbdnz ", file); |
3996 | assemble_name (file, buf); | |
3997 | fputs ("\n", file); | |
3998 | } | |
3999 | } | |
4000 | ||
38c1f2d7 | 4001 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4002 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4003 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4004 | |
4005 | /* Set frame pointer, if needed. */ | |
4006 | if (frame_pointer_needed) | |
4697a36c | 4007 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4008 | |
b6c9286a MM |
4009 | #ifdef NAME__MAIN |
4010 | /* If we need to call a function to set things up for main, do so now | |
4011 | before dealing with the TOC. */ | |
4012 | if (info->main_p) | |
4013 | { | |
4014 | char *prefix = ""; | |
4015 | ||
4016 | switch (DEFAULT_ABI) | |
4017 | { | |
4018 | case ABI_AIX: prefix = "."; break; | |
4019 | case ABI_NT: prefix = ".."; break; | |
4020 | } | |
4021 | ||
4022 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4023 | #ifdef RS6000_CALL_GLUE2 | |
4024 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4025 | #else | |
4026 | #ifdef RS6000_CALL_GLUE | |
4027 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
4028 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
4029 | #endif | |
4030 | #endif | |
4031 | ||
4032 | if (info->main_save_p) | |
4033 | { | |
4034 | int regno; | |
4035 | int loc; | |
4036 | int size = info->main_size; | |
4037 | ||
4038 | if (info->total_size < 32767) | |
4039 | { | |
4040 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4041 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4042 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4043 | } | |
4044 | else | |
5ebfb2ba MM |
4045 | { |
4046 | int neg_size = info->main_save_offset - info->total_size; | |
4047 | loc = 0; | |
4048 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
4049 | reg_names[0], (neg_size >> 16) & 0xffff, | |
4050 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4051 | |
b6c9286a MM |
4052 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4053 | reg_names[1]); | |
4054 | ||
2682eae9 | 4055 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4056 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4057 | } | |
4058 | } | |
4059 | } | |
4060 | #endif | |
4061 | ||
4062 | ||
1875cc88 JW |
4063 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4064 | TOC_TABLE address into register 30. */ | |
4697a36c | 4065 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4066 | { |
4067 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
4068 | if (!profile_flag) |
4069 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 4070 | #endif |
38c1f2d7 | 4071 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4072 | } |
4697a36c | 4073 | |
b6c9286a MM |
4074 | if (DEFAULT_ABI == ABI_NT) |
4075 | { | |
4076 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4077 | fputs (".b:\n", file); | |
3daf36a4 | 4078 | } |
9878760c RK |
4079 | } |
4080 | ||
4081 | /* Write function epilogue. */ | |
4082 | ||
4083 | void | |
4084 | output_epilog (file, size) | |
4085 | FILE *file; | |
296b8152 | 4086 | int size ATTRIBUTE_UNUSED; |
9878760c | 4087 | { |
4697a36c | 4088 | rs6000_stack_t *info = rs6000_stack_info (); |
8f802bfb | 4089 | char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4090 | rtx insn = get_last_insn (); |
979721f8 MM |
4091 | int sp_reg = 1; |
4092 | int sp_offset = 0; | |
9878760c | 4093 | |
9878760c RK |
4094 | /* If the last insn was a BARRIER, we don't have to write anything except |
4095 | the trace table. */ | |
4096 | if (GET_CODE (insn) == NOTE) | |
4097 | insn = prev_nonnote_insn (insn); | |
4098 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4099 | { | |
4100 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4101 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4102 | we know what size to update it with. */ | |
4103 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4104 | || info->total_size > 32767) |
979721f8 MM |
4105 | { |
4106 | /* Under V.4, don't reset the stack pointer until after we're done | |
4107 | loading the saved registers. */ | |
c81bebd7 | 4108 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4109 | sp_reg = 11; |
4110 | ||
4111 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4112 | } | |
4697a36c MM |
4113 | else if (info->push_p) |
4114 | { | |
c81bebd7 | 4115 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4116 | sp_offset = info->total_size; |
4697a36c | 4117 | else |
a260abc9 DE |
4118 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4119 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4120 | } |
9878760c | 4121 | |
b4ac57ab | 4122 | /* Get the old lr if we saved it. */ |
4697a36c | 4123 | if (info->lr_save_p) |
979721f8 | 4124 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4125 | |
4126 | /* Get the old cr if we saved it. */ | |
4697a36c | 4127 | if (info->cr_save_p) |
979721f8 | 4128 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4129 | |
b4ac57ab | 4130 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4131 | if (info->lr_save_p) |
4132 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4133 | |
9878760c | 4134 | /* Restore gpr's. */ |
4697a36c | 4135 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4136 | { |
4697a36c | 4137 | int regno = info->first_gp_reg_save; |
979721f8 | 4138 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4139 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4140 | |
4697a36c | 4141 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4142 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4143 | } |
4144 | ||
4697a36c MM |
4145 | else if (info->first_gp_reg_save != 32) |
4146 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4147 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4148 | info->gp_save_offset + sp_offset, |
4149 | reg_names[sp_reg]); | |
9878760c | 4150 | |
b4ac57ab | 4151 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4152 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4153 | { | |
4154 | int regno = info->first_fp_reg_save; | |
979721f8 | 4155 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4156 | |
4157 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4158 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4159 | } |
9878760c | 4160 | |
28edebac RK |
4161 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4162 | that were used. */ | |
4697a36c MM |
4163 | if (info->cr_save_p) |
4164 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4165 | (regs_ever_live[70] != 0) * 0x20 |
4166 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4167 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4168 | |
a6c2a102 DE |
4169 | /* If this is V.4, unwind the stack pointer after all of the loads |
4170 | have been done */ | |
4171 | if (sp_offset != 0) | |
a260abc9 DE |
4172 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4173 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4174 | else if (sp_reg != 1) |
4175 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4176 | ||
b4ac57ab RS |
4177 | /* If we have to restore more than two FP registers, branch to the |
4178 | restore function. It will return to our caller. */ | |
4697a36c MM |
4179 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4180 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4181 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4182 | else |
85638c0d | 4183 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4184 | } |
b4ac57ab | 4185 | |
9b30bae2 | 4186 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4187 | on its format. |
4188 | ||
4189 | We don't output a traceback table if -finhibit-size-directive was | |
4190 | used. The documentation for -finhibit-size-directive reads | |
4191 | ``don't output a @code{.size} assembler directive, or anything | |
4192 | else that would cause trouble if the function is split in the | |
4193 | middle, and the two halves are placed at locations far apart in | |
4194 | memory.'' The traceback table has this property, since it | |
4195 | includes the offset from the start of the function to the | |
4d30c363 MM |
4196 | traceback table itself. |
4197 | ||
4198 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4199 | different traceback table. */ |
4200 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4201 | { |
314fc5a9 ILT |
4202 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4203 | int fixed_parms, float_parms, parm_info; | |
4204 | int i; | |
4205 | ||
b6c9286a MM |
4206 | while (*fname == '.') /* V.4 encodes . in the name */ |
4207 | fname++; | |
4208 | ||
314fc5a9 ILT |
4209 | /* Need label immediately before tbtab, so we can compute its offset |
4210 | from the function start. */ | |
4211 | if (*fname == '*') | |
4212 | ++fname; | |
4213 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4214 | ASM_OUTPUT_LABEL (file, fname); | |
4215 | ||
4216 | /* The .tbtab pseudo-op can only be used for the first eight | |
4217 | expressions, since it can't handle the possibly variable | |
4218 | length fields that follow. However, if you omit the optional | |
4219 | fields, the assembler outputs zeros for all optional fields | |
4220 | anyways, giving each variable length field is minimum length | |
4221 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4222 | pseudo-op at all. */ | |
4223 | ||
4224 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4225 | that have to find it by searching forward from the entry | |
4226 | point or from the current pc. */ | |
19d2d16f | 4227 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4228 | |
4229 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4230 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4231 | |
4232 | /* Language type. Unfortunately, there doesn't seem to be any | |
4233 | official way to get this info, so we use language_string. C | |
4234 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
4235 | value for C for now. */ | |
4236 | if (! strcmp (language_string, "GNU C") | |
4237 | || ! strcmp (language_string, "GNU Obj-C")) | |
4238 | i = 0; | |
4239 | else if (! strcmp (language_string, "GNU F77")) | |
4240 | i = 1; | |
4241 | else if (! strcmp (language_string, "GNU Ada")) | |
4242 | i = 3; | |
8b83775b | 4243 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4244 | i = 2; |
4245 | else if (! strcmp (language_string, "GNU C++")) | |
4246 | i = 9; | |
4247 | else | |
4248 | abort (); | |
4249 | fprintf (file, "%d,", i); | |
4250 | ||
4251 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4252 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4253 | from start of procedure stored in tbtab, internal function, function | |
4254 | has controlled storage, function has no toc, function uses fp, | |
4255 | function logs/aborts fp operations. */ | |
4256 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4257 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4258 | |
4259 | /* 6 bitfields: function is interrupt handler, name present in | |
4260 | proc table, function calls alloca, on condition directives | |
4261 | (controls stack walks, 3 bits), saves condition reg, saves | |
4262 | link reg. */ | |
4263 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4264 | set up as a frame pointer, even when there is no alloca call. */ | |
4265 | fprintf (file, "%d,", | |
4266 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4267 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4268 | |
4269 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4270 | (6 bits). */ | |
4271 | fprintf (file, "%d,", | |
4697a36c | 4272 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4273 | |
4274 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4275 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4276 | ||
4277 | { | |
4278 | /* Compute the parameter info from the function decl argument | |
4279 | list. */ | |
4280 | tree decl; | |
4281 | int next_parm_info_bit; | |
4282 | ||
4283 | next_parm_info_bit = 31; | |
4284 | parm_info = 0; | |
4285 | fixed_parms = 0; | |
4286 | float_parms = 0; | |
4287 | ||
4288 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4289 | decl; decl = TREE_CHAIN (decl)) | |
4290 | { | |
4291 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4292 | enum machine_mode mode = GET_MODE (parameter); | |
4293 | ||
4294 | if (GET_CODE (parameter) == REG) | |
4295 | { | |
4296 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4297 | { | |
4298 | int bits; | |
4299 | ||
4300 | float_parms++; | |
4301 | ||
4302 | if (mode == SFmode) | |
4303 | bits = 0x2; | |
4304 | else if (mode == DFmode) | |
4305 | bits = 0x3; | |
4306 | else | |
4307 | abort (); | |
4308 | ||
4309 | /* If only one bit will fit, don't or in this entry. */ | |
4310 | if (next_parm_info_bit > 0) | |
4311 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4312 | next_parm_info_bit -= 2; | |
4313 | } | |
4314 | else | |
4315 | { | |
4316 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4317 | + (UNITS_PER_WORD - 1)) | |
4318 | / UNITS_PER_WORD); | |
4319 | next_parm_info_bit -= 1; | |
4320 | } | |
4321 | } | |
4322 | } | |
4323 | } | |
4324 | ||
4325 | /* Number of fixed point parameters. */ | |
4326 | /* This is actually the number of words of fixed point parameters; thus | |
4327 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4328 | fprintf (file, "%d,", fixed_parms); | |
4329 | ||
4330 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4331 | all on stack. */ | |
4332 | /* This is actually the number of fp registers that hold parameters; | |
4333 | and thus the maximum value is 13. */ | |
4334 | /* Set parameters on stack bit if parameters are not in their original | |
4335 | registers, regardless of whether they are on the stack? Xlc | |
4336 | seems to set the bit when not optimizing. */ | |
4337 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4338 | ||
4339 | /* Optional fields follow. Some are variable length. */ | |
4340 | ||
4341 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4342 | 11 double float. */ | |
4343 | /* There is an entry for each parameter in a register, in the order that | |
4344 | they occur in the parameter list. Any intervening arguments on the | |
4345 | stack are ignored. If the list overflows a long (max possible length | |
4346 | 34 bits) then completely leave off all elements that don't fit. */ | |
4347 | /* Only emit this long if there was at least one parameter. */ | |
4348 | if (fixed_parms || float_parms) | |
4349 | fprintf (file, "\t.long %d\n", parm_info); | |
4350 | ||
4351 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4352 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4353 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4354 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4355 | fputs ("-.", file); |
314fc5a9 | 4356 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4357 | putc ('\n', file); |
314fc5a9 ILT |
4358 | |
4359 | /* Interrupt handler mask. */ | |
4360 | /* Omit this long, since we never set the interrupt handler bit | |
4361 | above. */ | |
4362 | ||
4363 | /* Number of CTL (controlled storage) anchors. */ | |
4364 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4365 | ||
4366 | /* Displacement into stack of each CTL anchor. */ | |
4367 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4368 | ||
4369 | /* Length of function name. */ | |
296b8152 | 4370 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4371 | |
4372 | /* Function name. */ | |
4373 | assemble_string (fname, strlen (fname)); | |
4374 | ||
4375 | /* Register for alloca automatic storage; this is always reg 31. | |
4376 | Only emit this if the alloca bit was set above. */ | |
4377 | if (frame_pointer_needed) | |
19d2d16f | 4378 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4379 | } |
4697a36c | 4380 | |
b6c9286a MM |
4381 | if (DEFAULT_ABI == ABI_NT) |
4382 | { | |
4383 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4384 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4385 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4386 | fputs (":\n", file); | |
4387 | } | |
9878760c RK |
4388 | } |
4389 | \f | |
4390 | /* Output a TOC entry. We derive the entry name from what is | |
4391 | being written. */ | |
4392 | ||
4393 | void | |
4394 | output_toc (file, x, labelno) | |
4395 | FILE *file; | |
4396 | rtx x; | |
4397 | int labelno; | |
4398 | { | |
4399 | char buf[256]; | |
4400 | char *name = buf; | |
b6c9286a | 4401 | char *real_name; |
9878760c RK |
4402 | rtx base = x; |
4403 | int offset = 0; | |
4404 | ||
4697a36c MM |
4405 | if (TARGET_NO_TOC) |
4406 | abort (); | |
4407 | ||
ff1720ed RK |
4408 | /* if we're going to put a double constant in the TOC, make sure it's |
4409 | aligned properly when strict alignment is on. */ | |
4410 | if (GET_CODE (x) == CONST_DOUBLE | |
4411 | && STRICT_ALIGNMENT | |
4412 | && GET_MODE (x) == DFmode | |
4413 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4414 | ASM_OUTPUT_ALIGN (file, 3); | |
4415 | } | |
4416 | ||
4417 | ||
b6c9286a | 4418 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4419 | { |
4420 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4421 | fprintf (file, "%d = .-", labelno); | |
4422 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4423 | fputs ("1\n", file); |
d14a6d05 MM |
4424 | } |
4425 | else | |
d14a6d05 | 4426 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4427 | |
37c37a57 RK |
4428 | /* Handle FP constants specially. Note that if we have a minimal |
4429 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4430 | FP constants. */ | |
042259f2 | 4431 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4432 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4433 | { |
042259f2 DE |
4434 | REAL_VALUE_TYPE rv; |
4435 | long k[2]; | |
0adc764e | 4436 | |
042259f2 DE |
4437 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4438 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
13ded975 DE |
4439 | if (TARGET_64BIT) |
4440 | { | |
4441 | if (TARGET_MINIMAL_TOC) | |
4442 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
4443 | else | |
4444 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
4445 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
4446 | return; | |
4447 | } | |
1875cc88 | 4448 | else |
13ded975 DE |
4449 | { |
4450 | if (TARGET_MINIMAL_TOC) | |
4451 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); | |
4452 | else | |
4453 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", | |
4454 | k[0], k[1], k[0], k[1]); | |
4455 | return; | |
4456 | } | |
9878760c RK |
4457 | } |
4458 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4459 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4460 | { |
042259f2 DE |
4461 | REAL_VALUE_TYPE rv; |
4462 | long l; | |
9878760c | 4463 | |
042259f2 DE |
4464 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4465 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4466 | ||
4467 | if (TARGET_MINIMAL_TOC) | |
13ded975 | 4468 | fprintf (file, TARGET_32BIT ? "\t.long %ld\n" : "\t.llong %ld\n", l); |
042259f2 | 4469 | else |
1883e716 | 4470 | fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l); |
042259f2 DE |
4471 | return; |
4472 | } | |
4473 | else if (GET_MODE (x) == DImode | |
4474 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4475 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4476 | { | |
4477 | HOST_WIDE_INT low; | |
4478 | HOST_WIDE_INT high; | |
4479 | ||
4480 | if (GET_CODE (x) == CONST_DOUBLE) | |
4481 | { | |
4482 | low = CONST_DOUBLE_LOW (x); | |
4483 | high = CONST_DOUBLE_HIGH (x); | |
4484 | } | |
4485 | else | |
4486 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4487 | { | |
4488 | low = INTVAL (x); | |
4489 | high = (low < 0) ? ~0 : 0; | |
4490 | } | |
4491 | #else | |
4492 | { | |
4493 | low = INTVAL (x) & 0xffffffff; | |
4494 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4495 | } | |
4496 | #endif | |
9878760c | 4497 | |
13ded975 DE |
4498 | if (TARGET_64BIT) |
4499 | { | |
4500 | if (TARGET_MINIMAL_TOC) | |
4501 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
4502 | else | |
4503 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
4504 | (long)high, (long)low, (long)high, (long)low); | |
4505 | return; | |
4506 | } | |
1875cc88 | 4507 | else |
13ded975 DE |
4508 | { |
4509 | if (TARGET_MINIMAL_TOC) | |
4510 | fprintf (file, "\t.long %ld\n\t.long %ld\n", | |
4511 | (long)high, (long)low); | |
4512 | else | |
4513 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", | |
4514 | (long)high, (long)low, (long)high, (long)low); | |
4515 | return; | |
4516 | } | |
9878760c RK |
4517 | } |
4518 | ||
4519 | if (GET_CODE (x) == CONST) | |
4520 | { | |
4521 | base = XEXP (XEXP (x, 0), 0); | |
4522 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4523 | } | |
4524 | ||
4525 | if (GET_CODE (base) == SYMBOL_REF) | |
4526 | name = XSTR (base, 0); | |
4527 | else if (GET_CODE (base) == LABEL_REF) | |
4528 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4529 | else if (GET_CODE (base) == CODE_LABEL) | |
4530 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4531 | else | |
4532 | abort (); | |
4533 | ||
2e4eb9b0 | 4534 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4535 | if (TARGET_MINIMAL_TOC) |
13ded975 | 4536 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
4537 | else |
4538 | { | |
b6c9286a | 4539 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4540 | |
1875cc88 JW |
4541 | if (offset < 0) |
4542 | fprintf (file, ".N%d", - offset); | |
4543 | else if (offset) | |
4544 | fprintf (file, ".P%d", offset); | |
9878760c | 4545 | |
19d2d16f | 4546 | fputs ("[TC],", file); |
1875cc88 | 4547 | } |
581bc4de MM |
4548 | |
4549 | /* Currently C++ toc references to vtables can be emitted before it | |
4550 | is decided whether the vtable is public or private. If this is | |
4551 | the case, then the linker will eventually complain that there is | |
4552 | a TOC reference to an unknown section. Thus, for vtables only, | |
4553 | we emit the TOC reference to reference the symbol and not the | |
4554 | section. */ | |
3807773b | 4555 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4556 | { |
3807773b | 4557 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4558 | if (offset < 0) |
4559 | fprintf (file, "%d", offset); | |
4560 | else if (offset > 0) | |
4561 | fprintf (file, "+%d", offset); | |
4562 | } | |
4563 | else | |
4564 | output_addr_const (file, x); | |
19d2d16f | 4565 | putc ('\n', file); |
9878760c RK |
4566 | } |
4567 | \f | |
4568 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4569 | starting at P to FILE. | |
4570 | ||
4571 | On the RS/6000, we have to do this using the .byte operation and | |
4572 | write out special characters outside the quoted string. | |
4573 | Also, the assembler is broken; very long strings are truncated, | |
4574 | so we must artificially break them up early. */ | |
4575 | ||
4576 | void | |
4577 | output_ascii (file, p, n) | |
4578 | FILE *file; | |
4579 | char *p; | |
4580 | int n; | |
4581 | { | |
4582 | char c; | |
4583 | int i, count_string; | |
4584 | char *for_string = "\t.byte \""; | |
4585 | char *for_decimal = "\t.byte "; | |
4586 | char *to_close = NULL; | |
4587 | ||
4588 | count_string = 0; | |
4589 | for (i = 0; i < n; i++) | |
4590 | { | |
4591 | c = *p++; | |
4592 | if (c >= ' ' && c < 0177) | |
4593 | { | |
4594 | if (for_string) | |
4595 | fputs (for_string, file); | |
4596 | putc (c, file); | |
4597 | ||
4598 | /* Write two quotes to get one. */ | |
4599 | if (c == '"') | |
4600 | { | |
4601 | putc (c, file); | |
4602 | ++count_string; | |
4603 | } | |
4604 | ||
4605 | for_string = NULL; | |
4606 | for_decimal = "\"\n\t.byte "; | |
4607 | to_close = "\"\n"; | |
4608 | ++count_string; | |
4609 | ||
4610 | if (count_string >= 512) | |
4611 | { | |
4612 | fputs (to_close, file); | |
4613 | ||
4614 | for_string = "\t.byte \""; | |
4615 | for_decimal = "\t.byte "; | |
4616 | to_close = NULL; | |
4617 | count_string = 0; | |
4618 | } | |
4619 | } | |
4620 | else | |
4621 | { | |
4622 | if (for_decimal) | |
4623 | fputs (for_decimal, file); | |
4624 | fprintf (file, "%d", c); | |
4625 | ||
4626 | for_string = "\n\t.byte \""; | |
4627 | for_decimal = ", "; | |
4628 | to_close = "\n"; | |
4629 | count_string = 0; | |
4630 | } | |
4631 | } | |
4632 | ||
4633 | /* Now close the string if we have written one. Then end the line. */ | |
4634 | if (to_close) | |
4635 | fprintf (file, to_close); | |
4636 | } | |
4637 | \f | |
4638 | /* Generate a unique section name for FILENAME for a section type | |
4639 | represented by SECTION_DESC. Output goes into BUF. | |
4640 | ||
4641 | SECTION_DESC can be any string, as long as it is different for each | |
4642 | possible section type. | |
4643 | ||
4644 | We name the section in the same manner as xlc. The name begins with an | |
4645 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
4646 | names) with the last period replaced by the string SECTION_DESC. If |
4647 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
4648 | the name. */ | |
9878760c RK |
4649 | |
4650 | void | |
4651 | rs6000_gen_section_name (buf, filename, section_desc) | |
4652 | char **buf; | |
4653 | char *filename; | |
4654 | char *section_desc; | |
4655 | { | |
11e5fe42 | 4656 | char *q, *after_last_slash, *last_period; |
9878760c RK |
4657 | char *p; |
4658 | int len; | |
9878760c RK |
4659 | |
4660 | after_last_slash = filename; | |
4661 | for (q = filename; *q; q++) | |
11e5fe42 RK |
4662 | { |
4663 | if (*q == '/') | |
4664 | after_last_slash = q + 1; | |
4665 | else if (*q == '.') | |
4666 | last_period = q; | |
4667 | } | |
9878760c | 4668 | |
11e5fe42 | 4669 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
4670 | *buf = (char *) permalloc (len); |
4671 | ||
4672 | p = *buf; | |
4673 | *p++ = '_'; | |
4674 | ||
4675 | for (q = after_last_slash; *q; q++) | |
4676 | { | |
11e5fe42 | 4677 | if (q == last_period) |
9878760c RK |
4678 | { |
4679 | strcpy (p, section_desc); | |
4680 | p += strlen (section_desc); | |
9878760c RK |
4681 | } |
4682 | ||
e9a780ec | 4683 | else if (ISALNUM (*q)) |
9878760c RK |
4684 | *p++ = *q; |
4685 | } | |
4686 | ||
11e5fe42 | 4687 | if (last_period == 0) |
9878760c RK |
4688 | strcpy (p, section_desc); |
4689 | else | |
4690 | *p = '\0'; | |
4691 | } | |
e165f3f0 RK |
4692 | \f |
4693 | /* Write function profiler code. */ | |
4694 | ||
4695 | void | |
4696 | output_function_profiler (file, labelno) | |
4697 | FILE *file; | |
4698 | int labelno; | |
4699 | { | |
4700 | /* The last used parameter register. */ | |
4701 | int last_parm_reg; | |
4702 | int i, j; | |
3daf36a4 | 4703 | char buf[100]; |
e165f3f0 | 4704 | |
3daf36a4 | 4705 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 4706 | switch (DEFAULT_ABI) |
3daf36a4 | 4707 | { |
38c1f2d7 MM |
4708 | default: |
4709 | abort (); | |
4710 | ||
4711 | case ABI_V4: | |
4712 | case ABI_SOLARIS: | |
4713 | case ABI_AIX_NODESC: | |
4714 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
4715 | if (flag_pic == 1) | |
4716 | { | |
dfdfa60f DE |
4717 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
4718 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
4719 | reg_names[0], reg_names[1]); | |
4720 | asm_fprintf (file, "\tmflr %s\n", reg_names[11]); | |
4721 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); | |
38c1f2d7 | 4722 | assemble_name (file, buf); |
dfdfa60f | 4723 | asm_fprintf (file, "@got(%s)\n", reg_names[11]); |
38c1f2d7 MM |
4724 | } |
4725 | #if TARGET_ELF | |
4726 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4727 | { | |
dfdfa60f DE |
4728 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
4729 | reg_names[0], reg_names[1]); | |
38c1f2d7 MM |
4730 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
4731 | rs6000_output_load_toc_table (file, 11); | |
dfdfa60f | 4732 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[11]); |
38c1f2d7 | 4733 | assemble_name (file, buf); |
dfdfa60f DE |
4734 | asm_fprintf (file, "X(%s)\n", reg_names[11]); |
4735 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); | |
034e84c4 | 4736 | assemble_name (file, buf); |
dfdfa60f DE |
4737 | fputs ("X = .-.LCTOC1\n", file); |
4738 | fputs ("\t.long ", file); | |
034e84c4 MM |
4739 | assemble_name (file, buf); |
4740 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
4741 | } |
4742 | #endif | |
38c1f2d7 MM |
4743 | else |
4744 | { | |
a260abc9 | 4745 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[11]); |
38c1f2d7 | 4746 | assemble_name (file, buf); |
dfdfa60f | 4747 | fputs ("@ha\n", file); |
a260abc9 DE |
4748 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", reg_names[0], reg_names[1]); |
4749 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); | |
38c1f2d7 | 4750 | assemble_name (file, buf); |
a260abc9 | 4751 | asm_fprintf (file, "@l(%s)\n", reg_names[11]); |
38c1f2d7 MM |
4752 | } |
4753 | ||
4754 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); | |
4755 | break; | |
4756 | ||
4757 | case ABI_AIX: | |
4758 | /* Set up a TOC entry for the profiler label. */ | |
4759 | toc_section (); | |
4760 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
4761 | if (TARGET_MINIMAL_TOC) | |
4762 | { | |
13ded975 | 4763 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
4764 | assemble_name (file, buf); |
4765 | putc ('\n', file); | |
4766 | } | |
4767 | else | |
4768 | { | |
4769 | fputs ("\t.tc\t", file); | |
4770 | assemble_name (file, buf); | |
4771 | fputs ("[TC],", file); | |
4772 | assemble_name (file, buf); | |
4773 | putc ('\n', file); | |
4774 | } | |
4775 | text_section (); | |
e165f3f0 RK |
4776 | |
4777 | /* Figure out last used parameter register. The proper thing to do is | |
4778 | to walk incoming args of the function. A function might have live | |
4779 | parameter registers even if it has no incoming args. */ | |
4780 | ||
38c1f2d7 MM |
4781 | for (last_parm_reg = 10; |
4782 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
4783 | last_parm_reg--) | |
4784 | ; | |
e165f3f0 RK |
4785 | |
4786 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
4787 | it might be set up as the frame pointer. */ | |
4788 | ||
38c1f2d7 MM |
4789 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
4790 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
e165f3f0 RK |
4791 | |
4792 | /* Load location address into r3, and call mcount. */ | |
4793 | ||
38c1f2d7 | 4794 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
4795 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
4796 | reg_names[3]); | |
38c1f2d7 | 4797 | assemble_name (file, buf); |
a260abc9 DE |
4798 | asm_fprintf (file, "(%s)\n\tbl %s\n\t%s\n", |
4799 | reg_names[2], RS6000_MCOUNT, RS6000_CALL_GLUE); | |
e165f3f0 RK |
4800 | |
4801 | /* Restore parameter registers. */ | |
4802 | ||
38c1f2d7 MM |
4803 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
4804 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
4805 | break; | |
4806 | } | |
e165f3f0 | 4807 | } |
a251ffd0 TG |
4808 | |
4809 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
4810 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
4811 | ||
4812 | int | |
a06faf84 | 4813 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
4814 | rtx insn; |
4815 | rtx link; | |
296b8152 | 4816 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
4817 | int cost; |
4818 | { | |
4819 | if (! recog_memoized (insn)) | |
4820 | return 0; | |
4821 | ||
4822 | if (REG_NOTE_KIND (link) != 0) | |
4823 | return 0; | |
4824 | ||
4825 | if (REG_NOTE_KIND (link) == 0) | |
4826 | { | |
4827 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
4828 | cycles later. */ | |
4829 | ||
4830 | /* Tell the first scheduling pass about the latency between a mtctr | |
4831 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
4832 | know about this latency since the mtctr instruction, which has the | |
4833 | latency associated to it, will be generated by reload. */ | |
4834 | if (get_attr_type (insn) == TYPE_JMPREG) | |
4835 | return TARGET_POWER ? 5 : 4; | |
4836 | ||
4837 | /* Fall out to return default cost. */ | |
4838 | } | |
4839 | ||
4840 | return cost; | |
4841 | } | |
b6c9286a MM |
4842 | |
4843 | /* Return how many instructions the machine can issue per cycle */ | |
4844 | int get_issue_rate() | |
4845 | { | |
4846 | switch (rs6000_cpu_attr) { | |
4847 | case CPU_RIOS1: | |
4848 | return 3; /* ? */ | |
4849 | case CPU_RIOS2: | |
4850 | return 4; | |
4851 | case CPU_PPC601: | |
4852 | return 3; /* ? */ | |
b6c9286a MM |
4853 | case CPU_PPC603: |
4854 | return 2; | |
4855 | case CPU_PPC604: | |
4856 | return 4; | |
4857 | case CPU_PPC620: | |
4858 | return 4; | |
4859 | default: | |
4860 | return 1; | |
4861 | } | |
4862 | } | |
4863 | ||
b6c9286a MM |
4864 | |
4865 | \f | |
4866 | /* Output assembler code for a block containing the constant parts | |
4867 | of a trampoline, leaving space for the variable parts. | |
4868 | ||
4869 | The trampoline should set the static chain pointer to value placed | |
4870 | into the trampoline and should branch to the specified routine. */ | |
4871 | ||
4872 | void | |
4873 | rs6000_trampoline_template (file) | |
4874 | FILE *file; | |
4875 | { | |
4876 | char *sc = reg_names[STATIC_CHAIN_REGNUM]; | |
4877 | char *r0 = reg_names[0]; | |
7c59dc5d | 4878 | char *r2 = reg_names[2]; |
b6c9286a MM |
4879 | |
4880 | switch (DEFAULT_ABI) | |
4881 | { | |
4882 | default: | |
4883 | abort (); | |
4884 | ||
4885 | /* Under AIX, this is not code at all, but merely a data area, | |
4886 | since that is the way all functions are called. The first word is | |
4887 | the address of the function, the second word is the TOC pointer (r2), | |
4888 | and the third word is the static chain value. */ | |
4889 | case ABI_AIX: | |
b6c9286a MM |
4890 | break; |
4891 | ||
4892 | ||
4893 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
4894 | do the full gory code to load up the static chain. */ | |
4895 | case ABI_V4: | |
c81bebd7 | 4896 | case ABI_SOLARIS: |
b6c9286a | 4897 | case ABI_AIX_NODESC: |
b6c9286a MM |
4898 | break; |
4899 | ||
4900 | /* NT function pointers point to a two word area (real address, TOC) | |
4901 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
4902 | use the function field to point to ..LTRAMP1 and the toc field |
4903 | to point to the whole table. */ | |
b6c9286a | 4904 | case ABI_NT: |
7c59dc5d MM |
4905 | if (STATIC_CHAIN_REGNUM == 0 |
4906 | || STATIC_CHAIN_REGNUM == 2 | |
4907 | || TARGET_64BIT | |
4908 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
4909 | abort (); |
4910 | ||
7c59dc5d MM |
4911 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
4912 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
4913 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
4914 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
4915 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 4916 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
4917 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
4918 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
4919 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
4920 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
4921 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
4922 | break; |
4923 | } | |
4924 | ||
4925 | return; | |
4926 | } | |
4927 | ||
4928 | /* Length in units of the trampoline for entering a nested function. */ | |
4929 | ||
4930 | int | |
4931 | rs6000_trampoline_size () | |
4932 | { | |
4933 | int ret = 0; | |
4934 | ||
4935 | switch (DEFAULT_ABI) | |
4936 | { | |
4937 | default: | |
4938 | abort (); | |
4939 | ||
4940 | case ABI_AIX: | |
8f802bfb | 4941 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
4942 | break; |
4943 | ||
4944 | case ABI_V4: | |
c81bebd7 | 4945 | case ABI_SOLARIS: |
b6c9286a | 4946 | case ABI_AIX_NODESC: |
03a7e1a5 | 4947 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
4948 | break; |
4949 | ||
4950 | case ABI_NT: | |
7c59dc5d | 4951 | ret = 20; |
b6c9286a MM |
4952 | break; |
4953 | } | |
4954 | ||
4955 | return ret; | |
4956 | } | |
4957 | ||
4958 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
4959 | FNADDR is an RTX for the address of the function's pure code. | |
4960 | CXT is an RTX for the static chain value for the function. */ | |
4961 | ||
4962 | void | |
4963 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
4964 | rtx addr; | |
4965 | rtx fnaddr; | |
4966 | rtx cxt; | |
4967 | { | |
ac2a93a1 | 4968 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
4969 | int regsize = (TARGET_32BIT) ? 4 : 8; |
4970 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
4971 | |
4972 | switch (DEFAULT_ABI) | |
4973 | { | |
4974 | default: | |
4975 | abort (); | |
4976 | ||
8bd04c56 | 4977 | /* Macros to shorten the code expansions below. */ |
39403d82 DE |
4978 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
4979 | #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 4980 | |
b6c9286a MM |
4981 | /* Under AIX, just build the 3 word function descriptor */ |
4982 | case ABI_AIX: | |
8bd04c56 MM |
4983 | { |
4984 | rtx fn_reg = gen_reg_rtx (pmode); | |
4985 | rtx toc_reg = gen_reg_rtx (pmode); | |
4986 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4987 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
4988 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
4989 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
4990 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
4991 | } | |
b6c9286a MM |
4992 | break; |
4993 | ||
eaf1bcf1 | 4994 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 4995 | case ABI_V4: |
c81bebd7 | 4996 | case ABI_SOLARIS: |
b6c9286a | 4997 | case ABI_AIX_NODESC: |
39403d82 | 4998 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
4999 | FALSE, VOIDmode, 4, |
5000 | addr, pmode, | |
5001 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5002 | fnaddr, pmode, | |
5003 | ctx_reg, pmode); | |
b6c9286a MM |
5004 | break; |
5005 | ||
8bd04c56 MM |
5006 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5007 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5008 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5009 | case ABI_NT: |
8bd04c56 MM |
5010 | { |
5011 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5012 | rtx fn_reg = gen_reg_rtx (pmode); | |
5013 | rtx toc_reg = gen_reg_rtx (pmode); | |
5014 | ||
39403d82 | 5015 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5016 | addr = force_reg (pmode, addr); |
5017 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5018 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5019 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5020 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5021 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5022 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5023 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5024 | } |
b6c9286a MM |
5025 | break; |
5026 | } | |
5027 | ||
5028 | return; | |
5029 | } | |
7509c759 MM |
5030 | |
5031 | \f | |
5032 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5033 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5034 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5035 | ||
5036 | int | |
5037 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5038 | tree decl ATTRIBUTE_UNUSED; |
5039 | tree attributes ATTRIBUTE_UNUSED; | |
5040 | tree identifier ATTRIBUTE_UNUSED; | |
5041 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5042 | { |
5043 | return 0; | |
5044 | } | |
5045 | ||
5046 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5047 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5048 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5049 | ||
5050 | int | |
5051 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5052 | tree type; | |
296b8152 | 5053 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5054 | tree identifier; |
5055 | tree args; | |
5056 | { | |
5057 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5058 | && TREE_CODE (type) != FIELD_DECL | |
5059 | && TREE_CODE (type) != TYPE_DECL) | |
5060 | return 0; | |
5061 | ||
6a4cee5f MM |
5062 | /* Longcall attribute says that the function is not within 2**26 bytes |
5063 | of the current function, and to do an indirect call. */ | |
5064 | if (is_attribute_p ("longcall", identifier)) | |
5065 | return (args == NULL_TREE); | |
5066 | ||
7509c759 MM |
5067 | if (DEFAULT_ABI == ABI_NT) |
5068 | { | |
5069 | /* Stdcall attribute says callee is responsible for popping arguments | |
5070 | if they are not variable. */ | |
5071 | if (is_attribute_p ("stdcall", identifier)) | |
5072 | return (args == NULL_TREE); | |
5073 | ||
5074 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5075 | if (is_attribute_p ("cdecl", identifier)) | |
5076 | return (args == NULL_TREE); | |
5077 | ||
38e01259 | 5078 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5079 | indirectly through a __imp_<name> pointer. */ |
5080 | if (is_attribute_p ("dllimport", identifier)) | |
5081 | return (args == NULL_TREE); | |
5082 | ||
38e01259 | 5083 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5084 | pointer. */ |
5085 | if (is_attribute_p ("dllexport", identifier)) | |
5086 | return (args == NULL_TREE); | |
e56bb9ed MM |
5087 | |
5088 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
5089 | that will fill in the 3rd and 4th fields of the structured exception | |
5090 | table. */ | |
5091 | if (is_attribute_p ("exception", identifier)) | |
5092 | { | |
5093 | int i; | |
5094 | ||
5095 | if (args == NULL_TREE) | |
5096 | return 0; | |
5097 | ||
5098 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5099 | { | |
5100 | tree this_arg = TREE_VALUE (args); | |
5101 | args = TREE_PURPOSE (args); | |
5102 | ||
5103 | if (TREE_CODE (this_arg) != STRING_CST | |
5104 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5105 | return 0; | |
5106 | } | |
5107 | ||
5108 | return (args == NULL_TREE); | |
5109 | } | |
7509c759 MM |
5110 | } |
5111 | ||
5112 | return 0; | |
5113 | } | |
5114 | ||
5115 | /* If defined, a C expression whose value is zero if the attributes on | |
5116 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5117 | two if they are nearly compatible (which causes a warning to be | |
5118 | generated). */ | |
5119 | ||
5120 | int | |
5121 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5122 | tree type1 ATTRIBUTE_UNUSED; |
5123 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5124 | { |
5125 | return 1; | |
5126 | } | |
5127 | ||
5128 | /* If defined, a C statement that assigns default attributes to newly | |
5129 | defined TYPE. */ | |
5130 | ||
5131 | void | |
5132 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5133 | tree type ATTRIBUTE_UNUSED; |
7509c759 MM |
5134 | { |
5135 | } | |
5136 | ||
38e01259 | 5137 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5138 | struct rtx_def * |
5139 | rs6000_dll_import_ref (call_ref) | |
5140 | rtx call_ref; | |
5141 | { | |
5142 | char *call_name; | |
5143 | int len; | |
5144 | char *p; | |
5145 | rtx reg1, reg2; | |
5146 | tree node; | |
5147 | ||
5148 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5149 | abort (); | |
5150 | ||
5151 | call_name = XSTR (call_ref, 0); | |
5152 | len = sizeof ("__imp_") + strlen (call_name); | |
5153 | p = alloca (len); | |
5154 | reg2 = gen_reg_rtx (Pmode); | |
5155 | ||
5156 | strcpy (p, "__imp_"); | |
5157 | strcat (p, call_name); | |
5158 | node = get_identifier (p); | |
5159 | ||
39403d82 DE |
5160 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node))); |
5161 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); | |
7509c759 MM |
5162 | |
5163 | return reg2; | |
5164 | } | |
5165 | ||
6a4cee5f MM |
5166 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
5167 | struct rtx_def * | |
5168 | rs6000_longcall_ref (call_ref) | |
5169 | rtx call_ref; | |
5170 | { | |
5171 | char *call_name; | |
6a4cee5f MM |
5172 | tree node; |
5173 | ||
5174 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5175 | return call_ref; | |
5176 | ||
5177 | /* System V adds '.' to the internal name, so skip them. */ | |
5178 | call_name = XSTR (call_ref, 0); | |
5179 | if (*call_name == '.') | |
5180 | { | |
5181 | while (*call_name == '.') | |
5182 | call_name++; | |
5183 | ||
5184 | node = get_identifier (call_name); | |
39403d82 | 5185 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5186 | } |
5187 | ||
5188 | return force_reg (Pmode, call_ref); | |
5189 | } | |
5190 | ||
7509c759 MM |
5191 | \f |
5192 | /* A C statement or statements to switch to the appropriate section | |
5193 | for output of RTX in mode MODE. You can assume that RTX is some | |
5194 | kind of constant in RTL. The argument MODE is redundant except in | |
5195 | the case of a `const_int' rtx. Select the section by calling | |
5196 | `text_section' or one of the alternatives for other sections. | |
5197 | ||
5198 | Do not define this macro if you put all constants in the read-only | |
5199 | data section. */ | |
5200 | ||
5201 | #ifdef USING_SVR4_H | |
5202 | ||
5203 | void | |
5204 | rs6000_select_rtx_section (mode, x) | |
5205 | enum machine_mode mode; | |
5206 | rtx x; | |
5207 | { | |
5208 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5209 | toc_section (); | |
7509c759 MM |
5210 | else |
5211 | const_section (); | |
5212 | } | |
5213 | ||
5214 | /* A C statement or statements to switch to the appropriate | |
5215 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5216 | or a constant of some sort. RELOC indicates whether forming | |
5217 | the initial value of DECL requires link-time relocations. */ | |
5218 | ||
5219 | void | |
5220 | rs6000_select_section (decl, reloc) | |
5221 | tree decl; | |
5222 | int reloc; | |
5223 | { | |
5224 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5225 | ||
5226 | if (TREE_CODE (decl) == STRING_CST) | |
5227 | { | |
88228c4b | 5228 | if (! flag_writable_strings) |
7509c759 | 5229 | const_section (); |
7509c759 MM |
5230 | else |
5231 | data_section (); | |
5232 | } | |
5233 | else if (TREE_CODE (decl) == VAR_DECL) | |
5234 | { | |
5235 | if ((flag_pic && reloc) | |
5236 | || !TREE_READONLY (decl) | |
5237 | || TREE_SIDE_EFFECTS (decl) | |
5238 | || !DECL_INITIAL (decl) | |
5239 | || (DECL_INITIAL (decl) != error_mark_node | |
5240 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
5241 | { | |
d9407988 | 5242 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
5243 | sdata_section (); |
5244 | else | |
5245 | data_section (); | |
5246 | } | |
5247 | else | |
5248 | { | |
d9407988 | 5249 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 5250 | { |
d9407988 | 5251 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5252 | sdata2_section (); |
5253 | else | |
5254 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
5255 | } | |
7509c759 MM |
5256 | else |
5257 | const_section (); | |
5258 | } | |
5259 | } | |
5260 | else | |
5261 | const_section (); | |
5262 | } | |
d9407988 MM |
5263 | |
5264 | \f | |
5265 | ||
5266 | /* If we are referencing a function that is static or is known to be | |
5267 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5268 | that we can branch to this function without emitting a no-op after the | |
5269 | call. For real AIX and NT calling sequences, we also replace the | |
5270 | function name with the real name (1 or 2 leading .'s), rather than | |
5271 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5272 | to read the prefixes. */ |
d9407988 MM |
5273 | |
5274 | void | |
5275 | rs6000_encode_section_info (decl) | |
5276 | tree decl; | |
5277 | { | |
5278 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5279 | { | |
5280 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5281 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5282 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5283 | ||
5284 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5285 | { | |
5286 | char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; | |
5287 | char *str = permalloc (strlen (prefix) + 1 | |
5288 | + strlen (XSTR (sym_ref, 0))); | |
5289 | strcpy (str, prefix); | |
5290 | strcat (str, XSTR (sym_ref, 0)); | |
5291 | XSTR (sym_ref, 0) = str; | |
5292 | } | |
5293 | } | |
5294 | else if (rs6000_sdata != SDATA_NONE | |
5295 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5296 | && TREE_CODE (decl) == VAR_DECL) | |
5297 | { | |
5298 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5299 | tree section_name = DECL_SECTION_NAME (decl); | |
5300 | char *name = (char *)0; | |
5301 | int len = 0; | |
5302 | ||
5303 | if (section_name) | |
5304 | { | |
5305 | if (TREE_CODE (section_name) == STRING_CST) | |
5306 | { | |
5307 | name = TREE_STRING_POINTER (section_name); | |
5308 | len = TREE_STRING_LENGTH (section_name); | |
5309 | } | |
5310 | else | |
5311 | abort (); | |
5312 | } | |
5313 | ||
5314 | if ((size > 0 && size <= g_switch_value) | |
5315 | || (name | |
5316 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
5317 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
5318 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
5319 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
5320 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
5321 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
5322 | { | |
5323 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5324 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5325 | strcpy (str, "@"); | |
5326 | strcat (str, XSTR (sym_ref, 0)); | |
5327 | XSTR (sym_ref, 0) = str; | |
5328 | } | |
5329 | } | |
5330 | } | |
5331 | ||
7509c759 | 5332 | #endif /* USING_SVR4_H */ |
a6c2a102 DE |
5333 | \f |
5334 | void | |
5335 | rs6000_fatal_bad_address (op) | |
5336 | rtx op; | |
5337 | { | |
5338 | fatal_insn ("bad address", op); | |
5339 | } |