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9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
34f94b1f | 2 | Copyright (C) 1991, 93-8, 1999 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
9878760c RK |
31 | #include "insn-attr.h" |
32 | #include "flags.h" | |
33 | #include "recog.h" | |
34 | #include "expr.h" | |
35 | #include "obstack.h" | |
9b30bae2 | 36 | #include "tree.h" |
2a430ec1 | 37 | #include "except.h" |
a7df97e6 | 38 | #include "function.h" |
296b8152 KG |
39 | #include "output.h" |
40 | #include "toplev.h" | |
9b30bae2 | 41 | |
7509c759 MM |
42 | #ifndef TARGET_NO_PROTOTYPE |
43 | #define TARGET_NO_PROTOTYPE 0 | |
44 | #endif | |
45 | ||
9b30bae2 | 46 | extern char *language_string; |
5248c961 | 47 | extern int profile_block_flag; |
9878760c RK |
48 | |
49 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
50 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
51 | ||
5248c961 RK |
52 | /* Target cpu type */ |
53 | ||
54 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
55 | struct rs6000_cpu_select rs6000_select[3] = |
56 | { | |
815cdc52 MM |
57 | /* switch name, tune arch */ |
58 | { (const char *)0, "--with-cpu=", 1, 1 }, | |
59 | { (const char *)0, "-mcpu=", 1, 1 }, | |
60 | { (const char *)0, "-mtune=", 1, 0 }, | |
8e3f41e7 | 61 | }; |
5248c961 | 62 | |
9878760c RK |
63 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
64 | uitrunc must be defined. */ | |
65 | ||
66 | int rs6000_trunc_used; | |
67 | ||
68 | /* Set to non-zero once they have been defined. */ | |
69 | ||
70 | static int trunc_defined; | |
71 | ||
c764f757 RK |
72 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
73 | static int common_mode_defined; | |
c81bebd7 | 74 | |
9878760c RK |
75 | /* Save information from a "cmpxx" operation until the branch or scc is |
76 | emitted. */ | |
9878760c RK |
77 | rtx rs6000_compare_op0, rs6000_compare_op1; |
78 | int rs6000_compare_fp_p; | |
874a0744 MM |
79 | |
80 | #ifdef USING_SVR4_H | |
81 | /* Label number of label created for -mrelocatable, to call to so we can | |
82 | get the address of the GOT section */ | |
83 | int rs6000_pic_labelno; | |
ab9eef41 | 84 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
85 | |
86 | /* Which abi to adhere to */ | |
815cdc52 | 87 | const char *rs6000_abi_name = RS6000_ABI_NAME; |
d9407988 MM |
88 | |
89 | /* Semantics of the small data area */ | |
90 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
91 | ||
92 | /* Which small data model to use */ | |
815cdc52 | 93 | const char *rs6000_sdata_name = (char *)0; |
874a0744 | 94 | #endif |
4697a36c MM |
95 | |
96 | /* Whether a System V.4 varargs area was created. */ | |
97 | int rs6000_sysv_varargs_p; | |
8f75773e | 98 | |
b6c9286a MM |
99 | /* ABI enumeration available for subtarget to use. */ |
100 | enum rs6000_abi rs6000_current_abi; | |
101 | ||
802a0058 MM |
102 | /* Offset & size for fpmem stack locations used for converting between |
103 | float and integral types. */ | |
104 | int rs6000_fpmem_offset; | |
105 | int rs6000_fpmem_size; | |
106 | ||
38c1f2d7 | 107 | /* Debug flags */ |
815cdc52 | 108 | const char *rs6000_debug_name; |
38c1f2d7 MM |
109 | int rs6000_debug_stack; /* debug stack applications */ |
110 | int rs6000_debug_arg; /* debug argument handling */ | |
111 | ||
112 | /* Flag to say the TOC is initialized */ | |
113 | int toc_initialized; | |
114 | ||
c81bebd7 MM |
115 | \f |
116 | /* Default register names. */ | |
117 | char rs6000_reg_names[][8] = | |
118 | { | |
802a0058 MM |
119 | "0", "1", "2", "3", "4", "5", "6", "7", |
120 | "8", "9", "10", "11", "12", "13", "14", "15", | |
121 | "16", "17", "18", "19", "20", "21", "22", "23", | |
122 | "24", "25", "26", "27", "28", "29", "30", "31", | |
123 | "0", "1", "2", "3", "4", "5", "6", "7", | |
124 | "8", "9", "10", "11", "12", "13", "14", "15", | |
125 | "16", "17", "18", "19", "20", "21", "22", "23", | |
126 | "24", "25", "26", "27", "28", "29", "30", "31", | |
127 | "mq", "lr", "ctr","ap", | |
128 | "0", "1", "2", "3", "4", "5", "6", "7", | |
129 | "fpmem" | |
c81bebd7 MM |
130 | }; |
131 | ||
132 | #ifdef TARGET_REGNAMES | |
133 | static char alt_reg_names[][8] = | |
134 | { | |
802a0058 MM |
135 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
136 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
137 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
138 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
139 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
140 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
141 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
142 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
143 | "mq", "lr", "ctr", "ap", | |
144 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
145 | "fpmem" | |
c81bebd7 MM |
146 | }; |
147 | #endif | |
9878760c | 148 | \f |
daf11973 MM |
149 | #ifndef MASK_STRICT_ALIGN |
150 | #define MASK_STRICT_ALIGN 0 | |
151 | #endif | |
152 | ||
5248c961 RK |
153 | /* Override command line options. Mostly we process the processor |
154 | type and sometimes adjust other TARGET_ options. */ | |
155 | ||
156 | void | |
8e3f41e7 | 157 | rs6000_override_options (default_cpu) |
d330fd93 | 158 | const char *default_cpu; |
5248c961 | 159 | { |
c4d38ccb | 160 | size_t i, j; |
8e3f41e7 | 161 | struct rs6000_cpu_select *ptr; |
5248c961 | 162 | |
85638c0d RK |
163 | /* Simplify the entries below by making a mask for any POWER |
164 | variant and any PowerPC variant. */ | |
165 | ||
938937d8 | 166 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
167 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
168 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
169 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 170 | |
5248c961 RK |
171 | static struct ptt |
172 | { | |
d330fd93 | 173 | const char *name; /* Canonical processor name. */ |
5248c961 RK |
174 | enum processor_type processor; /* Processor type enum value. */ |
175 | int target_enable; /* Target flags to enable. */ | |
176 | int target_disable; /* Target flags to disable. */ | |
177 | } processor_target_table[] | |
cf27b467 MM |
178 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
179 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 180 | {"power", PROCESSOR_POWER, |
938937d8 | 181 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 182 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
183 | {"power2", PROCESSOR_POWER, |
184 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
185 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
186 | {"powerpc", PROCESSOR_POWERPC, |
187 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 188 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
3cb999d8 DE |
189 | {"powerpc64", PROCESSOR_POWERPC64, |
190 | MASK_POWERPC | MASK_POWERPC64 | MASK_NEW_MNEMONICS, | |
191 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
db7f1e43 | 192 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 193 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
194 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
195 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 196 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
197 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
198 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 199 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
200 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
201 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 202 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
203 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
204 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 205 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 206 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
3cb999d8 DE |
207 | {"rs64a", PROCESSOR_RS64A, |
208 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
209 | POWER_MASKS | POWERPC_OPT_MASKS}, | |
a3a1dbf6 MM |
210 | {"401", PROCESSOR_PPC403, |
211 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
212 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
49a0b204 | 213 | {"403", PROCESSOR_PPC403, |
daf11973 | 214 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 215 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
216 | {"505", PROCESSOR_MPCCORE, |
217 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
218 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 219 | {"601", PROCESSOR_PPC601, |
938937d8 | 220 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 221 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 222 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
223 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
224 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 225 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
226 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
227 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
228 | {"603e", PROCESSOR_PPC603, |
229 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
230 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b5370a88 | 231 | {"ec603e", PROCESSOR_PPC603, |
a3a1dbf6 MM |
232 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, |
233 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 234 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
235 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
236 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
cac8ce95 | 237 | {"604e", PROCESSOR_PPC604e, |
07e6159a MM |
238 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
239 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 240 | {"620", PROCESSOR_PPC620, |
68c49ffa | 241 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
a260abc9 | 242 | POWER_MASKS | MASK_PPC_GPOPT}, |
3cb999d8 DE |
243 | {"630", PROCESSOR_PPC630, |
244 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
245 | POWER_MASKS | MASK_PPC_GPOPT}, | |
bef84347 VM |
246 | {"740", PROCESSOR_PPC750, |
247 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
248 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
249 | {"750", PROCESSOR_PPC750, | |
250 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
251 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
252 | {"801", PROCESSOR_MPCCORE, |
253 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
254 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
255 | {"821", PROCESSOR_MPCCORE, |
256 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
257 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
258 | {"823", PROCESSOR_MPCCORE, |
259 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
260 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
261 | {"860", PROCESSOR_MPCCORE, |
262 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
263 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 264 | |
c4d38ccb | 265 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 266 | |
8a61d227 | 267 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 268 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 269 | |
5248c961 RK |
270 | profile_block_flag = 0; |
271 | ||
272 | /* Identify the processor type */ | |
8e3f41e7 | 273 | rs6000_select[0].string = default_cpu; |
3cb999d8 | 274 | rs6000_cpu = TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT; |
8e3f41e7 MM |
275 | |
276 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 277 | { |
8e3f41e7 MM |
278 | ptr = &rs6000_select[i]; |
279 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 280 | { |
8e3f41e7 MM |
281 | for (j = 0; j < ptt_size; j++) |
282 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
283 | { | |
284 | if (ptr->set_tune_p) | |
285 | rs6000_cpu = processor_target_table[j].processor; | |
286 | ||
287 | if (ptr->set_arch_p) | |
288 | { | |
289 | target_flags |= processor_target_table[j].target_enable; | |
290 | target_flags &= ~processor_target_table[j].target_disable; | |
291 | } | |
292 | break; | |
293 | } | |
294 | ||
295 | if (i == ptt_size) | |
296 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
297 | } |
298 | } | |
8a61d227 | 299 | |
ef792183 MM |
300 | /* If we are optimizing big endian systems for space, use the |
301 | store multiple instructions. */ | |
302 | if (BYTES_BIG_ENDIAN && optimize_size) | |
303 | target_flags |= MASK_MULTIPLE; | |
304 | ||
8a61d227 MM |
305 | /* If -mmultiple or -mno-multiple was explicitly used, don't |
306 | override with the processor default */ | |
307 | if (TARGET_MULTIPLE_SET) | |
308 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 309 | |
938937d8 MM |
310 | /* If -mstring or -mno-string was explicitly used, don't |
311 | override with the processor default */ | |
312 | if (TARGET_STRING_SET) | |
1f5515bf | 313 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 314 | |
bef84347 VM |
315 | /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu |
316 | is a 750, because the hardware doesn't support the instructions used in | |
317 | little endian mode, and causes an alignment trap. The 750 does not cause | |
318 | an alignment trap (except when the target is unaligned). */ | |
319 | ||
bfc79d3b | 320 | if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) |
7e69e155 MM |
321 | { |
322 | if (TARGET_MULTIPLE) | |
323 | { | |
324 | target_flags &= ~MASK_MULTIPLE; | |
325 | if (TARGET_MULTIPLE_SET) | |
326 | warning ("-mmultiple is not supported on little endian systems"); | |
327 | } | |
328 | ||
329 | if (TARGET_STRING) | |
330 | { | |
331 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
332 | if (TARGET_STRING_SET) |
333 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
334 | } |
335 | } | |
3933e0e1 | 336 | |
a260abc9 DE |
337 | if (flag_pic && (DEFAULT_ABI == ABI_AIX)) |
338 | { | |
339 | warning ("-f%s ignored for AIX (all code is position independent)", | |
340 | (flag_pic > 1) ? "PIC" : "pic"); | |
341 | flag_pic = 0; | |
342 | } | |
343 | ||
38c1f2d7 MM |
344 | /* Set debug flags */ |
345 | if (rs6000_debug_name) | |
346 | { | |
bfc79d3b | 347 | if (! strcmp (rs6000_debug_name, "all")) |
38c1f2d7 | 348 | rs6000_debug_stack = rs6000_debug_arg = 1; |
bfc79d3b | 349 | else if (! strcmp (rs6000_debug_name, "stack")) |
38c1f2d7 | 350 | rs6000_debug_stack = 1; |
bfc79d3b | 351 | else if (! strcmp (rs6000_debug_name, "arg")) |
38c1f2d7 MM |
352 | rs6000_debug_arg = 1; |
353 | else | |
354 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
355 | } | |
356 | ||
c81bebd7 MM |
357 | #ifdef TARGET_REGNAMES |
358 | /* If the user desires alternate register names, copy in the alternate names | |
359 | now. */ | |
360 | if (TARGET_REGNAMES) | |
bfc79d3b DE |
361 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, |
362 | sizeof (rs6000_reg_names)); | |
c81bebd7 MM |
363 | #endif |
364 | ||
3933e0e1 MM |
365 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
366 | SUBTARGET_OVERRIDE_OPTIONS; | |
367 | #endif | |
5248c961 | 368 | } |
5accd822 DE |
369 | |
370 | void | |
371 | optimization_options (level, size) | |
372 | int level; | |
373 | int size ATTRIBUTE_UNUSED; | |
374 | { | |
fca812fa | 375 | #ifdef HAVE_decrement_and_branch_on_count |
5accd822 DE |
376 | /* When optimizing, enable use of BCT instruction. */ |
377 | if (level >= 1) | |
378 | flag_branch_on_count_reg = 1; | |
379 | #endif | |
5accd822 | 380 | } |
3cfa4909 MM |
381 | \f |
382 | /* Do anything needed at the start of the asm file. */ | |
383 | ||
384 | void | |
385 | rs6000_file_start (file, default_cpu) | |
386 | FILE *file; | |
d330fd93 | 387 | const char *default_cpu; |
3cfa4909 | 388 | { |
c4d38ccb | 389 | size_t i; |
3cfa4909 | 390 | char buffer[80]; |
d330fd93 | 391 | const char *start = buffer; |
3cfa4909 MM |
392 | struct rs6000_cpu_select *ptr; |
393 | ||
394 | if (flag_verbose_asm) | |
395 | { | |
396 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
397 | rs6000_select[0].string = default_cpu; | |
398 | ||
399 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
400 | { | |
401 | ptr = &rs6000_select[i]; | |
402 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
403 | { | |
404 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
405 | start = ""; | |
406 | } | |
407 | } | |
408 | ||
409 | #ifdef USING_SVR4_H | |
410 | switch (rs6000_sdata) | |
411 | { | |
412 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
413 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
414 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
415 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
416 | } | |
417 | ||
418 | if (rs6000_sdata && g_switch_value) | |
419 | { | |
420 | fprintf (file, "%s -G %d", start, g_switch_value); | |
421 | start = ""; | |
422 | } | |
423 | #endif | |
424 | ||
425 | if (*start == '\0') | |
949ea356 | 426 | putc ('\n', file); |
3cfa4909 MM |
427 | } |
428 | } | |
429 | ||
24d304eb RK |
430 | \f |
431 | /* Create a CONST_DOUBLE from a string. */ | |
432 | ||
433 | struct rtx_def * | |
434 | rs6000_float_const (string, mode) | |
d330fd93 | 435 | const char *string; |
24d304eb RK |
436 | enum machine_mode mode; |
437 | { | |
438 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
439 | return immed_real_const_1 (value, mode); | |
440 | } | |
5248c961 | 441 | \f |
9878760c RK |
442 | /* Return non-zero if this function is known to have a null epilogue. */ |
443 | ||
444 | int | |
445 | direct_return () | |
446 | { | |
4697a36c MM |
447 | if (reload_completed) |
448 | { | |
449 | rs6000_stack_t *info = rs6000_stack_info (); | |
450 | ||
451 | if (info->first_gp_reg_save == 32 | |
452 | && info->first_fp_reg_save == 64 | |
453 | && !info->lr_save_p | |
1b4a2731 | 454 | && !info->cr_save_p |
4697a36c MM |
455 | && !info->push_p) |
456 | return 1; | |
457 | } | |
458 | ||
459 | return 0; | |
9878760c RK |
460 | } |
461 | ||
462 | /* Returns 1 always. */ | |
463 | ||
464 | int | |
465 | any_operand (op, mode) | |
296b8152 KG |
466 | register rtx op ATTRIBUTE_UNUSED; |
467 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c RK |
468 | { |
469 | return 1; | |
470 | } | |
471 | ||
b6c9286a | 472 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
473 | int |
474 | count_register_operand(op, mode) | |
b6c9286a | 475 | register rtx op; |
296b8152 | 476 | enum machine_mode mode ATTRIBUTE_UNUSED; |
b6c9286a MM |
477 | { |
478 | if (GET_CODE (op) != REG) | |
479 | return 0; | |
480 | ||
481 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
482 | return 1; | |
483 | ||
484 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
485 | return 1; | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
802a0058 MM |
490 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
491 | as a register. */ | |
38c1f2d7 MM |
492 | int |
493 | fpmem_operand(op, mode) | |
802a0058 | 494 | register rtx op; |
296b8152 | 495 | enum machine_mode mode ATTRIBUTE_UNUSED; |
802a0058 MM |
496 | { |
497 | if (GET_CODE (op) != REG) | |
498 | return 0; | |
499 | ||
500 | if (FPMEM_REGNO_P (REGNO (op))) | |
501 | return 1; | |
502 | ||
503 | #if 0 | |
504 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
505 | return 1; | |
506 | #endif | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
9878760c RK |
511 | /* Return 1 if OP is a constant that can fit in a D field. */ |
512 | ||
513 | int | |
514 | short_cint_operand (op, mode) | |
515 | register rtx op; | |
296b8152 | 516 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 517 | { |
e675f625 | 518 | return ((GET_CODE (op) == CONST_INT |
34792e82 | 519 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)); |
9878760c RK |
520 | } |
521 | ||
522 | /* Similar for a unsigned D field. */ | |
523 | ||
524 | int | |
525 | u_short_cint_operand (op, mode) | |
526 | register rtx op; | |
296b8152 | 527 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c | 528 | { |
19684119 DE |
529 | return (GET_CODE (op) == CONST_INT |
530 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0); | |
9878760c RK |
531 | } |
532 | ||
dcfedcd0 RK |
533 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
534 | ||
535 | int | |
536 | non_short_cint_operand (op, mode) | |
537 | register rtx op; | |
296b8152 | 538 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
539 | { |
540 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 541 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
542 | } |
543 | ||
9878760c RK |
544 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
545 | ctr, or lr). */ | |
546 | ||
547 | int | |
cd2b37d9 | 548 | gpc_reg_operand (op, mode) |
9878760c RK |
549 | register rtx op; |
550 | enum machine_mode mode; | |
551 | { | |
552 | return (register_operand (op, mode) | |
802a0058 MM |
553 | && (GET_CODE (op) != REG |
554 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
555 | || REGNO (op) < 64)); | |
9878760c RK |
556 | } |
557 | ||
558 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
559 | CR field. */ | |
560 | ||
561 | int | |
562 | cc_reg_operand (op, mode) | |
563 | register rtx op; | |
564 | enum machine_mode mode; | |
565 | { | |
566 | return (register_operand (op, mode) | |
567 | && (GET_CODE (op) != REG | |
568 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
569 | || CR_REGNO_P (REGNO (op)))); | |
570 | } | |
571 | ||
815cdc52 MM |
572 | /* Returns 1 if OP is either a pseudo-register or a register denoting a |
573 | CR field that isn't CR0. */ | |
574 | ||
575 | int | |
576 | cc_reg_not_cr0_operand (op, mode) | |
577 | register rtx op; | |
578 | enum machine_mode mode; | |
579 | { | |
580 | return (register_operand (op, mode) | |
581 | && (GET_CODE (op) != REG | |
582 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
583 | || CR_REGNO_NOT_CR0_P (REGNO (op)))); | |
584 | } | |
585 | ||
9878760c RK |
586 | /* Returns 1 if OP is either a constant integer valid for a D-field or a |
587 | non-special register. If a register, it must be in the proper mode unless | |
588 | MODE is VOIDmode. */ | |
589 | ||
590 | int | |
591 | reg_or_short_operand (op, mode) | |
592 | register rtx op; | |
593 | enum machine_mode mode; | |
594 | { | |
f5a28898 | 595 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
596 | } |
597 | ||
598 | /* Similar, except check if the negation of the constant would be valid for | |
599 | a D-field. */ | |
600 | ||
601 | int | |
602 | reg_or_neg_short_operand (op, mode) | |
603 | register rtx op; | |
604 | enum machine_mode mode; | |
605 | { | |
606 | if (GET_CODE (op) == CONST_INT) | |
607 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
608 | ||
cd2b37d9 | 609 | return gpc_reg_operand (op, mode); |
9878760c RK |
610 | } |
611 | ||
612 | /* Return 1 if the operand is either a register or an integer whose high-order | |
613 | 16 bits are zero. */ | |
614 | ||
615 | int | |
616 | reg_or_u_short_operand (op, mode) | |
617 | register rtx op; | |
618 | enum machine_mode mode; | |
619 | { | |
e675f625 | 620 | return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
621 | } |
622 | ||
623 | /* Return 1 is the operand is either a non-special register or ANY | |
624 | constant integer. */ | |
625 | ||
626 | int | |
627 | reg_or_cint_operand (op, mode) | |
628 | register rtx op; | |
629 | enum machine_mode mode; | |
630 | { | |
e675f625 | 631 | return (GET_CODE (op) == CONST_INT |
e675f625 | 632 | || gpc_reg_operand (op, mode)); |
9878760c RK |
633 | } |
634 | ||
766a866c MM |
635 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
636 | ||
637 | int | |
638 | got_operand (op, mode) | |
639 | register rtx op; | |
296b8152 | 640 | enum machine_mode mode ATTRIBUTE_UNUSED; |
766a866c MM |
641 | { |
642 | return (GET_CODE (op) == SYMBOL_REF | |
643 | || GET_CODE (op) == CONST | |
644 | || GET_CODE (op) == LABEL_REF); | |
645 | } | |
646 | ||
38c1f2d7 MM |
647 | /* Return 1 if the operand is a simple references that can be loaded via |
648 | the GOT (labels involving addition aren't allowed). */ | |
649 | ||
650 | int | |
651 | got_no_const_operand (op, mode) | |
652 | register rtx op; | |
296b8152 | 653 | enum machine_mode mode ATTRIBUTE_UNUSED; |
38c1f2d7 MM |
654 | { |
655 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
656 | } | |
657 | ||
4e74d8ec MM |
658 | /* Return the number of instructions it takes to form a constant in an |
659 | integer register. */ | |
660 | ||
661 | static int | |
662 | num_insns_constant_wide (value) | |
663 | HOST_WIDE_INT value; | |
664 | { | |
665 | /* signed constant loadable with {cal|addi} */ | |
666 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
667 | return 1; | |
668 | ||
0865c631 GK |
669 | #if HOST_BITS_PER_WIDE_INT == 32 |
670 | /* constant loadable with {cau|addis} */ | |
671 | else if ((value & 0xffff) == 0) | |
672 | return 1; | |
673 | ||
674 | #else | |
4e74d8ec | 675 | /* constant loadable with {cau|addis} */ |
0865c631 | 676 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) |
4e74d8ec MM |
677 | return 1; |
678 | ||
679 | else if (TARGET_64BIT) | |
680 | { | |
681 | HOST_WIDE_INT low = value & 0xffffffff; | |
682 | HOST_WIDE_INT high = value >> 32; | |
683 | ||
684 | if (high == 0 && (low & 0x80000000) == 0) | |
685 | return 2; | |
686 | ||
687 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
688 | return 2; | |
689 | ||
690 | else if (!low) | |
691 | return num_insns_constant_wide (high) + 1; | |
692 | ||
693 | else | |
694 | return (num_insns_constant_wide (high) | |
e396202a | 695 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
696 | } |
697 | #endif | |
698 | ||
699 | else | |
700 | return 2; | |
701 | } | |
702 | ||
703 | int | |
704 | num_insns_constant (op, mode) | |
705 | rtx op; | |
706 | enum machine_mode mode; | |
707 | { | |
4e74d8ec MM |
708 | if (GET_CODE (op) == CONST_INT) |
709 | return num_insns_constant_wide (INTVAL (op)); | |
710 | ||
6fc48950 MM |
711 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
712 | { | |
713 | long l; | |
714 | REAL_VALUE_TYPE rv; | |
715 | ||
716 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
717 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
718 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
719 | } | |
720 | ||
47ad8c61 | 721 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 722 | { |
47ad8c61 MM |
723 | HOST_WIDE_INT low; |
724 | HOST_WIDE_INT high; | |
725 | long l[2]; | |
726 | REAL_VALUE_TYPE rv; | |
727 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 728 | |
47ad8c61 MM |
729 | if (mode == VOIDmode || mode == DImode) |
730 | { | |
731 | high = CONST_DOUBLE_HIGH (op); | |
732 | low = CONST_DOUBLE_LOW (op); | |
733 | } | |
734 | else | |
735 | { | |
736 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
737 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
738 | high = l[endian]; | |
739 | low = l[1 - endian]; | |
740 | } | |
4e74d8ec | 741 | |
47ad8c61 MM |
742 | if (TARGET_32BIT) |
743 | return (num_insns_constant_wide (low) | |
744 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
745 | |
746 | else | |
47ad8c61 MM |
747 | { |
748 | if (high == 0 && (low & 0x80000000) == 0) | |
749 | return num_insns_constant_wide (low); | |
750 | ||
751 | else if (((high & 0xffffffff) == 0xffffffff) | |
752 | && ((low & 0x80000000) != 0)) | |
753 | return num_insns_constant_wide (low); | |
754 | ||
a260abc9 DE |
755 | else if (mask64_operand (op, mode)) |
756 | return 2; | |
757 | ||
47ad8c61 MM |
758 | else if (low == 0) |
759 | return num_insns_constant_wide (high) + 1; | |
760 | ||
761 | else | |
762 | return (num_insns_constant_wide (high) | |
763 | + num_insns_constant_wide (low) + 1); | |
764 | } | |
4e74d8ec MM |
765 | } |
766 | ||
767 | else | |
768 | abort (); | |
769 | } | |
770 | ||
6f2f8311 RK |
771 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
772 | with one instruction per word. We only do this if we can safely read | |
773 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
774 | |
775 | int | |
776 | easy_fp_constant (op, mode) | |
777 | register rtx op; | |
778 | register enum machine_mode mode; | |
779 | { | |
9878760c RK |
780 | if (GET_CODE (op) != CONST_DOUBLE |
781 | || GET_MODE (op) != mode | |
4e74d8ec | 782 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
783 | return 0; |
784 | ||
b6c9286a | 785 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 786 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
787 | return 1; |
788 | ||
a7273471 MM |
789 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
790 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
791 | return 0; | |
792 | ||
5ae4759c MM |
793 | #ifdef TARGET_RELOCATABLE |
794 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
795 | if (TARGET_RELOCATABLE) | |
796 | return 0; | |
797 | #endif | |
798 | ||
042259f2 DE |
799 | if (mode == DFmode) |
800 | { | |
801 | long k[2]; | |
802 | REAL_VALUE_TYPE rv; | |
803 | ||
804 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
805 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 806 | |
4e74d8ec MM |
807 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
808 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 809 | } |
4e74d8ec MM |
810 | |
811 | else if (mode == SFmode) | |
042259f2 DE |
812 | { |
813 | long l; | |
814 | REAL_VALUE_TYPE rv; | |
815 | ||
816 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
817 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 818 | |
4e74d8ec | 819 | return num_insns_constant_wide (l) == 1; |
042259f2 | 820 | } |
4e74d8ec | 821 | |
a260abc9 DE |
822 | else if (mode == DImode) |
823 | return ((TARGET_64BIT | |
824 | && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) | |
825 | || (num_insns_constant (op, DImode) <= 2)); | |
4e74d8ec MM |
826 | |
827 | else | |
828 | abort (); | |
9878760c | 829 | } |
8f75773e | 830 | |
b6c9286a MM |
831 | /* Return 1 if the operand is in volatile memory. Note that during the |
832 | RTL generation phase, memory_operand does not return TRUE for | |
833 | volatile memory references. So this function allows us to | |
834 | recognize volatile references where its safe. */ | |
835 | ||
836 | int | |
837 | volatile_mem_operand (op, mode) | |
838 | register rtx op; | |
839 | enum machine_mode mode; | |
840 | { | |
841 | if (GET_CODE (op) != MEM) | |
842 | return 0; | |
843 | ||
844 | if (!MEM_VOLATILE_P (op)) | |
845 | return 0; | |
846 | ||
847 | if (mode != GET_MODE (op)) | |
848 | return 0; | |
849 | ||
850 | if (reload_completed) | |
851 | return memory_operand (op, mode); | |
852 | ||
853 | if (reload_in_progress) | |
854 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
855 | ||
856 | return memory_address_p (mode, XEXP (op, 0)); | |
857 | } | |
858 | ||
97f6e72f | 859 | /* Return 1 if the operand is an offsettable memory operand. */ |
914c2e77 RK |
860 | |
861 | int | |
97f6e72f | 862 | offsettable_mem_operand (op, mode) |
914c2e77 RK |
863 | register rtx op; |
864 | enum machine_mode mode; | |
865 | { | |
97f6e72f | 866 | return ((GET_CODE (op) == MEM) |
677a9668 | 867 | && offsettable_address_p (reload_completed || reload_in_progress, |
97f6e72f | 868 | mode, XEXP (op, 0))); |
914c2e77 RK |
869 | } |
870 | ||
9878760c RK |
871 | /* Return 1 if the operand is either an easy FP constant (see above) or |
872 | memory. */ | |
873 | ||
874 | int | |
875 | mem_or_easy_const_operand (op, mode) | |
876 | register rtx op; | |
877 | enum machine_mode mode; | |
878 | { | |
879 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
880 | } | |
881 | ||
882 | /* Return 1 if the operand is either a non-special register or an item | |
0865c631 | 883 | that can be used as the operand of an SI add insn. */ |
9878760c RK |
884 | |
885 | int | |
886 | add_operand (op, mode) | |
887 | register rtx op; | |
888 | enum machine_mode mode; | |
889 | { | |
890 | return (reg_or_short_operand (op, mode) | |
19684119 | 891 | || (GET_CODE (op) == CONST_INT |
0865c631 | 892 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0)); |
9878760c RK |
893 | } |
894 | ||
dcfedcd0 RK |
895 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
896 | ||
897 | int | |
898 | non_add_cint_operand (op, mode) | |
899 | register rtx op; | |
296b8152 | 900 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
901 | { |
902 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 903 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
0865c631 | 904 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); |
dcfedcd0 RK |
905 | } |
906 | ||
9878760c RK |
907 | /* Return 1 if the operand is a non-special register or a constant that |
908 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
909 | ||
910 | int | |
911 | logical_operand (op, mode) | |
912 | register rtx op; | |
913 | enum machine_mode mode; | |
914 | { | |
cd2b37d9 | 915 | return (gpc_reg_operand (op, mode) |
9878760c | 916 | || (GET_CODE (op) == CONST_INT |
0865c631 GK |
917 | && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0 |
918 | || (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0))); | |
9878760c RK |
919 | } |
920 | ||
dcfedcd0 RK |
921 | /* Return 1 if C is a constant that is not a logical operand (as |
922 | above). */ | |
923 | ||
924 | int | |
925 | non_logical_cint_operand (op, mode) | |
926 | register rtx op; | |
0865c631 | 927 | enum machine_mode mode ATTRIBUTE_UNUSED; |
dcfedcd0 RK |
928 | { |
929 | return (GET_CODE (op) == CONST_INT | |
0865c631 GK |
930 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0 |
931 | && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); | |
dcfedcd0 RK |
932 | } |
933 | ||
19ba8161 | 934 | /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the |
9878760c RK |
935 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. |
936 | Reject all ones and all zeros, since these should have been optimized | |
937 | away and confuse the making of MB and ME. */ | |
938 | ||
939 | int | |
19ba8161 DE |
940 | mask_operand (op, mode) |
941 | register rtx op; | |
942 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
9878760c | 943 | { |
19ba8161 | 944 | HOST_WIDE_INT c; |
9878760c RK |
945 | int i; |
946 | int last_bit_value; | |
947 | int transitions = 0; | |
948 | ||
19ba8161 DE |
949 | if (GET_CODE (op) != CONST_INT) |
950 | return 0; | |
951 | ||
952 | c = INTVAL (op); | |
953 | ||
9878760c RK |
954 | if (c == 0 || c == ~0) |
955 | return 0; | |
956 | ||
957 | last_bit_value = c & 1; | |
958 | ||
959 | for (i = 1; i < 32; i++) | |
960 | if (((c >>= 1) & 1) != last_bit_value) | |
961 | last_bit_value ^= 1, transitions++; | |
962 | ||
963 | return transitions <= 2; | |
964 | } | |
965 | ||
a260abc9 DE |
966 | /* Return 1 if the operand is a constant that is a PowerPC64 mask. |
967 | It is if there are no more than one 1->0 or 0->1 transitions. | |
968 | Reject all ones and all zeros, since these should have been optimized | |
969 | away and confuse the making of MB and ME. */ | |
9878760c RK |
970 | |
971 | int | |
a260abc9 DE |
972 | mask64_operand (op, mode) |
973 | register rtx op; | |
974 | enum machine_mode mode; | |
975 | { | |
976 | if (GET_CODE (op) == CONST_INT) | |
977 | { | |
978 | HOST_WIDE_INT c = INTVAL (op); | |
979 | int i; | |
980 | int last_bit_value; | |
981 | int transitions = 0; | |
982 | ||
983 | if (c == 0 || c == ~0) | |
984 | return 0; | |
985 | ||
986 | last_bit_value = c & 1; | |
987 | ||
988 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
989 | if (((c >>= 1) & 1) != last_bit_value) | |
990 | last_bit_value ^= 1, transitions++; | |
991 | ||
a238cd8b | 992 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
993 | /* Consider CONST_INT sign-extended. */ |
994 | transitions += (last_bit_value != 1); | |
995 | #endif | |
996 | ||
997 | return transitions <= 1; | |
998 | } | |
999 | else if (GET_CODE (op) == CONST_DOUBLE | |
1000 | && (mode == VOIDmode || mode == DImode)) | |
1001 | { | |
1002 | HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); | |
a238cd8b | 1003 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1004 | HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); |
1005 | #endif | |
1006 | int i; | |
1007 | int last_bit_value; | |
1008 | int transitions = 0; | |
1009 | ||
1010 | if ((low == 0 | |
a238cd8b | 1011 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1012 | && high == 0 |
1013 | #endif | |
1014 | ) | |
1015 | || (low == ~0 | |
a238cd8b | 1016 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1017 | && high == ~0 |
1018 | #endif | |
1019 | )) | |
1020 | return 0; | |
1021 | ||
1022 | last_bit_value = low & 1; | |
1023 | ||
1024 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1025 | if (((low >>= 1) & 1) != last_bit_value) | |
1026 | last_bit_value ^= 1, transitions++; | |
1027 | ||
a238cd8b | 1028 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
1029 | if ((high & 1) != last_bit_value) |
1030 | last_bit_value ^= 1, transitions++; | |
1031 | ||
1032 | for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) | |
1033 | if (((high >>= 1) & 1) != last_bit_value) | |
1034 | last_bit_value ^= 1, transitions++; | |
1035 | #endif | |
1036 | ||
1037 | return transitions <= 1; | |
1038 | } | |
1039 | else | |
1040 | return 0; | |
1041 | } | |
1042 | ||
1043 | /* Return 1 if the operand is either a non-special register or a constant | |
1044 | that can be used as the operand of a PowerPC64 logical AND insn. */ | |
1045 | ||
1046 | int | |
1047 | and64_operand (op, mode) | |
9878760c RK |
1048 | register rtx op; |
1049 | enum machine_mode mode; | |
1050 | { | |
52d3af72 DE |
1051 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1052 | return (gpc_reg_operand (op, mode) || mask64_operand (op, mode)); | |
1053 | ||
1054 | return (logical_operand (op, mode) || mask64_operand (op, mode)); | |
9878760c RK |
1055 | } |
1056 | ||
a260abc9 DE |
1057 | /* Return 1 if the operand is either a non-special register or a |
1058 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
dcfedcd0 RK |
1059 | |
1060 | int | |
a260abc9 DE |
1061 | and_operand (op, mode) |
1062 | register rtx op; | |
1063 | enum machine_mode mode; | |
dcfedcd0 | 1064 | { |
52d3af72 DE |
1065 | if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ |
1066 | return (gpc_reg_operand (op, mode) || mask_operand (op, mode)); | |
1067 | ||
1068 | return (logical_operand (op, mode) || mask_operand (op, mode)); | |
dcfedcd0 RK |
1069 | } |
1070 | ||
9878760c RK |
1071 | /* Return 1 if the operand is a general register or memory operand. */ |
1072 | ||
1073 | int | |
1074 | reg_or_mem_operand (op, mode) | |
1075 | register rtx op; | |
1076 | register enum machine_mode mode; | |
1077 | { | |
b6c9286a MM |
1078 | return (gpc_reg_operand (op, mode) |
1079 | || memory_operand (op, mode) | |
1080 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
1081 | } |
1082 | ||
a7a813f7 | 1083 | /* Return 1 if the operand is a general register or memory operand without |
3cb999d8 | 1084 | pre_inc or pre_dec which produces invalid form of PowerPC lwa |
a7a813f7 RK |
1085 | instruction. */ |
1086 | ||
1087 | int | |
1088 | lwa_operand (op, mode) | |
1089 | register rtx op; | |
1090 | register enum machine_mode mode; | |
1091 | { | |
1092 | rtx inner = op; | |
1093 | ||
1094 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
1095 | inner = SUBREG_REG (inner); | |
1096 | ||
1097 | return gpc_reg_operand (inner, mode) | |
1098 | || (memory_operand (inner, mode) | |
1099 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
1100 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
1101 | } | |
1102 | ||
9878760c RK |
1103 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
1104 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
1105 | forced to lr. */ | |
1106 | ||
1107 | int | |
1108 | call_operand (op, mode) | |
1109 | register rtx op; | |
1110 | enum machine_mode mode; | |
1111 | { | |
1112 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
1113 | return 0; | |
1114 | ||
1115 | return (GET_CODE (op) == SYMBOL_REF | |
1116 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
1117 | } | |
1118 | ||
2af3d377 RK |
1119 | |
1120 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
1121 | this file. */ | |
1122 | ||
1123 | int | |
1124 | current_file_function_operand (op, mode) | |
1125 | register rtx op; | |
296b8152 | 1126 | enum machine_mode mode ATTRIBUTE_UNUSED; |
2af3d377 RK |
1127 | { |
1128 | return (GET_CODE (op) == SYMBOL_REF | |
1129 | && (SYMBOL_REF_FLAG (op) | |
1130 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
1131 | } | |
1132 | ||
1133 | ||
9878760c RK |
1134 | /* Return 1 if this operand is a valid input for a move insn. */ |
1135 | ||
1136 | int | |
1137 | input_operand (op, mode) | |
1138 | register rtx op; | |
1139 | enum machine_mode mode; | |
1140 | { | |
eb4e8003 | 1141 | /* Memory is always valid. */ |
9878760c RK |
1142 | if (memory_operand (op, mode)) |
1143 | return 1; | |
1144 | ||
34792e82 | 1145 | /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ |
01b4cf2b | 1146 | if (GET_CODE (op) == CONSTANT_P_RTX) |
34792e82 JL |
1147 | return 1; |
1148 | ||
eb4e8003 RK |
1149 | /* For floating-point, easy constants are valid. */ |
1150 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1151 | && CONSTANT_P (op) | |
1152 | && easy_fp_constant (op, mode)) | |
1153 | return 1; | |
1154 | ||
4e74d8ec MM |
1155 | /* Allow any integer constant. */ |
1156 | if (GET_MODE_CLASS (mode) == MODE_INT | |
e675f625 | 1157 | && (GET_CODE (op) == CONST_INT |
e675f625 | 1158 | || GET_CODE (op) == CONST_DOUBLE)) |
4e74d8ec MM |
1159 | return 1; |
1160 | ||
eb4e8003 RK |
1161 | /* For floating-point or multi-word mode, the only remaining valid type |
1162 | is a register. */ | |
9878760c RK |
1163 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1164 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1165 | return register_operand (op, mode); |
9878760c | 1166 | |
88fe15a1 RK |
1167 | /* The only cases left are integral modes one word or smaller (we |
1168 | do not get called for MODE_CC values). These can be in any | |
1169 | register. */ | |
1170 | if (register_operand (op, mode)) | |
a8b3aeda | 1171 | return 1; |
88fe15a1 | 1172 | |
84cf9dda | 1173 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1174 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1175 | return 1; |
1176 | ||
b6c9286a MM |
1177 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1178 | directly in the instruction stream */ | |
1179 | if (DEFAULT_ABI == ABI_NT | |
1180 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1181 | return 1; | |
1182 | ||
88228c4b MM |
1183 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1184 | to be valid. */ | |
c81bebd7 | 1185 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1186 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1187 | && small_data_operand (op, Pmode)) | |
1188 | return 1; | |
1189 | ||
042259f2 | 1190 | return 0; |
9878760c | 1191 | } |
7509c759 MM |
1192 | |
1193 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1194 | ||
1195 | int | |
1196 | small_data_operand (op, mode) | |
296b8152 KG |
1197 | rtx op ATTRIBUTE_UNUSED; |
1198 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
7509c759 | 1199 | { |
38c1f2d7 | 1200 | #if TARGET_ELF |
0865c631 | 1201 | rtx sym_ref, const_part; |
7509c759 | 1202 | |
d9407988 | 1203 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1204 | return 0; |
a54d04b7 | 1205 | |
5b9d9a0c | 1206 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1207 | return 0; |
1208 | ||
88228c4b MM |
1209 | if (GET_CODE (op) == SYMBOL_REF) |
1210 | sym_ref = op; | |
1211 | ||
1212 | else if (GET_CODE (op) != CONST | |
1213 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1214 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1215 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1216 | return 0; |
1217 | ||
88228c4b | 1218 | else |
dbf55e53 MM |
1219 | { |
1220 | rtx sum = XEXP (op, 0); | |
1221 | HOST_WIDE_INT summand; | |
1222 | ||
1223 | /* We have to be careful here, because it is the referenced address | |
1224 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1225 | summand = INTVAL (XEXP (sum, 1)); | |
1226 | if (summand < 0 || summand > g_switch_value) | |
1227 | return 0; | |
1228 | ||
1229 | sym_ref = XEXP (sum, 0); | |
1230 | } | |
88228c4b MM |
1231 | |
1232 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1233 | return 0; |
1234 | ||
1235 | return 1; | |
d9407988 MM |
1236 | |
1237 | #else | |
1238 | return 0; | |
1239 | #endif | |
7509c759 MM |
1240 | } |
1241 | ||
4697a36c MM |
1242 | \f |
1243 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1244 | for a call to a function whose data type is FNTYPE. | |
1245 | For a library call, FNTYPE is 0. | |
1246 | ||
1247 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1248 | so we never return a PARALLEL. */ |
4697a36c MM |
1249 | |
1250 | void | |
1251 | init_cumulative_args (cum, fntype, libname, incoming) | |
1252 | CUMULATIVE_ARGS *cum; | |
1253 | tree fntype; | |
296b8152 | 1254 | rtx libname ATTRIBUTE_UNUSED; |
4697a36c MM |
1255 | int incoming; |
1256 | { | |
1257 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1258 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1259 | |
1260 | *cum = zero_cumulative; | |
1261 | cum->words = 0; | |
1262 | cum->fregno = FP_ARG_MIN_REG; | |
1263 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1264 | cum->call_cookie = CALL_NORMAL; |
4cc833b7 | 1265 | cum->sysv_gregno = GP_ARG_MIN_REG; |
4697a36c MM |
1266 | |
1267 | if (incoming) | |
bd227acc | 1268 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
4697a36c MM |
1269 | |
1270 | else if (cum->prototype) | |
1271 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1272 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1273 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1274 | ||
1275 | else | |
1276 | cum->nargs_prototype = 0; | |
1277 | ||
1278 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1279 | |
1280 | /* Check for DLL import functions */ | |
1281 | if (abi == ABI_NT | |
1282 | && fntype | |
1283 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1284 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1285 | ||
6a4cee5f MM |
1286 | /* Also check for longcall's */ |
1287 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1288 | cum->call_cookie = CALL_LONG; | |
1289 | ||
4697a36c MM |
1290 | if (TARGET_DEBUG_ARG) |
1291 | { | |
1292 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1293 | if (fntype) | |
1294 | { | |
1295 | tree ret_type = TREE_TYPE (fntype); | |
1296 | fprintf (stderr, " ret code = %s,", | |
1297 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1298 | } | |
1299 | ||
6a4cee5f | 1300 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1301 | fprintf (stderr, " dllimport,"); |
4697a36c | 1302 | |
6a4cee5f MM |
1303 | if (cum->call_cookie & CALL_LONG) |
1304 | fprintf (stderr, " longcall,"); | |
1305 | ||
4697a36c MM |
1306 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1307 | cum->prototype, cum->nargs_prototype); | |
1308 | } | |
1309 | } | |
1310 | \f | |
c229cba9 DE |
1311 | /* If defined, a C expression which determines whether, and in which |
1312 | direction, to pad out an argument with extra space. The value | |
1313 | should be of type `enum direction': either `upward' to pad above | |
1314 | the argument, `downward' to pad below, or `none' to inhibit | |
1315 | padding. | |
1316 | ||
1317 | For the AIX ABI structs are always stored left shifted in their | |
1318 | argument slot. */ | |
1319 | ||
c4d38ccb | 1320 | int |
c229cba9 DE |
1321 | function_arg_padding (mode, type) |
1322 | enum machine_mode mode; | |
1323 | tree type; | |
1324 | { | |
c85f7c16 | 1325 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1326 | return (int)upward; |
c229cba9 DE |
1327 | |
1328 | /* This is the default definition. */ | |
1329 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1330 | ? (int)upward |
c229cba9 DE |
1331 | : ((mode == BLKmode |
1332 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1333 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1334 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1335 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1336 | } |
1337 | ||
b6c9286a MM |
1338 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1339 | of an argument with the specified mode and type. If it is not defined, | |
1340 | PARM_BOUNDARY is used for all arguments. | |
1341 | ||
e1f83b4d MM |
1342 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1343 | ||
2310f99a | 1344 | V.4 wants long longs to be double word aligned. */ |
b6c9286a MM |
1345 | |
1346 | int | |
1347 | function_arg_boundary (mode, type) | |
1348 | enum machine_mode mode; | |
1349 | tree type; | |
1350 | { | |
4cc833b7 RH |
1351 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1352 | && (mode == DImode || mode == DFmode)) | |
e1f83b4d MM |
1353 | return 64; |
1354 | ||
b6c9286a MM |
1355 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1356 | return PARM_BOUNDARY; | |
1357 | ||
1358 | if (mode != BLKmode) | |
1359 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1360 | ||
1361 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1362 | } | |
1363 | \f | |
4697a36c MM |
1364 | /* Update the data in CUM to advance over an argument |
1365 | of mode MODE and data type TYPE. | |
1366 | (TYPE is null for libcalls where that information may not be available.) */ | |
1367 | ||
1368 | void | |
1369 | function_arg_advance (cum, mode, type, named) | |
1370 | CUMULATIVE_ARGS *cum; | |
1371 | enum machine_mode mode; | |
1372 | tree type; | |
1373 | int named; | |
1374 | { | |
1375 | cum->nargs_prototype--; | |
1376 | ||
c81bebd7 | 1377 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1378 | { |
4cc833b7 RH |
1379 | if (TARGET_HARD_FLOAT |
1380 | && (mode == SFmode || mode == DFmode)) | |
4697a36c | 1381 | { |
4cc833b7 RH |
1382 | if (cum->fregno <= FP_ARG_V4_MAX_REG) |
1383 | cum->fregno++; | |
1384 | else | |
1385 | { | |
1386 | if (mode == DFmode) | |
1387 | cum->words += cum->words & 1; | |
1388 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1389 | } | |
4697a36c | 1390 | } |
4cc833b7 RH |
1391 | else |
1392 | { | |
1393 | int n_words; | |
1394 | int gregno = cum->sysv_gregno; | |
1395 | ||
1396 | /* Aggregates and IEEE quad get passed by reference. */ | |
1397 | if ((type && AGGREGATE_TYPE_P (type)) | |
1398 | || mode == TFmode) | |
1399 | n_words = 1; | |
1400 | else | |
1401 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1402 | ||
1403 | /* Long long is put in odd registers. */ | |
1404 | if (n_words == 2 && (gregno & 1) == 0) | |
1405 | gregno += 1; | |
1406 | ||
1407 | /* Long long is not split between registers and stack. */ | |
1408 | if (gregno + n_words - 1 > GP_ARG_MAX_REG) | |
1409 | { | |
1410 | /* Long long is aligned on the stack. */ | |
1411 | if (n_words == 2) | |
1412 | cum->words += cum->words & 1; | |
1413 | cum->words += n_words; | |
1414 | } | |
4697a36c | 1415 | |
4cc833b7 RH |
1416 | /* Note: continuing to accumulate gregno past when we've started |
1417 | spilling to the stack indicates the fact that we've started | |
1418 | spilling to the stack to expand_builtin_saveregs. */ | |
1419 | cum->sysv_gregno = gregno + n_words; | |
1420 | } | |
4697a36c | 1421 | |
4cc833b7 RH |
1422 | if (TARGET_DEBUG_ARG) |
1423 | { | |
1424 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1425 | cum->words, cum->fregno); | |
1426 | fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ", | |
1427 | cum->sysv_gregno, cum->nargs_prototype, cum->prototype); | |
1428 | fprintf (stderr, "mode = %4s, named = %d\n", | |
1429 | GET_MODE_NAME (mode), named); | |
1430 | } | |
4697a36c MM |
1431 | } |
1432 | else | |
4cc833b7 RH |
1433 | { |
1434 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1435 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1436 | cum->words += align; | |
4697a36c | 1437 | |
4cc833b7 RH |
1438 | if (named) |
1439 | { | |
1440 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1441 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1442 | cum->fregno++; | |
1443 | } | |
1444 | ||
1445 | if (TARGET_DEBUG_ARG) | |
1446 | { | |
1447 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1448 | cum->words, cum->fregno); | |
1449 | fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ", | |
1450 | cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode)); | |
1451 | fprintf (stderr, "named = %d, align = %d\n", named, align); | |
1452 | } | |
1453 | } | |
4697a36c MM |
1454 | } |
1455 | \f | |
1456 | /* Determine where to put an argument to a function. | |
1457 | Value is zero to push the argument on the stack, | |
1458 | or a hard register in which to store the argument. | |
1459 | ||
1460 | MODE is the argument's machine mode. | |
1461 | TYPE is the data type of the argument (as a tree). | |
1462 | This is null for libcalls where that information may | |
1463 | not be available. | |
1464 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1465 | the preceding args and about the function being called. | |
1466 | NAMED is nonzero if this argument is a named parameter | |
1467 | (otherwise it is an extra parameter matching an ellipsis). | |
1468 | ||
1469 | On RS/6000 the first eight words of non-FP are normally in registers | |
1470 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1471 | Under V.4, the first 8 FP args are in registers. | |
1472 | ||
1473 | If this is floating-point and no prototype is specified, we use | |
1474 | both an FP and integer register (or possibly FP reg and stack). Library | |
1475 | functions (when TYPE is zero) always have the proper types for args, | |
1476 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1477 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1478 | |
1479 | struct rtx_def * | |
1480 | function_arg (cum, mode, type, named) | |
1481 | CUMULATIVE_ARGS *cum; | |
1482 | enum machine_mode mode; | |
1483 | tree type; | |
1484 | int named; | |
1485 | { | |
4cc833b7 | 1486 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c | 1487 | |
4cc833b7 RH |
1488 | /* Return a marker to indicate whether CR1 needs to set or clear the bit |
1489 | that V.4 uses to say fp args were passed in registers. Assume that we | |
1490 | don't need the marker for software floating point, or compiler generated | |
1491 | library calls. */ | |
4697a36c MM |
1492 | if (mode == VOIDmode) |
1493 | { | |
c81bebd7 | 1494 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1495 | && TARGET_HARD_FLOAT |
1496 | && cum->nargs_prototype < 0 | |
4697a36c | 1497 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1498 | { |
6a4cee5f MM |
1499 | return GEN_INT (cum->call_cookie |
1500 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1501 | ? CALL_V4_SET_FP_ARGS | |
1502 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1503 | } |
4697a36c | 1504 | |
7509c759 | 1505 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1506 | } |
1507 | ||
4cc833b7 | 1508 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1509 | { |
4cc833b7 RH |
1510 | if (TARGET_HARD_FLOAT |
1511 | && (mode == SFmode || mode == DFmode)) | |
1512 | { | |
1513 | if (cum->fregno <= FP_ARG_V4_MAX_REG) | |
1514 | return gen_rtx_REG (mode, cum->fregno); | |
1515 | else | |
1516 | return NULL; | |
1517 | } | |
1518 | else | |
1519 | { | |
1520 | int n_words; | |
1521 | int gregno = cum->sysv_gregno; | |
1522 | ||
1523 | /* Aggregates and IEEE quad get passed by reference. */ | |
1524 | if ((type && AGGREGATE_TYPE_P (type)) | |
1525 | || mode == TFmode) | |
1526 | n_words = 1; | |
1527 | else | |
1528 | n_words = RS6000_ARG_SIZE (mode, type, 1); | |
1529 | ||
1530 | /* Long long is put in odd registers. */ | |
1531 | if (n_words == 2 && (gregno & 1) == 0) | |
1532 | gregno += 1; | |
1533 | ||
1534 | /* Long long is not split between registers and stack. */ | |
1535 | if (gregno + n_words - 1 <= GP_ARG_MAX_REG) | |
1536 | return gen_rtx_REG (mode, gregno); | |
1537 | else | |
1538 | return NULL; | |
1539 | } | |
4697a36c | 1540 | } |
4cc833b7 RH |
1541 | else |
1542 | { | |
1543 | int align = (TARGET_32BIT && (cum->words & 1) != 0 | |
1544 | && function_arg_boundary (mode, type) == 64) ? 1 : 0; | |
1545 | int align_words = cum->words + align; | |
4697a36c | 1546 | |
4cc833b7 RH |
1547 | if (!named) |
1548 | return NULL_RTX; | |
4697a36c | 1549 | |
4cc833b7 RH |
1550 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) |
1551 | return NULL_RTX; | |
1552 | ||
1553 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1554 | { | |
1555 | if (! type | |
1556 | || ((cum->nargs_prototype > 0) | |
1557 | /* IBM AIX extended its linkage convention definition always | |
1558 | to require FP args after register save area hole on the | |
1559 | stack. */ | |
1560 | && (DEFAULT_ABI != ABI_AIX | |
1561 | || ! TARGET_XL_CALL | |
1562 | || (align_words < GP_ARG_NUM_REG)))) | |
1563 | return gen_rtx_REG (mode, cum->fregno); | |
1564 | ||
1565 | return gen_rtx_PARALLEL (mode, | |
1566 | gen_rtvec (2, | |
39403d82 | 1567 | gen_rtx_EXPR_LIST (VOIDmode, |
1c20ae99 JW |
1568 | ((align_words >= GP_ARG_NUM_REG) |
1569 | ? NULL_RTX | |
1570 | : (align_words | |
1571 | + RS6000_ARG_SIZE (mode, type, named) | |
1572 | > GP_ARG_NUM_REG | |
1573 | /* If this is partially on the stack, then | |
1574 | we only include the portion actually | |
1575 | in registers here. */ | |
39403d82 | 1576 | ? gen_rtx_REG (SImode, |
1c20ae99 | 1577 | GP_ARG_MIN_REG + align_words) |
39403d82 | 1578 | : gen_rtx_REG (mode, |
1c20ae99 JW |
1579 | GP_ARG_MIN_REG + align_words))), |
1580 | const0_rtx), | |
39403d82 DE |
1581 | gen_rtx_EXPR_LIST (VOIDmode, |
1582 | gen_rtx_REG (mode, cum->fregno), | |
1c20ae99 | 1583 | const0_rtx))); |
4cc833b7 RH |
1584 | } |
1585 | else if (align_words < GP_ARG_NUM_REG) | |
1586 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1587 | else | |
1588 | return NULL_RTX; | |
4697a36c | 1589 | } |
4697a36c MM |
1590 | } |
1591 | \f | |
1592 | /* For an arg passed partly in registers and partly in memory, | |
1593 | this is the number of registers used. | |
1594 | For args passed entirely in registers or entirely in memory, zero. */ | |
1595 | ||
1596 | int | |
1597 | function_arg_partial_nregs (cum, mode, type, named) | |
1598 | CUMULATIVE_ARGS *cum; | |
1599 | enum machine_mode mode; | |
1600 | tree type; | |
1601 | int named; | |
1602 | { | |
1603 | if (! named) | |
1604 | return 0; | |
1605 | ||
c81bebd7 | 1606 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1607 | return 0; |
4697a36c MM |
1608 | |
1609 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1610 | { | |
1611 | if (cum->nargs_prototype >= 0) | |
1612 | return 0; | |
1613 | } | |
1614 | ||
1615 | if (cum->words < GP_ARG_NUM_REG | |
1616 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1617 | { | |
1618 | int ret = GP_ARG_NUM_REG - cum->words; | |
1619 | if (ret && TARGET_DEBUG_ARG) | |
1620 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1621 | ||
1622 | return ret; | |
1623 | } | |
1624 | ||
1625 | return 0; | |
1626 | } | |
1627 | \f | |
1628 | /* A C expression that indicates when an argument must be passed by | |
1629 | reference. If nonzero for an argument, a copy of that argument is | |
1630 | made in memory and a pointer to the argument is passed instead of | |
1631 | the argument itself. The pointer is passed in whatever way is | |
1632 | appropriate for passing a pointer to that type. | |
1633 | ||
1634 | Under V.4, structures and unions are passed by reference. */ | |
1635 | ||
1636 | int | |
1637 | function_arg_pass_by_reference (cum, mode, type, named) | |
296b8152 KG |
1638 | CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; |
1639 | enum machine_mode mode ATTRIBUTE_UNUSED; | |
4697a36c | 1640 | tree type; |
296b8152 | 1641 | int named ATTRIBUTE_UNUSED; |
4697a36c | 1642 | { |
c81bebd7 | 1643 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4cc833b7 RH |
1644 | && ((type && AGGREGATE_TYPE_P (type)) |
1645 | || mode == TFmode)) | |
4697a36c MM |
1646 | { |
1647 | if (TARGET_DEBUG_ARG) | |
1648 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1649 | ||
1650 | return 1; | |
1651 | } | |
4697a36c MM |
1652 | |
1653 | return 0; | |
1654 | } | |
1655 | ||
1656 | \f | |
1657 | /* Perform any needed actions needed for a function that is receiving a | |
1658 | variable number of arguments. | |
1659 | ||
1660 | CUM is as above. | |
1661 | ||
1662 | MODE and TYPE are the mode and type of the current parameter. | |
1663 | ||
1664 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1665 | that must be pushed by the prolog to pretend that our caller pushed | |
1666 | it. | |
1667 | ||
1668 | Normally, this macro will push all remaining incoming registers on the | |
1669 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1670 | ||
1671 | void | |
1672 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1673 | CUMULATIVE_ARGS *cum; | |
1674 | enum machine_mode mode; | |
1675 | tree type; | |
1676 | int *pretend_size; | |
1677 | int no_rtl; | |
1678 | ||
1679 | { | |
4cc833b7 RH |
1680 | CUMULATIVE_ARGS next_cum; |
1681 | int reg_size = TARGET_32BIT ? 4 : 8; | |
1682 | rtx save_area; | |
1683 | int first_reg_offset; | |
4697a36c | 1684 | |
60e2d0ca | 1685 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1686 | { |
4cc833b7 RH |
1687 | tree fntype; |
1688 | int stdarg_p; | |
1689 | ||
1690 | fntype = TREE_TYPE (current_function_decl); | |
1691 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1692 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1693 | != void_type_node)); | |
1694 | ||
1695 | /* For varargs, we do not want to skip the dummy va_dcl argument. | |
1696 | For stdargs, we do want to skip the last named argument. */ | |
1697 | next_cum = *cum; | |
1698 | if (stdarg_p) | |
1699 | function_arg_advance (&next_cum, mode, type, 1); | |
1700 | ||
1701 | /* Indicate to allocate space on the stack for varargs save area. */ | |
1702 | /* ??? Does this really have to be located at a magic spot on the | |
1703 | stack, or can we allocate this with assign_stack_local instead. */ | |
4697a36c | 1704 | rs6000_sysv_varargs_p = 1; |
60e2d0ca | 1705 | if (! no_rtl) |
2c4974b7 | 1706 | save_area = plus_constant (virtual_stack_vars_rtx, |
bd227acc | 1707 | - RS6000_VARARGS_SIZE); |
4cc833b7 RH |
1708 | |
1709 | first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG; | |
4697a36c | 1710 | } |
60e2d0ca | 1711 | else |
4697a36c | 1712 | { |
4cc833b7 RH |
1713 | save_area = virtual_incoming_args_rtx; |
1714 | rs6000_sysv_varargs_p = 0; | |
4697a36c | 1715 | |
4cc833b7 | 1716 | first_reg_offset = cum->words; |
4697a36c MM |
1717 | if (MUST_PASS_IN_STACK (mode, type)) |
1718 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
4cc833b7 | 1719 | } |
4697a36c | 1720 | |
4cc833b7 RH |
1721 | if (!no_rtl && first_reg_offset < GP_ARG_NUM_REG) |
1722 | { | |
1723 | move_block_from_reg | |
1724 | (GP_ARG_MIN_REG + first_reg_offset, | |
1725 | gen_rtx_MEM (BLKmode, | |
1726 | plus_constant (save_area, first_reg_offset * reg_size)), | |
1727 | GP_ARG_NUM_REG - first_reg_offset, | |
1728 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1729 | ||
1730 | /* ??? Does ABI_V4 need this at all? */ | |
4697a36c MM |
1731 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; |
1732 | } | |
1733 | ||
4697a36c | 1734 | /* Save FP registers if needed. */ |
4cc833b7 RH |
1735 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1736 | && TARGET_HARD_FLOAT && !no_rtl | |
1737 | && next_cum.fregno <= FP_ARG_V4_MAX_REG) | |
4697a36c | 1738 | { |
4cc833b7 RH |
1739 | int fregno = next_cum.fregno; |
1740 | rtx cr1 = gen_rtx_REG (CCmode, 69); | |
1741 | rtx lab = gen_label_rtx (); | |
1742 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
4697a36c | 1743 | |
4cc833b7 | 1744 | emit_jump_insn (gen_rtx_SET (VOIDmode, |
4697a36c | 1745 | pc_rtx, |
39403d82 | 1746 | gen_rtx_IF_THEN_ELSE (VOIDmode, |
4cc833b7 RH |
1747 | gen_rtx_NE (VOIDmode, cr1, |
1748 | const0_rtx), | |
39403d82 | 1749 | gen_rtx_LABEL_REF (VOIDmode, lab), |
4697a36c MM |
1750 | pc_rtx))); |
1751 | ||
4cc833b7 RH |
1752 | while (fregno <= FP_ARG_V4_MAX_REG) |
1753 | { | |
1754 | emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), | |
1755 | gen_rtx_REG (DFmode, fregno)); | |
1756 | fregno++; | |
1757 | off += 8; | |
4697a36c | 1758 | } |
4cc833b7 RH |
1759 | |
1760 | emit_label (lab); | |
4697a36c | 1761 | } |
4697a36c MM |
1762 | } |
1763 | \f | |
1764 | /* If defined, is a C expression that produces the machine-specific | |
1765 | code for a call to `__builtin_saveregs'. This code will be moved | |
1766 | to the very beginning of the function, before any parameter access | |
1767 | are made. The return value of this function should be an RTX that | |
1768 | contains the value to use as the return of `__builtin_saveregs'. | |
1769 | ||
4697a36c MM |
1770 | On the Power/PowerPC return the address of the area on the stack |
1771 | used to hold arguments. Under AIX, this includes the 8 word register | |
2c4974b7 RH |
1772 | save area. |
1773 | ||
1774 | Under V.4, things are more complicated. We do not have access to | |
1775 | all of the virtual registers required for va_start to do its job, | |
1776 | so we construct the va_list in its entirity here, and reduce va_start | |
1777 | to a block copy. This is similar to the way we do things on Alpha. */ | |
4697a36c MM |
1778 | |
1779 | struct rtx_def * | |
05e4a2ab | 1780 | rs6000_expand_builtin_saveregs () |
4697a36c | 1781 | { |
2c4974b7 RH |
1782 | rtx block, mem_gpr_fpr, mem_reg_save_area, mem_overflow, tmp; |
1783 | tree fntype; | |
1784 | int stdarg_p; | |
1785 | HOST_WIDE_INT words, gpr, fpr; | |
1786 | ||
1787 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) | |
1788 | return virtual_incoming_args_rtx; | |
1789 | ||
1790 | fntype = TREE_TYPE (current_function_decl); | |
1791 | stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 | |
1792 | && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) | |
1793 | != void_type_node)); | |
1794 | ||
1795 | /* Allocate the va_list constructor. */ | |
1796 | block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD); | |
1797 | RTX_UNCHANGING_P (block) = 1; | |
1798 | RTX_UNCHANGING_P (XEXP (block, 0)) = 1; | |
1799 | ||
1800 | mem_gpr_fpr = change_address (block, word_mode, XEXP (block, 0)); | |
1801 | mem_overflow = change_address (block, ptr_mode, | |
1802 | plus_constant (XEXP (block, 0), | |
1803 | UNITS_PER_WORD)); | |
1804 | mem_reg_save_area = change_address (block, ptr_mode, | |
1805 | plus_constant (XEXP (block, 0), | |
1806 | 2 * UNITS_PER_WORD)); | |
1807 | ||
1808 | /* Construct the two characters of `gpr' and `fpr' as a unit. */ | |
4cc833b7 RH |
1809 | words = current_function_args_info.words; |
1810 | gpr = current_function_args_info.sysv_gregno - GP_ARG_MIN_REG; | |
1811 | fpr = current_function_args_info.fregno - FP_ARG_MIN_REG; | |
1812 | ||
1813 | /* Varargs has the va_dcl argument, but we don't count it. */ | |
1814 | if (!stdarg_p) | |
1815 | { | |
1816 | if (gpr > GP_ARG_NUM_REG) | |
1817 | words -= 1; | |
1818 | else | |
1819 | gpr -= 1; | |
1820 | } | |
2c4974b7 RH |
1821 | |
1822 | if (BYTES_BIG_ENDIAN) | |
1823 | { | |
1824 | HOST_WIDE_INT bits = gpr << 8 | fpr; | |
1825 | if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD) | |
1826 | tmp = GEN_INT (bits << (BITS_PER_WORD - 16)); | |
1827 | else | |
1828 | { | |
1829 | bits <<= BITS_PER_WORD - HOST_BITS_PER_WIDE_INT - 16; | |
1830 | tmp = immed_double_const (0, bits, word_mode); | |
1831 | } | |
1832 | } | |
1833 | else | |
1834 | tmp = GEN_INT (fpr << 8 | gpr); | |
1835 | ||
1836 | emit_move_insn (mem_gpr_fpr, tmp); | |
1837 | ||
1838 | /* Find the overflow area. */ | |
4cc833b7 RH |
1839 | tmp = expand_binop (Pmode, add_optab, virtual_incoming_args_rtx, |
1840 | GEN_INT (words * UNITS_PER_WORD), | |
1841 | mem_overflow, 0, OPTAB_WIDEN); | |
2c4974b7 RH |
1842 | if (tmp != mem_overflow) |
1843 | emit_move_insn (mem_overflow, tmp); | |
1844 | ||
1845 | /* Find the register save area. */ | |
1846 | tmp = expand_binop (Pmode, add_optab, virtual_stack_vars_rtx, | |
1847 | GEN_INT (-RS6000_VARARGS_SIZE), | |
1848 | mem_reg_save_area, 0, OPTAB_WIDEN); | |
1849 | if (tmp != mem_reg_save_area) | |
1850 | emit_move_insn (mem_reg_save_area, tmp); | |
1851 | ||
1852 | /* Return the address of the va_list constructor. */ | |
1853 | return XEXP (block, 0); | |
4697a36c | 1854 | } |
5b5040b9 RK |
1855 | \f |
1856 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1857 | and other bits from an original memory reference. */ | |
1858 | ||
1859 | static rtx | |
1860 | expand_block_move_mem (mode, addr, orig_mem) | |
1861 | enum machine_mode mode; | |
1862 | rtx addr; | |
1863 | rtx orig_mem; | |
1864 | { | |
39403d82 | 1865 | rtx mem = gen_rtx_MEM (mode, addr); |
b6c9286a MM |
1866 | |
1867 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
c6df88cb | 1868 | MEM_COPY_ATTRIBUTES (mem, orig_mem); |
b6c9286a MM |
1869 | #ifdef MEM_UNALIGNED_P |
1870 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1871 | #endif | |
5b5040b9 RK |
1872 | return mem; |
1873 | } | |
1874 | ||
7e69e155 MM |
1875 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1876 | if we should let the compiler generate normal code. | |
1877 | ||
1878 | operands[0] is the destination | |
1879 | operands[1] is the source | |
1880 | operands[2] is the length | |
1881 | operands[3] is the alignment */ | |
1882 | ||
3933e0e1 MM |
1883 | #define MAX_MOVE_REG 4 |
1884 | ||
7e69e155 MM |
1885 | int |
1886 | expand_block_move (operands) | |
1887 | rtx operands[]; | |
1888 | { | |
b6c9286a MM |
1889 | rtx orig_dest = operands[0]; |
1890 | rtx orig_src = operands[1]; | |
7e69e155 | 1891 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1892 | rtx align_rtx = operands[3]; |
3933e0e1 | 1893 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1894 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1895 | int bytes; |
1896 | int offset; | |
1897 | int num_reg; | |
1898 | int i; | |
7e69e155 MM |
1899 | rtx src_reg; |
1900 | rtx dest_reg; | |
3933e0e1 MM |
1901 | rtx src_addr; |
1902 | rtx dest_addr; | |
7e69e155 | 1903 | rtx tmp_reg; |
3933e0e1 | 1904 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1905 | int move_bytes; |
1906 | ||
3933e0e1 MM |
1907 | /* If this is not a fixed size move, just call memcpy */ |
1908 | if (!constp) | |
1909 | return 0; | |
1910 | ||
7e69e155 | 1911 | /* Anything to move? */ |
3933e0e1 MM |
1912 | bytes = INTVAL (bytes_rtx); |
1913 | if (bytes <= 0) | |
7e69e155 MM |
1914 | return 1; |
1915 | ||
3933e0e1 MM |
1916 | /* Don't support real large moves. If string instructions are not used, |
1917 | then don't generate more than 8 loads. */ | |
1918 | if (TARGET_STRING) | |
1919 | { | |
1cab3be1 | 1920 | if (bytes > 4*8) |
3933e0e1 MM |
1921 | return 0; |
1922 | } | |
1923 | else if (!STRICT_ALIGNMENT) | |
1924 | { | |
1925 | if (bytes > 4*8) | |
1926 | return 0; | |
1927 | } | |
1928 | else if (bytes > 8*align) | |
7e69e155 MM |
1929 | return 0; |
1930 | ||
1931 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1932 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1933 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1934 | |
3933e0e1 | 1935 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1936 | { |
3933e0e1 | 1937 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1938 | { |
3933e0e1 MM |
1939 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1940 | && !fixed_regs[5] | |
1941 | && !fixed_regs[6] | |
1942 | && !fixed_regs[7] | |
1943 | && !fixed_regs[8] | |
1944 | && !fixed_regs[9] | |
1945 | && !fixed_regs[10] | |
1946 | && !fixed_regs[11] | |
1947 | && !fixed_regs[12]) | |
1948 | { | |
1949 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1950 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1951 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1952 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1953 | align_rtx)); |
3933e0e1 MM |
1954 | } |
1955 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1956 | && !fixed_regs[7] | |
1957 | && !fixed_regs[8] | |
1958 | && !fixed_regs[9] | |
1959 | && !fixed_regs[10] | |
1960 | && !fixed_regs[11] | |
1961 | && !fixed_regs[12]) | |
1962 | { | |
1963 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1964 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1965 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1966 | GEN_INT (move_bytes), |
4c64a852 | 1967 | align_rtx)); |
3933e0e1 MM |
1968 | } |
1969 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1970 | && !fixed_regs[9] | |
1971 | && !fixed_regs[10] | |
1972 | && !fixed_regs[11] | |
1973 | && !fixed_regs[12]) | |
1974 | { | |
1975 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1976 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1977 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1978 | GEN_INT (move_bytes), |
4c64a852 | 1979 | align_rtx)); |
3933e0e1 | 1980 | } |
d679bebf | 1981 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1982 | { /* move up to 8 bytes at a time */ |
1983 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1984 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1985 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1986 | GEN_INT (move_bytes), |
4c64a852 | 1987 | align_rtx)); |
3933e0e1 MM |
1988 | } |
1989 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1990 | { /* move 4 bytes */ | |
1991 | move_bytes = 4; | |
1992 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1993 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1994 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1995 | } |
1996 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1997 | { /* move 2 bytes */ | |
1998 | move_bytes = 2; | |
1999 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
2000 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
2001 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
2002 | } |
2003 | else if (bytes == 1) /* move 1 byte */ | |
2004 | { | |
2005 | move_bytes = 1; | |
2006 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
2007 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
2008 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
2009 | } |
2010 | else | |
2011 | { /* move up to 4 bytes at a time */ | |
2012 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
2013 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
2014 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 2015 | GEN_INT (move_bytes), |
4c64a852 | 2016 | align_rtx)); |
3933e0e1 | 2017 | } |
4c64a852 | 2018 | |
015892ee RK |
2019 | if (bytes > move_bytes) |
2020 | { | |
2021 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
2022 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
2023 | } | |
4c64a852 | 2024 | } |
3933e0e1 MM |
2025 | } |
2026 | ||
2027 | else /* string instructions not available */ | |
2028 | { | |
2029 | num_reg = offset = 0; | |
2030 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 2031 | { |
3933e0e1 MM |
2032 | /* Calculate the correct offset for src/dest */ |
2033 | if (offset == 0) | |
7e69e155 | 2034 | { |
3933e0e1 MM |
2035 | src_addr = src_reg; |
2036 | dest_addr = dest_reg; | |
2037 | } | |
2038 | else | |
2039 | { | |
39403d82 DE |
2040 | src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); |
2041 | dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); | |
3933e0e1 MM |
2042 | } |
2043 | ||
2044 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
2045 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
2046 | { | |
2047 | move_bytes = 8; | |
2048 | tmp_reg = gen_reg_rtx (DImode); | |
2049 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
2050 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
2051 | } | |
2052 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
2053 | { |
2054 | move_bytes = 4; | |
2055 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
2056 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
2057 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2058 | } |
2059 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
2060 | { | |
2061 | move_bytes = 2; | |
2062 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
2063 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
2064 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2065 | } |
2066 | else | |
2067 | { | |
2068 | move_bytes = 1; | |
2069 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
2070 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
2071 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
2072 | } |
2073 | ||
2074 | if (num_reg >= MAX_MOVE_REG) | |
2075 | { | |
2076 | for (i = 0; i < num_reg; i++) | |
2077 | emit_insn (stores[i]); | |
2078 | num_reg = 0; | |
7e69e155 MM |
2079 | } |
2080 | } | |
3933e0e1 | 2081 | |
b6c9286a MM |
2082 | for (i = 0; i < num_reg; i++) |
2083 | emit_insn (stores[i]); | |
7e69e155 MM |
2084 | } |
2085 | ||
2086 | return 1; | |
2087 | } | |
2088 | ||
9878760c RK |
2089 | \f |
2090 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
2091 | PARALLEL and the first section will be tested. */ | |
2092 | ||
2093 | int | |
2094 | load_multiple_operation (op, mode) | |
2095 | rtx op; | |
296b8152 | 2096 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2097 | { |
2098 | int count = XVECLEN (op, 0); | |
2099 | int dest_regno; | |
2100 | rtx src_addr; | |
2101 | int i; | |
2102 | ||
2103 | /* Perform a quick check so we don't blow up below. */ | |
2104 | if (count <= 1 | |
2105 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2106 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
2107 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
2108 | return 0; | |
2109 | ||
2110 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
2111 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
2112 | ||
2113 | for (i = 1; i < count; i++) | |
2114 | { | |
2115 | rtx elt = XVECEXP (op, 0, i); | |
2116 | ||
2117 | if (GET_CODE (elt) != SET | |
2118 | || GET_CODE (SET_DEST (elt)) != REG | |
2119 | || GET_MODE (SET_DEST (elt)) != SImode | |
2120 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
2121 | || GET_CODE (SET_SRC (elt)) != MEM | |
2122 | || GET_MODE (SET_SRC (elt)) != SImode | |
2123 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
2124 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
2125 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
2126 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
2127 | return 0; | |
2128 | } | |
2129 | ||
2130 | return 1; | |
2131 | } | |
2132 | ||
2133 | /* Similar, but tests for store multiple. Here, the second vector element | |
2134 | is a CLOBBER. It will be tested later. */ | |
2135 | ||
2136 | int | |
2137 | store_multiple_operation (op, mode) | |
2138 | rtx op; | |
296b8152 | 2139 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2140 | { |
2141 | int count = XVECLEN (op, 0) - 1; | |
2142 | int src_regno; | |
2143 | rtx dest_addr; | |
2144 | int i; | |
2145 | ||
2146 | /* Perform a quick check so we don't blow up below. */ | |
2147 | if (count <= 1 | |
2148 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
2149 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
2150 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
2151 | return 0; | |
2152 | ||
2153 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
2154 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
2155 | ||
2156 | for (i = 1; i < count; i++) | |
2157 | { | |
2158 | rtx elt = XVECEXP (op, 0, i + 1); | |
2159 | ||
2160 | if (GET_CODE (elt) != SET | |
2161 | || GET_CODE (SET_SRC (elt)) != REG | |
2162 | || GET_MODE (SET_SRC (elt)) != SImode | |
2163 | || REGNO (SET_SRC (elt)) != src_regno + i | |
2164 | || GET_CODE (SET_DEST (elt)) != MEM | |
2165 | || GET_MODE (SET_DEST (elt)) != SImode | |
2166 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
2167 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
2168 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
2169 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
2170 | return 0; | |
2171 | } | |
2172 | ||
2173 | return 1; | |
2174 | } | |
2175 | \f | |
2176 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
2177 | We only check the opcode against the mode of the CC value here. */ | |
2178 | ||
2179 | int | |
2180 | branch_comparison_operator (op, mode) | |
2181 | register rtx op; | |
296b8152 | 2182 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2183 | { |
2184 | enum rtx_code code = GET_CODE (op); | |
2185 | enum machine_mode cc_mode; | |
2186 | ||
2187 | if (GET_RTX_CLASS (code) != '<') | |
2188 | return 0; | |
2189 | ||
2190 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2191 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2192 | return 0; | |
2193 | ||
2194 | if ((code == GT || code == LT || code == GE || code == LE) | |
2195 | && cc_mode == CCUNSmode) | |
2196 | return 0; | |
2197 | ||
2198 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2199 | && (cc_mode != CCUNSmode)) | |
2200 | return 0; | |
2201 | ||
2202 | return 1; | |
2203 | } | |
2204 | ||
2205 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
2206 | We check the opcode against the mode of the CC value and disallow EQ or | |
2207 | NE comparisons for integers. */ | |
2208 | ||
2209 | int | |
2210 | scc_comparison_operator (op, mode) | |
2211 | register rtx op; | |
2212 | enum machine_mode mode; | |
2213 | { | |
2214 | enum rtx_code code = GET_CODE (op); | |
2215 | enum machine_mode cc_mode; | |
2216 | ||
2217 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
2218 | return 0; | |
2219 | ||
2220 | if (GET_RTX_CLASS (code) != '<') | |
2221 | return 0; | |
2222 | ||
2223 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2224 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
2225 | return 0; | |
2226 | ||
2227 | if (code == NE && cc_mode != CCFPmode) | |
2228 | return 0; | |
2229 | ||
2230 | if ((code == GT || code == LT || code == GE || code == LE) | |
2231 | && cc_mode == CCUNSmode) | |
2232 | return 0; | |
2233 | ||
2234 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
2235 | && (cc_mode != CCUNSmode)) | |
2236 | return 0; | |
2237 | ||
c5defebb RK |
2238 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
2239 | return 0; | |
2240 | ||
9878760c RK |
2241 | return 1; |
2242 | } | |
e0cd0770 JC |
2243 | |
2244 | int | |
2245 | trap_comparison_operator (op, mode) | |
2246 | rtx op; | |
2247 | enum machine_mode mode; | |
2248 | { | |
2249 | if (mode != VOIDmode && mode != GET_MODE (op)) | |
2250 | return 0; | |
2251 | return (GET_RTX_CLASS (GET_CODE (op)) == '<' | |
2252 | || GET_CODE (op) == EQ || GET_CODE (op) == NE); | |
2253 | } | |
9878760c RK |
2254 | \f |
2255 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
2256 | mask required to convert the result of a rotate insn into a shift | |
2257 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
2258 | ||
2259 | int | |
2260 | includes_lshift_p (shiftop, andop) | |
2261 | register rtx shiftop; | |
2262 | register rtx andop; | |
2263 | { | |
2264 | int shift_mask = (~0 << INTVAL (shiftop)); | |
2265 | ||
2266 | return (INTVAL (andop) & ~shift_mask) == 0; | |
2267 | } | |
2268 | ||
2269 | /* Similar, but for right shift. */ | |
2270 | ||
2271 | int | |
2272 | includes_rshift_p (shiftop, andop) | |
2273 | register rtx shiftop; | |
2274 | register rtx andop; | |
2275 | { | |
a7653a2c | 2276 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
2277 | |
2278 | shift_mask >>= INTVAL (shiftop); | |
2279 | ||
2280 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
2281 | } | |
35068b43 RK |
2282 | |
2283 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2284 | for lfq and stfq insns. | |
2285 | ||
2286 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2287 | abort if we are passed pseudo registers. */ | |
2288 | ||
2289 | int | |
2290 | registers_ok_for_quad_peep (reg1, reg2) | |
2291 | rtx reg1, reg2; | |
2292 | { | |
2293 | /* We might have been passed a SUBREG. */ | |
2294 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2295 | return 0; | |
2296 | ||
2297 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2298 | } | |
2299 | ||
2300 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2301 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2302 | ||
2303 | int | |
2304 | addrs_ok_for_quad_peep (addr1, addr2) | |
2305 | register rtx addr1; | |
2306 | register rtx addr2; | |
2307 | { | |
2308 | int reg1; | |
2309 | int offset1; | |
2310 | ||
2311 | /* Extract an offset (if used) from the first addr. */ | |
2312 | if (GET_CODE (addr1) == PLUS) | |
2313 | { | |
2314 | /* If not a REG, return zero. */ | |
2315 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2316 | return 0; | |
2317 | else | |
2318 | { | |
2319 | reg1 = REGNO (XEXP (addr1, 0)); | |
2320 | /* The offset must be constant! */ | |
2321 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2322 | return 0; | |
2323 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2324 | } | |
2325 | } | |
2326 | else if (GET_CODE (addr1) != REG) | |
2327 | return 0; | |
2328 | else | |
2329 | { | |
2330 | reg1 = REGNO (addr1); | |
2331 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2332 | offset1 = 0; | |
2333 | } | |
2334 | ||
2335 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2336 | if (GET_CODE (addr2) != PLUS) | |
2337 | return 0; | |
2338 | ||
2339 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2340 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2341 | return 0; | |
2342 | ||
2343 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2344 | return 0; | |
2345 | ||
2346 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2347 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2348 | return 0; | |
2349 | ||
2350 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2351 | instructions. */ | |
2352 | return 1; | |
2353 | } | |
9878760c RK |
2354 | \f |
2355 | /* Return the register class of a scratch register needed to copy IN into | |
2356 | or out of a register in CLASS in MODE. If it can be done directly, | |
2357 | NO_REGS is returned. */ | |
2358 | ||
2359 | enum reg_class | |
2360 | secondary_reload_class (class, mode, in) | |
2361 | enum reg_class class; | |
296b8152 | 2362 | enum machine_mode mode ATTRIBUTE_UNUSED; |
9878760c RK |
2363 | rtx in; |
2364 | { | |
5accd822 | 2365 | int regno; |
9878760c | 2366 | |
3cb999d8 | 2367 | #if TARGET_ELF |
1427100a | 2368 | /* We can not copy a symbolic operand directly into anything other than |
e7b7998a JL |
2369 | BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS |
2370 | is needed as an intermediate register. */ | |
3cb999d8 | 2371 | if (class != BASE_REGS |
e7b7998a JL |
2372 | && (GET_CODE (in) == SYMBOL_REF |
2373 | || GET_CODE (in) == LABEL_REF | |
2374 | || GET_CODE (in) == CONST)) | |
2375 | return BASE_REGS; | |
3cb999d8 | 2376 | #endif |
e7b7998a | 2377 | |
5accd822 DE |
2378 | if (GET_CODE (in) == REG) |
2379 | { | |
2380 | regno = REGNO (in); | |
2381 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2382 | { | |
2383 | regno = true_regnum (in); | |
2384 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2385 | regno = -1; | |
2386 | } | |
2387 | } | |
2388 | else if (GET_CODE (in) == SUBREG) | |
2389 | { | |
2390 | regno = true_regnum (in); | |
2391 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2392 | regno = -1; | |
2393 | } | |
2394 | else | |
2395 | regno = -1; | |
2396 | ||
9878760c RK |
2397 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS |
2398 | into anything. */ | |
2399 | if (class == GENERAL_REGS || class == BASE_REGS | |
2400 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2401 | return NO_REGS; | |
2402 | ||
2403 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2404 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2405 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2406 | return NO_REGS; | |
2407 | ||
2408 | /* We can copy among the CR registers. */ | |
2409 | if ((class == CR_REGS || class == CR0_REGS) | |
2410 | && regno >= 0 && CR_REGNO_P (regno)) | |
2411 | return NO_REGS; | |
2412 | ||
2413 | /* Otherwise, we need GENERAL_REGS. */ | |
2414 | return GENERAL_REGS; | |
2415 | } | |
2416 | \f | |
2417 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2418 | know this is a valid comparison. | |
2419 | ||
2420 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2421 | used instead of %C, so the bits will be in different places. | |
2422 | ||
b4ac57ab | 2423 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2424 | |
2425 | int | |
2426 | ccr_bit (op, scc_p) | |
2427 | register rtx op; | |
2428 | int scc_p; | |
2429 | { | |
2430 | enum rtx_code code = GET_CODE (op); | |
2431 | enum machine_mode cc_mode; | |
2432 | int cc_regnum; | |
2433 | int base_bit; | |
2434 | ||
2435 | if (GET_RTX_CLASS (code) != '<') | |
2436 | return -1; | |
2437 | ||
2438 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2439 | cc_regnum = REGNO (XEXP (op, 0)); | |
2440 | base_bit = 4 * (cc_regnum - 68); | |
2441 | ||
c5defebb RK |
2442 | /* In CCEQmode cases we have made sure that the result is always in the |
2443 | third bit of the CR field. */ | |
2444 | ||
2445 | if (cc_mode == CCEQmode) | |
2446 | return base_bit + 3; | |
2447 | ||
9878760c RK |
2448 | switch (code) |
2449 | { | |
2450 | case NE: | |
2451 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2452 | case EQ: | |
2453 | return base_bit + 2; | |
2454 | case GT: case GTU: | |
2455 | return base_bit + 1; | |
2456 | case LT: case LTU: | |
2457 | return base_bit; | |
2458 | ||
2459 | case GE: case GEU: | |
2460 | /* If floating-point, we will have done a cror to put the bit in the | |
2461 | unordered position. So test that bit. For integer, this is ! LT | |
2462 | unless this is an scc insn. */ | |
2463 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2464 | ||
2465 | case LE: case LEU: | |
2466 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2467 | ||
2468 | default: | |
2469 | abort (); | |
2470 | } | |
2471 | } | |
1ff7789b | 2472 | \f |
8d30c4ee | 2473 | /* Return the GOT register. */ |
1ff7789b MM |
2474 | |
2475 | struct rtx_def * | |
2476 | rs6000_got_register (value) | |
0865c631 | 2477 | rtx value; |
1ff7789b | 2478 | { |
8d30c4ee FS |
2479 | /* The second flow pass currently (June 1999) can't update regs_ever_live |
2480 | without disturbing other parts of the compiler, so update it here to | |
2481 | make the prolog/epilogue code happy. */ | |
3cb999d8 | 2482 | if (no_new_pseudos && ! regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) |
8d30c4ee | 2483 | regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; |
1ff7789b | 2484 | |
8d30c4ee | 2485 | current_function_uses_pic_offset_table = 1; |
3cb999d8 | 2486 | |
1ff7789b MM |
2487 | return pic_offset_table_rtx; |
2488 | } | |
2489 | ||
956d6950 | 2490 | /* Search for any occurrence of the GOT_TOC register marker that should |
8d30c4ee FS |
2491 | have been eliminated, but may have crept back in. |
2492 | ||
2493 | This function could completely go away now (June 1999), but we leave it | |
2494 | in for a while until all the possible issues with the new -fpic handling | |
2495 | are resolved. */ | |
30ea98f1 MM |
2496 | |
2497 | void | |
2498 | rs6000_reorg (insn) | |
2499 | rtx insn; | |
2500 | { | |
2501 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2502 | { | |
8d30c4ee | 2503 | rtx got_reg = gen_rtx_REG (Pmode, 2); |
30ea98f1 MM |
2504 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) |
2505 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2506 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2507 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2508 | } | |
2509 | } | |
2510 | ||
a7df97e6 MM |
2511 | \f |
2512 | /* Define the structure for the machine field in struct function. */ | |
2513 | struct machine_function | |
2514 | { | |
2515 | int sysv_varargs_p; | |
2516 | int save_toc_p; | |
2517 | int fpmem_size; | |
2518 | int fpmem_offset; | |
2519 | }; | |
2520 | ||
2521 | /* Functions to save and restore rs6000_fpmem_size. | |
2522 | These will be called, via pointer variables, | |
2523 | from push_function_context and pop_function_context. */ | |
2524 | ||
2525 | void | |
2526 | rs6000_save_machine_status (p) | |
2527 | struct function *p; | |
2528 | { | |
2529 | struct machine_function *machine = | |
2530 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2531 | ||
2532 | p->machine = machine; | |
2533 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2534 | machine->fpmem_size = rs6000_fpmem_size; |
2535 | machine->fpmem_offset = rs6000_fpmem_offset; | |
2536 | } | |
2537 | ||
2538 | void | |
2539 | rs6000_restore_machine_status (p) | |
2540 | struct function *p; | |
2541 | { | |
2542 | struct machine_function *machine = p->machine; | |
2543 | ||
2544 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2545 | rs6000_fpmem_size = machine->fpmem_size; |
2546 | rs6000_fpmem_offset = machine->fpmem_offset; | |
2547 | ||
2548 | free (machine); | |
2549 | p->machine = (struct machine_function *)0; | |
2550 | } | |
2551 | ||
2552 | /* Do anything needed before RTL is emitted for each function. */ | |
2553 | ||
2554 | void | |
2555 | rs6000_init_expanders () | |
2556 | { | |
2557 | /* Reset varargs and save TOC indicator */ | |
2558 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2559 | rs6000_fpmem_size = 0; |
2560 | rs6000_fpmem_offset = 0; | |
a7df97e6 MM |
2561 | |
2562 | /* Arrange to save and restore machine status around nested functions. */ | |
2563 | save_machine_status = rs6000_save_machine_status; | |
2564 | restore_machine_status = rs6000_restore_machine_status; | |
2565 | } | |
2566 | ||
9878760c RK |
2567 | \f |
2568 | /* Print an operand. Recognize special options, documented below. */ | |
2569 | ||
38c1f2d7 | 2570 | #if TARGET_ELF |
d9407988 | 2571 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2572 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2573 | #else |
2574 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2575 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2576 | #endif |
2577 | ||
9878760c RK |
2578 | void |
2579 | print_operand (file, x, code) | |
2580 | FILE *file; | |
2581 | rtx x; | |
2582 | char code; | |
2583 | { | |
2584 | int i; | |
a260abc9 | 2585 | HOST_WIDE_INT val; |
9878760c RK |
2586 | |
2587 | /* These macros test for integers and extract the low-order bits. */ | |
2588 | #define INT_P(X) \ | |
2589 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2590 | && GET_MODE (X) == VOIDmode) | |
2591 | ||
2592 | #define INT_LOWPART(X) \ | |
2593 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2594 | ||
2595 | switch (code) | |
2596 | { | |
a8b3aeda | 2597 | case '.': |
a85d226b RK |
2598 | /* Write out an instruction after the call which may be replaced |
2599 | with glue code by the loader. This depends on the AIX version. */ | |
2600 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2601 | return; |
2602 | ||
cfaaaf2e RK |
2603 | case '*': |
2604 | /* Write the register number of the TOC register. */ | |
8d30c4ee | 2605 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file); |
cfaaaf2e RK |
2606 | return; |
2607 | ||
c81bebd7 MM |
2608 | case '$': |
2609 | /* Write out either a '.' or '$' for the current location, depending | |
2610 | on whether this is Solaris or not. */ | |
2611 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2612 | return; | |
2613 | ||
9854d9ed RK |
2614 | case 'A': |
2615 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2616 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2617 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2618 | write a trash instruction. */ |
2619 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2620 | putc ('l', file); |
9854d9ed | 2621 | else |
76229ac8 | 2622 | putc ('r', file); |
9854d9ed RK |
2623 | return; |
2624 | ||
2625 | case 'b': | |
2626 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2627 | if (! INT_P (x)) |
9854d9ed | 2628 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2629 | |
0865c631 | 2630 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2631 | return; |
2632 | ||
a260abc9 DE |
2633 | case 'B': |
2634 | /* If the low-order bit is zero, write 'r'; otherwise, write 'l' | |
2635 | for 64-bit mask direction. */ | |
296b8152 | 2636 | putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); |
a238cd8b | 2637 | return; |
a260abc9 | 2638 | |
9854d9ed RK |
2639 | case 'C': |
2640 | /* This is an optional cror needed for LE or GE floating-point | |
2641 | comparisons. Otherwise write nothing. */ | |
2642 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2643 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2644 | { | |
2645 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2646 | ||
2647 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2648 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2649 | } | |
2650 | return; | |
2651 | ||
2652 | case 'D': | |
2653 | /* Similar, except that this is for an scc, so we must be able to | |
2654 | encode the test in a single bit that is one. We do the above | |
2655 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2656 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2657 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2658 | { | |
2659 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2660 | ||
2661 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2662 | base_bit + 2, | |
2663 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2664 | } | |
2665 | ||
2666 | else if (GET_CODE (x) == NE) | |
2667 | { | |
2668 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2669 | ||
2670 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2671 | base_bit + 2, base_bit + 2); | |
2672 | } | |
2673 | return; | |
2674 | ||
2675 | case 'E': | |
2676 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2677 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2678 | output_operand_lossage ("invalid %%E value"); | |
2679 | ||
2680 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2681 | return; |
9854d9ed RK |
2682 | |
2683 | case 'f': | |
2684 | /* X is a CR register. Print the shift count needed to move it | |
2685 | to the high-order four bits. */ | |
2686 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2687 | output_operand_lossage ("invalid %%f value"); | |
2688 | else | |
2689 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2690 | return; | |
2691 | ||
2692 | case 'F': | |
2693 | /* Similar, but print the count for the rotate in the opposite | |
2694 | direction. */ | |
2695 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2696 | output_operand_lossage ("invalid %%F value"); | |
2697 | else | |
2698 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2699 | return; | |
2700 | ||
2701 | case 'G': | |
2702 | /* X is a constant integer. If it is negative, print "m", | |
2703 | otherwise print "z". This is to make a aze or ame insn. */ | |
2704 | if (GET_CODE (x) != CONST_INT) | |
2705 | output_operand_lossage ("invalid %%G value"); | |
2706 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2707 | putc ('z', file); |
9854d9ed | 2708 | else |
76229ac8 | 2709 | putc ('m', file); |
9854d9ed RK |
2710 | return; |
2711 | ||
9878760c | 2712 | case 'h': |
df3d94ed RK |
2713 | /* If constant, output low-order five bits. Otherwise, |
2714 | write normally. */ | |
9878760c | 2715 | if (INT_P (x)) |
0865c631 | 2716 | fprintf (file, "%d", INT_LOWPART (x) & 31); |
9878760c RK |
2717 | else |
2718 | print_operand (file, x, 0); | |
2719 | return; | |
2720 | ||
64305719 DE |
2721 | case 'H': |
2722 | /* If constant, output low-order six bits. Otherwise, | |
2723 | write normally. */ | |
2724 | if (INT_P (x)) | |
0865c631 | 2725 | fprintf (file, "%d", INT_LOWPART (x) & 63); |
64305719 DE |
2726 | else |
2727 | print_operand (file, x, 0); | |
2728 | return; | |
2729 | ||
9854d9ed RK |
2730 | case 'I': |
2731 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2732 | if (INT_P (x)) |
76229ac8 | 2733 | putc ('i', file); |
9878760c RK |
2734 | return; |
2735 | ||
9854d9ed RK |
2736 | case 'j': |
2737 | /* Write the bit number in CCR for jump. */ | |
2738 | i = ccr_bit (x, 0); | |
2739 | if (i == -1) | |
2740 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2741 | else |
9854d9ed | 2742 | fprintf (file, "%d", i); |
9878760c RK |
2743 | return; |
2744 | ||
9854d9ed RK |
2745 | case 'J': |
2746 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2747 | scc flag to `ccr_bit'. */ | |
2748 | i = ccr_bit (x, 1); | |
2749 | if (i == -1) | |
2750 | output_operand_lossage ("invalid %%J code"); | |
2751 | else | |
a0466a68 RK |
2752 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2753 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2754 | return; |
2755 | ||
9854d9ed RK |
2756 | case 'k': |
2757 | /* X must be a constant. Write the 1's complement of the | |
2758 | constant. */ | |
9878760c | 2759 | if (! INT_P (x)) |
9854d9ed | 2760 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2761 | |
0865c631 | 2762 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2763 | return; |
2764 | ||
9854d9ed RK |
2765 | case 'L': |
2766 | /* Write second word of DImode or DFmode reference. Works on register | |
2767 | or non-indexed memory only. */ | |
2768 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2769 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2770 | else if (GET_CODE (x) == MEM) |
2771 | { | |
2772 | /* Handle possible auto-increment. Since it is pre-increment and | |
1427100a | 2773 | we have already done it, we can just use an offset of word. */ |
9854d9ed RK |
2774 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2775 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
19087b1c DE |
2776 | output_address (plus_constant_for_output (XEXP (XEXP (x, 0), 0), |
2777 | UNITS_PER_WORD)); | |
9854d9ed | 2778 | else |
19087b1c DE |
2779 | output_address (plus_constant_for_output (XEXP (x, 0), |
2780 | UNITS_PER_WORD)); | |
ba5e43aa | 2781 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2782 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2783 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2784 | } |
9878760c | 2785 | return; |
9854d9ed | 2786 | |
9878760c RK |
2787 | case 'm': |
2788 | /* MB value for a mask operand. */ | |
2789 | if (! mask_operand (x, VOIDmode)) | |
2790 | output_operand_lossage ("invalid %%m value"); | |
2791 | ||
2792 | val = INT_LOWPART (x); | |
2793 | ||
2794 | /* If the high bit is set and the low bit is not, the value is zero. | |
2795 | If the high bit is zero, the value is the first 1 bit we find from | |
2796 | the left. */ | |
34792e82 | 2797 | if ((val & 0x80000000) && ((val & 1) == 0)) |
9878760c | 2798 | { |
19d2d16f | 2799 | putc ('0', file); |
9878760c RK |
2800 | return; |
2801 | } | |
34792e82 | 2802 | else if ((val & 0x80000000) == 0) |
9878760c RK |
2803 | { |
2804 | for (i = 1; i < 32; i++) | |
34792e82 | 2805 | if ((val <<= 1) & 0x80000000) |
9878760c RK |
2806 | break; |
2807 | fprintf (file, "%d", i); | |
2808 | return; | |
2809 | } | |
2810 | ||
2811 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2812 | number plus 1. We know the low-order bit is one. */ | |
2813 | for (i = 0; i < 32; i++) | |
2814 | if (((val >>= 1) & 1) == 0) | |
2815 | break; | |
2816 | ||
a260abc9 | 2817 | /* If we ended in ...01, i would be 0. The correct value is 31, so |
9878760c RK |
2818 | we want 31 - i. */ |
2819 | fprintf (file, "%d", 31 - i); | |
2820 | return; | |
2821 | ||
2822 | case 'M': | |
2823 | /* ME value for a mask operand. */ | |
2824 | if (! mask_operand (x, VOIDmode)) | |
a260abc9 | 2825 | output_operand_lossage ("invalid %%M value"); |
9878760c RK |
2826 | |
2827 | val = INT_LOWPART (x); | |
2828 | ||
2829 | /* If the low bit is set and the high bit is not, the value is 31. | |
2830 | If the low bit is zero, the value is the first 1 bit we find from | |
2831 | the right. */ | |
34792e82 | 2832 | if ((val & 1) && ((val & 0x80000000) == 0)) |
9878760c | 2833 | { |
76229ac8 | 2834 | fputs ("31", file); |
9878760c RK |
2835 | return; |
2836 | } | |
2837 | else if ((val & 1) == 0) | |
2838 | { | |
2839 | for (i = 0; i < 32; i++) | |
2840 | if ((val >>= 1) & 1) | |
2841 | break; | |
2842 | ||
a260abc9 | 2843 | /* If we had ....10, i would be 0. The result should be |
9878760c RK |
2844 | 30, so we need 30 - i. */ |
2845 | fprintf (file, "%d", 30 - i); | |
2846 | return; | |
2847 | } | |
2848 | ||
2849 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2850 | number minus 1. We know the high-order bit is one. */ | |
2851 | for (i = 0; i < 32; i++) | |
34792e82 | 2852 | if (((val <<= 1) & 0x80000000) == 0) |
9878760c RK |
2853 | break; |
2854 | ||
2855 | fprintf (file, "%d", i); | |
2856 | return; | |
2857 | ||
9878760c RK |
2858 | case 'N': |
2859 | /* Write the number of elements in the vector times 4. */ | |
2860 | if (GET_CODE (x) != PARALLEL) | |
2861 | output_operand_lossage ("invalid %%N value"); | |
2862 | ||
2863 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2864 | return; | |
2865 | ||
2866 | case 'O': | |
2867 | /* Similar, but subtract 1 first. */ | |
2868 | if (GET_CODE (x) != PARALLEL) | |
1427100a | 2869 | output_operand_lossage ("invalid %%O value"); |
9878760c RK |
2870 | |
2871 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2872 | return; | |
2873 | ||
9854d9ed RK |
2874 | case 'p': |
2875 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2876 | if (! INT_P (x) | |
2877 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2878 | output_operand_lossage ("invalid %%p value"); | |
2879 | ||
2880 | fprintf (file, "%d", i); | |
2881 | return; | |
2882 | ||
9878760c RK |
2883 | case 'P': |
2884 | /* The operand must be an indirect memory reference. The result | |
2885 | is the register number. */ | |
2886 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2887 | || REGNO (XEXP (x, 0)) >= 32) | |
2888 | output_operand_lossage ("invalid %%P value"); | |
2889 | ||
2890 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2891 | return; | |
2892 | ||
9854d9ed RK |
2893 | case 'R': |
2894 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2895 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2896 | output_operand_lossage ("invalid %%R value"); | |
2897 | else | |
2898 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2899 | return; |
9854d9ed RK |
2900 | |
2901 | case 's': | |
2902 | /* Low 5 bits of 32 - value */ | |
2903 | if (! INT_P (x)) | |
2904 | output_operand_lossage ("invalid %%s value"); | |
2905 | ||
0865c631 | 2906 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); |
9878760c | 2907 | return; |
9854d9ed | 2908 | |
a260abc9 DE |
2909 | case 'S': |
2910 | /* PowerPC64 mask position. All 0's and all 1's are excluded. | |
2911 | CONST_INT 32-bit mask is considered sign-extended so any | |
2912 | transition must occur within the CONST_INT, not on the boundary. */ | |
2913 | if (! mask64_operand (x, VOIDmode)) | |
2914 | output_operand_lossage ("invalid %%S value"); | |
2915 | ||
2916 | val = INT_LOWPART (x); | |
2917 | ||
2918 | if (val & 1) /* Clear Left */ | |
2919 | { | |
a238cd8b DE |
2920 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2921 | if (!((val >>= 1) & 1)) | |
2922 | break; | |
a260abc9 | 2923 | |
a238cd8b DE |
2924 | #if HOST_BITS_PER_WIDE_INT == 32 |
2925 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) | |
2926 | { | |
2927 | val = CONST_DOUBLE_HIGH (x); | |
2928 | ||
2929 | if (val == 0) | |
2930 | --i; | |
2931 | else | |
2932 | for (i = 32; i < 64; i++) | |
2933 | if (!((val >>= 1) & 1)) | |
2934 | break; | |
2935 | } | |
a260abc9 | 2936 | #endif |
a238cd8b DE |
2937 | /* i = index of last set bit from right |
2938 | mask begins at 63 - i from left */ | |
2939 | if (i > 63) | |
2940 | output_operand_lossage ("%%S computed all 1's mask"); | |
a260abc9 DE |
2941 | fprintf (file, "%d", 63 - i); |
2942 | return; | |
2943 | } | |
2944 | else /* Clear Right */ | |
2945 | { | |
a238cd8b DE |
2946 | for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) |
2947 | if ((val >>= 1) & 1) | |
2948 | break; | |
a260abc9 | 2949 | |
a238cd8b | 2950 | #if HOST_BITS_PER_WIDE_INT == 32 |
a260abc9 DE |
2951 | if (GET_CODE (x) == CONST_DOUBLE && i == 32) |
2952 | { | |
a238cd8b | 2953 | val = CONST_DOUBLE_HIGH (x); |
a260abc9 | 2954 | |
a238cd8b | 2955 | if (val == (HOST_WIDE_INT) -1) |
a260abc9 | 2956 | --i; |
a260abc9 | 2957 | else |
a238cd8b DE |
2958 | for (i = 32; i < 64; i++) |
2959 | if ((val >>= 1) & 1) | |
a260abc9 DE |
2960 | break; |
2961 | } | |
2962 | #endif | |
a238cd8b DE |
2963 | /* i = index of last clear bit from right |
2964 | mask ends at 62 - i from left */ | |
2965 | if (i > 62) | |
2966 | output_operand_lossage ("%%S computed all 0's mask"); | |
2967 | fprintf (file, "%d", 62 - i); | |
a260abc9 DE |
2968 | return; |
2969 | } | |
2970 | ||
9878760c RK |
2971 | case 't': |
2972 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2973 | All floating-point operations except NE branch true and integer | |
2974 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2975 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2976 | output_operand_lossage ("invalid %%t value"); | |
2977 | ||
2978 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2979 | && GET_CODE (x) != NE) | |
2980 | || GET_CODE (x) == EQ | |
2981 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2982 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2983 | fputs ("12", file); |
9878760c | 2984 | else |
76229ac8 | 2985 | putc ('4', file); |
9878760c RK |
2986 | return; |
2987 | ||
2988 | case 'T': | |
2989 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2990 | 12 otherwise. */ | |
2991 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
1427100a | 2992 | output_operand_lossage ("invalid %%T value"); |
9878760c RK |
2993 | |
2994 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2995 | && GET_CODE (x) != NE) | |
2996 | || GET_CODE (x) == EQ | |
2997 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2998 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2999 | putc ('4', file); |
9878760c | 3000 | else |
76229ac8 | 3001 | fputs ("12", file); |
9878760c RK |
3002 | return; |
3003 | ||
9854d9ed | 3004 | case 'u': |
802a0058 | 3005 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
3006 | if (! INT_P (x)) |
3007 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 3008 | |
0865c631 | 3009 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
3010 | return; |
3011 | ||
802a0058 MM |
3012 | case 'v': |
3013 | /* High-order 16 bits of constant for use in signed operand. */ | |
3014 | if (! INT_P (x)) | |
3015 | output_operand_lossage ("invalid %%v value"); | |
3016 | ||
3017 | { | |
3018 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
3019 | ||
9615f239 | 3020 | /* Solaris assembler doesn't like lis 0,0x8000 */ |
802a0058 MM |
3021 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) |
3022 | fprintf (file, "%d", value | (~0 << 16)); | |
3023 | else | |
3024 | fprintf (file, "0x%x", value); | |
3025 | return; | |
3026 | } | |
3027 | ||
9854d9ed RK |
3028 | case 'U': |
3029 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
3030 | if (GET_CODE (x) == MEM | |
3031 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3032 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 3033 | putc ('u', file); |
9854d9ed | 3034 | return; |
9878760c | 3035 | |
e0cd0770 JC |
3036 | case 'V': |
3037 | /* Print the trap code for this operand. */ | |
3038 | switch (GET_CODE (x)) | |
3039 | { | |
3040 | case EQ: | |
3041 | fputs ("eq", file); /* 4 */ | |
3042 | break; | |
3043 | case NE: | |
3044 | fputs ("ne", file); /* 24 */ | |
3045 | break; | |
3046 | case LT: | |
3047 | fputs ("lt", file); /* 16 */ | |
3048 | break; | |
3049 | case LE: | |
3050 | fputs ("le", file); /* 20 */ | |
3051 | break; | |
3052 | case GT: | |
3053 | fputs ("gt", file); /* 8 */ | |
3054 | break; | |
3055 | case GE: | |
3056 | fputs ("ge", file); /* 12 */ | |
3057 | break; | |
3058 | case LTU: | |
3059 | fputs ("llt", file); /* 2 */ | |
3060 | break; | |
3061 | case LEU: | |
3062 | fputs ("lle", file); /* 6 */ | |
3063 | break; | |
3064 | case GTU: | |
3065 | fputs ("lgt", file); /* 1 */ | |
3066 | break; | |
3067 | case GEU: | |
3068 | fputs ("lge", file); /* 5 */ | |
3069 | break; | |
3070 | default: | |
3071 | abort (); | |
3072 | } | |
3073 | break; | |
3074 | ||
9854d9ed RK |
3075 | case 'w': |
3076 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
3077 | normally. */ | |
3078 | if (INT_P (x)) | |
0865c631 | 3079 | fprintf (file, "%d", ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000); |
9854d9ed RK |
3080 | else |
3081 | print_operand (file, x, 0); | |
9878760c RK |
3082 | return; |
3083 | ||
9854d9ed RK |
3084 | case 'W': |
3085 | /* If constant, low-order 16 bits of constant, unsigned. | |
3086 | Otherwise, write normally. */ | |
3087 | if (INT_P (x)) | |
0865c631 | 3088 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
9854d9ed RK |
3089 | else |
3090 | print_operand (file, x, 0); | |
3091 | return; | |
9878760c | 3092 | |
9854d9ed RK |
3093 | case 'X': |
3094 | if (GET_CODE (x) == MEM | |
3095 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 3096 | putc ('x', file); |
9854d9ed | 3097 | return; |
9878760c | 3098 | |
9854d9ed RK |
3099 | case 'Y': |
3100 | /* Like 'L', for third word of TImode */ | |
3101 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3102 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 3103 | else if (GET_CODE (x) == MEM) |
9878760c | 3104 | { |
9854d9ed RK |
3105 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
3106 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3107 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 3108 | else |
a54d04b7 | 3109 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 3110 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3111 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3112 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
3113 | } |
3114 | return; | |
9854d9ed | 3115 | |
9878760c | 3116 | case 'z': |
b4ac57ab RS |
3117 | /* X is a SYMBOL_REF. Write out the name preceded by a |
3118 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
3119 | names. If we are configured for System V (or the embedded ABI) on |
3120 | the PowerPC, do not emit the period, since those systems do not use | |
3121 | TOCs and the like. */ | |
9878760c RK |
3122 | if (GET_CODE (x) != SYMBOL_REF) |
3123 | abort (); | |
3124 | ||
b6c9286a MM |
3125 | if (XSTR (x, 0)[0] != '.') |
3126 | { | |
3127 | switch (DEFAULT_ABI) | |
3128 | { | |
3129 | default: | |
3130 | abort (); | |
3131 | ||
3132 | case ABI_AIX: | |
3133 | putc ('.', file); | |
3134 | break; | |
3135 | ||
3136 | case ABI_V4: | |
3137 | case ABI_AIX_NODESC: | |
c81bebd7 | 3138 | case ABI_SOLARIS: |
b6c9286a MM |
3139 | break; |
3140 | ||
3141 | case ABI_NT: | |
3142 | fputs ("..", file); | |
3143 | break; | |
3144 | } | |
3145 | } | |
9878760c RK |
3146 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
3147 | return; | |
3148 | ||
9854d9ed RK |
3149 | case 'Z': |
3150 | /* Like 'L', for last word of TImode. */ | |
3151 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 3152 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
3153 | else if (GET_CODE (x) == MEM) |
3154 | { | |
3155 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
3156 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 3157 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 3158 | else |
a54d04b7 | 3159 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 3160 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3161 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3162 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 3163 | } |
5c23c401 | 3164 | return; |
9854d9ed | 3165 | |
9878760c RK |
3166 | case 0: |
3167 | if (GET_CODE (x) == REG) | |
3168 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
3169 | else if (GET_CODE (x) == MEM) | |
3170 | { | |
3171 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
3172 | know the width from the mode. */ | |
3173 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
3174 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
3175 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3176 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
3177 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
3178 | REGNO (XEXP (XEXP (x, 0), 0))); | |
3179 | else | |
a54d04b7 | 3180 | output_address (XEXP (x, 0)); |
9878760c RK |
3181 | } |
3182 | else | |
a54d04b7 | 3183 | output_addr_const (file, x); |
a85d226b | 3184 | return; |
9878760c RK |
3185 | |
3186 | default: | |
3187 | output_operand_lossage ("invalid %%xn code"); | |
3188 | } | |
3189 | } | |
3190 | \f | |
3191 | /* Print the address of an operand. */ | |
3192 | ||
3193 | void | |
3194 | print_operand_address (file, x) | |
3195 | FILE *file; | |
3196 | register rtx x; | |
3197 | { | |
3198 | if (GET_CODE (x) == REG) | |
4697a36c | 3199 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 3200 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
3201 | { |
3202 | output_addr_const (file, x); | |
ba5e43aa | 3203 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
3204 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
3205 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 3206 | |
4697a36c | 3207 | #ifdef TARGET_NO_TOC |
7509c759 | 3208 | else if (TARGET_NO_TOC) |
4697a36c | 3209 | ; |
4697a36c | 3210 | #endif |
7509c759 | 3211 | else |
8d30c4ee | 3212 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]); |
9878760c RK |
3213 | } |
3214 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
3215 | { | |
3216 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
3217 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
3218 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 3219 | else |
4697a36c MM |
3220 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
3221 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
3222 | } |
3223 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
0865c631 | 3224 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
3cb999d8 DE |
3225 | #if TARGET_ELF |
3226 | else if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 0)) == REG | |
3227 | && CONSTANT_P (XEXP (x, 1))) | |
4697a36c MM |
3228 | { |
3229 | output_addr_const (file, XEXP (x, 1)); | |
3230 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
3231 | } | |
3cb999d8 | 3232 | #endif |
9878760c RK |
3233 | else |
3234 | abort (); | |
3235 | } | |
3236 | \f | |
3237 | /* This page contains routines that are used to determine what the function | |
3238 | prologue and epilogue code will do and write them out. */ | |
3239 | ||
3240 | /* Return the first fixed-point register that is required to be saved. 32 if | |
3241 | none. */ | |
3242 | ||
3243 | int | |
3244 | first_reg_to_save () | |
3245 | { | |
3246 | int first_reg; | |
3247 | ||
3248 | /* Find lowest numbered live register. */ | |
3249 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
3250 | if (regs_ever_live[first_reg]) | |
3251 | break; | |
3252 | ||
b5253831 DE |
3253 | if (profile_flag) |
3254 | { | |
3255 | /* AIX must save/restore every register that contains a parameter | |
3256 | before/after the .__mcount call plus an additional register | |
3257 | for the static chain, if needed; use registers from 30 down to 22 | |
3258 | to do this. */ | |
3259 | if (DEFAULT_ABI == ABI_AIX) | |
3260 | { | |
3261 | int last_parm_reg, profile_first_reg; | |
3262 | ||
3263 | /* Figure out last used parameter register. The proper thing | |
3264 | to do is to walk incoming args of the function. A function | |
3265 | might have live parameter registers even if it has no | |
3266 | incoming args. */ | |
3267 | for (last_parm_reg = 10; | |
3268 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
3269 | last_parm_reg--) | |
3270 | ; | |
3271 | ||
3272 | /* Calculate first reg for saving parameter registers | |
3273 | and static chain. | |
3274 | Skip reg 31 which may contain the frame pointer. */ | |
3275 | profile_first_reg = (33 - last_parm_reg | |
3276 | - (current_function_needs_context ? 1 : 0)); | |
3277 | /* Do not save frame pointer if no parameters needs to be saved. */ | |
3278 | if (profile_first_reg == 31) | |
3279 | profile_first_reg = 32; | |
3280 | ||
3281 | if (first_reg > profile_first_reg) | |
3282 | first_reg = profile_first_reg; | |
3283 | } | |
e165f3f0 | 3284 | |
b5253831 DE |
3285 | /* SVR4 may need one register to preserve the static chain. */ |
3286 | else if (current_function_needs_context) | |
3287 | { | |
3288 | /* Skip reg 31 which may contain the frame pointer. */ | |
3289 | if (first_reg > 30) | |
3290 | first_reg = 30; | |
3291 | } | |
3292 | } | |
e165f3f0 | 3293 | |
9878760c RK |
3294 | return first_reg; |
3295 | } | |
3296 | ||
3297 | /* Similar, for FP regs. */ | |
3298 | ||
3299 | int | |
3300 | first_fp_reg_to_save () | |
3301 | { | |
3302 | int first_reg; | |
3303 | ||
3304 | /* Find lowest numbered live register. */ | |
3305 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
3306 | if (regs_ever_live[first_reg]) | |
3307 | break; | |
3308 | ||
3309 | return first_reg; | |
3310 | } | |
3311 | ||
9878760c RK |
3312 | /* Return non-zero if this function makes calls. */ |
3313 | ||
3314 | int | |
3315 | rs6000_makes_calls () | |
3316 | { | |
3317 | rtx insn; | |
3318 | ||
38c1f2d7 MM |
3319 | /* If we are profiling, we will be making a call to __mcount. |
3320 | Under the System V ABI's, we store the LR directly, so | |
3321 | we don't need to do it here. */ | |
3322 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
3323 | return 1; |
3324 | ||
9878760c RK |
3325 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
3326 | if (GET_CODE (insn) == CALL_INSN) | |
3327 | return 1; | |
3328 | ||
3329 | return 0; | |
3330 | } | |
3331 | ||
4697a36c MM |
3332 | \f |
3333 | /* Calculate the stack information for the current function. This is | |
3334 | complicated by having two separate calling sequences, the AIX calling | |
3335 | sequence and the V.4 calling sequence. | |
3336 | ||
3337 | AIX stack frames look like: | |
a260abc9 | 3338 | 32-bit 64-bit |
4697a36c | 3339 | SP----> +---------------------------------------+ |
a260abc9 | 3340 | | back chain to caller | 0 0 |
4697a36c | 3341 | +---------------------------------------+ |
a260abc9 | 3342 | | saved CR | 4 8 (8-11) |
4697a36c | 3343 | +---------------------------------------+ |
a260abc9 | 3344 | | saved LR | 8 16 |
4697a36c | 3345 | +---------------------------------------+ |
a260abc9 | 3346 | | reserved for compilers | 12 24 |
4697a36c | 3347 | +---------------------------------------+ |
a260abc9 | 3348 | | reserved for binders | 16 32 |
4697a36c | 3349 | +---------------------------------------+ |
a260abc9 | 3350 | | saved TOC pointer | 20 40 |
4697a36c | 3351 | +---------------------------------------+ |
a260abc9 | 3352 | | Parameter save area (P) | 24 48 |
4697a36c | 3353 | +---------------------------------------+ |
a260abc9 | 3354 | | Alloca space (A) | 24+P etc. |
802a0058 | 3355 | +---------------------------------------+ |
a7df97e6 | 3356 | | Local variable space (L) | 24+P+A |
4697a36c | 3357 | +---------------------------------------+ |
a7df97e6 | 3358 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3359 | +---------------------------------------+ |
a7df97e6 | 3360 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3361 | +---------------------------------------+ |
a7df97e6 | 3362 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3363 | +---------------------------------------+ |
3364 | old SP->| back chain to caller's caller | | |
3365 | +---------------------------------------+ | |
3366 | ||
5376a30c KR |
3367 | The required alignment for AIX configurations is two words (i.e., 8 |
3368 | or 16 bytes). | |
3369 | ||
3370 | ||
4697a36c MM |
3371 | V.4 stack frames look like: |
3372 | ||
3373 | SP----> +---------------------------------------+ | |
3374 | | back chain to caller | 0 | |
3375 | +---------------------------------------+ | |
5eb387b8 | 3376 | | caller's saved LR | 4 |
4697a36c MM |
3377 | +---------------------------------------+ |
3378 | | Parameter save area (P) | 8 | |
3379 | +---------------------------------------+ | |
a7df97e6 MM |
3380 | | Alloca space (A) | 8+P |
3381 | +---------------------------------------+ | |
3382 | | Varargs save area (V) | 8+P+A | |
3383 | +---------------------------------------+ | |
3384 | | Local variable space (L) | 8+P+A+V | |
3385 | +---------------------------------------+ | |
3386 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3387 | +---------------------------------------+ |
a7df97e6 MM |
3388 | | saved CR (C) | 8+P+A+V+L+X |
3389 | +---------------------------------------+ | |
3390 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3391 | +---------------------------------------+ | |
3392 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3393 | +---------------------------------------+ |
3394 | old SP->| back chain to caller's caller | | |
3395 | +---------------------------------------+ | |
b6c9286a | 3396 | |
5376a30c KR |
3397 | The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is |
3398 | given. (But note below and in sysv4.h that we require only 8 and | |
3399 | may round up the size of our stack frame anyways. The historical | |
3400 | reason is early versions of powerpc-linux which didn't properly | |
3401 | align the stack at program startup. A happy side-effect is that | |
3402 | -mno-eabi libraries can be used with -meabi programs.) | |
3403 | ||
b6c9286a MM |
3404 | |
3405 | A PowerPC Windows/NT frame looks like: | |
3406 | ||
3407 | SP----> +---------------------------------------+ | |
3408 | | back chain to caller | 0 | |
3409 | +---------------------------------------+ | |
3410 | | reserved | 4 | |
3411 | +---------------------------------------+ | |
3412 | | reserved | 8 | |
3413 | +---------------------------------------+ | |
3414 | | reserved | 12 | |
3415 | +---------------------------------------+ | |
3416 | | reserved | 16 | |
3417 | +---------------------------------------+ | |
3418 | | reserved | 20 | |
3419 | +---------------------------------------+ | |
3420 | | Parameter save area (P) | 24 | |
3421 | +---------------------------------------+ | |
a7df97e6 MM |
3422 | | Alloca space (A) | 24+P |
3423 | +---------------------------------------+ | |
3424 | | Local variable space (L) | 24+P+A | |
3425 | +---------------------------------------+ | |
3426 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3427 | +---------------------------------------+ |
a7df97e6 MM |
3428 | | Save area for FP registers (F) | 24+P+A+L+X |
3429 | +---------------------------------------+ | |
3430 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3431 | +---------------------------------------+ | |
3432 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3433 | +---------------------------------------+ | |
3434 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3435 | +---------------------------------------+ | |
3436 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3437 | +---------------------------------------+ | |
3438 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3439 | +---------------------------------------+ |
3440 | old SP->| back chain to caller's caller | | |
3441 | +---------------------------------------+ | |
3442 | ||
3443 | For NT, there is no specific order to save the registers, but in | |
3444 | order to support __builtin_return_address, the save area for the | |
3445 | link register needs to be in a known place, so we use -4 off of the | |
3446 | old SP. To support calls through pointers, we also allocate a | |
5376a30c KR |
3447 | fixed slot to store the TOC, -8 off the old SP. |
3448 | ||
3449 | The required alignment for NT is 16 bytes. | |
3450 | ||
3451 | ||
3452 | The EABI configuration defaults to the V.4 layout, unless | |
3453 | -mcall-aix is used, in which case the AIX layout is used. However, | |
3454 | the stack alignment requirements may differ. If -mno-eabi is not | |
3455 | given, the required stack alignment is 8 bytes; if -mno-eabi is | |
3456 | given, the required alignment is 16 bytes. (But see V.4 comment | |
3457 | above.) */ | |
4697a36c | 3458 | |
61b2fbe7 MM |
3459 | #ifndef ABI_STACK_BOUNDARY |
3460 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3461 | #endif | |
3462 | ||
4697a36c MM |
3463 | rs6000_stack_t * |
3464 | rs6000_stack_info () | |
3465 | { | |
3466 | static rs6000_stack_t info, zero_info; | |
3467 | rs6000_stack_t *info_ptr = &info; | |
a260abc9 | 3468 | int reg_size = TARGET_32BIT ? 4 : 8; |
24d304eb | 3469 | enum rs6000_abi abi; |
b6c9286a | 3470 | int total_raw_size; |
4697a36c MM |
3471 | |
3472 | /* Zero all fields portably */ | |
3473 | info = zero_info; | |
3474 | ||
3475 | /* Select which calling sequence */ | |
b6c9286a | 3476 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3477 | |
4697a36c MM |
3478 | /* Calculate which registers need to be saved & save area size */ |
3479 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3480 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3481 | ||
3482 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3483 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3484 | ||
3485 | /* Does this function call anything? */ | |
3486 | info_ptr->calls_p = rs6000_makes_calls (); | |
3487 | ||
62c0fb87 | 3488 | /* Allocate space to save the toc. */ |
82280d5e | 3489 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3490 | { |
3491 | info_ptr->toc_save_p = 1; | |
3492 | info_ptr->toc_size = reg_size; | |
3493 | } | |
3494 | ||
802a0058 MM |
3495 | /* Does this machine need the float/int conversion area? */ |
3496 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3497 | ||
b6c9286a MM |
3498 | /* If this is main and we need to call a function to set things up, |
3499 | save main's arguments around the call. */ | |
c81bebd7 MM |
3500 | #ifdef TARGET_EABI |
3501 | if (TARGET_EABI) | |
3502 | #endif | |
b6c9286a | 3503 | { |
30ccf55d MS |
3504 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3505 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3506 | { |
c81bebd7 | 3507 | info_ptr->main_p = 1; |
b6c9286a | 3508 | |
c81bebd7 MM |
3509 | #ifdef NAME__MAIN |
3510 | info_ptr->calls_p = 1; | |
b6c9286a | 3511 | |
c81bebd7 | 3512 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3513 | { |
c81bebd7 MM |
3514 | int i; |
3515 | tree arg; | |
3516 | ||
3517 | info_ptr->main_save_p = 1; | |
3518 | info_ptr->main_size = 0; | |
3519 | ||
3520 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3521 | arg != NULL_TREE && i < 8; | |
3522 | (arg = TREE_CHAIN (arg)), i++) | |
3523 | { | |
3524 | info_ptr->main_size += reg_size; | |
3525 | } | |
b6c9286a | 3526 | } |
b6c9286a | 3527 | #endif |
c81bebd7 | 3528 | } |
b6c9286a MM |
3529 | } |
3530 | ||
4697a36c | 3531 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3532 | if (regs_ever_live[65] |
3533 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3534 | #ifdef TARGET_RELOCATABLE |
3535 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3536 | #endif | |
3537 | || (info_ptr->first_fp_reg_save != 64 | |
3538 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3539 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3540 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3541 | || info_ptr->calls_p) |
3542 | { | |
3543 | info_ptr->lr_save_p = 1; | |
3544 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3545 | if (abi == ABI_NT) |
3546 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3547 | } |
3548 | ||
3549 | /* Determine if we need to save the condition code registers */ | |
3550 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3551 | { | |
3552 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3553 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3554 | info_ptr->cr_size = reg_size; |
3555 | } | |
3556 | ||
3557 | /* Determine various sizes */ | |
3558 | info_ptr->reg_size = reg_size; | |
3559 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3560 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3561 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3562 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3563 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3564 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3565 | + info_ptr->gp_size |
3566 | + info_ptr->cr_size | |
3567 | + info_ptr->lr_size | |
3568 | + info_ptr->toc_size | |
3569 | + info_ptr->main_size, 8); | |
3570 | ||
4697a36c | 3571 | /* Calculate the offsets */ |
24d304eb | 3572 | switch (abi) |
4697a36c | 3573 | { |
b6c9286a | 3574 | case ABI_NONE: |
24d304eb | 3575 | default: |
b6c9286a MM |
3576 | abort (); |
3577 | ||
3578 | case ABI_AIX: | |
3579 | case ABI_AIX_NODESC: | |
3580 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3581 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3582 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
a260abc9 DE |
3583 | info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ |
3584 | info_ptr->lr_save_offset = 2*reg_size; | |
24d304eb RK |
3585 | break; |
3586 | ||
3587 | case ABI_V4: | |
c81bebd7 | 3588 | case ABI_SOLARIS: |
b6c9286a MM |
3589 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3590 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3591 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3592 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3593 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3594 | info_ptr->lr_save_offset = reg_size; |
3595 | break; | |
3596 | ||
3597 | case ABI_NT: | |
a260abc9 | 3598 | info_ptr->lr_save_offset = -reg_size; |
b6c9286a MM |
3599 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; |
3600 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3601 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3602 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3603 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
a260abc9 | 3604 | info_ptr->fp_save_offset -= reg_size; |
b6c9286a MM |
3605 | |
3606 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3607 | break; |
4697a36c MM |
3608 | } |
3609 | ||
34792e82 | 3610 | /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ |
ff381587 MM |
3611 | if (info_ptr->fpmem_p |
3612 | && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) | |
3613 | info_ptr->fpmem_size += reg_size; | |
3614 | ||
3615 | total_raw_size = (info_ptr->vars_size | |
3616 | + info_ptr->parm_size | |
3617 | + info_ptr->fpmem_size | |
3618 | + info_ptr->save_size | |
3619 | + info_ptr->varargs_size | |
3620 | + info_ptr->fixed_size); | |
3621 | ||
3622 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); | |
3623 | ||
3624 | /* Determine if we need to allocate any stack frame: | |
3625 | ||
3626 | For AIX we need to push the stack if a frame pointer is needed (because | |
3627 | the stack might be dynamically adjusted), if we are debugging, if we | |
3628 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3629 | are more than the space needed to save all non-volatile registers: | |
bfc79d3b | 3630 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved). |
ff381587 MM |
3631 | |
3632 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3633 | the debugger can handle stackless frames. */ | |
3634 | ||
3635 | if (info_ptr->calls_p) | |
3636 | info_ptr->push_p = 1; | |
3637 | ||
3638 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) | |
3639 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size | |
3640 | || (abi == ABI_NT ? info_ptr->lr_save_p | |
3641 | : info_ptr->calls_p)); | |
3642 | ||
3643 | else | |
3644 | info_ptr->push_p = (frame_pointer_needed | |
3645 | || write_symbols != NO_DEBUG | |
3646 | || ((total_raw_size - info_ptr->fixed_size) | |
bfc79d3b | 3647 | > (TARGET_32BIT ? 220 : 288))); |
ff381587 | 3648 | |
a7df97e6 | 3649 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3650 | { |
3651 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3652 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
a260abc9 DE |
3653 | rs6000_fpmem_offset = (info_ptr->push_p |
3654 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3655 | : info_ptr->fpmem_offset); | |
db72d7a1 DE |
3656 | } |
3657 | else | |
3658 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3659 | |
4697a36c | 3660 | /* Zero offsets if we're not saving those registers */ |
8dda1a21 | 3661 | if (info_ptr->fp_size == 0) |
4697a36c MM |
3662 | info_ptr->fp_save_offset = 0; |
3663 | ||
8dda1a21 | 3664 | if (info_ptr->gp_size == 0) |
4697a36c MM |
3665 | info_ptr->gp_save_offset = 0; |
3666 | ||
3667 | if (!info_ptr->lr_save_p) | |
3668 | info_ptr->lr_save_offset = 0; | |
3669 | ||
3670 | if (!info_ptr->cr_save_p) | |
3671 | info_ptr->cr_save_offset = 0; | |
3672 | ||
b6c9286a MM |
3673 | if (!info_ptr->toc_save_p) |
3674 | info_ptr->toc_save_offset = 0; | |
3675 | ||
3676 | if (!info_ptr->main_save_p) | |
3677 | info_ptr->main_save_offset = 0; | |
3678 | ||
4697a36c MM |
3679 | return info_ptr; |
3680 | } | |
3681 | ||
3682 | void | |
3683 | debug_stack_info (info) | |
3684 | rs6000_stack_t *info; | |
9878760c | 3685 | { |
d330fd93 | 3686 | const char *abi_string; |
24d304eb | 3687 | |
4697a36c MM |
3688 | if (!info) |
3689 | info = rs6000_stack_info (); | |
3690 | ||
3691 | fprintf (stderr, "\nStack information for function %s:\n", | |
3692 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3693 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3694 | : "<unknown>")); | |
3695 | ||
24d304eb RK |
3696 | switch (info->abi) |
3697 | { | |
b6c9286a MM |
3698 | default: abi_string = "Unknown"; break; |
3699 | case ABI_NONE: abi_string = "NONE"; break; | |
3700 | case ABI_AIX: abi_string = "AIX"; break; | |
3701 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3702 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3703 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3704 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3705 | } |
3706 | ||
3707 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3708 | ||
4697a36c MM |
3709 | if (info->first_gp_reg_save != 32) |
3710 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3711 | ||
3712 | if (info->first_fp_reg_save != 64) | |
3713 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3714 | |
4697a36c MM |
3715 | if (info->lr_save_p) |
3716 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3717 | |
4697a36c MM |
3718 | if (info->cr_save_p) |
3719 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3720 | ||
b6c9286a MM |
3721 | if (info->toc_save_p) |
3722 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3723 | ||
4697a36c MM |
3724 | if (info->push_p) |
3725 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3726 | ||
3727 | if (info->calls_p) | |
3728 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3729 | ||
b6c9286a MM |
3730 | if (info->main_p) |
3731 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3732 | ||
3733 | if (info->main_save_p) | |
3734 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3735 | ||
802a0058 MM |
3736 | if (info->fpmem_p) |
3737 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3738 | ||
4697a36c MM |
3739 | if (info->gp_save_offset) |
3740 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3741 | ||
3742 | if (info->fp_save_offset) | |
3743 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3744 | ||
3745 | if (info->lr_save_offset) | |
3746 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3747 | ||
3748 | if (info->cr_save_offset) | |
3749 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3750 | ||
b6c9286a MM |
3751 | if (info->toc_save_offset) |
3752 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3753 | ||
4697a36c MM |
3754 | if (info->varargs_save_offset) |
3755 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3756 | ||
b6c9286a MM |
3757 | if (info->main_save_offset) |
3758 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3759 | ||
802a0058 MM |
3760 | if (info->fpmem_offset) |
3761 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3762 | ||
4697a36c MM |
3763 | if (info->total_size) |
3764 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3765 | ||
3766 | if (info->varargs_size) | |
3767 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3768 | ||
3769 | if (info->vars_size) | |
3770 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3771 | ||
3772 | if (info->parm_size) | |
3773 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3774 | ||
802a0058 MM |
3775 | if (info->fpmem_size) |
3776 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3777 | ||
4697a36c MM |
3778 | if (info->fixed_size) |
3779 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3780 | ||
3781 | if (info->gp_size) | |
3782 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3783 | ||
3784 | if (info->fp_size) | |
3785 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3786 | ||
b6c9286a MM |
3787 | if (info->lr_size) |
3788 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3789 | ||
4697a36c MM |
3790 | if (info->cr_size) |
3791 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3792 | ||
b6c9286a MM |
3793 | if (info->toc_size) |
3794 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3795 | ||
3796 | if (info->main_size) | |
3797 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3798 | ||
4697a36c MM |
3799 | if (info->save_size) |
3800 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3801 | ||
3802 | if (info->reg_size != 4) | |
3803 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3804 | ||
3805 | fprintf (stderr, "\n"); | |
9878760c | 3806 | } |
4697a36c | 3807 | \f |
c7ca610e RK |
3808 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3809 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3810 | a constant pool. */ | |
3811 | ||
3812 | void | |
38c1f2d7 | 3813 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3814 | FILE *file; |
38c1f2d7 | 3815 | int reg; |
c7ca610e RK |
3816 | { |
3817 | char buf[256]; | |
3818 | ||
3819 | #ifdef USING_SVR4_H | |
3820 | if (TARGET_RELOCATABLE) | |
3821 | { | |
3822 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3823 | fprintf (file, "\tbl "); | |
3824 | assemble_name (file, buf); | |
3825 | fprintf (file, "\n"); | |
3826 | ||
38c1f2d7 MM |
3827 | /* possibly create the toc section */ |
3828 | if (!toc_initialized) | |
3829 | { | |
3830 | toc_section (); | |
3831 | function_section (current_function_decl); | |
3832 | } | |
3833 | ||
3834 | /* If not first call in this function, we need to put the | |
3835 | different between .LCTOC1 and the address we get to right | |
3836 | after the bl. It will mess up disassembling the instructions | |
3837 | but that can't be helped. We will later need to bias the | |
3838 | address before loading. */ | |
3839 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3840 | { | |
d330fd93 | 3841 | const char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; |
38c1f2d7 MM |
3842 | char *buf_ptr; |
3843 | ||
3844 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3845 | ||
3846 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3847 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3848 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3849 | ||
3850 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3851 | fprintf (file, "%s\n", buf_ptr); | |
3852 | } | |
3853 | ||
c7ca610e | 3854 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3855 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3856 | ||
3857 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
a260abc9 DE |
3858 | asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], |
3859 | (TARGET_32BIT ? 4 : 8), reg_names[reg]); | |
c7ca610e | 3860 | |
a260abc9 DE |
3861 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", |
3862 | reg_names[0]); | |
38c1f2d7 | 3863 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e | 3864 | assemble_name (file, buf); |
949ea356 | 3865 | putc ('-', file); |
c7ca610e RK |
3866 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); |
3867 | assemble_name (file, buf); | |
38c1f2d7 | 3868 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3869 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3870 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3871 | rs6000_pic_labelno++; |
3872 | } | |
9615f239 | 3873 | else if (! TARGET_64BIT) |
c7ca610e RK |
3874 | { |
3875 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
a260abc9 | 3876 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); |
c7ca610e | 3877 | assemble_name (file, buf); |
dfdfa60f | 3878 | fputs ("@ha\n", file); |
a260abc9 DE |
3879 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); |
3880 | assemble_name (file, buf); | |
3881 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); | |
c7ca610e RK |
3882 | } |
3883 | else | |
3884 | abort (); | |
3885 | ||
3886 | #else /* !USING_SVR4_H */ | |
3887 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
13ded975 DE |
3888 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
3889 | reg_names[reg]); | |
c7ca610e RK |
3890 | assemble_name (file, buf); |
3891 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3892 | #endif /* USING_SVR4_H */ | |
3893 | } | |
3894 | ||
38c1f2d7 MM |
3895 | \f |
3896 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3897 | of the old frame is left in r12. */ | |
3898 | ||
3899 | void | |
3900 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3901 | FILE *file; | |
3902 | int size; | |
3903 | int copy_r12; | |
3904 | { | |
3905 | int neg_size = -size; | |
3906 | if (TARGET_UPDATE) | |
3907 | { | |
3908 | if (size < 32767) | |
3909 | asm_fprintf (file, | |
3910 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3911 | reg_names[1], neg_size, reg_names[1]); | |
3912 | else | |
3913 | { | |
3914 | if (copy_r12) | |
3915 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3916 | ||
9615f239 | 3917 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3918 | reg_names[0], (neg_size >> 16) & 0xffff, |
3919 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3920 | asm_fprintf (file, | |
3921 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3922 | reg_names[1], reg_names[1], reg_names[0]); | |
3923 | } | |
3924 | } | |
3925 | else | |
3926 | { | |
3927 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3928 | if (size < 32767) | |
aa4201ad | 3929 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
a260abc9 | 3930 | reg_names[1], neg_size, reg_names[1]); |
38c1f2d7 MM |
3931 | else |
3932 | { | |
9615f239 | 3933 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
38c1f2d7 MM |
3934 | reg_names[0], (neg_size >> 16) & 0xffff, |
3935 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3936 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3937 | reg_names[0], reg_names[1]); | |
3938 | } | |
3939 | ||
3940 | asm_fprintf (file, | |
3941 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3942 | reg_names[12], reg_names[1]); | |
3943 | } | |
3944 | } | |
3945 | ||
3946 | \f | |
9878760c | 3947 | /* Write function prologue. */ |
9878760c RK |
3948 | void |
3949 | output_prolog (file, size) | |
3950 | FILE *file; | |
296b8152 | 3951 | int size ATTRIBUTE_UNUSED; |
9878760c | 3952 | { |
4697a36c | 3953 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a | 3954 | int reg_size = info->reg_size; |
d330fd93 KG |
3955 | const char *store_reg; |
3956 | const char *load_reg; | |
979721f8 MM |
3957 | int sp_reg = 1; |
3958 | int sp_offset = 0; | |
b6c9286a | 3959 | |
8f802bfb | 3960 | if (TARGET_32BIT) |
b6c9286a | 3961 | { |
8f802bfb DE |
3962 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3963 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3964 | } |
3965 | else | |
3966 | { | |
8f802bfb DE |
3967 | store_reg = "\tstd %s,%d(%s)\n"; |
3968 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3969 | } |
9878760c | 3970 | |
4697a36c MM |
3971 | if (TARGET_DEBUG_STACK) |
3972 | debug_stack_info (info); | |
9878760c RK |
3973 | |
3974 | /* Write .extern for any function we will call to save and restore fp | |
3975 | values. */ | |
b6c9286a | 3976 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3977 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3978 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3979 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3980 | |
3981 | /* Write .extern for truncation routines, if needed. */ | |
3982 | if (rs6000_trunc_used && ! trunc_defined) | |
3983 | { | |
e138174b ILT |
3984 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3985 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3986 | trunc_defined = 1; |
3987 | } | |
4697a36c | 3988 | |
c764f757 RK |
3989 | /* Write .extern for AIX common mode routines, if needed. */ |
3990 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3991 | { | |
f6709c70 JW |
3992 | fputs ("\t.extern __mulh\n", file); |
3993 | fputs ("\t.extern __mull\n", file); | |
3994 | fputs ("\t.extern __divss\n", file); | |
3995 | fputs ("\t.extern __divus\n", file); | |
3996 | fputs ("\t.extern __quoss\n", file); | |
3997 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3998 | common_mode_defined = 1; |
3999 | } | |
9878760c | 4000 | |
979721f8 | 4001 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 4002 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
4003 | { |
4004 | if (info->total_size < 32767) | |
38c1f2d7 | 4005 | sp_offset = info->total_size; |
979721f8 | 4006 | else |
38c1f2d7 MM |
4007 | sp_reg = 12; |
4008 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
4009 | } |
4010 | ||
9878760c | 4011 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
4012 | if (info->lr_save_p) |
4013 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
4014 | |
4015 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 4016 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 4017 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
4018 | |
4019 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
4020 | ourself. Otherwise, call function. Note that since they are statically |
4021 | linked, we do not need a nop following them. */ | |
4697a36c | 4022 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 4023 | { |
4697a36c | 4024 | int regno = info->first_fp_reg_save; |
979721f8 | 4025 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4026 | |
4027 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4028 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 4029 | } |
4697a36c MM |
4030 | else if (info->first_fp_reg_save != 64) |
4031 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
4032 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
4033 | |
4034 | /* Now save gpr's. */ | |
4697a36c | 4035 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4036 | { |
4697a36c | 4037 | int regno = info->first_gp_reg_save; |
979721f8 | 4038 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 4039 | |
4697a36c | 4040 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4041 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4042 | } |
4043 | ||
4697a36c MM |
4044 | else if (info->first_gp_reg_save != 32) |
4045 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
4046 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4047 | info->gp_save_offset + sp_offset, |
4048 | reg_names[sp_reg]); | |
9878760c | 4049 | |
b6c9286a MM |
4050 | /* Save main's arguments if we need to call a function */ |
4051 | #ifdef NAME__MAIN | |
4052 | if (info->main_save_p) | |
4053 | { | |
4054 | int regno; | |
5ebfb2ba | 4055 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
4056 | int size = info->main_size; |
4057 | ||
2682eae9 | 4058 | for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) |
979721f8 | 4059 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
4060 | } |
4061 | #endif | |
4062 | ||
9878760c | 4063 | /* Save lr if we used it. */ |
4697a36c | 4064 | if (info->lr_save_p) |
979721f8 MM |
4065 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
4066 | reg_names[sp_reg]); | |
9878760c RK |
4067 | |
4068 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 4069 | if (info->cr_save_p) |
979721f8 MM |
4070 | { |
4071 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
4072 | { | |
4073 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
4074 | asm_fprintf (file, store_reg, reg_names[0], | |
4075 | info->cr_save_offset + sp_offset, | |
4076 | reg_names[sp_reg]); | |
4077 | } | |
4078 | else | |
4079 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
4080 | reg_names[sp_reg]); | |
4081 | } | |
9878760c | 4082 | |
8d30c4ee FS |
4083 | /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */ |
4084 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
4085 | && flag_pic == 1 && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) | |
4086 | { | |
4087 | if (!info->lr_save_p) | |
4088 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
4089 | ||
4090 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4091 | asm_fprintf (file, "\tmflr %s\n", reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
4092 | ||
4093 | if (!info->lr_save_p) | |
4094 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
4095 | } | |
4096 | ||
979721f8 MM |
4097 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
4098 | do it here. */ | |
4099 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
4100 | { | |
4101 | if (info->total_size < 32768) | |
4102 | { | |
4103 | int probe_offset = 4096; | |
4104 | while (probe_offset < info->total_size) | |
4105 | { | |
4106 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
4107 | probe_offset += 4096; | |
4108 | } | |
4109 | } | |
4110 | else | |
4111 | { | |
4112 | int probe_iterations = info->total_size / 4096; | |
4113 | static int probe_labelno = 0; | |
4114 | char buf[256]; | |
4115 | ||
4116 | if (probe_iterations < 32768) | |
4117 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
4118 | else | |
4119 | { | |
4120 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
4121 | if (probe_iterations & 0xffff) | |
4122 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
4123 | probe_iterations & 0xffff); | |
4124 | } | |
4125 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
4126 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
4127 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
4128 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 4129 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
4130 | fputs ("\tbdnz ", file); |
4131 | assemble_name (file, buf); | |
949ea356 | 4132 | putc ('\n', file); |
979721f8 MM |
4133 | } |
4134 | } | |
4135 | ||
38c1f2d7 | 4136 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 4137 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 4138 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
4139 | |
4140 | /* Set frame pointer, if needed. */ | |
4141 | if (frame_pointer_needed) | |
4697a36c | 4142 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 4143 | |
b6c9286a MM |
4144 | #ifdef NAME__MAIN |
4145 | /* If we need to call a function to set things up for main, do so now | |
4146 | before dealing with the TOC. */ | |
4147 | if (info->main_p) | |
4148 | { | |
d330fd93 | 4149 | const char *prefix = ""; |
b6c9286a MM |
4150 | |
4151 | switch (DEFAULT_ABI) | |
4152 | { | |
4153 | case ABI_AIX: prefix = "."; break; | |
4154 | case ABI_NT: prefix = ".."; break; | |
4155 | } | |
4156 | ||
4157 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
4158 | #ifdef RS6000_CALL_GLUE2 | |
4159 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
4160 | #else | |
4161 | #ifdef RS6000_CALL_GLUE | |
4162 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
13f1623b DE |
4163 | { |
4164 | putc('\t', file); | |
4165 | asm_fprintf (file, RS6000_CALL_GLUE); | |
4166 | putc('\n', file); | |
4167 | } | |
b6c9286a MM |
4168 | #endif |
4169 | #endif | |
4170 | ||
4171 | if (info->main_save_p) | |
4172 | { | |
4173 | int regno; | |
4174 | int loc; | |
4175 | int size = info->main_size; | |
4176 | ||
4177 | if (info->total_size < 32767) | |
4178 | { | |
4179 | loc = info->total_size + info->main_save_offset; | |
2682eae9 | 4180 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4181 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); |
4182 | } | |
4183 | else | |
5ebfb2ba MM |
4184 | { |
4185 | int neg_size = info->main_save_offset - info->total_size; | |
4186 | loc = 0; | |
9615f239 | 4187 | asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", |
5ebfb2ba MM |
4188 | reg_names[0], (neg_size >> 16) & 0xffff, |
4189 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 4190 | |
b6c9286a MM |
4191 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
4192 | reg_names[1]); | |
4193 | ||
2682eae9 | 4194 | for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) |
b6c9286a MM |
4195 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); |
4196 | } | |
4197 | } | |
4198 | } | |
4199 | #endif | |
4200 | ||
4201 | ||
1875cc88 JW |
4202 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
4203 | TOC_TABLE address into register 30. */ | |
4697a36c | 4204 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
4205 | { |
4206 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
4207 | if (!profile_flag) |
4208 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 4209 | #endif |
38c1f2d7 | 4210 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 4211 | } |
4697a36c | 4212 | |
b6c9286a MM |
4213 | if (DEFAULT_ABI == ABI_NT) |
4214 | { | |
4215 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4216 | fputs (".b:\n", file); | |
3daf36a4 | 4217 | } |
9878760c RK |
4218 | } |
4219 | ||
4220 | /* Write function epilogue. */ | |
4221 | ||
4222 | void | |
4223 | output_epilog (file, size) | |
4224 | FILE *file; | |
296b8152 | 4225 | int size ATTRIBUTE_UNUSED; |
9878760c | 4226 | { |
4697a36c | 4227 | rs6000_stack_t *info = rs6000_stack_info (); |
d330fd93 | 4228 | const char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 4229 | rtx insn = get_last_insn (); |
979721f8 MM |
4230 | int sp_reg = 1; |
4231 | int sp_offset = 0; | |
9878760c | 4232 | |
9878760c RK |
4233 | /* If the last insn was a BARRIER, we don't have to write anything except |
4234 | the trace table. */ | |
4235 | if (GET_CODE (insn) == NOTE) | |
4236 | insn = prev_nonnote_insn (insn); | |
4237 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
4238 | { | |
4239 | /* If we have a frame pointer, a call to alloca, or a large stack | |
4240 | frame, restore the old stack pointer using the backchain. Otherwise, | |
4241 | we know what size to update it with. */ | |
4242 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 4243 | || info->total_size > 32767) |
979721f8 MM |
4244 | { |
4245 | /* Under V.4, don't reset the stack pointer until after we're done | |
4246 | loading the saved registers. */ | |
c81bebd7 | 4247 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
4248 | sp_reg = 11; |
4249 | ||
4250 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
4251 | } | |
4697a36c MM |
4252 | else if (info->push_p) |
4253 | { | |
c81bebd7 | 4254 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 | 4255 | sp_offset = info->total_size; |
4697a36c | 4256 | else |
a260abc9 DE |
4257 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4258 | reg_names[1], info->total_size, reg_names[1]); | |
4697a36c | 4259 | } |
9878760c | 4260 | |
b4ac57ab | 4261 | /* Get the old lr if we saved it. */ |
4697a36c | 4262 | if (info->lr_save_p) |
979721f8 | 4263 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
4264 | |
4265 | /* Get the old cr if we saved it. */ | |
4697a36c | 4266 | if (info->cr_save_p) |
979721f8 | 4267 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 4268 | |
b4ac57ab | 4269 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
4270 | if (info->lr_save_p) |
4271 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 4272 | |
9878760c | 4273 | /* Restore gpr's. */ |
4697a36c | 4274 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 4275 | { |
4697a36c | 4276 | int regno = info->first_gp_reg_save; |
979721f8 | 4277 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 4278 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 4279 | |
4697a36c | 4280 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 4281 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
4282 | } |
4283 | ||
4697a36c MM |
4284 | else if (info->first_gp_reg_save != 32) |
4285 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
4286 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
4287 | info->gp_save_offset + sp_offset, |
4288 | reg_names[sp_reg]); | |
9878760c | 4289 | |
b4ac57ab | 4290 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
4291 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
4292 | { | |
4293 | int regno = info->first_fp_reg_save; | |
979721f8 | 4294 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
4295 | |
4296 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 4297 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 4298 | } |
9878760c | 4299 | |
28edebac RK |
4300 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
4301 | that were used. */ | |
4697a36c MM |
4302 | if (info->cr_save_p) |
4303 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
4304 | (regs_ever_live[70] != 0) * 0x20 |
4305 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 4306 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 4307 | |
a6c2a102 DE |
4308 | /* If this is V.4, unwind the stack pointer after all of the loads |
4309 | have been done */ | |
4310 | if (sp_offset != 0) | |
a260abc9 DE |
4311 | asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", |
4312 | reg_names[1], sp_offset, reg_names[1]); | |
979721f8 MM |
4313 | else if (sp_reg != 1) |
4314 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
4315 | ||
b4ac57ab RS |
4316 | /* If we have to restore more than two FP registers, branch to the |
4317 | restore function. It will return to our caller. */ | |
4697a36c MM |
4318 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4319 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
4320 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 4321 | else |
85638c0d | 4322 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 4323 | } |
b4ac57ab | 4324 | |
9b30bae2 | 4325 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
4326 | on its format. |
4327 | ||
4328 | We don't output a traceback table if -finhibit-size-directive was | |
4329 | used. The documentation for -finhibit-size-directive reads | |
4330 | ``don't output a @code{.size} assembler directive, or anything | |
4331 | else that would cause trouble if the function is split in the | |
4332 | middle, and the two halves are placed at locations far apart in | |
4333 | memory.'' The traceback table has this property, since it | |
4334 | includes the offset from the start of the function to the | |
4d30c363 MM |
4335 | traceback table itself. |
4336 | ||
4337 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4338 | different traceback table. */ |
4339 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4340 | { |
314fc5a9 ILT |
4341 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4342 | int fixed_parms, float_parms, parm_info; | |
4343 | int i; | |
4344 | ||
b6c9286a MM |
4345 | while (*fname == '.') /* V.4 encodes . in the name */ |
4346 | fname++; | |
4347 | ||
314fc5a9 ILT |
4348 | /* Need label immediately before tbtab, so we can compute its offset |
4349 | from the function start. */ | |
4350 | if (*fname == '*') | |
4351 | ++fname; | |
4352 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4353 | ASM_OUTPUT_LABEL (file, fname); | |
4354 | ||
4355 | /* The .tbtab pseudo-op can only be used for the first eight | |
4356 | expressions, since it can't handle the possibly variable | |
4357 | length fields that follow. However, if you omit the optional | |
4358 | fields, the assembler outputs zeros for all optional fields | |
4359 | anyways, giving each variable length field is minimum length | |
4360 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4361 | pseudo-op at all. */ | |
4362 | ||
4363 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4364 | that have to find it by searching forward from the entry | |
4365 | point or from the current pc. */ | |
19d2d16f | 4366 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4367 | |
4368 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4369 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4370 | |
4371 | /* Language type. Unfortunately, there doesn't seem to be any | |
4372 | official way to get this info, so we use language_string. C | |
4373 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
9517ead8 | 4374 | value for C for now. There is no official value for Java, |
6f573ff9 JL |
4375 | although IBM appears to be using 13. There is no official value |
4376 | for Chill, so we've choosen 44 pseudo-randomly. */ | |
314fc5a9 ILT |
4377 | if (! strcmp (language_string, "GNU C") |
4378 | || ! strcmp (language_string, "GNU Obj-C")) | |
4379 | i = 0; | |
4380 | else if (! strcmp (language_string, "GNU F77")) | |
4381 | i = 1; | |
4382 | else if (! strcmp (language_string, "GNU Ada")) | |
4383 | i = 3; | |
8b83775b | 4384 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4385 | i = 2; |
4386 | else if (! strcmp (language_string, "GNU C++")) | |
4387 | i = 9; | |
9517ead8 AG |
4388 | else if (! strcmp (language_string, "GNU Java")) |
4389 | i = 13; | |
6f573ff9 JL |
4390 | else if (! strcmp (language_string, "GNU CHILL")) |
4391 | i = 44; | |
314fc5a9 ILT |
4392 | else |
4393 | abort (); | |
4394 | fprintf (file, "%d,", i); | |
4395 | ||
4396 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4397 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4398 | from start of procedure stored in tbtab, internal function, function | |
4399 | has controlled storage, function has no toc, function uses fp, | |
4400 | function logs/aborts fp operations. */ | |
4401 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4402 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4403 | |
4404 | /* 6 bitfields: function is interrupt handler, name present in | |
4405 | proc table, function calls alloca, on condition directives | |
4406 | (controls stack walks, 3 bits), saves condition reg, saves | |
4407 | link reg. */ | |
4408 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4409 | set up as a frame pointer, even when there is no alloca call. */ | |
4410 | fprintf (file, "%d,", | |
4411 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4412 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4413 | |
4414 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4415 | (6 bits). */ | |
4416 | fprintf (file, "%d,", | |
4697a36c | 4417 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4418 | |
4419 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4420 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4421 | ||
4422 | { | |
4423 | /* Compute the parameter info from the function decl argument | |
4424 | list. */ | |
4425 | tree decl; | |
4426 | int next_parm_info_bit; | |
4427 | ||
4428 | next_parm_info_bit = 31; | |
4429 | parm_info = 0; | |
4430 | fixed_parms = 0; | |
4431 | float_parms = 0; | |
4432 | ||
4433 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4434 | decl; decl = TREE_CHAIN (decl)) | |
4435 | { | |
4436 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4437 | enum machine_mode mode = GET_MODE (parameter); | |
4438 | ||
4439 | if (GET_CODE (parameter) == REG) | |
4440 | { | |
4441 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4442 | { | |
4443 | int bits; | |
4444 | ||
4445 | float_parms++; | |
4446 | ||
4447 | if (mode == SFmode) | |
4448 | bits = 0x2; | |
4449 | else if (mode == DFmode) | |
4450 | bits = 0x3; | |
4451 | else | |
4452 | abort (); | |
4453 | ||
4454 | /* If only one bit will fit, don't or in this entry. */ | |
4455 | if (next_parm_info_bit > 0) | |
4456 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4457 | next_parm_info_bit -= 2; | |
4458 | } | |
4459 | else | |
4460 | { | |
4461 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4462 | + (UNITS_PER_WORD - 1)) | |
4463 | / UNITS_PER_WORD); | |
4464 | next_parm_info_bit -= 1; | |
4465 | } | |
4466 | } | |
4467 | } | |
4468 | } | |
4469 | ||
4470 | /* Number of fixed point parameters. */ | |
4471 | /* This is actually the number of words of fixed point parameters; thus | |
4472 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4473 | fprintf (file, "%d,", fixed_parms); | |
4474 | ||
4475 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4476 | all on stack. */ | |
4477 | /* This is actually the number of fp registers that hold parameters; | |
4478 | and thus the maximum value is 13. */ | |
4479 | /* Set parameters on stack bit if parameters are not in their original | |
4480 | registers, regardless of whether they are on the stack? Xlc | |
4481 | seems to set the bit when not optimizing. */ | |
4482 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4483 | ||
4484 | /* Optional fields follow. Some are variable length. */ | |
4485 | ||
4486 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4487 | 11 double float. */ | |
4488 | /* There is an entry for each parameter in a register, in the order that | |
4489 | they occur in the parameter list. Any intervening arguments on the | |
4490 | stack are ignored. If the list overflows a long (max possible length | |
4491 | 34 bits) then completely leave off all elements that don't fit. */ | |
4492 | /* Only emit this long if there was at least one parameter. */ | |
4493 | if (fixed_parms || float_parms) | |
4494 | fprintf (file, "\t.long %d\n", parm_info); | |
4495 | ||
4496 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4497 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4498 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4499 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4500 | fputs ("-.", file); |
314fc5a9 | 4501 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4502 | putc ('\n', file); |
314fc5a9 ILT |
4503 | |
4504 | /* Interrupt handler mask. */ | |
4505 | /* Omit this long, since we never set the interrupt handler bit | |
4506 | above. */ | |
4507 | ||
4508 | /* Number of CTL (controlled storage) anchors. */ | |
4509 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4510 | ||
4511 | /* Displacement into stack of each CTL anchor. */ | |
4512 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4513 | ||
4514 | /* Length of function name. */ | |
296b8152 | 4515 | fprintf (file, "\t.short %d\n", (int) strlen (fname)); |
314fc5a9 ILT |
4516 | |
4517 | /* Function name. */ | |
4518 | assemble_string (fname, strlen (fname)); | |
4519 | ||
4520 | /* Register for alloca automatic storage; this is always reg 31. | |
4521 | Only emit this if the alloca bit was set above. */ | |
4522 | if (frame_pointer_needed) | |
19d2d16f | 4523 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4524 | } |
4697a36c | 4525 | |
b6c9286a MM |
4526 | if (DEFAULT_ABI == ABI_NT) |
4527 | { | |
4528 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4529 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4530 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4531 | fputs (":\n", file); | |
4532 | } | |
9878760c | 4533 | } |
17167fd8 MM |
4534 | \f |
4535 | /* A C compound statement that outputs the assembler code for a thunk function, | |
4536 | used to implement C++ virtual function calls with multiple inheritance. The | |
4537 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
4538 | object parameter before handing control off to the real function. | |
4539 | ||
4540 | First, emit code to add the integer DELTA to the location that contains the | |
4541 | incoming first argument. Assume that this argument contains a pointer, and | |
4542 | is the one used to pass the `this' pointer in C++. This is the incoming | |
4543 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
4544 | addition must preserve the values of all other incoming arguments. | |
4545 | ||
4546 | After the addition, emit code to jump to FUNCTION, which is a | |
4547 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
4548 | the return address. Hence returning from FUNCTION will return to whoever | |
4549 | called the current `thunk'. | |
4550 | ||
4551 | The effect must be as if FUNCTION had been called directly with the adjusted | |
4552 | first argument. This macro is responsible for emitting all of the code for | |
4553 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
4554 | invoked. | |
4555 | ||
4556 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
4557 | extracted from it.) It might possibly be useful on some targets, but | |
4558 | probably not. | |
4559 | ||
4560 | If you do not define this macro, the target-independent code in the C++ | |
4561 | frontend will generate a less efficient heavyweight thunk that calls | |
4562 | FUNCTION instead of jumping to it. The generic approach does not support | |
4563 | varargs. */ | |
4564 | ||
4565 | void | |
4566 | output_mi_thunk (file, thunk_fndecl, delta, function) | |
4567 | FILE *file; | |
d330fd93 | 4568 | tree thunk_fndecl ATTRIBUTE_UNUSED; |
17167fd8 MM |
4569 | int delta; |
4570 | tree function; | |
4571 | { | |
d330fd93 KG |
4572 | const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; |
4573 | const char *prefix; | |
17167fd8 | 4574 | char *fname; |
d330fd93 KG |
4575 | const char *r0 = reg_names[0]; |
4576 | const char *sp = reg_names[1]; | |
4577 | const char *toc = reg_names[2]; | |
4578 | const char *schain = reg_names[11]; | |
4579 | const char *r12 = reg_names[12]; | |
17167fd8 MM |
4580 | char buf[512]; |
4581 | static int labelno = 0; | |
4582 | ||
4583 | /* Small constants that can be done by one add instruction */ | |
4584 | if (delta >= -32768 && delta <= 32767) | |
4585 | { | |
22b4a3b0 | 4586 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4587 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); |
4588 | else | |
4589 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); | |
4590 | } | |
4591 | ||
4592 | /* Large constants that can be done by one addis instruction */ | |
4593 | else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) | |
4594 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4595 | delta >> 16); | |
4596 | ||
4597 | /* 32-bit constants that can be done by an add and addis instruction. */ | |
4598 | else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) | |
4599 | { | |
22b4a3b0 | 4600 | /* Break into two pieces, propagating the sign bit from the low word to |
17167fd8 MM |
4601 | the upper word. */ |
4602 | int delta_high = delta >> 16; | |
4603 | int delta_low = delta & 0xffff; | |
4604 | if ((delta_low & 0x8000) != 0) | |
4605 | { | |
4606 | delta_high++; | |
4607 | delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ | |
4608 | } | |
4609 | ||
4610 | asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, | |
4611 | delta_high); | |
4612 | ||
22b4a3b0 | 4613 | if (! TARGET_NEW_MNEMONICS) |
17167fd8 MM |
4614 | fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); |
4615 | else | |
4616 | fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); | |
4617 | } | |
4618 | ||
4619 | /* 64-bit constants, fixme */ | |
4620 | else | |
4621 | abort (); | |
4622 | ||
4623 | /* Get the prefix in front of the names. */ | |
4624 | switch (DEFAULT_ABI) | |
4625 | { | |
4626 | default: | |
4627 | abort (); | |
4628 | ||
4629 | case ABI_AIX: | |
4630 | prefix = "."; | |
4631 | break; | |
4632 | ||
4633 | case ABI_V4: | |
4634 | case ABI_AIX_NODESC: | |
4635 | case ABI_SOLARIS: | |
4636 | prefix = ""; | |
4637 | break; | |
4638 | ||
4639 | case ABI_NT: | |
4640 | prefix = ".."; | |
4641 | break; | |
4642 | } | |
4643 | ||
4644 | /* If the function is compiled in this module, jump to it directly. | |
4645 | Otherwise, load up its address and jump to it. */ | |
4646 | ||
4647 | fname = XSTR (XEXP (DECL_RTL (function), 0), 0); | |
42820a49 | 4648 | |
efc97ef0 | 4649 | if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) |
22b4a3b0 FS |
4650 | && ! lookup_attribute ("longcall", |
4651 | TYPE_ATTRIBUTES (TREE_TYPE (function)))) | |
17167fd8 MM |
4652 | { |
4653 | fprintf (file, "\tb %s", prefix); | |
4654 | assemble_name (file, fname); | |
22b4a3b0 | 4655 | if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file); |
949ea356 | 4656 | putc ('\n', file); |
17167fd8 MM |
4657 | } |
4658 | ||
4659 | else | |
4660 | { | |
4661 | switch (DEFAULT_ABI) | |
4662 | { | |
4663 | default: | |
4664 | case ABI_NT: | |
4665 | abort (); | |
4666 | ||
4667 | case ABI_AIX: | |
4668 | /* Set up a TOC entry for the function. */ | |
4669 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4670 | toc_section (); | |
4671 | ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); | |
4672 | labelno++; | |
4673 | ||
4674 | /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since | |
4675 | there will be only one TOC entry for this function. */ | |
4676 | fputs ("\t.tc\t", file); | |
4677 | assemble_name (file, buf); | |
4678 | fputs ("[TC],", file); | |
4679 | assemble_name (file, buf); | |
4680 | putc ('\n', file); | |
4681 | text_section (); | |
4682 | asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); | |
4683 | assemble_name (file, buf); | |
4684 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
4685 | asm_fprintf (file, | |
4686 | (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", | |
4687 | r0, r12); | |
4688 | ||
4689 | asm_fprintf (file, | |
4690 | (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", | |
4691 | toc, r12); | |
4692 | ||
4693 | asm_fprintf (file, "\tmtctr %s\n", r0); | |
4694 | asm_fprintf (file, | |
4695 | (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", | |
4696 | schain, r12); | |
4697 | ||
4698 | asm_fprintf (file, "\tbctr\n"); | |
4699 | break; | |
4700 | ||
17167fd8 | 4701 | case ABI_V4: |
22b4a3b0 FS |
4702 | fprintf (file, "\tb %s", prefix); |
4703 | assemble_name (file, fname); | |
4704 | if (flag_pic) fputs ("@plt", file); | |
949ea356 | 4705 | putc ('\n', file); |
22b4a3b0 FS |
4706 | break; |
4707 | ||
4708 | /* Don't use r11, that contains the static chain, just use r0/r12. */ | |
17167fd8 MM |
4709 | case ABI_AIX_NODESC: |
4710 | case ABI_SOLARIS: | |
4711 | if (flag_pic == 1) | |
4712 | { | |
4713 | fprintf (file, "\tmflr %s\n", r0); | |
4714 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); | |
4715 | asm_fprintf (file, "\tmflr %s\n", r12); | |
4716 | asm_fprintf (file, "\tmtlr %s\n", r0); | |
4717 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4718 | assemble_name (file, fname); | |
4719 | asm_fprintf (file, "@got(%s)\n", r12); | |
42820a49 MM |
4720 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4721 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4722 | } |
4723 | #if TARGET_ELF | |
4724 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4725 | { | |
4726 | ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); | |
4727 | labelno++; | |
4728 | fprintf (file, "\tmflr %s\n", r0); | |
4729 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); | |
4730 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
4731 | rs6000_output_load_toc_table (file, 12); | |
4732 | asm_fprintf (file, "\t{l|lwz} %s,", r0); | |
4733 | assemble_name (file, buf); | |
4734 | asm_fprintf (file, "(%s)\n", r12); | |
4735 | asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); | |
4736 | asm_fprintf (file, "\tmtlr %s\n", r12); | |
42820a49 MM |
4737 | asm_fprintf (file, "\tmtctr %s\n", r0); |
4738 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4739 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
4740 | assemble_name (file, buf); | |
4741 | fputs (" = .-.LCTOC1\n", file); | |
4742 | fputs ("\t.long ", file); | |
4743 | assemble_name (file, fname); | |
4744 | fputs ("\n\t.previous\n", file); | |
4745 | } | |
42820a49 MM |
4746 | #endif /* TARGET_ELF */ |
4747 | ||
17167fd8 MM |
4748 | else |
4749 | { | |
42820a49 | 4750 | asm_fprintf (file, "\t{liu|lis} %s,", r12); |
17167fd8 MM |
4751 | assemble_name (file, fname); |
4752 | asm_fprintf (file, "@ha\n"); | |
42820a49 | 4753 | asm_fprintf (file, "\t{cal|la} %s,", r12); |
17167fd8 | 4754 | assemble_name (file, fname); |
42820a49 MM |
4755 | asm_fprintf (file, "@l(%s)\n", r12); |
4756 | asm_fprintf (file, "\tmtctr %s\n", r12); | |
4757 | asm_fprintf (file, "\tbctr\n"); | |
17167fd8 MM |
4758 | } |
4759 | ||
17167fd8 MM |
4760 | break; |
4761 | } | |
4762 | } | |
4763 | } | |
4764 | ||
9878760c RK |
4765 | \f |
4766 | /* Output a TOC entry. We derive the entry name from what is | |
4767 | being written. */ | |
4768 | ||
4769 | void | |
4770 | output_toc (file, x, labelno) | |
4771 | FILE *file; | |
4772 | rtx x; | |
4773 | int labelno; | |
4774 | { | |
4775 | char buf[256]; | |
4776 | char *name = buf; | |
b6c9286a | 4777 | char *real_name; |
9878760c RK |
4778 | rtx base = x; |
4779 | int offset = 0; | |
4780 | ||
4697a36c MM |
4781 | if (TARGET_NO_TOC) |
4782 | abort (); | |
4783 | ||
ff1720ed RK |
4784 | /* if we're going to put a double constant in the TOC, make sure it's |
4785 | aligned properly when strict alignment is on. */ | |
4786 | if (GET_CODE (x) == CONST_DOUBLE | |
4787 | && STRICT_ALIGNMENT | |
4788 | && GET_MODE (x) == DFmode | |
4789 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4790 | ASM_OUTPUT_ALIGN (file, 3); | |
4791 | } | |
4792 | ||
4793 | ||
b6c9286a | 4794 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4795 | { |
4796 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4797 | fprintf (file, "%d = .-", labelno); | |
4798 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4799 | fputs ("1\n", file); |
d14a6d05 MM |
4800 | } |
4801 | else | |
d14a6d05 | 4802 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4803 | |
37c37a57 RK |
4804 | /* Handle FP constants specially. Note that if we have a minimal |
4805 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4806 | FP constants. */ | |
042259f2 | 4807 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4808 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4809 | { |
042259f2 DE |
4810 | REAL_VALUE_TYPE rv; |
4811 | long k[2]; | |
0adc764e | 4812 | |
042259f2 DE |
4813 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4814 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
31bfaa0b | 4815 | |
13ded975 DE |
4816 | if (TARGET_64BIT) |
4817 | { | |
4818 | if (TARGET_MINIMAL_TOC) | |
4819 | fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); | |
4820 | else | |
4821 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", | |
4822 | k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); | |
4823 | return; | |
4824 | } | |
1875cc88 | 4825 | else |
13ded975 DE |
4826 | { |
4827 | if (TARGET_MINIMAL_TOC) | |
31bfaa0b | 4828 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]); |
13ded975 | 4829 | else |
31bfaa0b | 4830 | fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
4831 | k[0], k[1], k[0], k[1]); |
4832 | return; | |
4833 | } | |
9878760c RK |
4834 | } |
4835 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4836 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4837 | { |
042259f2 DE |
4838 | REAL_VALUE_TYPE rv; |
4839 | long l; | |
9878760c | 4840 | |
042259f2 DE |
4841 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4842 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4843 | ||
31bfaa0b DE |
4844 | if (TARGET_64BIT) |
4845 | { | |
4846 | if (TARGET_MINIMAL_TOC) | |
4847 | fprintf (file, "\t.llong 0x%lx00000000\n", l); | |
4848 | else | |
4849 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l); | |
4850 | return; | |
4851 | } | |
042259f2 | 4852 | else |
31bfaa0b DE |
4853 | { |
4854 | if (TARGET_MINIMAL_TOC) | |
4855 | fprintf (file, "\t.long 0x%lx\n", l); | |
4856 | else | |
4857 | fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l); | |
4858 | return; | |
4859 | } | |
042259f2 DE |
4860 | } |
4861 | else if (GET_MODE (x) == DImode | |
4862 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4863 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4864 | { | |
4865 | HOST_WIDE_INT low; | |
4866 | HOST_WIDE_INT high; | |
4867 | ||
4868 | if (GET_CODE (x) == CONST_DOUBLE) | |
4869 | { | |
4870 | low = CONST_DOUBLE_LOW (x); | |
4871 | high = CONST_DOUBLE_HIGH (x); | |
4872 | } | |
4873 | else | |
4874 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4875 | { | |
4876 | low = INTVAL (x); | |
4877 | high = (low < 0) ? ~0 : 0; | |
4878 | } | |
4879 | #else | |
4880 | { | |
4881 | low = INTVAL (x) & 0xffffffff; | |
4882 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4883 | } | |
4884 | #endif | |
9878760c | 4885 | |
13ded975 DE |
4886 | if (TARGET_64BIT) |
4887 | { | |
4888 | if (TARGET_MINIMAL_TOC) | |
4889 | fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); | |
4890 | else | |
4891 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", | |
4892 | (long)high, (long)low, (long)high, (long)low); | |
4893 | return; | |
4894 | } | |
1875cc88 | 4895 | else |
13ded975 DE |
4896 | { |
4897 | if (TARGET_MINIMAL_TOC) | |
3cb999d8 | 4898 | fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", |
13ded975 DE |
4899 | (long)high, (long)low); |
4900 | else | |
3cb999d8 | 4901 | fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n", |
13ded975 DE |
4902 | (long)high, (long)low, (long)high, (long)low); |
4903 | return; | |
4904 | } | |
9878760c RK |
4905 | } |
4906 | ||
4907 | if (GET_CODE (x) == CONST) | |
4908 | { | |
4909 | base = XEXP (XEXP (x, 0), 0); | |
4910 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4911 | } | |
4912 | ||
4913 | if (GET_CODE (base) == SYMBOL_REF) | |
4914 | name = XSTR (base, 0); | |
4915 | else if (GET_CODE (base) == LABEL_REF) | |
4916 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4917 | else if (GET_CODE (base) == CODE_LABEL) | |
4918 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4919 | else | |
4920 | abort (); | |
4921 | ||
2e4eb9b0 | 4922 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4923 | if (TARGET_MINIMAL_TOC) |
13ded975 | 4924 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
1875cc88 JW |
4925 | else |
4926 | { | |
b6c9286a | 4927 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4928 | |
1875cc88 JW |
4929 | if (offset < 0) |
4930 | fprintf (file, ".N%d", - offset); | |
4931 | else if (offset) | |
4932 | fprintf (file, ".P%d", offset); | |
9878760c | 4933 | |
19d2d16f | 4934 | fputs ("[TC],", file); |
1875cc88 | 4935 | } |
581bc4de MM |
4936 | |
4937 | /* Currently C++ toc references to vtables can be emitted before it | |
4938 | is decided whether the vtable is public or private. If this is | |
4939 | the case, then the linker will eventually complain that there is | |
4940 | a TOC reference to an unknown section. Thus, for vtables only, | |
4941 | we emit the TOC reference to reference the symbol and not the | |
4942 | section. */ | |
3807773b | 4943 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4944 | { |
3807773b | 4945 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4946 | if (offset < 0) |
4947 | fprintf (file, "%d", offset); | |
4948 | else if (offset > 0) | |
4949 | fprintf (file, "+%d", offset); | |
4950 | } | |
4951 | else | |
4952 | output_addr_const (file, x); | |
19d2d16f | 4953 | putc ('\n', file); |
9878760c RK |
4954 | } |
4955 | \f | |
4956 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4957 | starting at P to FILE. | |
4958 | ||
4959 | On the RS/6000, we have to do this using the .byte operation and | |
4960 | write out special characters outside the quoted string. | |
4961 | Also, the assembler is broken; very long strings are truncated, | |
4962 | so we must artificially break them up early. */ | |
4963 | ||
4964 | void | |
4965 | output_ascii (file, p, n) | |
4966 | FILE *file; | |
d330fd93 | 4967 | const char *p; |
9878760c RK |
4968 | int n; |
4969 | { | |
4970 | char c; | |
4971 | int i, count_string; | |
d330fd93 KG |
4972 | const char *for_string = "\t.byte \""; |
4973 | const char *for_decimal = "\t.byte "; | |
4974 | const char *to_close = NULL; | |
9878760c RK |
4975 | |
4976 | count_string = 0; | |
4977 | for (i = 0; i < n; i++) | |
4978 | { | |
4979 | c = *p++; | |
4980 | if (c >= ' ' && c < 0177) | |
4981 | { | |
4982 | if (for_string) | |
4983 | fputs (for_string, file); | |
4984 | putc (c, file); | |
4985 | ||
4986 | /* Write two quotes to get one. */ | |
4987 | if (c == '"') | |
4988 | { | |
4989 | putc (c, file); | |
4990 | ++count_string; | |
4991 | } | |
4992 | ||
4993 | for_string = NULL; | |
4994 | for_decimal = "\"\n\t.byte "; | |
4995 | to_close = "\"\n"; | |
4996 | ++count_string; | |
4997 | ||
4998 | if (count_string >= 512) | |
4999 | { | |
5000 | fputs (to_close, file); | |
5001 | ||
5002 | for_string = "\t.byte \""; | |
5003 | for_decimal = "\t.byte "; | |
5004 | to_close = NULL; | |
5005 | count_string = 0; | |
5006 | } | |
5007 | } | |
5008 | else | |
5009 | { | |
5010 | if (for_decimal) | |
5011 | fputs (for_decimal, file); | |
5012 | fprintf (file, "%d", c); | |
5013 | ||
5014 | for_string = "\n\t.byte \""; | |
5015 | for_decimal = ", "; | |
5016 | to_close = "\n"; | |
5017 | count_string = 0; | |
5018 | } | |
5019 | } | |
5020 | ||
5021 | /* Now close the string if we have written one. Then end the line. */ | |
5022 | if (to_close) | |
5023 | fprintf (file, to_close); | |
5024 | } | |
5025 | \f | |
5026 | /* Generate a unique section name for FILENAME for a section type | |
5027 | represented by SECTION_DESC. Output goes into BUF. | |
5028 | ||
5029 | SECTION_DESC can be any string, as long as it is different for each | |
5030 | possible section type. | |
5031 | ||
5032 | We name the section in the same manner as xlc. The name begins with an | |
5033 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
5034 | names) with the last period replaced by the string SECTION_DESC. If |
5035 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
5036 | the name. */ | |
9878760c RK |
5037 | |
5038 | void | |
5039 | rs6000_gen_section_name (buf, filename, section_desc) | |
5040 | char **buf; | |
5041 | char *filename; | |
5042 | char *section_desc; | |
5043 | { | |
d330fd93 | 5044 | char *q, *after_last_slash, *last_period = 0; |
9878760c RK |
5045 | char *p; |
5046 | int len; | |
9878760c RK |
5047 | |
5048 | after_last_slash = filename; | |
5049 | for (q = filename; *q; q++) | |
11e5fe42 RK |
5050 | { |
5051 | if (*q == '/') | |
5052 | after_last_slash = q + 1; | |
5053 | else if (*q == '.') | |
5054 | last_period = q; | |
5055 | } | |
9878760c | 5056 | |
11e5fe42 | 5057 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
5058 | *buf = (char *) permalloc (len); |
5059 | ||
5060 | p = *buf; | |
5061 | *p++ = '_'; | |
5062 | ||
5063 | for (q = after_last_slash; *q; q++) | |
5064 | { | |
11e5fe42 | 5065 | if (q == last_period) |
9878760c RK |
5066 | { |
5067 | strcpy (p, section_desc); | |
5068 | p += strlen (section_desc); | |
9878760c RK |
5069 | } |
5070 | ||
e9a780ec | 5071 | else if (ISALNUM (*q)) |
9878760c RK |
5072 | *p++ = *q; |
5073 | } | |
5074 | ||
11e5fe42 | 5075 | if (last_period == 0) |
9878760c RK |
5076 | strcpy (p, section_desc); |
5077 | else | |
5078 | *p = '\0'; | |
5079 | } | |
e165f3f0 RK |
5080 | \f |
5081 | /* Write function profiler code. */ | |
5082 | ||
5083 | void | |
5084 | output_function_profiler (file, labelno) | |
5085 | FILE *file; | |
5086 | int labelno; | |
5087 | { | |
5088 | /* The last used parameter register. */ | |
5089 | int last_parm_reg; | |
5090 | int i, j; | |
3daf36a4 | 5091 | char buf[100]; |
e165f3f0 | 5092 | |
3daf36a4 | 5093 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 5094 | switch (DEFAULT_ABI) |
3daf36a4 | 5095 | { |
38c1f2d7 MM |
5096 | default: |
5097 | abort (); | |
5098 | ||
5099 | case ABI_V4: | |
5100 | case ABI_SOLARIS: | |
5101 | case ABI_AIX_NODESC: | |
5102 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
5103 | if (flag_pic == 1) | |
5104 | { | |
dfdfa60f DE |
5105 | fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); |
5106 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", | |
5107 | reg_names[0], reg_names[1]); | |
17167fd8 | 5108 | asm_fprintf (file, "\tmflr %s\n", reg_names[12]); |
dfdfa60f | 5109 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); |
38c1f2d7 | 5110 | assemble_name (file, buf); |
17167fd8 | 5111 | asm_fprintf (file, "@got(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5112 | } |
5113 | #if TARGET_ELF | |
5114 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
5115 | { | |
dfdfa60f DE |
5116 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5117 | reg_names[0], reg_names[1]); | |
38c1f2d7 | 5118 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
17167fd8 MM |
5119 | rs6000_output_load_toc_table (file, 12); |
5120 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); | |
38c1f2d7 | 5121 | assemble_name (file, buf); |
17167fd8 | 5122 | asm_fprintf (file, "X(%s)\n", reg_names[12]); |
dfdfa60f | 5123 | asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
034e84c4 | 5124 | assemble_name (file, buf); |
dfdfa60f DE |
5125 | fputs ("X = .-.LCTOC1\n", file); |
5126 | fputs ("\t.long ", file); | |
034e84c4 MM |
5127 | assemble_name (file, buf); |
5128 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
5129 | } |
5130 | #endif | |
38c1f2d7 MM |
5131 | else |
5132 | { | |
17167fd8 | 5133 | asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); |
38c1f2d7 | 5134 | assemble_name (file, buf); |
dfdfa60f | 5135 | fputs ("@ha\n", file); |
b5253831 DE |
5136 | asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", |
5137 | reg_names[0], reg_names[1]); | |
a260abc9 | 5138 | asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); |
38c1f2d7 | 5139 | assemble_name (file, buf); |
17167fd8 | 5140 | asm_fprintf (file, "@l(%s)\n", reg_names[12]); |
38c1f2d7 MM |
5141 | } |
5142 | ||
b5253831 DE |
5143 | if (current_function_needs_context) |
5144 | asm_fprintf (file, "\tmr %s,%s\n", | |
5145 | reg_names[30], reg_names[STATIC_CHAIN_REGNUM]); | |
38c1f2d7 | 5146 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); |
b5253831 DE |
5147 | if (current_function_needs_context) |
5148 | asm_fprintf (file, "\tmr %s,%s\n", | |
5149 | reg_names[STATIC_CHAIN_REGNUM], reg_names[30]); | |
38c1f2d7 MM |
5150 | break; |
5151 | ||
5152 | case ABI_AIX: | |
5153 | /* Set up a TOC entry for the profiler label. */ | |
5154 | toc_section (); | |
5155 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
5156 | if (TARGET_MINIMAL_TOC) | |
5157 | { | |
13ded975 | 5158 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); |
38c1f2d7 MM |
5159 | assemble_name (file, buf); |
5160 | putc ('\n', file); | |
5161 | } | |
5162 | else | |
5163 | { | |
5164 | fputs ("\t.tc\t", file); | |
5165 | assemble_name (file, buf); | |
5166 | fputs ("[TC],", file); | |
5167 | assemble_name (file, buf); | |
5168 | putc ('\n', file); | |
5169 | } | |
5170 | text_section (); | |
e165f3f0 RK |
5171 | |
5172 | /* Figure out last used parameter register. The proper thing to do is | |
5173 | to walk incoming args of the function. A function might have live | |
5174 | parameter registers even if it has no incoming args. */ | |
5175 | ||
38c1f2d7 MM |
5176 | for (last_parm_reg = 10; |
5177 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
5178 | last_parm_reg--) | |
5179 | ; | |
e165f3f0 | 5180 | |
b5253831 DE |
5181 | /* Save parameter registers in regs 23-30 and static chain in r22. |
5182 | Don't overwrite reg 31, since it might be set up as the frame pointer. */ | |
e165f3f0 | 5183 | |
38c1f2d7 MM |
5184 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5185 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
b5253831 DE |
5186 | if (current_function_needs_context) |
5187 | asm_fprintf (file, "\tmr %d,%d\n", j, STATIC_CHAIN_REGNUM); | |
e165f3f0 RK |
5188 | |
5189 | /* Load location address into r3, and call mcount. */ | |
5190 | ||
38c1f2d7 | 5191 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
13ded975 DE |
5192 | asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", |
5193 | reg_names[3]); | |
38c1f2d7 | 5194 | assemble_name (file, buf); |
13f1623b DE |
5195 | asm_fprintf (file, "(%s)\n\tbl %s\n\t", reg_names[2], RS6000_MCOUNT); |
5196 | asm_fprintf (file, RS6000_CALL_GLUE); | |
5197 | putc('\n', file); | |
e165f3f0 | 5198 | |
b5253831 | 5199 | /* Restore parameter registers and static chain. */ |
e165f3f0 | 5200 | |
38c1f2d7 MM |
5201 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
5202 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
b5253831 DE |
5203 | if (current_function_needs_context) |
5204 | asm_fprintf (file, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM, j); | |
5205 | ||
38c1f2d7 MM |
5206 | break; |
5207 | } | |
e165f3f0 | 5208 | } |
a251ffd0 TG |
5209 | |
5210 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
5211 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
5212 | ||
5213 | int | |
a06faf84 | 5214 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
5215 | rtx insn; |
5216 | rtx link; | |
296b8152 | 5217 | rtx dep_insn ATTRIBUTE_UNUSED; |
a251ffd0 TG |
5218 | int cost; |
5219 | { | |
5220 | if (! recog_memoized (insn)) | |
5221 | return 0; | |
5222 | ||
5223 | if (REG_NOTE_KIND (link) != 0) | |
5224 | return 0; | |
5225 | ||
5226 | if (REG_NOTE_KIND (link) == 0) | |
5227 | { | |
5228 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
5229 | cycles later. */ | |
5230 | ||
5231 | /* Tell the first scheduling pass about the latency between a mtctr | |
5232 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
5233 | know about this latency since the mtctr instruction, which has the | |
5234 | latency associated to it, will be generated by reload. */ | |
5235 | if (get_attr_type (insn) == TYPE_JMPREG) | |
5236 | return TARGET_POWER ? 5 : 4; | |
5237 | ||
5238 | /* Fall out to return default cost. */ | |
5239 | } | |
5240 | ||
5241 | return cost; | |
5242 | } | |
b6c9286a | 5243 | |
bef84347 VM |
5244 | /* A C statement (sans semicolon) to update the integer scheduling priority |
5245 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
5246 | increase the priority to execute INSN later. Do not define this macro if | |
5247 | you do not need to adjust the scheduling priorities of insns. */ | |
5248 | ||
5249 | int | |
5250 | rs6000_adjust_priority (insn, priority) | |
d330fd93 | 5251 | rtx insn ATTRIBUTE_UNUSED; |
bef84347 VM |
5252 | int priority; |
5253 | { | |
5254 | /* On machines (like the 750) which have asymetric integer units, where one | |
5255 | integer unit can do multiply and divides and the other can't, reduce the | |
5256 | priority of multiply/divide so it is scheduled before other integer | |
5257 | operationss. */ | |
5258 | ||
5259 | #if 0 | |
5260 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') | |
5261 | return priority; | |
5262 | ||
5263 | if (GET_CODE (PATTERN (insn)) == USE) | |
5264 | return priority; | |
5265 | ||
5266 | switch (rs6000_cpu_attr) { | |
5267 | case CPU_PPC750: | |
5268 | switch (get_attr_type (insn)) | |
5269 | { | |
5270 | default: | |
5271 | break; | |
5272 | ||
5273 | case TYPE_IMUL: | |
5274 | case TYPE_IDIV: | |
3cb999d8 DE |
5275 | fprintf (stderr, "priority was %#x (%d) before adjustment\n", |
5276 | priority, priority); | |
bef84347 VM |
5277 | if (priority >= 0 && priority < 0x01000000) |
5278 | priority >>= 3; | |
5279 | break; | |
5280 | } | |
5281 | } | |
5282 | #endif | |
5283 | ||
5284 | return priority; | |
5285 | } | |
5286 | ||
b6c9286a MM |
5287 | /* Return how many instructions the machine can issue per cycle */ |
5288 | int get_issue_rate() | |
5289 | { | |
5290 | switch (rs6000_cpu_attr) { | |
3cb999d8 DE |
5291 | case CPU_RIOS1: /* ? */ |
5292 | case CPU_RS64A: | |
5293 | case CPU_PPC601: /* ? */ | |
5294 | return 3; | |
b6c9286a | 5295 | case CPU_PPC603: |
bef84347 VM |
5296 | case CPU_PPC750: |
5297 | return 2; | |
3cb999d8 | 5298 | case CPU_RIOS2: |
b6c9286a | 5299 | case CPU_PPC604: |
19684119 | 5300 | case CPU_PPC604E: |
b6c9286a | 5301 | case CPU_PPC620: |
3cb999d8 | 5302 | case CPU_PPC630: |
b6c9286a MM |
5303 | return 4; |
5304 | default: | |
5305 | return 1; | |
5306 | } | |
5307 | } | |
5308 | ||
b6c9286a MM |
5309 | \f |
5310 | /* Output assembler code for a block containing the constant parts | |
5311 | of a trampoline, leaving space for the variable parts. | |
5312 | ||
5313 | The trampoline should set the static chain pointer to value placed | |
5314 | into the trampoline and should branch to the specified routine. */ | |
5315 | ||
5316 | void | |
5317 | rs6000_trampoline_template (file) | |
5318 | FILE *file; | |
5319 | { | |
d330fd93 KG |
5320 | const char *sc = reg_names[STATIC_CHAIN_REGNUM]; |
5321 | const char *r0 = reg_names[0]; | |
5322 | const char *r2 = reg_names[2]; | |
b6c9286a MM |
5323 | |
5324 | switch (DEFAULT_ABI) | |
5325 | { | |
5326 | default: | |
5327 | abort (); | |
5328 | ||
5329 | /* Under AIX, this is not code at all, but merely a data area, | |
5330 | since that is the way all functions are called. The first word is | |
5331 | the address of the function, the second word is the TOC pointer (r2), | |
5332 | and the third word is the static chain value. */ | |
5333 | case ABI_AIX: | |
b6c9286a MM |
5334 | break; |
5335 | ||
5336 | ||
5337 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
5338 | do the full gory code to load up the static chain. */ | |
5339 | case ABI_V4: | |
c81bebd7 | 5340 | case ABI_SOLARIS: |
b6c9286a | 5341 | case ABI_AIX_NODESC: |
b6c9286a MM |
5342 | break; |
5343 | ||
5344 | /* NT function pointers point to a two word area (real address, TOC) | |
5345 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
5346 | use the function field to point to ..LTRAMP1 and the toc field |
5347 | to point to the whole table. */ | |
b6c9286a | 5348 | case ABI_NT: |
7c59dc5d MM |
5349 | if (STATIC_CHAIN_REGNUM == 0 |
5350 | || STATIC_CHAIN_REGNUM == 2 | |
5351 | || TARGET_64BIT | |
5352 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
5353 | abort (); |
5354 | ||
7c59dc5d MM |
5355 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
5356 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
5357 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
5358 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
5359 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 5360 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
5361 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
5362 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
5363 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
5364 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
5365 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
5366 | break; |
5367 | } | |
5368 | ||
5369 | return; | |
5370 | } | |
5371 | ||
5372 | /* Length in units of the trampoline for entering a nested function. */ | |
5373 | ||
5374 | int | |
5375 | rs6000_trampoline_size () | |
5376 | { | |
5377 | int ret = 0; | |
5378 | ||
5379 | switch (DEFAULT_ABI) | |
5380 | { | |
5381 | default: | |
5382 | abort (); | |
5383 | ||
5384 | case ABI_AIX: | |
8f802bfb | 5385 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
5386 | break; |
5387 | ||
5388 | case ABI_V4: | |
c81bebd7 | 5389 | case ABI_SOLARIS: |
b6c9286a | 5390 | case ABI_AIX_NODESC: |
03a7e1a5 | 5391 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
5392 | break; |
5393 | ||
5394 | case ABI_NT: | |
7c59dc5d | 5395 | ret = 20; |
b6c9286a MM |
5396 | break; |
5397 | } | |
5398 | ||
5399 | return ret; | |
5400 | } | |
5401 | ||
5402 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
5403 | FNADDR is an RTX for the address of the function's pure code. | |
5404 | CXT is an RTX for the static chain value for the function. */ | |
5405 | ||
5406 | void | |
5407 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
5408 | rtx addr; | |
5409 | rtx fnaddr; | |
5410 | rtx cxt; | |
5411 | { | |
ac2a93a1 | 5412 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
5413 | int regsize = (TARGET_32BIT) ? 4 : 8; |
5414 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
5415 | |
5416 | switch (DEFAULT_ABI) | |
5417 | { | |
5418 | default: | |
5419 | abort (); | |
5420 | ||
8bd04c56 | 5421 | /* Macros to shorten the code expansions below. */ |
39403d82 DE |
5422 | #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) |
5423 | #define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) | |
7c59dc5d | 5424 | |
b6c9286a MM |
5425 | /* Under AIX, just build the 3 word function descriptor */ |
5426 | case ABI_AIX: | |
8bd04c56 MM |
5427 | { |
5428 | rtx fn_reg = gen_reg_rtx (pmode); | |
5429 | rtx toc_reg = gen_reg_rtx (pmode); | |
5430 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5431 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
5432 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
5433 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
5434 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
5435 | } | |
b6c9286a MM |
5436 | break; |
5437 | ||
eaf1bcf1 | 5438 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 5439 | case ABI_V4: |
c81bebd7 | 5440 | case ABI_SOLARIS: |
b6c9286a | 5441 | case ABI_AIX_NODESC: |
39403d82 | 5442 | emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), |
eaf1bcf1 MM |
5443 | FALSE, VOIDmode, 4, |
5444 | addr, pmode, | |
5445 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
5446 | fnaddr, pmode, | |
5447 | ctx_reg, pmode); | |
b6c9286a MM |
5448 | break; |
5449 | ||
8bd04c56 MM |
5450 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
5451 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 5452 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 5453 | case ABI_NT: |
8bd04c56 MM |
5454 | { |
5455 | rtx tramp_reg = gen_reg_rtx (pmode); | |
5456 | rtx fn_reg = gen_reg_rtx (pmode); | |
5457 | rtx toc_reg = gen_reg_rtx (pmode); | |
5458 | ||
39403d82 | 5459 | emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); |
8bd04c56 MM |
5460 | addr = force_reg (pmode, addr); |
5461 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
5462 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
5463 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
5464 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
5465 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
5466 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
39403d82 | 5467 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); |
8bd04c56 | 5468 | } |
b6c9286a MM |
5469 | break; |
5470 | } | |
5471 | ||
5472 | return; | |
5473 | } | |
7509c759 MM |
5474 | |
5475 | \f | |
5476 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5477 | with arguments ARGS is a valid machine specific attribute for DECL. | |
5478 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
5479 | ||
5480 | int | |
5481 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
296b8152 KG |
5482 | tree decl ATTRIBUTE_UNUSED; |
5483 | tree attributes ATTRIBUTE_UNUSED; | |
5484 | tree identifier ATTRIBUTE_UNUSED; | |
5485 | tree args ATTRIBUTE_UNUSED; | |
7509c759 MM |
5486 | { |
5487 | return 0; | |
5488 | } | |
5489 | ||
5490 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
5491 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
5492 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
5493 | ||
5494 | int | |
5495 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
5496 | tree type; | |
296b8152 | 5497 | tree attributes ATTRIBUTE_UNUSED; |
7509c759 MM |
5498 | tree identifier; |
5499 | tree args; | |
5500 | { | |
5501 | if (TREE_CODE (type) != FUNCTION_TYPE | |
5502 | && TREE_CODE (type) != FIELD_DECL | |
5503 | && TREE_CODE (type) != TYPE_DECL) | |
5504 | return 0; | |
5505 | ||
6a4cee5f MM |
5506 | /* Longcall attribute says that the function is not within 2**26 bytes |
5507 | of the current function, and to do an indirect call. */ | |
5508 | if (is_attribute_p ("longcall", identifier)) | |
5509 | return (args == NULL_TREE); | |
5510 | ||
7509c759 MM |
5511 | if (DEFAULT_ABI == ABI_NT) |
5512 | { | |
5513 | /* Stdcall attribute says callee is responsible for popping arguments | |
5514 | if they are not variable. */ | |
5515 | if (is_attribute_p ("stdcall", identifier)) | |
5516 | return (args == NULL_TREE); | |
5517 | ||
5518 | /* Cdecl attribute says the callee is a normal C declaration */ | |
5519 | if (is_attribute_p ("cdecl", identifier)) | |
5520 | return (args == NULL_TREE); | |
5521 | ||
38e01259 | 5522 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
5523 | indirectly through a __imp_<name> pointer. */ |
5524 | if (is_attribute_p ("dllimport", identifier)) | |
5525 | return (args == NULL_TREE); | |
5526 | ||
38e01259 | 5527 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
5528 | pointer. */ |
5529 | if (is_attribute_p ("dllexport", identifier)) | |
5530 | return (args == NULL_TREE); | |
e56bb9ed | 5531 | |
3cb999d8 DE |
5532 | /* Exception attribute allows the user to specify 1-2 strings |
5533 | or identifiers that will fill in the 3rd and 4th fields | |
5534 | of the structured exception table. */ | |
e56bb9ed MM |
5535 | if (is_attribute_p ("exception", identifier)) |
5536 | { | |
5537 | int i; | |
5538 | ||
5539 | if (args == NULL_TREE) | |
5540 | return 0; | |
5541 | ||
5542 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
5543 | { | |
5544 | tree this_arg = TREE_VALUE (args); | |
5545 | args = TREE_PURPOSE (args); | |
5546 | ||
5547 | if (TREE_CODE (this_arg) != STRING_CST | |
5548 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
5549 | return 0; | |
5550 | } | |
5551 | ||
5552 | return (args == NULL_TREE); | |
5553 | } | |
7509c759 MM |
5554 | } |
5555 | ||
5556 | return 0; | |
5557 | } | |
5558 | ||
5559 | /* If defined, a C expression whose value is zero if the attributes on | |
5560 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
5561 | two if they are nearly compatible (which causes a warning to be | |
5562 | generated). */ | |
5563 | ||
5564 | int | |
5565 | rs6000_comp_type_attributes (type1, type2) | |
296b8152 KG |
5566 | tree type1 ATTRIBUTE_UNUSED; |
5567 | tree type2 ATTRIBUTE_UNUSED; | |
7509c759 MM |
5568 | { |
5569 | return 1; | |
5570 | } | |
5571 | ||
5572 | /* If defined, a C statement that assigns default attributes to newly | |
5573 | defined TYPE. */ | |
5574 | ||
5575 | void | |
5576 | rs6000_set_default_type_attributes (type) | |
296b8152 | 5577 | tree type ATTRIBUTE_UNUSED; |
7509c759 | 5578 | { |
3cb999d8 | 5579 | return; |
7509c759 MM |
5580 | } |
5581 | ||
38e01259 | 5582 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
5583 | struct rtx_def * |
5584 | rs6000_dll_import_ref (call_ref) | |
5585 | rtx call_ref; | |
5586 | { | |
d330fd93 | 5587 | const char *call_name; |
7509c759 MM |
5588 | int len; |
5589 | char *p; | |
5590 | rtx reg1, reg2; | |
5591 | tree node; | |
5592 | ||
5593 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5594 | abort (); | |
5595 | ||
5596 | call_name = XSTR (call_ref, 0); | |
5597 | len = sizeof ("__imp_") + strlen (call_name); | |
5598 | p = alloca (len); | |
5599 | reg2 = gen_reg_rtx (Pmode); | |
5600 | ||
5601 | strcpy (p, "__imp_"); | |
5602 | strcat (p, call_name); | |
5603 | node = get_identifier (p); | |
5604 | ||
3cb999d8 DE |
5605 | reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, |
5606 | IDENTIFIER_POINTER (node))); | |
39403d82 | 5607 | emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); |
7509c759 MM |
5608 | |
5609 | return reg2; | |
5610 | } | |
5611 | ||
3cb999d8 DE |
5612 | /* Return a reference suitable for calling a function with the |
5613 | longcall attribute. */ | |
6a4cee5f MM |
5614 | struct rtx_def * |
5615 | rs6000_longcall_ref (call_ref) | |
5616 | rtx call_ref; | |
5617 | { | |
d330fd93 | 5618 | const char *call_name; |
6a4cee5f MM |
5619 | tree node; |
5620 | ||
5621 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
5622 | return call_ref; | |
5623 | ||
5624 | /* System V adds '.' to the internal name, so skip them. */ | |
5625 | call_name = XSTR (call_ref, 0); | |
5626 | if (*call_name == '.') | |
5627 | { | |
5628 | while (*call_name == '.') | |
5629 | call_name++; | |
5630 | ||
5631 | node = get_identifier (call_name); | |
39403d82 | 5632 | call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); |
6a4cee5f MM |
5633 | } |
5634 | ||
5635 | return force_reg (Pmode, call_ref); | |
5636 | } | |
5637 | ||
7509c759 MM |
5638 | \f |
5639 | /* A C statement or statements to switch to the appropriate section | |
5640 | for output of RTX in mode MODE. You can assume that RTX is some | |
5641 | kind of constant in RTL. The argument MODE is redundant except in | |
5642 | the case of a `const_int' rtx. Select the section by calling | |
5643 | `text_section' or one of the alternatives for other sections. | |
5644 | ||
5645 | Do not define this macro if you put all constants in the read-only | |
5646 | data section. */ | |
5647 | ||
5648 | #ifdef USING_SVR4_H | |
5649 | ||
5650 | void | |
5651 | rs6000_select_rtx_section (mode, x) | |
0865c631 | 5652 | enum machine_mode mode; |
7509c759 MM |
5653 | rtx x; |
5654 | { | |
5655 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
5656 | toc_section (); | |
7509c759 MM |
5657 | else |
5658 | const_section (); | |
5659 | } | |
5660 | ||
5661 | /* A C statement or statements to switch to the appropriate | |
5662 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5663 | or a constant of some sort. RELOC indicates whether forming | |
5664 | the initial value of DECL requires link-time relocations. */ | |
5665 | ||
5666 | void | |
5667 | rs6000_select_section (decl, reloc) | |
5668 | tree decl; | |
5669 | int reloc; | |
5670 | { | |
5671 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5672 | ||
5673 | if (TREE_CODE (decl) == STRING_CST) | |
5674 | { | |
88228c4b | 5675 | if (! flag_writable_strings) |
7509c759 | 5676 | const_section (); |
7509c759 MM |
5677 | else |
5678 | data_section (); | |
5679 | } | |
5680 | else if (TREE_CODE (decl) == VAR_DECL) | |
5681 | { | |
5682 | if ((flag_pic && reloc) | |
3cb999d8 | 5683 | || ! TREE_READONLY (decl) |
7509c759 | 5684 | || TREE_SIDE_EFFECTS (decl) |
3cb999d8 | 5685 | || ! DECL_INITIAL (decl) |
7509c759 | 5686 | || (DECL_INITIAL (decl) != error_mark_node |
3cb999d8 | 5687 | && ! TREE_CONSTANT (DECL_INITIAL (decl)))) |
7509c759 | 5688 | { |
3cb999d8 DE |
5689 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5690 | && (size <= g_switch_value)) | |
7509c759 MM |
5691 | sdata_section (); |
5692 | else | |
5693 | data_section (); | |
5694 | } | |
5695 | else | |
5696 | { | |
3cb999d8 DE |
5697 | if (rs6000_sdata != SDATA_NONE && (size > 0) |
5698 | && (size <= g_switch_value)) | |
c81bebd7 | 5699 | { |
d9407988 | 5700 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5701 | sdata2_section (); |
5702 | else | |
3cb999d8 | 5703 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ |
c81bebd7 | 5704 | } |
7509c759 MM |
5705 | else |
5706 | const_section (); | |
5707 | } | |
5708 | } | |
5709 | else | |
5710 | const_section (); | |
5711 | } | |
d9407988 MM |
5712 | |
5713 | \f | |
d9407988 MM |
5714 | /* If we are referencing a function that is static or is known to be |
5715 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5716 | that we can branch to this function without emitting a no-op after the | |
5717 | call. For real AIX and NT calling sequences, we also replace the | |
5718 | function name with the real name (1 or 2 leading .'s), rather than | |
5719 | the function descriptor name. This saves a lot of overriding code | |
a260abc9 | 5720 | to read the prefixes. */ |
d9407988 MM |
5721 | |
5722 | void | |
5723 | rs6000_encode_section_info (decl) | |
5724 | tree decl; | |
5725 | { | |
5726 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5727 | { | |
5728 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5729 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5730 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5731 | ||
5732 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5733 | { | |
d330fd93 | 5734 | const char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; |
d9407988 MM |
5735 | char *str = permalloc (strlen (prefix) + 1 |
5736 | + strlen (XSTR (sym_ref, 0))); | |
5737 | strcpy (str, prefix); | |
5738 | strcat (str, XSTR (sym_ref, 0)); | |
5739 | XSTR (sym_ref, 0) = str; | |
5740 | } | |
5741 | } | |
5742 | else if (rs6000_sdata != SDATA_NONE | |
5743 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5744 | && TREE_CODE (decl) == VAR_DECL) | |
5745 | { | |
5746 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5747 | tree section_name = DECL_SECTION_NAME (decl); | |
d330fd93 | 5748 | const char *name = (char *)0; |
d9407988 MM |
5749 | int len = 0; |
5750 | ||
5751 | if (section_name) | |
5752 | { | |
5753 | if (TREE_CODE (section_name) == STRING_CST) | |
5754 | { | |
5755 | name = TREE_STRING_POINTER (section_name); | |
5756 | len = TREE_STRING_LENGTH (section_name); | |
5757 | } | |
5758 | else | |
5759 | abort (); | |
5760 | } | |
5761 | ||
5762 | if ((size > 0 && size <= g_switch_value) | |
5763 | || (name | |
3cb999d8 DE |
5764 | && ((len == sizeof (".sdata")-1 |
5765 | && strcmp (name, ".sdata") == 0) | |
5766 | || (len == sizeof (".sdata2")-1 | |
5767 | && strcmp (name, ".sdata2") == 0) | |
5768 | || (len == sizeof (".sbss")-1 | |
5769 | && strcmp (name, ".sbss") == 0) | |
5770 | || (len == sizeof (".sbss2")-1 | |
5771 | && strcmp (name, ".sbss2") == 0) | |
5772 | || (len == sizeof (".PPC.EMB.sdata0")-1 | |
5773 | && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
5774 | || (len == sizeof (".PPC.EMB.sbss0")-1 | |
5775 | && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
d9407988 MM |
5776 | { |
5777 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5778 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5779 | strcpy (str, "@"); | |
5780 | strcat (str, XSTR (sym_ref, 0)); | |
5781 | XSTR (sym_ref, 0) = str; | |
5782 | } | |
5783 | } | |
5784 | } | |
5785 | ||
7509c759 | 5786 | #endif /* USING_SVR4_H */ |
000034eb | 5787 | |
a6c2a102 | 5788 | \f |
000034eb | 5789 | /* Return a REG that occurs in ADDR with coefficient 1. |
02441cd6 JL |
5790 | ADDR can be effectively incremented by incrementing REG. |
5791 | ||
5792 | r0 is special and we must not select it as an address | |
5793 | register by this routine since our caller will try to | |
5794 | increment the returned register via an "la" instruction. */ | |
000034eb DE |
5795 | |
5796 | struct rtx_def * | |
5797 | find_addr_reg (addr) | |
5798 | rtx addr; | |
5799 | { | |
5800 | while (GET_CODE (addr) == PLUS) | |
5801 | { | |
02441cd6 JL |
5802 | if (GET_CODE (XEXP (addr, 0)) == REG |
5803 | && REGNO (XEXP (addr, 0)) != 0) | |
000034eb | 5804 | addr = XEXP (addr, 0); |
02441cd6 JL |
5805 | else if (GET_CODE (XEXP (addr, 1)) == REG |
5806 | && REGNO (XEXP (addr, 1)) != 0) | |
000034eb DE |
5807 | addr = XEXP (addr, 1); |
5808 | else if (CONSTANT_P (XEXP (addr, 0))) | |
5809 | addr = XEXP (addr, 1); | |
5810 | else if (CONSTANT_P (XEXP (addr, 1))) | |
5811 | addr = XEXP (addr, 0); | |
5812 | else | |
5813 | abort (); | |
5814 | } | |
02441cd6 | 5815 | if (GET_CODE (addr) == REG && REGNO (addr) != 0) |
000034eb DE |
5816 | return addr; |
5817 | abort (); | |
5818 | } | |
5819 | ||
a6c2a102 DE |
5820 | void |
5821 | rs6000_fatal_bad_address (op) | |
5822 | rtx op; | |
5823 | { | |
5824 | fatal_insn ("bad address", op); | |
5825 | } |