]>
Commit | Line | Data |
---|---|---|
9878760c | 1 | /* Subroutines used for code generation on IBM RS/6000. |
e5e809f4 | 2 | Copyright (C) 1991, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc. |
fab3bcc3 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
9878760c RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
9878760c | 21 | |
956d6950 | 22 | #include "config.h" |
c4d38ccb | 23 | #include "system.h" |
9878760c RK |
24 | #include "rtl.h" |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "real.h" | |
28 | #include "insn-config.h" | |
29 | #include "conditions.h" | |
30 | #include "insn-flags.h" | |
31 | #include "output.h" | |
32 | #include "insn-attr.h" | |
33 | #include "flags.h" | |
34 | #include "recog.h" | |
35 | #include "expr.h" | |
36 | #include "obstack.h" | |
9b30bae2 | 37 | #include "tree.h" |
2a430ec1 | 38 | #include "except.h" |
a7df97e6 | 39 | #include "function.h" |
9b30bae2 | 40 | |
7509c759 MM |
41 | #ifndef TARGET_NO_PROTOTYPE |
42 | #define TARGET_NO_PROTOTYPE 0 | |
43 | #endif | |
44 | ||
9b30bae2 | 45 | extern char *language_string; |
5248c961 | 46 | extern int profile_block_flag; |
9878760c RK |
47 | |
48 | #define min(A,B) ((A) < (B) ? (A) : (B)) | |
49 | #define max(A,B) ((A) > (B) ? (A) : (B)) | |
50 | ||
5248c961 RK |
51 | /* Target cpu type */ |
52 | ||
53 | enum processor_type rs6000_cpu; | |
8e3f41e7 MM |
54 | struct rs6000_cpu_select rs6000_select[3] = |
55 | { | |
56 | /* switch name, tune arch */ | |
5d6426e0 | 57 | { (char *)0, "--with-cpu=", 1, 1 }, |
8e3f41e7 MM |
58 | { (char *)0, "-mcpu=", 1, 1 }, |
59 | { (char *)0, "-mtune=", 1, 0 }, | |
60 | }; | |
5248c961 | 61 | |
9878760c RK |
62 | /* Set to non-zero by "fix" operation to indicate that itrunc and |
63 | uitrunc must be defined. */ | |
64 | ||
65 | int rs6000_trunc_used; | |
66 | ||
67 | /* Set to non-zero once they have been defined. */ | |
68 | ||
69 | static int trunc_defined; | |
70 | ||
c764f757 RK |
71 | /* Set to non-zero once AIX common-mode calls have been defined. */ |
72 | static int common_mode_defined; | |
c81bebd7 | 73 | |
9878760c RK |
74 | /* Save information from a "cmpxx" operation until the branch or scc is |
75 | emitted. */ | |
9878760c RK |
76 | rtx rs6000_compare_op0, rs6000_compare_op1; |
77 | int rs6000_compare_fp_p; | |
874a0744 MM |
78 | |
79 | #ifdef USING_SVR4_H | |
80 | /* Label number of label created for -mrelocatable, to call to so we can | |
81 | get the address of the GOT section */ | |
82 | int rs6000_pic_labelno; | |
ab9eef41 | 83 | int rs6000_pic_func_labelno; |
c81bebd7 MM |
84 | |
85 | /* Which abi to adhere to */ | |
86 | char *rs6000_abi_name = RS6000_ABI_NAME; | |
d9407988 MM |
87 | |
88 | /* Semantics of the small data area */ | |
89 | enum rs6000_sdata_type rs6000_sdata = SDATA_DATA; | |
90 | ||
91 | /* Which small data model to use */ | |
92 | char *rs6000_sdata_name = (char *)0; | |
874a0744 | 93 | #endif |
4697a36c MM |
94 | |
95 | /* Whether a System V.4 varargs area was created. */ | |
96 | int rs6000_sysv_varargs_p; | |
8f75773e | 97 | |
b6c9286a MM |
98 | /* ABI enumeration available for subtarget to use. */ |
99 | enum rs6000_abi rs6000_current_abi; | |
100 | ||
802a0058 MM |
101 | /* Offset & size for fpmem stack locations used for converting between |
102 | float and integral types. */ | |
103 | int rs6000_fpmem_offset; | |
104 | int rs6000_fpmem_size; | |
105 | ||
38c1f2d7 MM |
106 | /* Debug flags */ |
107 | char *rs6000_debug_name; | |
108 | int rs6000_debug_stack; /* debug stack applications */ | |
109 | int rs6000_debug_arg; /* debug argument handling */ | |
110 | ||
111 | /* Flag to say the TOC is initialized */ | |
112 | int toc_initialized; | |
113 | ||
c81bebd7 MM |
114 | \f |
115 | /* Default register names. */ | |
116 | char rs6000_reg_names[][8] = | |
117 | { | |
802a0058 MM |
118 | "0", "1", "2", "3", "4", "5", "6", "7", |
119 | "8", "9", "10", "11", "12", "13", "14", "15", | |
120 | "16", "17", "18", "19", "20", "21", "22", "23", | |
121 | "24", "25", "26", "27", "28", "29", "30", "31", | |
122 | "0", "1", "2", "3", "4", "5", "6", "7", | |
123 | "8", "9", "10", "11", "12", "13", "14", "15", | |
124 | "16", "17", "18", "19", "20", "21", "22", "23", | |
125 | "24", "25", "26", "27", "28", "29", "30", "31", | |
126 | "mq", "lr", "ctr","ap", | |
127 | "0", "1", "2", "3", "4", "5", "6", "7", | |
128 | "fpmem" | |
c81bebd7 MM |
129 | }; |
130 | ||
131 | #ifdef TARGET_REGNAMES | |
132 | static char alt_reg_names[][8] = | |
133 | { | |
802a0058 MM |
134 | "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", |
135 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", | |
136 | "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", | |
137 | "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", | |
138 | "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", | |
139 | "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", | |
140 | "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", | |
141 | "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", | |
142 | "mq", "lr", "ctr", "ap", | |
143 | "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", | |
144 | "fpmem" | |
c81bebd7 MM |
145 | }; |
146 | #endif | |
9878760c | 147 | \f |
daf11973 MM |
148 | #ifndef MASK_STRICT_ALIGN |
149 | #define MASK_STRICT_ALIGN 0 | |
150 | #endif | |
151 | ||
5248c961 RK |
152 | /* Override command line options. Mostly we process the processor |
153 | type and sometimes adjust other TARGET_ options. */ | |
154 | ||
155 | void | |
8e3f41e7 MM |
156 | rs6000_override_options (default_cpu) |
157 | char *default_cpu; | |
5248c961 | 158 | { |
c4d38ccb | 159 | size_t i, j; |
8e3f41e7 | 160 | struct rs6000_cpu_select *ptr; |
5248c961 | 161 | |
85638c0d RK |
162 | /* Simplify the entries below by making a mask for any POWER |
163 | variant and any PowerPC variant. */ | |
164 | ||
938937d8 | 165 | #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) |
68c49ffa RK |
166 | #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ |
167 | | MASK_PPC_GFXOPT | MASK_POWERPC64) | |
168 | #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) | |
85638c0d | 169 | |
5248c961 RK |
170 | static struct ptt |
171 | { | |
172 | char *name; /* Canonical processor name. */ | |
173 | enum processor_type processor; /* Processor type enum value. */ | |
174 | int target_enable; /* Target flags to enable. */ | |
175 | int target_disable; /* Target flags to disable. */ | |
176 | } processor_target_table[] | |
cf27b467 MM |
177 | = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, |
178 | POWER_MASKS | POWERPC_MASKS}, | |
db7f1e43 | 179 | {"power", PROCESSOR_POWER, |
938937d8 | 180 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 | 181 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
8e3f41e7 MM |
182 | {"power2", PROCESSOR_POWER, |
183 | MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, | |
184 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, | |
db7f1e43 RK |
185 | {"powerpc", PROCESSOR_POWERPC, |
186 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
68c49ffa | 187 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
db7f1e43 | 188 | {"rios", PROCESSOR_RIOS1, |
938937d8 | 189 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
190 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
191 | {"rios1", PROCESSOR_RIOS1, | |
938937d8 | 192 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
193 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
194 | {"rsc", PROCESSOR_PPC601, | |
938937d8 | 195 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
196 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
197 | {"rsc1", PROCESSOR_PPC601, | |
938937d8 | 198 | MASK_POWER | MASK_MULTIPLE | MASK_STRING, |
db7f1e43 RK |
199 | MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
200 | {"rios2", PROCESSOR_RIOS2, | |
938937d8 | 201 | MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, |
db7f1e43 | 202 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, |
49a0b204 | 203 | {"403", PROCESSOR_PPC403, |
daf11973 | 204 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, |
49a0b204 | 205 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
cf27b467 MM |
206 | {"505", PROCESSOR_MPCCORE, |
207 | MASK_POWERPC | MASK_NEW_MNEMONICS, | |
208 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
5248c961 | 209 | {"601", PROCESSOR_PPC601, |
938937d8 | 210 | MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, |
68c49ffa | 211 | MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, |
1ec26da6 | 212 | {"602", PROCESSOR_PPC603, |
cf27b467 MM |
213 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
214 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 215 | {"603", PROCESSOR_PPC603, |
68c49ffa RK |
216 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
217 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a MM |
218 | {"603e", PROCESSOR_PPC603, |
219 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
220 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
5248c961 | 221 | {"604", PROCESSOR_PPC604, |
b6c9286a MM |
222 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
223 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
07e6159a MM |
224 | {"604e", PROCESSOR_PPC604, |
225 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, | |
226 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, | |
b6c9286a | 227 | {"620", PROCESSOR_PPC620, |
68c49ffa | 228 | MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, |
cf27b467 | 229 | POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, |
07e6159a MM |
230 | {"801", PROCESSOR_MPCCORE, |
231 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
232 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
233 | {"821", PROCESSOR_MPCCORE, |
234 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
235 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
07e6159a MM |
236 | {"823", PROCESSOR_MPCCORE, |
237 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
238 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, | |
cf27b467 MM |
239 | {"860", PROCESSOR_MPCCORE, |
240 | MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, | |
241 | POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; | |
5248c961 | 242 | |
c4d38ccb | 243 | size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); |
5248c961 | 244 | |
8a61d227 | 245 | int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ |
938937d8 | 246 | int string = TARGET_STRING; /* save current -mstring/-mno-string status */ |
8a61d227 | 247 | |
5248c961 RK |
248 | profile_block_flag = 0; |
249 | ||
250 | /* Identify the processor type */ | |
8e3f41e7 MM |
251 | rs6000_select[0].string = default_cpu; |
252 | rs6000_cpu = PROCESSOR_DEFAULT; | |
8e3f41e7 MM |
253 | |
254 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
5248c961 | 255 | { |
8e3f41e7 MM |
256 | ptr = &rs6000_select[i]; |
257 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
5248c961 | 258 | { |
8e3f41e7 MM |
259 | for (j = 0; j < ptt_size; j++) |
260 | if (! strcmp (ptr->string, processor_target_table[j].name)) | |
261 | { | |
262 | if (ptr->set_tune_p) | |
263 | rs6000_cpu = processor_target_table[j].processor; | |
264 | ||
265 | if (ptr->set_arch_p) | |
266 | { | |
267 | target_flags |= processor_target_table[j].target_enable; | |
268 | target_flags &= ~processor_target_table[j].target_disable; | |
269 | } | |
270 | break; | |
271 | } | |
272 | ||
273 | if (i == ptt_size) | |
274 | error ("bad value (%s) for %s switch", ptr->string, ptr->name); | |
5248c961 RK |
275 | } |
276 | } | |
8a61d227 MM |
277 | |
278 | /* If -mmultiple or -mno-multiple was explicitly used, don't | |
279 | override with the processor default */ | |
280 | if (TARGET_MULTIPLE_SET) | |
281 | target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; | |
7e69e155 | 282 | |
938937d8 MM |
283 | /* If -mstring or -mno-string was explicitly used, don't |
284 | override with the processor default */ | |
285 | if (TARGET_STRING_SET) | |
1f5515bf | 286 | target_flags = (target_flags & ~MASK_STRING) | string; |
938937d8 | 287 | |
7e69e155 MM |
288 | /* Don't allow -mmultiple or -mstring on little endian systems, because the |
289 | hardware doesn't support the instructions used in little endian mode */ | |
290 | if (!BYTES_BIG_ENDIAN) | |
291 | { | |
292 | if (TARGET_MULTIPLE) | |
293 | { | |
294 | target_flags &= ~MASK_MULTIPLE; | |
295 | if (TARGET_MULTIPLE_SET) | |
296 | warning ("-mmultiple is not supported on little endian systems"); | |
297 | } | |
298 | ||
299 | if (TARGET_STRING) | |
300 | { | |
301 | target_flags &= ~MASK_STRING; | |
938937d8 MM |
302 | if (TARGET_STRING_SET) |
303 | warning ("-mstring is not supported on little endian systems"); | |
7e69e155 MM |
304 | } |
305 | } | |
3933e0e1 | 306 | |
38c1f2d7 MM |
307 | /* Set debug flags */ |
308 | if (rs6000_debug_name) | |
309 | { | |
310 | if (!strcmp (rs6000_debug_name, "all")) | |
311 | rs6000_debug_stack = rs6000_debug_arg = 1; | |
312 | else if (!strcmp (rs6000_debug_name, "stack")) | |
313 | rs6000_debug_stack = 1; | |
314 | else if (!strcmp (rs6000_debug_name, "arg")) | |
315 | rs6000_debug_arg = 1; | |
316 | else | |
317 | error ("Unknown -mdebug-%s switch", rs6000_debug_name); | |
318 | } | |
319 | ||
c81bebd7 MM |
320 | #ifdef TARGET_REGNAMES |
321 | /* If the user desires alternate register names, copy in the alternate names | |
322 | now. */ | |
323 | if (TARGET_REGNAMES) | |
324 | bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names)); | |
325 | #endif | |
326 | ||
3933e0e1 MM |
327 | #ifdef SUBTARGET_OVERRIDE_OPTIONS |
328 | SUBTARGET_OVERRIDE_OPTIONS; | |
329 | #endif | |
5248c961 | 330 | } |
3cfa4909 MM |
331 | \f |
332 | /* Do anything needed at the start of the asm file. */ | |
333 | ||
334 | void | |
335 | rs6000_file_start (file, default_cpu) | |
336 | FILE *file; | |
337 | char *default_cpu; | |
338 | { | |
c4d38ccb | 339 | size_t i; |
3cfa4909 MM |
340 | char buffer[80]; |
341 | char *start = buffer; | |
342 | struct rs6000_cpu_select *ptr; | |
343 | ||
344 | if (flag_verbose_asm) | |
345 | { | |
346 | sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); | |
347 | rs6000_select[0].string = default_cpu; | |
348 | ||
349 | for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) | |
350 | { | |
351 | ptr = &rs6000_select[i]; | |
352 | if (ptr->string != (char *)0 && ptr->string[0] != '\0') | |
353 | { | |
354 | fprintf (file, "%s %s%s", start, ptr->name, ptr->string); | |
355 | start = ""; | |
356 | } | |
357 | } | |
358 | ||
359 | #ifdef USING_SVR4_H | |
360 | switch (rs6000_sdata) | |
361 | { | |
362 | case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; | |
363 | case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; | |
364 | case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; | |
365 | case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; | |
366 | } | |
367 | ||
368 | if (rs6000_sdata && g_switch_value) | |
369 | { | |
370 | fprintf (file, "%s -G %d", start, g_switch_value); | |
371 | start = ""; | |
372 | } | |
373 | #endif | |
374 | ||
375 | if (*start == '\0') | |
376 | fputs ("\n", file); | |
377 | } | |
378 | } | |
379 | ||
24d304eb RK |
380 | \f |
381 | /* Create a CONST_DOUBLE from a string. */ | |
382 | ||
383 | struct rtx_def * | |
384 | rs6000_float_const (string, mode) | |
385 | char *string; | |
386 | enum machine_mode mode; | |
387 | { | |
388 | REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); | |
389 | return immed_real_const_1 (value, mode); | |
390 | } | |
391 | ||
75814ad4 MM |
392 | \f |
393 | /* Create a CONST_DOUBLE like immed_double_const, except reverse the | |
394 | two parts of the constant if the target is little endian. */ | |
395 | ||
d679bebf RK |
396 | struct rtx_def * |
397 | rs6000_immed_double_const (i0, i1, mode) | |
75814ad4 MM |
398 | HOST_WIDE_INT i0, i1; |
399 | enum machine_mode mode; | |
400 | { | |
401 | if (! WORDS_BIG_ENDIAN) | |
402 | return immed_double_const (i1, i0, mode); | |
403 | ||
404 | return immed_double_const (i0, i1, mode); | |
405 | } | |
406 | ||
5248c961 | 407 | \f |
9878760c RK |
408 | /* Return non-zero if this function is known to have a null epilogue. */ |
409 | ||
410 | int | |
411 | direct_return () | |
412 | { | |
4697a36c MM |
413 | if (reload_completed) |
414 | { | |
415 | rs6000_stack_t *info = rs6000_stack_info (); | |
416 | ||
417 | if (info->first_gp_reg_save == 32 | |
418 | && info->first_fp_reg_save == 64 | |
419 | && !info->lr_save_p | |
1b4a2731 | 420 | && !info->cr_save_p |
4697a36c MM |
421 | && !info->push_p) |
422 | return 1; | |
423 | } | |
424 | ||
425 | return 0; | |
9878760c RK |
426 | } |
427 | ||
428 | /* Returns 1 always. */ | |
429 | ||
430 | int | |
431 | any_operand (op, mode) | |
432 | register rtx op; | |
433 | enum machine_mode mode; | |
434 | { | |
435 | return 1; | |
436 | } | |
437 | ||
b6c9286a | 438 | /* Returns 1 if op is the count register */ |
38c1f2d7 MM |
439 | int |
440 | count_register_operand(op, mode) | |
b6c9286a MM |
441 | register rtx op; |
442 | enum machine_mode mode; | |
443 | { | |
444 | if (GET_CODE (op) != REG) | |
445 | return 0; | |
446 | ||
447 | if (REGNO (op) == COUNT_REGISTER_REGNUM) | |
448 | return 1; | |
449 | ||
450 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
451 | return 1; | |
452 | ||
453 | return 0; | |
454 | } | |
455 | ||
802a0058 MM |
456 | /* Returns 1 if op is memory location for float/int conversions that masquerades |
457 | as a register. */ | |
38c1f2d7 MM |
458 | int |
459 | fpmem_operand(op, mode) | |
802a0058 MM |
460 | register rtx op; |
461 | enum machine_mode mode; | |
462 | { | |
463 | if (GET_CODE (op) != REG) | |
464 | return 0; | |
465 | ||
466 | if (FPMEM_REGNO_P (REGNO (op))) | |
467 | return 1; | |
468 | ||
469 | #if 0 | |
470 | if (REGNO (op) > FIRST_PSEUDO_REGISTER) | |
471 | return 1; | |
472 | #endif | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
9878760c RK |
477 | /* Return 1 if OP is a constant that can fit in a D field. */ |
478 | ||
479 | int | |
480 | short_cint_operand (op, mode) | |
481 | register rtx op; | |
482 | enum machine_mode mode; | |
483 | { | |
484 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 485 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000); |
9878760c RK |
486 | } |
487 | ||
488 | /* Similar for a unsigned D field. */ | |
489 | ||
490 | int | |
491 | u_short_cint_operand (op, mode) | |
492 | register rtx op; | |
493 | enum machine_mode mode; | |
494 | { | |
495 | return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0); | |
496 | } | |
497 | ||
dcfedcd0 RK |
498 | /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ |
499 | ||
500 | int | |
501 | non_short_cint_operand (op, mode) | |
502 | register rtx op; | |
503 | enum machine_mode mode; | |
504 | { | |
505 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 506 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); |
dcfedcd0 RK |
507 | } |
508 | ||
9878760c RK |
509 | /* Returns 1 if OP is a register that is not special (i.e., not MQ, |
510 | ctr, or lr). */ | |
511 | ||
512 | int | |
cd2b37d9 | 513 | gpc_reg_operand (op, mode) |
9878760c RK |
514 | register rtx op; |
515 | enum machine_mode mode; | |
516 | { | |
517 | return (register_operand (op, mode) | |
802a0058 MM |
518 | && (GET_CODE (op) != REG |
519 | || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) | |
520 | || REGNO (op) < 64)); | |
9878760c RK |
521 | } |
522 | ||
523 | /* Returns 1 if OP is either a pseudo-register or a register denoting a | |
524 | CR field. */ | |
525 | ||
526 | int | |
527 | cc_reg_operand (op, mode) | |
528 | register rtx op; | |
529 | enum machine_mode mode; | |
530 | { | |
531 | return (register_operand (op, mode) | |
532 | && (GET_CODE (op) != REG | |
533 | || REGNO (op) >= FIRST_PSEUDO_REGISTER | |
534 | || CR_REGNO_P (REGNO (op)))); | |
535 | } | |
536 | ||
537 | /* Returns 1 if OP is either a constant integer valid for a D-field or a | |
538 | non-special register. If a register, it must be in the proper mode unless | |
539 | MODE is VOIDmode. */ | |
540 | ||
541 | int | |
542 | reg_or_short_operand (op, mode) | |
543 | register rtx op; | |
544 | enum machine_mode mode; | |
545 | { | |
f5a28898 | 546 | return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); |
9878760c RK |
547 | } |
548 | ||
549 | /* Similar, except check if the negation of the constant would be valid for | |
550 | a D-field. */ | |
551 | ||
552 | int | |
553 | reg_or_neg_short_operand (op, mode) | |
554 | register rtx op; | |
555 | enum machine_mode mode; | |
556 | { | |
557 | if (GET_CODE (op) == CONST_INT) | |
558 | return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); | |
559 | ||
cd2b37d9 | 560 | return gpc_reg_operand (op, mode); |
9878760c RK |
561 | } |
562 | ||
563 | /* Return 1 if the operand is either a register or an integer whose high-order | |
564 | 16 bits are zero. */ | |
565 | ||
566 | int | |
567 | reg_or_u_short_operand (op, mode) | |
568 | register rtx op; | |
569 | enum machine_mode mode; | |
570 | { | |
571 | if (GET_CODE (op) == CONST_INT | |
572 | && (INTVAL (op) & 0xffff0000) == 0) | |
573 | return 1; | |
574 | ||
cd2b37d9 | 575 | return gpc_reg_operand (op, mode); |
9878760c RK |
576 | } |
577 | ||
578 | /* Return 1 is the operand is either a non-special register or ANY | |
579 | constant integer. */ | |
580 | ||
581 | int | |
582 | reg_or_cint_operand (op, mode) | |
583 | register rtx op; | |
584 | enum machine_mode mode; | |
585 | { | |
cd2b37d9 | 586 | return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode); |
9878760c RK |
587 | } |
588 | ||
766a866c MM |
589 | /* Return 1 if the operand is an operand that can be loaded via the GOT */ |
590 | ||
591 | int | |
592 | got_operand (op, mode) | |
593 | register rtx op; | |
594 | enum machine_mode mode; | |
595 | { | |
596 | return (GET_CODE (op) == SYMBOL_REF | |
597 | || GET_CODE (op) == CONST | |
598 | || GET_CODE (op) == LABEL_REF); | |
599 | } | |
600 | ||
38c1f2d7 MM |
601 | /* Return 1 if the operand is a simple references that can be loaded via |
602 | the GOT (labels involving addition aren't allowed). */ | |
603 | ||
604 | int | |
605 | got_no_const_operand (op, mode) | |
606 | register rtx op; | |
607 | enum machine_mode mode; | |
608 | { | |
609 | return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); | |
610 | } | |
611 | ||
4e74d8ec MM |
612 | /* Return the number of instructions it takes to form a constant in an |
613 | integer register. */ | |
614 | ||
615 | static int | |
616 | num_insns_constant_wide (value) | |
617 | HOST_WIDE_INT value; | |
618 | { | |
619 | /* signed constant loadable with {cal|addi} */ | |
620 | if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) | |
621 | return 1; | |
622 | ||
623 | #if HOST_BITS_PER_WIDE_INT == 32 | |
624 | /* constant loadable with {cau|addis} */ | |
625 | else if ((value & 0xffff) == 0) | |
626 | return 1; | |
627 | ||
628 | #else | |
629 | /* constant loadable with {cau|addis} */ | |
630 | else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) | |
631 | return 1; | |
632 | ||
633 | else if (TARGET_64BIT) | |
634 | { | |
635 | HOST_WIDE_INT low = value & 0xffffffff; | |
636 | HOST_WIDE_INT high = value >> 32; | |
637 | ||
638 | if (high == 0 && (low & 0x80000000) == 0) | |
639 | return 2; | |
640 | ||
641 | else if (high == 0xffffffff && (low & 0x80000000) != 0) | |
642 | return 2; | |
643 | ||
644 | else if (!low) | |
645 | return num_insns_constant_wide (high) + 1; | |
646 | ||
647 | else | |
648 | return (num_insns_constant_wide (high) | |
e396202a | 649 | + num_insns_constant_wide (low) + 1); |
4e74d8ec MM |
650 | } |
651 | #endif | |
652 | ||
653 | else | |
654 | return 2; | |
655 | } | |
656 | ||
657 | int | |
658 | num_insns_constant (op, mode) | |
659 | rtx op; | |
660 | enum machine_mode mode; | |
661 | { | |
4e74d8ec MM |
662 | if (GET_CODE (op) == CONST_INT) |
663 | return num_insns_constant_wide (INTVAL (op)); | |
664 | ||
6fc48950 MM |
665 | else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) |
666 | { | |
667 | long l; | |
668 | REAL_VALUE_TYPE rv; | |
669 | ||
670 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
671 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
672 | return num_insns_constant_wide ((HOST_WIDE_INT)l); | |
673 | } | |
674 | ||
47ad8c61 | 675 | else if (GET_CODE (op) == CONST_DOUBLE) |
4e74d8ec | 676 | { |
47ad8c61 MM |
677 | HOST_WIDE_INT low; |
678 | HOST_WIDE_INT high; | |
679 | long l[2]; | |
680 | REAL_VALUE_TYPE rv; | |
681 | int endian = (WORDS_BIG_ENDIAN == 0); | |
4e74d8ec | 682 | |
47ad8c61 MM |
683 | if (mode == VOIDmode || mode == DImode) |
684 | { | |
685 | high = CONST_DOUBLE_HIGH (op); | |
686 | low = CONST_DOUBLE_LOW (op); | |
687 | } | |
688 | else | |
689 | { | |
690 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
691 | REAL_VALUE_TO_TARGET_DOUBLE (rv, l); | |
692 | high = l[endian]; | |
693 | low = l[1 - endian]; | |
694 | } | |
4e74d8ec | 695 | |
47ad8c61 MM |
696 | if (TARGET_32BIT) |
697 | return (num_insns_constant_wide (low) | |
698 | + num_insns_constant_wide (high)); | |
4e74d8ec MM |
699 | |
700 | else | |
47ad8c61 MM |
701 | { |
702 | if (high == 0 && (low & 0x80000000) == 0) | |
703 | return num_insns_constant_wide (low); | |
704 | ||
705 | else if (((high & 0xffffffff) == 0xffffffff) | |
706 | && ((low & 0x80000000) != 0)) | |
707 | return num_insns_constant_wide (low); | |
708 | ||
709 | else if (low == 0) | |
710 | return num_insns_constant_wide (high) + 1; | |
711 | ||
712 | else | |
713 | return (num_insns_constant_wide (high) | |
714 | + num_insns_constant_wide (low) + 1); | |
715 | } | |
4e74d8ec MM |
716 | } |
717 | ||
718 | else | |
719 | abort (); | |
720 | } | |
721 | ||
6f2f8311 RK |
722 | /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register |
723 | with one instruction per word. We only do this if we can safely read | |
724 | CONST_DOUBLE_{LOW,HIGH}. */ | |
9878760c RK |
725 | |
726 | int | |
727 | easy_fp_constant (op, mode) | |
728 | register rtx op; | |
729 | register enum machine_mode mode; | |
730 | { | |
9878760c RK |
731 | if (GET_CODE (op) != CONST_DOUBLE |
732 | || GET_MODE (op) != mode | |
4e74d8ec | 733 | || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) |
9878760c RK |
734 | return 0; |
735 | ||
b6c9286a | 736 | /* Consider all constants with -msoft-float to be easy */ |
4e74d8ec | 737 | if (TARGET_SOFT_FLOAT && mode != DImode) |
b6c9286a MM |
738 | return 1; |
739 | ||
a7273471 MM |
740 | /* If we are using V.4 style PIC, consider all constants to be hard */ |
741 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
742 | return 0; | |
743 | ||
5ae4759c MM |
744 | #ifdef TARGET_RELOCATABLE |
745 | /* Similarly if we are using -mrelocatable, consider all constants to be hard */ | |
746 | if (TARGET_RELOCATABLE) | |
747 | return 0; | |
748 | #endif | |
749 | ||
042259f2 DE |
750 | if (mode == DFmode) |
751 | { | |
752 | long k[2]; | |
753 | REAL_VALUE_TYPE rv; | |
754 | ||
755 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
756 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
9878760c | 757 | |
4e74d8ec MM |
758 | return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 |
759 | && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); | |
042259f2 | 760 | } |
4e74d8ec MM |
761 | |
762 | else if (mode == SFmode) | |
042259f2 DE |
763 | { |
764 | long l; | |
765 | REAL_VALUE_TYPE rv; | |
766 | ||
767 | REAL_VALUE_FROM_CONST_DOUBLE (rv, op); | |
768 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
9878760c | 769 | |
4e74d8ec | 770 | return num_insns_constant_wide (l) == 1; |
042259f2 | 771 | } |
4e74d8ec MM |
772 | |
773 | else if (mode == DImode && TARGET_32BIT) | |
774 | return num_insns_constant (op, DImode) == 2; | |
775 | ||
776 | else | |
777 | abort (); | |
9878760c | 778 | } |
8f75773e | 779 | |
b6c9286a MM |
780 | /* Return 1 if the operand is in volatile memory. Note that during the |
781 | RTL generation phase, memory_operand does not return TRUE for | |
782 | volatile memory references. So this function allows us to | |
783 | recognize volatile references where its safe. */ | |
784 | ||
785 | int | |
786 | volatile_mem_operand (op, mode) | |
787 | register rtx op; | |
788 | enum machine_mode mode; | |
789 | { | |
790 | if (GET_CODE (op) != MEM) | |
791 | return 0; | |
792 | ||
793 | if (!MEM_VOLATILE_P (op)) | |
794 | return 0; | |
795 | ||
796 | if (mode != GET_MODE (op)) | |
797 | return 0; | |
798 | ||
799 | if (reload_completed) | |
800 | return memory_operand (op, mode); | |
801 | ||
802 | if (reload_in_progress) | |
803 | return strict_memory_address_p (mode, XEXP (op, 0)); | |
804 | ||
805 | return memory_address_p (mode, XEXP (op, 0)); | |
806 | } | |
807 | ||
5b5040b9 | 808 | /* Return 1 if the operand is an offsettable memory address. */ |
914c2e77 RK |
809 | |
810 | int | |
5b5040b9 | 811 | offsettable_addr_operand (op, mode) |
914c2e77 RK |
812 | register rtx op; |
813 | enum machine_mode mode; | |
814 | { | |
8f75773e | 815 | return offsettable_address_p (reload_completed | reload_in_progress, |
5b5040b9 | 816 | mode, op); |
914c2e77 RK |
817 | } |
818 | ||
9878760c RK |
819 | /* Return 1 if the operand is either an easy FP constant (see above) or |
820 | memory. */ | |
821 | ||
822 | int | |
823 | mem_or_easy_const_operand (op, mode) | |
824 | register rtx op; | |
825 | enum machine_mode mode; | |
826 | { | |
827 | return memory_operand (op, mode) || easy_fp_constant (op, mode); | |
828 | } | |
829 | ||
830 | /* Return 1 if the operand is either a non-special register or an item | |
831 | that can be used as the operand of an SI add insn. */ | |
832 | ||
833 | int | |
834 | add_operand (op, mode) | |
835 | register rtx op; | |
836 | enum machine_mode mode; | |
837 | { | |
838 | return (reg_or_short_operand (op, mode) | |
839 | || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0)); | |
840 | } | |
841 | ||
dcfedcd0 RK |
842 | /* Return 1 if OP is a constant but not a valid add_operand. */ |
843 | ||
844 | int | |
845 | non_add_cint_operand (op, mode) | |
846 | register rtx op; | |
847 | enum machine_mode mode; | |
848 | { | |
849 | return (GET_CODE (op) == CONST_INT | |
a7653a2c | 850 | && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 |
dcfedcd0 RK |
851 | && (INTVAL (op) & 0xffff) != 0); |
852 | } | |
853 | ||
9878760c RK |
854 | /* Return 1 if the operand is a non-special register or a constant that |
855 | can be used as the operand of an OR or XOR insn on the RS/6000. */ | |
856 | ||
857 | int | |
858 | logical_operand (op, mode) | |
859 | register rtx op; | |
860 | enum machine_mode mode; | |
861 | { | |
cd2b37d9 | 862 | return (gpc_reg_operand (op, mode) |
9878760c RK |
863 | || (GET_CODE (op) == CONST_INT |
864 | && ((INTVAL (op) & 0xffff0000) == 0 | |
865 | || (INTVAL (op) & 0xffff) == 0))); | |
866 | } | |
867 | ||
dcfedcd0 RK |
868 | /* Return 1 if C is a constant that is not a logical operand (as |
869 | above). */ | |
870 | ||
871 | int | |
872 | non_logical_cint_operand (op, mode) | |
873 | register rtx op; | |
874 | enum machine_mode mode; | |
875 | { | |
876 | return (GET_CODE (op) == CONST_INT | |
877 | && (INTVAL (op) & 0xffff0000) != 0 | |
878 | && (INTVAL (op) & 0xffff) != 0); | |
879 | } | |
880 | ||
9878760c RK |
881 | /* Return 1 if C is a constant that can be encoded in a mask on the |
882 | RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. | |
883 | Reject all ones and all zeros, since these should have been optimized | |
884 | away and confuse the making of MB and ME. */ | |
885 | ||
886 | int | |
887 | mask_constant (c) | |
888 | register int c; | |
889 | { | |
890 | int i; | |
891 | int last_bit_value; | |
892 | int transitions = 0; | |
893 | ||
894 | if (c == 0 || c == ~0) | |
895 | return 0; | |
896 | ||
897 | last_bit_value = c & 1; | |
898 | ||
899 | for (i = 1; i < 32; i++) | |
900 | if (((c >>= 1) & 1) != last_bit_value) | |
901 | last_bit_value ^= 1, transitions++; | |
902 | ||
903 | return transitions <= 2; | |
904 | } | |
905 | ||
906 | /* Return 1 if the operand is a constant that is a mask on the RS/6000. */ | |
907 | ||
908 | int | |
909 | mask_operand (op, mode) | |
910 | register rtx op; | |
911 | enum machine_mode mode; | |
912 | { | |
913 | return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op)); | |
914 | } | |
915 | ||
916 | /* Return 1 if the operand is either a non-special register or a | |
917 | constant that can be used as the operand of an RS/6000 logical AND insn. */ | |
918 | ||
919 | int | |
920 | and_operand (op, mode) | |
921 | register rtx op; | |
922 | enum machine_mode mode; | |
923 | { | |
38c1f2d7 | 924 | return (logical_operand (op, mode) |
9878760c RK |
925 | || mask_operand (op, mode)); |
926 | } | |
927 | ||
dcfedcd0 RK |
928 | /* Return 1 if the operand is a constant but not a valid operand for an AND |
929 | insn. */ | |
930 | ||
931 | int | |
932 | non_and_cint_operand (op, mode) | |
933 | register rtx op; | |
934 | enum machine_mode mode; | |
935 | { | |
936 | return GET_CODE (op) == CONST_INT && ! and_operand (op, mode); | |
937 | } | |
938 | ||
9878760c RK |
939 | /* Return 1 if the operand is a general register or memory operand. */ |
940 | ||
941 | int | |
942 | reg_or_mem_operand (op, mode) | |
943 | register rtx op; | |
944 | register enum machine_mode mode; | |
945 | { | |
b6c9286a MM |
946 | return (gpc_reg_operand (op, mode) |
947 | || memory_operand (op, mode) | |
948 | || volatile_mem_operand (op, mode)); | |
9878760c RK |
949 | } |
950 | ||
a7a813f7 RK |
951 | /* Return 1 if the operand is a general register or memory operand without |
952 | pre-inc or pre_dec which produces invalid form of PowerPC lwa | |
953 | instruction. */ | |
954 | ||
955 | int | |
956 | lwa_operand (op, mode) | |
957 | register rtx op; | |
958 | register enum machine_mode mode; | |
959 | { | |
960 | rtx inner = op; | |
961 | ||
962 | if (reload_completed && GET_CODE (inner) == SUBREG) | |
963 | inner = SUBREG_REG (inner); | |
964 | ||
965 | return gpc_reg_operand (inner, mode) | |
966 | || (memory_operand (inner, mode) | |
967 | && GET_CODE (XEXP (inner, 0)) != PRE_INC | |
968 | && GET_CODE (XEXP (inner, 0)) != PRE_DEC); | |
969 | } | |
970 | ||
9878760c RK |
971 | /* Return 1 if the operand, used inside a MEM, is a valid first argument |
972 | to CALL. This is a SYMBOL_REF or a pseudo-register, which will be | |
973 | forced to lr. */ | |
974 | ||
975 | int | |
976 | call_operand (op, mode) | |
977 | register rtx op; | |
978 | enum machine_mode mode; | |
979 | { | |
980 | if (mode != VOIDmode && GET_MODE (op) != mode) | |
981 | return 0; | |
982 | ||
983 | return (GET_CODE (op) == SYMBOL_REF | |
984 | || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); | |
985 | } | |
986 | ||
2af3d377 RK |
987 | |
988 | /* Return 1 if the operand is a SYMBOL_REF for a function known to be in | |
989 | this file. */ | |
990 | ||
991 | int | |
992 | current_file_function_operand (op, mode) | |
993 | register rtx op; | |
994 | enum machine_mode mode; | |
995 | { | |
996 | return (GET_CODE (op) == SYMBOL_REF | |
997 | && (SYMBOL_REF_FLAG (op) | |
998 | || op == XEXP (DECL_RTL (current_function_decl), 0))); | |
999 | } | |
1000 | ||
1001 | ||
9878760c RK |
1002 | /* Return 1 if this operand is a valid input for a move insn. */ |
1003 | ||
1004 | int | |
1005 | input_operand (op, mode) | |
1006 | register rtx op; | |
1007 | enum machine_mode mode; | |
1008 | { | |
eb4e8003 | 1009 | /* Memory is always valid. */ |
9878760c RK |
1010 | if (memory_operand (op, mode)) |
1011 | return 1; | |
1012 | ||
eb4e8003 RK |
1013 | /* For floating-point, easy constants are valid. */ |
1014 | if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1015 | && CONSTANT_P (op) | |
1016 | && easy_fp_constant (op, mode)) | |
1017 | return 1; | |
1018 | ||
4e74d8ec MM |
1019 | /* Allow any integer constant. */ |
1020 | if (GET_MODE_CLASS (mode) == MODE_INT | |
1021 | && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)) | |
1022 | return 1; | |
1023 | ||
eb4e8003 RK |
1024 | /* For floating-point or multi-word mode, the only remaining valid type |
1025 | is a register. */ | |
9878760c RK |
1026 | if (GET_MODE_CLASS (mode) == MODE_FLOAT |
1027 | || GET_MODE_SIZE (mode) > UNITS_PER_WORD) | |
eb4e8003 | 1028 | return register_operand (op, mode); |
9878760c | 1029 | |
88fe15a1 RK |
1030 | /* The only cases left are integral modes one word or smaller (we |
1031 | do not get called for MODE_CC values). These can be in any | |
1032 | register. */ | |
1033 | if (register_operand (op, mode)) | |
a8b3aeda | 1034 | return 1; |
88fe15a1 | 1035 | |
84cf9dda | 1036 | /* A SYMBOL_REF referring to the TOC is valid. */ |
7fec4abd | 1037 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) |
84cf9dda RK |
1038 | return 1; |
1039 | ||
b6c9286a MM |
1040 | /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC |
1041 | directly in the instruction stream */ | |
1042 | if (DEFAULT_ABI == ABI_NT | |
1043 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) | |
1044 | return 1; | |
1045 | ||
88228c4b MM |
1046 | /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region |
1047 | to be valid. */ | |
c81bebd7 | 1048 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
88228c4b MM |
1049 | && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) |
1050 | && small_data_operand (op, Pmode)) | |
1051 | return 1; | |
1052 | ||
042259f2 | 1053 | return 0; |
9878760c | 1054 | } |
7509c759 MM |
1055 | |
1056 | /* Return 1 for an operand in small memory on V.4/eabi */ | |
1057 | ||
1058 | int | |
1059 | small_data_operand (op, mode) | |
1060 | rtx op; | |
1061 | enum machine_mode mode; | |
1062 | { | |
38c1f2d7 | 1063 | #if TARGET_ELF |
7509c759 MM |
1064 | rtx sym_ref, const_part; |
1065 | ||
d9407988 | 1066 | if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) |
a54d04b7 | 1067 | return 0; |
a54d04b7 | 1068 | |
5b9d9a0c | 1069 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
7509c759 MM |
1070 | return 0; |
1071 | ||
88228c4b MM |
1072 | if (GET_CODE (op) == SYMBOL_REF) |
1073 | sym_ref = op; | |
1074 | ||
1075 | else if (GET_CODE (op) != CONST | |
1076 | || GET_CODE (XEXP (op, 0)) != PLUS | |
1077 | || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF | |
1078 | || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) | |
7509c759 MM |
1079 | return 0; |
1080 | ||
88228c4b | 1081 | else |
dbf55e53 MM |
1082 | { |
1083 | rtx sum = XEXP (op, 0); | |
1084 | HOST_WIDE_INT summand; | |
1085 | ||
1086 | /* We have to be careful here, because it is the referenced address | |
1087 | that must be 32k from _SDA_BASE_, not just the symbol. */ | |
1088 | summand = INTVAL (XEXP (sum, 1)); | |
1089 | if (summand < 0 || summand > g_switch_value) | |
1090 | return 0; | |
1091 | ||
1092 | sym_ref = XEXP (sum, 0); | |
1093 | } | |
88228c4b MM |
1094 | |
1095 | if (*XSTR (sym_ref, 0) != '@') | |
7509c759 MM |
1096 | return 0; |
1097 | ||
1098 | return 1; | |
d9407988 MM |
1099 | |
1100 | #else | |
1101 | return 0; | |
1102 | #endif | |
7509c759 MM |
1103 | } |
1104 | ||
4697a36c MM |
1105 | \f |
1106 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1107 | for a call to a function whose data type is FNTYPE. | |
1108 | For a library call, FNTYPE is 0. | |
1109 | ||
1110 | For incoming args we set the number of arguments in the prototype large | |
1c20ae99 | 1111 | so we never return a PARALLEL. */ |
4697a36c MM |
1112 | |
1113 | void | |
1114 | init_cumulative_args (cum, fntype, libname, incoming) | |
1115 | CUMULATIVE_ARGS *cum; | |
1116 | tree fntype; | |
1117 | rtx libname; | |
1118 | int incoming; | |
1119 | { | |
1120 | static CUMULATIVE_ARGS zero_cumulative; | |
7509c759 | 1121 | enum rs6000_abi abi = DEFAULT_ABI; |
4697a36c MM |
1122 | |
1123 | *cum = zero_cumulative; | |
1124 | cum->words = 0; | |
1125 | cum->fregno = FP_ARG_MIN_REG; | |
1126 | cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); | |
7509c759 | 1127 | cum->call_cookie = CALL_NORMAL; |
4697a36c MM |
1128 | |
1129 | if (incoming) | |
1130 | { | |
1c20ae99 | 1131 | cum->nargs_prototype = 1000; /* don't return a PARALLEL */ |
c81bebd7 | 1132 | if (abi == ABI_V4 || abi == ABI_SOLARIS) |
4697a36c | 1133 | cum->varargs_offset = RS6000_VARARGS_OFFSET; |
4697a36c MM |
1134 | } |
1135 | ||
1136 | else if (cum->prototype) | |
1137 | cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 | |
1138 | + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode | |
1139 | || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); | |
1140 | ||
1141 | else | |
1142 | cum->nargs_prototype = 0; | |
1143 | ||
1144 | cum->orig_nargs = cum->nargs_prototype; | |
7509c759 MM |
1145 | |
1146 | /* Check for DLL import functions */ | |
1147 | if (abi == ABI_NT | |
1148 | && fntype | |
1149 | && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) | |
1150 | cum->call_cookie = CALL_NT_DLLIMPORT; | |
1151 | ||
6a4cee5f MM |
1152 | /* Also check for longcall's */ |
1153 | else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) | |
1154 | cum->call_cookie = CALL_LONG; | |
1155 | ||
4697a36c MM |
1156 | if (TARGET_DEBUG_ARG) |
1157 | { | |
1158 | fprintf (stderr, "\ninit_cumulative_args:"); | |
1159 | if (fntype) | |
1160 | { | |
1161 | tree ret_type = TREE_TYPE (fntype); | |
1162 | fprintf (stderr, " ret code = %s,", | |
1163 | tree_code_name[ (int)TREE_CODE (ret_type) ]); | |
1164 | } | |
1165 | ||
c81bebd7 | 1166 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming) |
4697a36c | 1167 | fprintf (stderr, " varargs = %d, ", cum->varargs_offset); |
7509c759 | 1168 | |
6a4cee5f | 1169 | if (cum->call_cookie & CALL_NT_DLLIMPORT) |
7509c759 | 1170 | fprintf (stderr, " dllimport,"); |
4697a36c | 1171 | |
6a4cee5f MM |
1172 | if (cum->call_cookie & CALL_LONG) |
1173 | fprintf (stderr, " longcall,"); | |
1174 | ||
4697a36c MM |
1175 | fprintf (stderr, " proto = %d, nargs = %d\n", |
1176 | cum->prototype, cum->nargs_prototype); | |
1177 | } | |
1178 | } | |
1179 | \f | |
c229cba9 DE |
1180 | /* If defined, a C expression which determines whether, and in which |
1181 | direction, to pad out an argument with extra space. The value | |
1182 | should be of type `enum direction': either `upward' to pad above | |
1183 | the argument, `downward' to pad below, or `none' to inhibit | |
1184 | padding. | |
1185 | ||
1186 | For the AIX ABI structs are always stored left shifted in their | |
1187 | argument slot. */ | |
1188 | ||
c4d38ccb | 1189 | int |
c229cba9 DE |
1190 | function_arg_padding (mode, type) |
1191 | enum machine_mode mode; | |
1192 | tree type; | |
1193 | { | |
c85f7c16 | 1194 | if (type != 0 && AGGREGATE_TYPE_P (type)) |
c4d38ccb | 1195 | return (int)upward; |
c229cba9 DE |
1196 | |
1197 | /* This is the default definition. */ | |
1198 | return (! BYTES_BIG_ENDIAN | |
c4d38ccb | 1199 | ? (int)upward |
c229cba9 DE |
1200 | : ((mode == BLKmode |
1201 | ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST | |
1202 | && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) | |
1203 | : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) | |
c4d38ccb | 1204 | ? (int)downward : (int)upward)); |
c229cba9 DE |
1205 | } |
1206 | ||
b6c9286a MM |
1207 | /* If defined, a C expression that gives the alignment boundary, in bits, |
1208 | of an argument with the specified mode and type. If it is not defined, | |
1209 | PARM_BOUNDARY is used for all arguments. | |
1210 | ||
e1f83b4d MM |
1211 | Windows NT wants anything >= 8 bytes to be double word aligned. |
1212 | ||
1213 | V.4 wants long longs to be double word aligned. */ | |
b6c9286a MM |
1214 | |
1215 | int | |
1216 | function_arg_boundary (mode, type) | |
1217 | enum machine_mode mode; | |
1218 | tree type; | |
1219 | { | |
c81bebd7 | 1220 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode) |
e1f83b4d MM |
1221 | return 64; |
1222 | ||
b6c9286a MM |
1223 | if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) |
1224 | return PARM_BOUNDARY; | |
1225 | ||
1226 | if (mode != BLKmode) | |
1227 | return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; | |
1228 | ||
1229 | return (int_size_in_bytes (type) >= 8) ? 64 : 32; | |
1230 | } | |
1231 | \f | |
4697a36c MM |
1232 | /* Update the data in CUM to advance over an argument |
1233 | of mode MODE and data type TYPE. | |
1234 | (TYPE is null for libcalls where that information may not be available.) */ | |
1235 | ||
1236 | void | |
1237 | function_arg_advance (cum, mode, type, named) | |
1238 | CUMULATIVE_ARGS *cum; | |
1239 | enum machine_mode mode; | |
1240 | tree type; | |
1241 | int named; | |
1242 | { | |
b6c9286a MM |
1243 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1244 | cum->words += align; | |
4697a36c MM |
1245 | cum->nargs_prototype--; |
1246 | ||
c81bebd7 | 1247 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1248 | { |
1249 | /* Long longs must not be split between registers and stack */ | |
1250 | if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT) | |
1251 | && type && !AGGREGATE_TYPE_P (type) | |
1252 | && cum->words < GP_ARG_NUM_REG | |
1253 | && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG) | |
1254 | { | |
1255 | cum->words = GP_ARG_NUM_REG; | |
1256 | } | |
1257 | ||
1258 | /* Aggregates get passed as pointers */ | |
1259 | if (type && AGGREGATE_TYPE_P (type)) | |
1260 | cum->words++; | |
1261 | ||
1262 | /* Floats go in registers, & don't occupy space in the GP registers | |
1263 | like they do for AIX unless software floating point. */ | |
1264 | else if (GET_MODE_CLASS (mode) == MODE_FLOAT | |
1265 | && TARGET_HARD_FLOAT | |
1266 | && cum->fregno <= FP_ARG_V4_MAX_REG) | |
1267 | cum->fregno++; | |
1268 | ||
1269 | else | |
1270 | cum->words += RS6000_ARG_SIZE (mode, type, 1); | |
1271 | } | |
1272 | else | |
4697a36c MM |
1273 | if (named) |
1274 | { | |
1275 | cum->words += RS6000_ARG_SIZE (mode, type, named); | |
1276 | if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) | |
1277 | cum->fregno++; | |
1278 | } | |
1279 | ||
1280 | if (TARGET_DEBUG_ARG) | |
1281 | fprintf (stderr, | |
b6c9286a MM |
1282 | "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1283 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1284 | } |
1285 | \f | |
1286 | /* Determine where to put an argument to a function. | |
1287 | Value is zero to push the argument on the stack, | |
1288 | or a hard register in which to store the argument. | |
1289 | ||
1290 | MODE is the argument's machine mode. | |
1291 | TYPE is the data type of the argument (as a tree). | |
1292 | This is null for libcalls where that information may | |
1293 | not be available. | |
1294 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1295 | the preceding args and about the function being called. | |
1296 | NAMED is nonzero if this argument is a named parameter | |
1297 | (otherwise it is an extra parameter matching an ellipsis). | |
1298 | ||
1299 | On RS/6000 the first eight words of non-FP are normally in registers | |
1300 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1301 | Under V.4, the first 8 FP args are in registers. | |
1302 | ||
1303 | If this is floating-point and no prototype is specified, we use | |
1304 | both an FP and integer register (or possibly FP reg and stack). Library | |
1305 | functions (when TYPE is zero) always have the proper types for args, | |
1306 | so we can pass the FP value just in one register. emit_library_function | |
1c20ae99 | 1307 | doesn't support PARALLEL anyway. */ |
4697a36c MM |
1308 | |
1309 | struct rtx_def * | |
1310 | function_arg (cum, mode, type, named) | |
1311 | CUMULATIVE_ARGS *cum; | |
1312 | enum machine_mode mode; | |
1313 | tree type; | |
1314 | int named; | |
1315 | { | |
b6c9286a MM |
1316 | int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0; |
1317 | int align_words = cum->words + align; | |
1318 | ||
4697a36c MM |
1319 | if (TARGET_DEBUG_ARG) |
1320 | fprintf (stderr, | |
b6c9286a MM |
1321 | "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n", |
1322 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align); | |
4697a36c MM |
1323 | |
1324 | /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4 | |
1325 | uses to say fp args were passed in registers. Assume that we don't need the | |
1326 | marker for software floating point, or compiler generated library calls. */ | |
1327 | if (mode == VOIDmode) | |
1328 | { | |
7509c759 MM |
1329 | enum rs6000_abi abi = DEFAULT_ABI; |
1330 | ||
c81bebd7 | 1331 | if ((abi == ABI_V4 || abi == ABI_SOLARIS) |
7509c759 MM |
1332 | && TARGET_HARD_FLOAT |
1333 | && cum->nargs_prototype < 0 | |
4697a36c | 1334 | && type && (cum->prototype || TARGET_NO_PROTOTYPE)) |
7509c759 | 1335 | { |
6a4cee5f MM |
1336 | return GEN_INT (cum->call_cookie |
1337 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1338 | ? CALL_V4_SET_FP_ARGS | |
1339 | : CALL_V4_CLEAR_FP_ARGS)); | |
7509c759 | 1340 | } |
4697a36c | 1341 | |
7509c759 | 1342 | return GEN_INT (cum->call_cookie); |
4697a36c MM |
1343 | } |
1344 | ||
1345 | if (!named) | |
1346 | { | |
c81bebd7 | 1347 | if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
4697a36c MM |
1348 | return NULL_RTX; |
1349 | } | |
1350 | ||
1351 | if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
1352 | return NULL_RTX; | |
1353 | ||
1354 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1355 | { | |
5b9d9a0c | 1356 | if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */ |
c81bebd7 | 1357 | || DEFAULT_ABI == ABI_SOLARIS |
5b9d9a0c MM |
1358 | || ! type |
1359 | || ((cum->nargs_prototype > 0) | |
1360 | /* IBM AIX extended its linkage convention definition always to | |
1361 | require FP args after register save area hole on the stack. */ | |
1362 | && (DEFAULT_ABI != ABI_AIX | |
1363 | || ! TARGET_XL_CALL | |
1364 | || (align_words < GP_ARG_NUM_REG)))) | |
4697a36c MM |
1365 | return gen_rtx (REG, mode, cum->fregno); |
1366 | ||
1c20ae99 JW |
1367 | return gen_rtx (PARALLEL, mode, |
1368 | gen_rtvec | |
1369 | (2, | |
1370 | gen_rtx (EXPR_LIST, VOIDmode, | |
1371 | ((align_words >= GP_ARG_NUM_REG) | |
1372 | ? NULL_RTX | |
1373 | : (align_words | |
1374 | + RS6000_ARG_SIZE (mode, type, named) | |
1375 | > GP_ARG_NUM_REG | |
1376 | /* If this is partially on the stack, then | |
1377 | we only include the portion actually | |
1378 | in registers here. */ | |
1379 | ? gen_rtx (REG, SImode, | |
1380 | GP_ARG_MIN_REG + align_words) | |
1381 | : gen_rtx (REG, mode, | |
1382 | GP_ARG_MIN_REG + align_words))), | |
1383 | const0_rtx), | |
1384 | gen_rtx (EXPR_LIST, VOIDmode, | |
1385 | gen_rtx (REG, mode, cum->fregno), | |
1386 | const0_rtx))); | |
4697a36c MM |
1387 | } |
1388 | ||
92dcf4c8 MM |
1389 | /* Long longs won't be split between register and stack; |
1390 | FP arguments get passed on the stack if they didn't get a register. */ | |
c81bebd7 | 1391 | else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && |
92dcf4c8 MM |
1392 | (align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG |
1393 | || (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT))) | |
4697a36c MM |
1394 | { |
1395 | return NULL_RTX; | |
1396 | } | |
4697a36c | 1397 | |
b6c9286a MM |
1398 | else if (align_words < GP_ARG_NUM_REG) |
1399 | return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words); | |
4697a36c MM |
1400 | |
1401 | return NULL_RTX; | |
1402 | } | |
1403 | \f | |
1404 | /* For an arg passed partly in registers and partly in memory, | |
1405 | this is the number of registers used. | |
1406 | For args passed entirely in registers or entirely in memory, zero. */ | |
1407 | ||
1408 | int | |
1409 | function_arg_partial_nregs (cum, mode, type, named) | |
1410 | CUMULATIVE_ARGS *cum; | |
1411 | enum machine_mode mode; | |
1412 | tree type; | |
1413 | int named; | |
1414 | { | |
1415 | if (! named) | |
1416 | return 0; | |
1417 | ||
c81bebd7 | 1418 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c | 1419 | return 0; |
4697a36c MM |
1420 | |
1421 | if (USE_FP_FOR_ARG_P (*cum, mode, type)) | |
1422 | { | |
1423 | if (cum->nargs_prototype >= 0) | |
1424 | return 0; | |
1425 | } | |
1426 | ||
1427 | if (cum->words < GP_ARG_NUM_REG | |
1428 | && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) | |
1429 | { | |
1430 | int ret = GP_ARG_NUM_REG - cum->words; | |
1431 | if (ret && TARGET_DEBUG_ARG) | |
1432 | fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); | |
1433 | ||
1434 | return ret; | |
1435 | } | |
1436 | ||
1437 | return 0; | |
1438 | } | |
1439 | \f | |
1440 | /* A C expression that indicates when an argument must be passed by | |
1441 | reference. If nonzero for an argument, a copy of that argument is | |
1442 | made in memory and a pointer to the argument is passed instead of | |
1443 | the argument itself. The pointer is passed in whatever way is | |
1444 | appropriate for passing a pointer to that type. | |
1445 | ||
1446 | Under V.4, structures and unions are passed by reference. */ | |
1447 | ||
1448 | int | |
1449 | function_arg_pass_by_reference (cum, mode, type, named) | |
1450 | CUMULATIVE_ARGS *cum; | |
1451 | enum machine_mode mode; | |
1452 | tree type; | |
1453 | int named; | |
1454 | { | |
c81bebd7 MM |
1455 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
1456 | && type && AGGREGATE_TYPE_P (type)) | |
4697a36c MM |
1457 | { |
1458 | if (TARGET_DEBUG_ARG) | |
1459 | fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); | |
1460 | ||
1461 | return 1; | |
1462 | } | |
4697a36c MM |
1463 | |
1464 | return 0; | |
1465 | } | |
1466 | ||
1467 | \f | |
1468 | /* Perform any needed actions needed for a function that is receiving a | |
1469 | variable number of arguments. | |
1470 | ||
1471 | CUM is as above. | |
1472 | ||
1473 | MODE and TYPE are the mode and type of the current parameter. | |
1474 | ||
1475 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1476 | that must be pushed by the prolog to pretend that our caller pushed | |
1477 | it. | |
1478 | ||
1479 | Normally, this macro will push all remaining incoming registers on the | |
1480 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1481 | ||
1482 | void | |
1483 | setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) | |
1484 | CUMULATIVE_ARGS *cum; | |
1485 | enum machine_mode mode; | |
1486 | tree type; | |
1487 | int *pretend_size; | |
1488 | int no_rtl; | |
1489 | ||
1490 | { | |
1491 | rtx save_area = virtual_incoming_args_rtx; | |
1492 | int reg_size = (TARGET_64BIT) ? 8 : 4; | |
1493 | ||
1494 | if (TARGET_DEBUG_ARG) | |
1495 | fprintf (stderr, | |
1496 | "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n", | |
1497 | cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl); | |
1498 | ||
60e2d0ca | 1499 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
4697a36c MM |
1500 | { |
1501 | rs6000_sysv_varargs_p = 1; | |
60e2d0ca RK |
1502 | if (! no_rtl) |
1503 | save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET); | |
4697a36c | 1504 | } |
60e2d0ca RK |
1505 | else |
1506 | rs6000_sysv_varargs_p = 0; | |
4697a36c MM |
1507 | |
1508 | if (cum->words < 8) | |
1509 | { | |
1510 | int first_reg_offset = cum->words; | |
1511 | ||
1512 | if (MUST_PASS_IN_STACK (mode, type)) | |
1513 | first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); | |
1514 | ||
1515 | if (first_reg_offset > GP_ARG_NUM_REG) | |
1516 | first_reg_offset = GP_ARG_NUM_REG; | |
1517 | ||
1518 | if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG) | |
1519 | move_block_from_reg | |
1520 | (GP_ARG_MIN_REG + first_reg_offset, | |
1521 | gen_rtx (MEM, BLKmode, | |
1522 | plus_constant (save_area, first_reg_offset * reg_size)), | |
1523 | GP_ARG_NUM_REG - first_reg_offset, | |
1524 | (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); | |
1525 | ||
1526 | *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; | |
1527 | } | |
1528 | ||
4697a36c | 1529 | /* Save FP registers if needed. */ |
c81bebd7 | 1530 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl) |
4697a36c MM |
1531 | { |
1532 | int fregno = cum->fregno; | |
1533 | int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno; | |
1534 | ||
1535 | if (num_fp_reg >= 0) | |
1536 | { | |
1537 | rtx cr1 = gen_rtx (REG, CCmode, 69); | |
1538 | rtx lab = gen_label_rtx (); | |
1539 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); | |
1540 | ||
1541 | emit_jump_insn (gen_rtx (SET, VOIDmode, | |
1542 | pc_rtx, | |
1543 | gen_rtx (IF_THEN_ELSE, VOIDmode, | |
1544 | gen_rtx (NE, VOIDmode, cr1, const0_rtx), | |
1545 | gen_rtx (LABEL_REF, VOIDmode, lab), | |
1546 | pc_rtx))); | |
1547 | ||
1548 | while ( num_fp_reg-- >= 0) | |
1549 | { | |
1550 | emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)), | |
1551 | gen_rtx (REG, DFmode, fregno++)); | |
1552 | off += 8; | |
1553 | } | |
1554 | ||
1555 | emit_label (lab); | |
1556 | } | |
1557 | } | |
4697a36c MM |
1558 | } |
1559 | \f | |
1560 | /* If defined, is a C expression that produces the machine-specific | |
1561 | code for a call to `__builtin_saveregs'. This code will be moved | |
1562 | to the very beginning of the function, before any parameter access | |
1563 | are made. The return value of this function should be an RTX that | |
1564 | contains the value to use as the return of `__builtin_saveregs'. | |
1565 | ||
1566 | The argument ARGS is a `tree_list' containing the arguments that | |
1567 | were passed to `__builtin_saveregs'. | |
1568 | ||
1569 | If this macro is not defined, the compiler will output an ordinary | |
1570 | call to the library function `__builtin_saveregs'. | |
1571 | ||
1572 | On the Power/PowerPC return the address of the area on the stack | |
1573 | used to hold arguments. Under AIX, this includes the 8 word register | |
1574 | save area. Under V.4 this does not. */ | |
1575 | ||
1576 | struct rtx_def * | |
1577 | expand_builtin_saveregs (args) | |
1578 | tree args; | |
1579 | { | |
1580 | return virtual_incoming_args_rtx; | |
1581 | } | |
1582 | ||
5b5040b9 RK |
1583 | \f |
1584 | /* Generate a memory reference for expand_block_move, copying volatile, | |
1585 | and other bits from an original memory reference. */ | |
1586 | ||
1587 | static rtx | |
1588 | expand_block_move_mem (mode, addr, orig_mem) | |
1589 | enum machine_mode mode; | |
1590 | rtx addr; | |
1591 | rtx orig_mem; | |
1592 | { | |
1593 | rtx mem = gen_rtx (MEM, mode, addr); | |
b6c9286a MM |
1594 | |
1595 | RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); | |
5b5040b9 RK |
1596 | MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem); |
1597 | MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem); | |
b6c9286a MM |
1598 | #ifdef MEM_UNALIGNED_P |
1599 | MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); | |
1600 | #endif | |
5b5040b9 RK |
1601 | return mem; |
1602 | } | |
1603 | ||
7e69e155 MM |
1604 | /* Expand a block move operation, and return 1 if successful. Return 0 |
1605 | if we should let the compiler generate normal code. | |
1606 | ||
1607 | operands[0] is the destination | |
1608 | operands[1] is the source | |
1609 | operands[2] is the length | |
1610 | operands[3] is the alignment */ | |
1611 | ||
3933e0e1 MM |
1612 | #define MAX_MOVE_REG 4 |
1613 | ||
7e69e155 MM |
1614 | int |
1615 | expand_block_move (operands) | |
1616 | rtx operands[]; | |
1617 | { | |
b6c9286a MM |
1618 | rtx orig_dest = operands[0]; |
1619 | rtx orig_src = operands[1]; | |
7e69e155 | 1620 | rtx bytes_rtx = operands[2]; |
7e69e155 | 1621 | rtx align_rtx = operands[3]; |
3933e0e1 | 1622 | int constp = (GET_CODE (bytes_rtx) == CONST_INT); |
7e69e155 | 1623 | int align = XINT (align_rtx, 0); |
3933e0e1 MM |
1624 | int bytes; |
1625 | int offset; | |
1626 | int num_reg; | |
1627 | int i; | |
7e69e155 MM |
1628 | rtx src_reg; |
1629 | rtx dest_reg; | |
3933e0e1 MM |
1630 | rtx src_addr; |
1631 | rtx dest_addr; | |
7e69e155 | 1632 | rtx tmp_reg; |
3933e0e1 | 1633 | rtx stores[MAX_MOVE_REG]; |
7e69e155 MM |
1634 | int move_bytes; |
1635 | ||
3933e0e1 MM |
1636 | /* If this is not a fixed size move, just call memcpy */ |
1637 | if (!constp) | |
1638 | return 0; | |
1639 | ||
7e69e155 | 1640 | /* Anything to move? */ |
3933e0e1 MM |
1641 | bytes = INTVAL (bytes_rtx); |
1642 | if (bytes <= 0) | |
7e69e155 MM |
1643 | return 1; |
1644 | ||
3933e0e1 MM |
1645 | /* Don't support real large moves. If string instructions are not used, |
1646 | then don't generate more than 8 loads. */ | |
1647 | if (TARGET_STRING) | |
1648 | { | |
1cab3be1 | 1649 | if (bytes > 4*8) |
3933e0e1 MM |
1650 | return 0; |
1651 | } | |
1652 | else if (!STRICT_ALIGNMENT) | |
1653 | { | |
1654 | if (bytes > 4*8) | |
1655 | return 0; | |
1656 | } | |
1657 | else if (bytes > 8*align) | |
7e69e155 MM |
1658 | return 0; |
1659 | ||
1660 | /* Move the address into scratch registers. */ | |
b6c9286a MM |
1661 | dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); |
1662 | src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); | |
7e69e155 | 1663 | |
3933e0e1 | 1664 | if (TARGET_STRING) /* string instructions are available */ |
7e69e155 | 1665 | { |
3933e0e1 | 1666 | for ( ; bytes > 0; bytes -= move_bytes) |
7e69e155 | 1667 | { |
3933e0e1 MM |
1668 | if (bytes > 24 /* move up to 32 bytes at a time */ |
1669 | && !fixed_regs[5] | |
1670 | && !fixed_regs[6] | |
1671 | && !fixed_regs[7] | |
1672 | && !fixed_regs[8] | |
1673 | && !fixed_regs[9] | |
1674 | && !fixed_regs[10] | |
1675 | && !fixed_regs[11] | |
1676 | && !fixed_regs[12]) | |
1677 | { | |
1678 | move_bytes = (bytes > 32) ? 32 : bytes; | |
b6c9286a MM |
1679 | emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1680 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1681 | GEN_INT ((move_bytes == 32) ? 0 : move_bytes), |
4c64a852 | 1682 | align_rtx)); |
3933e0e1 MM |
1683 | } |
1684 | else if (bytes > 16 /* move up to 24 bytes at a time */ | |
1685 | && !fixed_regs[7] | |
1686 | && !fixed_regs[8] | |
1687 | && !fixed_regs[9] | |
1688 | && !fixed_regs[10] | |
1689 | && !fixed_regs[11] | |
1690 | && !fixed_regs[12]) | |
1691 | { | |
1692 | move_bytes = (bytes > 24) ? 24 : bytes; | |
b6c9286a MM |
1693 | emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1694 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1695 | GEN_INT (move_bytes), |
4c64a852 | 1696 | align_rtx)); |
3933e0e1 MM |
1697 | } |
1698 | else if (bytes > 8 /* move up to 16 bytes at a time */ | |
1699 | && !fixed_regs[9] | |
1700 | && !fixed_regs[10] | |
1701 | && !fixed_regs[11] | |
1702 | && !fixed_regs[12]) | |
1703 | { | |
1704 | move_bytes = (bytes > 16) ? 16 : bytes; | |
b6c9286a MM |
1705 | emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1706 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1707 | GEN_INT (move_bytes), |
4c64a852 | 1708 | align_rtx)); |
3933e0e1 | 1709 | } |
d679bebf | 1710 | else if (bytes > 4 && !TARGET_64BIT) |
3933e0e1 MM |
1711 | { /* move up to 8 bytes at a time */ |
1712 | move_bytes = (bytes > 8) ? 8 : bytes; | |
b6c9286a MM |
1713 | emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1714 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1715 | GEN_INT (move_bytes), |
4c64a852 | 1716 | align_rtx)); |
3933e0e1 MM |
1717 | } |
1718 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
1719 | { /* move 4 bytes */ | |
1720 | move_bytes = 4; | |
1721 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1722 | emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src)); |
1723 | emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1724 | } |
1725 | else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1726 | { /* move 2 bytes */ | |
1727 | move_bytes = 2; | |
1728 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1729 | emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src)); |
1730 | emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1731 | } |
1732 | else if (bytes == 1) /* move 1 byte */ | |
1733 | { | |
1734 | move_bytes = 1; | |
1735 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1736 | emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src)); |
1737 | emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg); | |
3933e0e1 MM |
1738 | } |
1739 | else | |
1740 | { /* move up to 4 bytes at a time */ | |
1741 | move_bytes = (bytes > 4) ? 4 : bytes; | |
b6c9286a MM |
1742 | emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest), |
1743 | expand_block_move_mem (BLKmode, src_reg, orig_src), | |
3933e0e1 | 1744 | GEN_INT (move_bytes), |
4c64a852 | 1745 | align_rtx)); |
3933e0e1 | 1746 | } |
4c64a852 | 1747 | |
015892ee RK |
1748 | if (bytes > move_bytes) |
1749 | { | |
1750 | emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes))); | |
1751 | emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes))); | |
1752 | } | |
4c64a852 | 1753 | } |
3933e0e1 MM |
1754 | } |
1755 | ||
1756 | else /* string instructions not available */ | |
1757 | { | |
1758 | num_reg = offset = 0; | |
1759 | for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) | |
7e69e155 | 1760 | { |
3933e0e1 MM |
1761 | /* Calculate the correct offset for src/dest */ |
1762 | if (offset == 0) | |
7e69e155 | 1763 | { |
3933e0e1 MM |
1764 | src_addr = src_reg; |
1765 | dest_addr = dest_reg; | |
1766 | } | |
1767 | else | |
1768 | { | |
1769 | src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset)); | |
1770 | dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset)); | |
1771 | } | |
1772 | ||
1773 | /* Generate the appropriate load and store, saving the stores for later */ | |
b6c9286a MM |
1774 | if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT)) |
1775 | { | |
1776 | move_bytes = 8; | |
1777 | tmp_reg = gen_reg_rtx (DImode); | |
1778 | emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src))); | |
1779 | stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg); | |
1780 | } | |
1781 | else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT)) | |
3933e0e1 MM |
1782 | { |
1783 | move_bytes = 4; | |
1784 | tmp_reg = gen_reg_rtx (SImode); | |
b6c9286a MM |
1785 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src))); |
1786 | stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1787 | } |
1788 | else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT)) | |
1789 | { | |
1790 | move_bytes = 2; | |
1791 | tmp_reg = gen_reg_rtx (HImode); | |
b6c9286a MM |
1792 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src))); |
1793 | stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1794 | } |
1795 | else | |
1796 | { | |
1797 | move_bytes = 1; | |
1798 | tmp_reg = gen_reg_rtx (QImode); | |
b6c9286a MM |
1799 | emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src))); |
1800 | stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg); | |
3933e0e1 MM |
1801 | } |
1802 | ||
1803 | if (num_reg >= MAX_MOVE_REG) | |
1804 | { | |
1805 | for (i = 0; i < num_reg; i++) | |
1806 | emit_insn (stores[i]); | |
1807 | num_reg = 0; | |
7e69e155 MM |
1808 | } |
1809 | } | |
3933e0e1 | 1810 | |
b6c9286a MM |
1811 | for (i = 0; i < num_reg; i++) |
1812 | emit_insn (stores[i]); | |
7e69e155 MM |
1813 | } |
1814 | ||
1815 | return 1; | |
1816 | } | |
1817 | ||
9878760c RK |
1818 | \f |
1819 | /* Return 1 if OP is a load multiple operation. It is known to be a | |
1820 | PARALLEL and the first section will be tested. */ | |
1821 | ||
1822 | int | |
1823 | load_multiple_operation (op, mode) | |
1824 | rtx op; | |
1825 | enum machine_mode mode; | |
1826 | { | |
1827 | int count = XVECLEN (op, 0); | |
1828 | int dest_regno; | |
1829 | rtx src_addr; | |
1830 | int i; | |
1831 | ||
1832 | /* Perform a quick check so we don't blow up below. */ | |
1833 | if (count <= 1 | |
1834 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1835 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG | |
1836 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) | |
1837 | return 0; | |
1838 | ||
1839 | dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); | |
1840 | src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); | |
1841 | ||
1842 | for (i = 1; i < count; i++) | |
1843 | { | |
1844 | rtx elt = XVECEXP (op, 0, i); | |
1845 | ||
1846 | if (GET_CODE (elt) != SET | |
1847 | || GET_CODE (SET_DEST (elt)) != REG | |
1848 | || GET_MODE (SET_DEST (elt)) != SImode | |
1849 | || REGNO (SET_DEST (elt)) != dest_regno + i | |
1850 | || GET_CODE (SET_SRC (elt)) != MEM | |
1851 | || GET_MODE (SET_SRC (elt)) != SImode | |
1852 | || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS | |
1853 | || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) | |
1854 | || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT | |
1855 | || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) | |
1856 | return 0; | |
1857 | } | |
1858 | ||
1859 | return 1; | |
1860 | } | |
1861 | ||
1862 | /* Similar, but tests for store multiple. Here, the second vector element | |
1863 | is a CLOBBER. It will be tested later. */ | |
1864 | ||
1865 | int | |
1866 | store_multiple_operation (op, mode) | |
1867 | rtx op; | |
1868 | enum machine_mode mode; | |
1869 | { | |
1870 | int count = XVECLEN (op, 0) - 1; | |
1871 | int src_regno; | |
1872 | rtx dest_addr; | |
1873 | int i; | |
1874 | ||
1875 | /* Perform a quick check so we don't blow up below. */ | |
1876 | if (count <= 1 | |
1877 | || GET_CODE (XVECEXP (op, 0, 0)) != SET | |
1878 | || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM | |
1879 | || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) | |
1880 | return 0; | |
1881 | ||
1882 | src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); | |
1883 | dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); | |
1884 | ||
1885 | for (i = 1; i < count; i++) | |
1886 | { | |
1887 | rtx elt = XVECEXP (op, 0, i + 1); | |
1888 | ||
1889 | if (GET_CODE (elt) != SET | |
1890 | || GET_CODE (SET_SRC (elt)) != REG | |
1891 | || GET_MODE (SET_SRC (elt)) != SImode | |
1892 | || REGNO (SET_SRC (elt)) != src_regno + i | |
1893 | || GET_CODE (SET_DEST (elt)) != MEM | |
1894 | || GET_MODE (SET_DEST (elt)) != SImode | |
1895 | || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS | |
1896 | || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) | |
1897 | || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT | |
1898 | || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) | |
1899 | return 0; | |
1900 | } | |
1901 | ||
1902 | return 1; | |
1903 | } | |
1904 | \f | |
1905 | /* Return 1 if OP is a comparison operation that is valid for a branch insn. | |
1906 | We only check the opcode against the mode of the CC value here. */ | |
1907 | ||
1908 | int | |
1909 | branch_comparison_operator (op, mode) | |
1910 | register rtx op; | |
1911 | enum machine_mode mode; | |
1912 | { | |
1913 | enum rtx_code code = GET_CODE (op); | |
1914 | enum machine_mode cc_mode; | |
1915 | ||
1916 | if (GET_RTX_CLASS (code) != '<') | |
1917 | return 0; | |
1918 | ||
1919 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1920 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1921 | return 0; | |
1922 | ||
1923 | if ((code == GT || code == LT || code == GE || code == LE) | |
1924 | && cc_mode == CCUNSmode) | |
1925 | return 0; | |
1926 | ||
1927 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1928 | && (cc_mode != CCUNSmode)) | |
1929 | return 0; | |
1930 | ||
1931 | return 1; | |
1932 | } | |
1933 | ||
1934 | /* Return 1 if OP is a comparison operation that is valid for an scc insn. | |
1935 | We check the opcode against the mode of the CC value and disallow EQ or | |
1936 | NE comparisons for integers. */ | |
1937 | ||
1938 | int | |
1939 | scc_comparison_operator (op, mode) | |
1940 | register rtx op; | |
1941 | enum machine_mode mode; | |
1942 | { | |
1943 | enum rtx_code code = GET_CODE (op); | |
1944 | enum machine_mode cc_mode; | |
1945 | ||
1946 | if (GET_MODE (op) != mode && mode != VOIDmode) | |
1947 | return 0; | |
1948 | ||
1949 | if (GET_RTX_CLASS (code) != '<') | |
1950 | return 0; | |
1951 | ||
1952 | cc_mode = GET_MODE (XEXP (op, 0)); | |
1953 | if (GET_MODE_CLASS (cc_mode) != MODE_CC) | |
1954 | return 0; | |
1955 | ||
1956 | if (code == NE && cc_mode != CCFPmode) | |
1957 | return 0; | |
1958 | ||
1959 | if ((code == GT || code == LT || code == GE || code == LE) | |
1960 | && cc_mode == CCUNSmode) | |
1961 | return 0; | |
1962 | ||
1963 | if ((code == GTU || code == LTU || code == GEU || code == LEU) | |
1964 | && (cc_mode != CCUNSmode)) | |
1965 | return 0; | |
1966 | ||
c5defebb RK |
1967 | if (cc_mode == CCEQmode && code != EQ && code != NE) |
1968 | return 0; | |
1969 | ||
9878760c RK |
1970 | return 1; |
1971 | } | |
1972 | \f | |
1973 | /* Return 1 if ANDOP is a mask that has no bits on that are not in the | |
1974 | mask required to convert the result of a rotate insn into a shift | |
1975 | left insn of SHIFTOP bits. Both are known to be CONST_INT. */ | |
1976 | ||
1977 | int | |
1978 | includes_lshift_p (shiftop, andop) | |
1979 | register rtx shiftop; | |
1980 | register rtx andop; | |
1981 | { | |
1982 | int shift_mask = (~0 << INTVAL (shiftop)); | |
1983 | ||
1984 | return (INTVAL (andop) & ~shift_mask) == 0; | |
1985 | } | |
1986 | ||
1987 | /* Similar, but for right shift. */ | |
1988 | ||
1989 | int | |
1990 | includes_rshift_p (shiftop, andop) | |
1991 | register rtx shiftop; | |
1992 | register rtx andop; | |
1993 | { | |
a7653a2c | 1994 | unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; |
9878760c RK |
1995 | |
1996 | shift_mask >>= INTVAL (shiftop); | |
1997 | ||
1998 | return (INTVAL (andop) & ~ shift_mask) == 0; | |
1999 | } | |
35068b43 RK |
2000 | |
2001 | /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates | |
2002 | for lfq and stfq insns. | |
2003 | ||
2004 | Note reg1 and reg2 *must* be hard registers. To be sure we will | |
2005 | abort if we are passed pseudo registers. */ | |
2006 | ||
2007 | int | |
2008 | registers_ok_for_quad_peep (reg1, reg2) | |
2009 | rtx reg1, reg2; | |
2010 | { | |
2011 | /* We might have been passed a SUBREG. */ | |
2012 | if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) | |
2013 | return 0; | |
2014 | ||
2015 | return (REGNO (reg1) == REGNO (reg2) - 1); | |
2016 | } | |
2017 | ||
2018 | /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and | |
2019 | addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ | |
2020 | ||
2021 | int | |
2022 | addrs_ok_for_quad_peep (addr1, addr2) | |
2023 | register rtx addr1; | |
2024 | register rtx addr2; | |
2025 | { | |
2026 | int reg1; | |
2027 | int offset1; | |
2028 | ||
2029 | /* Extract an offset (if used) from the first addr. */ | |
2030 | if (GET_CODE (addr1) == PLUS) | |
2031 | { | |
2032 | /* If not a REG, return zero. */ | |
2033 | if (GET_CODE (XEXP (addr1, 0)) != REG) | |
2034 | return 0; | |
2035 | else | |
2036 | { | |
2037 | reg1 = REGNO (XEXP (addr1, 0)); | |
2038 | /* The offset must be constant! */ | |
2039 | if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) | |
2040 | return 0; | |
2041 | offset1 = INTVAL (XEXP (addr1, 1)); | |
2042 | } | |
2043 | } | |
2044 | else if (GET_CODE (addr1) != REG) | |
2045 | return 0; | |
2046 | else | |
2047 | { | |
2048 | reg1 = REGNO (addr1); | |
2049 | /* This was a simple (mem (reg)) expression. Offset is 0. */ | |
2050 | offset1 = 0; | |
2051 | } | |
2052 | ||
2053 | /* Make sure the second address is a (mem (plus (reg) (const_int). */ | |
2054 | if (GET_CODE (addr2) != PLUS) | |
2055 | return 0; | |
2056 | ||
2057 | if (GET_CODE (XEXP (addr2, 0)) != REG | |
2058 | || GET_CODE (XEXP (addr2, 1)) != CONST_INT) | |
2059 | return 0; | |
2060 | ||
2061 | if (reg1 != REGNO (XEXP (addr2, 0))) | |
2062 | return 0; | |
2063 | ||
2064 | /* The offset for the second addr must be 8 more than the first addr. */ | |
2065 | if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) | |
2066 | return 0; | |
2067 | ||
2068 | /* All the tests passed. addr1 and addr2 are valid for lfq or stfq | |
2069 | instructions. */ | |
2070 | return 1; | |
2071 | } | |
9878760c RK |
2072 | \f |
2073 | /* Return the register class of a scratch register needed to copy IN into | |
2074 | or out of a register in CLASS in MODE. If it can be done directly, | |
2075 | NO_REGS is returned. */ | |
2076 | ||
2077 | enum reg_class | |
2078 | secondary_reload_class (class, mode, in) | |
2079 | enum reg_class class; | |
2080 | enum machine_mode mode; | |
2081 | rtx in; | |
2082 | { | |
2083 | int regno = true_regnum (in); | |
2084 | ||
2085 | if (regno >= FIRST_PSEUDO_REGISTER) | |
2086 | regno = -1; | |
2087 | ||
2088 | /* We can place anything into GENERAL_REGS and can put GENERAL_REGS | |
2089 | into anything. */ | |
2090 | if (class == GENERAL_REGS || class == BASE_REGS | |
2091 | || (regno >= 0 && INT_REGNO_P (regno))) | |
2092 | return NO_REGS; | |
2093 | ||
2094 | /* Constants, memory, and FP registers can go into FP registers. */ | |
2095 | if ((regno == -1 || FP_REGNO_P (regno)) | |
2096 | && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) | |
2097 | return NO_REGS; | |
2098 | ||
2099 | /* We can copy among the CR registers. */ | |
2100 | if ((class == CR_REGS || class == CR0_REGS) | |
2101 | && regno >= 0 && CR_REGNO_P (regno)) | |
2102 | return NO_REGS; | |
2103 | ||
2104 | /* Otherwise, we need GENERAL_REGS. */ | |
2105 | return GENERAL_REGS; | |
2106 | } | |
2107 | \f | |
2108 | /* Given a comparison operation, return the bit number in CCR to test. We | |
2109 | know this is a valid comparison. | |
2110 | ||
2111 | SCC_P is 1 if this is for an scc. That means that %D will have been | |
2112 | used instead of %C, so the bits will be in different places. | |
2113 | ||
b4ac57ab | 2114 | Return -1 if OP isn't a valid comparison for some reason. */ |
9878760c RK |
2115 | |
2116 | int | |
2117 | ccr_bit (op, scc_p) | |
2118 | register rtx op; | |
2119 | int scc_p; | |
2120 | { | |
2121 | enum rtx_code code = GET_CODE (op); | |
2122 | enum machine_mode cc_mode; | |
2123 | int cc_regnum; | |
2124 | int base_bit; | |
2125 | ||
2126 | if (GET_RTX_CLASS (code) != '<') | |
2127 | return -1; | |
2128 | ||
2129 | cc_mode = GET_MODE (XEXP (op, 0)); | |
2130 | cc_regnum = REGNO (XEXP (op, 0)); | |
2131 | base_bit = 4 * (cc_regnum - 68); | |
2132 | ||
c5defebb RK |
2133 | /* In CCEQmode cases we have made sure that the result is always in the |
2134 | third bit of the CR field. */ | |
2135 | ||
2136 | if (cc_mode == CCEQmode) | |
2137 | return base_bit + 3; | |
2138 | ||
9878760c RK |
2139 | switch (code) |
2140 | { | |
2141 | case NE: | |
2142 | return scc_p ? base_bit + 3 : base_bit + 2; | |
2143 | case EQ: | |
2144 | return base_bit + 2; | |
2145 | case GT: case GTU: | |
2146 | return base_bit + 1; | |
2147 | case LT: case LTU: | |
2148 | return base_bit; | |
2149 | ||
2150 | case GE: case GEU: | |
2151 | /* If floating-point, we will have done a cror to put the bit in the | |
2152 | unordered position. So test that bit. For integer, this is ! LT | |
2153 | unless this is an scc insn. */ | |
2154 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; | |
2155 | ||
2156 | case LE: case LEU: | |
2157 | return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; | |
2158 | ||
2159 | default: | |
2160 | abort (); | |
2161 | } | |
2162 | } | |
1ff7789b MM |
2163 | \f |
2164 | /* Return the GOT register, creating it if needed. */ | |
2165 | ||
2166 | struct rtx_def * | |
2167 | rs6000_got_register (value) | |
2168 | rtx value; | |
2169 | { | |
da39823a | 2170 | if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx) |
1ff7789b MM |
2171 | { |
2172 | if (reload_in_progress || reload_completed) | |
2173 | fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value); | |
2174 | ||
2175 | current_function_uses_pic_offset_table = 1; | |
2176 | pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2177 | } | |
2178 | ||
2179 | return pic_offset_table_rtx; | |
2180 | } | |
2181 | ||
2182 | \f | |
956d6950 | 2183 | /* Replace all occurrences of register FROM with an new pseudo register in an insn X. |
1ff7789b MM |
2184 | Store the pseudo register used in REG. |
2185 | This is only safe during FINALIZE_PIC, since the registers haven't been setup | |
2186 | yet. */ | |
2187 | ||
2188 | static rtx | |
2189 | rs6000_replace_regno (x, from, reg) | |
2190 | rtx x; | |
2191 | int from; | |
2192 | rtx *reg; | |
2193 | { | |
2194 | register int i, j; | |
2195 | register char *fmt; | |
2196 | ||
2197 | /* Allow this function to make replacements in EXPR_LISTs. */ | |
2198 | if (!x) | |
2199 | return x; | |
2200 | ||
2201 | switch (GET_CODE (x)) | |
2202 | { | |
2203 | case SCRATCH: | |
2204 | case PC: | |
2205 | case CC0: | |
2206 | case CONST_INT: | |
2207 | case CONST_DOUBLE: | |
2208 | case CONST: | |
2209 | case SYMBOL_REF: | |
2210 | case LABEL_REF: | |
2211 | return x; | |
2212 | ||
2213 | case REG: | |
2214 | if (REGNO (x) == from) | |
2215 | { | |
2216 | if (! *reg) | |
84f414bc | 2217 | *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode); |
1ff7789b MM |
2218 | |
2219 | return *reg; | |
2220 | } | |
2221 | ||
2222 | return x; | |
c4d38ccb MM |
2223 | |
2224 | default: | |
2225 | break; | |
1ff7789b MM |
2226 | } |
2227 | ||
2228 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
2229 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) | |
2230 | { | |
2231 | if (fmt[i] == 'e') | |
2232 | XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg); | |
2233 | else if (fmt[i] == 'E') | |
2234 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
2235 | XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg); | |
2236 | } | |
2237 | ||
2238 | return x; | |
2239 | } | |
2240 | ||
d266da75 MM |
2241 | \f |
2242 | /* By generating position-independent code, when two different | |
2243 | programs (A and B) share a common library (libC.a), the text of | |
2244 | the library can be shared whether or not the library is linked at | |
2245 | the same address for both programs. In some of these | |
2246 | environments, position-independent code requires not only the use | |
2247 | of different addressing modes, but also special code to enable the | |
2248 | use of these addressing modes. | |
2249 | ||
2250 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2251 | codes once the function is being compiled into assembly code, but | |
2252 | not before. (It is not done before, because in the case of | |
2253 | compiling an inline function, it would lead to multiple PIC | |
2254 | prologues being included in functions which used inline functions | |
2255 | and were compiled to assembly language.) */ | |
2256 | ||
2257 | void | |
2258 | rs6000_finalize_pic () | |
2259 | { | |
30ea98f1 | 2260 | /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM |
956d6950 | 2261 | with an appropriate pseudo register. If we find we need GOT/TOC, |
30ea98f1 MM |
2262 | add the appropriate init code. */ |
2263 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
d266da75 | 2264 | { |
30ea98f1 MM |
2265 | rtx insn = get_insns (); |
2266 | rtx reg = NULL_RTX; | |
2267 | rtx first_insn; | |
38c1f2d7 | 2268 | rtx last_insn = NULL_RTX; |
d266da75 | 2269 | |
30ea98f1 MM |
2270 | if (GET_CODE (insn) == NOTE) |
2271 | insn = next_nonnote_insn (insn); | |
d266da75 | 2272 | |
30ea98f1 MM |
2273 | first_insn = insn; |
2274 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2275 | { | |
2276 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') | |
1ff7789b | 2277 | { |
30ea98f1 MM |
2278 | PATTERN (insn) = rs6000_replace_regno (PATTERN (insn), |
2279 | GOT_TOC_REGNUM, | |
2280 | ®); | |
2281 | ||
2282 | if (REG_NOTES (insn)) | |
2283 | REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn), | |
1ff7789b MM |
2284 | GOT_TOC_REGNUM, |
2285 | ®); | |
1ff7789b | 2286 | } |
38c1f2d7 MM |
2287 | |
2288 | if (GET_CODE (insn) != NOTE) | |
2289 | last_insn = insn; | |
30ea98f1 | 2290 | } |
1ff7789b | 2291 | |
30ea98f1 MM |
2292 | if (reg) |
2293 | { | |
2294 | rtx init = gen_init_v4_pic (reg); | |
2295 | emit_insn_before (init, first_insn); | |
38c1f2d7 MM |
2296 | if (!optimize && last_insn) |
2297 | emit_insn_after (gen_rtx (USE, VOIDmode, reg), last_insn); | |
d266da75 MM |
2298 | } |
2299 | } | |
2300 | } | |
2301 | ||
30ea98f1 | 2302 | \f |
956d6950 | 2303 | /* Search for any occurrence of the GOT_TOC register marker that should |
30ea98f1 MM |
2304 | have been eliminated, but may have crept back in. */ |
2305 | ||
2306 | void | |
2307 | rs6000_reorg (insn) | |
2308 | rtx insn; | |
2309 | { | |
2310 | if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) | |
2311 | { | |
2312 | rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM); | |
2313 | for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) | |
2314 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
2315 | && reg_mentioned_p (got_reg, PATTERN (insn))) | |
2316 | fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); | |
2317 | } | |
2318 | } | |
2319 | ||
a7df97e6 MM |
2320 | \f |
2321 | /* Define the structure for the machine field in struct function. */ | |
2322 | struct machine_function | |
2323 | { | |
2324 | int sysv_varargs_p; | |
2325 | int save_toc_p; | |
2326 | int fpmem_size; | |
2327 | int fpmem_offset; | |
a04232e5 | 2328 | rtx pic_offset_table_rtx; |
a7df97e6 MM |
2329 | }; |
2330 | ||
2331 | /* Functions to save and restore rs6000_fpmem_size. | |
2332 | These will be called, via pointer variables, | |
2333 | from push_function_context and pop_function_context. */ | |
2334 | ||
2335 | void | |
2336 | rs6000_save_machine_status (p) | |
2337 | struct function *p; | |
2338 | { | |
2339 | struct machine_function *machine = | |
2340 | (struct machine_function *) xmalloc (sizeof (struct machine_function)); | |
2341 | ||
2342 | p->machine = machine; | |
2343 | machine->sysv_varargs_p = rs6000_sysv_varargs_p; | |
a7df97e6 MM |
2344 | machine->fpmem_size = rs6000_fpmem_size; |
2345 | machine->fpmem_offset = rs6000_fpmem_offset; | |
a04232e5 | 2346 | machine->pic_offset_table_rtx = pic_offset_table_rtx; |
a7df97e6 MM |
2347 | } |
2348 | ||
2349 | void | |
2350 | rs6000_restore_machine_status (p) | |
2351 | struct function *p; | |
2352 | { | |
2353 | struct machine_function *machine = p->machine; | |
2354 | ||
2355 | rs6000_sysv_varargs_p = machine->sysv_varargs_p; | |
a7df97e6 MM |
2356 | rs6000_fpmem_size = machine->fpmem_size; |
2357 | rs6000_fpmem_offset = machine->fpmem_offset; | |
a04232e5 | 2358 | pic_offset_table_rtx = machine->pic_offset_table_rtx; |
a7df97e6 MM |
2359 | |
2360 | free (machine); | |
2361 | p->machine = (struct machine_function *)0; | |
2362 | } | |
2363 | ||
2364 | /* Do anything needed before RTL is emitted for each function. */ | |
2365 | ||
2366 | void | |
2367 | rs6000_init_expanders () | |
2368 | { | |
2369 | /* Reset varargs and save TOC indicator */ | |
2370 | rs6000_sysv_varargs_p = 0; | |
a7df97e6 MM |
2371 | rs6000_fpmem_size = 0; |
2372 | rs6000_fpmem_offset = 0; | |
2373 | pic_offset_table_rtx = (rtx)0; | |
2374 | ||
2375 | /* Arrange to save and restore machine status around nested functions. */ | |
2376 | save_machine_status = rs6000_save_machine_status; | |
2377 | restore_machine_status = rs6000_restore_machine_status; | |
2378 | } | |
2379 | ||
9878760c RK |
2380 | \f |
2381 | /* Print an operand. Recognize special options, documented below. */ | |
2382 | ||
38c1f2d7 | 2383 | #if TARGET_ELF |
d9407988 | 2384 | #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") |
8fbd2dc7 | 2385 | #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) |
ba5e43aa MM |
2386 | #else |
2387 | #define SMALL_DATA_RELOC "sda21" | |
8fbd2dc7 | 2388 | #define SMALL_DATA_REG 0 |
ba5e43aa MM |
2389 | #endif |
2390 | ||
9878760c RK |
2391 | void |
2392 | print_operand (file, x, code) | |
2393 | FILE *file; | |
2394 | rtx x; | |
2395 | char code; | |
2396 | { | |
2397 | int i; | |
2398 | int val; | |
2399 | ||
2400 | /* These macros test for integers and extract the low-order bits. */ | |
2401 | #define INT_P(X) \ | |
2402 | ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ | |
2403 | && GET_MODE (X) == VOIDmode) | |
2404 | ||
2405 | #define INT_LOWPART(X) \ | |
2406 | (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) | |
2407 | ||
2408 | switch (code) | |
2409 | { | |
a8b3aeda | 2410 | case '.': |
a85d226b RK |
2411 | /* Write out an instruction after the call which may be replaced |
2412 | with glue code by the loader. This depends on the AIX version. */ | |
2413 | asm_fprintf (file, RS6000_CALL_GLUE); | |
a8b3aeda RK |
2414 | return; |
2415 | ||
cfaaaf2e RK |
2416 | case '*': |
2417 | /* Write the register number of the TOC register. */ | |
4697a36c | 2418 | fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file); |
cfaaaf2e RK |
2419 | return; |
2420 | ||
c81bebd7 MM |
2421 | case '$': |
2422 | /* Write out either a '.' or '$' for the current location, depending | |
2423 | on whether this is Solaris or not. */ | |
2424 | putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); | |
2425 | return; | |
2426 | ||
9854d9ed RK |
2427 | case 'A': |
2428 | /* If X is a constant integer whose low-order 5 bits are zero, | |
2429 | write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug | |
76229ac8 | 2430 | in the AIX assembler where "sri" with a zero shift count |
9854d9ed RK |
2431 | write a trash instruction. */ |
2432 | if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) | |
76229ac8 | 2433 | putc ('l', file); |
9854d9ed | 2434 | else |
76229ac8 | 2435 | putc ('r', file); |
9854d9ed RK |
2436 | return; |
2437 | ||
2438 | case 'b': | |
2439 | /* Low-order 16 bits of constant, unsigned. */ | |
cad12a8d | 2440 | if (! INT_P (x)) |
9854d9ed | 2441 | output_operand_lossage ("invalid %%b value"); |
cad12a8d | 2442 | |
9854d9ed | 2443 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); |
cad12a8d RK |
2444 | return; |
2445 | ||
9854d9ed RK |
2446 | case 'C': |
2447 | /* This is an optional cror needed for LE or GE floating-point | |
2448 | comparisons. Otherwise write nothing. */ | |
2449 | if ((GET_CODE (x) == LE || GET_CODE (x) == GE) | |
2450 | && GET_MODE (XEXP (x, 0)) == CCFPmode) | |
2451 | { | |
2452 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2453 | ||
2454 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2455 | base_bit + 2, base_bit + (GET_CODE (x) == GE)); | |
2456 | } | |
2457 | return; | |
2458 | ||
2459 | case 'D': | |
2460 | /* Similar, except that this is for an scc, so we must be able to | |
2461 | encode the test in a single bit that is one. We do the above | |
2462 | for any LE, GE, GEU, or LEU and invert the bit for NE. */ | |
2463 | if (GET_CODE (x) == LE || GET_CODE (x) == GE | |
2464 | || GET_CODE (x) == LEU || GET_CODE (x) == GEU) | |
2465 | { | |
2466 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2467 | ||
2468 | fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, | |
2469 | base_bit + 2, | |
2470 | base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); | |
2471 | } | |
2472 | ||
2473 | else if (GET_CODE (x) == NE) | |
2474 | { | |
2475 | int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); | |
2476 | ||
2477 | fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, | |
2478 | base_bit + 2, base_bit + 2); | |
2479 | } | |
2480 | return; | |
2481 | ||
2482 | case 'E': | |
2483 | /* X is a CR register. Print the number of the third bit of the CR */ | |
2484 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2485 | output_operand_lossage ("invalid %%E value"); | |
2486 | ||
2487 | fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); | |
a85d226b | 2488 | return; |
9854d9ed RK |
2489 | |
2490 | case 'f': | |
2491 | /* X is a CR register. Print the shift count needed to move it | |
2492 | to the high-order four bits. */ | |
2493 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2494 | output_operand_lossage ("invalid %%f value"); | |
2495 | else | |
2496 | fprintf (file, "%d", 4 * (REGNO (x) - 68)); | |
2497 | return; | |
2498 | ||
2499 | case 'F': | |
2500 | /* Similar, but print the count for the rotate in the opposite | |
2501 | direction. */ | |
2502 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2503 | output_operand_lossage ("invalid %%F value"); | |
2504 | else | |
2505 | fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); | |
2506 | return; | |
2507 | ||
2508 | case 'G': | |
2509 | /* X is a constant integer. If it is negative, print "m", | |
2510 | otherwise print "z". This is to make a aze or ame insn. */ | |
2511 | if (GET_CODE (x) != CONST_INT) | |
2512 | output_operand_lossage ("invalid %%G value"); | |
2513 | else if (INTVAL (x) >= 0) | |
76229ac8 | 2514 | putc ('z', file); |
9854d9ed | 2515 | else |
76229ac8 | 2516 | putc ('m', file); |
9854d9ed RK |
2517 | return; |
2518 | ||
9878760c | 2519 | case 'h': |
df3d94ed RK |
2520 | /* If constant, output low-order five bits. Otherwise, |
2521 | write normally. */ | |
9878760c RK |
2522 | if (INT_P (x)) |
2523 | fprintf (file, "%d", INT_LOWPART (x) & 31); | |
2524 | else | |
2525 | print_operand (file, x, 0); | |
2526 | return; | |
2527 | ||
64305719 DE |
2528 | case 'H': |
2529 | /* If constant, output low-order six bits. Otherwise, | |
2530 | write normally. */ | |
2531 | if (INT_P (x)) | |
2532 | fprintf (file, "%d", INT_LOWPART (x) & 63); | |
2533 | else | |
2534 | print_operand (file, x, 0); | |
2535 | return; | |
2536 | ||
9854d9ed RK |
2537 | case 'I': |
2538 | /* Print `i' if this is a constant, else nothing. */ | |
9878760c | 2539 | if (INT_P (x)) |
76229ac8 | 2540 | putc ('i', file); |
9878760c RK |
2541 | return; |
2542 | ||
9854d9ed RK |
2543 | case 'j': |
2544 | /* Write the bit number in CCR for jump. */ | |
2545 | i = ccr_bit (x, 0); | |
2546 | if (i == -1) | |
2547 | output_operand_lossage ("invalid %%j code"); | |
9878760c | 2548 | else |
9854d9ed | 2549 | fprintf (file, "%d", i); |
9878760c RK |
2550 | return; |
2551 | ||
9854d9ed RK |
2552 | case 'J': |
2553 | /* Similar, but add one for shift count in rlinm for scc and pass | |
2554 | scc flag to `ccr_bit'. */ | |
2555 | i = ccr_bit (x, 1); | |
2556 | if (i == -1) | |
2557 | output_operand_lossage ("invalid %%J code"); | |
2558 | else | |
a0466a68 RK |
2559 | /* If we want bit 31, write a shift count of zero, not 32. */ |
2560 | fprintf (file, "%d", i == 31 ? 0 : i + 1); | |
9878760c RK |
2561 | return; |
2562 | ||
9854d9ed RK |
2563 | case 'k': |
2564 | /* X must be a constant. Write the 1's complement of the | |
2565 | constant. */ | |
9878760c | 2566 | if (! INT_P (x)) |
9854d9ed | 2567 | output_operand_lossage ("invalid %%k value"); |
9878760c | 2568 | |
9854d9ed | 2569 | fprintf (file, "%d", ~ INT_LOWPART (x)); |
9878760c RK |
2570 | return; |
2571 | ||
9854d9ed RK |
2572 | case 'L': |
2573 | /* Write second word of DImode or DFmode reference. Works on register | |
2574 | or non-indexed memory only. */ | |
2575 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2576 | fprintf (file, "%s", reg_names[REGNO (x) + 1]); |
9854d9ed RK |
2577 | else if (GET_CODE (x) == MEM) |
2578 | { | |
2579 | /* Handle possible auto-increment. Since it is pre-increment and | |
2580 | we have already done it, we can just use an offset of four. */ | |
2581 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2582 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2583 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4)); |
9854d9ed | 2584 | else |
a54d04b7 | 2585 | output_address (plus_constant (XEXP (x, 0), 4)); |
ba5e43aa | 2586 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2587 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2588 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2589 | } |
9878760c | 2590 | return; |
9854d9ed | 2591 | |
9878760c RK |
2592 | case 'm': |
2593 | /* MB value for a mask operand. */ | |
2594 | if (! mask_operand (x, VOIDmode)) | |
2595 | output_operand_lossage ("invalid %%m value"); | |
2596 | ||
2597 | val = INT_LOWPART (x); | |
2598 | ||
2599 | /* If the high bit is set and the low bit is not, the value is zero. | |
2600 | If the high bit is zero, the value is the first 1 bit we find from | |
2601 | the left. */ | |
2602 | if (val < 0 && (val & 1) == 0) | |
2603 | { | |
19d2d16f | 2604 | putc ('0', file); |
9878760c RK |
2605 | return; |
2606 | } | |
2607 | else if (val >= 0) | |
2608 | { | |
2609 | for (i = 1; i < 32; i++) | |
2610 | if ((val <<= 1) < 0) | |
2611 | break; | |
2612 | fprintf (file, "%d", i); | |
2613 | return; | |
2614 | } | |
2615 | ||
2616 | /* Otherwise, look for the first 0 bit from the right. The result is its | |
2617 | number plus 1. We know the low-order bit is one. */ | |
2618 | for (i = 0; i < 32; i++) | |
2619 | if (((val >>= 1) & 1) == 0) | |
2620 | break; | |
2621 | ||
2622 | /* If we ended in ...01, I would be 0. The correct value is 31, so | |
2623 | we want 31 - i. */ | |
2624 | fprintf (file, "%d", 31 - i); | |
2625 | return; | |
2626 | ||
2627 | case 'M': | |
2628 | /* ME value for a mask operand. */ | |
2629 | if (! mask_operand (x, VOIDmode)) | |
2630 | output_operand_lossage ("invalid %%m value"); | |
2631 | ||
2632 | val = INT_LOWPART (x); | |
2633 | ||
2634 | /* If the low bit is set and the high bit is not, the value is 31. | |
2635 | If the low bit is zero, the value is the first 1 bit we find from | |
2636 | the right. */ | |
2637 | if ((val & 1) && val >= 0) | |
2638 | { | |
76229ac8 | 2639 | fputs ("31", file); |
9878760c RK |
2640 | return; |
2641 | } | |
2642 | else if ((val & 1) == 0) | |
2643 | { | |
2644 | for (i = 0; i < 32; i++) | |
2645 | if ((val >>= 1) & 1) | |
2646 | break; | |
2647 | ||
2648 | /* If we had ....10, I would be 0. The result should be | |
2649 | 30, so we need 30 - i. */ | |
2650 | fprintf (file, "%d", 30 - i); | |
2651 | return; | |
2652 | } | |
2653 | ||
2654 | /* Otherwise, look for the first 0 bit from the left. The result is its | |
2655 | number minus 1. We know the high-order bit is one. */ | |
2656 | for (i = 0; i < 32; i++) | |
2657 | if ((val <<= 1) >= 0) | |
2658 | break; | |
2659 | ||
2660 | fprintf (file, "%d", i); | |
2661 | return; | |
2662 | ||
9878760c RK |
2663 | case 'N': |
2664 | /* Write the number of elements in the vector times 4. */ | |
2665 | if (GET_CODE (x) != PARALLEL) | |
2666 | output_operand_lossage ("invalid %%N value"); | |
2667 | ||
2668 | fprintf (file, "%d", XVECLEN (x, 0) * 4); | |
2669 | return; | |
2670 | ||
2671 | case 'O': | |
2672 | /* Similar, but subtract 1 first. */ | |
2673 | if (GET_CODE (x) != PARALLEL) | |
2674 | output_operand_lossage ("invalid %%N value"); | |
2675 | ||
2676 | fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); | |
2677 | return; | |
2678 | ||
9854d9ed RK |
2679 | case 'p': |
2680 | /* X is a CONST_INT that is a power of two. Output the logarithm. */ | |
2681 | if (! INT_P (x) | |
2682 | || (i = exact_log2 (INT_LOWPART (x))) < 0) | |
2683 | output_operand_lossage ("invalid %%p value"); | |
2684 | ||
2685 | fprintf (file, "%d", i); | |
2686 | return; | |
2687 | ||
9878760c RK |
2688 | case 'P': |
2689 | /* The operand must be an indirect memory reference. The result | |
2690 | is the register number. */ | |
2691 | if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG | |
2692 | || REGNO (XEXP (x, 0)) >= 32) | |
2693 | output_operand_lossage ("invalid %%P value"); | |
2694 | ||
2695 | fprintf (file, "%d", REGNO (XEXP (x, 0))); | |
2696 | return; | |
2697 | ||
9854d9ed RK |
2698 | case 'R': |
2699 | /* X is a CR register. Print the mask for `mtcrf'. */ | |
2700 | if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) | |
2701 | output_operand_lossage ("invalid %%R value"); | |
2702 | else | |
2703 | fprintf (file, "%d", 128 >> (REGNO (x) - 68)); | |
9878760c | 2704 | return; |
9854d9ed RK |
2705 | |
2706 | case 's': | |
2707 | /* Low 5 bits of 32 - value */ | |
2708 | if (! INT_P (x)) | |
2709 | output_operand_lossage ("invalid %%s value"); | |
2710 | ||
2711 | fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); | |
9878760c | 2712 | return; |
9854d9ed | 2713 | |
9878760c RK |
2714 | case 't': |
2715 | /* Write 12 if this jump operation will branch if true, 4 otherwise. | |
2716 | All floating-point operations except NE branch true and integer | |
2717 | EQ, LT, GT, LTU and GTU also branch true. */ | |
2718 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2719 | output_operand_lossage ("invalid %%t value"); | |
2720 | ||
2721 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2722 | && GET_CODE (x) != NE) | |
2723 | || GET_CODE (x) == EQ | |
2724 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2725 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2726 | fputs ("12", file); |
9878760c | 2727 | else |
76229ac8 | 2728 | putc ('4', file); |
9878760c RK |
2729 | return; |
2730 | ||
2731 | case 'T': | |
2732 | /* Opposite of 't': write 4 if this jump operation will branch if true, | |
2733 | 12 otherwise. */ | |
2734 | if (GET_RTX_CLASS (GET_CODE (x)) != '<') | |
2735 | output_operand_lossage ("invalid %%t value"); | |
2736 | ||
2737 | else if ((GET_MODE (XEXP (x, 0)) == CCFPmode | |
2738 | && GET_CODE (x) != NE) | |
2739 | || GET_CODE (x) == EQ | |
2740 | || GET_CODE (x) == LT || GET_CODE (x) == GT | |
2741 | || GET_CODE (x) == LTU || GET_CODE (x) == GTU) | |
76229ac8 | 2742 | putc ('4', file); |
9878760c | 2743 | else |
76229ac8 | 2744 | fputs ("12", file); |
9878760c RK |
2745 | return; |
2746 | ||
9854d9ed | 2747 | case 'u': |
802a0058 | 2748 | /* High-order 16 bits of constant for use in unsigned operand. */ |
9854d9ed RK |
2749 | if (! INT_P (x)) |
2750 | output_operand_lossage ("invalid %%u value"); | |
9878760c | 2751 | |
76229ac8 | 2752 | fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); |
9878760c RK |
2753 | return; |
2754 | ||
802a0058 MM |
2755 | case 'v': |
2756 | /* High-order 16 bits of constant for use in signed operand. */ | |
2757 | if (! INT_P (x)) | |
2758 | output_operand_lossage ("invalid %%v value"); | |
2759 | ||
2760 | { | |
2761 | int value = (INT_LOWPART (x) >> 16) & 0xffff; | |
2762 | ||
2763 | /* Solaris assembler doesn't like lis 0,0x80000 */ | |
2764 | if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) | |
2765 | fprintf (file, "%d", value | (~0 << 16)); | |
2766 | else | |
2767 | fprintf (file, "0x%x", value); | |
2768 | return; | |
2769 | } | |
2770 | ||
9854d9ed RK |
2771 | case 'U': |
2772 | /* Print `u' if this has an auto-increment or auto-decrement. */ | |
2773 | if (GET_CODE (x) == MEM | |
2774 | && (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2775 | || GET_CODE (XEXP (x, 0)) == PRE_DEC)) | |
76229ac8 | 2776 | putc ('u', file); |
9854d9ed | 2777 | return; |
9878760c | 2778 | |
9854d9ed RK |
2779 | case 'w': |
2780 | /* If constant, low-order 16 bits of constant, signed. Otherwise, write | |
2781 | normally. */ | |
2782 | if (INT_P (x)) | |
2783 | fprintf (file, "%d", | |
2784 | (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000)); | |
2785 | else | |
2786 | print_operand (file, x, 0); | |
9878760c RK |
2787 | return; |
2788 | ||
9854d9ed RK |
2789 | case 'W': |
2790 | /* If constant, low-order 16 bits of constant, unsigned. | |
2791 | Otherwise, write normally. */ | |
2792 | if (INT_P (x)) | |
2793 | fprintf (file, "%d", INT_LOWPART (x) & 0xffff); | |
2794 | else | |
2795 | print_operand (file, x, 0); | |
2796 | return; | |
9878760c | 2797 | |
9854d9ed RK |
2798 | case 'X': |
2799 | if (GET_CODE (x) == MEM | |
2800 | && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) | |
76229ac8 | 2801 | putc ('x', file); |
9854d9ed | 2802 | return; |
9878760c | 2803 | |
9854d9ed RK |
2804 | case 'Y': |
2805 | /* Like 'L', for third word of TImode */ | |
2806 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2807 | fprintf (file, "%s", reg_names[REGNO (x) + 2]); |
9854d9ed | 2808 | else if (GET_CODE (x) == MEM) |
9878760c | 2809 | { |
9854d9ed RK |
2810 | if (GET_CODE (XEXP (x, 0)) == PRE_INC |
2811 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2812 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); |
9854d9ed | 2813 | else |
a54d04b7 | 2814 | output_address (plus_constant (XEXP (x, 0), 8)); |
ba5e43aa | 2815 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2816 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2817 | reg_names[SMALL_DATA_REG]); | |
9878760c RK |
2818 | } |
2819 | return; | |
9854d9ed | 2820 | |
9878760c | 2821 | case 'z': |
b4ac57ab RS |
2822 | /* X is a SYMBOL_REF. Write out the name preceded by a |
2823 | period and without any trailing data in brackets. Used for function | |
4d30c363 MM |
2824 | names. If we are configured for System V (or the embedded ABI) on |
2825 | the PowerPC, do not emit the period, since those systems do not use | |
2826 | TOCs and the like. */ | |
9878760c RK |
2827 | if (GET_CODE (x) != SYMBOL_REF) |
2828 | abort (); | |
2829 | ||
b6c9286a MM |
2830 | if (XSTR (x, 0)[0] != '.') |
2831 | { | |
2832 | switch (DEFAULT_ABI) | |
2833 | { | |
2834 | default: | |
2835 | abort (); | |
2836 | ||
2837 | case ABI_AIX: | |
2838 | putc ('.', file); | |
2839 | break; | |
2840 | ||
2841 | case ABI_V4: | |
2842 | case ABI_AIX_NODESC: | |
c81bebd7 | 2843 | case ABI_SOLARIS: |
b6c9286a MM |
2844 | break; |
2845 | ||
2846 | case ABI_NT: | |
2847 | fputs ("..", file); | |
2848 | break; | |
2849 | } | |
2850 | } | |
9878760c RK |
2851 | RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); |
2852 | return; | |
2853 | ||
9854d9ed RK |
2854 | case 'Z': |
2855 | /* Like 'L', for last word of TImode. */ | |
2856 | if (GET_CODE (x) == REG) | |
5ebfb2ba | 2857 | fprintf (file, "%s", reg_names[REGNO (x) + 3]); |
9854d9ed RK |
2858 | else if (GET_CODE (x) == MEM) |
2859 | { | |
2860 | if (GET_CODE (XEXP (x, 0)) == PRE_INC | |
2861 | || GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
a54d04b7 | 2862 | output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); |
9854d9ed | 2863 | else |
a54d04b7 | 2864 | output_address (plus_constant (XEXP (x, 0), 12)); |
ba5e43aa | 2865 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2866 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2867 | reg_names[SMALL_DATA_REG]); | |
9854d9ed | 2868 | } |
5c23c401 | 2869 | return; |
9854d9ed | 2870 | |
9878760c RK |
2871 | case 0: |
2872 | if (GET_CODE (x) == REG) | |
2873 | fprintf (file, "%s", reg_names[REGNO (x)]); | |
2874 | else if (GET_CODE (x) == MEM) | |
2875 | { | |
2876 | /* We need to handle PRE_INC and PRE_DEC here, since we need to | |
2877 | know the width from the mode. */ | |
2878 | if (GET_CODE (XEXP (x, 0)) == PRE_INC) | |
2879 | fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), | |
2880 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2881 | else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) | |
2882 | fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), | |
2883 | REGNO (XEXP (XEXP (x, 0), 0))); | |
2884 | else | |
a54d04b7 | 2885 | output_address (XEXP (x, 0)); |
9878760c RK |
2886 | } |
2887 | else | |
a54d04b7 | 2888 | output_addr_const (file, x); |
a85d226b | 2889 | return; |
9878760c RK |
2890 | |
2891 | default: | |
2892 | output_operand_lossage ("invalid %%xn code"); | |
2893 | } | |
2894 | } | |
2895 | \f | |
2896 | /* Print the address of an operand. */ | |
2897 | ||
2898 | void | |
2899 | print_operand_address (file, x) | |
2900 | FILE *file; | |
2901 | register rtx x; | |
2902 | { | |
2903 | if (GET_CODE (x) == REG) | |
4697a36c | 2904 | fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); |
24f30767 | 2905 | else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) |
9878760c RK |
2906 | { |
2907 | output_addr_const (file, x); | |
ba5e43aa | 2908 | if (small_data_operand (x, GET_MODE (x))) |
8fbd2dc7 MM |
2909 | fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, |
2910 | reg_names[SMALL_DATA_REG]); | |
7509c759 | 2911 | |
4697a36c | 2912 | #ifdef TARGET_NO_TOC |
7509c759 | 2913 | else if (TARGET_NO_TOC) |
4697a36c | 2914 | ; |
4697a36c | 2915 | #endif |
7509c759 | 2916 | else |
4697a36c | 2917 | fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]); |
9878760c RK |
2918 | } |
2919 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) | |
2920 | { | |
2921 | if (REGNO (XEXP (x, 0)) == 0) | |
4697a36c MM |
2922 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], |
2923 | reg_names[ REGNO (XEXP (x, 0)) ]); | |
9878760c | 2924 | else |
4697a36c MM |
2925 | fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], |
2926 | reg_names[ REGNO (XEXP (x, 1)) ]); | |
9878760c RK |
2927 | } |
2928 | else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
4697a36c MM |
2929 | fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); |
2930 | else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM | |
2931 | && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) | |
2932 | { | |
2933 | output_addr_const (file, XEXP (x, 1)); | |
2934 | fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); | |
2935 | } | |
9878760c RK |
2936 | else |
2937 | abort (); | |
2938 | } | |
2939 | \f | |
2940 | /* This page contains routines that are used to determine what the function | |
2941 | prologue and epilogue code will do and write them out. */ | |
2942 | ||
2943 | /* Return the first fixed-point register that is required to be saved. 32 if | |
2944 | none. */ | |
2945 | ||
2946 | int | |
2947 | first_reg_to_save () | |
2948 | { | |
2949 | int first_reg; | |
2950 | ||
2951 | /* Find lowest numbered live register. */ | |
2952 | for (first_reg = 13; first_reg <= 31; first_reg++) | |
2953 | if (regs_ever_live[first_reg]) | |
2954 | break; | |
2955 | ||
e165f3f0 | 2956 | /* If profiling, then we must save/restore every register that contains |
9c849d2a | 2957 | a parameter before/after the .__mcount call. Use registers from 30 down |
e165f3f0 RK |
2958 | to 23 to do this. Don't use the frame pointer in reg 31. |
2959 | ||
2960 | For now, save enough room for all of the parameter registers. */ | |
b6c9286a | 2961 | if (DEFAULT_ABI == ABI_AIX && profile_flag) |
e165f3f0 RK |
2962 | if (first_reg > 23) |
2963 | first_reg = 23; | |
2964 | ||
9878760c RK |
2965 | return first_reg; |
2966 | } | |
2967 | ||
2968 | /* Similar, for FP regs. */ | |
2969 | ||
2970 | int | |
2971 | first_fp_reg_to_save () | |
2972 | { | |
2973 | int first_reg; | |
2974 | ||
2975 | /* Find lowest numbered live register. */ | |
2976 | for (first_reg = 14 + 32; first_reg <= 63; first_reg++) | |
2977 | if (regs_ever_live[first_reg]) | |
2978 | break; | |
2979 | ||
2980 | return first_reg; | |
2981 | } | |
2982 | ||
9878760c RK |
2983 | /* Return non-zero if this function makes calls. */ |
2984 | ||
2985 | int | |
2986 | rs6000_makes_calls () | |
2987 | { | |
2988 | rtx insn; | |
2989 | ||
38c1f2d7 MM |
2990 | /* If we are profiling, we will be making a call to __mcount. |
2991 | Under the System V ABI's, we store the LR directly, so | |
2992 | we don't need to do it here. */ | |
2993 | if (DEFAULT_ABI == ABI_AIX && profile_flag) | |
0c61c946 RK |
2994 | return 1; |
2995 | ||
9878760c RK |
2996 | for (insn = get_insns (); insn; insn = next_insn (insn)) |
2997 | if (GET_CODE (insn) == CALL_INSN) | |
2998 | return 1; | |
2999 | ||
3000 | return 0; | |
3001 | } | |
3002 | ||
4697a36c MM |
3003 | \f |
3004 | /* Calculate the stack information for the current function. This is | |
3005 | complicated by having two separate calling sequences, the AIX calling | |
3006 | sequence and the V.4 calling sequence. | |
3007 | ||
3008 | AIX stack frames look like: | |
3009 | ||
3010 | SP----> +---------------------------------------+ | |
3011 | | back chain to caller | 0 | |
3012 | +---------------------------------------+ | |
3013 | | saved CR | 4 | |
3014 | +---------------------------------------+ | |
3015 | | saved LR | 8 | |
3016 | +---------------------------------------+ | |
3017 | | reserved for compilers | 12 | |
3018 | +---------------------------------------+ | |
3019 | | reserved for binders | 16 | |
3020 | +---------------------------------------+ | |
3021 | | saved TOC pointer | 20 | |
3022 | +---------------------------------------+ | |
3023 | | Parameter save area (P) | 24 | |
3024 | +---------------------------------------+ | |
a7df97e6 | 3025 | | Alloca space (A) | 24+P |
802a0058 | 3026 | +---------------------------------------+ |
a7df97e6 | 3027 | | Local variable space (L) | 24+P+A |
4697a36c | 3028 | +---------------------------------------+ |
a7df97e6 | 3029 | | Float/int conversion temporary (X) | 24+P+A+L |
4697a36c | 3030 | +---------------------------------------+ |
a7df97e6 | 3031 | | Save area for GP registers (G) | 24+P+A+X+L |
4697a36c | 3032 | +---------------------------------------+ |
a7df97e6 | 3033 | | Save area for FP registers (F) | 24+P+A+X+L+G |
4697a36c MM |
3034 | +---------------------------------------+ |
3035 | old SP->| back chain to caller's caller | | |
3036 | +---------------------------------------+ | |
3037 | ||
3038 | V.4 stack frames look like: | |
3039 | ||
3040 | SP----> +---------------------------------------+ | |
3041 | | back chain to caller | 0 | |
3042 | +---------------------------------------+ | |
5eb387b8 | 3043 | | caller's saved LR | 4 |
4697a36c MM |
3044 | +---------------------------------------+ |
3045 | | Parameter save area (P) | 8 | |
3046 | +---------------------------------------+ | |
a7df97e6 MM |
3047 | | Alloca space (A) | 8+P |
3048 | +---------------------------------------+ | |
3049 | | Varargs save area (V) | 8+P+A | |
3050 | +---------------------------------------+ | |
3051 | | Local variable space (L) | 8+P+A+V | |
3052 | +---------------------------------------+ | |
3053 | | Float/int conversion temporary (X) | 8+P+A+V+L | |
4697a36c | 3054 | +---------------------------------------+ |
a7df97e6 MM |
3055 | | saved CR (C) | 8+P+A+V+L+X |
3056 | +---------------------------------------+ | |
3057 | | Save area for GP registers (G) | 8+P+A+V+L+X+C | |
3058 | +---------------------------------------+ | |
3059 | | Save area for FP registers (F) | 8+P+A+V+L+X+C+G | |
4697a36c MM |
3060 | +---------------------------------------+ |
3061 | old SP->| back chain to caller's caller | | |
3062 | +---------------------------------------+ | |
b6c9286a MM |
3063 | |
3064 | ||
3065 | A PowerPC Windows/NT frame looks like: | |
3066 | ||
3067 | SP----> +---------------------------------------+ | |
3068 | | back chain to caller | 0 | |
3069 | +---------------------------------------+ | |
3070 | | reserved | 4 | |
3071 | +---------------------------------------+ | |
3072 | | reserved | 8 | |
3073 | +---------------------------------------+ | |
3074 | | reserved | 12 | |
3075 | +---------------------------------------+ | |
3076 | | reserved | 16 | |
3077 | +---------------------------------------+ | |
3078 | | reserved | 20 | |
3079 | +---------------------------------------+ | |
3080 | | Parameter save area (P) | 24 | |
3081 | +---------------------------------------+ | |
a7df97e6 MM |
3082 | | Alloca space (A) | 24+P |
3083 | +---------------------------------------+ | |
3084 | | Local variable space (L) | 24+P+A | |
3085 | +---------------------------------------+ | |
3086 | | Float/int conversion temporary (X) | 24+P+A+L | |
b6c9286a | 3087 | +---------------------------------------+ |
a7df97e6 MM |
3088 | | Save area for FP registers (F) | 24+P+A+L+X |
3089 | +---------------------------------------+ | |
3090 | | Possible alignment area (Y) | 24+P+A+L+X+F | |
3091 | +---------------------------------------+ | |
3092 | | Save area for GP registers (G) | 24+P+A+L+X+F+Y | |
3093 | +---------------------------------------+ | |
3094 | | Save area for CR (C) | 24+P+A+L+X+F+Y+G | |
3095 | +---------------------------------------+ | |
3096 | | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C | |
3097 | +---------------------------------------+ | |
3098 | | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T | |
b6c9286a MM |
3099 | +---------------------------------------+ |
3100 | old SP->| back chain to caller's caller | | |
3101 | +---------------------------------------+ | |
3102 | ||
3103 | For NT, there is no specific order to save the registers, but in | |
3104 | order to support __builtin_return_address, the save area for the | |
3105 | link register needs to be in a known place, so we use -4 off of the | |
3106 | old SP. To support calls through pointers, we also allocate a | |
3107 | fixed slot to store the TOC, -8 off the old SP. */ | |
4697a36c | 3108 | |
61b2fbe7 MM |
3109 | #ifndef ABI_STACK_BOUNDARY |
3110 | #define ABI_STACK_BOUNDARY STACK_BOUNDARY | |
3111 | #endif | |
3112 | ||
4697a36c MM |
3113 | rs6000_stack_t * |
3114 | rs6000_stack_info () | |
3115 | { | |
3116 | static rs6000_stack_t info, zero_info; | |
3117 | rs6000_stack_t *info_ptr = &info; | |
3118 | int reg_size = TARGET_64BIT ? 8 : 4; | |
24d304eb | 3119 | enum rs6000_abi abi; |
b6c9286a | 3120 | int total_raw_size; |
4697a36c MM |
3121 | |
3122 | /* Zero all fields portably */ | |
3123 | info = zero_info; | |
3124 | ||
3125 | /* Select which calling sequence */ | |
b6c9286a | 3126 | info_ptr->abi = abi = DEFAULT_ABI; |
9878760c | 3127 | |
4697a36c MM |
3128 | /* Calculate which registers need to be saved & save area size */ |
3129 | info_ptr->first_gp_reg_save = first_reg_to_save (); | |
3130 | info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); | |
3131 | ||
3132 | info_ptr->first_fp_reg_save = first_fp_reg_to_save (); | |
3133 | info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); | |
3134 | ||
3135 | /* Does this function call anything? */ | |
3136 | info_ptr->calls_p = rs6000_makes_calls (); | |
3137 | ||
62c0fb87 | 3138 | /* Allocate space to save the toc. */ |
82280d5e | 3139 | if (abi == ABI_NT && info_ptr->calls_p) |
b6c9286a MM |
3140 | { |
3141 | info_ptr->toc_save_p = 1; | |
3142 | info_ptr->toc_size = reg_size; | |
3143 | } | |
3144 | ||
802a0058 MM |
3145 | /* Does this machine need the float/int conversion area? */ |
3146 | info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; | |
3147 | ||
b6c9286a MM |
3148 | /* If this is main and we need to call a function to set things up, |
3149 | save main's arguments around the call. */ | |
c81bebd7 MM |
3150 | #ifdef TARGET_EABI |
3151 | if (TARGET_EABI) | |
3152 | #endif | |
b6c9286a | 3153 | { |
30ccf55d MS |
3154 | if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 |
3155 | && DECL_CONTEXT (current_function_decl) == NULL_TREE) | |
b6c9286a | 3156 | { |
c81bebd7 | 3157 | info_ptr->main_p = 1; |
b6c9286a | 3158 | |
c81bebd7 MM |
3159 | #ifdef NAME__MAIN |
3160 | info_ptr->calls_p = 1; | |
b6c9286a | 3161 | |
c81bebd7 | 3162 | if (DECL_ARGUMENTS (current_function_decl)) |
b6c9286a | 3163 | { |
c81bebd7 MM |
3164 | int i; |
3165 | tree arg; | |
3166 | ||
3167 | info_ptr->main_save_p = 1; | |
3168 | info_ptr->main_size = 0; | |
3169 | ||
3170 | for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); | |
3171 | arg != NULL_TREE && i < 8; | |
3172 | (arg = TREE_CHAIN (arg)), i++) | |
3173 | { | |
3174 | info_ptr->main_size += reg_size; | |
3175 | } | |
b6c9286a | 3176 | } |
b6c9286a | 3177 | #endif |
c81bebd7 | 3178 | } |
b6c9286a MM |
3179 | } |
3180 | ||
c81bebd7 | 3181 | |
4697a36c | 3182 | /* Determine if we need to save the link register */ |
38c1f2d7 MM |
3183 | if (regs_ever_live[65] |
3184 | || (DEFAULT_ABI == ABI_AIX && profile_flag) | |
4697a36c MM |
3185 | #ifdef TARGET_RELOCATABLE |
3186 | || (TARGET_RELOCATABLE && (get_pool_size () != 0)) | |
3187 | #endif | |
3188 | || (info_ptr->first_fp_reg_save != 64 | |
3189 | && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) | |
24d304eb | 3190 | || (abi == ABI_V4 && current_function_calls_alloca) |
c81bebd7 | 3191 | || (abi == ABI_SOLARIS && current_function_calls_alloca) |
4697a36c MM |
3192 | || info_ptr->calls_p) |
3193 | { | |
3194 | info_ptr->lr_save_p = 1; | |
3195 | regs_ever_live[65] = 1; | |
b6c9286a MM |
3196 | if (abi == ABI_NT) |
3197 | info_ptr->lr_size = reg_size; | |
4697a36c MM |
3198 | } |
3199 | ||
3200 | /* Determine if we need to save the condition code registers */ | |
3201 | if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) | |
3202 | { | |
3203 | info_ptr->cr_save_p = 1; | |
c81bebd7 | 3204 | if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
4697a36c MM |
3205 | info_ptr->cr_size = reg_size; |
3206 | } | |
3207 | ||
92834d7d BM |
3208 | /* Ensure that fp_save_offset will be aligned to an 8-byte boundary. */ |
3209 | if (info_ptr->fpmem_p) | |
3210 | { | |
3211 | info_ptr->gp_size = RS6000_ALIGN (info_ptr->gp_size, 8); | |
3212 | info_ptr->main_size = RS6000_ALIGN (info_ptr->main_size, 8); | |
3213 | } | |
3214 | ||
4697a36c MM |
3215 | /* Determine various sizes */ |
3216 | info_ptr->reg_size = reg_size; | |
3217 | info_ptr->fixed_size = RS6000_SAVE_AREA; | |
3218 | info_ptr->varargs_size = RS6000_VARARGS_AREA; | |
189e03e3 DE |
3219 | info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); |
3220 | info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); | |
802a0058 | 3221 | info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; |
189e03e3 | 3222 | info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size |
b6c9286a MM |
3223 | + info_ptr->gp_size |
3224 | + info_ptr->cr_size | |
3225 | + info_ptr->lr_size | |
3226 | + info_ptr->toc_size | |
3227 | + info_ptr->main_size, 8); | |
3228 | ||
3229 | total_raw_size = (info_ptr->vars_size | |
3230 | + info_ptr->parm_size | |
802a0058 | 3231 | + info_ptr->fpmem_size |
b6c9286a MM |
3232 | + info_ptr->save_size |
3233 | + info_ptr->varargs_size | |
3234 | + info_ptr->fixed_size); | |
3235 | ||
189e03e3 | 3236 | info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); |
4697a36c | 3237 | |
db72d7a1 DE |
3238 | /* Determine if we need to allocate any stack frame: |
3239 | ||
3240 | For AIX we need to push the stack if a frame pointer is needed (because | |
3241 | the stack might be dynamically adjusted), if we are debugging, if we | |
3242 | make calls, or if the sum of fp_save, gp_save, fpmem, and local variables | |
3243 | are more than the space needed to save all non-volatile registers: | |
3244 | 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 19*8 = 296 | |
4697a36c MM |
3245 | |
3246 | For V.4 we don't have the stack cushion that AIX uses, but assume that | |
3247 | the debugger can handle stackless frames. */ | |
3248 | ||
3249 | if (info_ptr->calls_p) | |
3250 | info_ptr->push_p = 1; | |
3251 | ||
c81bebd7 | 3252 | else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) |
b6c9286a | 3253 | info_ptr->push_p = (total_raw_size > info_ptr->fixed_size |
1a986152 GK |
3254 | || (abi == ABI_NT ? info_ptr->lr_save_p |
3255 | : info_ptr->calls_p)); | |
4697a36c MM |
3256 | |
3257 | else | |
3258 | info_ptr->push_p = (frame_pointer_needed | |
3259 | || write_symbols != NO_DEBUG | |
db72d7a1 DE |
3260 | || ((info_ptr->total_size - info_ptr->fixed_size) |
3261 | > (TARGET_32BIT ? 220 : 296))); | |
4697a36c MM |
3262 | |
3263 | /* Calculate the offsets */ | |
24d304eb | 3264 | switch (abi) |
4697a36c | 3265 | { |
b6c9286a | 3266 | case ABI_NONE: |
24d304eb | 3267 | default: |
b6c9286a MM |
3268 | abort (); |
3269 | ||
3270 | case ABI_AIX: | |
3271 | case ABI_AIX_NODESC: | |
3272 | info_ptr->fp_save_offset = - info_ptr->fp_size; | |
3273 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
3274 | info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; | |
3275 | info_ptr->cr_save_offset = 4; | |
3276 | info_ptr->lr_save_offset = 8; | |
24d304eb RK |
3277 | break; |
3278 | ||
3279 | case ABI_V4: | |
c81bebd7 | 3280 | case ABI_SOLARIS: |
b6c9286a MM |
3281 | info_ptr->fp_save_offset = - info_ptr->fp_size; |
3282 | info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; | |
a7df97e6 MM |
3283 | info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; |
3284 | info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; | |
3285 | info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; | |
b6c9286a MM |
3286 | info_ptr->lr_save_offset = reg_size; |
3287 | break; | |
3288 | ||
3289 | case ABI_NT: | |
3290 | info_ptr->lr_save_offset = -4; | |
3291 | info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; | |
3292 | info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; | |
3293 | info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; | |
3294 | info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; | |
3295 | if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) | |
3296 | info_ptr->fp_save_offset -= 4; | |
3297 | ||
3298 | info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; | |
24d304eb | 3299 | break; |
4697a36c MM |
3300 | } |
3301 | ||
a7df97e6 | 3302 | if (info_ptr->fpmem_p) |
db72d7a1 DE |
3303 | { |
3304 | info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; | |
3305 | rs6000_fpmem_size = info_ptr->fpmem_size; | |
3306 | rs6000_fpmem_offset = info_ptr->push_p | |
3307 | ? info_ptr->total_size + info_ptr->fpmem_offset | |
3308 | : info_ptr->fpmem_offset; | |
3309 | } | |
3310 | else | |
3311 | info_ptr->fpmem_offset = 0; | |
a7df97e6 | 3312 | |
4697a36c MM |
3313 | /* Zero offsets if we're not saving those registers */ |
3314 | if (!info_ptr->fp_size) | |
3315 | info_ptr->fp_save_offset = 0; | |
3316 | ||
3317 | if (!info_ptr->gp_size) | |
3318 | info_ptr->gp_save_offset = 0; | |
3319 | ||
3320 | if (!info_ptr->lr_save_p) | |
3321 | info_ptr->lr_save_offset = 0; | |
3322 | ||
3323 | if (!info_ptr->cr_save_p) | |
3324 | info_ptr->cr_save_offset = 0; | |
3325 | ||
b6c9286a MM |
3326 | if (!info_ptr->toc_save_p) |
3327 | info_ptr->toc_save_offset = 0; | |
3328 | ||
3329 | if (!info_ptr->main_save_p) | |
3330 | info_ptr->main_save_offset = 0; | |
3331 | ||
4697a36c MM |
3332 | return info_ptr; |
3333 | } | |
3334 | ||
3335 | void | |
3336 | debug_stack_info (info) | |
3337 | rs6000_stack_t *info; | |
9878760c | 3338 | { |
24d304eb RK |
3339 | char *abi_string; |
3340 | ||
4697a36c MM |
3341 | if (!info) |
3342 | info = rs6000_stack_info (); | |
3343 | ||
3344 | fprintf (stderr, "\nStack information for function %s:\n", | |
3345 | ((current_function_decl && DECL_NAME (current_function_decl)) | |
3346 | ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) | |
3347 | : "<unknown>")); | |
3348 | ||
24d304eb RK |
3349 | switch (info->abi) |
3350 | { | |
b6c9286a MM |
3351 | default: abi_string = "Unknown"; break; |
3352 | case ABI_NONE: abi_string = "NONE"; break; | |
3353 | case ABI_AIX: abi_string = "AIX"; break; | |
3354 | case ABI_AIX_NODESC: abi_string = "AIX"; break; | |
3355 | case ABI_V4: abi_string = "V.4"; break; | |
c81bebd7 | 3356 | case ABI_SOLARIS: abi_string = "Solaris"; break; |
b6c9286a | 3357 | case ABI_NT: abi_string = "NT"; break; |
24d304eb RK |
3358 | } |
3359 | ||
3360 | fprintf (stderr, "\tABI = %5s\n", abi_string); | |
3361 | ||
4697a36c MM |
3362 | if (info->first_gp_reg_save != 32) |
3363 | fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); | |
3364 | ||
3365 | if (info->first_fp_reg_save != 64) | |
3366 | fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); | |
9878760c | 3367 | |
4697a36c MM |
3368 | if (info->lr_save_p) |
3369 | fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); | |
9878760c | 3370 | |
4697a36c MM |
3371 | if (info->cr_save_p) |
3372 | fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); | |
3373 | ||
b6c9286a MM |
3374 | if (info->toc_save_p) |
3375 | fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); | |
3376 | ||
4697a36c MM |
3377 | if (info->push_p) |
3378 | fprintf (stderr, "\tpush_p = %5d\n", info->push_p); | |
3379 | ||
3380 | if (info->calls_p) | |
3381 | fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); | |
3382 | ||
b6c9286a MM |
3383 | if (info->main_p) |
3384 | fprintf (stderr, "\tmain_p = %5d\n", info->main_p); | |
3385 | ||
3386 | if (info->main_save_p) | |
3387 | fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); | |
3388 | ||
802a0058 MM |
3389 | if (info->fpmem_p) |
3390 | fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); | |
3391 | ||
4697a36c MM |
3392 | if (info->gp_save_offset) |
3393 | fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); | |
3394 | ||
3395 | if (info->fp_save_offset) | |
3396 | fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); | |
3397 | ||
3398 | if (info->lr_save_offset) | |
3399 | fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); | |
3400 | ||
3401 | if (info->cr_save_offset) | |
3402 | fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); | |
3403 | ||
b6c9286a MM |
3404 | if (info->toc_save_offset) |
3405 | fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); | |
3406 | ||
4697a36c MM |
3407 | if (info->varargs_save_offset) |
3408 | fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); | |
3409 | ||
b6c9286a MM |
3410 | if (info->main_save_offset) |
3411 | fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); | |
3412 | ||
802a0058 MM |
3413 | if (info->fpmem_offset) |
3414 | fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); | |
3415 | ||
4697a36c MM |
3416 | if (info->total_size) |
3417 | fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); | |
3418 | ||
3419 | if (info->varargs_size) | |
3420 | fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); | |
3421 | ||
3422 | if (info->vars_size) | |
3423 | fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); | |
3424 | ||
3425 | if (info->parm_size) | |
3426 | fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); | |
3427 | ||
802a0058 MM |
3428 | if (info->fpmem_size) |
3429 | fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); | |
3430 | ||
4697a36c MM |
3431 | if (info->fixed_size) |
3432 | fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); | |
3433 | ||
3434 | if (info->gp_size) | |
3435 | fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); | |
3436 | ||
3437 | if (info->fp_size) | |
3438 | fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); | |
3439 | ||
b6c9286a MM |
3440 | if (info->lr_size) |
3441 | fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); | |
3442 | ||
4697a36c MM |
3443 | if (info->cr_size) |
3444 | fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); | |
3445 | ||
b6c9286a MM |
3446 | if (info->toc_size) |
3447 | fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); | |
3448 | ||
3449 | if (info->main_size) | |
3450 | fprintf (stderr, "\tmain_size = %5d\n", info->main_size); | |
3451 | ||
4697a36c MM |
3452 | if (info->save_size) |
3453 | fprintf (stderr, "\tsave_size = %5d\n", info->save_size); | |
3454 | ||
3455 | if (info->reg_size != 4) | |
3456 | fprintf (stderr, "\treg_size = %5d\n", info->reg_size); | |
3457 | ||
3458 | fprintf (stderr, "\n"); | |
9878760c | 3459 | } |
4697a36c | 3460 | \f |
c7ca610e RK |
3461 | /* Write out an instruction to load the TOC_TABLE address into register 30. |
3462 | This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is | |
3463 | a constant pool. */ | |
3464 | ||
3465 | void | |
38c1f2d7 | 3466 | rs6000_output_load_toc_table (file, reg) |
c7ca610e | 3467 | FILE *file; |
38c1f2d7 | 3468 | int reg; |
c7ca610e RK |
3469 | { |
3470 | char buf[256]; | |
3471 | ||
3472 | #ifdef USING_SVR4_H | |
3473 | if (TARGET_RELOCATABLE) | |
3474 | { | |
3475 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3476 | fprintf (file, "\tbl "); | |
3477 | assemble_name (file, buf); | |
3478 | fprintf (file, "\n"); | |
3479 | ||
38c1f2d7 MM |
3480 | /* possibly create the toc section */ |
3481 | if (!toc_initialized) | |
3482 | { | |
3483 | toc_section (); | |
3484 | function_section (current_function_decl); | |
3485 | } | |
3486 | ||
3487 | /* If not first call in this function, we need to put the | |
3488 | different between .LCTOC1 and the address we get to right | |
3489 | after the bl. It will mess up disassembling the instructions | |
3490 | but that can't be helped. We will later need to bias the | |
3491 | address before loading. */ | |
3492 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3493 | { | |
3494 | char *init_ptr = (TARGET_64BIT) ? ".quad" : ".long"; | |
3495 | char *buf_ptr; | |
3496 | ||
3497 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); | |
3498 | ||
3499 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
3500 | STRIP_NAME_ENCODING (buf_ptr, buf); | |
3501 | fprintf (file, "\t%s %s-", init_ptr, buf_ptr); | |
3502 | ||
3503 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3504 | fprintf (file, "%s\n", buf_ptr); | |
3505 | } | |
3506 | ||
c7ca610e | 3507 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); |
38c1f2d7 MM |
3508 | fprintf (file, "\tmflr %s\n", reg_names[reg]); |
3509 | ||
3510 | if (rs6000_pic_func_labelno != rs6000_pic_labelno) | |
3511 | { | |
3512 | if (TARGET_POWERPC64) | |
3513 | fprintf (file, "\taddi %s,%s,8\n", reg_names[reg], reg_names[reg]); | |
3514 | else if (TARGET_NEW_MNEMONICS) | |
3515 | fprintf (file, "\taddi %s,%s,4\n", reg_names[reg], reg_names[reg]); | |
3516 | else | |
3517 | fprintf (file, "\tcal %s,4(%s)\n", reg_names[reg], reg_names[reg]); | |
3518 | } | |
c7ca610e RK |
3519 | |
3520 | if (TARGET_POWERPC64) | |
3521 | fprintf (file, "\tld"); | |
3522 | else if (TARGET_NEW_MNEMONICS) | |
3523 | fprintf (file, "\tlwz"); | |
3524 | else | |
3525 | fprintf (file, "\tl"); | |
3526 | ||
3527 | fprintf (file, " %s,(", reg_names[0]); | |
38c1f2d7 | 3528 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); |
c7ca610e RK |
3529 | assemble_name (file, buf); |
3530 | fprintf (file, "-"); | |
3531 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); | |
3532 | assemble_name (file, buf); | |
38c1f2d7 | 3533 | fprintf (file, ")(%s)\n", reg_names[reg]); |
c7ca610e | 3534 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", |
38c1f2d7 | 3535 | reg_names[reg], reg_names[0], reg_names[reg]); |
c7ca610e RK |
3536 | rs6000_pic_labelno++; |
3537 | } | |
3538 | else if (!TARGET_64BIT) | |
3539 | { | |
3540 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); | |
38c1f2d7 | 3541 | asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[reg], reg_names[0]); |
c7ca610e RK |
3542 | assemble_name (file, buf); |
3543 | asm_fprintf (file, "@ha\n"); | |
3544 | if (TARGET_NEW_MNEMONICS) | |
3545 | { | |
38c1f2d7 | 3546 | asm_fprintf (file, "\taddi %s,%s,", reg_names[reg], reg_names[reg]); |
c7ca610e RK |
3547 | assemble_name (file, buf); |
3548 | asm_fprintf (file, "@l\n"); | |
3549 | } | |
3550 | else | |
3551 | { | |
38c1f2d7 | 3552 | asm_fprintf (file, "\tcal %s,", reg_names[reg]); |
c7ca610e | 3553 | assemble_name (file, buf); |
38c1f2d7 | 3554 | asm_fprintf (file, "@l(%s)\n", reg_names[reg]); |
c7ca610e RK |
3555 | } |
3556 | } | |
3557 | else | |
3558 | abort (); | |
3559 | ||
3560 | #else /* !USING_SVR4_H */ | |
3561 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); | |
38c1f2d7 | 3562 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[reg]); |
c7ca610e RK |
3563 | assemble_name (file, buf); |
3564 | asm_fprintf (file, "(%s)\n", reg_names[2]); | |
3565 | #endif /* USING_SVR4_H */ | |
3566 | } | |
3567 | ||
38c1f2d7 MM |
3568 | \f |
3569 | /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy | |
3570 | of the old frame is left in r12. */ | |
3571 | ||
3572 | void | |
3573 | rs6000_allocate_stack_space (file, size, copy_r12) | |
3574 | FILE *file; | |
3575 | int size; | |
3576 | int copy_r12; | |
3577 | { | |
3578 | int neg_size = -size; | |
3579 | if (TARGET_UPDATE) | |
3580 | { | |
3581 | if (size < 32767) | |
3582 | asm_fprintf (file, | |
3583 | (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", | |
3584 | reg_names[1], neg_size, reg_names[1]); | |
3585 | else | |
3586 | { | |
3587 | if (copy_r12) | |
3588 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3589 | ||
3590 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3591 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3592 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3593 | asm_fprintf (file, | |
3594 | (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", | |
3595 | reg_names[1], reg_names[1], reg_names[0]); | |
3596 | } | |
3597 | } | |
3598 | else | |
3599 | { | |
3600 | fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3601 | if (size < 32767) | |
3602 | { | |
3603 | if (TARGET_NEW_MNEMONICS) | |
3604 | fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], neg_size); | |
3605 | else | |
3606 | fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], neg_size, reg_names[1]); | |
3607 | } | |
3608 | else | |
3609 | { | |
3610 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3611 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3612 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
3613 | asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], | |
3614 | reg_names[0], reg_names[1]); | |
3615 | } | |
3616 | ||
3617 | asm_fprintf (file, | |
3618 | (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", | |
3619 | reg_names[12], reg_names[1]); | |
3620 | } | |
3621 | } | |
3622 | ||
3623 | \f | |
9878760c | 3624 | /* Write function prologue. */ |
9878760c RK |
3625 | void |
3626 | output_prolog (file, size) | |
3627 | FILE *file; | |
3628 | int size; | |
3629 | { | |
4697a36c | 3630 | rs6000_stack_t *info = rs6000_stack_info (); |
b6c9286a MM |
3631 | int reg_size = info->reg_size; |
3632 | char *store_reg; | |
3633 | char *load_reg; | |
979721f8 MM |
3634 | int sp_reg = 1; |
3635 | int sp_offset = 0; | |
b6c9286a | 3636 | |
8f802bfb | 3637 | if (TARGET_32BIT) |
b6c9286a | 3638 | { |
8f802bfb DE |
3639 | store_reg = "\t{st|stw} %s,%d(%s)\n"; |
3640 | load_reg = "\t{l|lwz} %s,%d(%s)\n"; | |
b6c9286a MM |
3641 | } |
3642 | else | |
3643 | { | |
8f802bfb DE |
3644 | store_reg = "\tstd %s,%d(%s)\n"; |
3645 | load_reg = "\tlld %s,%d(%s)\n"; | |
b6c9286a | 3646 | } |
9878760c | 3647 | |
4697a36c MM |
3648 | if (TARGET_DEBUG_STACK) |
3649 | debug_stack_info (info); | |
9878760c RK |
3650 | |
3651 | /* Write .extern for any function we will call to save and restore fp | |
3652 | values. */ | |
b6c9286a | 3653 | if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
4d30c363 | 3654 | fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", |
4697a36c MM |
3655 | SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, |
3656 | RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
9878760c RK |
3657 | |
3658 | /* Write .extern for truncation routines, if needed. */ | |
3659 | if (rs6000_trunc_used && ! trunc_defined) | |
3660 | { | |
e138174b ILT |
3661 | fprintf (file, "\t.extern .%s\n\t.extern .%s\n", |
3662 | RS6000_ITRUNC, RS6000_UITRUNC); | |
9878760c RK |
3663 | trunc_defined = 1; |
3664 | } | |
4697a36c | 3665 | |
c764f757 RK |
3666 | /* Write .extern for AIX common mode routines, if needed. */ |
3667 | if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) | |
3668 | { | |
f6709c70 JW |
3669 | fputs ("\t.extern __mulh\n", file); |
3670 | fputs ("\t.extern __mull\n", file); | |
3671 | fputs ("\t.extern __divss\n", file); | |
3672 | fputs ("\t.extern __divus\n", file); | |
3673 | fputs ("\t.extern __quoss\n", file); | |
3674 | fputs ("\t.extern __quous\n", file); | |
c764f757 RK |
3675 | common_mode_defined = 1; |
3676 | } | |
9878760c | 3677 | |
979721f8 | 3678 | /* For V.4, update stack before we do any saving and set back pointer. */ |
c81bebd7 | 3679 | if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) |
979721f8 MM |
3680 | { |
3681 | if (info->total_size < 32767) | |
38c1f2d7 | 3682 | sp_offset = info->total_size; |
979721f8 | 3683 | else |
38c1f2d7 MM |
3684 | sp_reg = 12; |
3685 | rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); | |
979721f8 MM |
3686 | } |
3687 | ||
9878760c | 3688 | /* If we use the link register, get it into r0. */ |
4697a36c MM |
3689 | if (info->lr_save_p) |
3690 | asm_fprintf (file, "\tmflr %s\n", reg_names[0]); | |
9878760c RK |
3691 | |
3692 | /* If we need to save CR, put it into r12. */ | |
979721f8 | 3693 | if (info->cr_save_p && sp_reg != 12) |
4697a36c | 3694 | asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); |
9878760c RK |
3695 | |
3696 | /* Do any required saving of fpr's. If only one or two to save, do it | |
53322b0c RK |
3697 | ourself. Otherwise, call function. Note that since they are statically |
3698 | linked, we do not need a nop following them. */ | |
4697a36c | 3699 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
bacbde18 | 3700 | { |
4697a36c | 3701 | int regno = info->first_fp_reg_save; |
979721f8 | 3702 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3703 | |
3704 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3705 | asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
bacbde18 | 3706 | } |
4697a36c MM |
3707 | else if (info->first_fp_reg_save != 64) |
3708 | asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, | |
3709 | info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); | |
9878760c RK |
3710 | |
3711 | /* Now save gpr's. */ | |
4697a36c | 3712 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3713 | { |
4697a36c | 3714 | int regno = info->first_gp_reg_save; |
979721f8 | 3715 | int loc = info->gp_save_offset + sp_offset; |
85638c0d | 3716 | |
4697a36c | 3717 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3718 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3719 | } |
3720 | ||
4697a36c MM |
3721 | else if (info->first_gp_reg_save != 32) |
3722 | asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", | |
3723 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3724 | info->gp_save_offset + sp_offset, |
3725 | reg_names[sp_reg]); | |
9878760c | 3726 | |
b6c9286a MM |
3727 | /* Save main's arguments if we need to call a function */ |
3728 | #ifdef NAME__MAIN | |
3729 | if (info->main_save_p) | |
3730 | { | |
3731 | int regno; | |
5ebfb2ba | 3732 | int loc = info->main_save_offset + sp_offset; |
b6c9286a MM |
3733 | int size = info->main_size; |
3734 | ||
3735 | for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size) | |
979721f8 | 3736 | asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); |
b6c9286a MM |
3737 | } |
3738 | #endif | |
3739 | ||
9878760c | 3740 | /* Save lr if we used it. */ |
4697a36c | 3741 | if (info->lr_save_p) |
979721f8 MM |
3742 | asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, |
3743 | reg_names[sp_reg]); | |
9878760c RK |
3744 | |
3745 | /* Save CR if we use any that must be preserved. */ | |
4697a36c | 3746 | if (info->cr_save_p) |
979721f8 MM |
3747 | { |
3748 | if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ | |
3749 | { | |
3750 | asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); | |
3751 | asm_fprintf (file, store_reg, reg_names[0], | |
3752 | info->cr_save_offset + sp_offset, | |
3753 | reg_names[sp_reg]); | |
3754 | } | |
3755 | else | |
3756 | asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, | |
3757 | reg_names[sp_reg]); | |
3758 | } | |
9878760c | 3759 | |
979721f8 MM |
3760 | /* NT needs us to probe the stack frame every 4k pages for large frames, so |
3761 | do it here. */ | |
3762 | if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) | |
3763 | { | |
3764 | if (info->total_size < 32768) | |
3765 | { | |
3766 | int probe_offset = 4096; | |
3767 | while (probe_offset < info->total_size) | |
3768 | { | |
3769 | asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); | |
3770 | probe_offset += 4096; | |
3771 | } | |
3772 | } | |
3773 | else | |
3774 | { | |
3775 | int probe_iterations = info->total_size / 4096; | |
3776 | static int probe_labelno = 0; | |
3777 | char buf[256]; | |
3778 | ||
3779 | if (probe_iterations < 32768) | |
3780 | asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); | |
3781 | else | |
3782 | { | |
3783 | asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); | |
3784 | if (probe_iterations & 0xffff) | |
3785 | asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], | |
3786 | probe_iterations & 0xffff); | |
3787 | } | |
3788 | asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); | |
3789 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); | |
3790 | ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); | |
3791 | asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); | |
2a50d6bc | 3792 | ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); |
979721f8 MM |
3793 | fputs ("\tbdnz ", file); |
3794 | assemble_name (file, buf); | |
3795 | fputs ("\n", file); | |
3796 | } | |
3797 | } | |
3798 | ||
38c1f2d7 | 3799 | /* Update stack and set back pointer unless this is V.4, which was done previously */ |
c81bebd7 | 3800 | if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) |
38c1f2d7 | 3801 | rs6000_allocate_stack_space (file, info->total_size, FALSE); |
9878760c RK |
3802 | |
3803 | /* Set frame pointer, if needed. */ | |
3804 | if (frame_pointer_needed) | |
4697a36c | 3805 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); |
1875cc88 | 3806 | |
b6c9286a MM |
3807 | #ifdef NAME__MAIN |
3808 | /* If we need to call a function to set things up for main, do so now | |
3809 | before dealing with the TOC. */ | |
3810 | if (info->main_p) | |
3811 | { | |
3812 | char *prefix = ""; | |
3813 | ||
3814 | switch (DEFAULT_ABI) | |
3815 | { | |
3816 | case ABI_AIX: prefix = "."; break; | |
3817 | case ABI_NT: prefix = ".."; break; | |
3818 | } | |
3819 | ||
3820 | fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); | |
3821 | #ifdef RS6000_CALL_GLUE2 | |
3822 | fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); | |
3823 | #else | |
3824 | #ifdef RS6000_CALL_GLUE | |
3825 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
3826 | fprintf (file, "\t%s\n", RS6000_CALL_GLUE); | |
3827 | #endif | |
3828 | #endif | |
3829 | ||
3830 | if (info->main_save_p) | |
3831 | { | |
3832 | int regno; | |
3833 | int loc; | |
3834 | int size = info->main_size; | |
3835 | ||
3836 | if (info->total_size < 32767) | |
3837 | { | |
3838 | loc = info->total_size + info->main_save_offset; | |
3839 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3840 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); | |
3841 | } | |
3842 | else | |
5ebfb2ba MM |
3843 | { |
3844 | int neg_size = info->main_save_offset - info->total_size; | |
3845 | loc = 0; | |
3846 | asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", | |
3847 | reg_names[0], (neg_size >> 16) & 0xffff, | |
3848 | reg_names[0], reg_names[0], neg_size & 0xffff); | |
979721f8 | 3849 | |
b6c9286a MM |
3850 | asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], |
3851 | reg_names[1]); | |
3852 | ||
3853 | for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size) | |
3854 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); | |
3855 | } | |
3856 | } | |
3857 | } | |
3858 | #endif | |
3859 | ||
3860 | ||
1875cc88 JW |
3861 | /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the |
3862 | TOC_TABLE address into register 30. */ | |
4697a36c | 3863 | if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) |
ab9eef41 MM |
3864 | { |
3865 | #ifdef USING_SVR4_H | |
38c1f2d7 MM |
3866 | if (!profile_flag) |
3867 | rs6000_pic_func_labelno = rs6000_pic_labelno; | |
ab9eef41 | 3868 | #endif |
38c1f2d7 | 3869 | rs6000_output_load_toc_table (file, 30); |
ab9eef41 | 3870 | } |
4697a36c | 3871 | |
b6c9286a MM |
3872 | if (DEFAULT_ABI == ABI_NT) |
3873 | { | |
3874 | assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
3875 | fputs (".b:\n", file); | |
3daf36a4 | 3876 | } |
9878760c RK |
3877 | } |
3878 | ||
3879 | /* Write function epilogue. */ | |
3880 | ||
3881 | void | |
3882 | output_epilog (file, size) | |
3883 | FILE *file; | |
3884 | int size; | |
3885 | { | |
4697a36c | 3886 | rs6000_stack_t *info = rs6000_stack_info (); |
8f802bfb | 3887 | char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; |
9878760c | 3888 | rtx insn = get_last_insn (); |
979721f8 MM |
3889 | int sp_reg = 1; |
3890 | int sp_offset = 0; | |
9878760c | 3891 | |
9878760c RK |
3892 | /* If the last insn was a BARRIER, we don't have to write anything except |
3893 | the trace table. */ | |
3894 | if (GET_CODE (insn) == NOTE) | |
3895 | insn = prev_nonnote_insn (insn); | |
3896 | if (insn == 0 || GET_CODE (insn) != BARRIER) | |
3897 | { | |
3898 | /* If we have a frame pointer, a call to alloca, or a large stack | |
3899 | frame, restore the old stack pointer using the backchain. Otherwise, | |
3900 | we know what size to update it with. */ | |
3901 | if (frame_pointer_needed || current_function_calls_alloca | |
4697a36c | 3902 | || info->total_size > 32767) |
979721f8 MM |
3903 | { |
3904 | /* Under V.4, don't reset the stack pointer until after we're done | |
3905 | loading the saved registers. */ | |
c81bebd7 | 3906 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3907 | sp_reg = 11; |
3908 | ||
3909 | asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); | |
3910 | } | |
4697a36c MM |
3911 | else if (info->push_p) |
3912 | { | |
c81bebd7 | 3913 | if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) |
979721f8 MM |
3914 | sp_offset = info->total_size; |
3915 | else if (TARGET_NEW_MNEMONICS) | |
4697a36c MM |
3916 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size); |
3917 | else | |
3918 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]); | |
3919 | } | |
9878760c | 3920 | |
b4ac57ab | 3921 | /* Get the old lr if we saved it. */ |
4697a36c | 3922 | if (info->lr_save_p) |
979721f8 | 3923 | asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c RK |
3924 | |
3925 | /* Get the old cr if we saved it. */ | |
4697a36c | 3926 | if (info->cr_save_p) |
979721f8 | 3927 | asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); |
9878760c | 3928 | |
b4ac57ab | 3929 | /* Set LR here to try to overlap restores below. */ |
4697a36c MM |
3930 | if (info->lr_save_p) |
3931 | asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); | |
b4ac57ab | 3932 | |
9878760c | 3933 | /* Restore gpr's. */ |
4697a36c | 3934 | if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) |
85638c0d | 3935 | { |
4697a36c | 3936 | int regno = info->first_gp_reg_save; |
979721f8 | 3937 | int loc = info->gp_save_offset + sp_offset; |
8f802bfb | 3938 | int reg_size = (TARGET_32BIT) ? 4 : 8; |
85638c0d | 3939 | |
4697a36c | 3940 | for ( ; regno < 32; regno++, loc += reg_size) |
979721f8 | 3941 | asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); |
85638c0d RK |
3942 | } |
3943 | ||
4697a36c MM |
3944 | else if (info->first_gp_reg_save != 32) |
3945 | asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", | |
3946 | reg_names[info->first_gp_reg_save], | |
979721f8 MM |
3947 | info->gp_save_offset + sp_offset, |
3948 | reg_names[sp_reg]); | |
9878760c | 3949 | |
b4ac57ab | 3950 | /* Restore fpr's if we can do it without calling a function. */ |
4697a36c MM |
3951 | if (FP_SAVE_INLINE (info->first_fp_reg_save)) |
3952 | { | |
3953 | int regno = info->first_fp_reg_save; | |
979721f8 | 3954 | int loc = info->fp_save_offset + sp_offset; |
4697a36c MM |
3955 | |
3956 | for ( ; regno < 64; regno++, loc += 8) | |
979721f8 | 3957 | asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); |
4697a36c | 3958 | } |
9878760c | 3959 | |
28edebac RK |
3960 | /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 |
3961 | that were used. */ | |
4697a36c MM |
3962 | if (info->cr_save_p) |
3963 | asm_fprintf (file, "\tmtcrf %d,%s\n", | |
85638c0d RK |
3964 | (regs_ever_live[70] != 0) * 0x20 |
3965 | + (regs_ever_live[71] != 0) * 0x10 | |
4697a36c | 3966 | + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); |
9878760c | 3967 | |
979721f8 MM |
3968 | /* If this is V.4, unwind the stack pointer after all of the loads have been done */ |
3969 | if (sp_offset) | |
3970 | { | |
3971 | if (TARGET_NEW_MNEMONICS) | |
3972 | asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset); | |
3973 | else | |
3974 | asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]); | |
3975 | } | |
3976 | else if (sp_reg != 1) | |
3977 | asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); | |
3978 | ||
b4ac57ab RS |
3979 | /* If we have to restore more than two FP registers, branch to the |
3980 | restore function. It will return to our caller. */ | |
4697a36c MM |
3981 | if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) |
3982 | asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, | |
3983 | info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); | |
b4ac57ab | 3984 | else |
85638c0d | 3985 | asm_fprintf (file, "\t{br|blr}\n"); |
9878760c | 3986 | } |
b4ac57ab | 3987 | |
9b30bae2 | 3988 | /* Output a traceback table here. See /usr/include/sys/debug.h for info |
314fc5a9 ILT |
3989 | on its format. |
3990 | ||
3991 | We don't output a traceback table if -finhibit-size-directive was | |
3992 | used. The documentation for -finhibit-size-directive reads | |
3993 | ``don't output a @code{.size} assembler directive, or anything | |
3994 | else that would cause trouble if the function is split in the | |
3995 | middle, and the two halves are placed at locations far apart in | |
3996 | memory.'' The traceback table has this property, since it | |
3997 | includes the offset from the start of the function to the | |
4d30c363 MM |
3998 | traceback table itself. |
3999 | ||
4000 | System V.4 Powerpc's (and the embedded ABI derived from it) use a | |
b6c9286a MM |
4001 | different traceback table. */ |
4002 | if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) | |
9b30bae2 | 4003 | { |
314fc5a9 ILT |
4004 | char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); |
4005 | int fixed_parms, float_parms, parm_info; | |
4006 | int i; | |
4007 | ||
b6c9286a MM |
4008 | while (*fname == '.') /* V.4 encodes . in the name */ |
4009 | fname++; | |
4010 | ||
314fc5a9 ILT |
4011 | /* Need label immediately before tbtab, so we can compute its offset |
4012 | from the function start. */ | |
4013 | if (*fname == '*') | |
4014 | ++fname; | |
4015 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); | |
4016 | ASM_OUTPUT_LABEL (file, fname); | |
4017 | ||
4018 | /* The .tbtab pseudo-op can only be used for the first eight | |
4019 | expressions, since it can't handle the possibly variable | |
4020 | length fields that follow. However, if you omit the optional | |
4021 | fields, the assembler outputs zeros for all optional fields | |
4022 | anyways, giving each variable length field is minimum length | |
4023 | (as defined in sys/debug.h). Thus we can not use the .tbtab | |
4024 | pseudo-op at all. */ | |
4025 | ||
4026 | /* An all-zero word flags the start of the tbtab, for debuggers | |
4027 | that have to find it by searching forward from the entry | |
4028 | point or from the current pc. */ | |
19d2d16f | 4029 | fputs ("\t.long 0\n", file); |
314fc5a9 ILT |
4030 | |
4031 | /* Tbtab format type. Use format type 0. */ | |
19d2d16f | 4032 | fputs ("\t.byte 0,", file); |
314fc5a9 ILT |
4033 | |
4034 | /* Language type. Unfortunately, there doesn't seem to be any | |
4035 | official way to get this info, so we use language_string. C | |
4036 | is 0. C++ is 9. No number defined for Obj-C, so use the | |
4037 | value for C for now. */ | |
4038 | if (! strcmp (language_string, "GNU C") | |
4039 | || ! strcmp (language_string, "GNU Obj-C")) | |
4040 | i = 0; | |
4041 | else if (! strcmp (language_string, "GNU F77")) | |
4042 | i = 1; | |
4043 | else if (! strcmp (language_string, "GNU Ada")) | |
4044 | i = 3; | |
8b83775b | 4045 | else if (! strcmp (language_string, "GNU Pascal")) |
314fc5a9 ILT |
4046 | i = 2; |
4047 | else if (! strcmp (language_string, "GNU C++")) | |
4048 | i = 9; | |
4049 | else | |
4050 | abort (); | |
4051 | fprintf (file, "%d,", i); | |
4052 | ||
4053 | /* 8 single bit fields: global linkage (not set for C extern linkage, | |
4054 | apparently a PL/I convention?), out-of-line epilogue/prologue, offset | |
4055 | from start of procedure stored in tbtab, internal function, function | |
4056 | has controlled storage, function has no toc, function uses fp, | |
4057 | function logs/aborts fp operations. */ | |
4058 | /* Assume that fp operations are used if any fp reg must be saved. */ | |
4697a36c | 4059 | fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); |
314fc5a9 ILT |
4060 | |
4061 | /* 6 bitfields: function is interrupt handler, name present in | |
4062 | proc table, function calls alloca, on condition directives | |
4063 | (controls stack walks, 3 bits), saves condition reg, saves | |
4064 | link reg. */ | |
4065 | /* The `function calls alloca' bit seems to be set whenever reg 31 is | |
4066 | set up as a frame pointer, even when there is no alloca call. */ | |
4067 | fprintf (file, "%d,", | |
4068 | ((1 << 6) | (frame_pointer_needed << 5) | |
4697a36c | 4069 | | (info->cr_save_p << 1) | (info->lr_save_p))); |
314fc5a9 ILT |
4070 | |
4071 | /* 3 bitfields: saves backchain, spare bit, number of fpr saved | |
4072 | (6 bits). */ | |
4073 | fprintf (file, "%d,", | |
4697a36c | 4074 | (info->push_p << 7) | (64 - info->first_fp_reg_save)); |
314fc5a9 ILT |
4075 | |
4076 | /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ | |
4077 | fprintf (file, "%d,", (32 - first_reg_to_save ())); | |
4078 | ||
4079 | { | |
4080 | /* Compute the parameter info from the function decl argument | |
4081 | list. */ | |
4082 | tree decl; | |
4083 | int next_parm_info_bit; | |
4084 | ||
4085 | next_parm_info_bit = 31; | |
4086 | parm_info = 0; | |
4087 | fixed_parms = 0; | |
4088 | float_parms = 0; | |
4089 | ||
4090 | for (decl = DECL_ARGUMENTS (current_function_decl); | |
4091 | decl; decl = TREE_CHAIN (decl)) | |
4092 | { | |
4093 | rtx parameter = DECL_INCOMING_RTL (decl); | |
4094 | enum machine_mode mode = GET_MODE (parameter); | |
4095 | ||
4096 | if (GET_CODE (parameter) == REG) | |
4097 | { | |
4098 | if (GET_MODE_CLASS (mode) == MODE_FLOAT) | |
4099 | { | |
4100 | int bits; | |
4101 | ||
4102 | float_parms++; | |
4103 | ||
4104 | if (mode == SFmode) | |
4105 | bits = 0x2; | |
4106 | else if (mode == DFmode) | |
4107 | bits = 0x3; | |
4108 | else | |
4109 | abort (); | |
4110 | ||
4111 | /* If only one bit will fit, don't or in this entry. */ | |
4112 | if (next_parm_info_bit > 0) | |
4113 | parm_info |= (bits << (next_parm_info_bit - 1)); | |
4114 | next_parm_info_bit -= 2; | |
4115 | } | |
4116 | else | |
4117 | { | |
4118 | fixed_parms += ((GET_MODE_SIZE (mode) | |
4119 | + (UNITS_PER_WORD - 1)) | |
4120 | / UNITS_PER_WORD); | |
4121 | next_parm_info_bit -= 1; | |
4122 | } | |
4123 | } | |
4124 | } | |
4125 | } | |
4126 | ||
4127 | /* Number of fixed point parameters. */ | |
4128 | /* This is actually the number of words of fixed point parameters; thus | |
4129 | an 8 byte struct counts as 2; and thus the maximum value is 8. */ | |
4130 | fprintf (file, "%d,", fixed_parms); | |
4131 | ||
4132 | /* 2 bitfields: number of floating point parameters (7 bits), parameters | |
4133 | all on stack. */ | |
4134 | /* This is actually the number of fp registers that hold parameters; | |
4135 | and thus the maximum value is 13. */ | |
4136 | /* Set parameters on stack bit if parameters are not in their original | |
4137 | registers, regardless of whether they are on the stack? Xlc | |
4138 | seems to set the bit when not optimizing. */ | |
4139 | fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); | |
4140 | ||
4141 | /* Optional fields follow. Some are variable length. */ | |
4142 | ||
4143 | /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, | |
4144 | 11 double float. */ | |
4145 | /* There is an entry for each parameter in a register, in the order that | |
4146 | they occur in the parameter list. Any intervening arguments on the | |
4147 | stack are ignored. If the list overflows a long (max possible length | |
4148 | 34 bits) then completely leave off all elements that don't fit. */ | |
4149 | /* Only emit this long if there was at least one parameter. */ | |
4150 | if (fixed_parms || float_parms) | |
4151 | fprintf (file, "\t.long %d\n", parm_info); | |
4152 | ||
4153 | /* Offset from start of code to tb table. */ | |
19d2d16f | 4154 | fputs ("\t.long ", file); |
314fc5a9 ILT |
4155 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); |
4156 | RS6000_OUTPUT_BASENAME (file, fname); | |
19d2d16f | 4157 | fputs ("-.", file); |
314fc5a9 | 4158 | RS6000_OUTPUT_BASENAME (file, fname); |
19d2d16f | 4159 | putc ('\n', file); |
314fc5a9 ILT |
4160 | |
4161 | /* Interrupt handler mask. */ | |
4162 | /* Omit this long, since we never set the interrupt handler bit | |
4163 | above. */ | |
4164 | ||
4165 | /* Number of CTL (controlled storage) anchors. */ | |
4166 | /* Omit this long, since the has_ctl bit is never set above. */ | |
4167 | ||
4168 | /* Displacement into stack of each CTL anchor. */ | |
4169 | /* Omit this list of longs, because there are no CTL anchors. */ | |
4170 | ||
4171 | /* Length of function name. */ | |
4172 | fprintf (file, "\t.short %d\n", strlen (fname)); | |
4173 | ||
4174 | /* Function name. */ | |
4175 | assemble_string (fname, strlen (fname)); | |
4176 | ||
4177 | /* Register for alloca automatic storage; this is always reg 31. | |
4178 | Only emit this if the alloca bit was set above. */ | |
4179 | if (frame_pointer_needed) | |
19d2d16f | 4180 | fputs ("\t.byte 31\n", file); |
9b30bae2 | 4181 | } |
4697a36c | 4182 | |
b6c9286a MM |
4183 | if (DEFAULT_ABI == ABI_NT) |
4184 | { | |
4185 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4186 | fputs (".e:\nFE_MOT_RESVD..", file); | |
4187 | RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); | |
4188 | fputs (":\n", file); | |
4189 | } | |
9878760c RK |
4190 | } |
4191 | \f | |
4192 | /* Output a TOC entry. We derive the entry name from what is | |
4193 | being written. */ | |
4194 | ||
4195 | void | |
4196 | output_toc (file, x, labelno) | |
4197 | FILE *file; | |
4198 | rtx x; | |
4199 | int labelno; | |
4200 | { | |
4201 | char buf[256]; | |
4202 | char *name = buf; | |
b6c9286a | 4203 | char *real_name; |
9878760c RK |
4204 | rtx base = x; |
4205 | int offset = 0; | |
4206 | ||
4697a36c MM |
4207 | if (TARGET_NO_TOC) |
4208 | abort (); | |
4209 | ||
ff1720ed RK |
4210 | /* if we're going to put a double constant in the TOC, make sure it's |
4211 | aligned properly when strict alignment is on. */ | |
4212 | if (GET_CODE (x) == CONST_DOUBLE | |
4213 | && STRICT_ALIGNMENT | |
4214 | && GET_MODE (x) == DFmode | |
4215 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { | |
4216 | ASM_OUTPUT_ALIGN (file, 3); | |
4217 | } | |
4218 | ||
4219 | ||
b6c9286a | 4220 | if (TARGET_ELF && TARGET_MINIMAL_TOC) |
d14a6d05 MM |
4221 | { |
4222 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); | |
4223 | fprintf (file, "%d = .-", labelno); | |
4224 | ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); | |
19d2d16f | 4225 | fputs ("1\n", file); |
d14a6d05 MM |
4226 | } |
4227 | else | |
d14a6d05 | 4228 | ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); |
9878760c | 4229 | |
37c37a57 RK |
4230 | /* Handle FP constants specially. Note that if we have a minimal |
4231 | TOC, things we put here aren't actually in the TOC, so we can allow | |
4232 | FP constants. */ | |
042259f2 | 4233 | if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode |
37c37a57 | 4234 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4235 | { |
042259f2 DE |
4236 | REAL_VALUE_TYPE rv; |
4237 | long k[2]; | |
0adc764e | 4238 | |
042259f2 DE |
4239 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4240 | REAL_VALUE_TO_TARGET_DOUBLE (rv, k); | |
1875cc88 | 4241 | if (TARGET_MINIMAL_TOC) |
042259f2 | 4242 | fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]); |
1875cc88 | 4243 | else |
0adc764e | 4244 | fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n", |
042259f2 | 4245 | k[0], k[1], k[0], k[1]); |
9878760c RK |
4246 | return; |
4247 | } | |
4248 | else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode | |
37c37a57 | 4249 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) |
9878760c | 4250 | { |
042259f2 DE |
4251 | REAL_VALUE_TYPE rv; |
4252 | long l; | |
9878760c | 4253 | |
042259f2 DE |
4254 | REAL_VALUE_FROM_CONST_DOUBLE (rv, x); |
4255 | REAL_VALUE_TO_TARGET_SINGLE (rv, l); | |
4256 | ||
4257 | if (TARGET_MINIMAL_TOC) | |
1883e716 | 4258 | fprintf (file, "\t.long %ld\n", l); |
042259f2 | 4259 | else |
1883e716 | 4260 | fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l); |
042259f2 DE |
4261 | return; |
4262 | } | |
4263 | else if (GET_MODE (x) == DImode | |
4264 | && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) | |
4265 | && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) | |
4266 | { | |
4267 | HOST_WIDE_INT low; | |
4268 | HOST_WIDE_INT high; | |
4269 | ||
4270 | if (GET_CODE (x) == CONST_DOUBLE) | |
4271 | { | |
4272 | low = CONST_DOUBLE_LOW (x); | |
4273 | high = CONST_DOUBLE_HIGH (x); | |
4274 | } | |
4275 | else | |
4276 | #if HOST_BITS_PER_WIDE_INT == 32 | |
4277 | { | |
4278 | low = INTVAL (x); | |
4279 | high = (low < 0) ? ~0 : 0; | |
4280 | } | |
4281 | #else | |
4282 | { | |
4283 | low = INTVAL (x) & 0xffffffff; | |
4284 | high = (HOST_WIDE_INT) INTVAL (x) >> 32; | |
4285 | } | |
4286 | #endif | |
9878760c | 4287 | |
1875cc88 | 4288 | if (TARGET_MINIMAL_TOC) |
1883e716 | 4289 | fprintf (file, "\t.long %ld\n\t.long %ld\n", (long)high, (long)low); |
1875cc88 | 4290 | else |
042259f2 | 4291 | fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", |
1883e716 | 4292 | (long)high, (long)low, (long)high, (long)low); |
9878760c RK |
4293 | return; |
4294 | } | |
4295 | ||
4296 | if (GET_CODE (x) == CONST) | |
4297 | { | |
4298 | base = XEXP (XEXP (x, 0), 0); | |
4299 | offset = INTVAL (XEXP (XEXP (x, 0), 1)); | |
4300 | } | |
4301 | ||
4302 | if (GET_CODE (base) == SYMBOL_REF) | |
4303 | name = XSTR (base, 0); | |
4304 | else if (GET_CODE (base) == LABEL_REF) | |
4305 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); | |
4306 | else if (GET_CODE (base) == CODE_LABEL) | |
4307 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); | |
4308 | else | |
4309 | abort (); | |
4310 | ||
2e4eb9b0 | 4311 | STRIP_NAME_ENCODING (real_name, name); |
1875cc88 | 4312 | if (TARGET_MINIMAL_TOC) |
19d2d16f | 4313 | fputs ("\t.long ", file); |
1875cc88 JW |
4314 | else |
4315 | { | |
b6c9286a | 4316 | fprintf (file, "\t.tc %s", real_name); |
9878760c | 4317 | |
1875cc88 JW |
4318 | if (offset < 0) |
4319 | fprintf (file, ".N%d", - offset); | |
4320 | else if (offset) | |
4321 | fprintf (file, ".P%d", offset); | |
9878760c | 4322 | |
19d2d16f | 4323 | fputs ("[TC],", file); |
1875cc88 | 4324 | } |
581bc4de MM |
4325 | |
4326 | /* Currently C++ toc references to vtables can be emitted before it | |
4327 | is decided whether the vtable is public or private. If this is | |
4328 | the case, then the linker will eventually complain that there is | |
4329 | a TOC reference to an unknown section. Thus, for vtables only, | |
4330 | we emit the TOC reference to reference the symbol and not the | |
4331 | section. */ | |
3807773b | 4332 | if (!strncmp ("_vt.", name, 4)) |
581bc4de | 4333 | { |
3807773b | 4334 | RS6000_OUTPUT_BASENAME (file, name); |
581bc4de MM |
4335 | if (offset < 0) |
4336 | fprintf (file, "%d", offset); | |
4337 | else if (offset > 0) | |
4338 | fprintf (file, "+%d", offset); | |
4339 | } | |
4340 | else | |
4341 | output_addr_const (file, x); | |
19d2d16f | 4342 | putc ('\n', file); |
9878760c RK |
4343 | } |
4344 | \f | |
4345 | /* Output an assembler pseudo-op to write an ASCII string of N characters | |
4346 | starting at P to FILE. | |
4347 | ||
4348 | On the RS/6000, we have to do this using the .byte operation and | |
4349 | write out special characters outside the quoted string. | |
4350 | Also, the assembler is broken; very long strings are truncated, | |
4351 | so we must artificially break them up early. */ | |
4352 | ||
4353 | void | |
4354 | output_ascii (file, p, n) | |
4355 | FILE *file; | |
4356 | char *p; | |
4357 | int n; | |
4358 | { | |
4359 | char c; | |
4360 | int i, count_string; | |
4361 | char *for_string = "\t.byte \""; | |
4362 | char *for_decimal = "\t.byte "; | |
4363 | char *to_close = NULL; | |
4364 | ||
4365 | count_string = 0; | |
4366 | for (i = 0; i < n; i++) | |
4367 | { | |
4368 | c = *p++; | |
4369 | if (c >= ' ' && c < 0177) | |
4370 | { | |
4371 | if (for_string) | |
4372 | fputs (for_string, file); | |
4373 | putc (c, file); | |
4374 | ||
4375 | /* Write two quotes to get one. */ | |
4376 | if (c == '"') | |
4377 | { | |
4378 | putc (c, file); | |
4379 | ++count_string; | |
4380 | } | |
4381 | ||
4382 | for_string = NULL; | |
4383 | for_decimal = "\"\n\t.byte "; | |
4384 | to_close = "\"\n"; | |
4385 | ++count_string; | |
4386 | ||
4387 | if (count_string >= 512) | |
4388 | { | |
4389 | fputs (to_close, file); | |
4390 | ||
4391 | for_string = "\t.byte \""; | |
4392 | for_decimal = "\t.byte "; | |
4393 | to_close = NULL; | |
4394 | count_string = 0; | |
4395 | } | |
4396 | } | |
4397 | else | |
4398 | { | |
4399 | if (for_decimal) | |
4400 | fputs (for_decimal, file); | |
4401 | fprintf (file, "%d", c); | |
4402 | ||
4403 | for_string = "\n\t.byte \""; | |
4404 | for_decimal = ", "; | |
4405 | to_close = "\n"; | |
4406 | count_string = 0; | |
4407 | } | |
4408 | } | |
4409 | ||
4410 | /* Now close the string if we have written one. Then end the line. */ | |
4411 | if (to_close) | |
4412 | fprintf (file, to_close); | |
4413 | } | |
4414 | \f | |
4415 | /* Generate a unique section name for FILENAME for a section type | |
4416 | represented by SECTION_DESC. Output goes into BUF. | |
4417 | ||
4418 | SECTION_DESC can be any string, as long as it is different for each | |
4419 | possible section type. | |
4420 | ||
4421 | We name the section in the same manner as xlc. The name begins with an | |
4422 | underscore followed by the filename (after stripping any leading directory | |
11e5fe42 RK |
4423 | names) with the last period replaced by the string SECTION_DESC. If |
4424 | FILENAME does not contain a period, SECTION_DESC is appended to the end of | |
4425 | the name. */ | |
9878760c RK |
4426 | |
4427 | void | |
4428 | rs6000_gen_section_name (buf, filename, section_desc) | |
4429 | char **buf; | |
4430 | char *filename; | |
4431 | char *section_desc; | |
4432 | { | |
11e5fe42 | 4433 | char *q, *after_last_slash, *last_period; |
9878760c RK |
4434 | char *p; |
4435 | int len; | |
9878760c RK |
4436 | |
4437 | after_last_slash = filename; | |
4438 | for (q = filename; *q; q++) | |
11e5fe42 RK |
4439 | { |
4440 | if (*q == '/') | |
4441 | after_last_slash = q + 1; | |
4442 | else if (*q == '.') | |
4443 | last_period = q; | |
4444 | } | |
9878760c | 4445 | |
11e5fe42 | 4446 | len = strlen (after_last_slash) + strlen (section_desc) + 2; |
9878760c RK |
4447 | *buf = (char *) permalloc (len); |
4448 | ||
4449 | p = *buf; | |
4450 | *p++ = '_'; | |
4451 | ||
4452 | for (q = after_last_slash; *q; q++) | |
4453 | { | |
11e5fe42 | 4454 | if (q == last_period) |
9878760c RK |
4455 | { |
4456 | strcpy (p, section_desc); | |
4457 | p += strlen (section_desc); | |
9878760c RK |
4458 | } |
4459 | ||
e9a780ec | 4460 | else if (ISALNUM (*q)) |
9878760c RK |
4461 | *p++ = *q; |
4462 | } | |
4463 | ||
11e5fe42 | 4464 | if (last_period == 0) |
9878760c RK |
4465 | strcpy (p, section_desc); |
4466 | else | |
4467 | *p = '\0'; | |
4468 | } | |
e165f3f0 RK |
4469 | \f |
4470 | /* Write function profiler code. */ | |
4471 | ||
4472 | void | |
4473 | output_function_profiler (file, labelno) | |
4474 | FILE *file; | |
4475 | int labelno; | |
4476 | { | |
4477 | /* The last used parameter register. */ | |
4478 | int last_parm_reg; | |
4479 | int i, j; | |
3daf36a4 | 4480 | char buf[100]; |
e165f3f0 | 4481 | |
3daf36a4 | 4482 | ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); |
38c1f2d7 | 4483 | switch (DEFAULT_ABI) |
3daf36a4 | 4484 | { |
38c1f2d7 MM |
4485 | default: |
4486 | abort (); | |
4487 | ||
4488 | case ABI_V4: | |
4489 | case ABI_SOLARIS: | |
4490 | case ABI_AIX_NODESC: | |
4491 | fprintf (file, "\tmflr %s\n", reg_names[0]); | |
4492 | if (flag_pic == 1) | |
4493 | { | |
4494 | fprintf (file, "\tbl _GLOBAL_OFFSET_TABLE_@local-4\n"); | |
034e84c4 MM |
4495 | fprintf (file, "\t%s %s,4(%s)\n", |
4496 | (TARGET_NEW_MNEMONICS) ? "stw" : "st", | |
4497 | reg_names[0], reg_names[1]); | |
38c1f2d7 MM |
4498 | fprintf (file, "\tmflr %s\n", reg_names[11]); |
4499 | fprintf (file, "\t%s %s,", (TARGET_NEW_MNEMONICS) ? "lwz" : "l", | |
034e84c4 | 4500 | reg_names[0]); |
38c1f2d7 MM |
4501 | assemble_name (file, buf); |
4502 | fprintf (file, "@got(%s)\n", reg_names[11]); | |
4503 | } | |
4504 | #if TARGET_ELF | |
4505 | else if (flag_pic > 1 || TARGET_RELOCATABLE) | |
4506 | { | |
034e84c4 MM |
4507 | fprintf (file, "\t%s %s,4(%s)\n", |
4508 | (TARGET_NEW_MNEMONICS) ? "stw" : "st", | |
4509 | reg_names[0], reg_names[1]); | |
38c1f2d7 MM |
4510 | rs6000_pic_func_labelno = rs6000_pic_labelno; |
4511 | rs6000_output_load_toc_table (file, 11); | |
4512 | fprintf (file, "\t%s %s,", (TARGET_NEW_MNEMONICS) ? "lwz" : "l", | |
4513 | reg_names[11]); | |
4514 | assemble_name (file, buf); | |
4515 | fprintf (file, "X(%s)\n", reg_names[11]); | |
034e84c4 MM |
4516 | fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); |
4517 | assemble_name (file, buf); | |
4518 | fprintf (file, "X = .-.LCTOC1\n"); | |
4519 | fprintf (file, "\t.long "); | |
4520 | assemble_name (file, buf); | |
4521 | fputs ("\n\t.previous\n", file); | |
38c1f2d7 MM |
4522 | } |
4523 | #endif | |
4524 | else if (TARGET_NEW_MNEMONICS) | |
4525 | { | |
4526 | fprintf (file, "\taddis %s,%s,", reg_names[11], reg_names[11]); | |
4527 | assemble_name (file, buf); | |
4528 | fprintf (file, "@ha\n"); | |
4529 | fprintf (file, "\tstw %s,4(%s)\n", reg_names[0], reg_names[1]); | |
034e84c4 | 4530 | fprintf (file, "\taddi %s,%s,", reg_names[0], reg_names[11]); |
38c1f2d7 MM |
4531 | assemble_name (file, buf); |
4532 | fputs ("@l\n", file); | |
4533 | } | |
4534 | else | |
4535 | { | |
4536 | fprintf (file, "\tcau %s,%s,", reg_names[11], reg_names[11]); | |
4537 | assemble_name (file, buf); | |
4538 | fprintf (file, "@ha\n"); | |
4539 | fprintf (file, "\tst %s,4(%s)\n", reg_names[0], reg_names[1]); | |
4540 | fprintf (file, "\tcal %s,", reg_names[11]); | |
4541 | assemble_name (file, buf); | |
4542 | fprintf (file, "@l(%s)\n", reg_names[11]); | |
4543 | } | |
4544 | ||
4545 | fprintf (file, "\tbl %s\n", RS6000_MCOUNT); | |
4546 | break; | |
4547 | ||
4548 | case ABI_AIX: | |
4549 | /* Set up a TOC entry for the profiler label. */ | |
4550 | toc_section (); | |
4551 | ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); | |
4552 | if (TARGET_MINIMAL_TOC) | |
4553 | { | |
4554 | fputs ("\t.long ", file); | |
4555 | assemble_name (file, buf); | |
4556 | putc ('\n', file); | |
4557 | } | |
4558 | else | |
4559 | { | |
4560 | fputs ("\t.tc\t", file); | |
4561 | assemble_name (file, buf); | |
4562 | fputs ("[TC],", file); | |
4563 | assemble_name (file, buf); | |
4564 | putc ('\n', file); | |
4565 | } | |
4566 | text_section (); | |
e165f3f0 RK |
4567 | |
4568 | /* Figure out last used parameter register. The proper thing to do is | |
4569 | to walk incoming args of the function. A function might have live | |
4570 | parameter registers even if it has no incoming args. */ | |
4571 | ||
38c1f2d7 MM |
4572 | for (last_parm_reg = 10; |
4573 | last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; | |
4574 | last_parm_reg--) | |
4575 | ; | |
e165f3f0 RK |
4576 | |
4577 | /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since | |
4578 | it might be set up as the frame pointer. */ | |
4579 | ||
38c1f2d7 MM |
4580 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
4581 | asm_fprintf (file, "\tmr %d,%d\n", j, i); | |
e165f3f0 RK |
4582 | |
4583 | /* Load location address into r3, and call mcount. */ | |
4584 | ||
38c1f2d7 MM |
4585 | ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); |
4586 | asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]); | |
4587 | assemble_name (file, buf); | |
4588 | asm_fprintf (file, "(%s)\n\tbl %s\n", reg_names[2], RS6000_MCOUNT); | |
e165f3f0 RK |
4589 | |
4590 | /* Restore parameter registers. */ | |
4591 | ||
38c1f2d7 MM |
4592 | for (i = 3, j = 30; i <= last_parm_reg; i++, j--) |
4593 | asm_fprintf (file, "\tmr %d,%d\n", i, j); | |
4594 | break; | |
4595 | } | |
e165f3f0 | 4596 | } |
a251ffd0 TG |
4597 | |
4598 | /* Adjust the cost of a scheduling dependency. Return the new cost of | |
4599 | a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ | |
4600 | ||
4601 | int | |
a06faf84 | 4602 | rs6000_adjust_cost (insn, link, dep_insn, cost) |
a251ffd0 TG |
4603 | rtx insn; |
4604 | rtx link; | |
4605 | rtx dep_insn; | |
4606 | int cost; | |
4607 | { | |
4608 | if (! recog_memoized (insn)) | |
4609 | return 0; | |
4610 | ||
4611 | if (REG_NOTE_KIND (link) != 0) | |
4612 | return 0; | |
4613 | ||
4614 | if (REG_NOTE_KIND (link) == 0) | |
4615 | { | |
4616 | /* Data dependency; DEP_INSN writes a register that INSN reads some | |
4617 | cycles later. */ | |
4618 | ||
4619 | /* Tell the first scheduling pass about the latency between a mtctr | |
4620 | and bctr (and mtlr and br/blr). The first scheduling pass will not | |
4621 | know about this latency since the mtctr instruction, which has the | |
4622 | latency associated to it, will be generated by reload. */ | |
4623 | if (get_attr_type (insn) == TYPE_JMPREG) | |
4624 | return TARGET_POWER ? 5 : 4; | |
4625 | ||
4626 | /* Fall out to return default cost. */ | |
4627 | } | |
4628 | ||
4629 | return cost; | |
4630 | } | |
b6c9286a MM |
4631 | |
4632 | /* Return how many instructions the machine can issue per cycle */ | |
4633 | int get_issue_rate() | |
4634 | { | |
4635 | switch (rs6000_cpu_attr) { | |
4636 | case CPU_RIOS1: | |
4637 | return 3; /* ? */ | |
4638 | case CPU_RIOS2: | |
4639 | return 4; | |
4640 | case CPU_PPC601: | |
4641 | return 3; /* ? */ | |
b6c9286a MM |
4642 | case CPU_PPC603: |
4643 | return 2; | |
4644 | case CPU_PPC604: | |
4645 | return 4; | |
4646 | case CPU_PPC620: | |
4647 | return 4; | |
4648 | default: | |
4649 | return 1; | |
4650 | } | |
4651 | } | |
4652 | ||
b6c9286a MM |
4653 | |
4654 | \f | |
4655 | /* Output assembler code for a block containing the constant parts | |
4656 | of a trampoline, leaving space for the variable parts. | |
4657 | ||
4658 | The trampoline should set the static chain pointer to value placed | |
4659 | into the trampoline and should branch to the specified routine. */ | |
4660 | ||
4661 | void | |
4662 | rs6000_trampoline_template (file) | |
4663 | FILE *file; | |
4664 | { | |
4665 | char *sc = reg_names[STATIC_CHAIN_REGNUM]; | |
4666 | char *r0 = reg_names[0]; | |
7c59dc5d | 4667 | char *r2 = reg_names[2]; |
b6c9286a MM |
4668 | |
4669 | switch (DEFAULT_ABI) | |
4670 | { | |
4671 | default: | |
4672 | abort (); | |
4673 | ||
4674 | /* Under AIX, this is not code at all, but merely a data area, | |
4675 | since that is the way all functions are called. The first word is | |
4676 | the address of the function, the second word is the TOC pointer (r2), | |
4677 | and the third word is the static chain value. */ | |
4678 | case ABI_AIX: | |
b6c9286a MM |
4679 | break; |
4680 | ||
4681 | ||
4682 | /* V.4/eabi function pointers are just a single pointer, so we need to | |
4683 | do the full gory code to load up the static chain. */ | |
4684 | case ABI_V4: | |
c81bebd7 | 4685 | case ABI_SOLARIS: |
b6c9286a | 4686 | case ABI_AIX_NODESC: |
b6c9286a MM |
4687 | break; |
4688 | ||
4689 | /* NT function pointers point to a two word area (real address, TOC) | |
4690 | which unfortunately does not include a static chain field. So we | |
7c59dc5d MM |
4691 | use the function field to point to ..LTRAMP1 and the toc field |
4692 | to point to the whole table. */ | |
b6c9286a | 4693 | case ABI_NT: |
7c59dc5d MM |
4694 | if (STATIC_CHAIN_REGNUM == 0 |
4695 | || STATIC_CHAIN_REGNUM == 2 | |
4696 | || TARGET_64BIT | |
4697 | || !TARGET_NEW_MNEMONICS) | |
b6c9286a MM |
4698 | abort (); |
4699 | ||
7c59dc5d MM |
4700 | fprintf (file, "\t.ualong 0\n"); /* offset 0 */ |
4701 | fprintf (file, "\t.ualong 0\n"); /* offset 4 */ | |
4702 | fprintf (file, "\t.ualong 0\n"); /* offset 8 */ | |
4703 | fprintf (file, "\t.ualong 0\n"); /* offset 12 */ | |
4704 | fprintf (file, "\t.ualong 0\n"); /* offset 16 */ | |
8bd04c56 | 4705 | fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ |
7c59dc5d MM |
4706 | fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ |
4707 | fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ | |
4708 | fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ | |
4709 | fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ | |
4710 | fprintf (file, "\tbctr\n"); /* offset 40 */ | |
b6c9286a MM |
4711 | break; |
4712 | } | |
4713 | ||
4714 | return; | |
4715 | } | |
4716 | ||
4717 | /* Length in units of the trampoline for entering a nested function. */ | |
4718 | ||
4719 | int | |
4720 | rs6000_trampoline_size () | |
4721 | { | |
4722 | int ret = 0; | |
4723 | ||
4724 | switch (DEFAULT_ABI) | |
4725 | { | |
4726 | default: | |
4727 | abort (); | |
4728 | ||
4729 | case ABI_AIX: | |
8f802bfb | 4730 | ret = (TARGET_32BIT) ? 12 : 24; |
b6c9286a MM |
4731 | break; |
4732 | ||
4733 | case ABI_V4: | |
c81bebd7 | 4734 | case ABI_SOLARIS: |
b6c9286a | 4735 | case ABI_AIX_NODESC: |
03a7e1a5 | 4736 | ret = (TARGET_32BIT) ? 40 : 48; |
b6c9286a MM |
4737 | break; |
4738 | ||
4739 | case ABI_NT: | |
7c59dc5d | 4740 | ret = 20; |
b6c9286a MM |
4741 | break; |
4742 | } | |
4743 | ||
4744 | return ret; | |
4745 | } | |
4746 | ||
4747 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
4748 | FNADDR is an RTX for the address of the function's pure code. | |
4749 | CXT is an RTX for the static chain value for the function. */ | |
4750 | ||
4751 | void | |
4752 | rs6000_initialize_trampoline (addr, fnaddr, cxt) | |
4753 | rtx addr; | |
4754 | rtx fnaddr; | |
4755 | rtx cxt; | |
4756 | { | |
ac2a93a1 | 4757 | enum machine_mode pmode = Pmode; |
8bd04c56 MM |
4758 | int regsize = (TARGET_32BIT) ? 4 : 8; |
4759 | rtx ctx_reg = force_reg (pmode, cxt); | |
b6c9286a MM |
4760 | |
4761 | switch (DEFAULT_ABI) | |
4762 | { | |
4763 | default: | |
4764 | abort (); | |
4765 | ||
8bd04c56 MM |
4766 | /* Macros to shorten the code expansions below. */ |
4767 | #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr)) | |
7c59dc5d MM |
4768 | #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset))) |
4769 | ||
b6c9286a MM |
4770 | /* Under AIX, just build the 3 word function descriptor */ |
4771 | case ABI_AIX: | |
8bd04c56 MM |
4772 | { |
4773 | rtx fn_reg = gen_reg_rtx (pmode); | |
4774 | rtx toc_reg = gen_reg_rtx (pmode); | |
4775 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4776 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); | |
4777 | emit_move_insn (MEM_DEREF (addr), fn_reg); | |
4778 | emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); | |
4779 | emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); | |
4780 | } | |
b6c9286a MM |
4781 | break; |
4782 | ||
eaf1bcf1 | 4783 | /* Under V.4/eabi, call __trampoline_setup to do the real work. */ |
b6c9286a | 4784 | case ABI_V4: |
c81bebd7 | 4785 | case ABI_SOLARIS: |
b6c9286a | 4786 | case ABI_AIX_NODESC: |
eaf1bcf1 MM |
4787 | emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"), |
4788 | FALSE, VOIDmode, 4, | |
4789 | addr, pmode, | |
4790 | GEN_INT (rs6000_trampoline_size ()), SImode, | |
4791 | fnaddr, pmode, | |
4792 | ctx_reg, pmode); | |
b6c9286a MM |
4793 | break; |
4794 | ||
8bd04c56 MM |
4795 | /* Under NT, update the first word to point to the ..LTRAMP1..0 header, |
4796 | the second word will point to the whole trampoline, third-fifth words | |
7c59dc5d | 4797 | will then have the real address, static chain, and toc value. */ |
b6c9286a | 4798 | case ABI_NT: |
8bd04c56 MM |
4799 | { |
4800 | rtx tramp_reg = gen_reg_rtx (pmode); | |
4801 | rtx fn_reg = gen_reg_rtx (pmode); | |
4802 | rtx toc_reg = gen_reg_rtx (pmode); | |
4803 | ||
4804 | emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0")); | |
4805 | addr = force_reg (pmode, addr); | |
4806 | emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); | |
4807 | emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); | |
4808 | emit_move_insn (MEM_DEREF (addr), tramp_reg); | |
4809 | emit_move_insn (MEM_PLUS (addr, regsize), addr); | |
4810 | emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); | |
4811 | emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); | |
4812 | emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2)); | |
4813 | } | |
b6c9286a MM |
4814 | break; |
4815 | } | |
4816 | ||
4817 | return; | |
4818 | } | |
7509c759 MM |
4819 | |
4820 | \f | |
4821 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4822 | with arguments ARGS is a valid machine specific attribute for DECL. | |
4823 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
4824 | ||
4825 | int | |
4826 | rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) | |
4827 | tree decl; | |
4828 | tree attributes; | |
4829 | tree identifier; | |
4830 | tree args; | |
4831 | { | |
4832 | return 0; | |
4833 | } | |
4834 | ||
4835 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
4836 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
4837 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
4838 | ||
4839 | int | |
4840 | rs6000_valid_type_attribute_p (type, attributes, identifier, args) | |
4841 | tree type; | |
4842 | tree attributes; | |
4843 | tree identifier; | |
4844 | tree args; | |
4845 | { | |
4846 | if (TREE_CODE (type) != FUNCTION_TYPE | |
4847 | && TREE_CODE (type) != FIELD_DECL | |
4848 | && TREE_CODE (type) != TYPE_DECL) | |
4849 | return 0; | |
4850 | ||
6a4cee5f MM |
4851 | /* Longcall attribute says that the function is not within 2**26 bytes |
4852 | of the current function, and to do an indirect call. */ | |
4853 | if (is_attribute_p ("longcall", identifier)) | |
4854 | return (args == NULL_TREE); | |
4855 | ||
7509c759 MM |
4856 | if (DEFAULT_ABI == ABI_NT) |
4857 | { | |
4858 | /* Stdcall attribute says callee is responsible for popping arguments | |
4859 | if they are not variable. */ | |
4860 | if (is_attribute_p ("stdcall", identifier)) | |
4861 | return (args == NULL_TREE); | |
4862 | ||
4863 | /* Cdecl attribute says the callee is a normal C declaration */ | |
4864 | if (is_attribute_p ("cdecl", identifier)) | |
4865 | return (args == NULL_TREE); | |
4866 | ||
38e01259 | 4867 | /* Dllimport attribute says the caller is to call the function |
7509c759 MM |
4868 | indirectly through a __imp_<name> pointer. */ |
4869 | if (is_attribute_p ("dllimport", identifier)) | |
4870 | return (args == NULL_TREE); | |
4871 | ||
38e01259 | 4872 | /* Dllexport attribute says the callee is to create a __imp_<name> |
7509c759 MM |
4873 | pointer. */ |
4874 | if (is_attribute_p ("dllexport", identifier)) | |
4875 | return (args == NULL_TREE); | |
e56bb9ed MM |
4876 | |
4877 | /* Exception attribute allows the user to specify 1-2 strings or identifiers | |
4878 | that will fill in the 3rd and 4th fields of the structured exception | |
4879 | table. */ | |
4880 | if (is_attribute_p ("exception", identifier)) | |
4881 | { | |
4882 | int i; | |
4883 | ||
4884 | if (args == NULL_TREE) | |
4885 | return 0; | |
4886 | ||
4887 | for (i = 0; i < 2 && args != NULL_TREE; i++) | |
4888 | { | |
4889 | tree this_arg = TREE_VALUE (args); | |
4890 | args = TREE_PURPOSE (args); | |
4891 | ||
4892 | if (TREE_CODE (this_arg) != STRING_CST | |
4893 | && TREE_CODE (this_arg) != IDENTIFIER_NODE) | |
4894 | return 0; | |
4895 | } | |
4896 | ||
4897 | return (args == NULL_TREE); | |
4898 | } | |
7509c759 MM |
4899 | } |
4900 | ||
4901 | return 0; | |
4902 | } | |
4903 | ||
4904 | /* If defined, a C expression whose value is zero if the attributes on | |
4905 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
4906 | two if they are nearly compatible (which causes a warning to be | |
4907 | generated). */ | |
4908 | ||
4909 | int | |
4910 | rs6000_comp_type_attributes (type1, type2) | |
4911 | tree type1; | |
4912 | tree type2; | |
4913 | { | |
4914 | return 1; | |
4915 | } | |
4916 | ||
4917 | /* If defined, a C statement that assigns default attributes to newly | |
4918 | defined TYPE. */ | |
4919 | ||
4920 | void | |
4921 | rs6000_set_default_type_attributes (type) | |
4922 | tree type; | |
4923 | { | |
4924 | } | |
4925 | ||
38e01259 | 4926 | /* Return a dll import reference corresponding to a call's SYMBOL_REF */ |
7509c759 MM |
4927 | struct rtx_def * |
4928 | rs6000_dll_import_ref (call_ref) | |
4929 | rtx call_ref; | |
4930 | { | |
4931 | char *call_name; | |
4932 | int len; | |
4933 | char *p; | |
4934 | rtx reg1, reg2; | |
4935 | tree node; | |
4936 | ||
4937 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4938 | abort (); | |
4939 | ||
4940 | call_name = XSTR (call_ref, 0); | |
4941 | len = sizeof ("__imp_") + strlen (call_name); | |
4942 | p = alloca (len); | |
4943 | reg2 = gen_reg_rtx (Pmode); | |
4944 | ||
4945 | strcpy (p, "__imp_"); | |
4946 | strcat (p, call_name); | |
4947 | node = get_identifier (p); | |
4948 | ||
4949 | reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node))); | |
4950 | emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1)); | |
4951 | ||
4952 | return reg2; | |
4953 | } | |
4954 | ||
6a4cee5f MM |
4955 | /* Return a reference suitable for calling a function with the longcall attribute. */ |
4956 | struct rtx_def * | |
4957 | rs6000_longcall_ref (call_ref) | |
4958 | rtx call_ref; | |
4959 | { | |
4960 | char *call_name; | |
6a4cee5f MM |
4961 | tree node; |
4962 | ||
4963 | if (GET_CODE (call_ref) != SYMBOL_REF) | |
4964 | return call_ref; | |
4965 | ||
4966 | /* System V adds '.' to the internal name, so skip them. */ | |
4967 | call_name = XSTR (call_ref, 0); | |
4968 | if (*call_name == '.') | |
4969 | { | |
4970 | while (*call_name == '.') | |
4971 | call_name++; | |
4972 | ||
4973 | node = get_identifier (call_name); | |
4974 | call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)); | |
4975 | } | |
4976 | ||
4977 | return force_reg (Pmode, call_ref); | |
4978 | } | |
4979 | ||
7509c759 MM |
4980 | \f |
4981 | /* A C statement or statements to switch to the appropriate section | |
4982 | for output of RTX in mode MODE. You can assume that RTX is some | |
4983 | kind of constant in RTL. The argument MODE is redundant except in | |
4984 | the case of a `const_int' rtx. Select the section by calling | |
4985 | `text_section' or one of the alternatives for other sections. | |
4986 | ||
4987 | Do not define this macro if you put all constants in the read-only | |
4988 | data section. */ | |
4989 | ||
4990 | #ifdef USING_SVR4_H | |
4991 | ||
4992 | void | |
4993 | rs6000_select_rtx_section (mode, x) | |
4994 | enum machine_mode mode; | |
4995 | rtx x; | |
4996 | { | |
4997 | if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) | |
4998 | toc_section (); | |
7509c759 MM |
4999 | else |
5000 | const_section (); | |
5001 | } | |
5002 | ||
5003 | /* A C statement or statements to switch to the appropriate | |
5004 | section for output of DECL. DECL is either a `VAR_DECL' node | |
5005 | or a constant of some sort. RELOC indicates whether forming | |
5006 | the initial value of DECL requires link-time relocations. */ | |
5007 | ||
5008 | void | |
5009 | rs6000_select_section (decl, reloc) | |
5010 | tree decl; | |
5011 | int reloc; | |
5012 | { | |
5013 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5014 | ||
5015 | if (TREE_CODE (decl) == STRING_CST) | |
5016 | { | |
88228c4b | 5017 | if (! flag_writable_strings) |
7509c759 | 5018 | const_section (); |
7509c759 MM |
5019 | else |
5020 | data_section (); | |
5021 | } | |
5022 | else if (TREE_CODE (decl) == VAR_DECL) | |
5023 | { | |
5024 | if ((flag_pic && reloc) | |
5025 | || !TREE_READONLY (decl) | |
5026 | || TREE_SIDE_EFFECTS (decl) | |
5027 | || !DECL_INITIAL (decl) | |
5028 | || (DECL_INITIAL (decl) != error_mark_node | |
5029 | && !TREE_CONSTANT (DECL_INITIAL (decl)))) | |
5030 | { | |
d9407988 | 5031 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
7509c759 MM |
5032 | sdata_section (); |
5033 | else | |
5034 | data_section (); | |
5035 | } | |
5036 | else | |
5037 | { | |
d9407988 | 5038 | if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) |
c81bebd7 | 5039 | { |
d9407988 | 5040 | if (rs6000_sdata == SDATA_EABI) |
c81bebd7 MM |
5041 | sdata2_section (); |
5042 | else | |
5043 | sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ | |
5044 | } | |
7509c759 MM |
5045 | else |
5046 | const_section (); | |
5047 | } | |
5048 | } | |
5049 | else | |
5050 | const_section (); | |
5051 | } | |
d9407988 MM |
5052 | |
5053 | \f | |
5054 | ||
5055 | /* If we are referencing a function that is static or is known to be | |
5056 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
5057 | that we can branch to this function without emitting a no-op after the | |
5058 | call. For real AIX and NT calling sequences, we also replace the | |
5059 | function name with the real name (1 or 2 leading .'s), rather than | |
5060 | the function descriptor name. This saves a lot of overriding code | |
5061 | to readd the prefixes. */ | |
5062 | ||
5063 | void | |
5064 | rs6000_encode_section_info (decl) | |
5065 | tree decl; | |
5066 | { | |
5067 | if (TREE_CODE (decl) == FUNCTION_DECL) | |
5068 | { | |
5069 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5070 | if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) | |
5071 | SYMBOL_REF_FLAG (sym_ref) = 1; | |
5072 | ||
5073 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) | |
5074 | { | |
5075 | char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; | |
5076 | char *str = permalloc (strlen (prefix) + 1 | |
5077 | + strlen (XSTR (sym_ref, 0))); | |
5078 | strcpy (str, prefix); | |
5079 | strcat (str, XSTR (sym_ref, 0)); | |
5080 | XSTR (sym_ref, 0) = str; | |
5081 | } | |
5082 | } | |
5083 | else if (rs6000_sdata != SDATA_NONE | |
5084 | && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) | |
5085 | && TREE_CODE (decl) == VAR_DECL) | |
5086 | { | |
5087 | int size = int_size_in_bytes (TREE_TYPE (decl)); | |
5088 | tree section_name = DECL_SECTION_NAME (decl); | |
5089 | char *name = (char *)0; | |
5090 | int len = 0; | |
5091 | ||
5092 | if (section_name) | |
5093 | { | |
5094 | if (TREE_CODE (section_name) == STRING_CST) | |
5095 | { | |
5096 | name = TREE_STRING_POINTER (section_name); | |
5097 | len = TREE_STRING_LENGTH (section_name); | |
5098 | } | |
5099 | else | |
5100 | abort (); | |
5101 | } | |
5102 | ||
5103 | if ((size > 0 && size <= g_switch_value) | |
5104 | || (name | |
5105 | && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) | |
5106 | || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) | |
5107 | || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) | |
5108 | || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) | |
5109 | || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) | |
5110 | || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) | |
5111 | { | |
5112 | rtx sym_ref = XEXP (DECL_RTL (decl), 0); | |
5113 | char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); | |
5114 | strcpy (str, "@"); | |
5115 | strcat (str, XSTR (sym_ref, 0)); | |
5116 | XSTR (sym_ref, 0) = str; | |
5117 | } | |
5118 | } | |
5119 | } | |
5120 | ||
7509c759 | 5121 | #endif /* USING_SVR4_H */ |