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f045b2c9 | 1 | /* Definitions of target machine for GNU compiler, for IBM RS/6000. |
34792e82 | 2 | Copyright (C) 1992, 93-8, 1999 Free Software Foundation, Inc. |
6a7ec0a7 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
f045b2c9 RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
f045b2c9 RS |
21 | |
22 | ||
23 | /* Note that some other tm.h files include this one and then override | |
24 | many of the definitions that relate to assembler syntax. */ | |
25 | ||
26 | ||
27 | /* Names to predefine in the preprocessor for this target machine. */ | |
28 | ||
a238cd8b | 29 | #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \ |
84b49fa7 | 30 | -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" |
f045b2c9 RS |
31 | |
32 | /* Print subsidiary information on the compiler version in use. */ | |
33 | #define TARGET_VERSION ; | |
34 | ||
8e3f41e7 MM |
35 | /* Default string to use for cpu if not specified. */ |
36 | #ifndef TARGET_CPU_DEFAULT | |
37 | #define TARGET_CPU_DEFAULT ((char *)0) | |
38 | #endif | |
39 | ||
fdaff8ba RS |
40 | /* Tell the assembler to assume that all undefined names are external. |
41 | ||
42 | Don't do this until the fixed IBM assembler is more generally available. | |
43 | When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, | |
44 | ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no | |
b4d6689b RK |
45 | longer be needed. Also, the extern declaration of mcount in ASM_FILE_START |
46 | will no longer be needed. */ | |
f045b2c9 | 47 | |
841faeed | 48 | /* #define ASM_SPEC "-u %(asm_cpu)" */ |
f045b2c9 | 49 | |
84b49fa7 RK |
50 | /* Define appropriate architecture macros for preprocessor depending on |
51 | target switches. */ | |
52 | ||
841faeed MM |
53 | #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_cpu)" |
54 | ||
956d6950 | 55 | /* Common CPP definitions used by CPP_SPEC among the various targets |
841faeed MM |
56 | for handling -mcpu=xxx switches. */ |
57 | #define CPP_CPU_SPEC \ | |
58 | "%{!mcpu*: \ | |
84b49fa7 RK |
59 | %{mpower: %{!mpower2: -D_ARCH_PWR}} \ |
60 | %{mpower2: -D_ARCH_PWR2} \ | |
61 | %{mpowerpc*: -D_ARCH_PPC} \ | |
62 | %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ | |
841faeed | 63 | %{!mno-power: %{!mpower2: %(cpp_default)}}} \ |
84b49fa7 RK |
64 | %{mcpu=common: -D_ARCH_COM} \ |
65 | %{mcpu=power: -D_ARCH_PWR} \ | |
8e3f41e7 | 66 | %{mcpu=power2: -D_ARCH_PWR2} \ |
84b49fa7 RK |
67 | %{mcpu=powerpc: -D_ARCH_PPC} \ |
68 | %{mcpu=rios: -D_ARCH_PWR} \ | |
69 | %{mcpu=rios1: -D_ARCH_PWR} \ | |
70 | %{mcpu=rios2: -D_ARCH_PWR2} \ | |
71 | %{mcpu=rsc: -D_ARCH_PWR} \ | |
72 | %{mcpu=rsc1: -D_ARCH_PWR} \ | |
b91d2c10 | 73 | %{mcpu=401: -D_ARCH_PPC} \ |
49a0b204 | 74 | %{mcpu=403: -D_ARCH_PPC} \ |
cf27b467 | 75 | %{mcpu=505: -D_ARCH_PPC} \ |
84b49fa7 | 76 | %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ |
841faeed | 77 | %{mcpu=602: -D_ARCH_PPC} \ |
fada905b MM |
78 | %{mcpu=603: -D_ARCH_PPC} \ |
79 | %{mcpu=603e: -D_ARCH_PPC} \ | |
b91d2c10 | 80 | %{mcpu=ec603e: -D_ARCH_PPC} \ |
fada905b | 81 | %{mcpu=604: -D_ARCH_PPC} \ |
b91d2c10 | 82 | %{mcpu=604e: -D_ARCH_PPC} \ |
cf27b467 | 83 | %{mcpu=620: -D_ARCH_PPC} \ |
bef84347 VM |
84 | %{mcpu=740: -D_ARCH_PPC} \ |
85 | %{mcpu=750: -D_ARCH_PPC} \ | |
86 | %{mcpu=801: -D_ARCH_PPC} \ | |
cf27b467 | 87 | %{mcpu=821: -D_ARCH_PPC} \ |
b91d2c10 | 88 | %{mcpu=823: -D_ARCH_PPC} \ |
cf27b467 | 89 | %{mcpu=860: -D_ARCH_PPC}" |
84b49fa7 | 90 | |
841faeed MM |
91 | #ifndef CPP_DEFAULT_SPEC |
92 | #define CPP_DEFAULT_SPEC "-D_ARCH_PWR" | |
93 | #endif | |
94 | ||
95 | #ifndef CPP_SYSV_SPEC | |
96 | #define CPP_SYSV_SPEC "" | |
97 | #endif | |
98 | ||
99 | #ifndef CPP_ENDIAN_SPEC | |
100 | #define CPP_ENDIAN_SPEC "" | |
101 | #endif | |
102 | ||
c81bebd7 MM |
103 | #ifndef CPP_ENDIAN_DEFAULT_SPEC |
104 | #define CPP_ENDIAN_DEFAULT_SPEC "" | |
105 | #endif | |
106 | ||
841faeed MM |
107 | #ifndef CPP_SYSV_DEFAULT_SPEC |
108 | #define CPP_SYSV_DEFAULT_SPEC "" | |
109 | #endif | |
110 | ||
956d6950 | 111 | /* Common ASM definitions used by ASM_SPEC among the various targets |
841faeed MM |
112 | for handling -mcpu=xxx switches. */ |
113 | #define ASM_CPU_SPEC \ | |
114 | "%{!mcpu*: \ | |
115 | %{mpower: %{!mpower2: -mpwr}} \ | |
116 | %{mpower2: -mpwrx} \ | |
117 | %{mpowerpc*: -mppc} \ | |
118 | %{mno-power: %{!mpowerpc*: -mcom}} \ | |
119 | %{!mno-power: %{!mpower2: %(asm_default)}}} \ | |
120 | %{mcpu=common: -mcom} \ | |
121 | %{mcpu=power: -mpwr} \ | |
122 | %{mcpu=power2: -mpwrx} \ | |
123 | %{mcpu=powerpc: -mppc} \ | |
124 | %{mcpu=rios: -mpwr} \ | |
125 | %{mcpu=rios1: -mpwr} \ | |
126 | %{mcpu=rios2: -mpwrx} \ | |
127 | %{mcpu=rsc: -mpwr} \ | |
128 | %{mcpu=rsc1: -mpwr} \ | |
b91d2c10 | 129 | %{mcpu=401: -mppc} \ |
841faeed MM |
130 | %{mcpu=403: -mppc} \ |
131 | %{mcpu=505: -mppc} \ | |
132 | %{mcpu=601: -m601} \ | |
133 | %{mcpu=602: -mppc} \ | |
134 | %{mcpu=603: -mppc} \ | |
135 | %{mcpu=603e: -mppc} \ | |
b91d2c10 | 136 | %{mcpu=ec603e: -mppc} \ |
841faeed | 137 | %{mcpu=604: -mppc} \ |
b91d2c10 | 138 | %{mcpu=604e: -mppc} \ |
841faeed | 139 | %{mcpu=620: -mppc} \ |
bef84347 VM |
140 | %{mcpu=740: -mppc} \ |
141 | %{mcpu=750: -mppc} \ | |
142 | %{mcpu=801: -mppc} \ | |
841faeed | 143 | %{mcpu=821: -mppc} \ |
b91d2c10 | 144 | %{mcpu=823: -mppc} \ |
841faeed MM |
145 | %{mcpu=860: -mppc}" |
146 | ||
147 | #ifndef ASM_DEFAULT_SPEC | |
fba29a8c | 148 | #define ASM_DEFAULT_SPEC "" |
841faeed MM |
149 | #endif |
150 | ||
151 | /* This macro defines names of additional specifications to put in the specs | |
152 | that can be used in various specifications like CC1_SPEC. Its definition | |
153 | is an initializer with a subgrouping for each command option. | |
154 | ||
155 | Each subgrouping contains a string constant, that defines the | |
156 | specification name, and a string constant that used by the GNU CC driver | |
157 | program. | |
158 | ||
159 | Do not define this macro if it does not need to do anything. */ | |
160 | ||
7509c759 MM |
161 | #ifndef SUBTARGET_EXTRA_SPECS |
162 | #define SUBTARGET_EXTRA_SPECS | |
163 | #endif | |
164 | ||
c81bebd7 MM |
165 | #define EXTRA_SPECS \ |
166 | { "cpp_cpu", CPP_CPU_SPEC }, \ | |
167 | { "cpp_default", CPP_DEFAULT_SPEC }, \ | |
168 | { "cpp_sysv", CPP_SYSV_SPEC }, \ | |
169 | { "cpp_sysv_default", CPP_SYSV_DEFAULT_SPEC }, \ | |
170 | { "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC }, \ | |
171 | { "cpp_endian", CPP_ENDIAN_SPEC }, \ | |
172 | { "asm_cpu", ASM_CPU_SPEC }, \ | |
173 | { "asm_default", ASM_DEFAULT_SPEC }, \ | |
174 | { "link_syscalls", LINK_SYSCALLS_SPEC }, \ | |
175 | { "link_libg", LINK_LIBG_SPEC }, \ | |
7509c759 MM |
176 | SUBTARGET_EXTRA_SPECS |
177 | ||
7509c759 MM |
178 | /* Default location of syscalls.exp under AIX */ |
179 | #ifndef CROSS_COMPILE | |
180 | #define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp" | |
181 | #else | |
182 | #define LINK_SYSCALLS_SPEC "" | |
183 | #endif | |
184 | ||
185 | /* Default location of libg.exp under AIX */ | |
186 | #ifndef CROSS_COMPILE | |
187 | #define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp" | |
188 | #else | |
189 | #define LINK_LIBG_SPEC "" | |
190 | #endif | |
191 | ||
f045b2c9 RS |
192 | /* Define the options for the binder: Start text at 512, align all segments |
193 | to 512 bytes, and warn if there is text relocation. | |
194 | ||
195 | The -bhalt:4 option supposedly changes the level at which ld will abort, | |
196 | but it also suppresses warnings about multiply defined symbols and is | |
197 | used by the AIX cc command. So we use it here. | |
198 | ||
199 | -bnodelcsect undoes a poor choice of default relating to multiply-defined | |
52c0eaf8 JM |
200 | csects. See AIX documentation for more information about this. |
201 | ||
202 | -bM:SRE tells the linker that the output file is Shared REusable. Note | |
203 | that to actually build a shared library you will also need to specify an | |
204 | export list with the -Wl,-bE option. */ | |
f045b2c9 | 205 | |
c1950f1c | 206 | #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ |
7509c759 MM |
207 | %{static:-bnso %(link_syscalls) } \ |
208 | %{!shared:%{g*: %(link_libg) }} %{shared:-bM:SRE}" | |
f045b2c9 | 209 | |
58a39e45 RS |
210 | /* Profiled library versions are used by linking with special directories. */ |
211 | #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ | |
788d9012 | 212 | %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc" |
f045b2c9 RS |
213 | |
214 | /* gcc must do the search itself to find libgcc.a, not use -l. */ | |
046b1537 | 215 | #define LIBGCC_SPEC "libgcc.a%s" |
f045b2c9 RS |
216 | |
217 | /* Don't turn -B into -L if the argument specifies a relative file name. */ | |
218 | #define RELATIVE_PREFIX_NOT_LINKDIR | |
219 | ||
fb623df5 | 220 | /* Architecture type. */ |
f045b2c9 | 221 | |
fb623df5 RK |
222 | extern int target_flags; |
223 | ||
224 | /* Use POWER architecture instructions and MQ register. */ | |
38c1f2d7 | 225 | #define MASK_POWER 0x00000001 |
fb623df5 | 226 | |
6febd581 | 227 | /* Use POWER2 extensions to POWER architecture. */ |
38c1f2d7 | 228 | #define MASK_POWER2 0x00000002 |
6febd581 | 229 | |
fb623df5 | 230 | /* Use PowerPC architecture instructions. */ |
38c1f2d7 | 231 | #define MASK_POWERPC 0x00000004 |
6febd581 | 232 | |
583cf4db | 233 | /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ |
38c1f2d7 | 234 | #define MASK_PPC_GPOPT 0x00000008 |
583cf4db RK |
235 | |
236 | /* Use PowerPC Graphics group optional instructions, e.g. fsel. */ | |
38c1f2d7 | 237 | #define MASK_PPC_GFXOPT 0x00000010 |
f045b2c9 | 238 | |
fb623df5 | 239 | /* Use PowerPC-64 architecture instructions. */ |
38c1f2d7 | 240 | #define MASK_POWERPC64 0x00000020 |
f045b2c9 | 241 | |
fb623df5 | 242 | /* Use revised mnemonic names defined for PowerPC architecture. */ |
38c1f2d7 | 243 | #define MASK_NEW_MNEMONICS 0x00000040 |
fb623df5 RK |
244 | |
245 | /* Disable placing fp constants in the TOC; can be turned on when the | |
246 | TOC overflows. */ | |
38c1f2d7 | 247 | #define MASK_NO_FP_IN_TOC 0x00000080 |
fb623df5 | 248 | |
0b9ccabc RK |
249 | /* Disable placing symbol+offset constants in the TOC; can be turned on when |
250 | the TOC overflows. */ | |
38c1f2d7 | 251 | #define MASK_NO_SUM_IN_TOC 0x00000100 |
0b9ccabc | 252 | |
fb623df5 | 253 | /* Output only one TOC entry per module. Normally linking fails if |
642a35f1 JW |
254 | there are more than 16K unique variables/constants in an executable. With |
255 | this option, linking fails only if there are more than 16K modules, or | |
256 | if there are more than 16K unique variables/constant in a single module. | |
257 | ||
258 | This is at the cost of having 2 extra loads and one extra store per | |
956d6950 | 259 | function, and one less allocable register. */ |
38c1f2d7 | 260 | #define MASK_MINIMAL_TOC 0x00000200 |
642a35f1 | 261 | |
9e654916 | 262 | /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */ |
38c1f2d7 | 263 | #define MASK_64BIT 0x00000400 |
9e654916 | 264 | |
f85f4585 | 265 | /* Disable use of FPRs. */ |
38c1f2d7 | 266 | #define MASK_SOFT_FLOAT 0x00000800 |
f85f4585 | 267 | |
4d30c363 | 268 | /* Enable load/store multiple, even on powerpc */ |
38c1f2d7 MM |
269 | #define MASK_MULTIPLE 0x00001000 |
270 | #define MASK_MULTIPLE_SET 0x00002000 | |
4d30c363 | 271 | |
7e69e155 | 272 | /* Use string instructions for block moves */ |
38c1f2d7 MM |
273 | #define MASK_STRING 0x00004000 |
274 | #define MASK_STRING_SET 0x00008000 | |
7e69e155 | 275 | |
38c1f2d7 MM |
276 | /* Disable update form of load/store */ |
277 | #define MASK_NO_UPDATE 0x00010000 | |
278 | ||
279 | /* Disable fused multiply/add operations */ | |
280 | #define MASK_NO_FUSED_MADD 0x00020000 | |
4697a36c | 281 | |
7e69e155 MM |
282 | #define TARGET_POWER (target_flags & MASK_POWER) |
283 | #define TARGET_POWER2 (target_flags & MASK_POWER2) | |
284 | #define TARGET_POWERPC (target_flags & MASK_POWERPC) | |
285 | #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) | |
286 | #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) | |
287 | #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) | |
288 | #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) | |
289 | #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) | |
290 | #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) | |
291 | #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) | |
292 | #define TARGET_64BIT (target_flags & MASK_64BIT) | |
293 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
294 | #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE) | |
295 | #define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET) | |
296 | #define TARGET_STRING (target_flags & MASK_STRING) | |
938937d8 | 297 | #define TARGET_STRING_SET (target_flags & MASK_STRING_SET) |
38c1f2d7 MM |
298 | #define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE) |
299 | #define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD) | |
7e69e155 | 300 | |
2f3e5814 | 301 | #define TARGET_32BIT (! TARGET_64BIT) |
7e69e155 | 302 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) |
38c1f2d7 MM |
303 | #define TARGET_UPDATE (! TARGET_NO_UPDATE) |
304 | #define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD) | |
d14a6d05 | 305 | |
4697a36c MM |
306 | /* Pseudo target to indicate whether the object format is ELF |
307 | (to get around not having conditional compilation in the md file) */ | |
308 | #ifndef TARGET_ELF | |
309 | #define TARGET_ELF 0 | |
310 | #endif | |
311 | ||
312 | /* If this isn't V.4, don't support -mno-toc. */ | |
313 | #ifndef TARGET_NO_TOC | |
314 | #define TARGET_NO_TOC 0 | |
315 | #define TARGET_TOC 1 | |
316 | #endif | |
317 | ||
b6c9286a MM |
318 | /* Pseudo target to say whether this is Windows NT */ |
319 | #ifndef TARGET_WINDOWS_NT | |
320 | #define TARGET_WINDOWS_NT 0 | |
321 | #endif | |
322 | ||
323 | /* Pseudo target to say whether this is MAC */ | |
324 | #ifndef TARGET_MACOS | |
325 | #define TARGET_MACOS 0 | |
326 | #endif | |
327 | ||
328 | /* Pseudo target to say whether this is AIX */ | |
329 | #ifndef TARGET_AIX | |
330 | #if (TARGET_ELF || TARGET_WINDOWS_NT || TARGET_MACOS) | |
331 | #define TARGET_AIX 0 | |
332 | #else | |
333 | #define TARGET_AIX 1 | |
334 | #endif | |
335 | #endif | |
336 | ||
a3950905 MM |
337 | #ifndef TARGET_XL_CALL |
338 | #define TARGET_XL_CALL 0 | |
339 | #endif | |
340 | ||
fb623df5 | 341 | /* Run-time compilation parameters selecting different hardware subsets. |
f045b2c9 | 342 | |
fb623df5 | 343 | Macro to define tables used to set the flags. |
f045b2c9 RS |
344 | This is a list in braces of pairs in braces, |
345 | each pair being { "NAME", VALUE } | |
346 | where VALUE is the bits to set or minus the bits to clear. | |
347 | An empty string NAME is used to identify the default VALUE. */ | |
348 | ||
4d30c363 MM |
349 | /* This is meant to be redefined in the host dependent files */ |
350 | #ifndef SUBTARGET_SWITCHES | |
351 | #define SUBTARGET_SWITCHES | |
352 | #endif | |
353 | ||
938937d8 MM |
354 | #define TARGET_SWITCHES \ |
355 | {{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING}, \ | |
356 | {"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \ | |
357 | | MASK_POWER2)}, \ | |
358 | {"no-power2", - MASK_POWER2}, \ | |
359 | {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \ | |
360 | | MASK_STRING)}, \ | |
361 | {"powerpc", MASK_POWERPC}, \ | |
362 | {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ | |
363 | | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \ | |
364 | {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \ | |
365 | {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \ | |
366 | {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \ | |
367 | {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \ | |
a260abc9 DE |
368 | {"powerpc64", MASK_POWERPC64}, \ |
369 | {"no-powerpc64", - MASK_POWERPC64}, \ | |
938937d8 MM |
370 | {"new-mnemonics", MASK_NEW_MNEMONICS}, \ |
371 | {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ | |
372 | {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ | |
373 | | MASK_MINIMAL_TOC)}, \ | |
374 | {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ | |
375 | {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ | |
376 | {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ | |
377 | {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ | |
378 | {"minimal-toc", MASK_MINIMAL_TOC}, \ | |
379 | {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ | |
380 | {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ | |
381 | {"hard-float", - MASK_SOFT_FLOAT}, \ | |
382 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
383 | {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \ | |
384 | {"no-multiple", - MASK_MULTIPLE}, \ | |
385 | {"no-multiple", MASK_MULTIPLE_SET}, \ | |
386 | {"string", MASK_STRING | MASK_STRING_SET}, \ | |
387 | {"no-string", - MASK_STRING}, \ | |
bbdd88df | 388 | {"no-string", MASK_STRING_SET}, \ |
38c1f2d7 MM |
389 | {"update", - MASK_NO_UPDATE}, \ |
390 | {"no-update", MASK_NO_UPDATE}, \ | |
391 | {"fused-madd", - MASK_NO_FUSED_MADD}, \ | |
392 | {"no-fused-madd", MASK_NO_FUSED_MADD}, \ | |
938937d8 | 393 | SUBTARGET_SWITCHES \ |
fb623df5 RK |
394 | {"", TARGET_DEFAULT}} |
395 | ||
938937d8 | 396 | #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING) |
fb623df5 | 397 | |
cac8ce95 | 398 | /* Processor type. Order must match cpu attribute in MD file. */ |
fb623df5 | 399 | enum processor_type |
bef84347 VM |
400 | { |
401 | PROCESSOR_RIOS1, | |
402 | PROCESSOR_RIOS2, | |
403 | PROCESSOR_MPCCORE, | |
404 | PROCESSOR_PPC403, | |
405 | PROCESSOR_PPC601, | |
406 | PROCESSOR_PPC603, | |
407 | PROCESSOR_PPC604, | |
408 | PROCESSOR_PPC604e, | |
409 | PROCESSOR_PPC620, | |
410 | PROCESSOR_PPC750 | |
411 | }; | |
fb623df5 RK |
412 | |
413 | extern enum processor_type rs6000_cpu; | |
414 | ||
415 | /* Recast the processor type to the cpu attribute. */ | |
416 | #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) | |
417 | ||
8482e358 | 418 | /* Define generic processor types based upon current deployment. */ |
8e3f41e7 | 419 | #define PROCESSOR_COMMON PROCESSOR_PPC601 |
8482e358 | 420 | #define PROCESSOR_POWER PROCESSOR_RIOS1 |
8e3f41e7 | 421 | #define PROCESSOR_POWERPC PROCESSOR_PPC604 |
6e151478 | 422 | |
fb623df5 | 423 | /* Define the default processor. This is overridden by other tm.h files. */ |
f86fe1fb | 424 | #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 |
fb623df5 | 425 | |
6febd581 RK |
426 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
427 | and the old mnemonics are dialect zero. */ | |
428 | #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 | |
429 | ||
fb623df5 RK |
430 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
431 | command options that have values. Its definition is an | |
432 | initializer with a subgrouping for each command option. | |
433 | ||
434 | Each subgrouping contains a string constant, that defines the | |
435 | fixed part of the option name, and the address of a variable. | |
436 | The variable, type `char *', is set to the variable part of the | |
437 | given option if the fixed part matches. The actual option name | |
438 | is made by appending `-m' to the specified name. | |
439 | ||
440 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
441 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
442 | will be set to the string `"512"'. | |
443 | ||
444 | extern char *m88k_short_data; | |
445 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
446 | ||
956d6950 | 447 | /* This is meant to be overridden in target specific files. */ |
b6c9286a MM |
448 | #ifndef SUBTARGET_OPTIONS |
449 | #define SUBTARGET_OPTIONS | |
450 | #endif | |
451 | ||
8e3f41e7 MM |
452 | #define TARGET_OPTIONS \ |
453 | { \ | |
454 | {"cpu=", &rs6000_select[1].string}, \ | |
455 | {"tune=", &rs6000_select[2].string}, \ | |
38c1f2d7 MM |
456 | {"debug-", &rs6000_debug_name}, \ |
457 | {"debug=", &rs6000_debug_name}, \ | |
8e3f41e7 | 458 | SUBTARGET_OPTIONS \ |
b6c9286a | 459 | } |
fb623df5 | 460 | |
ff222560 | 461 | /* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */ |
8e3f41e7 MM |
462 | struct rs6000_cpu_select |
463 | { | |
815cdc52 MM |
464 | const char *string; |
465 | const char *name; | |
8e3f41e7 MM |
466 | int set_tune_p; |
467 | int set_arch_p; | |
468 | }; | |
469 | ||
470 | extern struct rs6000_cpu_select rs6000_select[]; | |
fb623df5 | 471 | |
38c1f2d7 | 472 | /* Debug support */ |
815cdc52 | 473 | extern const char *rs6000_debug_name; /* Name for -mdebug-xxxx option */ |
38c1f2d7 MM |
474 | extern int rs6000_debug_stack; /* debug stack applications */ |
475 | extern int rs6000_debug_arg; /* debug argument handling */ | |
476 | ||
477 | #define TARGET_DEBUG_STACK rs6000_debug_stack | |
478 | #define TARGET_DEBUG_ARG rs6000_debug_arg | |
479 | ||
fb623df5 RK |
480 | /* Sometimes certain combinations of command options do not make sense |
481 | on a particular target machine. You can define a macro | |
482 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
483 | defined, is executed once just after all the command options have | |
484 | been parsed. | |
485 | ||
5accd822 DE |
486 | Don't use this macro to turn on various extra optimizations for |
487 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. | |
488 | ||
fb623df5 RK |
489 | On the RS/6000 this is used to define the target cpu type. */ |
490 | ||
8e3f41e7 | 491 | #define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT) |
f045b2c9 | 492 | |
5accd822 DE |
493 | /* Define this to change the optimizations performed by default. */ |
494 | #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) | |
495 | ||
496 | ||
4f074454 RK |
497 | /* Show we can debug even without a frame pointer. */ |
498 | #define CAN_DEBUG_WITHOUT_FP | |
f045b2c9 RS |
499 | \f |
500 | /* target machine storage layout */ | |
501 | ||
df44fa77 RK |
502 | /* Define to support cross compilation to an RS6000 target. */ |
503 | #define REAL_ARITHMETIC | |
504 | ||
13d39dbc | 505 | /* Define this macro if it is advisable to hold scalars in registers |
c81bebd7 | 506 | in a wider mode than that declared by the program. In such cases, |
ef457bda RK |
507 | the value is constrained to be within the bounds of the declared |
508 | type, but kept valid in the wider mode. The signedness of the | |
509 | extension may differ from that of the type. */ | |
510 | ||
39403d82 DE |
511 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ |
512 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
513 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
514 | (MODE) = (! TARGET_POWERPC64 ? SImode : DImode); | |
515 | ||
516 | /* Define this if function arguments should also be promoted using the above | |
517 | procedure. */ | |
518 | ||
519 | #define PROMOTE_FUNCTION_ARGS | |
520 | ||
521 | /* Likewise, if the function return value is promoted. */ | |
522 | ||
523 | #define PROMOTE_FUNCTION_RETURN | |
ef457bda | 524 | |
f045b2c9 RS |
525 | /* Define this if most significant bit is lowest numbered |
526 | in instructions that operate on numbered bit-fields. */ | |
527 | /* That is true on RS/6000. */ | |
528 | #define BITS_BIG_ENDIAN 1 | |
529 | ||
530 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
531 | /* That is true on RS/6000. */ | |
532 | #define BYTES_BIG_ENDIAN 1 | |
533 | ||
534 | /* Define this if most significant word of a multiword number is lowest | |
c81bebd7 | 535 | numbered. |
f045b2c9 RS |
536 | |
537 | For RS/6000 we can decide arbitrarily since there are no machine | |
538 | instructions for them. Might as well be consistent with bits and bytes. */ | |
539 | #define WORDS_BIG_ENDIAN 1 | |
540 | ||
fdaff8ba | 541 | /* number of bits in an addressable storage unit */ |
f045b2c9 RS |
542 | #define BITS_PER_UNIT 8 |
543 | ||
544 | /* Width in bits of a "word", which is the contents of a machine register. | |
545 | Note that this is not necessarily the width of data type `int'; | |
546 | if using 16-bit ints on a 68000, this would still be 32. | |
547 | But on a machine with 16-bit registers, this would be 16. */ | |
2f3e5814 | 548 | #define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64) |
2e360ab3 | 549 | #define MAX_BITS_PER_WORD 64 |
f045b2c9 RS |
550 | |
551 | /* Width of a word, in units (bytes). */ | |
2f3e5814 | 552 | #define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8) |
ef0e53ce | 553 | #define MIN_UNITS_PER_WORD 4 |
2e360ab3 | 554 | #define UNITS_PER_FP_WORD 8 |
f045b2c9 | 555 | |
915f619f JW |
556 | /* Type used for ptrdiff_t, as a string used in a declaration. */ |
557 | #define PTRDIFF_TYPE "int" | |
558 | ||
f045b2c9 RS |
559 | /* Type used for wchar_t, as a string used in a declaration. */ |
560 | #define WCHAR_TYPE "short unsigned int" | |
561 | ||
562 | /* Width of wchar_t in bits. */ | |
563 | #define WCHAR_TYPE_SIZE 16 | |
564 | ||
9e654916 RK |
565 | /* A C expression for the size in bits of the type `short' on the |
566 | target machine. If you don't define this, the default is half a | |
567 | word. (If this would be less than one storage unit, it is | |
568 | rounded up to one unit.) */ | |
569 | #define SHORT_TYPE_SIZE 16 | |
570 | ||
571 | /* A C expression for the size in bits of the type `int' on the | |
572 | target machine. If you don't define this, the default is one | |
573 | word. */ | |
19d2d16f | 574 | #define INT_TYPE_SIZE 32 |
9e654916 RK |
575 | |
576 | /* A C expression for the size in bits of the type `long' on the | |
577 | target machine. If you don't define this, the default is one | |
578 | word. */ | |
2f3e5814 | 579 | #define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64) |
9e654916 RK |
580 | #define MAX_LONG_TYPE_SIZE 64 |
581 | ||
582 | /* A C expression for the size in bits of the type `long long' on the | |
583 | target machine. If you don't define this, the default is two | |
584 | words. */ | |
585 | #define LONG_LONG_TYPE_SIZE 64 | |
586 | ||
587 | /* A C expression for the size in bits of the type `char' on the | |
588 | target machine. If you don't define this, the default is one | |
589 | quarter of a word. (If this would be less than one storage unit, | |
590 | it is rounded up to one unit.) */ | |
591 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
592 | ||
593 | /* A C expression for the size in bits of the type `float' on the | |
594 | target machine. If you don't define this, the default is one | |
595 | word. */ | |
596 | #define FLOAT_TYPE_SIZE 32 | |
597 | ||
598 | /* A C expression for the size in bits of the type `double' on the | |
599 | target machine. If you don't define this, the default is two | |
600 | words. */ | |
601 | #define DOUBLE_TYPE_SIZE 64 | |
602 | ||
603 | /* A C expression for the size in bits of the type `long double' on | |
604 | the target machine. If you don't define this, the default is two | |
605 | words. */ | |
606 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
607 | ||
f045b2c9 RS |
608 | /* Width in bits of a pointer. |
609 | See also the macro `Pmode' defined below. */ | |
2f3e5814 | 610 | #define POINTER_SIZE (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
611 | |
612 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
2f3e5814 | 613 | #define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
614 | |
615 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
a260abc9 | 616 | #define STACK_BOUNDARY (TARGET_32BIT ? 64 : 128) |
f045b2c9 RS |
617 | |
618 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
619 | #define FUNCTION_BOUNDARY 32 | |
620 | ||
621 | /* No data type wants to be aligned rounder than this. */ | |
b73fd26c DE |
622 | #define BIGGEST_ALIGNMENT 64 |
623 | ||
6bc3403c DE |
624 | /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */ |
625 | #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ | |
a260abc9 DE |
626 | (TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \ |
627 | ? get_inner_array_type (FIELD) \ | |
628 | : TREE_TYPE (FIELD)) == DFmode \ | |
629 | ? MIN ((COMPUTED), 32) : (COMPUTED)) | |
f045b2c9 RS |
630 | |
631 | /* Alignment of field after `int : 0' in a structure. */ | |
632 | #define EMPTY_FIELD_BOUNDARY 32 | |
633 | ||
634 | /* Every structure's size must be a multiple of this. */ | |
635 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
636 | ||
637 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
638 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
639 | ||
6bc3403c DE |
640 | /* AIX increases natural record alignment to doubleword if the first |
641 | field is an FP double while the FP fields remain word aligned. */ | |
642 | #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ | |
643 | ((TREE_CODE (STRUCT) == RECORD_TYPE \ | |
644 | || TREE_CODE (STRUCT) == UNION_TYPE \ | |
645 | || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ | |
02bef6da | 646 | && TYPE_FIELDS (STRUCT) != 0 \ |
6bc3403c DE |
647 | && DECL_MODE (TYPE_FIELDS (STRUCT)) == DFmode \ |
648 | ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \ | |
649 | : MAX ((COMPUTED), (SPECIFIED))) | |
650 | ||
f045b2c9 RS |
651 | /* Make strings word-aligned so strcpy from constants will be faster. */ |
652 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
653 | (TREE_CODE (EXP) == STRING_CST \ | |
654 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
655 | ||
656 | /* Make arrays of chars word-aligned for the same reasons. */ | |
657 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
658 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
659 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
660 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
661 | ||
fdaff8ba | 662 | /* Non-zero if move instructions will actually fail to work |
f045b2c9 | 663 | when given unaligned data. */ |
fdaff8ba | 664 | #define STRICT_ALIGNMENT 0 |
f045b2c9 RS |
665 | \f |
666 | /* Standard register usage. */ | |
667 | ||
668 | /* Number of actual hardware registers. | |
669 | The hardware registers are assigned numbers for the compiler | |
670 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
671 | All registers that the compiler knows about must be given numbers, | |
672 | even those that are not normally considered general registers. | |
673 | ||
674 | RS/6000 has 32 fixed-point registers, 32 floating-point registers, | |
675 | an MQ register, a count register, a link register, and 8 condition | |
676 | register fields, which we view here as separate registers. | |
677 | ||
678 | In addition, the difference between the frame and argument pointers is | |
679 | a function of the number of registers saved, so we need to have a | |
680 | register for AP that will later be eliminated in favor of SP or FP. | |
802a0058 | 681 | This is a normal register, but it is fixed. |
f045b2c9 | 682 | |
802a0058 MM |
683 | We also create a pseudo register for float/int conversions, that will |
684 | really represent the memory location used. It is represented here as | |
685 | a register, in order to work around problems in allocating stack storage | |
686 | in inline functions. */ | |
687 | ||
688 | #define FIRST_PSEUDO_REGISTER 77 | |
f045b2c9 RS |
689 | |
690 | /* 1 for registers that have pervasive standard uses | |
691 | and are not available for the register allocator. | |
692 | ||
c81bebd7 | 693 | On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. |
f045b2c9 | 694 | |
a127c4e5 RK |
695 | cr5 is not supposed to be used. |
696 | ||
697 | On System V implementations, r13 is fixed and not available for use. */ | |
698 | ||
699 | #ifndef FIXED_R13 | |
700 | #define FIXED_R13 0 | |
701 | #endif | |
f045b2c9 RS |
702 | |
703 | #define FIXED_REGISTERS \ | |
a127c4e5 | 704 | {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
705 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
706 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
707 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
802a0058 | 708 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1} |
f045b2c9 RS |
709 | |
710 | /* 1 for registers not available across function calls. | |
711 | These must include the FIXED_REGISTERS and also any | |
712 | registers that can be used without being saved. | |
713 | The latter must include the registers where values are returned | |
714 | and the register where structure-value addresses are passed. | |
715 | Aside from that, you can include as many other registers as you like. */ | |
716 | ||
717 | #define CALL_USED_REGISTERS \ | |
a127c4e5 | 718 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
719 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
720 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ | |
721 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
802a0058 | 722 | 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1} |
f045b2c9 RS |
723 | |
724 | /* List the order in which to allocate registers. Each register must be | |
725 | listed once, even those in FIXED_REGISTERS. | |
726 | ||
727 | We allocate in the following order: | |
728 | fp0 (not saved or used for anything) | |
729 | fp13 - fp2 (not saved; incoming fp arg registers) | |
730 | fp1 (not saved; return value) | |
731 | fp31 - fp14 (saved; order given to save least number) | |
5accd822 DE |
732 | cr7, cr6 (not saved or special) |
733 | cr1 (not saved, but used for FP operations) | |
f045b2c9 | 734 | cr0 (not saved, but used for arithmetic operations) |
5accd822 | 735 | cr4, cr3, cr2 (saved) |
f045b2c9 RS |
736 | r0 (not saved; cannot be base reg) |
737 | r9 (not saved; best for TImode) | |
738 | r11, r10, r8-r4 (not saved; highest used first to make less conflict) | |
739 | r3 (not saved; return value register) | |
740 | r31 - r13 (saved; order given to save least number) | |
741 | r12 (not saved; if used for DImode or DFmode would use r13) | |
742 | mq (not saved; best to use it if we can) | |
743 | ctr (not saved; when we have the choice ctr is better) | |
744 | lr (saved) | |
1427100a | 745 | cr5, r1, r2, ap, fpmem (fixed) */ |
f045b2c9 RS |
746 | |
747 | #define REG_ALLOC_ORDER \ | |
748 | {32, \ | |
749 | 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ | |
750 | 33, \ | |
751 | 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ | |
752 | 50, 49, 48, 47, 46, \ | |
5accd822 | 753 | 75, 74, 69, 68, 72, 71, 70, \ |
f045b2c9 RS |
754 | 0, \ |
755 | 9, 11, 10, 8, 7, 6, 5, 4, \ | |
756 | 3, \ | |
757 | 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ | |
758 | 18, 17, 16, 15, 14, 13, 12, \ | |
759 | 64, 66, 65, \ | |
802a0058 | 760 | 73, 1, 2, 67, 76} |
f045b2c9 RS |
761 | |
762 | /* True if register is floating-point. */ | |
763 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) | |
764 | ||
765 | /* True if register is a condition register. */ | |
766 | #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) | |
767 | ||
815cdc52 MM |
768 | /* True if register is condition register 0. */ |
769 | #define CR0_REGNO_P(N) ((N) == 68) | |
770 | ||
771 | /* True if register is a condition register, but not cr0. */ | |
772 | #define CR_REGNO_NOT_CR0_P(N) ((N) >= 69 && (N) <= 75) | |
773 | ||
f045b2c9 RS |
774 | /* True if register is an integer register. */ |
775 | #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) | |
776 | ||
802a0058 MM |
777 | /* True if register is the temporary memory location used for int/float |
778 | conversion. */ | |
779 | #define FPMEM_REGNO_P(N) ((N) == FPMEM_REGNUM) | |
780 | ||
f045b2c9 RS |
781 | /* Return number of consecutive hard regs needed starting at reg REGNO |
782 | to hold something of mode MODE. | |
783 | This is ordinarily the length in words of a value of mode MODE | |
784 | but can be less for certain modes in special long registers. | |
785 | ||
a260abc9 DE |
786 | POWER and PowerPC GPRs hold 32 bits worth; |
787 | PowerPC64 GPRs and FPRs point register holds 64 bits worth. */ | |
f045b2c9 | 788 | |
802a0058 MM |
789 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
790 | (FP_REGNO_P (REGNO) || FPMEM_REGNO_P (REGNO) \ | |
2e360ab3 | 791 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 RS |
792 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
793 | ||
794 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
bdfd4e31 RK |
795 | For POWER and PowerPC, the GPRs can hold any mode, but the float |
796 | registers only can hold floating modes and DImode, and CR register only | |
797 | can hold CC modes. We cannot put TImode anywhere except general | |
798 | register and it must be able to fit within the register set. */ | |
f045b2c9 | 799 | |
802a0058 MM |
800 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
801 | (FP_REGNO_P (REGNO) ? \ | |
802 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
803 | || (GET_MODE_CLASS (MODE) == MODE_INT \ | |
804 | && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \ | |
805 | : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ | |
806 | : FPMEM_REGNO_P (REGNO) ? ((MODE) == DImode || (MODE) == DFmode) \ | |
807 | : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ | |
bdfd4e31 | 808 | && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ |
f045b2c9 RS |
809 | : 1) |
810 | ||
811 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
812 | when one has mode MODE1 and one has mode MODE2. | |
813 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
814 | for any hard reg, then this must be 0 for correct output. */ | |
815 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
816 | (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
817 | ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
818 | : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
819 | ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
820 | : GET_MODE_CLASS (MODE1) == MODE_CC \ | |
821 | ? GET_MODE_CLASS (MODE2) == MODE_CC \ | |
822 | : GET_MODE_CLASS (MODE2) == MODE_CC \ | |
823 | ? GET_MODE_CLASS (MODE1) == MODE_CC \ | |
824 | : 1) | |
825 | ||
826 | /* A C expression returning the cost of moving data from a register of class | |
827 | CLASS1 to one of CLASS2. | |
828 | ||
829 | On the RS/6000, copying between floating-point and fixed-point | |
830 | registers is expensive. */ | |
831 | ||
832 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
833 | ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ | |
834 | : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ | |
835 | : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ | |
a4b970a0 | 836 | : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ |
5119dc13 RK |
837 | || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \ |
838 | || (CLASS1) == LINK_OR_CTR_REGS) \ | |
a4b970a0 | 839 | && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ |
5119dc13 | 840 | || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \ |
802a0058 | 841 | || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \ |
f045b2c9 RS |
842 | : 2) |
843 | ||
844 | /* A C expressions returning the cost of moving data of MODE from a register to | |
845 | or from memory. | |
846 | ||
847 | On the RS/6000, bump this up a bit. */ | |
848 | ||
cbd5b9a2 | 849 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ |
ab4a5fc9 RK |
850 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ |
851 | && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ | |
852 | ? 3 : 2) \ | |
853 | + 4) | |
f045b2c9 RS |
854 | |
855 | /* Specify the cost of a branch insn; roughly the number of extra insns that | |
856 | should be added to avoid a branch. | |
857 | ||
ef457bda | 858 | Set this to 3 on the RS/6000 since that is roughly the average cost of an |
f045b2c9 RS |
859 | unscheduled conditional branch. */ |
860 | ||
ef457bda | 861 | #define BRANCH_COST 3 |
f045b2c9 | 862 | |
5a5e4c2c RK |
863 | /* A C statement (sans semicolon) to update the integer variable COST |
864 | based on the relationship between INSN that is dependent on | |
865 | DEP_INSN through the dependence LINK. The default is to make no | |
866 | adjustment to COST. On the RS/6000, ignore the cost of anti- and | |
867 | output-dependencies. In fact, output dependencies on the CR do have | |
868 | a cost, but it is probably not worthwhile to track it. */ | |
869 | ||
870 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ | |
b0634e74 | 871 | (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) |
5a5e4c2c | 872 | |
bef84347 VM |
873 | /* A C statement (sans semicolon) to update the integer scheduling priority |
874 | INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, | |
875 | increase the priority to execute INSN later. Do not define this macro if | |
876 | you do not need to adjust the scheduling priorities of insns. */ | |
877 | ||
878 | #define ADJUST_PRIORITY(INSN) \ | |
879 | INSN_PRIORITY (INSN) = rs6000_adjust_priority (INSN, INSN_PRIORITY (INSN)) | |
880 | ||
6febd581 RK |
881 | /* Define this macro to change register usage conditional on target flags. |
882 | Set MQ register fixed (already call_used) if not POWER architecture | |
f85f4585 | 883 | (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. |
a238cd8b | 884 | 64-bit AIX reserves GPR13 for thread-private data. |
f85f4585 RK |
885 | Conditionally disable FPRs. */ |
886 | ||
8d30c4ee FS |
887 | #define CONDITIONAL_REGISTER_USAGE \ |
888 | { \ | |
889 | if (! TARGET_POWER) \ | |
890 | fixed_regs[64] = 1; \ | |
891 | if (TARGET_64BIT) \ | |
892 | fixed_regs[13] = call_used_regs[13] = 1; \ | |
893 | if (TARGET_SOFT_FLOAT) \ | |
894 | for (i = 32; i < 64; i++) \ | |
895 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
896 | if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ | |
897 | && flag_pic == 1) \ | |
898 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] \ | |
899 | = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
f85f4585 | 900 | } |
6febd581 | 901 | |
f045b2c9 RS |
902 | /* Specify the registers used for certain standard purposes. |
903 | The values of these macros are register numbers. */ | |
904 | ||
905 | /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ | |
906 | /* #define PC_REGNUM */ | |
907 | ||
908 | /* Register to use for pushing function arguments. */ | |
909 | #define STACK_POINTER_REGNUM 1 | |
910 | ||
911 | /* Base register for access to local variables of the function. */ | |
912 | #define FRAME_POINTER_REGNUM 31 | |
913 | ||
914 | /* Value should be nonzero if functions must have frame pointers. | |
915 | Zero means the frame pointer need not be set up (and parms | |
916 | may be accessed via the stack pointer) in functions that seem suitable. | |
917 | This is computed in `reload', in reload1.c. */ | |
918 | #define FRAME_POINTER_REQUIRED 0 | |
919 | ||
920 | /* Base register for access to arguments of the function. */ | |
921 | #define ARG_POINTER_REGNUM 67 | |
922 | ||
923 | /* Place to put static chain when calling a function that requires it. */ | |
924 | #define STATIC_CHAIN_REGNUM 11 | |
925 | ||
b6c9286a MM |
926 | /* count register number for special purposes */ |
927 | #define COUNT_REGISTER_REGNUM 66 | |
928 | ||
802a0058 MM |
929 | /* Special register that represents memory, used for float/int conversions. */ |
930 | #define FPMEM_REGNUM 76 | |
931 | ||
f045b2c9 RS |
932 | /* Place that structure value return address is placed. |
933 | ||
934 | On the RS/6000, it is passed as an extra parameter. */ | |
1ff7789b | 935 | #define STRUCT_VALUE 0 |
f045b2c9 RS |
936 | \f |
937 | /* Define the classes of registers for register constraints in the | |
938 | machine description. Also define ranges of constants. | |
939 | ||
940 | One of the classes must always be named ALL_REGS and include all hard regs. | |
941 | If there is more than one class, another class must be named NO_REGS | |
942 | and contain no registers. | |
943 | ||
944 | The name GENERAL_REGS must be the name of a class (or an alias for | |
945 | another name such as ALL_REGS). This is the class of registers | |
946 | that is allowed by "g" or "r" in a register constraint. | |
947 | Also, registers outside this class are allocated only when | |
948 | instructions express preferences for them. | |
949 | ||
950 | The classes must be numbered in nondecreasing order; that is, | |
951 | a larger-numbered class must never be contained completely | |
952 | in a smaller-numbered class. | |
953 | ||
954 | For any two classes, it is very desirable that there be another | |
955 | class that represents their union. */ | |
c81bebd7 | 956 | |
f045b2c9 RS |
957 | /* The RS/6000 has three types of registers, fixed-point, floating-point, |
958 | and condition registers, plus three special registers, MQ, CTR, and the | |
959 | link register. | |
960 | ||
961 | However, r0 is special in that it cannot be used as a base register. | |
962 | So make a class for registers valid as base registers. | |
963 | ||
964 | Also, cr0 is the only condition code register that can be used in | |
802a0058 MM |
965 | arithmetic insns, so make a separate class for it. |
966 | ||
956d6950 | 967 | There is a special 'register' (76), which is not a register, but a |
802a0058 MM |
968 | placeholder for memory allocated to convert between floating point and |
969 | integral types. This works around a problem where if we allocate memory | |
970 | with allocate_stack_{local,temp} and the function is an inline function, the | |
971 | memory allocated will clobber memory in the caller. So we use a special | |
972 | register, and if that is used, we allocate stack space for it. */ | |
f045b2c9 | 973 | |
ebedb4dd MM |
974 | enum reg_class |
975 | { | |
976 | NO_REGS, | |
ebedb4dd MM |
977 | BASE_REGS, |
978 | GENERAL_REGS, | |
979 | FLOAT_REGS, | |
980 | NON_SPECIAL_REGS, | |
981 | MQ_REGS, | |
982 | LINK_REGS, | |
983 | CTR_REGS, | |
984 | LINK_OR_CTR_REGS, | |
985 | SPECIAL_REGS, | |
986 | SPEC_OR_GEN_REGS, | |
987 | CR0_REGS, | |
ebedb4dd MM |
988 | CR_REGS, |
989 | NON_FLOAT_REGS, | |
802a0058 MM |
990 | FPMEM_REGS, |
991 | FLOAT_OR_FPMEM_REGS, | |
ebedb4dd MM |
992 | ALL_REGS, |
993 | LIM_REG_CLASSES | |
994 | }; | |
f045b2c9 RS |
995 | |
996 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
997 | ||
998 | /* Give names of register classes as strings for dump file. */ | |
999 | ||
ebedb4dd MM |
1000 | #define REG_CLASS_NAMES \ |
1001 | { \ | |
1002 | "NO_REGS", \ | |
ebedb4dd MM |
1003 | "BASE_REGS", \ |
1004 | "GENERAL_REGS", \ | |
1005 | "FLOAT_REGS", \ | |
1006 | "NON_SPECIAL_REGS", \ | |
1007 | "MQ_REGS", \ | |
1008 | "LINK_REGS", \ | |
1009 | "CTR_REGS", \ | |
1010 | "LINK_OR_CTR_REGS", \ | |
1011 | "SPECIAL_REGS", \ | |
1012 | "SPEC_OR_GEN_REGS", \ | |
1013 | "CR0_REGS", \ | |
ebedb4dd MM |
1014 | "CR_REGS", \ |
1015 | "NON_FLOAT_REGS", \ | |
802a0058 MM |
1016 | "FPMEM_REGS", \ |
1017 | "FLOAT_OR_FPMEM_REGS", \ | |
ebedb4dd MM |
1018 | "ALL_REGS" \ |
1019 | } | |
f045b2c9 RS |
1020 | |
1021 | /* Define which registers fit in which classes. | |
1022 | This is an initializer for a vector of HARD_REG_SET | |
1023 | of length N_REG_CLASSES. */ | |
1024 | ||
ebedb4dd MM |
1025 | #define REG_CLASS_CONTENTS \ |
1026 | { \ | |
1027 | { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ | |
ebedb4dd MM |
1028 | { 0xfffffffe, 0x00000000, 0x00000008 }, /* BASE_REGS */ \ |
1029 | { 0xffffffff, 0x00000000, 0x00000008 }, /* GENERAL_REGS */ \ | |
1030 | { 0x00000000, 0xffffffff, 0x00000000 }, /* FLOAT_REGS */ \ | |
1031 | { 0xffffffff, 0xffffffff, 0x00000008 }, /* NON_SPECIAL_REGS */ \ | |
1032 | { 0x00000000, 0x00000000, 0x00000001 }, /* MQ_REGS */ \ | |
1033 | { 0x00000000, 0x00000000, 0x00000002 }, /* LINK_REGS */ \ | |
1034 | { 0x00000000, 0x00000000, 0x00000004 }, /* CTR_REGS */ \ | |
1035 | { 0x00000000, 0x00000000, 0x00000006 }, /* LINK_OR_CTR_REGS */ \ | |
1036 | { 0x00000000, 0x00000000, 0x00000007 }, /* SPECIAL_REGS */ \ | |
1037 | { 0xffffffff, 0x00000000, 0x0000000f }, /* SPEC_OR_GEN_REGS */ \ | |
1038 | { 0x00000000, 0x00000000, 0x00000010 }, /* CR0_REGS */ \ | |
ebedb4dd MM |
1039 | { 0x00000000, 0x00000000, 0x00000ff0 }, /* CR_REGS */ \ |
1040 | { 0xffffffff, 0x00000000, 0x0000ffff }, /* NON_FLOAT_REGS */ \ | |
802a0058 MM |
1041 | { 0x00000000, 0x00000000, 0x00010000 }, /* FPMEM_REGS */ \ |
1042 | { 0x00000000, 0xffffffff, 0x00010000 }, /* FLOAT_OR_FPMEM_REGS */ \ | |
1043 | { 0xffffffff, 0xffffffff, 0x0001ffff } /* ALL_REGS */ \ | |
ebedb4dd | 1044 | } |
f045b2c9 RS |
1045 | |
1046 | /* The same information, inverted: | |
1047 | Return the class number of the smallest class containing | |
1048 | reg number REGNO. This could be a conditional expression | |
1049 | or could index an array. */ | |
1050 | ||
802a0058 MM |
1051 | #define REGNO_REG_CLASS(REGNO) \ |
1052 | ((REGNO) == 0 ? GENERAL_REGS \ | |
1053 | : (REGNO) < 32 ? BASE_REGS \ | |
1054 | : FP_REGNO_P (REGNO) ? FLOAT_REGS \ | |
1055 | : (REGNO) == 68 ? CR0_REGS \ | |
1056 | : CR_REGNO_P (REGNO) ? CR_REGS \ | |
1057 | : (REGNO) == 64 ? MQ_REGS \ | |
1058 | : (REGNO) == 65 ? LINK_REGS \ | |
1059 | : (REGNO) == 66 ? CTR_REGS \ | |
1060 | : (REGNO) == 67 ? BASE_REGS \ | |
1061 | : (REGNO) == 76 ? FPMEM_REGS \ | |
f045b2c9 RS |
1062 | : NO_REGS) |
1063 | ||
1064 | /* The class value for index registers, and the one for base regs. */ | |
1065 | #define INDEX_REG_CLASS GENERAL_REGS | |
1066 | #define BASE_REG_CLASS BASE_REGS | |
1067 | ||
1068 | /* Get reg_class from a letter such as appears in the machine description. */ | |
1069 | ||
1070 | #define REG_CLASS_FROM_LETTER(C) \ | |
1071 | ((C) == 'f' ? FLOAT_REGS \ | |
1072 | : (C) == 'b' ? BASE_REGS \ | |
1073 | : (C) == 'h' ? SPECIAL_REGS \ | |
1074 | : (C) == 'q' ? MQ_REGS \ | |
1075 | : (C) == 'c' ? CTR_REGS \ | |
1076 | : (C) == 'l' ? LINK_REGS \ | |
1077 | : (C) == 'x' ? CR0_REGS \ | |
1078 | : (C) == 'y' ? CR_REGS \ | |
802a0058 | 1079 | : (C) == 'z' ? FPMEM_REGS \ |
f045b2c9 RS |
1080 | : NO_REGS) |
1081 | ||
1082 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
1083 | can be used to stand for particular ranges of immediate operands. | |
1084 | This macro defines what the ranges are. | |
1085 | C is the letter, and VALUE is a constant value. | |
1086 | Return 1 if VALUE is in the range specified by C. | |
1087 | ||
9615f239 | 1088 | `I' is a signed 16-bit constant |
f045b2c9 RS |
1089 | `J' is a constant with only the high-order 16 bits non-zero |
1090 | `K' is a constant with only the low-order 16 bits non-zero | |
9615f239 | 1091 | `L' is a signed 16-bit constant shifted left 16 bits |
f045b2c9 RS |
1092 | `M' is a constant that is greater than 31 |
1093 | `N' is a constant that is an exact power of two | |
1094 | `O' is the constant zero | |
1095 | `P' is a constant whose negation is a signed 16-bit constant */ | |
1096 | ||
5b6f7b96 RK |
1097 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ |
1098 | ( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ | |
19684119 | 1099 | : (C) == 'J' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0 \ |
a260abc9 | 1100 | : (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \ |
9615f239 DE |
1101 | : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ |
1102 | && ((VALUE) >> 31 == -1 || (VALUE) >> 31 == 0)) \ | |
5b6f7b96 RK |
1103 | : (C) == 'M' ? (VALUE) > 31 \ |
1104 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
1105 | : (C) == 'O' ? (VALUE) == 0 \ | |
9615f239 | 1106 | : (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x10000 \ |
f045b2c9 RS |
1107 | : 0) |
1108 | ||
1109 | /* Similar, but for floating constants, and defining letters G and H. | |
1110 | Here VALUE is the CONST_DOUBLE rtx itself. | |
1111 | ||
1112 | We flag for special constants when we can copy the constant into | |
4e74d8ec | 1113 | a general register in two insns for DF/DI and one insn for SF. |
f045b2c9 | 1114 | |
c4c40373 | 1115 | 'H' is used for DI/DF constants that take 3 insns. */ |
4e74d8ec MM |
1116 | |
1117 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
c4c40373 MM |
1118 | ( (C) == 'G' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) \ |
1119 | == ((GET_MODE (VALUE) == SFmode) ? 1 : 2)) \ | |
1120 | : (C) == 'H' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) == 3) \ | |
1121 | : 0) | |
f045b2c9 RS |
1122 | |
1123 | /* Optional extra constraints for this machine. | |
1124 | ||
b6c9286a MM |
1125 | 'Q' means that is a memory operand that is just an offset from a reg. |
1126 | 'R' is for AIX TOC entries. | |
a260abc9 | 1127 | 'S' is a constant that can be placed into a 64-bit mask operand |
9615f239 | 1128 | 'T' is a consatnt that can be placed into a 32-bit mask operand |
88228c4b | 1129 | 'U' is for V.4 small data references. */ |
f045b2c9 | 1130 | |
e8a8bc24 RK |
1131 | #define EXTRA_CONSTRAINT(OP, C) \ |
1132 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ | |
d537c24d | 1133 | : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ |
a260abc9 | 1134 | : (C) == 'S' ? mask64_operand (OP, VOIDmode) \ |
9615f239 | 1135 | : (C) == 'T' ? mask_operand (OP, VOIDmode) \ |
c81bebd7 MM |
1136 | : (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ |
1137 | && small_data_operand (OP, GET_MODE (OP))) \ | |
e8a8bc24 | 1138 | : 0) |
f045b2c9 RS |
1139 | |
1140 | /* Given an rtx X being reloaded into a reg required to be | |
1141 | in class CLASS, return the class of reg to actually use. | |
1142 | In general this is just CLASS; but on some machines | |
c81bebd7 | 1143 | in some cases it is preferable to use a more restrictive class. |
f045b2c9 RS |
1144 | |
1145 | On the RS/6000, we have to return NO_REGS when we want to reload a | |
1146 | floating-point CONST_DOUBLE to force it to be copied to memory. */ | |
1147 | ||
802a0058 | 1148 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ |
f045b2c9 RS |
1149 | ((GET_CODE (X) == CONST_DOUBLE \ |
1150 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1151 | ? NO_REGS : (CLASS)) | |
c81bebd7 | 1152 | |
f045b2c9 RS |
1153 | /* Return the register class of a scratch register needed to copy IN into |
1154 | or out of a register in CLASS in MODE. If it can be done directly, | |
1155 | NO_REGS is returned. */ | |
1156 | ||
1157 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
1158 | secondary_reload_class (CLASS, MODE, IN) | |
1159 | ||
7ea555a4 RK |
1160 | /* If we are copying between FP registers and anything else, we need a memory |
1161 | location. */ | |
1162 | ||
1163 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
1164 | ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) | |
1165 | ||
f045b2c9 RS |
1166 | /* Return the maximum number of consecutive registers |
1167 | needed to represent mode MODE in a register of class CLASS. | |
1168 | ||
1169 | On RS/6000, this is the size of MODE in words, | |
1170 | except in the FP regs, where a single reg is enough for two words. */ | |
802a0058 MM |
1171 | #define CLASS_MAX_NREGS(CLASS, MODE) \ |
1172 | (((CLASS) == FLOAT_REGS || (CLASS) == FPMEM_REGS \ | |
1173 | || (CLASS) == FLOAT_OR_FPMEM_REGS) \ | |
2e360ab3 | 1174 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 | 1175 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
580d3230 RK |
1176 | |
1177 | /* If defined, gives a class of registers that cannot be used as the | |
1178 | operand of a SUBREG that changes the size of the object. */ | |
1179 | ||
802a0058 | 1180 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_OR_FPMEM_REGS |
f045b2c9 RS |
1181 | \f |
1182 | /* Stack layout; function entry, exit and calling. */ | |
1183 | ||
6b67933e RK |
1184 | /* Enumeration to give which calling sequence to use. */ |
1185 | enum rs6000_abi { | |
1186 | ABI_NONE, | |
1187 | ABI_AIX, /* IBM's AIX */ | |
b6c9286a MM |
1188 | ABI_AIX_NODESC, /* AIX calling sequence minus function descriptors */ |
1189 | ABI_V4, /* System V.4/eabi */ | |
c81bebd7 MM |
1190 | ABI_NT, /* Windows/NT */ |
1191 | ABI_SOLARIS /* Solaris */ | |
6b67933e RK |
1192 | }; |
1193 | ||
b6c9286a MM |
1194 | extern enum rs6000_abi rs6000_current_abi; /* available for use by subtarget */ |
1195 | ||
1196 | /* Default ABI to compile code for */ | |
1197 | #ifndef DEFAULT_ABI | |
1198 | #define DEFAULT_ABI ABI_AIX | |
fb19c17f RK |
1199 | /* The prefix to add to user-visible assembler symbols. */ |
1200 | #define USER_LABEL_PREFIX "." | |
b6c9286a MM |
1201 | #endif |
1202 | ||
4697a36c MM |
1203 | /* Structure used to define the rs6000 stack */ |
1204 | typedef struct rs6000_stack { | |
1205 | int first_gp_reg_save; /* first callee saved GP register used */ | |
1206 | int first_fp_reg_save; /* first callee saved FP register used */ | |
1207 | int lr_save_p; /* true if the link reg needs to be saved */ | |
1208 | int cr_save_p; /* true if the CR reg needs to be saved */ | |
b6c9286a | 1209 | int toc_save_p; /* true if the TOC needs to be saved */ |
4697a36c MM |
1210 | int push_p; /* true if we need to allocate stack space */ |
1211 | int calls_p; /* true if the function makes any calls */ | |
b6c9286a MM |
1212 | int main_p; /* true if this is main */ |
1213 | int main_save_p; /* true if this is main and we need to save args */ | |
802a0058 | 1214 | int fpmem_p; /* true if float/int conversion temp needed */ |
6b67933e | 1215 | enum rs6000_abi abi; /* which ABI to use */ |
abc95ed3 RK |
1216 | int gp_save_offset; /* offset to save GP regs from initial SP */ |
1217 | int fp_save_offset; /* offset to save FP regs from initial SP */ | |
4697a36c MM |
1218 | int lr_save_offset; /* offset to save LR from initial SP */ |
1219 | int cr_save_offset; /* offset to save CR from initial SP */ | |
b6c9286a | 1220 | int toc_save_offset; /* offset to save the TOC pointer */ |
4697a36c | 1221 | int varargs_save_offset; /* offset to save the varargs registers */ |
b6c9286a | 1222 | int main_save_offset; /* offset to save main's args */ |
802a0058 | 1223 | int fpmem_offset; /* offset for float/int conversion temp */ |
4697a36c MM |
1224 | int reg_size; /* register size (4 or 8) */ |
1225 | int varargs_size; /* size to hold V.4 args passed in regs */ | |
1226 | int vars_size; /* variable save area size */ | |
1227 | int parm_size; /* outgoing parameter size */ | |
b6c9286a | 1228 | int main_size; /* size to hold saving main's args */ |
4697a36c MM |
1229 | int save_size; /* save area size */ |
1230 | int fixed_size; /* fixed size of stack frame */ | |
1231 | int gp_size; /* size of saved GP registers */ | |
1232 | int fp_size; /* size of saved FP registers */ | |
1233 | int cr_size; /* size to hold CR if not in save_size */ | |
b6c9286a | 1234 | int lr_size; /* size to hold LR if not in save_size */ |
802a0058 | 1235 | int fpmem_size; /* size to hold float/int conversion */ |
b6c9286a | 1236 | int toc_size; /* size to hold TOC if not in save_size */ |
4697a36c MM |
1237 | int total_size; /* total bytes allocated for stack */ |
1238 | } rs6000_stack_t; | |
1239 | ||
f045b2c9 RS |
1240 | /* Define this if pushing a word on the stack |
1241 | makes the stack pointer a smaller address. */ | |
1242 | #define STACK_GROWS_DOWNWARD | |
1243 | ||
1244 | /* Define this if the nominal address of the stack frame | |
1245 | is at the high-address end of the local variables; | |
1246 | that is, each additional local variable allocated | |
1247 | goes at a more negative offset in the frame. | |
1248 | ||
1249 | On the RS/6000, we grow upwards, from the area after the outgoing | |
1250 | arguments. */ | |
1251 | /* #define FRAME_GROWS_DOWNWARD */ | |
1252 | ||
4697a36c | 1253 | /* Size of the outgoing register save area */ |
2f3e5814 | 1254 | #define RS6000_REG_SAVE (TARGET_32BIT ? 32 : 64) |
4697a36c MM |
1255 | |
1256 | /* Size of the fixed area on the stack */ | |
2f3e5814 | 1257 | #define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48) |
4697a36c | 1258 | |
97f6e72f DE |
1259 | /* MEM representing address to save the TOC register */ |
1260 | #define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ | |
1261 | plus_constant (stack_pointer_rtx, \ | |
1262 | (TARGET_32BIT ? 20 : 40))) | |
b6c9286a | 1263 | |
802a0058 MM |
1264 | /* Offset & size for fpmem stack locations used for converting between |
1265 | float and integral types. */ | |
1266 | extern int rs6000_fpmem_offset; | |
1267 | extern int rs6000_fpmem_size; | |
1268 | ||
4697a36c MM |
1269 | /* Size of the V.4 varargs area if needed */ |
1270 | #define RS6000_VARARGS_AREA 0 | |
1271 | ||
1272 | /* Whether a V.4 varargs area is needed */ | |
1273 | extern int rs6000_sysv_varargs_p; | |
1274 | ||
1275 | /* Align an address */ | |
ed33106f | 1276 | #define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) |
4697a36c | 1277 | |
a7df97e6 MM |
1278 | /* Initialize data used by insn expanders. This is called from |
1279 | init_emit, once for each function, before code is generated. */ | |
1280 | #define INIT_EXPANDERS rs6000_init_expanders () | |
1281 | ||
4697a36c MM |
1282 | /* Size of V.4 varargs area in bytes */ |
1283 | #define RS6000_VARARGS_SIZE \ | |
2f3e5814 | 1284 | ((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8) |
4697a36c | 1285 | |
f045b2c9 RS |
1286 | /* Offset within stack frame to start allocating local variables at. |
1287 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
1288 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
c81bebd7 | 1289 | of the first local allocated. |
f045b2c9 RS |
1290 | |
1291 | On the RS/6000, the frame pointer is the same as the stack pointer, | |
1292 | except for dynamic allocations. So we start after the fixed area and | |
1293 | outgoing parameter area. */ | |
1294 | ||
802a0058 | 1295 | #define STARTING_FRAME_OFFSET \ |
ed33106f | 1296 | (RS6000_ALIGN (current_function_outgoing_args_size, 8) \ |
802a0058 MM |
1297 | + RS6000_VARARGS_AREA \ |
1298 | + RS6000_SAVE_AREA) | |
1299 | ||
1300 | /* Offset from the stack pointer register to an item dynamically | |
1301 | allocated on the stack, e.g., by `alloca'. | |
1302 | ||
1303 | The default value for this macro is `STACK_POINTER_OFFSET' plus the | |
1304 | length of the outgoing arguments. The default is correct for most | |
1305 | machines. See `function.c' for details. */ | |
1306 | #define STACK_DYNAMIC_OFFSET(FUNDECL) \ | |
ed33106f | 1307 | (RS6000_ALIGN (current_function_outgoing_args_size, 8) \ |
802a0058 | 1308 | + (STACK_POINTER_OFFSET)) |
f045b2c9 RS |
1309 | |
1310 | /* If we generate an insn to push BYTES bytes, | |
1311 | this says how many the stack pointer really advances by. | |
1312 | On RS/6000, don't define this because there are no push insns. */ | |
1313 | /* #define PUSH_ROUNDING(BYTES) */ | |
1314 | ||
1315 | /* Offset of first parameter from the argument pointer register value. | |
1316 | On the RS/6000, we define the argument pointer to the start of the fixed | |
1317 | area. */ | |
4697a36c | 1318 | #define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA |
f045b2c9 RS |
1319 | |
1320 | /* Define this if stack space is still allocated for a parameter passed | |
1321 | in a register. The value is the number of bytes allocated to this | |
1322 | area. */ | |
4697a36c | 1323 | #define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE |
f045b2c9 RS |
1324 | |
1325 | /* Define this if the above stack space is to be considered part of the | |
1326 | space allocated by the caller. */ | |
1327 | #define OUTGOING_REG_PARM_STACK_SPACE | |
1328 | ||
1329 | /* This is the difference between the logical top of stack and the actual sp. | |
1330 | ||
1331 | For the RS/6000, sp points past the fixed area. */ | |
4697a36c | 1332 | #define STACK_POINTER_OFFSET RS6000_SAVE_AREA |
f045b2c9 RS |
1333 | |
1334 | /* Define this if the maximum size of all the outgoing args is to be | |
1335 | accumulated and pushed during the prologue. The amount can be | |
1336 | found in the variable current_function_outgoing_args_size. */ | |
1337 | #define ACCUMULATE_OUTGOING_ARGS | |
1338 | ||
1339 | /* Value is the number of bytes of arguments automatically | |
1340 | popped when returning from a subroutine call. | |
8b109b37 | 1341 | FUNDECL is the declaration node of the function (as a tree), |
f045b2c9 RS |
1342 | FUNTYPE is the data type of the function (as a tree), |
1343 | or for a library call it is an identifier node for the subroutine name. | |
1344 | SIZE is the number of bytes of arguments passed on the stack. */ | |
1345 | ||
8b109b37 | 1346 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
f045b2c9 RS |
1347 | |
1348 | /* Define how to find the value returned by a function. | |
1349 | VALTYPE is the data type of the value (as a tree). | |
1350 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1351 | otherwise, FUNC is 0. | |
1352 | ||
c81bebd7 | 1353 | On RS/6000 an integer value is in r3 and a floating-point value is in |
d14a6d05 | 1354 | fp1, unless -msoft-float. */ |
f045b2c9 | 1355 | |
39403d82 DE |
1356 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
1357 | gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ | |
1358 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ | |
1359 | || POINTER_TYPE_P (VALTYPE) \ | |
1360 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
1361 | TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) | |
f045b2c9 RS |
1362 | |
1363 | /* Define how to find the value returned by a library function | |
1364 | assuming the value has mode MODE. */ | |
1365 | ||
1366 | #define LIBCALL_VALUE(MODE) \ | |
39403d82 DE |
1367 | gen_rtx_REG (MODE, \ |
1368 | GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) | |
f045b2c9 RS |
1369 | |
1370 | /* The definition of this macro implies that there are cases where | |
1371 | a scalar value cannot be returned in registers. | |
1372 | ||
c81bebd7 MM |
1373 | For the RS/6000, any structure or union type is returned in memory, except for |
1374 | Solaris, which returns structures <= 8 bytes in registers. */ | |
f045b2c9 | 1375 | |
c81bebd7 MM |
1376 | #define RETURN_IN_MEMORY(TYPE) \ |
1377 | (TYPE_MODE (TYPE) == BLKmode \ | |
1378 | && (DEFAULT_ABI != ABI_SOLARIS || int_size_in_bytes (TYPE) > 8)) | |
f045b2c9 | 1379 | |
a260abc9 | 1380 | /* Mode of stack savearea. |
dfdfa60f DE |
1381 | FUNCTION is VOIDmode because calling convention maintains SP. |
1382 | BLOCK needs Pmode for SP. | |
a260abc9 DE |
1383 | NONLOCAL needs twice Pmode to maintain both backchain and SP. */ |
1384 | #define STACK_SAVEAREA_MODE(LEVEL) \ | |
dfdfa60f DE |
1385 | (LEVEL == SAVE_FUNCTION ? VOIDmode \ |
1386 | : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode) | |
a260abc9 | 1387 | |
4697a36c MM |
1388 | /* Minimum and maximum general purpose registers used to hold arguments. */ |
1389 | #define GP_ARG_MIN_REG 3 | |
1390 | #define GP_ARG_MAX_REG 10 | |
1391 | #define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) | |
1392 | ||
1393 | /* Minimum and maximum floating point registers used to hold arguments. */ | |
1394 | #define FP_ARG_MIN_REG 33 | |
7509c759 MM |
1395 | #define FP_ARG_AIX_MAX_REG 45 |
1396 | #define FP_ARG_V4_MAX_REG 40 | |
1397 | #define FP_ARG_MAX_REG FP_ARG_AIX_MAX_REG | |
4697a36c MM |
1398 | #define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1) |
1399 | ||
1400 | /* Return registers */ | |
1401 | #define GP_ARG_RETURN GP_ARG_MIN_REG | |
1402 | #define FP_ARG_RETURN FP_ARG_MIN_REG | |
1403 | ||
7509c759 | 1404 | /* Flags for the call/call_value rtl operations set up by function_arg */ |
6a4cee5f MM |
1405 | #define CALL_NORMAL 0x00000000 /* no special processing */ |
1406 | #define CALL_NT_DLLIMPORT 0x00000001 /* NT, this is a DLL import call */ | |
1407 | #define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */ | |
1408 | #define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */ | |
1409 | #define CALL_LONG 0x00000008 /* always call indirect */ | |
7509c759 | 1410 | |
4697a36c MM |
1411 | /* Define cutoff for using external functions to save floating point */ |
1412 | #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63) | |
1413 | ||
f045b2c9 RS |
1414 | /* 1 if N is a possible register number for a function value |
1415 | as seen by the caller. | |
1416 | ||
1417 | On RS/6000, this is r3 and fp1. */ | |
4697a36c | 1418 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_ARG_RETURN || ((N) == FP_ARG_RETURN)) |
f045b2c9 RS |
1419 | |
1420 | /* 1 if N is a possible register number for function argument passing. | |
1421 | On RS/6000, these are r3-r10 and fp1-fp13. */ | |
4697a36c MM |
1422 | #define FUNCTION_ARG_REGNO_P(N) \ |
1423 | (((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \ | |
1424 | || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG))) | |
f045b2c9 | 1425 | |
f045b2c9 RS |
1426 | \f |
1427 | /* Define a data type for recording info about an argument list | |
1428 | during the scan of that argument list. This data type should | |
1429 | hold all necessary information about the function itself | |
1430 | and about the args processed so far, enough to enable macros | |
1431 | such as FUNCTION_ARG to determine where the next arg should go. | |
1432 | ||
1433 | On the RS/6000, this is a structure. The first element is the number of | |
1434 | total argument words, the second is used to store the next | |
1435 | floating-point register number, and the third says how many more args we | |
4697a36c MM |
1436 | have prototype types for. |
1437 | ||
bd227acc FS |
1438 | The varargs/stdarg support requires that this structure's size |
1439 | be a multiple of sizeof(int). */ | |
4697a36c MM |
1440 | |
1441 | typedef struct rs6000_args | |
1442 | { | |
6a4cee5f MM |
1443 | int words; /* # words uses for passing GP registers */ |
1444 | int fregno; /* next available FP register */ | |
1445 | int nargs_prototype; /* # args left in the current prototype */ | |
1446 | int orig_nargs; /* Original value of nargs_prototype */ | |
6a4cee5f MM |
1447 | int prototype; /* Whether a prototype was defined */ |
1448 | int call_cookie; /* Do special things for this call */ | |
4697a36c | 1449 | } CUMULATIVE_ARGS; |
f045b2c9 RS |
1450 | |
1451 | /* Define intermediate macro to compute the size (in registers) of an argument | |
1452 | for the RS/6000. */ | |
1453 | ||
1454 | #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ | |
1455 | (! (NAMED) ? 0 \ | |
1456 | : (MODE) != BLKmode \ | |
1457 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
1458 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
1459 | ||
1460 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1461 | for a call to a function whose data type is FNTYPE. | |
1462 | For a library call, FNTYPE is 0. */ | |
1463 | ||
2c7ee1a6 | 1464 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
4697a36c | 1465 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE) |
f045b2c9 RS |
1466 | |
1467 | /* Similar, but when scanning the definition of a procedure. We always | |
1468 | set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ | |
1469 | ||
4697a36c MM |
1470 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \ |
1471 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE) | |
f045b2c9 RS |
1472 | |
1473 | /* Update the data in CUM to advance over an argument | |
1474 | of mode MODE and data type TYPE. | |
1475 | (TYPE is null for libcalls where that information may not be available.) */ | |
1476 | ||
1477 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
4697a36c | 1478 | function_arg_advance (&CUM, MODE, TYPE, NAMED) |
f045b2c9 RS |
1479 | |
1480 | /* Non-zero if we can use a floating-point register to pass this arg. */ | |
4697a36c MM |
1481 | #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ |
1482 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1483 | && (CUM).fregno <= FP_ARG_MAX_REG \ | |
1484 | && TARGET_HARD_FLOAT) | |
f045b2c9 RS |
1485 | |
1486 | /* Determine where to put an argument to a function. | |
1487 | Value is zero to push the argument on the stack, | |
1488 | or a hard register in which to store the argument. | |
1489 | ||
1490 | MODE is the argument's machine mode. | |
1491 | TYPE is the data type of the argument (as a tree). | |
1492 | This is null for libcalls where that information may | |
1493 | not be available. | |
1494 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1495 | the preceding args and about the function being called. | |
1496 | NAMED is nonzero if this argument is a named parameter | |
1497 | (otherwise it is an extra parameter matching an ellipsis). | |
1498 | ||
1499 | On RS/6000 the first eight words of non-FP are normally in registers | |
1500 | and the rest are pushed. The first 13 FP args are in registers. | |
1501 | ||
1502 | If this is floating-point and no prototype is specified, we use | |
4d6697ca RK |
1503 | both an FP and integer register (or possibly FP reg and stack). Library |
1504 | functions (when TYPE is zero) always have the proper types for args, | |
1505 | so we can pass the FP value just in one register. emit_library_function | |
1506 | doesn't support EXPR_LIST anyway. */ | |
f045b2c9 | 1507 | |
4697a36c MM |
1508 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
1509 | function_arg (&CUM, MODE, TYPE, NAMED) | |
f045b2c9 RS |
1510 | |
1511 | /* For an arg passed partly in registers and partly in memory, | |
1512 | this is the number of registers used. | |
1513 | For args passed entirely in registers or entirely in memory, zero. */ | |
1514 | ||
4697a36c MM |
1515 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ |
1516 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1517 | ||
1518 | /* A C expression that indicates when an argument must be passed by | |
1519 | reference. If nonzero for an argument, a copy of that argument is | |
1520 | made in memory and a pointer to the argument is passed instead of | |
1521 | the argument itself. The pointer is passed in whatever way is | |
1522 | appropriate for passing a pointer to that type. */ | |
1523 | ||
1524 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
1525 | function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) | |
f045b2c9 | 1526 | |
c229cba9 DE |
1527 | /* If defined, a C expression which determines whether, and in which |
1528 | direction, to pad out an argument with extra space. The value | |
1529 | should be of type `enum direction': either `upward' to pad above | |
1530 | the argument, `downward' to pad below, or `none' to inhibit | |
1531 | padding. */ | |
1532 | ||
1533 | #define FUNCTION_ARG_PADDING(MODE, TYPE) \ | |
c4d38ccb | 1534 | (enum direction) function_arg_padding (MODE, TYPE) |
c229cba9 | 1535 | |
b6c9286a | 1536 | /* If defined, a C expression that gives the alignment boundary, in bits, |
c81bebd7 | 1537 | of an argument with the specified mode and type. If it is not defined, |
b6c9286a MM |
1538 | PARM_BOUNDARY is used for all arguments. */ |
1539 | ||
1540 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1541 | function_arg_boundary (MODE, TYPE) | |
1542 | ||
f045b2c9 | 1543 | /* Perform any needed actions needed for a function that is receiving a |
c81bebd7 | 1544 | variable number of arguments. |
f045b2c9 RS |
1545 | |
1546 | CUM is as above. | |
1547 | ||
1548 | MODE and TYPE are the mode and type of the current parameter. | |
1549 | ||
1550 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1551 | that must be pushed by the prolog to pretend that our caller pushed | |
1552 | it. | |
1553 | ||
1554 | Normally, this macro will push all remaining incoming registers on the | |
1555 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1556 | ||
4697a36c MM |
1557 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ |
1558 | setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL) | |
1559 | ||
1560 | /* If defined, is a C expression that produces the machine-specific | |
1561 | code for a call to `__builtin_saveregs'. This code will be moved | |
1562 | to the very beginning of the function, before any parameter access | |
1563 | are made. The return value of this function should be an RTX that | |
1564 | contains the value to use as the return of `__builtin_saveregs'. | |
1565 | ||
1566 | The argument ARGS is a `tree_list' containing the arguments that | |
1567 | were passed to `__builtin_saveregs'. | |
1568 | ||
1569 | If this macro is not defined, the compiler will output an ordinary | |
1570 | call to the library function `__builtin_saveregs'. */ | |
1571 | ||
1572 | #define EXPAND_BUILTIN_SAVEREGS(ARGS) \ | |
1573 | expand_builtin_saveregs (ARGS) | |
f045b2c9 RS |
1574 | |
1575 | /* This macro generates the assembly code for function entry. | |
1576 | FILE is a stdio stream to output the code to. | |
1577 | SIZE is an int: how many units of temporary storage to allocate. | |
1578 | Refer to the array `regs_ever_live' to determine which registers | |
1579 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1580 | is ever used in the function. This macro is responsible for | |
1581 | knowing which registers should not be saved even if used. */ | |
1582 | ||
1583 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
1584 | ||
1585 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
58a39e45 | 1586 | for profiling a function entry. */ |
f045b2c9 RS |
1587 | |
1588 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
58a39e45 | 1589 | output_function_profiler ((FILE), (LABELNO)); |
f045b2c9 RS |
1590 | |
1591 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1592 | the stack pointer does not matter. No definition is equivalent to | |
1593 | always zero. | |
1594 | ||
1595 | On the RS/6000, this is non-zero because we can restore the stack from | |
1596 | its backpointer, which we maintain. */ | |
1597 | #define EXIT_IGNORE_STACK 1 | |
1598 | ||
1599 | /* This macro generates the assembly code for function exit, | |
1600 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1601 | then individual return instructions are generated for each | |
1602 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1603 | ||
1604 | The function epilogue should not depend on the current stack pointer! | |
1605 | It should use the frame pointer only. This is mandatory because | |
1606 | of alloca; we also take advantage of it to omit stack adjustments | |
1607 | before returning. */ | |
1608 | ||
1609 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
17167fd8 MM |
1610 | |
1611 | /* A C compound statement that outputs the assembler code for a thunk function, | |
1612 | used to implement C++ virtual function calls with multiple inheritance. The | |
1613 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
1614 | object parameter before handing control off to the real function. | |
1615 | ||
1616 | First, emit code to add the integer DELTA to the location that contains the | |
1617 | incoming first argument. Assume that this argument contains a pointer, and | |
1618 | is the one used to pass the `this' pointer in C++. This is the incoming | |
1619 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
1620 | addition must preserve the values of all other incoming arguments. | |
1621 | ||
1622 | After the addition, emit code to jump to FUNCTION, which is a | |
1623 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
1624 | the return address. Hence returning from FUNCTION will return to whoever | |
1625 | called the current `thunk'. | |
1626 | ||
1627 | The effect must be as if FUNCTION had been called directly with the adjusted | |
1628 | first argument. This macro is responsible for emitting all of the code for | |
1629 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
1630 | invoked. | |
1631 | ||
1632 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
1633 | extracted from it.) It might possibly be useful on some targets, but | |
1634 | probably not. | |
1635 | ||
1636 | If you do not define this macro, the target-independent code in the C++ | |
1637 | frontend will generate a less efficient heavyweight thunk that calls | |
1638 | FUNCTION instead of jumping to it. The generic approach does not support | |
1639 | varargs. */ | |
42820a49 | 1640 | #if TARGET_ELF |
17167fd8 MM |
1641 | #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ |
1642 | output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION) | |
42820a49 | 1643 | #endif |
f045b2c9 | 1644 | \f |
eaf1bcf1 | 1645 | /* TRAMPOLINE_TEMPLATE deleted */ |
f045b2c9 RS |
1646 | |
1647 | /* Length in units of the trampoline for entering a nested function. */ | |
1648 | ||
b6c9286a | 1649 | #define TRAMPOLINE_SIZE rs6000_trampoline_size () |
f045b2c9 RS |
1650 | |
1651 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1652 | FNADDR is an RTX for the address of the function's pure code. | |
1653 | CXT is an RTX for the static chain value for the function. */ | |
1654 | ||
1655 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
b6c9286a | 1656 | rs6000_initialize_trampoline (ADDR, FNADDR, CXT) |
f045b2c9 | 1657 | \f |
7509c759 MM |
1658 | /* If defined, a C expression whose value is nonzero if IDENTIFIER |
1659 | with arguments ARGS is a valid machine specific attribute for DECL. | |
1660 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
1661 | ||
1662 | #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \ | |
1663 | (rs6000_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS)) | |
1664 | ||
1665 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
1666 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
1667 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
1668 | ||
1669 | #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \ | |
1670 | (rs6000_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS)) | |
1671 | ||
1672 | /* If defined, a C expression whose value is zero if the attributes on | |
1673 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
1674 | two if they are nearly compatible (which causes a warning to be | |
1675 | generated). */ | |
1676 | ||
1677 | #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \ | |
1678 | (rs6000_comp_type_attributes (TYPE1, TYPE2)) | |
1679 | ||
1680 | /* If defined, a C statement that assigns default attributes to newly | |
1681 | defined TYPE. */ | |
1682 | ||
1683 | #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \ | |
1684 | (rs6000_set_default_type_attributes (TYPE)) | |
1685 | ||
1686 | \f | |
f33985c6 MS |
1687 | /* Definitions for __builtin_return_address and __builtin_frame_address. |
1688 | __builtin_return_address (0) should give link register (65), enable | |
1689 | this. */ | |
1690 | /* This should be uncommented, so that the link register is used, but | |
1691 | currently this would result in unmatched insns and spilling fixed | |
1692 | registers so we'll leave it for another day. When these problems are | |
1693 | taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. | |
1694 | (mrs) */ | |
1695 | /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
f09d4c33 | 1696 | |
b6c9286a MM |
1697 | /* Number of bytes into the frame return addresses can be found. See |
1698 | rs6000_stack_info in rs6000.c for more information on how the different | |
1699 | abi's store the return address. */ | |
1700 | #define RETURN_ADDRESS_OFFSET \ | |
1701 | ((DEFAULT_ABI == ABI_AIX \ | |
1702 | || DEFAULT_ABI == ABI_AIX_NODESC) ? 8 : \ | |
c81bebd7 MM |
1703 | (DEFAULT_ABI == ABI_V4 \ |
1704 | || DEFAULT_ABI == ABI_SOLARIS) ? (TARGET_32BIT ? 4 : 8) : \ | |
b6c9286a MM |
1705 | (DEFAULT_ABI == ABI_NT) ? -4 : \ |
1706 | (fatal ("RETURN_ADDRESS_OFFSET not supported"), 0)) | |
f09d4c33 | 1707 | |
f33985c6 MS |
1708 | /* The current return address is in link register (65). The return address |
1709 | of anything farther back is accessed normally at an offset of 8 from the | |
1710 | frame pointer. */ | |
1711 | #define RETURN_ADDR_RTX(count, frame) \ | |
1712 | ((count == -1) \ | |
39403d82 DE |
1713 | ? gen_rtx_REG (Pmode, 65) \ |
1714 | : gen_rtx_MEM (Pmode, \ | |
f09d4c33 | 1715 | memory_address (Pmode, \ |
39403d82 | 1716 | plus_constant (copy_to_reg (gen_rtx_MEM (Pmode, \ |
f09d4c33 RK |
1717 | memory_address (Pmode, frame))), \ |
1718 | RETURN_ADDRESS_OFFSET)))) | |
f33985c6 | 1719 | \f |
f045b2c9 RS |
1720 | /* Definitions for register eliminations. |
1721 | ||
1722 | We have two registers that can be eliminated on the RS/6000. First, the | |
1723 | frame pointer register can often be eliminated in favor of the stack | |
1724 | pointer register. Secondly, the argument pointer register can always be | |
642a35f1 JW |
1725 | eliminated; it is replaced with either the stack or frame pointer. |
1726 | ||
1727 | In addition, we use the elimination mechanism to see if r30 is needed | |
1728 | Initially we assume that it isn't. If it is, we spill it. This is done | |
1729 | by making it an eliminable register. We replace it with itself so that | |
1730 | if it isn't needed, then existing uses won't be modified. */ | |
f045b2c9 RS |
1731 | |
1732 | /* This is an array of structures. Each structure initializes one pair | |
1733 | of eliminable registers. The "from" register number is given first, | |
1734 | followed by "to". Eliminations of the same "from" register are listed | |
1735 | in order of preference. */ | |
1736 | #define ELIMINABLE_REGS \ | |
1737 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1738 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
642a35f1 JW |
1739 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
1740 | { 30, 30} } | |
f045b2c9 RS |
1741 | |
1742 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1743 | Frame pointer elimination is automatically handled. | |
1744 | ||
1745 | For the RS/6000, if frame pointer elimination is being done, we would like | |
642a35f1 JW |
1746 | to convert ap into fp, not sp. |
1747 | ||
abc95ed3 | 1748 | We need r30 if -mminimal-toc was specified, and there are constant pool |
642a35f1 | 1749 | references. */ |
f045b2c9 RS |
1750 | |
1751 | #define CAN_ELIMINATE(FROM, TO) \ | |
1752 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1753 | ? ! frame_pointer_needed \ | |
4697a36c | 1754 | : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \ |
f045b2c9 RS |
1755 | : 1) |
1756 | ||
1757 | /* Define the offset between two registers, one to be eliminated, and the other | |
1758 | its replacement, at the start of a routine. */ | |
1759 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1760 | { \ | |
4697a36c | 1761 | rs6000_stack_t *info = rs6000_stack_info (); \ |
f045b2c9 RS |
1762 | \ |
1763 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
4697a36c MM |
1764 | (OFFSET) = (info->push_p) ? 0 : - info->total_size; \ |
1765 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1766 | (OFFSET) = info->total_size; \ | |
1767 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1768 | (OFFSET) = (info->push_p) ? info->total_size : 0; \ | |
642a35f1 JW |
1769 | else if ((FROM) == 30) \ |
1770 | (OFFSET) = 0; \ | |
f045b2c9 RS |
1771 | else \ |
1772 | abort (); \ | |
1773 | } | |
1774 | \f | |
1775 | /* Addressing modes, and classification of registers for them. */ | |
1776 | ||
940da324 JL |
1777 | /* #define HAVE_POST_INCREMENT 0 */ |
1778 | /* #define HAVE_POST_DECREMENT 0 */ | |
f045b2c9 | 1779 | |
940da324 JL |
1780 | #define HAVE_PRE_DECREMENT 1 |
1781 | #define HAVE_PRE_INCREMENT 1 | |
f045b2c9 RS |
1782 | |
1783 | /* Macros to check register numbers against specific register classes. */ | |
1784 | ||
1785 | /* These assume that REGNO is a hard or pseudo reg number. | |
1786 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1787 | or a pseudo reg currently allocated to a suitable hard reg. | |
1788 | Since they use reg_renumber, they are safe only once reg_renumber | |
1789 | has been allocated, which happens in local-alloc.c. */ | |
1790 | ||
1791 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1792 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1793 | ? (REGNO) <= 31 || (REGNO) == 67 \ | |
1794 | : (reg_renumber[REGNO] >= 0 \ | |
1795 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1796 | ||
1797 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1798 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1799 | ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ | |
1800 | : (reg_renumber[REGNO] > 0 \ | |
1801 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1802 | \f | |
1803 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1804 | ||
1805 | #define MAX_REGS_PER_ADDRESS 2 | |
1806 | ||
1807 | /* Recognize any constant value that is a valid address. */ | |
1808 | ||
6eff269e BK |
1809 | #define CONSTANT_ADDRESS_P(X) \ |
1810 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1811 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1812 | || GET_CODE (X) == HIGH) | |
f045b2c9 RS |
1813 | |
1814 | /* Nonzero if the constant value X is a legitimate general operand. | |
1815 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1816 | ||
1817 | On the RS/6000, all integer constants are acceptable, most won't be valid | |
1818 | for particular insns, though. Only easy FP constants are | |
1819 | acceptable. */ | |
1820 | ||
1821 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1822 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
a260abc9 | 1823 | || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \ |
f045b2c9 RS |
1824 | || easy_fp_constant (X, GET_MODE (X))) |
1825 | ||
1826 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1827 | and check its validity for a certain class. | |
1828 | We have two alternate definitions for each of them. | |
1829 | The usual definition accepts all pseudo regs; the other rejects | |
1830 | them unless they have been allocated suitable hard regs. | |
1831 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1832 | ||
1833 | Most source files want to accept pseudo regs in the hope that | |
1834 | they will get allocated to the class that the insn wants them to be in. | |
1835 | Source files for reload pass need to be strict. | |
1836 | After reload, it makes no difference, since pseudo regs have | |
1837 | been eliminated by then. */ | |
1838 | ||
1839 | #ifndef REG_OK_STRICT | |
1840 | ||
1841 | /* Nonzero if X is a hard reg that can be used as an index | |
1842 | or if it is a pseudo reg. */ | |
1843 | #define REG_OK_FOR_INDEX_P(X) \ | |
1844 | (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
1845 | ||
1846 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1847 | or if it is a pseudo reg. */ | |
1848 | #define REG_OK_FOR_BASE_P(X) \ | |
1849 | (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) | |
1850 | ||
1851 | #else | |
1852 | ||
1853 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1854 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1855 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1856 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1857 | ||
1858 | #endif | |
1859 | \f | |
1860 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1861 | that is a valid memory address for an instruction. | |
1862 | The MODE argument is the machine mode for the MEM expression | |
1863 | that wants to use this address. | |
1864 | ||
1865 | On the RS/6000, there are four valid address: a SYMBOL_REF that | |
1866 | refers to a constant pool entry of an address (or the sum of it | |
1867 | plus a constant), a short (16-bit signed) constant plus a register, | |
1868 | the sum of two registers, or a register indirect, possibly with an | |
1869 | auto-increment. For DFmode and DImode with an constant plus register, | |
2f3e5814 | 1870 | we must ensure that both words are addressable or PowerPC64 with offset |
1427100a DE |
1871 | word aligned. |
1872 | ||
1873 | For modes spanning multiple registers (DFmode in 32-bit GPRs, | |
1874 | 32-bit DImode, TImode), indexed addressing cannot be used because | |
1875 | adjacent memory cells are accessed by adding word-sized offsets | |
1876 | during assembly output. */ | |
f045b2c9 RS |
1877 | |
1878 | #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ | |
4697a36c MM |
1879 | (TARGET_TOC && GET_CODE (X) == SYMBOL_REF \ |
1880 | && CONSTANT_POOL_ADDRESS_P (X) \ | |
f045b2c9 RS |
1881 | && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) |
1882 | ||
a260abc9 | 1883 | /* AIX64 guaranteed to have 64 bit TOC alignment. */ |
f045b2c9 RS |
1884 | #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ |
1885 | (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ | |
4697a36c MM |
1886 | || (TARGET_TOC \ |
1887 | && GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
f045b2c9 RS |
1888 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ |
1889 | && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) | |
1890 | ||
7509c759 | 1891 | #define LEGITIMATE_SMALL_DATA_P(MODE, X) \ |
c81bebd7 | 1892 | ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ |
81795281 | 1893 | && !flag_pic && !TARGET_TOC \ |
88228c4b MM |
1894 | && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \ |
1895 | && small_data_operand (X, MODE)) | |
7509c759 | 1896 | |
f045b2c9 RS |
1897 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ |
1898 | (GET_CODE (X) == CONST_INT \ | |
5b6f7b96 | 1899 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) |
f045b2c9 RS |
1900 | |
1901 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ | |
1902 | (GET_CODE (X) == PLUS \ | |
1903 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1904 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1905 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1906 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
2f3e5814 | 1907 | || (TARGET_32BIT \ |
1465faec DE |
1908 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \ |
1909 | : ! (INTVAL (XEXP (X, 1)) & 3))) \ | |
2f3e5814 | 1910 | && ((MODE) != TImode \ |
644d82dd | 1911 | || (TARGET_32BIT \ |
1465faec DE |
1912 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \ |
1913 | : (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \ | |
1914 | && ! (INTVAL (XEXP (X, 1)) & 3))))) | |
f045b2c9 RS |
1915 | |
1916 | #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ | |
1917 | (GET_CODE (X) == PLUS \ | |
1918 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1919 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1920 | && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1921 | && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ | |
1922 | || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1923 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) | |
1924 | ||
1925 | #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ | |
1926 | (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
1927 | ||
4697a36c MM |
1928 | #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \ |
1929 | (TARGET_ELF \ | |
81795281 | 1930 | && !flag_pic && !TARGET_TOC \ |
4697a36c MM |
1931 | && (MODE) != DImode \ |
1932 | && (MODE) != TImode \ | |
1933 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
1934 | && GET_CODE (X) == LO_SUM \ | |
1935 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1936 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1937 | && CONSTANT_P (XEXP (X, 1))) | |
1938 | ||
f045b2c9 RS |
1939 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1940 | { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ | |
1941 | goto ADDR; \ | |
0a90c336 | 1942 | if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \ |
38c1f2d7 | 1943 | && TARGET_UPDATE \ |
f045b2c9 RS |
1944 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ |
1945 | goto ADDR; \ | |
7509c759 MM |
1946 | if (LEGITIMATE_SMALL_DATA_P (MODE, X)) \ |
1947 | goto ADDR; \ | |
f045b2c9 RS |
1948 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ |
1949 | goto ADDR; \ | |
1950 | if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ | |
1951 | goto ADDR; \ | |
2f3e5814 | 1952 | if ((MODE) != TImode \ |
1427100a DE |
1953 | && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \ |
1954 | && (TARGET_POWERPC64 || (MODE) != DImode) \ | |
f045b2c9 RS |
1955 | && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ |
1956 | goto ADDR; \ | |
4697a36c MM |
1957 | if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X)) \ |
1958 | goto ADDR; \ | |
f045b2c9 RS |
1959 | } |
1960 | \f | |
1961 | /* Try machine-dependent ways of modifying an illegitimate address | |
1962 | to be legitimate. If we find one, return the new, valid address. | |
1963 | This macro is used in only one place: `memory_address' in explow.c. | |
1964 | ||
1965 | OLDX is the address as it was before break_out_memory_refs was called. | |
1966 | In some cases it is useful to look at this to decide what needs to be done. | |
1967 | ||
1968 | MODE and WIN are passed so that this macro can use | |
1969 | GO_IF_LEGITIMATE_ADDRESS. | |
1970 | ||
1971 | It is always safe for this macro to do nothing. It exists to recognize | |
1972 | opportunities to optimize the output. | |
1973 | ||
1974 | On RS/6000, first check for the sum of a register with a constant | |
1975 | integer that is out of range. If so, generate code to add the | |
1976 | constant with the low-order 16 bits masked to the register and force | |
1977 | this result into another register (this can be done with `cau'). | |
c81bebd7 | 1978 | Then generate an address of REG+(CONST&0xffff), allowing for the |
f045b2c9 RS |
1979 | possibility of bit 16 being a one. |
1980 | ||
1981 | Then check for the sum of a register and something not constant, try to | |
1982 | load the other things into a register and return the sum. */ | |
1983 | ||
4697a36c MM |
1984 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ |
1985 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1986 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
5b6f7b96 | 1987 | && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ |
354b734b MM |
1988 | { HOST_WIDE_INT high_int, low_int; \ |
1989 | rtx sum; \ | |
1990 | high_int = INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff); \ | |
4697a36c MM |
1991 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ |
1992 | if (low_int & 0x8000) \ | |
354b734b | 1993 | high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ |
39403d82 | 1994 | sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \ |
354b734b | 1995 | GEN_INT (high_int)), 0); \ |
39403d82 | 1996 | (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \ |
4697a36c MM |
1997 | goto WIN; \ |
1998 | } \ | |
1999 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
2000 | && GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1427100a DE |
2001 | && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \ |
2002 | && (TARGET_POWERPC64 || (MODE) != DImode) \ | |
2f3e5814 | 2003 | && (MODE) != TImode) \ |
4697a36c | 2004 | { \ |
39403d82 | 2005 | (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ |
0a90c336 | 2006 | force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ |
4697a36c MM |
2007 | goto WIN; \ |
2008 | } \ | |
2f3e5814 | 2009 | else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \ |
461422d5 | 2010 | && !flag_pic \ |
4697a36c MM |
2011 | && GET_CODE (X) != CONST_INT \ |
2012 | && GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X) \ | |
2013 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
2014 | && (MODE) != DImode && (MODE) != TImode) \ | |
2015 | { \ | |
2016 | rtx reg = gen_reg_rtx (Pmode); \ | |
2017 | emit_insn (gen_elf_high (reg, (X))); \ | |
39403d82 | 2018 | (X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \ |
fbd2bdda | 2019 | goto WIN; \ |
4697a36c | 2020 | } \ |
f045b2c9 RS |
2021 | } |
2022 | ||
a260abc9 DE |
2023 | /* Try a machine-dependent way of reloading an illegitimate address |
2024 | operand. If we find one, push the reload and jump to WIN. This | |
2025 | macro is used in only one place: `find_reloads_address' in reload.c. | |
2026 | ||
2027 | For RS/6000, we wish to handle large displacements off a base | |
2028 | register by splitting the addend across an addiu/addis and the mem insn. | |
2029 | This cuts number of extra insns needed from 3 to 1. */ | |
2030 | ||
2031 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ | |
2032 | do { \ | |
c8ab9901 RH |
2033 | /* We must recognize output that we have already generated ourselves. */ \ |
2034 | if (GET_CODE (X) == PLUS \ | |
2035 | && GET_CODE (XEXP (X, 0)) == PLUS \ | |
2036 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \ | |
2037 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ | |
2038 | && GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
2039 | { \ | |
2040 | push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \ | |
2041 | BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \ | |
2042 | OPNUM, TYPE); \ | |
2043 | goto WIN; \ | |
2044 | } \ | |
a260abc9 DE |
2045 | if (GET_CODE (X) == PLUS \ |
2046 | && GET_CODE (XEXP (X, 0)) == REG \ | |
2047 | && REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \ | |
2048 | && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \ | |
2049 | && GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
2050 | { \ | |
2051 | HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ | |
2052 | HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; \ | |
2053 | HOST_WIDE_INT high \ | |
2054 | = (((val - low) & 0xffffffff) ^ 0x80000000) - 0x80000000; \ | |
2055 | \ | |
2056 | /* Check for 32-bit overflow. */ \ | |
2057 | if (high + low != val) \ | |
2058 | break; \ | |
2059 | \ | |
2060 | /* Reload the high part into a base reg; leave the low part \ | |
2061 | in the mem directly. */ \ | |
2062 | \ | |
2063 | X = gen_rtx_PLUS (GET_MODE (X), \ | |
2064 | gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \ | |
2065 | GEN_INT (high)), \ | |
2066 | GEN_INT (low)); \ | |
2067 | \ | |
2068 | push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \ | |
2069 | BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \ | |
2070 | OPNUM, TYPE); \ | |
2071 | goto WIN; \ | |
2072 | } \ | |
2073 | } while (0) | |
2074 | ||
f045b2c9 RS |
2075 | /* Go to LABEL if ADDR (a legitimate address expression) |
2076 | has an effect that depends on the machine mode it is used for. | |
2077 | ||
2078 | On the RS/6000 this is true if the address is valid with a zero offset | |
2079 | but not with an offset of four (this means it cannot be used as an | |
2080 | address for DImode or DFmode) or is a pre-increment or decrement. Since | |
2081 | we know it is valid, we just check for an address that is not valid with | |
2082 | an offset of four. */ | |
2083 | ||
2084 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
2085 | { if (GET_CODE (ADDR) == PLUS \ | |
2086 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ | |
2f3e5814 DE |
2087 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \ |
2088 | (TARGET_32BIT ? 4 : 8))) \ | |
f045b2c9 | 2089 | goto LABEL; \ |
38c1f2d7 | 2090 | if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_INC) \ |
f045b2c9 | 2091 | goto LABEL; \ |
38c1f2d7 | 2092 | if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_DEC) \ |
f045b2c9 | 2093 | goto LABEL; \ |
4697a36c MM |
2094 | if (GET_CODE (ADDR) == LO_SUM) \ |
2095 | goto LABEL; \ | |
f045b2c9 | 2096 | } |
766a866c MM |
2097 | \f |
2098 | /* The register number of the register used to address a table of | |
2099 | static data addresses in memory. In some cases this register is | |
2100 | defined by a processor's "application binary interface" (ABI). | |
2101 | When this macro is defined, RTL is generated for this register | |
2102 | once, as with the stack pointer and frame pointer registers. If | |
2103 | this macro is not defined, it is up to the machine-dependent files | |
2104 | to allocate such a register (if necessary). */ | |
2105 | ||
8d30c4ee | 2106 | #define PIC_OFFSET_TABLE_REGNUM 30 |
766a866c MM |
2107 | |
2108 | /* Define this macro if the register defined by | |
2109 | `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. Do not define | |
2110 | this macro if `PPIC_OFFSET_TABLE_REGNUM' is not defined. */ | |
2111 | ||
2112 | /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
2113 | ||
2114 | /* By generating position-independent code, when two different | |
2115 | programs (A and B) share a common library (libC.a), the text of | |
2116 | the library can be shared whether or not the library is linked at | |
2117 | the same address for both programs. In some of these | |
2118 | environments, position-independent code requires not only the use | |
2119 | of different addressing modes, but also special code to enable the | |
2120 | use of these addressing modes. | |
2121 | ||
2122 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2123 | codes once the function is being compiled into assembly code, but | |
2124 | not before. (It is not done before, because in the case of | |
2125 | compiling an inline function, it would lead to multiple PIC | |
2126 | prologues being included in functions which used inline functions | |
2127 | and were compiled to assembly language.) */ | |
2128 | ||
8d30c4ee | 2129 | /* #define FINALIZE_PIC */ |
766a866c | 2130 | |
766a866c MM |
2131 | /* A C expression that is nonzero if X is a legitimate immediate |
2132 | operand on the target machine when generating position independent | |
2133 | code. You can assume that X satisfies `CONSTANT_P', so you need | |
2134 | not check this. You can also assume FLAG_PIC is true, so you need | |
2135 | not check it either. You need not define this macro if all | |
2136 | constants (including `SYMBOL_REF') can be immediate operands when | |
2137 | generating position independent code. */ | |
2138 | ||
2139 | /* #define LEGITIMATE_PIC_OPERAND_P (X) */ | |
2140 | ||
30ea98f1 MM |
2141 | /* In rare cases, correct code generation requires extra machine |
2142 | dependent processing between the second jump optimization pass and | |
2143 | delayed branch scheduling. On those machines, define this macro | |
2144 | as a C statement to act on the code starting at INSN. | |
2145 | ||
2146 | On the RS/6000, we use it to make sure the GOT_TOC register marker | |
2147 | that FINALIZE_PIC is supposed to remove actually got removed. */ | |
2148 | ||
2149 | #define MACHINE_DEPENDENT_REORG(INSN) rs6000_reorg (INSN) | |
2150 | ||
f045b2c9 RS |
2151 | \f |
2152 | /* Define this if some processing needs to be done immediately before | |
4255474b | 2153 | emitting code for an insn. */ |
f045b2c9 | 2154 | |
4255474b | 2155 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ |
f045b2c9 RS |
2156 | |
2157 | /* Specify the machine mode that this machine uses | |
2158 | for the index in the tablejump instruction. */ | |
2f3e5814 | 2159 | #define CASE_VECTOR_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 | 2160 | |
18543a22 ILT |
2161 | /* Define as C expression which evaluates to nonzero if the tablejump |
2162 | instruction expects the table to contain offsets from the address of the | |
2163 | table. | |
2164 | Do not define this if the table should contain absolute addresses. */ | |
2165 | #define CASE_VECTOR_PC_RELATIVE 1 | |
f045b2c9 RS |
2166 | |
2167 | /* Specify the tree operation to be used to convert reals to integers. */ | |
2168 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
2169 | ||
2170 | /* This is the kind of divide that is easiest to do in the general case. */ | |
2171 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
2172 | ||
2173 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
2174 | #define DEFAULT_SIGNED_CHAR 0 | |
2175 | ||
2176 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
2177 | also convert validly to an unsigned one. */ | |
2178 | ||
2179 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
2180 | ||
2181 | /* Max number of bytes we can move from memory to memory | |
2182 | in one reasonably fast instruction. */ | |
2f3e5814 | 2183 | #define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8) |
7e69e155 | 2184 | #define MAX_MOVE_MAX 8 |
f045b2c9 RS |
2185 | |
2186 | /* Nonzero if access to memory by bytes is no faster than for words. | |
2187 | Also non-zero if doing byte operations (specifically shifts) in registers | |
2188 | is undesirable. */ | |
2189 | #define SLOW_BYTE_ACCESS 1 | |
2190 | ||
9a63901f RK |
2191 | /* Define if operations between registers always perform the operation |
2192 | on the full register even if a narrower mode is specified. */ | |
2193 | #define WORD_REGISTER_OPERATIONS | |
2194 | ||
2195 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
2196 | will either zero-extend or sign-extend. The value of this macro should | |
2197 | be the code that says which one of the two operations is implicitly | |
2198 | done, NIL if none. */ | |
2199 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
225211e2 RK |
2200 | |
2201 | /* Define if loading short immediate values into registers sign extends. */ | |
2202 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
fdaff8ba RS |
2203 | \f |
2204 | /* The RS/6000 uses the XCOFF format. */ | |
f045b2c9 | 2205 | |
fdaff8ba | 2206 | #define XCOFF_DEBUGGING_INFO |
f045b2c9 | 2207 | |
c5abcf1d CH |
2208 | /* Define if the object format being used is COFF or a superset. */ |
2209 | #define OBJECT_FORMAT_COFF | |
2210 | ||
b9af8fb0 | 2211 | /* Define the magic numbers that we recognize as COFF. |
bf034054 | 2212 | |
a260abc9 DE |
2213 | AIX 4.3 adds U803XTOCMAGIC (0757) for 64-bit objects, but collect2.c |
2214 | does not include files in the correct order to conditionally define | |
bf034054 DE |
2215 | the symbolic name in this macro. |
2216 | ||
2217 | The AIX linker accepts import/export files as object files, | |
2218 | so accept "#!" (0x2321) magic number. */ | |
2c440f06 | 2219 | #define MY_ISCOFF(magic) \ |
b9af8fb0 | 2220 | ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC \ |
bf034054 | 2221 | || (magic) == U802TOCMAGIC || (magic) == 0757 || (magic) == 0x2321) |
2c440f06 | 2222 | |
115e69a9 RK |
2223 | /* This is the only version of nm that collect2 can work with. */ |
2224 | #define REAL_NM_FILE_NAME "/usr/ucb/nm" | |
2225 | ||
f045b2c9 RS |
2226 | /* We don't have GAS for the RS/6000 yet, so don't write out special |
2227 | .stabs in cc1plus. */ | |
c81bebd7 | 2228 | |
f045b2c9 | 2229 | #define FASCIST_ASSEMBLER |
b6c9286a | 2230 | |
4cacd7a0 KE |
2231 | /* AIX does not have any init/fini or ctor/dtor sections, so create |
2232 | static constructors and destructors as normal functions. */ | |
2233 | /* #define ASM_OUTPUT_CONSTRUCTOR(file, name) */ | |
2234 | /* #define ASM_OUTPUT_DESTRUCTOR(file, name) */ | |
f045b2c9 | 2235 | |
f045b2c9 RS |
2236 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
2237 | is done just by pretending it is already truncated. */ | |
2238 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
2239 | ||
2240 | /* Specify the machine mode that pointers have. | |
2241 | After generation of rtl, the compiler makes no further distinction | |
2242 | between pointers and any other objects of this machine mode. */ | |
2f3e5814 | 2243 | #define Pmode (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
2244 | |
2245 | /* Mode of a function address in a call instruction (for indexing purposes). | |
f045b2c9 | 2246 | Doesn't matter on RS/6000. */ |
2f3e5814 | 2247 | #define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
2248 | |
2249 | /* Define this if addresses of constant functions | |
2250 | shouldn't be put through pseudo regs where they can be cse'd. | |
2251 | Desirable on machines where ordinary constants are expensive | |
2252 | but a CALL with constant address is cheap. */ | |
2253 | #define NO_FUNCTION_CSE | |
2254 | ||
d969caf8 | 2255 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
6febd581 RK |
2256 | few bits. |
2257 | ||
2258 | The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED | |
2259 | have been dropped from the PowerPC architecture. */ | |
2260 | ||
4697a36c | 2261 | #define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0) |
f045b2c9 RS |
2262 | |
2263 | /* Use atexit for static constructors/destructors, instead of defining | |
2264 | our own exit function. */ | |
2265 | #define HAVE_ATEXIT | |
2266 | ||
2267 | /* Compute the cost of computing a constant rtl expression RTX | |
2268 | whose rtx-code is CODE. The body of this macro is a portion | |
2269 | of a switch statement. If the code is computed here, | |
2270 | return it with a return statement. Otherwise, break from the switch. | |
2271 | ||
01554f00 | 2272 | On the RS/6000, if it is valid in the insn, it is free. So this |
f045b2c9 RS |
2273 | always returns 0. */ |
2274 | ||
4697a36c | 2275 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
f045b2c9 RS |
2276 | case CONST_INT: \ |
2277 | case CONST: \ | |
2278 | case LABEL_REF: \ | |
2279 | case SYMBOL_REF: \ | |
2280 | case CONST_DOUBLE: \ | |
4697a36c | 2281 | case HIGH: \ |
f045b2c9 RS |
2282 | return 0; |
2283 | ||
2284 | /* Provide the costs of a rtl expression. This is in the body of a | |
2285 | switch on CODE. */ | |
2286 | ||
38c1f2d7 MM |
2287 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
2288 | case PLUS: \ | |
2289 | return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
a260abc9 DE |
2290 | && ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) \ |
2291 | + 0x8000) >= 0x10000) \ | |
296b8152 | 2292 | && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ |
38c1f2d7 MM |
2293 | ? COSTS_N_INSNS (2) \ |
2294 | : COSTS_N_INSNS (1)); \ | |
2295 | case AND: \ | |
38c1f2d7 MM |
2296 | case IOR: \ |
2297 | case XOR: \ | |
a260abc9 DE |
2298 | return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ |
2299 | && (INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff)) != 0 \ | |
296b8152 | 2300 | && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ |
38c1f2d7 MM |
2301 | ? COSTS_N_INSNS (2) \ |
2302 | : COSTS_N_INSNS (1)); \ | |
2303 | case MULT: \ | |
2304 | switch (rs6000_cpu) \ | |
2305 | { \ | |
2306 | case PROCESSOR_RIOS1: \ | |
2307 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
2308 | ? COSTS_N_INSNS (5) \ | |
2309 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
2310 | ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ | |
2311 | case PROCESSOR_RIOS2: \ | |
2312 | case PROCESSOR_MPCCORE: \ | |
5a41b476 | 2313 | case PROCESSOR_PPC604e: \ |
38c1f2d7 MM |
2314 | return COSTS_N_INSNS (2); \ |
2315 | case PROCESSOR_PPC601: \ | |
2316 | return COSTS_N_INSNS (5); \ | |
2317 | case PROCESSOR_PPC603: \ | |
bef84347 | 2318 | case PROCESSOR_PPC750: \ |
38c1f2d7 MM |
2319 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ |
2320 | ? COSTS_N_INSNS (5) \ | |
2321 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
2322 | ? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \ | |
2323 | case PROCESSOR_PPC403: \ | |
2324 | case PROCESSOR_PPC604: \ | |
2325 | case PROCESSOR_PPC620: \ | |
2326 | return COSTS_N_INSNS (4); \ | |
2327 | } \ | |
2328 | case DIV: \ | |
2329 | case MOD: \ | |
2330 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
2331 | && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ | |
2332 | return COSTS_N_INSNS (2); \ | |
2333 | /* otherwise fall through to normal divide. */ \ | |
2334 | case UDIV: \ | |
2335 | case UMOD: \ | |
2336 | switch (rs6000_cpu) \ | |
2337 | { \ | |
2338 | case PROCESSOR_RIOS1: \ | |
2339 | return COSTS_N_INSNS (19); \ | |
2340 | case PROCESSOR_RIOS2: \ | |
2341 | return COSTS_N_INSNS (13); \ | |
2342 | case PROCESSOR_MPCCORE: \ | |
2343 | return COSTS_N_INSNS (6); \ | |
2344 | case PROCESSOR_PPC403: \ | |
2345 | return COSTS_N_INSNS (33); \ | |
2346 | case PROCESSOR_PPC601: \ | |
2347 | return COSTS_N_INSNS (36); \ | |
2348 | case PROCESSOR_PPC603: \ | |
2349 | return COSTS_N_INSNS (37); \ | |
2350 | case PROCESSOR_PPC604: \ | |
5a41b476 | 2351 | case PROCESSOR_PPC604e: \ |
38c1f2d7 MM |
2352 | case PROCESSOR_PPC620: \ |
2353 | return COSTS_N_INSNS (20); \ | |
bef84347 VM |
2354 | case PROCESSOR_PPC750: \ |
2355 | return COSTS_N_INSNS (19); \ | |
38c1f2d7 MM |
2356 | } \ |
2357 | case FFS: \ | |
2358 | return COSTS_N_INSNS (4); \ | |
2359 | case MEM: \ | |
f045b2c9 RS |
2360 | /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ |
2361 | return 5; | |
2362 | ||
2363 | /* Compute the cost of an address. This is meant to approximate the size | |
2364 | and/or execution delay of an insn using that address. If the cost is | |
2365 | approximated by the RTL complexity, including CONST_COSTS above, as | |
2366 | is usually the case for CISC machines, this macro should not be defined. | |
2367 | For aggressively RISCy machines, only one insn format is allowed, so | |
2368 | this macro should be a constant. The value of this macro only matters | |
2369 | for valid addresses. | |
2370 | ||
2371 | For the RS/6000, everything is cost 0. */ | |
2372 | ||
2373 | #define ADDRESS_COST(RTX) 0 | |
2374 | ||
2375 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
2376 | should be adjusted to reflect any required changes. This macro is used when | |
2377 | there is some systematic length adjustment required that would be difficult | |
2378 | to express in the length attribute. */ | |
2379 | ||
2380 | /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ | |
2381 | ||
2382 | /* Add any extra modes needed to represent the condition code. | |
2383 | ||
2384 | For the RS/6000, we need separate modes when unsigned (logical) comparisons | |
c5defebb RK |
2385 | are being done and we need a separate mode for floating-point. We also |
2386 | use a mode for the case when we are comparing the results of two | |
2387 | comparisons. */ | |
f045b2c9 | 2388 | |
c5defebb | 2389 | #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode |
f045b2c9 RS |
2390 | |
2391 | /* Define the names for the modes specified above. */ | |
c5defebb | 2392 | #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" |
f045b2c9 RS |
2393 | |
2394 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
2395 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
c5defebb RK |
2396 | should be used. CCUNSmode should be used for unsigned comparisons. |
2397 | CCEQmode should be used when we are doing an inequality comparison on | |
2398 | the result of a comparison. CCmode should be used in all other cases. */ | |
2399 | ||
b565a316 | 2400 | #define SELECT_CC_MODE(OP,X,Y) \ |
f045b2c9 | 2401 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ |
c5defebb RK |
2402 | : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ |
2403 | : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ | |
2404 | ? CCEQmode : CCmode)) | |
f045b2c9 RS |
2405 | |
2406 | /* Define the information needed to generate branch and scc insns. This is | |
2407 | stored from the compare operation. Note that we can't use "rtx" here | |
2408 | since it hasn't been defined! */ | |
2409 | ||
2410 | extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; | |
2411 | extern int rs6000_compare_fp_p; | |
2412 | ||
2413 | /* Set to non-zero by "fix" operation to indicate that itrunc and | |
2414 | uitrunc must be defined. */ | |
2415 | ||
2416 | extern int rs6000_trunc_used; | |
9929b575 ILT |
2417 | |
2418 | /* Function names to call to do floating point truncation. */ | |
2419 | ||
5bf6466a DE |
2420 | #define RS6000_ITRUNC "__itrunc" |
2421 | #define RS6000_UITRUNC "__uitrunc" | |
4d30c363 MM |
2422 | |
2423 | /* Prefix and suffix to use to saving floating point */ | |
2424 | #ifndef SAVE_FP_PREFIX | |
2425 | #define SAVE_FP_PREFIX "._savef" | |
2426 | #define SAVE_FP_SUFFIX "" | |
2427 | #endif | |
2428 | ||
2429 | /* Prefix and suffix to use to restoring floating point */ | |
2430 | #ifndef RESTORE_FP_PREFIX | |
2431 | #define RESTORE_FP_PREFIX "._restf" | |
2432 | #define RESTORE_FP_SUFFIX "" | |
2433 | #endif | |
2434 | ||
5bf6466a DE |
2435 | /* Function name to call to do profiling. */ |
2436 | #define RS6000_MCOUNT ".__mcount" | |
2437 | ||
f045b2c9 RS |
2438 | \f |
2439 | /* Control the assembler format that we output. */ | |
2440 | ||
1b279f39 DE |
2441 | /* A C string constant describing how to begin a comment in the target |
2442 | assembler language. The compiler assumes that the comment will end at | |
2443 | the end of the line. */ | |
2444 | #define ASM_COMMENT_START " #" | |
6b67933e | 2445 | |
f045b2c9 RS |
2446 | /* Output at beginning of assembler file. |
2447 | ||
b4d6689b | 2448 | Initialize the section names for the RS/6000 at this point. |
fdaff8ba | 2449 | |
6355b140 | 2450 | Specify filename to assembler. |
3fc2151d | 2451 | |
b4d6689b | 2452 | We want to go into the TOC section so at least one .toc will be emitted. |
fdaff8ba | 2453 | Also, in order to output proper .bs/.es pairs, we need at least one static |
b4d6689b RK |
2454 | [RW] section emitted. |
2455 | ||
2456 | We then switch back to text to force the gcc2_compiled. label and the space | |
c81bebd7 | 2457 | allocated after it (when profiling) into the text section. |
b4d6689b RK |
2458 | |
2459 | Finally, declare mcount when profiling to make the assembler happy. */ | |
f045b2c9 RS |
2460 | |
2461 | #define ASM_FILE_START(FILE) \ | |
2462 | { \ | |
fdaff8ba | 2463 | rs6000_gen_section_name (&xcoff_bss_section_name, \ |
f045b2c9 | 2464 | main_input_filename, ".bss_"); \ |
fdaff8ba | 2465 | rs6000_gen_section_name (&xcoff_private_data_section_name, \ |
f045b2c9 | 2466 | main_input_filename, ".rw_"); \ |
fdaff8ba | 2467 | rs6000_gen_section_name (&xcoff_read_only_section_name, \ |
f045b2c9 RS |
2468 | main_input_filename, ".ro_"); \ |
2469 | \ | |
6355b140 | 2470 | output_file_directive (FILE, main_input_filename); \ |
a260abc9 DE |
2471 | if (TARGET_64BIT) \ |
2472 | fputs ("\t.machine\t\"ppc64\"\n", FILE); \ | |
f045b2c9 | 2473 | toc_section (); \ |
fdaff8ba RS |
2474 | if (write_symbols != NO_DEBUG) \ |
2475 | private_data_section (); \ | |
b4d6689b RK |
2476 | text_section (); \ |
2477 | if (profile_flag) \ | |
5bf6466a | 2478 | fprintf (FILE, "\t.extern %s\n", RS6000_MCOUNT); \ |
3cfa4909 | 2479 | rs6000_file_start (FILE, TARGET_CPU_DEFAULT); \ |
f045b2c9 RS |
2480 | } |
2481 | ||
2482 | /* Output at end of assembler file. | |
2483 | ||
2484 | On the RS/6000, referencing data should automatically pull in text. */ | |
2485 | ||
2486 | #define ASM_FILE_END(FILE) \ | |
2487 | { \ | |
2488 | text_section (); \ | |
19d2d16f | 2489 | fputs ("_section_.text:\n", FILE); \ |
f045b2c9 | 2490 | data_section (); \ |
19d2d16f | 2491 | fputs ("\t.long _section_.text\n", FILE); \ |
f045b2c9 RS |
2492 | } |
2493 | ||
f045b2c9 RS |
2494 | /* We define this to prevent the name mangler from putting dollar signs into |
2495 | function names. */ | |
2496 | ||
2497 | #define NO_DOLLAR_IN_LABEL | |
2498 | ||
2499 | /* We define this to 0 so that gcc will never accept a dollar sign in a | |
2500 | variable name. This is needed because the AIX assembler will not accept | |
2501 | dollar signs. */ | |
2502 | ||
2503 | #define DOLLARS_IN_IDENTIFIERS 0 | |
2504 | ||
fdaff8ba RS |
2505 | /* Implicit library calls should use memcpy, not bcopy, etc. */ |
2506 | ||
2507 | #define TARGET_MEM_FUNCTIONS | |
2508 | ||
f045b2c9 RS |
2509 | /* Define the extra sections we need. We define three: one is the read-only |
2510 | data section which is used for constants. This is a csect whose name is | |
2511 | derived from the name of the input file. The second is for initialized | |
2512 | global variables. This is a csect whose name is that of the variable. | |
2513 | The third is the TOC. */ | |
2514 | ||
2515 | #define EXTRA_SECTIONS \ | |
2516 | read_only_data, private_data, read_only_private_data, toc, bss | |
2517 | ||
2518 | /* Define the name of our readonly data section. */ | |
2519 | ||
2520 | #define READONLY_DATA_SECTION read_only_data_section | |
2521 | ||
9704efe6 MS |
2522 | |
2523 | /* Define the name of the section to use for the exception tables. | |
2524 | TODO: test and see if we can use read_only_data_section, if so, | |
2525 | remove this. */ | |
2526 | ||
2527 | #define EXCEPTION_SECTION data_section | |
2528 | ||
b4f892eb RK |
2529 | /* If we are referencing a function that is static or is known to be |
2530 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
2531 | that we can branch to this function without emitting a no-op after the | |
2532 | call. */ | |
2533 | ||
2534 | #define ENCODE_SECTION_INFO(DECL) \ | |
2535 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
2536 | && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ | |
2537 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; | |
2538 | ||
f045b2c9 RS |
2539 | /* Indicate that jump tables go in the text section. */ |
2540 | ||
75197b37 | 2541 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
f045b2c9 | 2542 | |
bf034054 DE |
2543 | /* Define the routines to implement these extra sections. |
2544 | BIGGEST_ALIGNMENT is 64, so align the sections that much. */ | |
f045b2c9 RS |
2545 | |
2546 | #define EXTRA_SECTION_FUNCTIONS \ | |
2547 | \ | |
2548 | void \ | |
2549 | read_only_data_section () \ | |
2550 | { \ | |
2551 | if (in_section != read_only_data) \ | |
2552 | { \ | |
bf034054 DE |
2553 | fprintf (asm_out_file, ".csect %s[RO],3\n", \ |
2554 | xcoff_read_only_section_name); \ | |
f045b2c9 RS |
2555 | in_section = read_only_data; \ |
2556 | } \ | |
2557 | } \ | |
2558 | \ | |
2559 | void \ | |
2560 | private_data_section () \ | |
2561 | { \ | |
2562 | if (in_section != private_data) \ | |
2563 | { \ | |
bf034054 DE |
2564 | fprintf (asm_out_file, ".csect %s[RW],3\n", \ |
2565 | xcoff_private_data_section_name); \ | |
f045b2c9 RS |
2566 | in_section = private_data; \ |
2567 | } \ | |
2568 | } \ | |
2569 | \ | |
2570 | void \ | |
2571 | read_only_private_data_section () \ | |
2572 | { \ | |
2573 | if (in_section != read_only_private_data) \ | |
2574 | { \ | |
bf034054 DE |
2575 | fprintf (asm_out_file, ".csect %s[RO],3\n", \ |
2576 | xcoff_private_data_section_name); \ | |
f045b2c9 RS |
2577 | in_section = read_only_private_data; \ |
2578 | } \ | |
2579 | } \ | |
2580 | \ | |
2581 | void \ | |
2582 | toc_section () \ | |
2583 | { \ | |
642a35f1 JW |
2584 | if (TARGET_MINIMAL_TOC) \ |
2585 | { \ | |
642a35f1 JW |
2586 | /* toc_section is always called at least once from ASM_FILE_START, \ |
2587 | so this is guaranteed to always be defined once and only once \ | |
2588 | in each file. */ \ | |
2589 | if (! toc_initialized) \ | |
2590 | { \ | |
19d2d16f MM |
2591 | fputs (".toc\nLCTOC..0:\n", asm_out_file); \ |
2592 | fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \ | |
642a35f1 JW |
2593 | toc_initialized = 1; \ |
2594 | } \ | |
f045b2c9 | 2595 | \ |
642a35f1 | 2596 | if (in_section != toc) \ |
bfc79d3b DE |
2597 | fprintf (asm_out_file, ".csect toc_table[RW]%s\n", \ |
2598 | (TARGET_32BIT ? "" : ",3")); \ | |
642a35f1 JW |
2599 | } \ |
2600 | else \ | |
2601 | { \ | |
2602 | if (in_section != toc) \ | |
19d2d16f | 2603 | fputs (".toc\n", asm_out_file); \ |
642a35f1 | 2604 | } \ |
f045b2c9 | 2605 | in_section = toc; \ |
fc3ffe83 | 2606 | } |
f045b2c9 | 2607 | |
38c1f2d7 MM |
2608 | /* Flag to say the TOC is initialized */ |
2609 | extern int toc_initialized; | |
2610 | ||
f045b2c9 RS |
2611 | /* This macro produces the initial definition of a function name. |
2612 | On the RS/6000, we need to place an extra '.' in the function name and | |
c81bebd7 | 2613 | output the function descriptor. |
f045b2c9 RS |
2614 | |
2615 | The csect for the function will have already been created by the | |
2616 | `text_section' call previously done. We do have to go back to that | |
2617 | csect, however. */ | |
2618 | ||
fdaff8ba RS |
2619 | /* ??? What do the 16 and 044 in the .function line really mean? */ |
2620 | ||
f045b2c9 RS |
2621 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
2622 | { if (TREE_PUBLIC (DECL)) \ | |
2623 | { \ | |
19d2d16f | 2624 | fputs ("\t.globl .", FILE); \ |
f045b2c9 | 2625 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2626 | putc ('\n', FILE); \ |
fdaff8ba | 2627 | } \ |
3ce428da | 2628 | else \ |
fdaff8ba | 2629 | { \ |
19d2d16f | 2630 | fputs ("\t.lglobl .", FILE); \ |
fdaff8ba | 2631 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2632 | putc ('\n', FILE); \ |
f045b2c9 | 2633 | } \ |
19d2d16f | 2634 | fputs (".csect ", FILE); \ |
f045b2c9 | 2635 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
a260abc9 | 2636 | fputs (TARGET_32BIT ? "[DS]\n" : "[DS],3\n", FILE); \ |
f045b2c9 | 2637 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2638 | fputs (":\n", FILE); \ |
a260abc9 | 2639 | fputs (TARGET_32BIT ? "\t.long ." : "\t.llong .", FILE); \ |
f045b2c9 | 2640 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f MM |
2641 | fputs (", TOC[tc0], 0\n", FILE); \ |
2642 | fputs (".csect .text[PR]\n.", FILE); \ | |
f045b2c9 | 2643 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2644 | fputs (":\n", FILE); \ |
fdaff8ba | 2645 | if (write_symbols == XCOFF_DEBUG) \ |
c2a47e48 | 2646 | xcoffout_declare_function (FILE, DECL, NAME); \ |
f045b2c9 RS |
2647 | } |
2648 | ||
2649 | /* Return non-zero if this entry is to be written into the constant pool | |
2650 | in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST | |
2651 | containing one of them. If -mfp-in-toc (the default), we also do | |
2652 | this for floating-point constants. We actually can only do this | |
2653 | if the FP formats of the target and host machines are the same, but | |
2654 | we can't check that since not every file that uses | |
2655 | GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ | |
2656 | ||
4697a36c MM |
2657 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ |
2658 | (TARGET_TOC \ | |
2659 | && (GET_CODE (X) == SYMBOL_REF \ | |
2660 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
2661 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ | |
2662 | || GET_CODE (X) == LABEL_REF \ | |
2663 | || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ | |
2664 | && GET_CODE (X) == CONST_DOUBLE \ | |
a260abc9 DE |
2665 | && (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ |
2666 | || (TARGET_POWERPC64 && GET_MODE (X) == DImode))))) | |
2667 | #if 0 | |
4697a36c | 2668 | && BITS_PER_WORD == HOST_BITS_PER_INT))) |
a260abc9 | 2669 | #endif |
f045b2c9 RS |
2670 | |
2671 | /* Select section for constant in constant pool. | |
2672 | ||
2673 | On RS/6000, all constants are in the private read-only data area. | |
2674 | However, if this is being placed in the TOC it must be output as a | |
2675 | toc entry. */ | |
2676 | ||
2677 | #define SELECT_RTX_SECTION(MODE, X) \ | |
2678 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2679 | toc_section (); \ | |
2680 | else \ | |
2681 | read_only_private_data_section (); \ | |
2682 | } | |
2683 | ||
2684 | /* Macro to output a special constant pool entry. Go to WIN if we output | |
2685 | it. Otherwise, it is written the usual way. | |
2686 | ||
2687 | On the RS/6000, toc entries are handled this way. */ | |
2688 | ||
2689 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ | |
2690 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2691 | { \ | |
2692 | output_toc (FILE, X, LABELNO); \ | |
2693 | goto WIN; \ | |
2694 | } \ | |
2695 | } | |
2696 | ||
2697 | /* Select the section for an initialized data object. | |
2698 | ||
2699 | On the RS/6000, we have a special section for all variables except those | |
2700 | that are static. */ | |
2701 | ||
2702 | #define SELECT_SECTION(EXP,RELOC) \ | |
2703 | { \ | |
ed8969fa | 2704 | if ((TREE_CODE (EXP) == STRING_CST \ |
949ea356 | 2705 | && ! flag_writable_strings) \ |
128e5769 | 2706 | || (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \ |
1ff5cbcd | 2707 | && TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \ |
ed8969fa JW |
2708 | && DECL_INITIAL (EXP) \ |
2709 | && (DECL_INITIAL (EXP) == error_mark_node \ | |
2710 | || TREE_CONSTANT (DECL_INITIAL (EXP))) \ | |
2711 | && ! (RELOC))) \ | |
f045b2c9 RS |
2712 | { \ |
2713 | if (TREE_PUBLIC (EXP)) \ | |
2714 | read_only_data_section (); \ | |
2715 | else \ | |
2716 | read_only_private_data_section (); \ | |
2717 | } \ | |
2718 | else \ | |
2719 | { \ | |
2720 | if (TREE_PUBLIC (EXP)) \ | |
2721 | data_section (); \ | |
2722 | else \ | |
2723 | private_data_section (); \ | |
2724 | } \ | |
2725 | } | |
2726 | ||
2727 | /* This outputs NAME to FILE up to the first null or '['. */ | |
2728 | ||
2729 | #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ | |
c23a9d0e JM |
2730 | { \ |
2731 | char *_p; \ | |
99d3d26e | 2732 | \ |
c23a9d0e JM |
2733 | STRIP_NAME_ENCODING (_p, (NAME)); \ |
2734 | assemble_name ((FILE), _p); \ | |
2735 | } | |
2736 | ||
2737 | /* Remove any trailing [DS] or the like from the symbol name. */ | |
2738 | ||
28c57785 MM |
2739 | #define STRIP_NAME_ENCODING(VAR,NAME) \ |
2740 | do \ | |
2741 | { \ | |
2742 | char *_name = (NAME); \ | |
b6c9286a | 2743 | int _len; \ |
28c57785 | 2744 | if (_name[0] == '*') \ |
b6c9286a MM |
2745 | _name++; \ |
2746 | _len = strlen (_name); \ | |
2747 | if (_name[_len - 1] != ']') \ | |
2748 | (VAR) = _name; \ | |
28c57785 MM |
2749 | else \ |
2750 | { \ | |
b6c9286a MM |
2751 | (VAR) = (char *) alloca (_len + 1); \ |
2752 | strcpy ((VAR), _name); \ | |
2753 | (VAR)[_len - 4] = '\0'; \ | |
28c57785 MM |
2754 | } \ |
2755 | } \ | |
c23a9d0e | 2756 | while (0) |
f045b2c9 RS |
2757 | |
2758 | /* Output something to declare an external symbol to the assembler. Most | |
c81bebd7 | 2759 | assemblers don't need this. |
f045b2c9 RS |
2760 | |
2761 | If we haven't already, add "[RW]" (or "[DS]" for a function) to the | |
2762 | name. Normally we write this out along with the name. In the few cases | |
2763 | where we can't, it gets stripped off. */ | |
2764 | ||
2765 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
2766 | { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ | |
2767 | if ((TREE_CODE (DECL) == VAR_DECL \ | |
2768 | || TREE_CODE (DECL) == FUNCTION_DECL) \ | |
f045b2c9 RS |
2769 | && (NAME)[strlen (NAME) - 1] != ']') \ |
2770 | { \ | |
2771 | char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ | |
2772 | strcpy (_name, XSTR (_symref, 0)); \ | |
2773 | strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ | |
2774 | XSTR (_symref, 0) = _name; \ | |
2775 | } \ | |
19d2d16f | 2776 | fputs ("\t.extern ", FILE); \ |
f045b2c9 RS |
2777 | assemble_name (FILE, XSTR (_symref, 0)); \ |
2778 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2779 | { \ | |
19d2d16f | 2780 | fputs ("\n\t.extern .", FILE); \ |
f045b2c9 RS |
2781 | RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ |
2782 | } \ | |
19d2d16f | 2783 | putc ('\n', FILE); \ |
f045b2c9 RS |
2784 | } |
2785 | ||
2786 | /* Similar, but for libcall. We only have to worry about the function name, | |
2787 | not that of the descriptor. */ | |
2788 | ||
2789 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ | |
19d2d16f | 2790 | { fputs ("\t.extern .", FILE); \ |
f045b2c9 | 2791 | assemble_name (FILE, XSTR (FUN, 0)); \ |
19d2d16f | 2792 | putc ('\n', FILE); \ |
f045b2c9 RS |
2793 | } |
2794 | ||
2795 | /* Output to assembler file text saying following lines | |
2796 | may contain character constants, extra white space, comments, etc. */ | |
2797 | ||
2798 | #define ASM_APP_ON "" | |
2799 | ||
2800 | /* Output to assembler file text saying following lines | |
2801 | no longer contain unusual constructs. */ | |
2802 | ||
2803 | #define ASM_APP_OFF "" | |
2804 | ||
bf034054 DE |
2805 | /* Output before instructions. |
2806 | Text section for 64-bit target may contain 64-bit address jump table. */ | |
f045b2c9 | 2807 | |
bf034054 DE |
2808 | #define TEXT_SECTION_ASM_OP (TARGET_32BIT \ |
2809 | ? ".csect .text[PR]" : ".csect .text[PR],3") | |
f045b2c9 | 2810 | |
bf034054 DE |
2811 | /* Output before writable data. |
2812 | Align entire section to BIGGEST_ALIGNMENT. */ | |
f045b2c9 | 2813 | |
bf034054 | 2814 | #define DATA_SECTION_ASM_OP ".csect .data[RW],3" |
f045b2c9 RS |
2815 | |
2816 | /* How to refer to registers in assembler output. | |
2817 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2818 | ||
802a0058 | 2819 | extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ |
c81bebd7 MM |
2820 | |
2821 | #define REGISTER_NAMES \ | |
2822 | { \ | |
2823 | &rs6000_reg_names[ 0][0], /* r0 */ \ | |
2824 | &rs6000_reg_names[ 1][0], /* r1 */ \ | |
2825 | &rs6000_reg_names[ 2][0], /* r2 */ \ | |
2826 | &rs6000_reg_names[ 3][0], /* r3 */ \ | |
2827 | &rs6000_reg_names[ 4][0], /* r4 */ \ | |
2828 | &rs6000_reg_names[ 5][0], /* r5 */ \ | |
2829 | &rs6000_reg_names[ 6][0], /* r6 */ \ | |
2830 | &rs6000_reg_names[ 7][0], /* r7 */ \ | |
2831 | &rs6000_reg_names[ 8][0], /* r8 */ \ | |
2832 | &rs6000_reg_names[ 9][0], /* r9 */ \ | |
2833 | &rs6000_reg_names[10][0], /* r10 */ \ | |
2834 | &rs6000_reg_names[11][0], /* r11 */ \ | |
2835 | &rs6000_reg_names[12][0], /* r12 */ \ | |
2836 | &rs6000_reg_names[13][0], /* r13 */ \ | |
2837 | &rs6000_reg_names[14][0], /* r14 */ \ | |
2838 | &rs6000_reg_names[15][0], /* r15 */ \ | |
2839 | &rs6000_reg_names[16][0], /* r16 */ \ | |
2840 | &rs6000_reg_names[17][0], /* r17 */ \ | |
2841 | &rs6000_reg_names[18][0], /* r18 */ \ | |
2842 | &rs6000_reg_names[19][0], /* r19 */ \ | |
2843 | &rs6000_reg_names[20][0], /* r20 */ \ | |
2844 | &rs6000_reg_names[21][0], /* r21 */ \ | |
2845 | &rs6000_reg_names[22][0], /* r22 */ \ | |
2846 | &rs6000_reg_names[23][0], /* r23 */ \ | |
2847 | &rs6000_reg_names[24][0], /* r24 */ \ | |
2848 | &rs6000_reg_names[25][0], /* r25 */ \ | |
2849 | &rs6000_reg_names[26][0], /* r26 */ \ | |
2850 | &rs6000_reg_names[27][0], /* r27 */ \ | |
2851 | &rs6000_reg_names[28][0], /* r28 */ \ | |
2852 | &rs6000_reg_names[29][0], /* r29 */ \ | |
2853 | &rs6000_reg_names[30][0], /* r30 */ \ | |
2854 | &rs6000_reg_names[31][0], /* r31 */ \ | |
2855 | \ | |
2856 | &rs6000_reg_names[32][0], /* fr0 */ \ | |
2857 | &rs6000_reg_names[33][0], /* fr1 */ \ | |
2858 | &rs6000_reg_names[34][0], /* fr2 */ \ | |
2859 | &rs6000_reg_names[35][0], /* fr3 */ \ | |
2860 | &rs6000_reg_names[36][0], /* fr4 */ \ | |
2861 | &rs6000_reg_names[37][0], /* fr5 */ \ | |
2862 | &rs6000_reg_names[38][0], /* fr6 */ \ | |
2863 | &rs6000_reg_names[39][0], /* fr7 */ \ | |
2864 | &rs6000_reg_names[40][0], /* fr8 */ \ | |
2865 | &rs6000_reg_names[41][0], /* fr9 */ \ | |
2866 | &rs6000_reg_names[42][0], /* fr10 */ \ | |
2867 | &rs6000_reg_names[43][0], /* fr11 */ \ | |
2868 | &rs6000_reg_names[44][0], /* fr12 */ \ | |
2869 | &rs6000_reg_names[45][0], /* fr13 */ \ | |
2870 | &rs6000_reg_names[46][0], /* fr14 */ \ | |
2871 | &rs6000_reg_names[47][0], /* fr15 */ \ | |
2872 | &rs6000_reg_names[48][0], /* fr16 */ \ | |
2873 | &rs6000_reg_names[49][0], /* fr17 */ \ | |
2874 | &rs6000_reg_names[50][0], /* fr18 */ \ | |
2875 | &rs6000_reg_names[51][0], /* fr19 */ \ | |
2876 | &rs6000_reg_names[52][0], /* fr20 */ \ | |
2877 | &rs6000_reg_names[53][0], /* fr21 */ \ | |
2878 | &rs6000_reg_names[54][0], /* fr22 */ \ | |
2879 | &rs6000_reg_names[55][0], /* fr23 */ \ | |
2880 | &rs6000_reg_names[56][0], /* fr24 */ \ | |
2881 | &rs6000_reg_names[57][0], /* fr25 */ \ | |
2882 | &rs6000_reg_names[58][0], /* fr26 */ \ | |
2883 | &rs6000_reg_names[59][0], /* fr27 */ \ | |
2884 | &rs6000_reg_names[60][0], /* fr28 */ \ | |
2885 | &rs6000_reg_names[61][0], /* fr29 */ \ | |
2886 | &rs6000_reg_names[62][0], /* fr30 */ \ | |
2887 | &rs6000_reg_names[63][0], /* fr31 */ \ | |
2888 | \ | |
2889 | &rs6000_reg_names[64][0], /* mq */ \ | |
2890 | &rs6000_reg_names[65][0], /* lr */ \ | |
2891 | &rs6000_reg_names[66][0], /* ctr */ \ | |
2892 | &rs6000_reg_names[67][0], /* ap */ \ | |
2893 | \ | |
2894 | &rs6000_reg_names[68][0], /* cr0 */ \ | |
2895 | &rs6000_reg_names[69][0], /* cr1 */ \ | |
2896 | &rs6000_reg_names[70][0], /* cr2 */ \ | |
2897 | &rs6000_reg_names[71][0], /* cr3 */ \ | |
2898 | &rs6000_reg_names[72][0], /* cr4 */ \ | |
2899 | &rs6000_reg_names[73][0], /* cr5 */ \ | |
2900 | &rs6000_reg_names[74][0], /* cr6 */ \ | |
2901 | &rs6000_reg_names[75][0], /* cr7 */ \ | |
802a0058 MM |
2902 | \ |
2903 | &rs6000_reg_names[76][0], /* fpmem */ \ | |
c81bebd7 MM |
2904 | } |
2905 | ||
2906 | /* print-rtl can't handle the above REGISTER_NAMES, so define the | |
2907 | following for it. Switch to use the alternate names since | |
2908 | they are more mnemonic. */ | |
2909 | ||
2910 | #define DEBUG_REGISTER_NAMES \ | |
2911 | { \ | |
802a0058 MM |
2912 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ |
2913 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
2914 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
2915 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \ | |
2916 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
2917 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
2918 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ | |
2919 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ | |
2920 | "mq", "lr", "ctr", "ap", \ | |
2921 | "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \ | |
2922 | "fpmem" \ | |
c81bebd7 | 2923 | } |
f045b2c9 RS |
2924 | |
2925 | /* Table of additional register names to use in user input. */ | |
2926 | ||
2927 | #define ADDITIONAL_REGISTER_NAMES \ | |
c4d38ccb MM |
2928 | {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \ |
2929 | {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \ | |
2930 | {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \ | |
2931 | {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \ | |
2932 | {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \ | |
2933 | {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \ | |
2934 | {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \ | |
2935 | {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \ | |
2936 | {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \ | |
2937 | {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \ | |
2938 | {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \ | |
2939 | {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \ | |
2940 | {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \ | |
2941 | {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \ | |
2942 | {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \ | |
2943 | {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \ | |
2944 | /* no additional names for: mq, lr, ctr, ap */ \ | |
2945 | {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \ | |
2946 | {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \ | |
2947 | {"cc", 68}, {"sp", 1}, {"toc", 2} } | |
f045b2c9 RS |
2948 | |
2949 | /* How to renumber registers for dbx and gdb. */ | |
2950 | ||
2951 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
2952 | ||
0da40b09 RK |
2953 | /* Text to write out after a CALL that may be replaced by glue code by |
2954 | the loader. This depends on the AIX version. */ | |
2955 | #define RS6000_CALL_GLUE "cror 31,31,31" | |
11117bb9 | 2956 | |
f045b2c9 RS |
2957 | /* This is how to output the definition of a user-level label named NAME, |
2958 | such as the label on a static function or variable NAME. */ | |
2959 | ||
2960 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
2961 | do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) | |
2962 | ||
2963 | /* This is how to output a command to make the user-level label named NAME | |
2964 | defined for reference from other files. */ | |
2965 | ||
2966 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
2967 | do { fputs ("\t.globl ", FILE); \ | |
949ea356 | 2968 | RS6000_OUTPUT_BASENAME (FILE, NAME); putc ('\n', FILE);} while (0) |
f045b2c9 RS |
2969 | |
2970 | /* This is how to output a reference to a user-level label named NAME. | |
2971 | `assemble_name' uses this. */ | |
2972 | ||
2973 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
7509c759 | 2974 | fputs (NAME, FILE) |
f045b2c9 RS |
2975 | |
2976 | /* This is how to output an internal numbered label where | |
2977 | PREFIX is the class of label and NUM is the number within the class. */ | |
2978 | ||
2979 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2980 | fprintf (FILE, "%s..%d:\n", PREFIX, NUM) | |
2981 | ||
3daf36a4 ILT |
2982 | /* This is how to output an internal label prefix. rs6000.c uses this |
2983 | when generating traceback tables. */ | |
2984 | ||
2985 | #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ | |
2986 | fprintf (FILE, "%s..", PREFIX) | |
2987 | ||
f045b2c9 RS |
2988 | /* This is how to output a label for a jump table. Arguments are the same as |
2989 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
2990 | passed. */ | |
2991 | ||
2992 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
2993 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
2994 | ||
2995 | /* This is how to store into the string LABEL | |
2996 | the symbol_ref name of an internal numbered label where | |
2997 | PREFIX is the class of label and NUM is the number within the class. | |
2998 | This is suitable for output with `assemble_name'. */ | |
2999 | ||
3000 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
3d199f7a | 3001 | sprintf (LABEL, "*%s..%d", PREFIX, NUM) |
f045b2c9 RS |
3002 | |
3003 | /* This is how to output an assembler line defining a `double' constant. */ | |
3004 | ||
b5253831 DE |
3005 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ |
3006 | { \ | |
3007 | long t[2]; \ | |
3008 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
3009 | fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ | |
3010 | t[0] & 0xffffffff, t[1] & 0xffffffff); \ | |
a5b1eb34 | 3011 | } |
f045b2c9 RS |
3012 | |
3013 | /* This is how to output an assembler line defining a `float' constant. */ | |
3014 | ||
b5253831 DE |
3015 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ |
3016 | { \ | |
3017 | long t; \ | |
3018 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
3019 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
a5b1eb34 | 3020 | } |
f045b2c9 RS |
3021 | |
3022 | /* This is how to output an assembler line defining an `int' constant. */ | |
3023 | ||
5854b0d0 DE |
3024 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ |
3025 | do { \ | |
3026 | if (TARGET_32BIT) \ | |
3027 | { \ | |
3028 | assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \ | |
3029 | UNITS_PER_WORD, 1); \ | |
3030 | assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \ | |
3031 | UNITS_PER_WORD, 1); \ | |
3032 | } \ | |
3033 | else \ | |
3034 | { \ | |
3035 | fputs ("\t.llong ", FILE); \ | |
3036 | output_addr_const (FILE, (VALUE)); \ | |
3037 | putc ('\n', FILE); \ | |
3038 | } \ | |
3039 | } while (0) | |
3040 | ||
f045b2c9 | 3041 | #define ASM_OUTPUT_INT(FILE,VALUE) \ |
19d2d16f | 3042 | ( fputs ("\t.long ", FILE), \ |
f045b2c9 | 3043 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3044 | putc ('\n', FILE)) |
f045b2c9 RS |
3045 | |
3046 | /* Likewise for `char' and `short' constants. */ | |
3047 | ||
3048 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
19d2d16f | 3049 | ( fputs ("\t.short ", FILE), \ |
f045b2c9 | 3050 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3051 | putc ('\n', FILE)) |
f045b2c9 RS |
3052 | |
3053 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
19d2d16f | 3054 | ( fputs ("\t.byte ", FILE), \ |
f045b2c9 | 3055 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3056 | putc ('\n', FILE)) |
f045b2c9 RS |
3057 | |
3058 | /* This is how to output an assembler line for a numeric constant byte. */ | |
3059 | ||
3060 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
3061 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
3062 | ||
3063 | /* This is how to output an assembler line to define N characters starting | |
3064 | at P to FILE. */ | |
3065 | ||
3066 | #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) | |
3067 | ||
c81bebd7 | 3068 | /* This is how to output an element of a case-vector that is absolute. |
f045b2c9 RS |
3069 | (RS/6000 does not use such vectors, but we must define this macro |
3070 | anyway.) */ | |
3071 | ||
3daf36a4 ILT |
3072 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
3073 | do { char buf[100]; \ | |
a260abc9 | 3074 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
3075 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
3076 | assemble_name (FILE, buf); \ | |
19d2d16f | 3077 | putc ('\n', FILE); \ |
3daf36a4 | 3078 | } while (0) |
f045b2c9 RS |
3079 | |
3080 | /* This is how to output an element of a case-vector that is relative. */ | |
3081 | ||
33f7f353 | 3082 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\ |
3daf36a4 | 3083 | do { char buf[100]; \ |
a260abc9 | 3084 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
3085 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
3086 | assemble_name (FILE, buf); \ | |
19d2d16f | 3087 | putc ('-', FILE); \ |
3daf36a4 ILT |
3088 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ |
3089 | assemble_name (FILE, buf); \ | |
19d2d16f | 3090 | putc ('\n', FILE); \ |
3daf36a4 | 3091 | } while (0) |
f045b2c9 RS |
3092 | |
3093 | /* This is how to output an assembler line | |
3094 | that says to advance the location counter | |
3095 | to a multiple of 2**LOG bytes. */ | |
3096 | ||
3097 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
3098 | if ((LOG) != 0) \ | |
3099 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
3100 | ||
3101 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
3102 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
3103 | ||
3104 | /* This says how to output an assembler line | |
3105 | to define a global common symbol. */ | |
3106 | ||
b73fd26c | 3107 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNMENT) \ |
fc3ffe83 | 3108 | do { fputs (".comm ", (FILE)); \ |
f045b2c9 | 3109 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
b73fd26c DE |
3110 | if ( (SIZE) > 4) \ |
3111 | fprintf ((FILE), ",%d,3\n", (SIZE)); \ | |
3112 | else \ | |
3113 | fprintf( (FILE), ",%d\n", (SIZE)); \ | |
3114 | } while (0) | |
f045b2c9 RS |
3115 | |
3116 | /* This says how to output an assembler line | |
bf034054 DE |
3117 | to define a local common symbol. |
3118 | Alignment cannot be specified, but we can try to maintain | |
3119 | alignment after preceding TOC section if it was aligned | |
3120 | for 64-bit mode. */ | |
f045b2c9 | 3121 | |
bf034054 | 3122 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ |
fc3ffe83 | 3123 | do { fputs (".lcomm ", (FILE)); \ |
f045b2c9 | 3124 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
bf034054 DE |
3125 | fprintf ((FILE), ",%d,%s\n", (TARGET_32BIT ? (SIZE) : (ROUNDED)), \ |
3126 | xcoff_bss_section_name); \ | |
f045b2c9 RS |
3127 | } while (0) |
3128 | ||
3129 | /* Store in OUTPUT a string (made with alloca) containing | |
3130 | an assembler-name for a local static variable named NAME. | |
3131 | LABELNO is an integer which is different for each call. */ | |
3132 | ||
3133 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
3134 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
3135 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
3136 | ||
3137 | /* Define the parentheses used to group arithmetic operations | |
3138 | in assembler code. */ | |
3139 | ||
3140 | #define ASM_OPEN_PAREN "(" | |
3141 | #define ASM_CLOSE_PAREN ")" | |
3142 | ||
3143 | /* Define results of standard character escape sequences. */ | |
3144 | #define TARGET_BELL 007 | |
3145 | #define TARGET_BS 010 | |
3146 | #define TARGET_TAB 011 | |
3147 | #define TARGET_NEWLINE 012 | |
3148 | #define TARGET_VT 013 | |
3149 | #define TARGET_FF 014 | |
3150 | #define TARGET_CR 015 | |
3151 | ||
3152 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
3153 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
3154 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
3155 | ||
3156 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
3157 | ||
3158 | /* Define which CODE values are valid. */ | |
3159 | ||
c81bebd7 MM |
3160 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
3161 | ((CODE) == '.' || (CODE) == '*' || (CODE) == '$') | |
f045b2c9 RS |
3162 | |
3163 | /* Print a memory address as an operand to reference that memory location. */ | |
3164 | ||
3165 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
3166 | ||
3167 | /* Define the codes that are matched by predicates in rs6000.c. */ | |
3168 | ||
802a0058 | 3169 | #define PREDICATE_CODES \ |
34792e82 JL |
3170 | {"short_cint_operand", {CONST_INT}}, \ |
3171 | {"u_short_cint_operand", {CONST_INT}}, \ | |
f357808b | 3172 | {"non_short_cint_operand", {CONST_INT}}, \ |
cd2b37d9 | 3173 | {"gpc_reg_operand", {SUBREG, REG}}, \ |
f045b2c9 | 3174 | {"cc_reg_operand", {SUBREG, REG}}, \ |
815cdc52 | 3175 | {"cc_reg_not_cr0_operand", {SUBREG, REG}}, \ |
34792e82 | 3176 | {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \ |
f045b2c9 | 3177 | {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ |
34792e82 JL |
3178 | {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \ |
3179 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
766a866c | 3180 | {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ |
38c1f2d7 | 3181 | {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ |
f045b2c9 RS |
3182 | {"easy_fp_constant", {CONST_DOUBLE}}, \ |
3183 | {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
414d3ee4 | 3184 | {"lwa_operand", {SUBREG, MEM, REG}}, \ |
b6c9286a | 3185 | {"volatile_mem_operand", {MEM}}, \ |
97f6e72f | 3186 | {"offsettable_mem_operand", {MEM}}, \ |
f045b2c9 | 3187 | {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ |
34792e82 | 3188 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ |
f357808b | 3189 | {"non_add_cint_operand", {CONST_INT}}, \ |
34792e82 JL |
3190 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ |
3191 | {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \ | |
3192 | {"logical_operand", {SUBREG, REG, CONST_INT}}, \ | |
f357808b | 3193 | {"non_logical_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 3194 | {"mask_operand", {CONST_INT}}, \ |
a260abc9 | 3195 | {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \ |
b6c9286a | 3196 | {"count_register_operand", {REG}}, \ |
802a0058 | 3197 | {"fpmem_operand", {REG}}, \ |
f045b2c9 | 3198 | {"call_operand", {SYMBOL_REF, REG}}, \ |
f8634644 | 3199 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
34792e82 | 3200 | {"input_operand", {SUBREG, MEM, REG, CONST_INT, \ |
e675f625 | 3201 | CONST_DOUBLE, SYMBOL_REF}}, \ |
f8634644 RK |
3202 | {"load_multiple_operation", {PARALLEL}}, \ |
3203 | {"store_multiple_operation", {PARALLEL}}, \ | |
3204 | {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
e477bbc7 | 3205 | GT, LEU, LTU, GEU, GTU}}, \ |
f8634644 | 3206 | {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ |
d2a0c2ee JC |
3207 | GT, LEU, LTU, GEU, GTU}}, \ |
3208 | {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
3209 | GT, LEU, LTU, GEU, GTU}}, | |
75814ad4 | 3210 | |
b6c9286a MM |
3211 | /* uncomment for disabling the corresponding default options */ |
3212 | /* #define MACHINE_no_sched_interblock */ | |
3213 | /* #define MACHINE_no_sched_speculative */ | |
3214 | /* #define MACHINE_no_sched_speculative_load */ | |
3215 | ||
3216 | /* indicate that issue rate is defined for this machine | |
3217 | (no need to use the default) */ | |
246853b9 | 3218 | #define ISSUE_RATE get_issue_rate () |
b6c9286a | 3219 | |
766a866c MM |
3220 | /* General flags. */ |
3221 | extern int flag_pic; | |
354b734b MM |
3222 | extern int optimize; |
3223 | extern int flag_expensive_optimizations; | |
a7df97e6 | 3224 | extern int frame_pointer_needed; |
354b734b | 3225 | |
75814ad4 | 3226 | /* Declare functions in rs6000.c */ |
d330fd93 | 3227 | extern void optimization_options (); |
6b67933e | 3228 | extern void output_options (); |
75814ad4 | 3229 | extern void rs6000_override_options (); |
3cfa4909 | 3230 | extern void rs6000_file_start (); |
6b67933e | 3231 | extern struct rtx_def *rs6000_float_const (); |
c4c40373 | 3232 | extern struct rtx_def *rs6000_got_register (); |
000034eb | 3233 | extern struct rtx_def *find_addr_reg(); |
75814ad4 | 3234 | extern int direct_return (); |
c4d38ccb | 3235 | extern int get_issue_rate (); |
75814ad4 MM |
3236 | extern int any_operand (); |
3237 | extern int short_cint_operand (); | |
3238 | extern int u_short_cint_operand (); | |
3239 | extern int non_short_cint_operand (); | |
3240 | extern int gpc_reg_operand (); | |
3241 | extern int cc_reg_operand (); | |
815cdc52 | 3242 | extern int cc_reg_not_cr0_operand (); |
75814ad4 MM |
3243 | extern int reg_or_short_operand (); |
3244 | extern int reg_or_neg_short_operand (); | |
3245 | extern int reg_or_u_short_operand (); | |
3246 | extern int reg_or_cint_operand (); | |
766a866c | 3247 | extern int got_operand (); |
38c1f2d7 | 3248 | extern int got_no_const_operand (); |
4e74d8ec | 3249 | extern int num_insns_constant (); |
75814ad4 | 3250 | extern int easy_fp_constant (); |
b7676b46 | 3251 | extern int volatile_mem_operand (); |
000034eb | 3252 | extern int offsettable_mem_operand (); |
75814ad4 MM |
3253 | extern int mem_or_easy_const_operand (); |
3254 | extern int add_operand (); | |
3255 | extern int non_add_cint_operand (); | |
c4d38ccb | 3256 | extern int non_logical_cint_operand (); |
75814ad4 | 3257 | extern int logical_operand (); |
75814ad4 | 3258 | extern int mask_operand (); |
a260abc9 DE |
3259 | extern int mask64_operand (); |
3260 | extern int and64_operand (); | |
75814ad4 | 3261 | extern int and_operand (); |
802a0058 MM |
3262 | extern int count_register_operand (); |
3263 | extern int fpmem_operand (); | |
75814ad4 MM |
3264 | extern int reg_or_mem_operand (); |
3265 | extern int lwa_operand (); | |
3266 | extern int call_operand (); | |
3267 | extern int current_file_function_operand (); | |
3268 | extern int input_operand (); | |
7509c759 | 3269 | extern int small_data_operand (); |
4697a36c MM |
3270 | extern void init_cumulative_args (); |
3271 | extern void function_arg_advance (); | |
b6c9286a | 3272 | extern int function_arg_boundary (); |
4697a36c MM |
3273 | extern struct rtx_def *function_arg (); |
3274 | extern int function_arg_partial_nregs (); | |
3275 | extern int function_arg_pass_by_reference (); | |
3276 | extern void setup_incoming_varargs (); | |
3277 | extern struct rtx_def *expand_builtin_saveregs (); | |
b7676b46 | 3278 | extern struct rtx_def *rs6000_stack_temp (); |
7e69e155 | 3279 | extern int expand_block_move (); |
75814ad4 MM |
3280 | extern int load_multiple_operation (); |
3281 | extern int store_multiple_operation (); | |
3282 | extern int branch_comparison_operator (); | |
3283 | extern int scc_comparison_operator (); | |
d2a0c2ee | 3284 | extern int trap_comparison_operator (); |
75814ad4 MM |
3285 | extern int includes_lshift_p (); |
3286 | extern int includes_rshift_p (); | |
3287 | extern int registers_ok_for_quad_peep (); | |
3288 | extern int addrs_ok_for_quad_peep (); | |
3289 | extern enum reg_class secondary_reload_class (); | |
3290 | extern int ccr_bit (); | |
d266da75 | 3291 | extern void rs6000_finalize_pic (); |
30ea98f1 | 3292 | extern void rs6000_reorg (); |
a7df97e6 MM |
3293 | extern void rs6000_save_machine_status (); |
3294 | extern void rs6000_restore_machine_status (); | |
3295 | extern void rs6000_init_expanders (); | |
75814ad4 MM |
3296 | extern void print_operand (); |
3297 | extern void print_operand_address (); | |
3298 | extern int first_reg_to_save (); | |
3299 | extern int first_fp_reg_to_save (); | |
75814ad4 | 3300 | extern int rs6000_makes_calls (); |
4697a36c | 3301 | extern rs6000_stack_t *rs6000_stack_info (); |
75814ad4 MM |
3302 | extern void output_prolog (); |
3303 | extern void output_epilog (); | |
17167fd8 | 3304 | extern void output_mi_thunk (); |
75814ad4 MM |
3305 | extern void output_toc (); |
3306 | extern void output_ascii (); | |
3307 | extern void rs6000_gen_section_name (); | |
3308 | extern void output_function_profiler (); | |
3309 | extern int rs6000_adjust_cost (); | |
bef84347 | 3310 | extern int rs6000_adjust_priority (); |
b6c9286a MM |
3311 | extern void rs6000_trampoline_template (); |
3312 | extern int rs6000_trampoline_size (); | |
3313 | extern void rs6000_initialize_trampoline (); | |
c4d38ccb | 3314 | extern void rs6000_output_load_toc_table (); |
7509c759 MM |
3315 | extern int rs6000_comp_type_attributes (); |
3316 | extern int rs6000_valid_decl_attribute_p (); | |
3317 | extern int rs6000_valid_type_attribute_p (); | |
3318 | extern void rs6000_set_default_type_attributes (); | |
3319 | extern struct rtx_def *rs6000_dll_import_ref (); | |
6a4cee5f | 3320 | extern struct rtx_def *rs6000_longcall_ref (); |
c4d38ccb | 3321 | extern int function_arg_padding (); |
296b8152 KG |
3322 | extern void toc_section (); |
3323 | extern void private_data_section (); | |
a6c2a102 | 3324 | extern void rs6000_fatal_bad_address (); |
28174a14 MS |
3325 | |
3326 | /* See nonlocal_goto_receiver for when this must be set. */ | |
3327 | ||
3328 | #define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_TOC && TARGET_MINIMAL_TOC) |