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f045b2c9 | 1 | /* Definitions of target machine for GNU compiler, for IBM RS/6000. |
a260abc9 | 2 | Copyright (C) 1992, 93-7, 1998 Free Software Foundation, Inc. |
6a7ec0a7 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
f045b2c9 RS |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
c15c9075 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
f045b2c9 RS |
21 | |
22 | ||
23 | /* Note that some other tm.h files include this one and then override | |
24 | many of the definitions that relate to assembler syntax. */ | |
25 | ||
26 | ||
27 | /* Names to predefine in the preprocessor for this target machine. */ | |
28 | ||
a238cd8b | 29 | #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \ |
84b49fa7 | 30 | -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)" |
f045b2c9 RS |
31 | |
32 | /* Print subsidiary information on the compiler version in use. */ | |
33 | #define TARGET_VERSION ; | |
34 | ||
8e3f41e7 MM |
35 | /* Default string to use for cpu if not specified. */ |
36 | #ifndef TARGET_CPU_DEFAULT | |
37 | #define TARGET_CPU_DEFAULT ((char *)0) | |
38 | #endif | |
39 | ||
fdaff8ba RS |
40 | /* Tell the assembler to assume that all undefined names are external. |
41 | ||
42 | Don't do this until the fixed IBM assembler is more generally available. | |
43 | When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL, | |
44 | ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no | |
b4d6689b RK |
45 | longer be needed. Also, the extern declaration of mcount in ASM_FILE_START |
46 | will no longer be needed. */ | |
f045b2c9 | 47 | |
841faeed | 48 | /* #define ASM_SPEC "-u %(asm_cpu)" */ |
f045b2c9 | 49 | |
84b49fa7 RK |
50 | /* Define appropriate architecture macros for preprocessor depending on |
51 | target switches. */ | |
52 | ||
841faeed MM |
53 | #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_cpu)" |
54 | ||
956d6950 | 55 | /* Common CPP definitions used by CPP_SPEC among the various targets |
841faeed MM |
56 | for handling -mcpu=xxx switches. */ |
57 | #define CPP_CPU_SPEC \ | |
58 | "%{!mcpu*: \ | |
84b49fa7 RK |
59 | %{mpower: %{!mpower2: -D_ARCH_PWR}} \ |
60 | %{mpower2: -D_ARCH_PWR2} \ | |
61 | %{mpowerpc*: -D_ARCH_PPC} \ | |
62 | %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \ | |
841faeed | 63 | %{!mno-power: %{!mpower2: %(cpp_default)}}} \ |
84b49fa7 RK |
64 | %{mcpu=common: -D_ARCH_COM} \ |
65 | %{mcpu=power: -D_ARCH_PWR} \ | |
8e3f41e7 | 66 | %{mcpu=power2: -D_ARCH_PWR2} \ |
84b49fa7 RK |
67 | %{mcpu=powerpc: -D_ARCH_PPC} \ |
68 | %{mcpu=rios: -D_ARCH_PWR} \ | |
69 | %{mcpu=rios1: -D_ARCH_PWR} \ | |
70 | %{mcpu=rios2: -D_ARCH_PWR2} \ | |
71 | %{mcpu=rsc: -D_ARCH_PWR} \ | |
72 | %{mcpu=rsc1: -D_ARCH_PWR} \ | |
b91d2c10 | 73 | %{mcpu=401: -D_ARCH_PPC} \ |
49a0b204 | 74 | %{mcpu=403: -D_ARCH_PPC} \ |
cf27b467 | 75 | %{mcpu=505: -D_ARCH_PPC} \ |
84b49fa7 | 76 | %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \ |
841faeed | 77 | %{mcpu=602: -D_ARCH_PPC} \ |
fada905b MM |
78 | %{mcpu=603: -D_ARCH_PPC} \ |
79 | %{mcpu=603e: -D_ARCH_PPC} \ | |
b91d2c10 | 80 | %{mcpu=ec603e: -D_ARCH_PPC} \ |
fada905b | 81 | %{mcpu=604: -D_ARCH_PPC} \ |
b91d2c10 | 82 | %{mcpu=604e: -D_ARCH_PPC} \ |
cf27b467 MM |
83 | %{mcpu=620: -D_ARCH_PPC} \ |
84 | %{mcpu=821: -D_ARCH_PPC} \ | |
b91d2c10 | 85 | %{mcpu=823: -D_ARCH_PPC} \ |
cf27b467 | 86 | %{mcpu=860: -D_ARCH_PPC}" |
84b49fa7 | 87 | |
841faeed MM |
88 | #ifndef CPP_DEFAULT_SPEC |
89 | #define CPP_DEFAULT_SPEC "-D_ARCH_PWR" | |
90 | #endif | |
91 | ||
92 | #ifndef CPP_SYSV_SPEC | |
93 | #define CPP_SYSV_SPEC "" | |
94 | #endif | |
95 | ||
96 | #ifndef CPP_ENDIAN_SPEC | |
97 | #define CPP_ENDIAN_SPEC "" | |
98 | #endif | |
99 | ||
c81bebd7 MM |
100 | #ifndef CPP_ENDIAN_DEFAULT_SPEC |
101 | #define CPP_ENDIAN_DEFAULT_SPEC "" | |
102 | #endif | |
103 | ||
841faeed MM |
104 | #ifndef CPP_SYSV_DEFAULT_SPEC |
105 | #define CPP_SYSV_DEFAULT_SPEC "" | |
106 | #endif | |
107 | ||
956d6950 | 108 | /* Common ASM definitions used by ASM_SPEC among the various targets |
841faeed MM |
109 | for handling -mcpu=xxx switches. */ |
110 | #define ASM_CPU_SPEC \ | |
111 | "%{!mcpu*: \ | |
112 | %{mpower: %{!mpower2: -mpwr}} \ | |
113 | %{mpower2: -mpwrx} \ | |
114 | %{mpowerpc*: -mppc} \ | |
115 | %{mno-power: %{!mpowerpc*: -mcom}} \ | |
116 | %{!mno-power: %{!mpower2: %(asm_default)}}} \ | |
117 | %{mcpu=common: -mcom} \ | |
118 | %{mcpu=power: -mpwr} \ | |
119 | %{mcpu=power2: -mpwrx} \ | |
120 | %{mcpu=powerpc: -mppc} \ | |
121 | %{mcpu=rios: -mpwr} \ | |
122 | %{mcpu=rios1: -mpwr} \ | |
123 | %{mcpu=rios2: -mpwrx} \ | |
124 | %{mcpu=rsc: -mpwr} \ | |
125 | %{mcpu=rsc1: -mpwr} \ | |
b91d2c10 | 126 | %{mcpu=401: -mppc} \ |
841faeed MM |
127 | %{mcpu=403: -mppc} \ |
128 | %{mcpu=505: -mppc} \ | |
129 | %{mcpu=601: -m601} \ | |
130 | %{mcpu=602: -mppc} \ | |
131 | %{mcpu=603: -mppc} \ | |
132 | %{mcpu=603e: -mppc} \ | |
b91d2c10 | 133 | %{mcpu=ec603e: -mppc} \ |
841faeed | 134 | %{mcpu=604: -mppc} \ |
b91d2c10 | 135 | %{mcpu=604e: -mppc} \ |
841faeed MM |
136 | %{mcpu=620: -mppc} \ |
137 | %{mcpu=821: -mppc} \ | |
b91d2c10 | 138 | %{mcpu=823: -mppc} \ |
841faeed MM |
139 | %{mcpu=860: -mppc}" |
140 | ||
141 | #ifndef ASM_DEFAULT_SPEC | |
fba29a8c | 142 | #define ASM_DEFAULT_SPEC "" |
841faeed MM |
143 | #endif |
144 | ||
145 | /* This macro defines names of additional specifications to put in the specs | |
146 | that can be used in various specifications like CC1_SPEC. Its definition | |
147 | is an initializer with a subgrouping for each command option. | |
148 | ||
149 | Each subgrouping contains a string constant, that defines the | |
150 | specification name, and a string constant that used by the GNU CC driver | |
151 | program. | |
152 | ||
153 | Do not define this macro if it does not need to do anything. */ | |
154 | ||
7509c759 MM |
155 | #ifndef SUBTARGET_EXTRA_SPECS |
156 | #define SUBTARGET_EXTRA_SPECS | |
157 | #endif | |
158 | ||
c81bebd7 MM |
159 | #define EXTRA_SPECS \ |
160 | { "cpp_cpu", CPP_CPU_SPEC }, \ | |
161 | { "cpp_default", CPP_DEFAULT_SPEC }, \ | |
162 | { "cpp_sysv", CPP_SYSV_SPEC }, \ | |
163 | { "cpp_sysv_default", CPP_SYSV_DEFAULT_SPEC }, \ | |
164 | { "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC }, \ | |
165 | { "cpp_endian", CPP_ENDIAN_SPEC }, \ | |
166 | { "asm_cpu", ASM_CPU_SPEC }, \ | |
167 | { "asm_default", ASM_DEFAULT_SPEC }, \ | |
168 | { "link_syscalls", LINK_SYSCALLS_SPEC }, \ | |
169 | { "link_libg", LINK_LIBG_SPEC }, \ | |
7509c759 MM |
170 | SUBTARGET_EXTRA_SPECS |
171 | ||
7509c759 MM |
172 | /* Default location of syscalls.exp under AIX */ |
173 | #ifndef CROSS_COMPILE | |
174 | #define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp" | |
175 | #else | |
176 | #define LINK_SYSCALLS_SPEC "" | |
177 | #endif | |
178 | ||
179 | /* Default location of libg.exp under AIX */ | |
180 | #ifndef CROSS_COMPILE | |
181 | #define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp" | |
182 | #else | |
183 | #define LINK_LIBG_SPEC "" | |
184 | #endif | |
185 | ||
f045b2c9 RS |
186 | /* Define the options for the binder: Start text at 512, align all segments |
187 | to 512 bytes, and warn if there is text relocation. | |
188 | ||
189 | The -bhalt:4 option supposedly changes the level at which ld will abort, | |
190 | but it also suppresses warnings about multiply defined symbols and is | |
191 | used by the AIX cc command. So we use it here. | |
192 | ||
193 | -bnodelcsect undoes a poor choice of default relating to multiply-defined | |
52c0eaf8 JM |
194 | csects. See AIX documentation for more information about this. |
195 | ||
196 | -bM:SRE tells the linker that the output file is Shared REusable. Note | |
197 | that to actually build a shared library you will also need to specify an | |
198 | export list with the -Wl,-bE option. */ | |
f045b2c9 | 199 | |
c1950f1c | 200 | #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\ |
7509c759 MM |
201 | %{static:-bnso %(link_syscalls) } \ |
202 | %{!shared:%{g*: %(link_libg) }} %{shared:-bM:SRE}" | |
f045b2c9 | 203 | |
58a39e45 RS |
204 | /* Profiled library versions are used by linking with special directories. */ |
205 | #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\ | |
788d9012 | 206 | %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc" |
f045b2c9 RS |
207 | |
208 | /* gcc must do the search itself to find libgcc.a, not use -l. */ | |
046b1537 | 209 | #define LIBGCC_SPEC "libgcc.a%s" |
f045b2c9 RS |
210 | |
211 | /* Don't turn -B into -L if the argument specifies a relative file name. */ | |
212 | #define RELATIVE_PREFIX_NOT_LINKDIR | |
213 | ||
fb623df5 | 214 | /* Architecture type. */ |
f045b2c9 | 215 | |
fb623df5 RK |
216 | extern int target_flags; |
217 | ||
218 | /* Use POWER architecture instructions and MQ register. */ | |
38c1f2d7 | 219 | #define MASK_POWER 0x00000001 |
fb623df5 | 220 | |
6febd581 | 221 | /* Use POWER2 extensions to POWER architecture. */ |
38c1f2d7 | 222 | #define MASK_POWER2 0x00000002 |
6febd581 | 223 | |
fb623df5 | 224 | /* Use PowerPC architecture instructions. */ |
38c1f2d7 | 225 | #define MASK_POWERPC 0x00000004 |
6febd581 | 226 | |
583cf4db | 227 | /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */ |
38c1f2d7 | 228 | #define MASK_PPC_GPOPT 0x00000008 |
583cf4db RK |
229 | |
230 | /* Use PowerPC Graphics group optional instructions, e.g. fsel. */ | |
38c1f2d7 | 231 | #define MASK_PPC_GFXOPT 0x00000010 |
f045b2c9 | 232 | |
fb623df5 | 233 | /* Use PowerPC-64 architecture instructions. */ |
38c1f2d7 | 234 | #define MASK_POWERPC64 0x00000020 |
f045b2c9 | 235 | |
fb623df5 | 236 | /* Use revised mnemonic names defined for PowerPC architecture. */ |
38c1f2d7 | 237 | #define MASK_NEW_MNEMONICS 0x00000040 |
fb623df5 RK |
238 | |
239 | /* Disable placing fp constants in the TOC; can be turned on when the | |
240 | TOC overflows. */ | |
38c1f2d7 | 241 | #define MASK_NO_FP_IN_TOC 0x00000080 |
fb623df5 | 242 | |
0b9ccabc RK |
243 | /* Disable placing symbol+offset constants in the TOC; can be turned on when |
244 | the TOC overflows. */ | |
38c1f2d7 | 245 | #define MASK_NO_SUM_IN_TOC 0x00000100 |
0b9ccabc | 246 | |
fb623df5 | 247 | /* Output only one TOC entry per module. Normally linking fails if |
642a35f1 JW |
248 | there are more than 16K unique variables/constants in an executable. With |
249 | this option, linking fails only if there are more than 16K modules, or | |
250 | if there are more than 16K unique variables/constant in a single module. | |
251 | ||
252 | This is at the cost of having 2 extra loads and one extra store per | |
956d6950 | 253 | function, and one less allocable register. */ |
38c1f2d7 | 254 | #define MASK_MINIMAL_TOC 0x00000200 |
642a35f1 | 255 | |
9e654916 | 256 | /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */ |
38c1f2d7 | 257 | #define MASK_64BIT 0x00000400 |
9e654916 | 258 | |
f85f4585 | 259 | /* Disable use of FPRs. */ |
38c1f2d7 | 260 | #define MASK_SOFT_FLOAT 0x00000800 |
f85f4585 | 261 | |
4d30c363 | 262 | /* Enable load/store multiple, even on powerpc */ |
38c1f2d7 MM |
263 | #define MASK_MULTIPLE 0x00001000 |
264 | #define MASK_MULTIPLE_SET 0x00002000 | |
4d30c363 | 265 | |
7e69e155 | 266 | /* Use string instructions for block moves */ |
38c1f2d7 MM |
267 | #define MASK_STRING 0x00004000 |
268 | #define MASK_STRING_SET 0x00008000 | |
7e69e155 | 269 | |
38c1f2d7 MM |
270 | /* Disable update form of load/store */ |
271 | #define MASK_NO_UPDATE 0x00010000 | |
272 | ||
273 | /* Disable fused multiply/add operations */ | |
274 | #define MASK_NO_FUSED_MADD 0x00020000 | |
4697a36c | 275 | |
7e69e155 MM |
276 | #define TARGET_POWER (target_flags & MASK_POWER) |
277 | #define TARGET_POWER2 (target_flags & MASK_POWER2) | |
278 | #define TARGET_POWERPC (target_flags & MASK_POWERPC) | |
279 | #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT) | |
280 | #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT) | |
281 | #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64) | |
282 | #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS) | |
283 | #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC) | |
284 | #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC) | |
285 | #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC) | |
286 | #define TARGET_64BIT (target_flags & MASK_64BIT) | |
287 | #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) | |
288 | #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE) | |
289 | #define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET) | |
290 | #define TARGET_STRING (target_flags & MASK_STRING) | |
938937d8 | 291 | #define TARGET_STRING_SET (target_flags & MASK_STRING_SET) |
38c1f2d7 MM |
292 | #define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE) |
293 | #define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD) | |
7e69e155 | 294 | |
2f3e5814 | 295 | #define TARGET_32BIT (! TARGET_64BIT) |
7e69e155 | 296 | #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT) |
38c1f2d7 MM |
297 | #define TARGET_UPDATE (! TARGET_NO_UPDATE) |
298 | #define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD) | |
d14a6d05 | 299 | |
4697a36c MM |
300 | /* Pseudo target to indicate whether the object format is ELF |
301 | (to get around not having conditional compilation in the md file) */ | |
302 | #ifndef TARGET_ELF | |
303 | #define TARGET_ELF 0 | |
304 | #endif | |
305 | ||
306 | /* If this isn't V.4, don't support -mno-toc. */ | |
307 | #ifndef TARGET_NO_TOC | |
308 | #define TARGET_NO_TOC 0 | |
309 | #define TARGET_TOC 1 | |
310 | #endif | |
311 | ||
b6c9286a MM |
312 | /* Pseudo target to say whether this is Windows NT */ |
313 | #ifndef TARGET_WINDOWS_NT | |
314 | #define TARGET_WINDOWS_NT 0 | |
315 | #endif | |
316 | ||
317 | /* Pseudo target to say whether this is MAC */ | |
318 | #ifndef TARGET_MACOS | |
319 | #define TARGET_MACOS 0 | |
320 | #endif | |
321 | ||
322 | /* Pseudo target to say whether this is AIX */ | |
323 | #ifndef TARGET_AIX | |
324 | #if (TARGET_ELF || TARGET_WINDOWS_NT || TARGET_MACOS) | |
325 | #define TARGET_AIX 0 | |
326 | #else | |
327 | #define TARGET_AIX 1 | |
328 | #endif | |
329 | #endif | |
330 | ||
a3950905 MM |
331 | #ifndef TARGET_XL_CALL |
332 | #define TARGET_XL_CALL 0 | |
333 | #endif | |
334 | ||
fb623df5 | 335 | /* Run-time compilation parameters selecting different hardware subsets. |
f045b2c9 | 336 | |
fb623df5 | 337 | Macro to define tables used to set the flags. |
f045b2c9 RS |
338 | This is a list in braces of pairs in braces, |
339 | each pair being { "NAME", VALUE } | |
340 | where VALUE is the bits to set or minus the bits to clear. | |
341 | An empty string NAME is used to identify the default VALUE. */ | |
342 | ||
4d30c363 MM |
343 | /* This is meant to be redefined in the host dependent files */ |
344 | #ifndef SUBTARGET_SWITCHES | |
345 | #define SUBTARGET_SWITCHES | |
346 | #endif | |
347 | ||
938937d8 MM |
348 | #define TARGET_SWITCHES \ |
349 | {{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING}, \ | |
350 | {"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \ | |
351 | | MASK_POWER2)}, \ | |
352 | {"no-power2", - MASK_POWER2}, \ | |
353 | {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \ | |
354 | | MASK_STRING)}, \ | |
355 | {"powerpc", MASK_POWERPC}, \ | |
356 | {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \ | |
357 | | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \ | |
358 | {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \ | |
359 | {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \ | |
360 | {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \ | |
361 | {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \ | |
a260abc9 DE |
362 | {"powerpc64", MASK_POWERPC64}, \ |
363 | {"no-powerpc64", - MASK_POWERPC64}, \ | |
938937d8 MM |
364 | {"new-mnemonics", MASK_NEW_MNEMONICS}, \ |
365 | {"old-mnemonics", -MASK_NEW_MNEMONICS}, \ | |
366 | {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \ | |
367 | | MASK_MINIMAL_TOC)}, \ | |
368 | {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \ | |
369 | {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \ | |
370 | {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \ | |
371 | {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \ | |
372 | {"minimal-toc", MASK_MINIMAL_TOC}, \ | |
373 | {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \ | |
374 | {"no-minimal-toc", - MASK_MINIMAL_TOC}, \ | |
375 | {"hard-float", - MASK_SOFT_FLOAT}, \ | |
376 | {"soft-float", MASK_SOFT_FLOAT}, \ | |
377 | {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \ | |
378 | {"no-multiple", - MASK_MULTIPLE}, \ | |
379 | {"no-multiple", MASK_MULTIPLE_SET}, \ | |
380 | {"string", MASK_STRING | MASK_STRING_SET}, \ | |
381 | {"no-string", - MASK_STRING}, \ | |
bbdd88df | 382 | {"no-string", MASK_STRING_SET}, \ |
38c1f2d7 MM |
383 | {"update", - MASK_NO_UPDATE}, \ |
384 | {"no-update", MASK_NO_UPDATE}, \ | |
385 | {"fused-madd", - MASK_NO_FUSED_MADD}, \ | |
386 | {"no-fused-madd", MASK_NO_FUSED_MADD}, \ | |
938937d8 | 387 | SUBTARGET_SWITCHES \ |
fb623df5 RK |
388 | {"", TARGET_DEFAULT}} |
389 | ||
938937d8 | 390 | #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING) |
fb623df5 | 391 | |
cac8ce95 | 392 | /* Processor type. Order must match cpu attribute in MD file. */ |
fb623df5 | 393 | enum processor_type |
f86fe1fb | 394 | {PROCESSOR_RIOS1, |
fb623df5 | 395 | PROCESSOR_RIOS2, |
cf27b467 | 396 | PROCESSOR_MPCCORE, |
49a0b204 | 397 | PROCESSOR_PPC403, |
fb623df5 RK |
398 | PROCESSOR_PPC601, |
399 | PROCESSOR_PPC603, | |
400 | PROCESSOR_PPC604, | |
cac8ce95 | 401 | PROCESSOR_PPC604e, |
fb623df5 RK |
402 | PROCESSOR_PPC620}; |
403 | ||
404 | extern enum processor_type rs6000_cpu; | |
405 | ||
406 | /* Recast the processor type to the cpu attribute. */ | |
407 | #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu) | |
408 | ||
8482e358 | 409 | /* Define generic processor types based upon current deployment. */ |
8e3f41e7 | 410 | #define PROCESSOR_COMMON PROCESSOR_PPC601 |
8482e358 | 411 | #define PROCESSOR_POWER PROCESSOR_RIOS1 |
8e3f41e7 | 412 | #define PROCESSOR_POWERPC PROCESSOR_PPC604 |
6e151478 | 413 | |
fb623df5 | 414 | /* Define the default processor. This is overridden by other tm.h files. */ |
f86fe1fb | 415 | #define PROCESSOR_DEFAULT PROCESSOR_RIOS1 |
fb623df5 | 416 | |
6febd581 RK |
417 | /* Specify the dialect of assembler to use. New mnemonics is dialect one |
418 | and the old mnemonics are dialect zero. */ | |
419 | #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0 | |
420 | ||
fb623df5 RK |
421 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
422 | command options that have values. Its definition is an | |
423 | initializer with a subgrouping for each command option. | |
424 | ||
425 | Each subgrouping contains a string constant, that defines the | |
426 | fixed part of the option name, and the address of a variable. | |
427 | The variable, type `char *', is set to the variable part of the | |
428 | given option if the fixed part matches. The actual option name | |
429 | is made by appending `-m' to the specified name. | |
430 | ||
431 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
432 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
433 | will be set to the string `"512"'. | |
434 | ||
435 | extern char *m88k_short_data; | |
436 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
437 | ||
956d6950 | 438 | /* This is meant to be overridden in target specific files. */ |
b6c9286a MM |
439 | #ifndef SUBTARGET_OPTIONS |
440 | #define SUBTARGET_OPTIONS | |
441 | #endif | |
442 | ||
8e3f41e7 MM |
443 | #define TARGET_OPTIONS \ |
444 | { \ | |
445 | {"cpu=", &rs6000_select[1].string}, \ | |
446 | {"tune=", &rs6000_select[2].string}, \ | |
38c1f2d7 MM |
447 | {"debug-", &rs6000_debug_name}, \ |
448 | {"debug=", &rs6000_debug_name}, \ | |
8e3f41e7 | 449 | SUBTARGET_OPTIONS \ |
b6c9286a | 450 | } |
fb623df5 | 451 | |
ff222560 | 452 | /* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */ |
8e3f41e7 MM |
453 | struct rs6000_cpu_select |
454 | { | |
455 | char *string; | |
456 | char *name; | |
457 | int set_tune_p; | |
458 | int set_arch_p; | |
459 | }; | |
460 | ||
461 | extern struct rs6000_cpu_select rs6000_select[]; | |
fb623df5 | 462 | |
38c1f2d7 MM |
463 | /* Debug support */ |
464 | extern char *rs6000_debug_name; /* Name for -mdebug-xxxx option */ | |
465 | extern int rs6000_debug_stack; /* debug stack applications */ | |
466 | extern int rs6000_debug_arg; /* debug argument handling */ | |
467 | ||
468 | #define TARGET_DEBUG_STACK rs6000_debug_stack | |
469 | #define TARGET_DEBUG_ARG rs6000_debug_arg | |
470 | ||
fb623df5 RK |
471 | /* Sometimes certain combinations of command options do not make sense |
472 | on a particular target machine. You can define a macro | |
473 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
474 | defined, is executed once just after all the command options have | |
475 | been parsed. | |
476 | ||
5accd822 DE |
477 | Don't use this macro to turn on various extra optimizations for |
478 | `-O'. That is what `OPTIMIZATION_OPTIONS' is for. | |
479 | ||
fb623df5 RK |
480 | On the RS/6000 this is used to define the target cpu type. */ |
481 | ||
8e3f41e7 | 482 | #define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT) |
f045b2c9 | 483 | |
5accd822 DE |
484 | /* Define this to change the optimizations performed by default. */ |
485 | #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE) | |
486 | ||
487 | ||
4f074454 RK |
488 | /* Show we can debug even without a frame pointer. */ |
489 | #define CAN_DEBUG_WITHOUT_FP | |
f045b2c9 RS |
490 | \f |
491 | /* target machine storage layout */ | |
492 | ||
df44fa77 RK |
493 | /* Define to support cross compilation to an RS6000 target. */ |
494 | #define REAL_ARITHMETIC | |
495 | ||
13d39dbc | 496 | /* Define this macro if it is advisable to hold scalars in registers |
c81bebd7 | 497 | in a wider mode than that declared by the program. In such cases, |
ef457bda RK |
498 | the value is constrained to be within the bounds of the declared |
499 | type, but kept valid in the wider mode. The signedness of the | |
500 | extension may differ from that of the type. */ | |
501 | ||
39403d82 DE |
502 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ |
503 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
504 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
505 | (MODE) = (! TARGET_POWERPC64 ? SImode : DImode); | |
506 | ||
507 | /* Define this if function arguments should also be promoted using the above | |
508 | procedure. */ | |
509 | ||
510 | #define PROMOTE_FUNCTION_ARGS | |
511 | ||
512 | /* Likewise, if the function return value is promoted. */ | |
513 | ||
514 | #define PROMOTE_FUNCTION_RETURN | |
ef457bda | 515 | |
f045b2c9 RS |
516 | /* Define this if most significant bit is lowest numbered |
517 | in instructions that operate on numbered bit-fields. */ | |
518 | /* That is true on RS/6000. */ | |
519 | #define BITS_BIG_ENDIAN 1 | |
520 | ||
521 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
522 | /* That is true on RS/6000. */ | |
523 | #define BYTES_BIG_ENDIAN 1 | |
524 | ||
525 | /* Define this if most significant word of a multiword number is lowest | |
c81bebd7 | 526 | numbered. |
f045b2c9 RS |
527 | |
528 | For RS/6000 we can decide arbitrarily since there are no machine | |
529 | instructions for them. Might as well be consistent with bits and bytes. */ | |
530 | #define WORDS_BIG_ENDIAN 1 | |
531 | ||
fdaff8ba | 532 | /* number of bits in an addressable storage unit */ |
f045b2c9 RS |
533 | #define BITS_PER_UNIT 8 |
534 | ||
535 | /* Width in bits of a "word", which is the contents of a machine register. | |
536 | Note that this is not necessarily the width of data type `int'; | |
537 | if using 16-bit ints on a 68000, this would still be 32. | |
538 | But on a machine with 16-bit registers, this would be 16. */ | |
2f3e5814 | 539 | #define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64) |
2e360ab3 | 540 | #define MAX_BITS_PER_WORD 64 |
f045b2c9 RS |
541 | |
542 | /* Width of a word, in units (bytes). */ | |
2f3e5814 | 543 | #define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8) |
ef0e53ce | 544 | #define MIN_UNITS_PER_WORD 4 |
2e360ab3 | 545 | #define UNITS_PER_FP_WORD 8 |
f045b2c9 | 546 | |
915f619f JW |
547 | /* Type used for ptrdiff_t, as a string used in a declaration. */ |
548 | #define PTRDIFF_TYPE "int" | |
549 | ||
f045b2c9 RS |
550 | /* Type used for wchar_t, as a string used in a declaration. */ |
551 | #define WCHAR_TYPE "short unsigned int" | |
552 | ||
553 | /* Width of wchar_t in bits. */ | |
554 | #define WCHAR_TYPE_SIZE 16 | |
555 | ||
9e654916 RK |
556 | /* A C expression for the size in bits of the type `short' on the |
557 | target machine. If you don't define this, the default is half a | |
558 | word. (If this would be less than one storage unit, it is | |
559 | rounded up to one unit.) */ | |
560 | #define SHORT_TYPE_SIZE 16 | |
561 | ||
562 | /* A C expression for the size in bits of the type `int' on the | |
563 | target machine. If you don't define this, the default is one | |
564 | word. */ | |
19d2d16f | 565 | #define INT_TYPE_SIZE 32 |
9e654916 RK |
566 | |
567 | /* A C expression for the size in bits of the type `long' on the | |
568 | target machine. If you don't define this, the default is one | |
569 | word. */ | |
2f3e5814 | 570 | #define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64) |
9e654916 RK |
571 | #define MAX_LONG_TYPE_SIZE 64 |
572 | ||
573 | /* A C expression for the size in bits of the type `long long' on the | |
574 | target machine. If you don't define this, the default is two | |
575 | words. */ | |
576 | #define LONG_LONG_TYPE_SIZE 64 | |
577 | ||
578 | /* A C expression for the size in bits of the type `char' on the | |
579 | target machine. If you don't define this, the default is one | |
580 | quarter of a word. (If this would be less than one storage unit, | |
581 | it is rounded up to one unit.) */ | |
582 | #define CHAR_TYPE_SIZE BITS_PER_UNIT | |
583 | ||
584 | /* A C expression for the size in bits of the type `float' on the | |
585 | target machine. If you don't define this, the default is one | |
586 | word. */ | |
587 | #define FLOAT_TYPE_SIZE 32 | |
588 | ||
589 | /* A C expression for the size in bits of the type `double' on the | |
590 | target machine. If you don't define this, the default is two | |
591 | words. */ | |
592 | #define DOUBLE_TYPE_SIZE 64 | |
593 | ||
594 | /* A C expression for the size in bits of the type `long double' on | |
595 | the target machine. If you don't define this, the default is two | |
596 | words. */ | |
597 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
598 | ||
f045b2c9 RS |
599 | /* Width in bits of a pointer. |
600 | See also the macro `Pmode' defined below. */ | |
2f3e5814 | 601 | #define POINTER_SIZE (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
602 | |
603 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
2f3e5814 | 604 | #define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64) |
f045b2c9 RS |
605 | |
606 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
a260abc9 | 607 | #define STACK_BOUNDARY (TARGET_32BIT ? 64 : 128) |
f045b2c9 RS |
608 | |
609 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
610 | #define FUNCTION_BOUNDARY 32 | |
611 | ||
612 | /* No data type wants to be aligned rounder than this. */ | |
b73fd26c DE |
613 | #define BIGGEST_ALIGNMENT 64 |
614 | ||
6bc3403c DE |
615 | /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */ |
616 | #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ | |
a260abc9 DE |
617 | (TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \ |
618 | ? get_inner_array_type (FIELD) \ | |
619 | : TREE_TYPE (FIELD)) == DFmode \ | |
620 | ? MIN ((COMPUTED), 32) : (COMPUTED)) | |
f045b2c9 RS |
621 | |
622 | /* Alignment of field after `int : 0' in a structure. */ | |
623 | #define EMPTY_FIELD_BOUNDARY 32 | |
624 | ||
625 | /* Every structure's size must be a multiple of this. */ | |
626 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
627 | ||
628 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
629 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
630 | ||
6bc3403c DE |
631 | /* AIX increases natural record alignment to doubleword if the first |
632 | field is an FP double while the FP fields remain word aligned. */ | |
633 | #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \ | |
634 | ((TREE_CODE (STRUCT) == RECORD_TYPE \ | |
635 | || TREE_CODE (STRUCT) == UNION_TYPE \ | |
636 | || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \ | |
02bef6da | 637 | && TYPE_FIELDS (STRUCT) != 0 \ |
6bc3403c DE |
638 | && DECL_MODE (TYPE_FIELDS (STRUCT)) == DFmode \ |
639 | ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \ | |
640 | : MAX ((COMPUTED), (SPECIFIED))) | |
641 | ||
f045b2c9 RS |
642 | /* Make strings word-aligned so strcpy from constants will be faster. */ |
643 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
644 | (TREE_CODE (EXP) == STRING_CST \ | |
645 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
646 | ||
647 | /* Make arrays of chars word-aligned for the same reasons. */ | |
648 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
649 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
650 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
651 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
652 | ||
fdaff8ba | 653 | /* Non-zero if move instructions will actually fail to work |
f045b2c9 | 654 | when given unaligned data. */ |
fdaff8ba | 655 | #define STRICT_ALIGNMENT 0 |
f045b2c9 RS |
656 | \f |
657 | /* Standard register usage. */ | |
658 | ||
659 | /* Number of actual hardware registers. | |
660 | The hardware registers are assigned numbers for the compiler | |
661 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
662 | All registers that the compiler knows about must be given numbers, | |
663 | even those that are not normally considered general registers. | |
664 | ||
665 | RS/6000 has 32 fixed-point registers, 32 floating-point registers, | |
666 | an MQ register, a count register, a link register, and 8 condition | |
667 | register fields, which we view here as separate registers. | |
668 | ||
669 | In addition, the difference between the frame and argument pointers is | |
670 | a function of the number of registers saved, so we need to have a | |
671 | register for AP that will later be eliminated in favor of SP or FP. | |
802a0058 | 672 | This is a normal register, but it is fixed. |
f045b2c9 | 673 | |
802a0058 MM |
674 | We also create a pseudo register for float/int conversions, that will |
675 | really represent the memory location used. It is represented here as | |
676 | a register, in order to work around problems in allocating stack storage | |
677 | in inline functions. */ | |
678 | ||
679 | #define FIRST_PSEUDO_REGISTER 77 | |
f045b2c9 RS |
680 | |
681 | /* 1 for registers that have pervasive standard uses | |
682 | and are not available for the register allocator. | |
683 | ||
c81bebd7 | 684 | On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer. |
f045b2c9 | 685 | |
a127c4e5 RK |
686 | cr5 is not supposed to be used. |
687 | ||
688 | On System V implementations, r13 is fixed and not available for use. */ | |
689 | ||
690 | #ifndef FIXED_R13 | |
691 | #define FIXED_R13 0 | |
692 | #endif | |
f045b2c9 RS |
693 | |
694 | #define FIXED_REGISTERS \ | |
a127c4e5 | 695 | {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
696 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
697 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
698 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
802a0058 | 699 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1} |
f045b2c9 RS |
700 | |
701 | /* 1 for registers not available across function calls. | |
702 | These must include the FIXED_REGISTERS and also any | |
703 | registers that can be used without being saved. | |
704 | The latter must include the registers where values are returned | |
705 | and the register where structure-value addresses are passed. | |
706 | Aside from that, you can include as many other registers as you like. */ | |
707 | ||
708 | #define CALL_USED_REGISTERS \ | |
a127c4e5 | 709 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \ |
f045b2c9 RS |
710 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
711 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \ | |
712 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
802a0058 | 713 | 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1} |
f045b2c9 RS |
714 | |
715 | /* List the order in which to allocate registers. Each register must be | |
716 | listed once, even those in FIXED_REGISTERS. | |
717 | ||
718 | We allocate in the following order: | |
719 | fp0 (not saved or used for anything) | |
720 | fp13 - fp2 (not saved; incoming fp arg registers) | |
721 | fp1 (not saved; return value) | |
722 | fp31 - fp14 (saved; order given to save least number) | |
5accd822 DE |
723 | cr7, cr6 (not saved or special) |
724 | cr1 (not saved, but used for FP operations) | |
f045b2c9 | 725 | cr0 (not saved, but used for arithmetic operations) |
5accd822 | 726 | cr4, cr3, cr2 (saved) |
f045b2c9 RS |
727 | r0 (not saved; cannot be base reg) |
728 | r9 (not saved; best for TImode) | |
729 | r11, r10, r8-r4 (not saved; highest used first to make less conflict) | |
730 | r3 (not saved; return value register) | |
731 | r31 - r13 (saved; order given to save least number) | |
732 | r12 (not saved; if used for DImode or DFmode would use r13) | |
733 | mq (not saved; best to use it if we can) | |
734 | ctr (not saved; when we have the choice ctr is better) | |
735 | lr (saved) | |
1427100a | 736 | cr5, r1, r2, ap, fpmem (fixed) */ |
f045b2c9 RS |
737 | |
738 | #define REG_ALLOC_ORDER \ | |
739 | {32, \ | |
740 | 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \ | |
741 | 33, \ | |
742 | 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ | |
743 | 50, 49, 48, 47, 46, \ | |
5accd822 | 744 | 75, 74, 69, 68, 72, 71, 70, \ |
f045b2c9 RS |
745 | 0, \ |
746 | 9, 11, 10, 8, 7, 6, 5, 4, \ | |
747 | 3, \ | |
748 | 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \ | |
749 | 18, 17, 16, 15, 14, 13, 12, \ | |
750 | 64, 66, 65, \ | |
802a0058 | 751 | 73, 1, 2, 67, 76} |
f045b2c9 RS |
752 | |
753 | /* True if register is floating-point. */ | |
754 | #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63) | |
755 | ||
756 | /* True if register is a condition register. */ | |
757 | #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75) | |
758 | ||
759 | /* True if register is an integer register. */ | |
760 | #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67) | |
761 | ||
802a0058 MM |
762 | /* True if register is the temporary memory location used for int/float |
763 | conversion. */ | |
764 | #define FPMEM_REGNO_P(N) ((N) == FPMEM_REGNUM) | |
765 | ||
f045b2c9 RS |
766 | /* Return number of consecutive hard regs needed starting at reg REGNO |
767 | to hold something of mode MODE. | |
768 | This is ordinarily the length in words of a value of mode MODE | |
769 | but can be less for certain modes in special long registers. | |
770 | ||
a260abc9 DE |
771 | POWER and PowerPC GPRs hold 32 bits worth; |
772 | PowerPC64 GPRs and FPRs point register holds 64 bits worth. */ | |
f045b2c9 | 773 | |
802a0058 MM |
774 | #define HARD_REGNO_NREGS(REGNO, MODE) \ |
775 | (FP_REGNO_P (REGNO) || FPMEM_REGNO_P (REGNO) \ | |
2e360ab3 | 776 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 RS |
777 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
778 | ||
779 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
bdfd4e31 RK |
780 | For POWER and PowerPC, the GPRs can hold any mode, but the float |
781 | registers only can hold floating modes and DImode, and CR register only | |
782 | can hold CC modes. We cannot put TImode anywhere except general | |
783 | register and it must be able to fit within the register set. */ | |
f045b2c9 | 784 | |
802a0058 MM |
785 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
786 | (FP_REGNO_P (REGNO) ? \ | |
787 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
788 | || (GET_MODE_CLASS (MODE) == MODE_INT \ | |
789 | && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \ | |
790 | : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ | |
791 | : FPMEM_REGNO_P (REGNO) ? ((MODE) == DImode || (MODE) == DFmode) \ | |
792 | : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ | |
bdfd4e31 | 793 | && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ |
f045b2c9 RS |
794 | : 1) |
795 | ||
796 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
797 | when one has mode MODE1 and one has mode MODE2. | |
798 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
799 | for any hard reg, then this must be 0 for correct output. */ | |
800 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
801 | (GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
802 | ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
803 | : GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
804 | ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
805 | : GET_MODE_CLASS (MODE1) == MODE_CC \ | |
806 | ? GET_MODE_CLASS (MODE2) == MODE_CC \ | |
807 | : GET_MODE_CLASS (MODE2) == MODE_CC \ | |
808 | ? GET_MODE_CLASS (MODE1) == MODE_CC \ | |
809 | : 1) | |
810 | ||
811 | /* A C expression returning the cost of moving data from a register of class | |
812 | CLASS1 to one of CLASS2. | |
813 | ||
814 | On the RS/6000, copying between floating-point and fixed-point | |
815 | registers is expensive. */ | |
816 | ||
817 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
818 | ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \ | |
819 | : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \ | |
820 | : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \ | |
a4b970a0 | 821 | : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \ |
5119dc13 RK |
822 | || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \ |
823 | || (CLASS1) == LINK_OR_CTR_REGS) \ | |
a4b970a0 | 824 | && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \ |
5119dc13 | 825 | || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \ |
802a0058 | 826 | || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \ |
f045b2c9 RS |
827 | : 2) |
828 | ||
829 | /* A C expressions returning the cost of moving data of MODE from a register to | |
830 | or from memory. | |
831 | ||
832 | On the RS/6000, bump this up a bit. */ | |
833 | ||
cbd5b9a2 | 834 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) \ |
ab4a5fc9 RK |
835 | ((GET_MODE_CLASS (MODE) == MODE_FLOAT \ |
836 | && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \ | |
837 | ? 3 : 2) \ | |
838 | + 4) | |
f045b2c9 RS |
839 | |
840 | /* Specify the cost of a branch insn; roughly the number of extra insns that | |
841 | should be added to avoid a branch. | |
842 | ||
ef457bda | 843 | Set this to 3 on the RS/6000 since that is roughly the average cost of an |
f045b2c9 RS |
844 | unscheduled conditional branch. */ |
845 | ||
ef457bda | 846 | #define BRANCH_COST 3 |
f045b2c9 | 847 | |
5a5e4c2c RK |
848 | /* A C statement (sans semicolon) to update the integer variable COST |
849 | based on the relationship between INSN that is dependent on | |
850 | DEP_INSN through the dependence LINK. The default is to make no | |
851 | adjustment to COST. On the RS/6000, ignore the cost of anti- and | |
852 | output-dependencies. In fact, output dependencies on the CR do have | |
853 | a cost, but it is probably not worthwhile to track it. */ | |
854 | ||
855 | #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \ | |
b0634e74 | 856 | (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST) |
5a5e4c2c | 857 | |
6febd581 RK |
858 | /* Define this macro to change register usage conditional on target flags. |
859 | Set MQ register fixed (already call_used) if not POWER architecture | |
f85f4585 | 860 | (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. |
a238cd8b | 861 | 64-bit AIX reserves GPR13 for thread-private data. |
f85f4585 RK |
862 | Conditionally disable FPRs. */ |
863 | ||
864 | #define CONDITIONAL_REGISTER_USAGE \ | |
865 | { \ | |
866 | if (! TARGET_POWER) \ | |
867 | fixed_regs[64] = 1; \ | |
a238cd8b DE |
868 | if (TARGET_64BIT) \ |
869 | fixed_regs[13] = call_used_regs[13] = 1; \ | |
d14a6d05 MM |
870 | if (TARGET_SOFT_FLOAT) \ |
871 | for (i = 32; i < 64; i++) \ | |
f85f4585 RK |
872 | fixed_regs[i] = call_used_regs[i] = 1; \ |
873 | } | |
6febd581 | 874 | |
f045b2c9 RS |
875 | /* Specify the registers used for certain standard purposes. |
876 | The values of these macros are register numbers. */ | |
877 | ||
878 | /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */ | |
879 | /* #define PC_REGNUM */ | |
880 | ||
881 | /* Register to use for pushing function arguments. */ | |
882 | #define STACK_POINTER_REGNUM 1 | |
883 | ||
884 | /* Base register for access to local variables of the function. */ | |
885 | #define FRAME_POINTER_REGNUM 31 | |
886 | ||
887 | /* Value should be nonzero if functions must have frame pointers. | |
888 | Zero means the frame pointer need not be set up (and parms | |
889 | may be accessed via the stack pointer) in functions that seem suitable. | |
890 | This is computed in `reload', in reload1.c. */ | |
891 | #define FRAME_POINTER_REQUIRED 0 | |
892 | ||
893 | /* Base register for access to arguments of the function. */ | |
894 | #define ARG_POINTER_REGNUM 67 | |
895 | ||
896 | /* Place to put static chain when calling a function that requires it. */ | |
897 | #define STATIC_CHAIN_REGNUM 11 | |
898 | ||
b6c9286a MM |
899 | /* count register number for special purposes */ |
900 | #define COUNT_REGISTER_REGNUM 66 | |
901 | ||
802a0058 MM |
902 | /* Special register that represents memory, used for float/int conversions. */ |
903 | #define FPMEM_REGNUM 76 | |
904 | ||
1ff7789b MM |
905 | /* Register to use as a placeholder for the GOT/allocated TOC register. |
906 | FINALIZE_PIC will change all uses of this register to a an appropriate | |
907 | pseudo register when it adds the code to setup the GOT. We use r2 | |
908 | because it is a reserved register in all of the ABI's. */ | |
909 | #define GOT_TOC_REGNUM 2 | |
910 | ||
f045b2c9 RS |
911 | /* Place that structure value return address is placed. |
912 | ||
913 | On the RS/6000, it is passed as an extra parameter. */ | |
1ff7789b | 914 | #define STRUCT_VALUE 0 |
f045b2c9 RS |
915 | \f |
916 | /* Define the classes of registers for register constraints in the | |
917 | machine description. Also define ranges of constants. | |
918 | ||
919 | One of the classes must always be named ALL_REGS and include all hard regs. | |
920 | If there is more than one class, another class must be named NO_REGS | |
921 | and contain no registers. | |
922 | ||
923 | The name GENERAL_REGS must be the name of a class (or an alias for | |
924 | another name such as ALL_REGS). This is the class of registers | |
925 | that is allowed by "g" or "r" in a register constraint. | |
926 | Also, registers outside this class are allocated only when | |
927 | instructions express preferences for them. | |
928 | ||
929 | The classes must be numbered in nondecreasing order; that is, | |
930 | a larger-numbered class must never be contained completely | |
931 | in a smaller-numbered class. | |
932 | ||
933 | For any two classes, it is very desirable that there be another | |
934 | class that represents their union. */ | |
c81bebd7 | 935 | |
f045b2c9 RS |
936 | /* The RS/6000 has three types of registers, fixed-point, floating-point, |
937 | and condition registers, plus three special registers, MQ, CTR, and the | |
938 | link register. | |
939 | ||
940 | However, r0 is special in that it cannot be used as a base register. | |
941 | So make a class for registers valid as base registers. | |
942 | ||
943 | Also, cr0 is the only condition code register that can be used in | |
802a0058 MM |
944 | arithmetic insns, so make a separate class for it. |
945 | ||
956d6950 | 946 | There is a special 'register' (76), which is not a register, but a |
802a0058 MM |
947 | placeholder for memory allocated to convert between floating point and |
948 | integral types. This works around a problem where if we allocate memory | |
949 | with allocate_stack_{local,temp} and the function is an inline function, the | |
950 | memory allocated will clobber memory in the caller. So we use a special | |
951 | register, and if that is used, we allocate stack space for it. */ | |
f045b2c9 | 952 | |
ebedb4dd MM |
953 | enum reg_class |
954 | { | |
955 | NO_REGS, | |
ebedb4dd MM |
956 | BASE_REGS, |
957 | GENERAL_REGS, | |
958 | FLOAT_REGS, | |
959 | NON_SPECIAL_REGS, | |
960 | MQ_REGS, | |
961 | LINK_REGS, | |
962 | CTR_REGS, | |
963 | LINK_OR_CTR_REGS, | |
964 | SPECIAL_REGS, | |
965 | SPEC_OR_GEN_REGS, | |
966 | CR0_REGS, | |
ebedb4dd MM |
967 | CR_REGS, |
968 | NON_FLOAT_REGS, | |
802a0058 MM |
969 | FPMEM_REGS, |
970 | FLOAT_OR_FPMEM_REGS, | |
ebedb4dd MM |
971 | ALL_REGS, |
972 | LIM_REG_CLASSES | |
973 | }; | |
f045b2c9 RS |
974 | |
975 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
976 | ||
977 | /* Give names of register classes as strings for dump file. */ | |
978 | ||
ebedb4dd MM |
979 | #define REG_CLASS_NAMES \ |
980 | { \ | |
981 | "NO_REGS", \ | |
ebedb4dd MM |
982 | "BASE_REGS", \ |
983 | "GENERAL_REGS", \ | |
984 | "FLOAT_REGS", \ | |
985 | "NON_SPECIAL_REGS", \ | |
986 | "MQ_REGS", \ | |
987 | "LINK_REGS", \ | |
988 | "CTR_REGS", \ | |
989 | "LINK_OR_CTR_REGS", \ | |
990 | "SPECIAL_REGS", \ | |
991 | "SPEC_OR_GEN_REGS", \ | |
992 | "CR0_REGS", \ | |
ebedb4dd MM |
993 | "CR_REGS", \ |
994 | "NON_FLOAT_REGS", \ | |
802a0058 MM |
995 | "FPMEM_REGS", \ |
996 | "FLOAT_OR_FPMEM_REGS", \ | |
ebedb4dd MM |
997 | "ALL_REGS" \ |
998 | } | |
f045b2c9 RS |
999 | |
1000 | /* Define which registers fit in which classes. | |
1001 | This is an initializer for a vector of HARD_REG_SET | |
1002 | of length N_REG_CLASSES. */ | |
1003 | ||
ebedb4dd MM |
1004 | #define REG_CLASS_CONTENTS \ |
1005 | { \ | |
1006 | { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ | |
ebedb4dd MM |
1007 | { 0xfffffffe, 0x00000000, 0x00000008 }, /* BASE_REGS */ \ |
1008 | { 0xffffffff, 0x00000000, 0x00000008 }, /* GENERAL_REGS */ \ | |
1009 | { 0x00000000, 0xffffffff, 0x00000000 }, /* FLOAT_REGS */ \ | |
1010 | { 0xffffffff, 0xffffffff, 0x00000008 }, /* NON_SPECIAL_REGS */ \ | |
1011 | { 0x00000000, 0x00000000, 0x00000001 }, /* MQ_REGS */ \ | |
1012 | { 0x00000000, 0x00000000, 0x00000002 }, /* LINK_REGS */ \ | |
1013 | { 0x00000000, 0x00000000, 0x00000004 }, /* CTR_REGS */ \ | |
1014 | { 0x00000000, 0x00000000, 0x00000006 }, /* LINK_OR_CTR_REGS */ \ | |
1015 | { 0x00000000, 0x00000000, 0x00000007 }, /* SPECIAL_REGS */ \ | |
1016 | { 0xffffffff, 0x00000000, 0x0000000f }, /* SPEC_OR_GEN_REGS */ \ | |
1017 | { 0x00000000, 0x00000000, 0x00000010 }, /* CR0_REGS */ \ | |
ebedb4dd MM |
1018 | { 0x00000000, 0x00000000, 0x00000ff0 }, /* CR_REGS */ \ |
1019 | { 0xffffffff, 0x00000000, 0x0000ffff }, /* NON_FLOAT_REGS */ \ | |
802a0058 MM |
1020 | { 0x00000000, 0x00000000, 0x00010000 }, /* FPMEM_REGS */ \ |
1021 | { 0x00000000, 0xffffffff, 0x00010000 }, /* FLOAT_OR_FPMEM_REGS */ \ | |
1022 | { 0xffffffff, 0xffffffff, 0x0001ffff } /* ALL_REGS */ \ | |
ebedb4dd | 1023 | } |
f045b2c9 RS |
1024 | |
1025 | /* The same information, inverted: | |
1026 | Return the class number of the smallest class containing | |
1027 | reg number REGNO. This could be a conditional expression | |
1028 | or could index an array. */ | |
1029 | ||
802a0058 MM |
1030 | #define REGNO_REG_CLASS(REGNO) \ |
1031 | ((REGNO) == 0 ? GENERAL_REGS \ | |
1032 | : (REGNO) < 32 ? BASE_REGS \ | |
1033 | : FP_REGNO_P (REGNO) ? FLOAT_REGS \ | |
1034 | : (REGNO) == 68 ? CR0_REGS \ | |
1035 | : CR_REGNO_P (REGNO) ? CR_REGS \ | |
1036 | : (REGNO) == 64 ? MQ_REGS \ | |
1037 | : (REGNO) == 65 ? LINK_REGS \ | |
1038 | : (REGNO) == 66 ? CTR_REGS \ | |
1039 | : (REGNO) == 67 ? BASE_REGS \ | |
1040 | : (REGNO) == 76 ? FPMEM_REGS \ | |
f045b2c9 RS |
1041 | : NO_REGS) |
1042 | ||
1043 | /* The class value for index registers, and the one for base regs. */ | |
1044 | #define INDEX_REG_CLASS GENERAL_REGS | |
1045 | #define BASE_REG_CLASS BASE_REGS | |
1046 | ||
1047 | /* Get reg_class from a letter such as appears in the machine description. */ | |
1048 | ||
1049 | #define REG_CLASS_FROM_LETTER(C) \ | |
1050 | ((C) == 'f' ? FLOAT_REGS \ | |
1051 | : (C) == 'b' ? BASE_REGS \ | |
1052 | : (C) == 'h' ? SPECIAL_REGS \ | |
1053 | : (C) == 'q' ? MQ_REGS \ | |
1054 | : (C) == 'c' ? CTR_REGS \ | |
1055 | : (C) == 'l' ? LINK_REGS \ | |
1056 | : (C) == 'x' ? CR0_REGS \ | |
1057 | : (C) == 'y' ? CR_REGS \ | |
802a0058 | 1058 | : (C) == 'z' ? FPMEM_REGS \ |
f045b2c9 RS |
1059 | : NO_REGS) |
1060 | ||
1061 | /* The letters I, J, K, L, M, N, and P in a register constraint string | |
1062 | can be used to stand for particular ranges of immediate operands. | |
1063 | This macro defines what the ranges are. | |
1064 | C is the letter, and VALUE is a constant value. | |
1065 | Return 1 if VALUE is in the range specified by C. | |
1066 | ||
c81bebd7 | 1067 | `I' is signed 16-bit constants |
f045b2c9 RS |
1068 | `J' is a constant with only the high-order 16 bits non-zero |
1069 | `K' is a constant with only the low-order 16 bits non-zero | |
1070 | `L' is a constant that can be placed into a mask operand | |
1071 | `M' is a constant that is greater than 31 | |
1072 | `N' is a constant that is an exact power of two | |
1073 | `O' is the constant zero | |
1074 | `P' is a constant whose negation is a signed 16-bit constant */ | |
1075 | ||
5b6f7b96 RK |
1076 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ |
1077 | ( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ | |
1078 | : (C) == 'J' ? ((VALUE) & 0xffff) == 0 \ | |
a260abc9 | 1079 | : (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \ |
5b6f7b96 RK |
1080 | : (C) == 'L' ? mask_constant (VALUE) \ |
1081 | : (C) == 'M' ? (VALUE) > 31 \ | |
1082 | : (C) == 'N' ? exact_log2 (VALUE) >= 0 \ | |
1083 | : (C) == 'O' ? (VALUE) == 0 \ | |
1084 | : (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x1000 \ | |
f045b2c9 RS |
1085 | : 0) |
1086 | ||
1087 | /* Similar, but for floating constants, and defining letters G and H. | |
1088 | Here VALUE is the CONST_DOUBLE rtx itself. | |
1089 | ||
1090 | We flag for special constants when we can copy the constant into | |
4e74d8ec | 1091 | a general register in two insns for DF/DI and one insn for SF. |
f045b2c9 | 1092 | |
c4c40373 | 1093 | 'H' is used for DI/DF constants that take 3 insns. */ |
4e74d8ec MM |
1094 | |
1095 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
c4c40373 MM |
1096 | ( (C) == 'G' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) \ |
1097 | == ((GET_MODE (VALUE) == SFmode) ? 1 : 2)) \ | |
1098 | : (C) == 'H' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) == 3) \ | |
1099 | : 0) | |
f045b2c9 RS |
1100 | |
1101 | /* Optional extra constraints for this machine. | |
1102 | ||
b6c9286a MM |
1103 | 'Q' means that is a memory operand that is just an offset from a reg. |
1104 | 'R' is for AIX TOC entries. | |
a260abc9 | 1105 | 'S' is a constant that can be placed into a 64-bit mask operand |
88228c4b | 1106 | 'U' is for V.4 small data references. */ |
f045b2c9 | 1107 | |
e8a8bc24 RK |
1108 | #define EXTRA_CONSTRAINT(OP, C) \ |
1109 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ | |
d537c24d | 1110 | : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ |
a260abc9 | 1111 | : (C) == 'S' ? mask64_operand (OP, VOIDmode) \ |
c81bebd7 MM |
1112 | : (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ |
1113 | && small_data_operand (OP, GET_MODE (OP))) \ | |
e8a8bc24 | 1114 | : 0) |
f045b2c9 RS |
1115 | |
1116 | /* Given an rtx X being reloaded into a reg required to be | |
1117 | in class CLASS, return the class of reg to actually use. | |
1118 | In general this is just CLASS; but on some machines | |
c81bebd7 | 1119 | in some cases it is preferable to use a more restrictive class. |
f045b2c9 RS |
1120 | |
1121 | On the RS/6000, we have to return NO_REGS when we want to reload a | |
1122 | floating-point CONST_DOUBLE to force it to be copied to memory. */ | |
1123 | ||
802a0058 | 1124 | #define PREFERRED_RELOAD_CLASS(X,CLASS) \ |
f045b2c9 RS |
1125 | ((GET_CODE (X) == CONST_DOUBLE \ |
1126 | && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1127 | ? NO_REGS : (CLASS)) | |
c81bebd7 | 1128 | |
f045b2c9 RS |
1129 | /* Return the register class of a scratch register needed to copy IN into |
1130 | or out of a register in CLASS in MODE. If it can be done directly, | |
1131 | NO_REGS is returned. */ | |
1132 | ||
1133 | #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ | |
1134 | secondary_reload_class (CLASS, MODE, IN) | |
1135 | ||
7ea555a4 RK |
1136 | /* If we are copying between FP registers and anything else, we need a memory |
1137 | location. */ | |
1138 | ||
1139 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ | |
1140 | ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS)) | |
1141 | ||
f045b2c9 RS |
1142 | /* Return the maximum number of consecutive registers |
1143 | needed to represent mode MODE in a register of class CLASS. | |
1144 | ||
1145 | On RS/6000, this is the size of MODE in words, | |
1146 | except in the FP regs, where a single reg is enough for two words. */ | |
802a0058 MM |
1147 | #define CLASS_MAX_NREGS(CLASS, MODE) \ |
1148 | (((CLASS) == FLOAT_REGS || (CLASS) == FPMEM_REGS \ | |
1149 | || (CLASS) == FLOAT_OR_FPMEM_REGS) \ | |
2e360ab3 | 1150 | ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \ |
f045b2c9 | 1151 | : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) |
580d3230 RK |
1152 | |
1153 | /* If defined, gives a class of registers that cannot be used as the | |
1154 | operand of a SUBREG that changes the size of the object. */ | |
1155 | ||
802a0058 | 1156 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_OR_FPMEM_REGS |
f045b2c9 RS |
1157 | \f |
1158 | /* Stack layout; function entry, exit and calling. */ | |
1159 | ||
6b67933e RK |
1160 | /* Enumeration to give which calling sequence to use. */ |
1161 | enum rs6000_abi { | |
1162 | ABI_NONE, | |
1163 | ABI_AIX, /* IBM's AIX */ | |
b6c9286a MM |
1164 | ABI_AIX_NODESC, /* AIX calling sequence minus function descriptors */ |
1165 | ABI_V4, /* System V.4/eabi */ | |
c81bebd7 MM |
1166 | ABI_NT, /* Windows/NT */ |
1167 | ABI_SOLARIS /* Solaris */ | |
6b67933e RK |
1168 | }; |
1169 | ||
b6c9286a MM |
1170 | extern enum rs6000_abi rs6000_current_abi; /* available for use by subtarget */ |
1171 | ||
1172 | /* Default ABI to compile code for */ | |
1173 | #ifndef DEFAULT_ABI | |
1174 | #define DEFAULT_ABI ABI_AIX | |
fb19c17f RK |
1175 | /* The prefix to add to user-visible assembler symbols. */ |
1176 | #define USER_LABEL_PREFIX "." | |
b6c9286a MM |
1177 | #endif |
1178 | ||
4697a36c MM |
1179 | /* Structure used to define the rs6000 stack */ |
1180 | typedef struct rs6000_stack { | |
1181 | int first_gp_reg_save; /* first callee saved GP register used */ | |
1182 | int first_fp_reg_save; /* first callee saved FP register used */ | |
1183 | int lr_save_p; /* true if the link reg needs to be saved */ | |
1184 | int cr_save_p; /* true if the CR reg needs to be saved */ | |
b6c9286a | 1185 | int toc_save_p; /* true if the TOC needs to be saved */ |
4697a36c MM |
1186 | int push_p; /* true if we need to allocate stack space */ |
1187 | int calls_p; /* true if the function makes any calls */ | |
b6c9286a MM |
1188 | int main_p; /* true if this is main */ |
1189 | int main_save_p; /* true if this is main and we need to save args */ | |
802a0058 | 1190 | int fpmem_p; /* true if float/int conversion temp needed */ |
6b67933e | 1191 | enum rs6000_abi abi; /* which ABI to use */ |
abc95ed3 RK |
1192 | int gp_save_offset; /* offset to save GP regs from initial SP */ |
1193 | int fp_save_offset; /* offset to save FP regs from initial SP */ | |
4697a36c MM |
1194 | int lr_save_offset; /* offset to save LR from initial SP */ |
1195 | int cr_save_offset; /* offset to save CR from initial SP */ | |
b6c9286a | 1196 | int toc_save_offset; /* offset to save the TOC pointer */ |
4697a36c | 1197 | int varargs_save_offset; /* offset to save the varargs registers */ |
b6c9286a | 1198 | int main_save_offset; /* offset to save main's args */ |
802a0058 | 1199 | int fpmem_offset; /* offset for float/int conversion temp */ |
4697a36c MM |
1200 | int reg_size; /* register size (4 or 8) */ |
1201 | int varargs_size; /* size to hold V.4 args passed in regs */ | |
1202 | int vars_size; /* variable save area size */ | |
1203 | int parm_size; /* outgoing parameter size */ | |
b6c9286a | 1204 | int main_size; /* size to hold saving main's args */ |
4697a36c MM |
1205 | int save_size; /* save area size */ |
1206 | int fixed_size; /* fixed size of stack frame */ | |
1207 | int gp_size; /* size of saved GP registers */ | |
1208 | int fp_size; /* size of saved FP registers */ | |
1209 | int cr_size; /* size to hold CR if not in save_size */ | |
b6c9286a | 1210 | int lr_size; /* size to hold LR if not in save_size */ |
802a0058 | 1211 | int fpmem_size; /* size to hold float/int conversion */ |
b6c9286a | 1212 | int toc_size; /* size to hold TOC if not in save_size */ |
4697a36c MM |
1213 | int total_size; /* total bytes allocated for stack */ |
1214 | } rs6000_stack_t; | |
1215 | ||
f045b2c9 RS |
1216 | /* Define this if pushing a word on the stack |
1217 | makes the stack pointer a smaller address. */ | |
1218 | #define STACK_GROWS_DOWNWARD | |
1219 | ||
1220 | /* Define this if the nominal address of the stack frame | |
1221 | is at the high-address end of the local variables; | |
1222 | that is, each additional local variable allocated | |
1223 | goes at a more negative offset in the frame. | |
1224 | ||
1225 | On the RS/6000, we grow upwards, from the area after the outgoing | |
1226 | arguments. */ | |
1227 | /* #define FRAME_GROWS_DOWNWARD */ | |
1228 | ||
4697a36c | 1229 | /* Size of the outgoing register save area */ |
2f3e5814 | 1230 | #define RS6000_REG_SAVE (TARGET_32BIT ? 32 : 64) |
4697a36c MM |
1231 | |
1232 | /* Size of the fixed area on the stack */ | |
2f3e5814 | 1233 | #define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48) |
4697a36c | 1234 | |
b6c9286a | 1235 | /* Address to save the TOC register */ |
a260abc9 | 1236 | #define RS6000_SAVE_TOC plus_constant (stack_pointer_rtx, (TARGET_32BIT ? 20 : 40)) |
b6c9286a | 1237 | |
802a0058 MM |
1238 | /* Offset & size for fpmem stack locations used for converting between |
1239 | float and integral types. */ | |
1240 | extern int rs6000_fpmem_offset; | |
1241 | extern int rs6000_fpmem_size; | |
1242 | ||
4697a36c MM |
1243 | /* Size of the V.4 varargs area if needed */ |
1244 | #define RS6000_VARARGS_AREA 0 | |
1245 | ||
1246 | /* Whether a V.4 varargs area is needed */ | |
1247 | extern int rs6000_sysv_varargs_p; | |
1248 | ||
1249 | /* Align an address */ | |
ed33106f | 1250 | #define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1)) |
4697a36c | 1251 | |
a7df97e6 MM |
1252 | /* Initialize data used by insn expanders. This is called from |
1253 | init_emit, once for each function, before code is generated. */ | |
1254 | #define INIT_EXPANDERS rs6000_init_expanders () | |
1255 | ||
4697a36c MM |
1256 | /* Size of V.4 varargs area in bytes */ |
1257 | #define RS6000_VARARGS_SIZE \ | |
2f3e5814 | 1258 | ((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8) |
4697a36c MM |
1259 | |
1260 | /* Offset of V.4 varargs area */ | |
802a0058 | 1261 | #define RS6000_VARARGS_OFFSET \ |
ed33106f | 1262 | (RS6000_ALIGN (current_function_outgoing_args_size, 8) \ |
802a0058 | 1263 | + RS6000_SAVE_AREA) |
4697a36c | 1264 | |
f045b2c9 RS |
1265 | /* Offset within stack frame to start allocating local variables at. |
1266 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
1267 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
c81bebd7 | 1268 | of the first local allocated. |
f045b2c9 RS |
1269 | |
1270 | On the RS/6000, the frame pointer is the same as the stack pointer, | |
1271 | except for dynamic allocations. So we start after the fixed area and | |
1272 | outgoing parameter area. */ | |
1273 | ||
802a0058 | 1274 | #define STARTING_FRAME_OFFSET \ |
ed33106f | 1275 | (RS6000_ALIGN (current_function_outgoing_args_size, 8) \ |
802a0058 MM |
1276 | + RS6000_VARARGS_AREA \ |
1277 | + RS6000_SAVE_AREA) | |
1278 | ||
1279 | /* Offset from the stack pointer register to an item dynamically | |
1280 | allocated on the stack, e.g., by `alloca'. | |
1281 | ||
1282 | The default value for this macro is `STACK_POINTER_OFFSET' plus the | |
1283 | length of the outgoing arguments. The default is correct for most | |
1284 | machines. See `function.c' for details. */ | |
1285 | #define STACK_DYNAMIC_OFFSET(FUNDECL) \ | |
ed33106f | 1286 | (RS6000_ALIGN (current_function_outgoing_args_size, 8) \ |
802a0058 | 1287 | + (STACK_POINTER_OFFSET)) |
f045b2c9 RS |
1288 | |
1289 | /* If we generate an insn to push BYTES bytes, | |
1290 | this says how many the stack pointer really advances by. | |
1291 | On RS/6000, don't define this because there are no push insns. */ | |
1292 | /* #define PUSH_ROUNDING(BYTES) */ | |
1293 | ||
1294 | /* Offset of first parameter from the argument pointer register value. | |
1295 | On the RS/6000, we define the argument pointer to the start of the fixed | |
1296 | area. */ | |
4697a36c | 1297 | #define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA |
f045b2c9 RS |
1298 | |
1299 | /* Define this if stack space is still allocated for a parameter passed | |
1300 | in a register. The value is the number of bytes allocated to this | |
1301 | area. */ | |
4697a36c | 1302 | #define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE |
f045b2c9 RS |
1303 | |
1304 | /* Define this if the above stack space is to be considered part of the | |
1305 | space allocated by the caller. */ | |
1306 | #define OUTGOING_REG_PARM_STACK_SPACE | |
1307 | ||
1308 | /* This is the difference between the logical top of stack and the actual sp. | |
1309 | ||
1310 | For the RS/6000, sp points past the fixed area. */ | |
4697a36c | 1311 | #define STACK_POINTER_OFFSET RS6000_SAVE_AREA |
f045b2c9 RS |
1312 | |
1313 | /* Define this if the maximum size of all the outgoing args is to be | |
1314 | accumulated and pushed during the prologue. The amount can be | |
1315 | found in the variable current_function_outgoing_args_size. */ | |
1316 | #define ACCUMULATE_OUTGOING_ARGS | |
1317 | ||
1318 | /* Value is the number of bytes of arguments automatically | |
1319 | popped when returning from a subroutine call. | |
8b109b37 | 1320 | FUNDECL is the declaration node of the function (as a tree), |
f045b2c9 RS |
1321 | FUNTYPE is the data type of the function (as a tree), |
1322 | or for a library call it is an identifier node for the subroutine name. | |
1323 | SIZE is the number of bytes of arguments passed on the stack. */ | |
1324 | ||
8b109b37 | 1325 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
f045b2c9 RS |
1326 | |
1327 | /* Define how to find the value returned by a function. | |
1328 | VALTYPE is the data type of the value (as a tree). | |
1329 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
1330 | otherwise, FUNC is 0. | |
1331 | ||
c81bebd7 | 1332 | On RS/6000 an integer value is in r3 and a floating-point value is in |
d14a6d05 | 1333 | fp1, unless -msoft-float. */ |
f045b2c9 | 1334 | |
39403d82 DE |
1335 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
1336 | gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ | |
1337 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ | |
1338 | || POINTER_TYPE_P (VALTYPE) \ | |
1339 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
1340 | TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3) | |
f045b2c9 RS |
1341 | |
1342 | /* Define how to find the value returned by a library function | |
1343 | assuming the value has mode MODE. */ | |
1344 | ||
1345 | #define LIBCALL_VALUE(MODE) \ | |
39403d82 DE |
1346 | gen_rtx_REG (MODE, \ |
1347 | GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) | |
f045b2c9 RS |
1348 | |
1349 | /* The definition of this macro implies that there are cases where | |
1350 | a scalar value cannot be returned in registers. | |
1351 | ||
c81bebd7 MM |
1352 | For the RS/6000, any structure or union type is returned in memory, except for |
1353 | Solaris, which returns structures <= 8 bytes in registers. */ | |
f045b2c9 | 1354 | |
c81bebd7 MM |
1355 | #define RETURN_IN_MEMORY(TYPE) \ |
1356 | (TYPE_MODE (TYPE) == BLKmode \ | |
1357 | && (DEFAULT_ABI != ABI_SOLARIS || int_size_in_bytes (TYPE) > 8)) | |
f045b2c9 | 1358 | |
a260abc9 | 1359 | /* Mode of stack savearea. |
dfdfa60f DE |
1360 | FUNCTION is VOIDmode because calling convention maintains SP. |
1361 | BLOCK needs Pmode for SP. | |
a260abc9 DE |
1362 | NONLOCAL needs twice Pmode to maintain both backchain and SP. */ |
1363 | #define STACK_SAVEAREA_MODE(LEVEL) \ | |
dfdfa60f DE |
1364 | (LEVEL == SAVE_FUNCTION ? VOIDmode \ |
1365 | : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode) | |
a260abc9 | 1366 | |
4697a36c MM |
1367 | /* Minimum and maximum general purpose registers used to hold arguments. */ |
1368 | #define GP_ARG_MIN_REG 3 | |
1369 | #define GP_ARG_MAX_REG 10 | |
1370 | #define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1) | |
1371 | ||
1372 | /* Minimum and maximum floating point registers used to hold arguments. */ | |
1373 | #define FP_ARG_MIN_REG 33 | |
7509c759 MM |
1374 | #define FP_ARG_AIX_MAX_REG 45 |
1375 | #define FP_ARG_V4_MAX_REG 40 | |
1376 | #define FP_ARG_MAX_REG FP_ARG_AIX_MAX_REG | |
4697a36c MM |
1377 | #define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1) |
1378 | ||
1379 | /* Return registers */ | |
1380 | #define GP_ARG_RETURN GP_ARG_MIN_REG | |
1381 | #define FP_ARG_RETURN FP_ARG_MIN_REG | |
1382 | ||
7509c759 | 1383 | /* Flags for the call/call_value rtl operations set up by function_arg */ |
6a4cee5f MM |
1384 | #define CALL_NORMAL 0x00000000 /* no special processing */ |
1385 | #define CALL_NT_DLLIMPORT 0x00000001 /* NT, this is a DLL import call */ | |
1386 | #define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */ | |
1387 | #define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */ | |
1388 | #define CALL_LONG 0x00000008 /* always call indirect */ | |
7509c759 | 1389 | |
4697a36c MM |
1390 | /* Define cutoff for using external functions to save floating point */ |
1391 | #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63) | |
1392 | ||
f045b2c9 RS |
1393 | /* 1 if N is a possible register number for a function value |
1394 | as seen by the caller. | |
1395 | ||
1396 | On RS/6000, this is r3 and fp1. */ | |
4697a36c | 1397 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_ARG_RETURN || ((N) == FP_ARG_RETURN)) |
f045b2c9 RS |
1398 | |
1399 | /* 1 if N is a possible register number for function argument passing. | |
1400 | On RS/6000, these are r3-r10 and fp1-fp13. */ | |
4697a36c MM |
1401 | #define FUNCTION_ARG_REGNO_P(N) \ |
1402 | (((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \ | |
1403 | || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG))) | |
f045b2c9 | 1404 | |
f045b2c9 RS |
1405 | \f |
1406 | /* Define a data type for recording info about an argument list | |
1407 | during the scan of that argument list. This data type should | |
1408 | hold all necessary information about the function itself | |
1409 | and about the args processed so far, enough to enable macros | |
1410 | such as FUNCTION_ARG to determine where the next arg should go. | |
1411 | ||
1412 | On the RS/6000, this is a structure. The first element is the number of | |
1413 | total argument words, the second is used to store the next | |
1414 | floating-point register number, and the third says how many more args we | |
4697a36c MM |
1415 | have prototype types for. |
1416 | ||
1417 | The System V.4 varargs/stdarg support requires that this structure's size | |
1418 | be a multiple of sizeof(int), and that WORDS, FREGNO, NARGS_PROTOTYPE, | |
1419 | ORIG_NARGS, and VARARGS_OFFSET be the first five ints. */ | |
1420 | ||
1421 | typedef struct rs6000_args | |
1422 | { | |
6a4cee5f MM |
1423 | int words; /* # words uses for passing GP registers */ |
1424 | int fregno; /* next available FP register */ | |
1425 | int nargs_prototype; /* # args left in the current prototype */ | |
1426 | int orig_nargs; /* Original value of nargs_prototype */ | |
1427 | int varargs_offset; /* offset of the varargs save area */ | |
1428 | int prototype; /* Whether a prototype was defined */ | |
1429 | int call_cookie; /* Do special things for this call */ | |
4697a36c | 1430 | } CUMULATIVE_ARGS; |
f045b2c9 RS |
1431 | |
1432 | /* Define intermediate macro to compute the size (in registers) of an argument | |
1433 | for the RS/6000. */ | |
1434 | ||
1435 | #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \ | |
1436 | (! (NAMED) ? 0 \ | |
1437 | : (MODE) != BLKmode \ | |
1438 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
1439 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
1440 | ||
1441 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1442 | for a call to a function whose data type is FNTYPE. | |
1443 | For a library call, FNTYPE is 0. */ | |
1444 | ||
2c7ee1a6 | 1445 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ |
4697a36c | 1446 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE) |
f045b2c9 RS |
1447 | |
1448 | /* Similar, but when scanning the definition of a procedure. We always | |
1449 | set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */ | |
1450 | ||
4697a36c MM |
1451 | #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \ |
1452 | init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE) | |
f045b2c9 RS |
1453 | |
1454 | /* Update the data in CUM to advance over an argument | |
1455 | of mode MODE and data type TYPE. | |
1456 | (TYPE is null for libcalls where that information may not be available.) */ | |
1457 | ||
1458 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
4697a36c | 1459 | function_arg_advance (&CUM, MODE, TYPE, NAMED) |
f045b2c9 RS |
1460 | |
1461 | /* Non-zero if we can use a floating-point register to pass this arg. */ | |
4697a36c MM |
1462 | #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \ |
1463 | (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
1464 | && (CUM).fregno <= FP_ARG_MAX_REG \ | |
1465 | && TARGET_HARD_FLOAT) | |
f045b2c9 RS |
1466 | |
1467 | /* Determine where to put an argument to a function. | |
1468 | Value is zero to push the argument on the stack, | |
1469 | or a hard register in which to store the argument. | |
1470 | ||
1471 | MODE is the argument's machine mode. | |
1472 | TYPE is the data type of the argument (as a tree). | |
1473 | This is null for libcalls where that information may | |
1474 | not be available. | |
1475 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1476 | the preceding args and about the function being called. | |
1477 | NAMED is nonzero if this argument is a named parameter | |
1478 | (otherwise it is an extra parameter matching an ellipsis). | |
1479 | ||
1480 | On RS/6000 the first eight words of non-FP are normally in registers | |
1481 | and the rest are pushed. The first 13 FP args are in registers. | |
1482 | ||
1483 | If this is floating-point and no prototype is specified, we use | |
4d6697ca RK |
1484 | both an FP and integer register (or possibly FP reg and stack). Library |
1485 | functions (when TYPE is zero) always have the proper types for args, | |
1486 | so we can pass the FP value just in one register. emit_library_function | |
1487 | doesn't support EXPR_LIST anyway. */ | |
f045b2c9 | 1488 | |
4697a36c MM |
1489 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ |
1490 | function_arg (&CUM, MODE, TYPE, NAMED) | |
f045b2c9 RS |
1491 | |
1492 | /* For an arg passed partly in registers and partly in memory, | |
1493 | this is the number of registers used. | |
1494 | For args passed entirely in registers or entirely in memory, zero. */ | |
1495 | ||
4697a36c MM |
1496 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ |
1497 | function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) | |
1498 | ||
1499 | /* A C expression that indicates when an argument must be passed by | |
1500 | reference. If nonzero for an argument, a copy of that argument is | |
1501 | made in memory and a pointer to the argument is passed instead of | |
1502 | the argument itself. The pointer is passed in whatever way is | |
1503 | appropriate for passing a pointer to that type. */ | |
1504 | ||
1505 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
1506 | function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED) | |
f045b2c9 | 1507 | |
c229cba9 DE |
1508 | /* If defined, a C expression which determines whether, and in which |
1509 | direction, to pad out an argument with extra space. The value | |
1510 | should be of type `enum direction': either `upward' to pad above | |
1511 | the argument, `downward' to pad below, or `none' to inhibit | |
1512 | padding. */ | |
1513 | ||
1514 | #define FUNCTION_ARG_PADDING(MODE, TYPE) \ | |
c4d38ccb | 1515 | (enum direction) function_arg_padding (MODE, TYPE) |
c229cba9 | 1516 | |
b6c9286a | 1517 | /* If defined, a C expression that gives the alignment boundary, in bits, |
c81bebd7 | 1518 | of an argument with the specified mode and type. If it is not defined, |
b6c9286a MM |
1519 | PARM_BOUNDARY is used for all arguments. */ |
1520 | ||
1521 | #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ | |
1522 | function_arg_boundary (MODE, TYPE) | |
1523 | ||
f045b2c9 | 1524 | /* Perform any needed actions needed for a function that is receiving a |
c81bebd7 | 1525 | variable number of arguments. |
f045b2c9 RS |
1526 | |
1527 | CUM is as above. | |
1528 | ||
1529 | MODE and TYPE are the mode and type of the current parameter. | |
1530 | ||
1531 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1532 | that must be pushed by the prolog to pretend that our caller pushed | |
1533 | it. | |
1534 | ||
1535 | Normally, this macro will push all remaining incoming registers on the | |
1536 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
1537 | ||
4697a36c MM |
1538 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ |
1539 | setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL) | |
1540 | ||
1541 | /* If defined, is a C expression that produces the machine-specific | |
1542 | code for a call to `__builtin_saveregs'. This code will be moved | |
1543 | to the very beginning of the function, before any parameter access | |
1544 | are made. The return value of this function should be an RTX that | |
1545 | contains the value to use as the return of `__builtin_saveregs'. | |
1546 | ||
1547 | The argument ARGS is a `tree_list' containing the arguments that | |
1548 | were passed to `__builtin_saveregs'. | |
1549 | ||
1550 | If this macro is not defined, the compiler will output an ordinary | |
1551 | call to the library function `__builtin_saveregs'. */ | |
1552 | ||
1553 | #define EXPAND_BUILTIN_SAVEREGS(ARGS) \ | |
1554 | expand_builtin_saveregs (ARGS) | |
f045b2c9 RS |
1555 | |
1556 | /* This macro generates the assembly code for function entry. | |
1557 | FILE is a stdio stream to output the code to. | |
1558 | SIZE is an int: how many units of temporary storage to allocate. | |
1559 | Refer to the array `regs_ever_live' to determine which registers | |
1560 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1561 | is ever used in the function. This macro is responsible for | |
1562 | knowing which registers should not be saved even if used. */ | |
1563 | ||
1564 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
1565 | ||
1566 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
58a39e45 | 1567 | for profiling a function entry. */ |
f045b2c9 RS |
1568 | |
1569 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
58a39e45 | 1570 | output_function_profiler ((FILE), (LABELNO)); |
f045b2c9 RS |
1571 | |
1572 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1573 | the stack pointer does not matter. No definition is equivalent to | |
1574 | always zero. | |
1575 | ||
1576 | On the RS/6000, this is non-zero because we can restore the stack from | |
1577 | its backpointer, which we maintain. */ | |
1578 | #define EXIT_IGNORE_STACK 1 | |
1579 | ||
1580 | /* This macro generates the assembly code for function exit, | |
1581 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1582 | then individual return instructions are generated for each | |
1583 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1584 | ||
1585 | The function epilogue should not depend on the current stack pointer! | |
1586 | It should use the frame pointer only. This is mandatory because | |
1587 | of alloca; we also take advantage of it to omit stack adjustments | |
1588 | before returning. */ | |
1589 | ||
1590 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
17167fd8 MM |
1591 | |
1592 | /* A C compound statement that outputs the assembler code for a thunk function, | |
1593 | used to implement C++ virtual function calls with multiple inheritance. The | |
1594 | thunk acts as a wrapper around a virtual function, adjusting the implicit | |
1595 | object parameter before handing control off to the real function. | |
1596 | ||
1597 | First, emit code to add the integer DELTA to the location that contains the | |
1598 | incoming first argument. Assume that this argument contains a pointer, and | |
1599 | is the one used to pass the `this' pointer in C++. This is the incoming | |
1600 | argument *before* the function prologue, e.g. `%o0' on a sparc. The | |
1601 | addition must preserve the values of all other incoming arguments. | |
1602 | ||
1603 | After the addition, emit code to jump to FUNCTION, which is a | |
1604 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch | |
1605 | the return address. Hence returning from FUNCTION will return to whoever | |
1606 | called the current `thunk'. | |
1607 | ||
1608 | The effect must be as if FUNCTION had been called directly with the adjusted | |
1609 | first argument. This macro is responsible for emitting all of the code for | |
1610 | a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not | |
1611 | invoked. | |
1612 | ||
1613 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been | |
1614 | extracted from it.) It might possibly be useful on some targets, but | |
1615 | probably not. | |
1616 | ||
1617 | If you do not define this macro, the target-independent code in the C++ | |
1618 | frontend will generate a less efficient heavyweight thunk that calls | |
1619 | FUNCTION instead of jumping to it. The generic approach does not support | |
1620 | varargs. */ | |
42820a49 | 1621 | #if TARGET_ELF |
17167fd8 MM |
1622 | #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \ |
1623 | output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION) | |
42820a49 | 1624 | #endif |
f045b2c9 | 1625 | \f |
eaf1bcf1 | 1626 | /* TRAMPOLINE_TEMPLATE deleted */ |
f045b2c9 RS |
1627 | |
1628 | /* Length in units of the trampoline for entering a nested function. */ | |
1629 | ||
b6c9286a | 1630 | #define TRAMPOLINE_SIZE rs6000_trampoline_size () |
f045b2c9 RS |
1631 | |
1632 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1633 | FNADDR is an RTX for the address of the function's pure code. | |
1634 | CXT is an RTX for the static chain value for the function. */ | |
1635 | ||
1636 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
b6c9286a | 1637 | rs6000_initialize_trampoline (ADDR, FNADDR, CXT) |
f045b2c9 | 1638 | \f |
7509c759 MM |
1639 | /* If defined, a C expression whose value is nonzero if IDENTIFIER |
1640 | with arguments ARGS is a valid machine specific attribute for DECL. | |
1641 | The attributes in ATTRIBUTES have previously been assigned to DECL. */ | |
1642 | ||
1643 | #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \ | |
1644 | (rs6000_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS)) | |
1645 | ||
1646 | /* If defined, a C expression whose value is nonzero if IDENTIFIER | |
1647 | with arguments ARGS is a valid machine specific attribute for TYPE. | |
1648 | The attributes in ATTRIBUTES have previously been assigned to TYPE. */ | |
1649 | ||
1650 | #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \ | |
1651 | (rs6000_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS)) | |
1652 | ||
1653 | /* If defined, a C expression whose value is zero if the attributes on | |
1654 | TYPE1 and TYPE2 are incompatible, one if they are compatible, and | |
1655 | two if they are nearly compatible (which causes a warning to be | |
1656 | generated). */ | |
1657 | ||
1658 | #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \ | |
1659 | (rs6000_comp_type_attributes (TYPE1, TYPE2)) | |
1660 | ||
1661 | /* If defined, a C statement that assigns default attributes to newly | |
1662 | defined TYPE. */ | |
1663 | ||
1664 | #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \ | |
1665 | (rs6000_set_default_type_attributes (TYPE)) | |
1666 | ||
1667 | \f | |
f33985c6 MS |
1668 | /* Definitions for __builtin_return_address and __builtin_frame_address. |
1669 | __builtin_return_address (0) should give link register (65), enable | |
1670 | this. */ | |
1671 | /* This should be uncommented, so that the link register is used, but | |
1672 | currently this would result in unmatched insns and spilling fixed | |
1673 | registers so we'll leave it for another day. When these problems are | |
1674 | taken care of one additional fetch will be necessary in RETURN_ADDR_RTX. | |
1675 | (mrs) */ | |
1676 | /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
f09d4c33 | 1677 | |
b6c9286a MM |
1678 | /* Number of bytes into the frame return addresses can be found. See |
1679 | rs6000_stack_info in rs6000.c for more information on how the different | |
1680 | abi's store the return address. */ | |
1681 | #define RETURN_ADDRESS_OFFSET \ | |
1682 | ((DEFAULT_ABI == ABI_AIX \ | |
1683 | || DEFAULT_ABI == ABI_AIX_NODESC) ? 8 : \ | |
c81bebd7 MM |
1684 | (DEFAULT_ABI == ABI_V4 \ |
1685 | || DEFAULT_ABI == ABI_SOLARIS) ? (TARGET_32BIT ? 4 : 8) : \ | |
b6c9286a MM |
1686 | (DEFAULT_ABI == ABI_NT) ? -4 : \ |
1687 | (fatal ("RETURN_ADDRESS_OFFSET not supported"), 0)) | |
f09d4c33 | 1688 | |
f33985c6 MS |
1689 | /* The current return address is in link register (65). The return address |
1690 | of anything farther back is accessed normally at an offset of 8 from the | |
1691 | frame pointer. */ | |
1692 | #define RETURN_ADDR_RTX(count, frame) \ | |
1693 | ((count == -1) \ | |
39403d82 DE |
1694 | ? gen_rtx_REG (Pmode, 65) \ |
1695 | : gen_rtx_MEM (Pmode, \ | |
f09d4c33 | 1696 | memory_address (Pmode, \ |
39403d82 | 1697 | plus_constant (copy_to_reg (gen_rtx_MEM (Pmode, \ |
f09d4c33 RK |
1698 | memory_address (Pmode, frame))), \ |
1699 | RETURN_ADDRESS_OFFSET)))) | |
f33985c6 | 1700 | \f |
f045b2c9 RS |
1701 | /* Definitions for register eliminations. |
1702 | ||
1703 | We have two registers that can be eliminated on the RS/6000. First, the | |
1704 | frame pointer register can often be eliminated in favor of the stack | |
1705 | pointer register. Secondly, the argument pointer register can always be | |
642a35f1 JW |
1706 | eliminated; it is replaced with either the stack or frame pointer. |
1707 | ||
1708 | In addition, we use the elimination mechanism to see if r30 is needed | |
1709 | Initially we assume that it isn't. If it is, we spill it. This is done | |
1710 | by making it an eliminable register. We replace it with itself so that | |
1711 | if it isn't needed, then existing uses won't be modified. */ | |
f045b2c9 RS |
1712 | |
1713 | /* This is an array of structures. Each structure initializes one pair | |
1714 | of eliminable registers. The "from" register number is given first, | |
1715 | followed by "to". Eliminations of the same "from" register are listed | |
1716 | in order of preference. */ | |
1717 | #define ELIMINABLE_REGS \ | |
1718 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
1719 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
642a35f1 JW |
1720 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ |
1721 | { 30, 30} } | |
f045b2c9 RS |
1722 | |
1723 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
1724 | Frame pointer elimination is automatically handled. | |
1725 | ||
1726 | For the RS/6000, if frame pointer elimination is being done, we would like | |
642a35f1 JW |
1727 | to convert ap into fp, not sp. |
1728 | ||
abc95ed3 | 1729 | We need r30 if -mminimal-toc was specified, and there are constant pool |
642a35f1 | 1730 | references. */ |
f045b2c9 RS |
1731 | |
1732 | #define CAN_ELIMINATE(FROM, TO) \ | |
1733 | ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ | |
1734 | ? ! frame_pointer_needed \ | |
4697a36c | 1735 | : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \ |
f045b2c9 RS |
1736 | : 1) |
1737 | ||
1738 | /* Define the offset between two registers, one to be eliminated, and the other | |
1739 | its replacement, at the start of a routine. */ | |
1740 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
1741 | { \ | |
4697a36c | 1742 | rs6000_stack_t *info = rs6000_stack_info (); \ |
f045b2c9 RS |
1743 | \ |
1744 | if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
4697a36c MM |
1745 | (OFFSET) = (info->push_p) ? 0 : - info->total_size; \ |
1746 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
1747 | (OFFSET) = info->total_size; \ | |
1748 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
1749 | (OFFSET) = (info->push_p) ? info->total_size : 0; \ | |
642a35f1 JW |
1750 | else if ((FROM) == 30) \ |
1751 | (OFFSET) = 0; \ | |
f045b2c9 RS |
1752 | else \ |
1753 | abort (); \ | |
1754 | } | |
1755 | \f | |
1756 | /* Addressing modes, and classification of registers for them. */ | |
1757 | ||
1758 | /* #define HAVE_POST_INCREMENT */ | |
1759 | /* #define HAVE_POST_DECREMENT */ | |
1760 | ||
1761 | #define HAVE_PRE_DECREMENT | |
1762 | #define HAVE_PRE_INCREMENT | |
1763 | ||
1764 | /* Macros to check register numbers against specific register classes. */ | |
1765 | ||
1766 | /* These assume that REGNO is a hard or pseudo reg number. | |
1767 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1768 | or a pseudo reg currently allocated to a suitable hard reg. | |
1769 | Since they use reg_renumber, they are safe only once reg_renumber | |
1770 | has been allocated, which happens in local-alloc.c. */ | |
1771 | ||
1772 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
1773 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1774 | ? (REGNO) <= 31 || (REGNO) == 67 \ | |
1775 | : (reg_renumber[REGNO] >= 0 \ | |
1776 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1777 | ||
1778 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
1779 | ((REGNO) < FIRST_PSEUDO_REGISTER \ | |
1780 | ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \ | |
1781 | : (reg_renumber[REGNO] > 0 \ | |
1782 | && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67))) | |
1783 | \f | |
1784 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1785 | ||
1786 | #define MAX_REGS_PER_ADDRESS 2 | |
1787 | ||
1788 | /* Recognize any constant value that is a valid address. */ | |
1789 | ||
6eff269e BK |
1790 | #define CONSTANT_ADDRESS_P(X) \ |
1791 | (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ | |
1792 | || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \ | |
1793 | || GET_CODE (X) == HIGH) | |
f045b2c9 RS |
1794 | |
1795 | /* Nonzero if the constant value X is a legitimate general operand. | |
1796 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. | |
1797 | ||
1798 | On the RS/6000, all integer constants are acceptable, most won't be valid | |
1799 | for particular insns, though. Only easy FP constants are | |
1800 | acceptable. */ | |
1801 | ||
1802 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1803 | (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \ | |
a260abc9 | 1804 | || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \ |
f045b2c9 RS |
1805 | || easy_fp_constant (X, GET_MODE (X))) |
1806 | ||
1807 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1808 | and check its validity for a certain class. | |
1809 | We have two alternate definitions for each of them. | |
1810 | The usual definition accepts all pseudo regs; the other rejects | |
1811 | them unless they have been allocated suitable hard regs. | |
1812 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1813 | ||
1814 | Most source files want to accept pseudo regs in the hope that | |
1815 | they will get allocated to the class that the insn wants them to be in. | |
1816 | Source files for reload pass need to be strict. | |
1817 | After reload, it makes no difference, since pseudo regs have | |
1818 | been eliminated by then. */ | |
1819 | ||
1820 | #ifndef REG_OK_STRICT | |
1821 | ||
1822 | /* Nonzero if X is a hard reg that can be used as an index | |
1823 | or if it is a pseudo reg. */ | |
1824 | #define REG_OK_FOR_INDEX_P(X) \ | |
1825 | (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
1826 | ||
1827 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1828 | or if it is a pseudo reg. */ | |
1829 | #define REG_OK_FOR_BASE_P(X) \ | |
1830 | (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X)) | |
1831 | ||
1832 | #else | |
1833 | ||
1834 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1835 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1836 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1837 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1838 | ||
1839 | #endif | |
1840 | \f | |
1841 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1842 | that is a valid memory address for an instruction. | |
1843 | The MODE argument is the machine mode for the MEM expression | |
1844 | that wants to use this address. | |
1845 | ||
1846 | On the RS/6000, there are four valid address: a SYMBOL_REF that | |
1847 | refers to a constant pool entry of an address (or the sum of it | |
1848 | plus a constant), a short (16-bit signed) constant plus a register, | |
1849 | the sum of two registers, or a register indirect, possibly with an | |
1850 | auto-increment. For DFmode and DImode with an constant plus register, | |
2f3e5814 | 1851 | we must ensure that both words are addressable or PowerPC64 with offset |
1427100a DE |
1852 | word aligned. |
1853 | ||
1854 | For modes spanning multiple registers (DFmode in 32-bit GPRs, | |
1855 | 32-bit DImode, TImode), indexed addressing cannot be used because | |
1856 | adjacent memory cells are accessed by adding word-sized offsets | |
1857 | during assembly output. */ | |
f045b2c9 RS |
1858 | |
1859 | #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \ | |
4697a36c MM |
1860 | (TARGET_TOC && GET_CODE (X) == SYMBOL_REF \ |
1861 | && CONSTANT_POOL_ADDRESS_P (X) \ | |
f045b2c9 RS |
1862 | && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X))) |
1863 | ||
a260abc9 | 1864 | /* AIX64 guaranteed to have 64 bit TOC alignment. */ |
f045b2c9 RS |
1865 | #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \ |
1866 | (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \ | |
4697a36c MM |
1867 | || (TARGET_TOC \ |
1868 | && GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
f045b2c9 RS |
1869 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ |
1870 | && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0)))) | |
1871 | ||
7509c759 | 1872 | #define LEGITIMATE_SMALL_DATA_P(MODE, X) \ |
c81bebd7 | 1873 | ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ |
81795281 | 1874 | && !flag_pic && !TARGET_TOC \ |
88228c4b MM |
1875 | && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \ |
1876 | && small_data_operand (X, MODE)) | |
7509c759 | 1877 | |
f045b2c9 RS |
1878 | #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \ |
1879 | (GET_CODE (X) == CONST_INT \ | |
5b6f7b96 | 1880 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000) |
f045b2c9 RS |
1881 | |
1882 | #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \ | |
1883 | (GET_CODE (X) == PLUS \ | |
1884 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1885 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1886 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \ | |
1887 | && (((MODE) != DFmode && (MODE) != DImode) \ | |
2f3e5814 | 1888 | || (TARGET_32BIT \ |
1465faec DE |
1889 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \ |
1890 | : ! (INTVAL (XEXP (X, 1)) & 3))) \ | |
2f3e5814 | 1891 | && ((MODE) != TImode \ |
644d82dd | 1892 | || (TARGET_32BIT \ |
1465faec DE |
1893 | ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \ |
1894 | : (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \ | |
1895 | && ! (INTVAL (XEXP (X, 1)) & 3))))) | |
f045b2c9 RS |
1896 | |
1897 | #define LEGITIMATE_INDEXED_ADDRESS_P(X) \ | |
1898 | (GET_CODE (X) == PLUS \ | |
1899 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1900 | && GET_CODE (XEXP (X, 1)) == REG \ | |
1901 | && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1902 | && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \ | |
1903 | || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \ | |
1904 | && REG_OK_FOR_INDEX_P (XEXP (X, 0))))) | |
1905 | ||
1906 | #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \ | |
1907 | (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) | |
1908 | ||
4697a36c MM |
1909 | #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \ |
1910 | (TARGET_ELF \ | |
81795281 | 1911 | && !flag_pic && !TARGET_TOC \ |
4697a36c MM |
1912 | && (MODE) != DImode \ |
1913 | && (MODE) != TImode \ | |
1914 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
1915 | && GET_CODE (X) == LO_SUM \ | |
1916 | && GET_CODE (XEXP (X, 0)) == REG \ | |
1917 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1918 | && CONSTANT_P (XEXP (X, 1))) | |
1919 | ||
f045b2c9 RS |
1920 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1921 | { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \ | |
1922 | goto ADDR; \ | |
0a90c336 | 1923 | if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \ |
38c1f2d7 | 1924 | && TARGET_UPDATE \ |
f045b2c9 RS |
1925 | && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \ |
1926 | goto ADDR; \ | |
7509c759 MM |
1927 | if (LEGITIMATE_SMALL_DATA_P (MODE, X)) \ |
1928 | goto ADDR; \ | |
f045b2c9 RS |
1929 | if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \ |
1930 | goto ADDR; \ | |
1931 | if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \ | |
1932 | goto ADDR; \ | |
2f3e5814 | 1933 | if ((MODE) != TImode \ |
1427100a DE |
1934 | && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \ |
1935 | && (TARGET_POWERPC64 || (MODE) != DImode) \ | |
f045b2c9 RS |
1936 | && LEGITIMATE_INDEXED_ADDRESS_P (X)) \ |
1937 | goto ADDR; \ | |
4697a36c MM |
1938 | if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X)) \ |
1939 | goto ADDR; \ | |
f045b2c9 RS |
1940 | } |
1941 | \f | |
1942 | /* Try machine-dependent ways of modifying an illegitimate address | |
1943 | to be legitimate. If we find one, return the new, valid address. | |
1944 | This macro is used in only one place: `memory_address' in explow.c. | |
1945 | ||
1946 | OLDX is the address as it was before break_out_memory_refs was called. | |
1947 | In some cases it is useful to look at this to decide what needs to be done. | |
1948 | ||
1949 | MODE and WIN are passed so that this macro can use | |
1950 | GO_IF_LEGITIMATE_ADDRESS. | |
1951 | ||
1952 | It is always safe for this macro to do nothing. It exists to recognize | |
1953 | opportunities to optimize the output. | |
1954 | ||
1955 | On RS/6000, first check for the sum of a register with a constant | |
1956 | integer that is out of range. If so, generate code to add the | |
1957 | constant with the low-order 16 bits masked to the register and force | |
1958 | this result into another register (this can be done with `cau'). | |
c81bebd7 | 1959 | Then generate an address of REG+(CONST&0xffff), allowing for the |
f045b2c9 RS |
1960 | possibility of bit 16 being a one. |
1961 | ||
1962 | Then check for the sum of a register and something not constant, try to | |
1963 | load the other things into a register and return the sum. */ | |
1964 | ||
4697a36c MM |
1965 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ |
1966 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1967 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
5b6f7b96 | 1968 | && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \ |
354b734b MM |
1969 | { HOST_WIDE_INT high_int, low_int; \ |
1970 | rtx sum; \ | |
1971 | high_int = INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff); \ | |
4697a36c MM |
1972 | low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ |
1973 | if (low_int & 0x8000) \ | |
354b734b | 1974 | high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ |
39403d82 | 1975 | sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \ |
354b734b | 1976 | GEN_INT (high_int)), 0); \ |
39403d82 | 1977 | (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \ |
4697a36c MM |
1978 | goto WIN; \ |
1979 | } \ | |
1980 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1981 | && GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
1427100a DE |
1982 | && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \ |
1983 | && (TARGET_POWERPC64 || (MODE) != DImode) \ | |
2f3e5814 | 1984 | && (MODE) != TImode) \ |
4697a36c | 1985 | { \ |
39403d82 | 1986 | (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ |
0a90c336 | 1987 | force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ |
4697a36c MM |
1988 | goto WIN; \ |
1989 | } \ | |
2f3e5814 | 1990 | else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \ |
461422d5 | 1991 | && !flag_pic \ |
4697a36c MM |
1992 | && GET_CODE (X) != CONST_INT \ |
1993 | && GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X) \ | |
1994 | && (TARGET_HARD_FLOAT || (MODE) != DFmode) \ | |
1995 | && (MODE) != DImode && (MODE) != TImode) \ | |
1996 | { \ | |
1997 | rtx reg = gen_reg_rtx (Pmode); \ | |
1998 | emit_insn (gen_elf_high (reg, (X))); \ | |
39403d82 | 1999 | (X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \ |
fbd2bdda | 2000 | goto WIN; \ |
4697a36c | 2001 | } \ |
f045b2c9 RS |
2002 | } |
2003 | ||
a260abc9 DE |
2004 | /* Try a machine-dependent way of reloading an illegitimate address |
2005 | operand. If we find one, push the reload and jump to WIN. This | |
2006 | macro is used in only one place: `find_reloads_address' in reload.c. | |
2007 | ||
2008 | For RS/6000, we wish to handle large displacements off a base | |
2009 | register by splitting the addend across an addiu/addis and the mem insn. | |
2010 | This cuts number of extra insns needed from 3 to 1. */ | |
2011 | ||
2012 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \ | |
2013 | do { \ | |
2014 | if (GET_CODE (X) == PLUS \ | |
2015 | && GET_CODE (XEXP (X, 0)) == REG \ | |
2016 | && REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \ | |
2017 | && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \ | |
2018 | && GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
2019 | { \ | |
2020 | HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ | |
2021 | HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; \ | |
2022 | HOST_WIDE_INT high \ | |
2023 | = (((val - low) & 0xffffffff) ^ 0x80000000) - 0x80000000; \ | |
2024 | \ | |
2025 | /* Check for 32-bit overflow. */ \ | |
2026 | if (high + low != val) \ | |
2027 | break; \ | |
2028 | \ | |
2029 | /* Reload the high part into a base reg; leave the low part \ | |
2030 | in the mem directly. */ \ | |
2031 | \ | |
2032 | X = gen_rtx_PLUS (GET_MODE (X), \ | |
2033 | gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \ | |
2034 | GEN_INT (high)), \ | |
2035 | GEN_INT (low)); \ | |
2036 | \ | |
2037 | push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \ | |
2038 | BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \ | |
2039 | OPNUM, TYPE); \ | |
2040 | goto WIN; \ | |
2041 | } \ | |
2042 | } while (0) | |
2043 | ||
f045b2c9 RS |
2044 | /* Go to LABEL if ADDR (a legitimate address expression) |
2045 | has an effect that depends on the machine mode it is used for. | |
2046 | ||
2047 | On the RS/6000 this is true if the address is valid with a zero offset | |
2048 | but not with an offset of four (this means it cannot be used as an | |
2049 | address for DImode or DFmode) or is a pre-increment or decrement. Since | |
2050 | we know it is valid, we just check for an address that is not valid with | |
2051 | an offset of four. */ | |
2052 | ||
2053 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
2054 | { if (GET_CODE (ADDR) == PLUS \ | |
2055 | && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \ | |
2f3e5814 DE |
2056 | && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \ |
2057 | (TARGET_32BIT ? 4 : 8))) \ | |
f045b2c9 | 2058 | goto LABEL; \ |
38c1f2d7 | 2059 | if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_INC) \ |
f045b2c9 | 2060 | goto LABEL; \ |
38c1f2d7 | 2061 | if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_DEC) \ |
f045b2c9 | 2062 | goto LABEL; \ |
4697a36c MM |
2063 | if (GET_CODE (ADDR) == LO_SUM) \ |
2064 | goto LABEL; \ | |
f045b2c9 | 2065 | } |
766a866c MM |
2066 | \f |
2067 | /* The register number of the register used to address a table of | |
2068 | static data addresses in memory. In some cases this register is | |
2069 | defined by a processor's "application binary interface" (ABI). | |
2070 | When this macro is defined, RTL is generated for this register | |
2071 | once, as with the stack pointer and frame pointer registers. If | |
2072 | this macro is not defined, it is up to the machine-dependent files | |
2073 | to allocate such a register (if necessary). */ | |
2074 | ||
2075 | /* #define PIC_OFFSET_TABLE_REGNUM */ | |
2076 | ||
2077 | /* Define this macro if the register defined by | |
2078 | `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. Do not define | |
2079 | this macro if `PPIC_OFFSET_TABLE_REGNUM' is not defined. */ | |
2080 | ||
2081 | /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
2082 | ||
2083 | /* By generating position-independent code, when two different | |
2084 | programs (A and B) share a common library (libC.a), the text of | |
2085 | the library can be shared whether or not the library is linked at | |
2086 | the same address for both programs. In some of these | |
2087 | environments, position-independent code requires not only the use | |
2088 | of different addressing modes, but also special code to enable the | |
2089 | use of these addressing modes. | |
2090 | ||
2091 | The `FINALIZE_PIC' macro serves as a hook to emit these special | |
2092 | codes once the function is being compiled into assembly code, but | |
2093 | not before. (It is not done before, because in the case of | |
2094 | compiling an inline function, it would lead to multiple PIC | |
2095 | prologues being included in functions which used inline functions | |
2096 | and were compiled to assembly language.) */ | |
2097 | ||
d266da75 | 2098 | #define FINALIZE_PIC rs6000_finalize_pic () |
766a866c | 2099 | |
766a866c MM |
2100 | /* A C expression that is nonzero if X is a legitimate immediate |
2101 | operand on the target machine when generating position independent | |
2102 | code. You can assume that X satisfies `CONSTANT_P', so you need | |
2103 | not check this. You can also assume FLAG_PIC is true, so you need | |
2104 | not check it either. You need not define this macro if all | |
2105 | constants (including `SYMBOL_REF') can be immediate operands when | |
2106 | generating position independent code. */ | |
2107 | ||
2108 | /* #define LEGITIMATE_PIC_OPERAND_P (X) */ | |
2109 | ||
30ea98f1 MM |
2110 | /* In rare cases, correct code generation requires extra machine |
2111 | dependent processing between the second jump optimization pass and | |
2112 | delayed branch scheduling. On those machines, define this macro | |
2113 | as a C statement to act on the code starting at INSN. | |
2114 | ||
2115 | On the RS/6000, we use it to make sure the GOT_TOC register marker | |
2116 | that FINALIZE_PIC is supposed to remove actually got removed. */ | |
2117 | ||
2118 | #define MACHINE_DEPENDENT_REORG(INSN) rs6000_reorg (INSN) | |
2119 | ||
f045b2c9 RS |
2120 | \f |
2121 | /* Define this if some processing needs to be done immediately before | |
4255474b | 2122 | emitting code for an insn. */ |
f045b2c9 | 2123 | |
4255474b | 2124 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ |
f045b2c9 RS |
2125 | |
2126 | /* Specify the machine mode that this machine uses | |
2127 | for the index in the tablejump instruction. */ | |
2f3e5814 | 2128 | #define CASE_VECTOR_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 | 2129 | |
18543a22 ILT |
2130 | /* Define as C expression which evaluates to nonzero if the tablejump |
2131 | instruction expects the table to contain offsets from the address of the | |
2132 | table. | |
2133 | Do not define this if the table should contain absolute addresses. */ | |
2134 | #define CASE_VECTOR_PC_RELATIVE 1 | |
f045b2c9 RS |
2135 | |
2136 | /* Specify the tree operation to be used to convert reals to integers. */ | |
2137 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
2138 | ||
2139 | /* This is the kind of divide that is easiest to do in the general case. */ | |
2140 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
2141 | ||
2142 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
2143 | #define DEFAULT_SIGNED_CHAR 0 | |
2144 | ||
2145 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
2146 | also convert validly to an unsigned one. */ | |
2147 | ||
2148 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
2149 | ||
2150 | /* Max number of bytes we can move from memory to memory | |
2151 | in one reasonably fast instruction. */ | |
2f3e5814 | 2152 | #define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8) |
7e69e155 | 2153 | #define MAX_MOVE_MAX 8 |
f045b2c9 RS |
2154 | |
2155 | /* Nonzero if access to memory by bytes is no faster than for words. | |
2156 | Also non-zero if doing byte operations (specifically shifts) in registers | |
2157 | is undesirable. */ | |
2158 | #define SLOW_BYTE_ACCESS 1 | |
2159 | ||
9a63901f RK |
2160 | /* Define if operations between registers always perform the operation |
2161 | on the full register even if a narrower mode is specified. */ | |
2162 | #define WORD_REGISTER_OPERATIONS | |
2163 | ||
2164 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
2165 | will either zero-extend or sign-extend. The value of this macro should | |
2166 | be the code that says which one of the two operations is implicitly | |
2167 | done, NIL if none. */ | |
2168 | #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
225211e2 RK |
2169 | |
2170 | /* Define if loading short immediate values into registers sign extends. */ | |
2171 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
fdaff8ba RS |
2172 | \f |
2173 | /* The RS/6000 uses the XCOFF format. */ | |
f045b2c9 | 2174 | |
fdaff8ba | 2175 | #define XCOFF_DEBUGGING_INFO |
f045b2c9 | 2176 | |
c5abcf1d CH |
2177 | /* Define if the object format being used is COFF or a superset. */ |
2178 | #define OBJECT_FORMAT_COFF | |
2179 | ||
b9af8fb0 | 2180 | /* Define the magic numbers that we recognize as COFF. |
a260abc9 DE |
2181 | AIX 4.3 adds U803XTOCMAGIC (0757) for 64-bit objects, but collect2.c |
2182 | does not include files in the correct order to conditionally define | |
2183 | the symbolic name in this macro. */ | |
2c440f06 | 2184 | #define MY_ISCOFF(magic) \ |
b9af8fb0 DE |
2185 | ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC \ |
2186 | || (magic) == U802TOCMAGIC || (magic) == 0757) | |
2c440f06 | 2187 | |
115e69a9 RK |
2188 | /* This is the only version of nm that collect2 can work with. */ |
2189 | #define REAL_NM_FILE_NAME "/usr/ucb/nm" | |
2190 | ||
f045b2c9 RS |
2191 | /* We don't have GAS for the RS/6000 yet, so don't write out special |
2192 | .stabs in cc1plus. */ | |
c81bebd7 | 2193 | |
f045b2c9 | 2194 | #define FASCIST_ASSEMBLER |
b6c9286a | 2195 | |
4cacd7a0 KE |
2196 | /* AIX does not have any init/fini or ctor/dtor sections, so create |
2197 | static constructors and destructors as normal functions. */ | |
2198 | /* #define ASM_OUTPUT_CONSTRUCTOR(file, name) */ | |
2199 | /* #define ASM_OUTPUT_DESTRUCTOR(file, name) */ | |
f045b2c9 | 2200 | |
f045b2c9 RS |
2201 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
2202 | is done just by pretending it is already truncated. */ | |
2203 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
2204 | ||
2205 | /* Specify the machine mode that pointers have. | |
2206 | After generation of rtl, the compiler makes no further distinction | |
2207 | between pointers and any other objects of this machine mode. */ | |
2f3e5814 | 2208 | #define Pmode (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
2209 | |
2210 | /* Mode of a function address in a call instruction (for indexing purposes). | |
f045b2c9 | 2211 | Doesn't matter on RS/6000. */ |
2f3e5814 | 2212 | #define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode) |
f045b2c9 RS |
2213 | |
2214 | /* Define this if addresses of constant functions | |
2215 | shouldn't be put through pseudo regs where they can be cse'd. | |
2216 | Desirable on machines where ordinary constants are expensive | |
2217 | but a CALL with constant address is cheap. */ | |
2218 | #define NO_FUNCTION_CSE | |
2219 | ||
d969caf8 | 2220 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
6febd581 RK |
2221 | few bits. |
2222 | ||
2223 | The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED | |
2224 | have been dropped from the PowerPC architecture. */ | |
2225 | ||
4697a36c | 2226 | #define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0) |
f045b2c9 RS |
2227 | |
2228 | /* Use atexit for static constructors/destructors, instead of defining | |
2229 | our own exit function. */ | |
2230 | #define HAVE_ATEXIT | |
2231 | ||
2232 | /* Compute the cost of computing a constant rtl expression RTX | |
2233 | whose rtx-code is CODE. The body of this macro is a portion | |
2234 | of a switch statement. If the code is computed here, | |
2235 | return it with a return statement. Otherwise, break from the switch. | |
2236 | ||
01554f00 | 2237 | On the RS/6000, if it is valid in the insn, it is free. So this |
f045b2c9 RS |
2238 | always returns 0. */ |
2239 | ||
4697a36c | 2240 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ |
f045b2c9 RS |
2241 | case CONST_INT: \ |
2242 | case CONST: \ | |
2243 | case LABEL_REF: \ | |
2244 | case SYMBOL_REF: \ | |
2245 | case CONST_DOUBLE: \ | |
4697a36c | 2246 | case HIGH: \ |
f045b2c9 RS |
2247 | return 0; |
2248 | ||
2249 | /* Provide the costs of a rtl expression. This is in the body of a | |
2250 | switch on CODE. */ | |
2251 | ||
38c1f2d7 MM |
2252 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ |
2253 | case PLUS: \ | |
2254 | return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
a260abc9 DE |
2255 | && ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) \ |
2256 | + 0x8000) >= 0x10000) \ | |
296b8152 | 2257 | && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ |
38c1f2d7 MM |
2258 | ? COSTS_N_INSNS (2) \ |
2259 | : COSTS_N_INSNS (1)); \ | |
2260 | case AND: \ | |
38c1f2d7 MM |
2261 | case IOR: \ |
2262 | case XOR: \ | |
a260abc9 DE |
2263 | return ((GET_CODE (XEXP (X, 1)) == CONST_INT \ |
2264 | && (INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff)) != 0 \ | |
296b8152 | 2265 | && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \ |
38c1f2d7 MM |
2266 | ? COSTS_N_INSNS (2) \ |
2267 | : COSTS_N_INSNS (1)); \ | |
2268 | case MULT: \ | |
2269 | switch (rs6000_cpu) \ | |
2270 | { \ | |
2271 | case PROCESSOR_RIOS1: \ | |
2272 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
2273 | ? COSTS_N_INSNS (5) \ | |
2274 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
2275 | ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ | |
2276 | case PROCESSOR_RIOS2: \ | |
2277 | case PROCESSOR_MPCCORE: \ | |
5a41b476 | 2278 | case PROCESSOR_PPC604e: \ |
38c1f2d7 MM |
2279 | return COSTS_N_INSNS (2); \ |
2280 | case PROCESSOR_PPC601: \ | |
2281 | return COSTS_N_INSNS (5); \ | |
2282 | case PROCESSOR_PPC603: \ | |
2283 | return (GET_CODE (XEXP (X, 1)) != CONST_INT \ | |
2284 | ? COSTS_N_INSNS (5) \ | |
2285 | : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ | |
2286 | ? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \ | |
2287 | case PROCESSOR_PPC403: \ | |
2288 | case PROCESSOR_PPC604: \ | |
2289 | case PROCESSOR_PPC620: \ | |
2290 | return COSTS_N_INSNS (4); \ | |
2291 | } \ | |
2292 | case DIV: \ | |
2293 | case MOD: \ | |
2294 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
2295 | && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \ | |
2296 | return COSTS_N_INSNS (2); \ | |
2297 | /* otherwise fall through to normal divide. */ \ | |
2298 | case UDIV: \ | |
2299 | case UMOD: \ | |
2300 | switch (rs6000_cpu) \ | |
2301 | { \ | |
2302 | case PROCESSOR_RIOS1: \ | |
2303 | return COSTS_N_INSNS (19); \ | |
2304 | case PROCESSOR_RIOS2: \ | |
2305 | return COSTS_N_INSNS (13); \ | |
2306 | case PROCESSOR_MPCCORE: \ | |
2307 | return COSTS_N_INSNS (6); \ | |
2308 | case PROCESSOR_PPC403: \ | |
2309 | return COSTS_N_INSNS (33); \ | |
2310 | case PROCESSOR_PPC601: \ | |
2311 | return COSTS_N_INSNS (36); \ | |
2312 | case PROCESSOR_PPC603: \ | |
2313 | return COSTS_N_INSNS (37); \ | |
2314 | case PROCESSOR_PPC604: \ | |
5a41b476 | 2315 | case PROCESSOR_PPC604e: \ |
38c1f2d7 MM |
2316 | case PROCESSOR_PPC620: \ |
2317 | return COSTS_N_INSNS (20); \ | |
2318 | } \ | |
2319 | case FFS: \ | |
2320 | return COSTS_N_INSNS (4); \ | |
2321 | case MEM: \ | |
f045b2c9 RS |
2322 | /* MEM should be slightly more expensive than (plus (reg) (const)) */ \ |
2323 | return 5; | |
2324 | ||
2325 | /* Compute the cost of an address. This is meant to approximate the size | |
2326 | and/or execution delay of an insn using that address. If the cost is | |
2327 | approximated by the RTL complexity, including CONST_COSTS above, as | |
2328 | is usually the case for CISC machines, this macro should not be defined. | |
2329 | For aggressively RISCy machines, only one insn format is allowed, so | |
2330 | this macro should be a constant. The value of this macro only matters | |
2331 | for valid addresses. | |
2332 | ||
2333 | For the RS/6000, everything is cost 0. */ | |
2334 | ||
2335 | #define ADDRESS_COST(RTX) 0 | |
2336 | ||
2337 | /* Adjust the length of an INSN. LENGTH is the currently-computed length and | |
2338 | should be adjusted to reflect any required changes. This macro is used when | |
2339 | there is some systematic length adjustment required that would be difficult | |
2340 | to express in the length attribute. */ | |
2341 | ||
2342 | /* #define ADJUST_INSN_LENGTH(X,LENGTH) */ | |
2343 | ||
2344 | /* Add any extra modes needed to represent the condition code. | |
2345 | ||
2346 | For the RS/6000, we need separate modes when unsigned (logical) comparisons | |
c5defebb RK |
2347 | are being done and we need a separate mode for floating-point. We also |
2348 | use a mode for the case when we are comparing the results of two | |
2349 | comparisons. */ | |
f045b2c9 | 2350 | |
c5defebb | 2351 | #define EXTRA_CC_MODES CCUNSmode, CCFPmode, CCEQmode |
f045b2c9 RS |
2352 | |
2353 | /* Define the names for the modes specified above. */ | |
c5defebb | 2354 | #define EXTRA_CC_NAMES "CCUNS", "CCFP", "CCEQ" |
f045b2c9 RS |
2355 | |
2356 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
2357 | return the mode to be used for the comparison. For floating-point, CCFPmode | |
c5defebb RK |
2358 | should be used. CCUNSmode should be used for unsigned comparisons. |
2359 | CCEQmode should be used when we are doing an inequality comparison on | |
2360 | the result of a comparison. CCmode should be used in all other cases. */ | |
2361 | ||
b565a316 | 2362 | #define SELECT_CC_MODE(OP,X,Y) \ |
f045b2c9 | 2363 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \ |
c5defebb RK |
2364 | : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \ |
2365 | : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \ | |
2366 | ? CCEQmode : CCmode)) | |
f045b2c9 RS |
2367 | |
2368 | /* Define the information needed to generate branch and scc insns. This is | |
2369 | stored from the compare operation. Note that we can't use "rtx" here | |
2370 | since it hasn't been defined! */ | |
2371 | ||
2372 | extern struct rtx_def *rs6000_compare_op0, *rs6000_compare_op1; | |
2373 | extern int rs6000_compare_fp_p; | |
2374 | ||
2375 | /* Set to non-zero by "fix" operation to indicate that itrunc and | |
2376 | uitrunc must be defined. */ | |
2377 | ||
2378 | extern int rs6000_trunc_used; | |
9929b575 ILT |
2379 | |
2380 | /* Function names to call to do floating point truncation. */ | |
2381 | ||
5bf6466a DE |
2382 | #define RS6000_ITRUNC "__itrunc" |
2383 | #define RS6000_UITRUNC "__uitrunc" | |
4d30c363 MM |
2384 | |
2385 | /* Prefix and suffix to use to saving floating point */ | |
2386 | #ifndef SAVE_FP_PREFIX | |
2387 | #define SAVE_FP_PREFIX "._savef" | |
2388 | #define SAVE_FP_SUFFIX "" | |
2389 | #endif | |
2390 | ||
2391 | /* Prefix and suffix to use to restoring floating point */ | |
2392 | #ifndef RESTORE_FP_PREFIX | |
2393 | #define RESTORE_FP_PREFIX "._restf" | |
2394 | #define RESTORE_FP_SUFFIX "" | |
2395 | #endif | |
2396 | ||
5bf6466a DE |
2397 | /* Function name to call to do profiling. */ |
2398 | #define RS6000_MCOUNT ".__mcount" | |
2399 | ||
f045b2c9 RS |
2400 | \f |
2401 | /* Control the assembler format that we output. */ | |
2402 | ||
1b279f39 DE |
2403 | /* A C string constant describing how to begin a comment in the target |
2404 | assembler language. The compiler assumes that the comment will end at | |
2405 | the end of the line. */ | |
2406 | #define ASM_COMMENT_START " #" | |
6b67933e | 2407 | |
f045b2c9 RS |
2408 | /* Output at beginning of assembler file. |
2409 | ||
b4d6689b | 2410 | Initialize the section names for the RS/6000 at this point. |
fdaff8ba | 2411 | |
6355b140 | 2412 | Specify filename to assembler. |
3fc2151d | 2413 | |
b4d6689b | 2414 | We want to go into the TOC section so at least one .toc will be emitted. |
fdaff8ba | 2415 | Also, in order to output proper .bs/.es pairs, we need at least one static |
b4d6689b RK |
2416 | [RW] section emitted. |
2417 | ||
2418 | We then switch back to text to force the gcc2_compiled. label and the space | |
c81bebd7 | 2419 | allocated after it (when profiling) into the text section. |
b4d6689b RK |
2420 | |
2421 | Finally, declare mcount when profiling to make the assembler happy. */ | |
f045b2c9 RS |
2422 | |
2423 | #define ASM_FILE_START(FILE) \ | |
2424 | { \ | |
fdaff8ba | 2425 | rs6000_gen_section_name (&xcoff_bss_section_name, \ |
f045b2c9 | 2426 | main_input_filename, ".bss_"); \ |
fdaff8ba | 2427 | rs6000_gen_section_name (&xcoff_private_data_section_name, \ |
f045b2c9 | 2428 | main_input_filename, ".rw_"); \ |
fdaff8ba | 2429 | rs6000_gen_section_name (&xcoff_read_only_section_name, \ |
f045b2c9 RS |
2430 | main_input_filename, ".ro_"); \ |
2431 | \ | |
6355b140 | 2432 | output_file_directive (FILE, main_input_filename); \ |
a260abc9 DE |
2433 | if (TARGET_64BIT) \ |
2434 | fputs ("\t.machine\t\"ppc64\"\n", FILE); \ | |
f045b2c9 | 2435 | toc_section (); \ |
fdaff8ba RS |
2436 | if (write_symbols != NO_DEBUG) \ |
2437 | private_data_section (); \ | |
b4d6689b RK |
2438 | text_section (); \ |
2439 | if (profile_flag) \ | |
5bf6466a | 2440 | fprintf (FILE, "\t.extern %s\n", RS6000_MCOUNT); \ |
3cfa4909 | 2441 | rs6000_file_start (FILE, TARGET_CPU_DEFAULT); \ |
f045b2c9 RS |
2442 | } |
2443 | ||
2444 | /* Output at end of assembler file. | |
2445 | ||
2446 | On the RS/6000, referencing data should automatically pull in text. */ | |
2447 | ||
2448 | #define ASM_FILE_END(FILE) \ | |
2449 | { \ | |
2450 | text_section (); \ | |
19d2d16f | 2451 | fputs ("_section_.text:\n", FILE); \ |
f045b2c9 | 2452 | data_section (); \ |
19d2d16f | 2453 | fputs ("\t.long _section_.text\n", FILE); \ |
f045b2c9 RS |
2454 | } |
2455 | ||
f045b2c9 RS |
2456 | /* We define this to prevent the name mangler from putting dollar signs into |
2457 | function names. */ | |
2458 | ||
2459 | #define NO_DOLLAR_IN_LABEL | |
2460 | ||
2461 | /* We define this to 0 so that gcc will never accept a dollar sign in a | |
2462 | variable name. This is needed because the AIX assembler will not accept | |
2463 | dollar signs. */ | |
2464 | ||
2465 | #define DOLLARS_IN_IDENTIFIERS 0 | |
2466 | ||
fdaff8ba RS |
2467 | /* Implicit library calls should use memcpy, not bcopy, etc. */ |
2468 | ||
2469 | #define TARGET_MEM_FUNCTIONS | |
2470 | ||
f045b2c9 RS |
2471 | /* Define the extra sections we need. We define three: one is the read-only |
2472 | data section which is used for constants. This is a csect whose name is | |
2473 | derived from the name of the input file. The second is for initialized | |
2474 | global variables. This is a csect whose name is that of the variable. | |
2475 | The third is the TOC. */ | |
2476 | ||
2477 | #define EXTRA_SECTIONS \ | |
2478 | read_only_data, private_data, read_only_private_data, toc, bss | |
2479 | ||
2480 | /* Define the name of our readonly data section. */ | |
2481 | ||
2482 | #define READONLY_DATA_SECTION read_only_data_section | |
2483 | ||
9704efe6 MS |
2484 | |
2485 | /* Define the name of the section to use for the exception tables. | |
2486 | TODO: test and see if we can use read_only_data_section, if so, | |
2487 | remove this. */ | |
2488 | ||
2489 | #define EXCEPTION_SECTION data_section | |
2490 | ||
b4f892eb RK |
2491 | /* If we are referencing a function that is static or is known to be |
2492 | in this file, make the SYMBOL_REF special. We can use this to indicate | |
2493 | that we can branch to this function without emitting a no-op after the | |
2494 | call. */ | |
2495 | ||
2496 | #define ENCODE_SECTION_INFO(DECL) \ | |
2497 | if (TREE_CODE (DECL) == FUNCTION_DECL \ | |
2498 | && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \ | |
2499 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; | |
2500 | ||
f045b2c9 RS |
2501 | /* Indicate that jump tables go in the text section. */ |
2502 | ||
75197b37 | 2503 | #define JUMP_TABLES_IN_TEXT_SECTION 1 |
f045b2c9 RS |
2504 | |
2505 | /* Define the routines to implement these extra sections. */ | |
2506 | ||
2507 | #define EXTRA_SECTION_FUNCTIONS \ | |
2508 | \ | |
2509 | void \ | |
2510 | read_only_data_section () \ | |
2511 | { \ | |
2512 | if (in_section != read_only_data) \ | |
2513 | { \ | |
469adec3 | 2514 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 2515 | xcoff_read_only_section_name); \ |
f045b2c9 RS |
2516 | in_section = read_only_data; \ |
2517 | } \ | |
2518 | } \ | |
2519 | \ | |
2520 | void \ | |
2521 | private_data_section () \ | |
2522 | { \ | |
2523 | if (in_section != private_data) \ | |
2524 | { \ | |
469adec3 | 2525 | fprintf (asm_out_file, ".csect %s[RW]\n", \ |
fdaff8ba | 2526 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
2527 | \ |
2528 | in_section = private_data; \ | |
2529 | } \ | |
2530 | } \ | |
2531 | \ | |
2532 | void \ | |
2533 | read_only_private_data_section () \ | |
2534 | { \ | |
2535 | if (in_section != read_only_private_data) \ | |
2536 | { \ | |
f25359b5 | 2537 | fprintf (asm_out_file, ".csect %s[RO]\n", \ |
fdaff8ba | 2538 | xcoff_private_data_section_name); \ |
f045b2c9 RS |
2539 | in_section = read_only_private_data; \ |
2540 | } \ | |
2541 | } \ | |
2542 | \ | |
2543 | void \ | |
2544 | toc_section () \ | |
2545 | { \ | |
642a35f1 JW |
2546 | if (TARGET_MINIMAL_TOC) \ |
2547 | { \ | |
642a35f1 JW |
2548 | /* toc_section is always called at least once from ASM_FILE_START, \ |
2549 | so this is guaranteed to always be defined once and only once \ | |
2550 | in each file. */ \ | |
2551 | if (! toc_initialized) \ | |
2552 | { \ | |
19d2d16f MM |
2553 | fputs (".toc\nLCTOC..0:\n", asm_out_file); \ |
2554 | fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \ | |
642a35f1 JW |
2555 | toc_initialized = 1; \ |
2556 | } \ | |
f045b2c9 | 2557 | \ |
642a35f1 | 2558 | if (in_section != toc) \ |
19d2d16f | 2559 | fputs (".csect toc_table[RW]\n", asm_out_file); \ |
642a35f1 JW |
2560 | } \ |
2561 | else \ | |
2562 | { \ | |
2563 | if (in_section != toc) \ | |
19d2d16f | 2564 | fputs (".toc\n", asm_out_file); \ |
642a35f1 | 2565 | } \ |
f045b2c9 | 2566 | in_section = toc; \ |
fc3ffe83 | 2567 | } |
f045b2c9 | 2568 | |
38c1f2d7 MM |
2569 | /* Flag to say the TOC is initialized */ |
2570 | extern int toc_initialized; | |
2571 | ||
f045b2c9 RS |
2572 | /* This macro produces the initial definition of a function name. |
2573 | On the RS/6000, we need to place an extra '.' in the function name and | |
c81bebd7 | 2574 | output the function descriptor. |
f045b2c9 RS |
2575 | |
2576 | The csect for the function will have already been created by the | |
2577 | `text_section' call previously done. We do have to go back to that | |
2578 | csect, however. */ | |
2579 | ||
fdaff8ba RS |
2580 | /* ??? What do the 16 and 044 in the .function line really mean? */ |
2581 | ||
f045b2c9 RS |
2582 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
2583 | { if (TREE_PUBLIC (DECL)) \ | |
2584 | { \ | |
19d2d16f | 2585 | fputs ("\t.globl .", FILE); \ |
f045b2c9 | 2586 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2587 | putc ('\n', FILE); \ |
fdaff8ba | 2588 | } \ |
3ce428da | 2589 | else \ |
fdaff8ba | 2590 | { \ |
19d2d16f | 2591 | fputs ("\t.lglobl .", FILE); \ |
fdaff8ba | 2592 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2593 | putc ('\n', FILE); \ |
f045b2c9 | 2594 | } \ |
19d2d16f | 2595 | fputs (".csect ", FILE); \ |
f045b2c9 | 2596 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
a260abc9 | 2597 | fputs (TARGET_32BIT ? "[DS]\n" : "[DS],3\n", FILE); \ |
f045b2c9 | 2598 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2599 | fputs (":\n", FILE); \ |
a260abc9 | 2600 | fputs (TARGET_32BIT ? "\t.long ." : "\t.llong .", FILE); \ |
f045b2c9 | 2601 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f MM |
2602 | fputs (", TOC[tc0], 0\n", FILE); \ |
2603 | fputs (".csect .text[PR]\n.", FILE); \ | |
f045b2c9 | 2604 | RS6000_OUTPUT_BASENAME (FILE, NAME); \ |
19d2d16f | 2605 | fputs (":\n", FILE); \ |
fdaff8ba | 2606 | if (write_symbols == XCOFF_DEBUG) \ |
c2a47e48 | 2607 | xcoffout_declare_function (FILE, DECL, NAME); \ |
f045b2c9 RS |
2608 | } |
2609 | ||
2610 | /* Return non-zero if this entry is to be written into the constant pool | |
2611 | in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST | |
2612 | containing one of them. If -mfp-in-toc (the default), we also do | |
2613 | this for floating-point constants. We actually can only do this | |
2614 | if the FP formats of the target and host machines are the same, but | |
2615 | we can't check that since not every file that uses | |
2616 | GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */ | |
2617 | ||
4697a36c MM |
2618 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \ |
2619 | (TARGET_TOC \ | |
2620 | && (GET_CODE (X) == SYMBOL_REF \ | |
2621 | || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \ | |
2622 | && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \ | |
2623 | || GET_CODE (X) == LABEL_REF \ | |
2624 | || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \ | |
2625 | && GET_CODE (X) == CONST_DOUBLE \ | |
a260abc9 DE |
2626 | && (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ |
2627 | || (TARGET_POWERPC64 && GET_MODE (X) == DImode))))) | |
2628 | #if 0 | |
4697a36c | 2629 | && BITS_PER_WORD == HOST_BITS_PER_INT))) |
a260abc9 | 2630 | #endif |
f045b2c9 RS |
2631 | |
2632 | /* Select section for constant in constant pool. | |
2633 | ||
2634 | On RS/6000, all constants are in the private read-only data area. | |
2635 | However, if this is being placed in the TOC it must be output as a | |
2636 | toc entry. */ | |
2637 | ||
2638 | #define SELECT_RTX_SECTION(MODE, X) \ | |
2639 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2640 | toc_section (); \ | |
2641 | else \ | |
2642 | read_only_private_data_section (); \ | |
2643 | } | |
2644 | ||
2645 | /* Macro to output a special constant pool entry. Go to WIN if we output | |
2646 | it. Otherwise, it is written the usual way. | |
2647 | ||
2648 | On the RS/6000, toc entries are handled this way. */ | |
2649 | ||
2650 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \ | |
2651 | { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \ | |
2652 | { \ | |
2653 | output_toc (FILE, X, LABELNO); \ | |
2654 | goto WIN; \ | |
2655 | } \ | |
2656 | } | |
2657 | ||
2658 | /* Select the section for an initialized data object. | |
2659 | ||
2660 | On the RS/6000, we have a special section for all variables except those | |
2661 | that are static. */ | |
2662 | ||
2663 | #define SELECT_SECTION(EXP,RELOC) \ | |
2664 | { \ | |
ed8969fa JW |
2665 | if ((TREE_CODE (EXP) == STRING_CST \ |
2666 | && !flag_writable_strings) \ | |
128e5769 | 2667 | || (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \ |
1ff5cbcd | 2668 | && TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \ |
ed8969fa JW |
2669 | && DECL_INITIAL (EXP) \ |
2670 | && (DECL_INITIAL (EXP) == error_mark_node \ | |
2671 | || TREE_CONSTANT (DECL_INITIAL (EXP))) \ | |
2672 | && ! (RELOC))) \ | |
f045b2c9 RS |
2673 | { \ |
2674 | if (TREE_PUBLIC (EXP)) \ | |
2675 | read_only_data_section (); \ | |
2676 | else \ | |
2677 | read_only_private_data_section (); \ | |
2678 | } \ | |
2679 | else \ | |
2680 | { \ | |
2681 | if (TREE_PUBLIC (EXP)) \ | |
2682 | data_section (); \ | |
2683 | else \ | |
2684 | private_data_section (); \ | |
2685 | } \ | |
2686 | } | |
2687 | ||
2688 | /* This outputs NAME to FILE up to the first null or '['. */ | |
2689 | ||
2690 | #define RS6000_OUTPUT_BASENAME(FILE, NAME) \ | |
c23a9d0e JM |
2691 | { \ |
2692 | char *_p; \ | |
99d3d26e | 2693 | \ |
c23a9d0e JM |
2694 | STRIP_NAME_ENCODING (_p, (NAME)); \ |
2695 | assemble_name ((FILE), _p); \ | |
2696 | } | |
2697 | ||
2698 | /* Remove any trailing [DS] or the like from the symbol name. */ | |
2699 | ||
28c57785 MM |
2700 | #define STRIP_NAME_ENCODING(VAR,NAME) \ |
2701 | do \ | |
2702 | { \ | |
2703 | char *_name = (NAME); \ | |
b6c9286a | 2704 | int _len; \ |
28c57785 | 2705 | if (_name[0] == '*') \ |
b6c9286a MM |
2706 | _name++; \ |
2707 | _len = strlen (_name); \ | |
2708 | if (_name[_len - 1] != ']') \ | |
2709 | (VAR) = _name; \ | |
28c57785 MM |
2710 | else \ |
2711 | { \ | |
b6c9286a MM |
2712 | (VAR) = (char *) alloca (_len + 1); \ |
2713 | strcpy ((VAR), _name); \ | |
2714 | (VAR)[_len - 4] = '\0'; \ | |
28c57785 MM |
2715 | } \ |
2716 | } \ | |
c23a9d0e | 2717 | while (0) |
f045b2c9 RS |
2718 | |
2719 | /* Output something to declare an external symbol to the assembler. Most | |
c81bebd7 | 2720 | assemblers don't need this. |
f045b2c9 RS |
2721 | |
2722 | If we haven't already, add "[RW]" (or "[DS]" for a function) to the | |
2723 | name. Normally we write this out along with the name. In the few cases | |
2724 | where we can't, it gets stripped off. */ | |
2725 | ||
2726 | #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ | |
2727 | { rtx _symref = XEXP (DECL_RTL (DECL), 0); \ | |
2728 | if ((TREE_CODE (DECL) == VAR_DECL \ | |
2729 | || TREE_CODE (DECL) == FUNCTION_DECL) \ | |
f045b2c9 RS |
2730 | && (NAME)[strlen (NAME) - 1] != ']') \ |
2731 | { \ | |
2732 | char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \ | |
2733 | strcpy (_name, XSTR (_symref, 0)); \ | |
2734 | strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \ | |
2735 | XSTR (_symref, 0) = _name; \ | |
2736 | } \ | |
19d2d16f | 2737 | fputs ("\t.extern ", FILE); \ |
f045b2c9 RS |
2738 | assemble_name (FILE, XSTR (_symref, 0)); \ |
2739 | if (TREE_CODE (DECL) == FUNCTION_DECL) \ | |
2740 | { \ | |
19d2d16f | 2741 | fputs ("\n\t.extern .", FILE); \ |
f045b2c9 RS |
2742 | RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \ |
2743 | } \ | |
19d2d16f | 2744 | putc ('\n', FILE); \ |
f045b2c9 RS |
2745 | } |
2746 | ||
2747 | /* Similar, but for libcall. We only have to worry about the function name, | |
2748 | not that of the descriptor. */ | |
2749 | ||
2750 | #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ | |
19d2d16f | 2751 | { fputs ("\t.extern .", FILE); \ |
f045b2c9 | 2752 | assemble_name (FILE, XSTR (FUN, 0)); \ |
19d2d16f | 2753 | putc ('\n', FILE); \ |
f045b2c9 RS |
2754 | } |
2755 | ||
2756 | /* Output to assembler file text saying following lines | |
2757 | may contain character constants, extra white space, comments, etc. */ | |
2758 | ||
2759 | #define ASM_APP_ON "" | |
2760 | ||
2761 | /* Output to assembler file text saying following lines | |
2762 | no longer contain unusual constructs. */ | |
2763 | ||
2764 | #define ASM_APP_OFF "" | |
2765 | ||
2766 | /* Output before instructions. */ | |
2767 | ||
11117bb9 | 2768 | #define TEXT_SECTION_ASM_OP ".csect .text[PR]" |
f045b2c9 RS |
2769 | |
2770 | /* Output before writable data. */ | |
2771 | ||
fdaff8ba | 2772 | #define DATA_SECTION_ASM_OP ".csect .data[RW]" |
f045b2c9 RS |
2773 | |
2774 | /* How to refer to registers in assembler output. | |
2775 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
2776 | ||
802a0058 | 2777 | extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ |
c81bebd7 MM |
2778 | |
2779 | #define REGISTER_NAMES \ | |
2780 | { \ | |
2781 | &rs6000_reg_names[ 0][0], /* r0 */ \ | |
2782 | &rs6000_reg_names[ 1][0], /* r1 */ \ | |
2783 | &rs6000_reg_names[ 2][0], /* r2 */ \ | |
2784 | &rs6000_reg_names[ 3][0], /* r3 */ \ | |
2785 | &rs6000_reg_names[ 4][0], /* r4 */ \ | |
2786 | &rs6000_reg_names[ 5][0], /* r5 */ \ | |
2787 | &rs6000_reg_names[ 6][0], /* r6 */ \ | |
2788 | &rs6000_reg_names[ 7][0], /* r7 */ \ | |
2789 | &rs6000_reg_names[ 8][0], /* r8 */ \ | |
2790 | &rs6000_reg_names[ 9][0], /* r9 */ \ | |
2791 | &rs6000_reg_names[10][0], /* r10 */ \ | |
2792 | &rs6000_reg_names[11][0], /* r11 */ \ | |
2793 | &rs6000_reg_names[12][0], /* r12 */ \ | |
2794 | &rs6000_reg_names[13][0], /* r13 */ \ | |
2795 | &rs6000_reg_names[14][0], /* r14 */ \ | |
2796 | &rs6000_reg_names[15][0], /* r15 */ \ | |
2797 | &rs6000_reg_names[16][0], /* r16 */ \ | |
2798 | &rs6000_reg_names[17][0], /* r17 */ \ | |
2799 | &rs6000_reg_names[18][0], /* r18 */ \ | |
2800 | &rs6000_reg_names[19][0], /* r19 */ \ | |
2801 | &rs6000_reg_names[20][0], /* r20 */ \ | |
2802 | &rs6000_reg_names[21][0], /* r21 */ \ | |
2803 | &rs6000_reg_names[22][0], /* r22 */ \ | |
2804 | &rs6000_reg_names[23][0], /* r23 */ \ | |
2805 | &rs6000_reg_names[24][0], /* r24 */ \ | |
2806 | &rs6000_reg_names[25][0], /* r25 */ \ | |
2807 | &rs6000_reg_names[26][0], /* r26 */ \ | |
2808 | &rs6000_reg_names[27][0], /* r27 */ \ | |
2809 | &rs6000_reg_names[28][0], /* r28 */ \ | |
2810 | &rs6000_reg_names[29][0], /* r29 */ \ | |
2811 | &rs6000_reg_names[30][0], /* r30 */ \ | |
2812 | &rs6000_reg_names[31][0], /* r31 */ \ | |
2813 | \ | |
2814 | &rs6000_reg_names[32][0], /* fr0 */ \ | |
2815 | &rs6000_reg_names[33][0], /* fr1 */ \ | |
2816 | &rs6000_reg_names[34][0], /* fr2 */ \ | |
2817 | &rs6000_reg_names[35][0], /* fr3 */ \ | |
2818 | &rs6000_reg_names[36][0], /* fr4 */ \ | |
2819 | &rs6000_reg_names[37][0], /* fr5 */ \ | |
2820 | &rs6000_reg_names[38][0], /* fr6 */ \ | |
2821 | &rs6000_reg_names[39][0], /* fr7 */ \ | |
2822 | &rs6000_reg_names[40][0], /* fr8 */ \ | |
2823 | &rs6000_reg_names[41][0], /* fr9 */ \ | |
2824 | &rs6000_reg_names[42][0], /* fr10 */ \ | |
2825 | &rs6000_reg_names[43][0], /* fr11 */ \ | |
2826 | &rs6000_reg_names[44][0], /* fr12 */ \ | |
2827 | &rs6000_reg_names[45][0], /* fr13 */ \ | |
2828 | &rs6000_reg_names[46][0], /* fr14 */ \ | |
2829 | &rs6000_reg_names[47][0], /* fr15 */ \ | |
2830 | &rs6000_reg_names[48][0], /* fr16 */ \ | |
2831 | &rs6000_reg_names[49][0], /* fr17 */ \ | |
2832 | &rs6000_reg_names[50][0], /* fr18 */ \ | |
2833 | &rs6000_reg_names[51][0], /* fr19 */ \ | |
2834 | &rs6000_reg_names[52][0], /* fr20 */ \ | |
2835 | &rs6000_reg_names[53][0], /* fr21 */ \ | |
2836 | &rs6000_reg_names[54][0], /* fr22 */ \ | |
2837 | &rs6000_reg_names[55][0], /* fr23 */ \ | |
2838 | &rs6000_reg_names[56][0], /* fr24 */ \ | |
2839 | &rs6000_reg_names[57][0], /* fr25 */ \ | |
2840 | &rs6000_reg_names[58][0], /* fr26 */ \ | |
2841 | &rs6000_reg_names[59][0], /* fr27 */ \ | |
2842 | &rs6000_reg_names[60][0], /* fr28 */ \ | |
2843 | &rs6000_reg_names[61][0], /* fr29 */ \ | |
2844 | &rs6000_reg_names[62][0], /* fr30 */ \ | |
2845 | &rs6000_reg_names[63][0], /* fr31 */ \ | |
2846 | \ | |
2847 | &rs6000_reg_names[64][0], /* mq */ \ | |
2848 | &rs6000_reg_names[65][0], /* lr */ \ | |
2849 | &rs6000_reg_names[66][0], /* ctr */ \ | |
2850 | &rs6000_reg_names[67][0], /* ap */ \ | |
2851 | \ | |
2852 | &rs6000_reg_names[68][0], /* cr0 */ \ | |
2853 | &rs6000_reg_names[69][0], /* cr1 */ \ | |
2854 | &rs6000_reg_names[70][0], /* cr2 */ \ | |
2855 | &rs6000_reg_names[71][0], /* cr3 */ \ | |
2856 | &rs6000_reg_names[72][0], /* cr4 */ \ | |
2857 | &rs6000_reg_names[73][0], /* cr5 */ \ | |
2858 | &rs6000_reg_names[74][0], /* cr6 */ \ | |
2859 | &rs6000_reg_names[75][0], /* cr7 */ \ | |
802a0058 MM |
2860 | \ |
2861 | &rs6000_reg_names[76][0], /* fpmem */ \ | |
c81bebd7 MM |
2862 | } |
2863 | ||
2864 | /* print-rtl can't handle the above REGISTER_NAMES, so define the | |
2865 | following for it. Switch to use the alternate names since | |
2866 | they are more mnemonic. */ | |
2867 | ||
2868 | #define DEBUG_REGISTER_NAMES \ | |
2869 | { \ | |
802a0058 MM |
2870 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ |
2871 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
2872 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
2873 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \ | |
2874 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
2875 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
2876 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ | |
2877 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ | |
2878 | "mq", "lr", "ctr", "ap", \ | |
2879 | "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \ | |
2880 | "fpmem" \ | |
c81bebd7 | 2881 | } |
f045b2c9 RS |
2882 | |
2883 | /* Table of additional register names to use in user input. */ | |
2884 | ||
2885 | #define ADDITIONAL_REGISTER_NAMES \ | |
c4d38ccb MM |
2886 | {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \ |
2887 | {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \ | |
2888 | {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \ | |
2889 | {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \ | |
2890 | {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \ | |
2891 | {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \ | |
2892 | {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \ | |
2893 | {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \ | |
2894 | {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \ | |
2895 | {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \ | |
2896 | {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \ | |
2897 | {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \ | |
2898 | {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \ | |
2899 | {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \ | |
2900 | {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \ | |
2901 | {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \ | |
2902 | /* no additional names for: mq, lr, ctr, ap */ \ | |
2903 | {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \ | |
2904 | {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \ | |
2905 | {"cc", 68}, {"sp", 1}, {"toc", 2} } | |
f045b2c9 RS |
2906 | |
2907 | /* How to renumber registers for dbx and gdb. */ | |
2908 | ||
2909 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
2910 | ||
0da40b09 RK |
2911 | /* Text to write out after a CALL that may be replaced by glue code by |
2912 | the loader. This depends on the AIX version. */ | |
2913 | #define RS6000_CALL_GLUE "cror 31,31,31" | |
11117bb9 | 2914 | |
f045b2c9 RS |
2915 | /* This is how to output the definition of a user-level label named NAME, |
2916 | such as the label on a static function or variable NAME. */ | |
2917 | ||
2918 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
2919 | do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0) | |
2920 | ||
2921 | /* This is how to output a command to make the user-level label named NAME | |
2922 | defined for reference from other files. */ | |
2923 | ||
2924 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
2925 | do { fputs ("\t.globl ", FILE); \ | |
2926 | RS6000_OUTPUT_BASENAME (FILE, NAME); fputs ("\n", FILE);} while (0) | |
2927 | ||
2928 | /* This is how to output a reference to a user-level label named NAME. | |
2929 | `assemble_name' uses this. */ | |
2930 | ||
2931 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
7509c759 | 2932 | fputs (NAME, FILE) |
f045b2c9 RS |
2933 | |
2934 | /* This is how to output an internal numbered label where | |
2935 | PREFIX is the class of label and NUM is the number within the class. */ | |
2936 | ||
2937 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
2938 | fprintf (FILE, "%s..%d:\n", PREFIX, NUM) | |
2939 | ||
3daf36a4 ILT |
2940 | /* This is how to output an internal label prefix. rs6000.c uses this |
2941 | when generating traceback tables. */ | |
2942 | ||
2943 | #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ | |
2944 | fprintf (FILE, "%s..", PREFIX) | |
2945 | ||
f045b2c9 RS |
2946 | /* This is how to output a label for a jump table. Arguments are the same as |
2947 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
2948 | passed. */ | |
2949 | ||
2950 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
2951 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
2952 | ||
2953 | /* This is how to store into the string LABEL | |
2954 | the symbol_ref name of an internal numbered label where | |
2955 | PREFIX is the class of label and NUM is the number within the class. | |
2956 | This is suitable for output with `assemble_name'. */ | |
2957 | ||
2958 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
3d199f7a | 2959 | sprintf (LABEL, "*%s..%d", PREFIX, NUM) |
f045b2c9 RS |
2960 | |
2961 | /* This is how to output an assembler line defining a `double' constant. */ | |
2962 | ||
a5b1eb34 RS |
2963 | #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \ |
2964 | { \ | |
2965 | if (REAL_VALUE_ISINF (VALUE) \ | |
2966 | || REAL_VALUE_ISNAN (VALUE) \ | |
2967 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2968 | { \ | |
2969 | long t[2]; \ | |
2970 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
2971 | fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \ | |
2972 | t[0] & 0xffffffff, t[1] & 0xffffffff); \ | |
2973 | } \ | |
2974 | else \ | |
2975 | { \ | |
2976 | char str[30]; \ | |
2977 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
2978 | fprintf (FILE, "\t.double 0d%s\n", str); \ | |
2979 | } \ | |
2980 | } | |
f045b2c9 RS |
2981 | |
2982 | /* This is how to output an assembler line defining a `float' constant. */ | |
2983 | ||
a5b1eb34 RS |
2984 | #define ASM_OUTPUT_FLOAT(FILE, VALUE) \ |
2985 | { \ | |
2986 | if (REAL_VALUE_ISINF (VALUE) \ | |
2987 | || REAL_VALUE_ISNAN (VALUE) \ | |
2988 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
2989 | { \ | |
2990 | long t; \ | |
2991 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
2992 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
2993 | } \ | |
2994 | else \ | |
2995 | { \ | |
2996 | char str[30]; \ | |
2997 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
2998 | fprintf (FILE, "\t.float 0d%s\n", str); \ | |
2999 | } \ | |
3000 | } | |
f045b2c9 RS |
3001 | |
3002 | /* This is how to output an assembler line defining an `int' constant. */ | |
3003 | ||
5854b0d0 DE |
3004 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ |
3005 | do { \ | |
3006 | if (TARGET_32BIT) \ | |
3007 | { \ | |
3008 | assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \ | |
3009 | UNITS_PER_WORD, 1); \ | |
3010 | assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \ | |
3011 | UNITS_PER_WORD, 1); \ | |
3012 | } \ | |
3013 | else \ | |
3014 | { \ | |
3015 | fputs ("\t.llong ", FILE); \ | |
3016 | output_addr_const (FILE, (VALUE)); \ | |
3017 | putc ('\n', FILE); \ | |
3018 | } \ | |
3019 | } while (0) | |
3020 | ||
f045b2c9 | 3021 | #define ASM_OUTPUT_INT(FILE,VALUE) \ |
19d2d16f | 3022 | ( fputs ("\t.long ", FILE), \ |
f045b2c9 | 3023 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3024 | putc ('\n', FILE)) |
f045b2c9 RS |
3025 | |
3026 | /* Likewise for `char' and `short' constants. */ | |
3027 | ||
3028 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
19d2d16f | 3029 | ( fputs ("\t.short ", FILE), \ |
f045b2c9 | 3030 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3031 | putc ('\n', FILE)) |
f045b2c9 RS |
3032 | |
3033 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
19d2d16f | 3034 | ( fputs ("\t.byte ", FILE), \ |
f045b2c9 | 3035 | output_addr_const (FILE, (VALUE)), \ |
19d2d16f | 3036 | putc ('\n', FILE)) |
f045b2c9 RS |
3037 | |
3038 | /* This is how to output an assembler line for a numeric constant byte. */ | |
3039 | ||
3040 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
3041 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE)) | |
3042 | ||
3043 | /* This is how to output an assembler line to define N characters starting | |
3044 | at P to FILE. */ | |
3045 | ||
3046 | #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N)) | |
3047 | ||
3048 | /* This is how to output code to push a register on the stack. | |
034e84c4 MM |
3049 | It need not be very fast code. |
3050 | ||
3051 | On the rs6000, we must keep the backchain up to date. In order | |
3052 | to simplify things, always allocate 16 bytes for a push (System V | |
3053 | wants to keep stack aligned to a 16 byte boundary). */ | |
f045b2c9 | 3054 | |
4697a36c MM |
3055 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ |
3056 | do { \ | |
3057 | extern char *reg_names[]; \ | |
034e84c4 MM |
3058 | asm_fprintf (FILE, "\t{stu|stwu} %s,-16(%s)\n\t{st|stw} %s,8(%s)\n", \ |
3059 | reg_names[1], reg_names[1], reg_names[REGNO], \ | |
4697a36c MM |
3060 | reg_names[1]); \ |
3061 | } while (0) | |
f045b2c9 RS |
3062 | |
3063 | /* This is how to output an insn to pop a register from the stack. | |
3064 | It need not be very fast code. */ | |
3065 | ||
4697a36c MM |
3066 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ |
3067 | do { \ | |
3068 | extern char *reg_names[]; \ | |
034e84c4 | 3069 | asm_fprintf (FILE, "\t{l|lwz} %s,8(%s)\n\t{ai|addic} %s,%s,16\n", \ |
4697a36c MM |
3070 | reg_names[REGNO], reg_names[1], reg_names[1], \ |
3071 | reg_names[1]); \ | |
3072 | } while (0) | |
f045b2c9 | 3073 | |
c81bebd7 | 3074 | /* This is how to output an element of a case-vector that is absolute. |
f045b2c9 RS |
3075 | (RS/6000 does not use such vectors, but we must define this macro |
3076 | anyway.) */ | |
3077 | ||
3daf36a4 ILT |
3078 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ |
3079 | do { char buf[100]; \ | |
a260abc9 | 3080 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
3081 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
3082 | assemble_name (FILE, buf); \ | |
19d2d16f | 3083 | putc ('\n', FILE); \ |
3daf36a4 | 3084 | } while (0) |
f045b2c9 RS |
3085 | |
3086 | /* This is how to output an element of a case-vector that is relative. */ | |
3087 | ||
33f7f353 | 3088 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\ |
3daf36a4 | 3089 | do { char buf[100]; \ |
a260abc9 | 3090 | fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ |
3daf36a4 ILT |
3091 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ |
3092 | assemble_name (FILE, buf); \ | |
19d2d16f | 3093 | putc ('-', FILE); \ |
3daf36a4 ILT |
3094 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \ |
3095 | assemble_name (FILE, buf); \ | |
19d2d16f | 3096 | putc ('\n', FILE); \ |
3daf36a4 | 3097 | } while (0) |
f045b2c9 RS |
3098 | |
3099 | /* This is how to output an assembler line | |
3100 | that says to advance the location counter | |
3101 | to a multiple of 2**LOG bytes. */ | |
3102 | ||
3103 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
3104 | if ((LOG) != 0) \ | |
3105 | fprintf (FILE, "\t.align %d\n", (LOG)) | |
3106 | ||
3107 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
3108 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
3109 | ||
3110 | /* This says how to output an assembler line | |
3111 | to define a global common symbol. */ | |
3112 | ||
b73fd26c | 3113 | #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNMENT) \ |
fc3ffe83 | 3114 | do { fputs (".comm ", (FILE)); \ |
f045b2c9 | 3115 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
b73fd26c DE |
3116 | if ( (SIZE) > 4) \ |
3117 | fprintf ((FILE), ",%d,3\n", (SIZE)); \ | |
3118 | else \ | |
3119 | fprintf( (FILE), ",%d\n", (SIZE)); \ | |
3120 | } while (0) | |
f045b2c9 RS |
3121 | |
3122 | /* This says how to output an assembler line | |
3123 | to define a local common symbol. */ | |
3124 | ||
3125 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
fc3ffe83 | 3126 | do { fputs (".lcomm ", (FILE)); \ |
f045b2c9 | 3127 | RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \ |
fdaff8ba | 3128 | fprintf ((FILE), ",%d,%s\n", (SIZE), xcoff_bss_section_name); \ |
f045b2c9 RS |
3129 | } while (0) |
3130 | ||
3131 | /* Store in OUTPUT a string (made with alloca) containing | |
3132 | an assembler-name for a local static variable named NAME. | |
3133 | LABELNO is an integer which is different for each call. */ | |
3134 | ||
3135 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
3136 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
3137 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
3138 | ||
3139 | /* Define the parentheses used to group arithmetic operations | |
3140 | in assembler code. */ | |
3141 | ||
3142 | #define ASM_OPEN_PAREN "(" | |
3143 | #define ASM_CLOSE_PAREN ")" | |
3144 | ||
3145 | /* Define results of standard character escape sequences. */ | |
3146 | #define TARGET_BELL 007 | |
3147 | #define TARGET_BS 010 | |
3148 | #define TARGET_TAB 011 | |
3149 | #define TARGET_NEWLINE 012 | |
3150 | #define TARGET_VT 013 | |
3151 | #define TARGET_FF 014 | |
3152 | #define TARGET_CR 015 | |
3153 | ||
3154 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
3155 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
3156 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
3157 | ||
3158 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
3159 | ||
3160 | /* Define which CODE values are valid. */ | |
3161 | ||
c81bebd7 MM |
3162 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
3163 | ((CODE) == '.' || (CODE) == '*' || (CODE) == '$') | |
f045b2c9 RS |
3164 | |
3165 | /* Print a memory address as an operand to reference that memory location. */ | |
3166 | ||
3167 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
3168 | ||
3169 | /* Define the codes that are matched by predicates in rs6000.c. */ | |
3170 | ||
802a0058 | 3171 | #define PREDICATE_CODES \ |
e675f625 DE |
3172 | {"short_cint_operand", {CONST_INT, CONSTANT_P_RTX}}, \ |
3173 | {"u_short_cint_operand", {CONST_INT, CONSTANT_P_RTX}}, \ | |
f357808b | 3174 | {"non_short_cint_operand", {CONST_INT}}, \ |
cd2b37d9 | 3175 | {"gpc_reg_operand", {SUBREG, REG}}, \ |
f045b2c9 | 3176 | {"cc_reg_operand", {SUBREG, REG}}, \ |
e675f625 | 3177 | {"reg_or_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
f045b2c9 | 3178 | {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \ |
e675f625 DE |
3179 | {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
3180 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
766a866c | 3181 | {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ |
38c1f2d7 | 3182 | {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \ |
f045b2c9 RS |
3183 | {"easy_fp_constant", {CONST_DOUBLE}}, \ |
3184 | {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ | |
414d3ee4 | 3185 | {"lwa_operand", {SUBREG, MEM, REG}}, \ |
b6c9286a | 3186 | {"volatile_mem_operand", {MEM}}, \ |
b7676b46 | 3187 | {"offsettable_addr_operand", {REG, SUBREG, PLUS}}, \ |
f045b2c9 | 3188 | {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ |
e675f625 | 3189 | {"add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
f357808b | 3190 | {"non_add_cint_operand", {CONST_INT}}, \ |
e675f625 DE |
3191 | {"and_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ |
3192 | {"and64_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX, \ | |
3193 | CONST_DOUBLE}}, \ | |
3194 | {"logical_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \ | |
f357808b | 3195 | {"non_logical_cint_operand", {CONST_INT}}, \ |
f045b2c9 | 3196 | {"mask_operand", {CONST_INT}}, \ |
a260abc9 | 3197 | {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \ |
b6c9286a | 3198 | {"count_register_operand", {REG}}, \ |
802a0058 | 3199 | {"fpmem_operand", {REG}}, \ |
f045b2c9 | 3200 | {"call_operand", {SYMBOL_REF, REG}}, \ |
f8634644 | 3201 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
e675f625 DE |
3202 | {"input_operand", {SUBREG, MEM, REG, CONST_INT, CONSTANT_P_RTX, \ |
3203 | CONST_DOUBLE, SYMBOL_REF}}, \ | |
f8634644 RK |
3204 | {"load_multiple_operation", {PARALLEL}}, \ |
3205 | {"store_multiple_operation", {PARALLEL}}, \ | |
3206 | {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
e477bbc7 | 3207 | GT, LEU, LTU, GEU, GTU}}, \ |
f8634644 | 3208 | {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ |
d2a0c2ee JC |
3209 | GT, LEU, LTU, GEU, GTU}}, \ |
3210 | {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \ | |
3211 | GT, LEU, LTU, GEU, GTU}}, | |
75814ad4 | 3212 | |
b6c9286a MM |
3213 | /* uncomment for disabling the corresponding default options */ |
3214 | /* #define MACHINE_no_sched_interblock */ | |
3215 | /* #define MACHINE_no_sched_speculative */ | |
3216 | /* #define MACHINE_no_sched_speculative_load */ | |
3217 | ||
3218 | /* indicate that issue rate is defined for this machine | |
3219 | (no need to use the default) */ | |
246853b9 | 3220 | #define ISSUE_RATE get_issue_rate () |
b6c9286a | 3221 | |
766a866c MM |
3222 | /* General flags. */ |
3223 | extern int flag_pic; | |
354b734b MM |
3224 | extern int optimize; |
3225 | extern int flag_expensive_optimizations; | |
a7df97e6 | 3226 | extern int frame_pointer_needed; |
354b734b | 3227 | |
75814ad4 | 3228 | /* Declare functions in rs6000.c */ |
6b67933e | 3229 | extern void output_options (); |
75814ad4 | 3230 | extern void rs6000_override_options (); |
3cfa4909 | 3231 | extern void rs6000_file_start (); |
6b67933e | 3232 | extern struct rtx_def *rs6000_float_const (); |
c4c40373 | 3233 | extern struct rtx_def *rs6000_got_register (); |
75814ad4 | 3234 | extern int direct_return (); |
c4d38ccb | 3235 | extern int get_issue_rate (); |
75814ad4 MM |
3236 | extern int any_operand (); |
3237 | extern int short_cint_operand (); | |
3238 | extern int u_short_cint_operand (); | |
3239 | extern int non_short_cint_operand (); | |
3240 | extern int gpc_reg_operand (); | |
3241 | extern int cc_reg_operand (); | |
3242 | extern int reg_or_short_operand (); | |
3243 | extern int reg_or_neg_short_operand (); | |
3244 | extern int reg_or_u_short_operand (); | |
3245 | extern int reg_or_cint_operand (); | |
766a866c | 3246 | extern int got_operand (); |
38c1f2d7 | 3247 | extern int got_no_const_operand (); |
4e74d8ec | 3248 | extern int num_insns_constant (); |
75814ad4 | 3249 | extern int easy_fp_constant (); |
b7676b46 RK |
3250 | extern int volatile_mem_operand (); |
3251 | extern int offsettable_addr_operand (); | |
75814ad4 MM |
3252 | extern int mem_or_easy_const_operand (); |
3253 | extern int add_operand (); | |
3254 | extern int non_add_cint_operand (); | |
c4d38ccb | 3255 | extern int non_logical_cint_operand (); |
75814ad4 | 3256 | extern int logical_operand (); |
75814ad4 MM |
3257 | extern int mask_constant (); |
3258 | extern int mask_operand (); | |
a260abc9 DE |
3259 | extern int mask64_operand (); |
3260 | extern int and64_operand (); | |
75814ad4 | 3261 | extern int and_operand (); |
802a0058 MM |
3262 | extern int count_register_operand (); |
3263 | extern int fpmem_operand (); | |
75814ad4 MM |
3264 | extern int reg_or_mem_operand (); |
3265 | extern int lwa_operand (); | |
3266 | extern int call_operand (); | |
3267 | extern int current_file_function_operand (); | |
3268 | extern int input_operand (); | |
7509c759 | 3269 | extern int small_data_operand (); |
4697a36c MM |
3270 | extern void init_cumulative_args (); |
3271 | extern void function_arg_advance (); | |
b6c9286a | 3272 | extern int function_arg_boundary (); |
4697a36c MM |
3273 | extern struct rtx_def *function_arg (); |
3274 | extern int function_arg_partial_nregs (); | |
3275 | extern int function_arg_pass_by_reference (); | |
3276 | extern void setup_incoming_varargs (); | |
3277 | extern struct rtx_def *expand_builtin_saveregs (); | |
b7676b46 | 3278 | extern struct rtx_def *rs6000_stack_temp (); |
7e69e155 | 3279 | extern int expand_block_move (); |
75814ad4 MM |
3280 | extern int load_multiple_operation (); |
3281 | extern int store_multiple_operation (); | |
3282 | extern int branch_comparison_operator (); | |
3283 | extern int scc_comparison_operator (); | |
d2a0c2ee | 3284 | extern int trap_comparison_operator (); |
75814ad4 MM |
3285 | extern int includes_lshift_p (); |
3286 | extern int includes_rshift_p (); | |
3287 | extern int registers_ok_for_quad_peep (); | |
3288 | extern int addrs_ok_for_quad_peep (); | |
3289 | extern enum reg_class secondary_reload_class (); | |
3290 | extern int ccr_bit (); | |
d266da75 | 3291 | extern void rs6000_finalize_pic (); |
30ea98f1 | 3292 | extern void rs6000_reorg (); |
a7df97e6 MM |
3293 | extern void rs6000_save_machine_status (); |
3294 | extern void rs6000_restore_machine_status (); | |
3295 | extern void rs6000_init_expanders (); | |
75814ad4 MM |
3296 | extern void print_operand (); |
3297 | extern void print_operand_address (); | |
3298 | extern int first_reg_to_save (); | |
3299 | extern int first_fp_reg_to_save (); | |
75814ad4 | 3300 | extern int rs6000_makes_calls (); |
4697a36c | 3301 | extern rs6000_stack_t *rs6000_stack_info (); |
75814ad4 MM |
3302 | extern void output_prolog (); |
3303 | extern void output_epilog (); | |
17167fd8 | 3304 | extern void output_mi_thunk (); |
75814ad4 MM |
3305 | extern void output_toc (); |
3306 | extern void output_ascii (); | |
3307 | extern void rs6000_gen_section_name (); | |
3308 | extern void output_function_profiler (); | |
3309 | extern int rs6000_adjust_cost (); | |
b6c9286a MM |
3310 | extern void rs6000_trampoline_template (); |
3311 | extern int rs6000_trampoline_size (); | |
3312 | extern void rs6000_initialize_trampoline (); | |
c4d38ccb | 3313 | extern void rs6000_output_load_toc_table (); |
7509c759 MM |
3314 | extern int rs6000_comp_type_attributes (); |
3315 | extern int rs6000_valid_decl_attribute_p (); | |
3316 | extern int rs6000_valid_type_attribute_p (); | |
3317 | extern void rs6000_set_default_type_attributes (); | |
3318 | extern struct rtx_def *rs6000_dll_import_ref (); | |
6a4cee5f | 3319 | extern struct rtx_def *rs6000_longcall_ref (); |
c4d38ccb | 3320 | extern int function_arg_padding (); |
296b8152 KG |
3321 | extern void toc_section (); |
3322 | extern void private_data_section (); | |
a6c2a102 | 3323 | extern void rs6000_fatal_bad_address (); |
28174a14 MS |
3324 | |
3325 | /* See nonlocal_goto_receiver for when this must be set. */ | |
3326 | ||
3327 | #define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_TOC && TARGET_MINIMAL_TOC) |