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78f5898b AH |
1 | ; Options for the rs6000 port of the compiler |
2 | ; | |
66647d44 | 3 | ; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. |
78f5898b AH |
4 | ; Contributed by Aldy Hernandez <aldy@quesejoda.com>. |
5 | ; | |
6 | ; This file is part of GCC. | |
7 | ; | |
8 | ; GCC is free software; you can redistribute it and/or modify it under | |
9 | ; the terms of the GNU General Public License as published by the Free | |
2f83c7d6 | 10 | ; Software Foundation; either version 3, or (at your option) any later |
78f5898b AH |
11 | ; version. |
12 | ; | |
13 | ; GCC is distributed in the hope that it will be useful, but WITHOUT | |
14 | ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | ; License for more details. | |
17 | ; | |
18 | ; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
19 | ; along with GCC; see the file COPYING3. If not see |
20 | ; <http://www.gnu.org/licenses/>. | |
78f5898b AH |
21 | |
22 | mpower | |
23 | Target Report RejectNegative Mask(POWER) | |
24 | Use POWER instruction set | |
25 | ||
26 | mno-power | |
27 | Target Report RejectNegative | |
28 | Do not use POWER instruction set | |
29 | ||
30 | mpower2 | |
31 | Target Report Mask(POWER2) | |
32 | Use POWER2 instruction set | |
33 | ||
34 | mpowerpc | |
35 | Target Report RejectNegative Mask(POWERPC) | |
36 | Use PowerPC instruction set | |
37 | ||
38 | mno-powerpc | |
39 | Target Report RejectNegative | |
40 | Do not use PowerPC instruction set | |
41 | ||
42 | mpowerpc64 | |
43 | Target Report Mask(POWERPC64) | |
44 | Use PowerPC-64 instruction set | |
45 | ||
432218ba DE |
46 | mpowerpc-gpopt |
47 | Target Report Mask(PPC_GPOPT) | |
48 | Use PowerPC General Purpose group optional instructions | |
49 | ||
50 | mpowerpc-gfxopt | |
51 | Target Report Mask(PPC_GFXOPT) | |
52 | Use PowerPC Graphics group optional instructions | |
53 | ||
54 | mmfcrf | |
55 | Target Report Mask(MFCRF) | |
9719f3b7 | 56 | Use PowerPC V2.01 single field mfcr instruction |
432218ba DE |
57 | |
58 | mpopcntb | |
59 | Target Report Mask(POPCNTB) | |
9719f3b7 DE |
60 | Use PowerPC V2.02 popcntb instruction |
61 | ||
62 | mfprnd | |
63 | Target Report Mask(FPRND) | |
64 | Use PowerPC V2.02 floating point rounding instructions | |
432218ba | 65 | |
b639c3c2 JJ |
66 | mcmpb |
67 | Target Report Mask(CMPB) | |
68 | Use PowerPC V2.05 compare bytes instruction | |
69 | ||
44cd321e PS |
70 | mmfpgpr |
71 | Target Report Mask(MFPGPR) | |
72 | Use extended PowerPC V2.05 move floating point to/from GPR instructions | |
73 | ||
78f5898b AH |
74 | maltivec |
75 | Target Report Mask(ALTIVEC) | |
76 | Use AltiVec instructions | |
77 | ||
47d94c1a | 78 | mhard-dfp |
b639c3c2 JJ |
79 | Target Report Mask(DFP) |
80 | Use decimal floating point instructions | |
81 | ||
131aeb82 JM |
82 | mmulhw |
83 | Target Report Mask(MULHW) | |
84 | Use 4xx half-word multiply instructions | |
85 | ||
716019c0 JM |
86 | mdlmzb |
87 | Target Report Mask(DLMZB) | |
88 | Use 4xx string-search dlmzb instruction | |
89 | ||
432218ba DE |
90 | mmultiple |
91 | Target Report Mask(MULTIPLE) | |
92 | Generate load/store multiple instructions | |
93 | ||
94 | mstring | |
95 | Target Report Mask(STRING) | |
96 | Generate string instructions for block moves | |
97 | ||
78f5898b AH |
98 | mnew-mnemonics |
99 | Target Report RejectNegative Mask(NEW_MNEMONICS) | |
100 | Use new mnemonics for PowerPC architecture | |
101 | ||
102 | mold-mnemonics | |
103 | Target Report RejectNegative InverseMask(NEW_MNEMONICS) | |
104 | Use old mnemonics for PowerPC architecture | |
105 | ||
78f5898b AH |
106 | msoft-float |
107 | Target Report RejectNegative Mask(SOFT_FLOAT) | |
108 | Do not use hardware floating point | |
109 | ||
110 | mhard-float | |
111 | Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) | |
112 | Use hardware floating point | |
113 | ||
cacf1ca8 MM |
114 | mpopcntd |
115 | Target Report Mask(POPCNTD) | |
116 | Use PowerPC V2.06 popcntd instruction | |
117 | ||
118 | mvsx | |
119 | Target Report Mask(VSX) | |
120 | Use vector/scalar (VSX) instructions | |
78f5898b AH |
121 | |
122 | mupdate | |
cacf1ca8 | 123 | Target Report Var(TARGET_UPDATE) Init(1) |
78f5898b AH |
124 | Generate load/store with update instructions |
125 | ||
001b9eb6 PH |
126 | mavoid-indexed-addresses |
127 | Target Report Var(TARGET_AVOID_XFORM) Init(-1) | |
128 | Avoid generation of indexed load/store instructions when possible | |
129 | ||
78f5898b | 130 | mfused-madd |
cacf1ca8 | 131 | Target Report Var(TARGET_FUSED_MADD) Init(1) |
78f5898b AH |
132 | Generate fused multiply/add instructions |
133 | ||
9752c4ad AM |
134 | mtls-markers |
135 | Target Report Var(tls_markers) Init(1) | |
136 | Mark __tls_get_addr calls with argument info | |
137 | ||
df4ba119 ILT |
138 | msched-epilog |
139 | Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) | |
140 | ||
78f5898b | 141 | msched-prolog |
df4ba119 | 142 | Target Report Var(TARGET_SCHED_PROLOG) VarExists |
78f5898b AH |
143 | Schedule the start and end of the procedure |
144 | ||
78f5898b | 145 | maix-struct-return |
df01da37 | 146 | Target Report RejectNegative Var(aix_struct_return) |
78f5898b AH |
147 | Return all structures in memory (AIX default) |
148 | ||
149 | msvr4-struct-return | |
df01da37 | 150 | Target Report RejectNegative Var(aix_struct_return,0) VarExists |
78f5898b AH |
151 | Return small structures in registers (SVR4 default) |
152 | ||
432218ba | 153 | mxl-compat |
df01da37 | 154 | Target Report Var(TARGET_XL_COMPAT) |
432218ba | 155 | Conform more closely to IBM XLC semantics |
78f5898b | 156 | |
9c78b944 DE |
157 | mrecip |
158 | Target Report Var(TARGET_RECIP) | |
159 | Generate software reciprocal sqrt for better throughput | |
ef765ea9 | 160 | |
432218ba | 161 | mno-fp-in-toc |
d2894ab5 | 162 | Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) |
432218ba | 163 | Do not place floating point constants in TOC |
78f5898b | 164 | |
432218ba | 165 | mfp-in-toc |
95dc56a4 | 166 | Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) |
432218ba DE |
167 | Place floating point constants in TOC |
168 | ||
169 | mno-sum-in-toc | |
d2894ab5 | 170 | Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) |
432218ba DE |
171 | Do not place symbol+offset constants in TOC |
172 | ||
173 | msum-in-toc | |
d2894ab5 | 174 | Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists |
432218ba DE |
175 | Place symbol+offset constants in TOC |
176 | ||
177 | ; Output only one TOC entry per module. Normally linking fails if | |
178 | ; there are more than 16K unique variables/constants in an executable. With | |
179 | ; this option, linking fails only if there are more than 16K modules, or | |
180 | ; if there are more than 16K unique variables/constant in a single module. | |
181 | ; | |
182 | ; This is at the cost of having 2 extra loads and one extra store per | |
183 | ; function, and one less allocable register. | |
184 | mminimal-toc | |
185 | Target Report Mask(MINIMAL_TOC) | |
186 | Use only one TOC entry per procedure | |
78f5898b AH |
187 | |
188 | mfull-toc | |
189 | Target Report | |
190 | Put everything in the regular TOC | |
191 | ||
192 | mvrsave | |
193 | Target Report Var(TARGET_ALTIVEC_VRSAVE) | |
194 | Generate VRSAVE instructions when generating AltiVec code | |
195 | ||
196 | mvrsave= | |
197 | Target RejectNegative Joined | |
c85ce869 | 198 | -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead |
78f5898b AH |
199 | |
200 | misel | |
cacf1ca8 | 201 | Target Report Mask(ISEL) |
78f5898b AH |
202 | Generate isel instructions |
203 | ||
204 | misel= | |
205 | Target RejectNegative Joined | |
206 | -misel=yes/no Deprecated option. Use -misel/-mno-isel instead | |
207 | ||
208 | mspe | |
94f4765c | 209 | Target |
78f5898b AH |
210 | Generate SPE SIMD instructions on E500 |
211 | ||
96038623 DE |
212 | mpaired |
213 | Target Var(rs6000_paired_float) | |
214 | Generate PPC750CL paired-single instructions | |
215 | ||
78f5898b AH |
216 | mspe= |
217 | Target RejectNegative Joined | |
218 | -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead | |
219 | ||
220 | mdebug= | |
221 | Target RejectNegative Joined | |
222 | -mdebug= Enable debug output | |
223 | ||
224 | mabi= | |
225 | Target RejectNegative Joined | |
226 | -mabi= Specify ABI to use | |
227 | ||
228 | mcpu= | |
229 | Target RejectNegative Joined | |
230 | -mcpu= Use features of and schedule code for given CPU | |
231 | ||
232 | mtune= | |
233 | Target RejectNegative Joined | |
234 | -mtune= Schedule code for given CPU | |
235 | ||
236 | mtraceback= | |
237 | Target RejectNegative Joined | |
238 | -mtraceback= Select full, part, or no traceback table | |
239 | ||
240 | mlongcall | |
241 | Target Report Var(rs6000_default_long_calls) | |
242 | Avoid all range limits on call instructions | |
243 | ||
c921bad8 AP |
244 | mgen-cell-microcode |
245 | Target Report Var(rs6000_gen_cell_microcode) Init(-1) | |
246 | Generate Cell microcode | |
247 | ||
248 | mwarn-cell-microcode | |
249 | Target Var(rs6000_warn_cell_microcode) Init(0) Warning | |
13233302 | 250 | Warn when a Cell microcoded instruction is emitted |
c921bad8 | 251 | |
78f5898b AH |
252 | mwarn-altivec-long |
253 | Target Var(rs6000_warn_altivec_long) Init(1) | |
254 | Warn about deprecated 'vector long ...' AltiVec type usage | |
255 | ||
256 | mfloat-gprs= | |
257 | Target RejectNegative Joined | |
c85ce869 | 258 | -mfloat-gprs= Select GPR floating point method |
78f5898b AH |
259 | |
260 | mlong-double- | |
261 | Target RejectNegative Joined UInteger | |
262 | -mlong-double-<n> Specify size of long double (64 or 128 bits) | |
263 | ||
264 | msched-costly-dep= | |
265 | Target RejectNegative Joined | |
266 | Determine which dependences between insns are considered costly | |
267 | ||
268 | minsert-sched-nops= | |
269 | Target RejectNegative Joined | |
270 | Specify which post scheduling nop insertion scheme to apply | |
271 | ||
272 | malign- | |
273 | Target RejectNegative Joined | |
274 | Specify alignment of structure fields default/natural | |
275 | ||
276 | mprioritize-restricted-insns= | |
2f828272 | 277 | Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) |
78f5898b | 278 | Specify scheduling priority for dispatch slot restricted insns |
696e45ba ME |
279 | |
280 | msingle-float | |
281 | Target RejectNegative Var(rs6000_single_float) | |
282 | Single-precision floating point unit | |
283 | ||
284 | mdouble-float | |
285 | Target RejectNegative Var(rs6000_double_float) | |
286 | Double-precision floating point unit | |
287 | ||
288 | msimple-fpu | |
289 | Target RejectNegative Var(rs6000_simple_fpu) | |
290 | Floating point unit does not support divide & sqrt | |
4849e836 DE |
291 | |
292 | mfpu= | |
293 | Target RejectNegative Joined | |
294 | -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu) | |
295 | ||
296 | mxilinx-fpu | |
297 | Target Var(rs6000_xilinx_fpu) | |
298 | Specify Xilinx FPU. | |
299 | ||
300 |