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24833e1a | 1 | ; Command line options for the Renesas RX port of GCC. |
f1717362 | 2 | ; Copyright (C) 2008-2016 Free Software Foundation, Inc. |
24833e1a | 3 | ; Contributed by Red Hat. |
4 | ; | |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
9 | ; Software Foundation; either version 3, or (at your option) any later | |
10 | ; version. | |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | ; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | ; for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
18 | ; along with GCC; see the file COPYING3. If not see | |
19 | ; <http://www.gnu.org/licenses/>. | |
20 | ;--------------------------------------------------- | |
21 | ||
8cb00d70 | 22 | HeaderInclude |
23 | config/rx/rx-opts.h | |
24 | ||
98cb9b5b | 25 | ; The default is -fpu -m32bit-doubles. |
67e66e16 | 26 | |
24833e1a | 27 | m64bit-doubles |
98cb9b5b | 28 | Target RejectNegative Mask(64BIT_DOUBLES) Report |
29 | Store doubles in 64 bits. | |
24833e1a | 30 | |
98cb9b5b | 31 | m32bit-doubles |
32 | Target RejectNegative InverseMask(64BIT_DOUBLES) Report | |
33 | Stores doubles in 32 bits. This is the default. | |
67e66e16 | 34 | |
35 | nofpu | |
2c2747c3 | 36 | Target RejectNegative Alias(mnofpu) |
98cb9b5b | 37 | Disable the use of RX FPU instructions. |
38 | ||
39 | mnofpu | |
2c2747c3 | 40 | Target RejectNegative Mask(NO_USE_FPU) Report Undocumented |
98cb9b5b | 41 | |
42 | fpu | |
43 | Target RejectNegative InverseMask(NO_USE_FPU) Report | |
44 | Enable the use of RX FPU instructions. This is the default. | |
67e66e16 | 45 | |
46 | ;--------------------------------------------------- | |
47 | ||
48 | mcpu= | |
8cb00d70 | 49 | Target RejectNegative Joined Var(rx_cpu_type) Report ToLower Enum(rx_cpu_types) Init(RX600) |
67e66e16 | 50 | Specify the target RX cpu type. |
51 | ||
8cb00d70 | 52 | Enum |
53 | Name(rx_cpu_types) Type(enum rx_cpu_types) | |
54 | ||
55 | EnumValue | |
8f139ed9 | 56 | Enum(rx_cpu_types) String(rx610) Value(RX610) |
8cb00d70 | 57 | |
58 | EnumValue | |
8f139ed9 | 59 | Enum(rx_cpu_types) String(rx200) Value(RX200) |
8cb00d70 | 60 | |
61 | EnumValue | |
8f139ed9 | 62 | Enum(rx_cpu_types) String(rx600) Value(RX600) |
8cb00d70 | 63 | |
f0964309 | 64 | EnumValue |
65 | Enum(rx_cpu_types) String(rx100) Value(RX100) | |
66 | ||
24833e1a | 67 | ;--------------------------------------------------- |
68 | ||
69 | mbig-endian-data | |
98cb9b5b | 70 | Target RejectNegative Mask(BIG_ENDIAN_DATA) Report |
24833e1a | 71 | Data is stored in big-endian format. |
72 | ||
73 | mlittle-endian-data | |
98cb9b5b | 74 | Target RejectNegative InverseMask(BIG_ENDIAN_DATA) Report |
24833e1a | 75 | Data is stored in little-endian format. (Default). |
76 | ||
77 | ;--------------------------------------------------- | |
78 | ||
79 | msmall-data-limit= | |
80 | Target RejectNegative Joined UInteger Var(rx_small_data_limit) Init(0) | |
81 | Maximum size of global and static variables which can be placed into the small data area. | |
82 | ||
83 | ;--------------------------------------------------- | |
84 | ||
85 | msim | |
86 | Target | |
87 | Use the simulator runtime. | |
88 | ||
89 | ;--------------------------------------------------- | |
90 | ||
91 | mas100-syntax | |
98cb9b5b | 92 | Target Mask(AS100_SYNTAX) Report |
9d75589a | 93 | Generate assembler output that is compatible with the Renesas AS100 assembler. This may restrict some of the compiler's capabilities. The default is to generate GAS compatible syntax. |
24833e1a | 94 | |
95 | ;--------------------------------------------------- | |
96 | ||
97 | mrelax | |
98 | Target | |
99 | Enable linker relaxation. | |
100 | ||
101 | ;--------------------------------------------------- | |
102 | ||
103 | mmax-constant-size= | |
104 | Target RejectNegative Joined UInteger Var(rx_max_constant_size) Init(0) | |
105 | Maximum size in bytes of constant values allowed as operands. | |
106 | ||
107 | ;--------------------------------------------------- | |
108 | ||
109 | mint-register= | |
8cb00d70 | 110 | Target RejectNegative Joined UInteger Var(rx_deferred_options) Defer |
24833e1a | 111 | Specifies the number of registers to reserve for interrupt handlers. |
67e66e16 | 112 | |
113 | ;--------------------------------------------------- | |
114 | ||
115 | msave-acc-in-interrupts | |
116 | Target Mask(SAVE_ACC_REGISTER) | |
117 | Specifies whether interrupt functions should save and restore the accumulator register. | |
6e507301 | 118 | |
119 | ;--------------------------------------------------- | |
120 | ||
121 | mpid | |
122 | Target Mask(PID) | |
123 | Enables Position-Independent-Data (PID) mode. | |
6a47b360 | 124 | |
125 | ;--------------------------------------------------- | |
126 | ||
127 | mwarn-multiple-fast-interrupts | |
128 | Target Report Var(rx_warn_multiple_fast_interrupts) Init(1) Warning | |
129 | Warn when multiple, different, fast interrupt handlers are in the compilation unit. | |
ee1401ac | 130 | |
6202f892 | 131 | ;--------------------------------------------------- |
132 | ||
ee1401ac | 133 | mgcc-abi |
134 | Target RejectNegative Report Mask(GCC_ABI) | |
135 | Enable the use of the old, broken, ABI where all stacked function arguments are aligned to 32-bits. | |
136 | ||
137 | mrx-abi | |
138 | Target RejectNegative Report InverseMask(GCC_ABI) | |
139 | Enable the use the standard RX ABI where all stacked function arguments are naturally aligned. This is the default. | |
f0964309 | 140 | |
6202f892 | 141 | ;--------------------------------------------------- |
142 | ||
f0964309 | 143 | mlra |
144 | Target Report Mask(ENABLE_LRA) | |
145 | Enable the use of the LRA register allocator. | |
6202f892 | 146 | |
147 | ;--------------------------------------------------- | |
148 | ||
149 | mallow-string-insns | |
150 | Target Report Var(rx_allow_string_insns) Init(1) | |
151 | Enables or disables the use of the SMOVF, SMOVB, SMOVU, SUNTIL, SWHILE and RMPA instructions. Enabled by default. | |
8b95d2d2 | 152 | |
153 | ;--------------------------------------------------- | |
154 | ||
155 | mjsr | |
156 | Target Report Mask(JSR) | |
157 | Always use JSR, never BSR, for calls. |