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9db1d521 HP |
1 | /* Definitions of target machine for GNU compiler, for IBM S/390 |
2 | Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc. | |
3 | Contributed by Hartmut Penner (hpenner@de.ibm.com) and | |
f314b9b1 | 4 | Ulrich Weigand (uweigand@de.ibm.com). |
9db1d521 HP |
5 | This file is part of GNU CC. |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #ifndef _S390_H | |
23 | #define _S390_H | |
24 | ||
25 | #define TARGET_VERSION fprintf (stderr, " (S/390)"); | |
26 | ||
27 | extern int flag_pic; | |
28 | ||
29 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
30 | ||
31 | extern int target_flags; | |
32 | ||
33 | /* Target macros checked at runtime of compiler. */ | |
34 | ||
35 | #define TARGET_HARD_FLOAT (target_flags & 1) | |
36 | #define TARGET_BACKCHAIN (target_flags & 2) | |
37 | #define TARGET_SMALL_EXEC (target_flags & 4) | |
38 | #define TARGET_DEBUG_ARG (target_flags & 8) | |
39 | #define TARGET_64BIT (target_flags & 16) | |
40 | #define TARGET_MVCLE (target_flags & 32) | |
41 | ||
42 | #define TARGET_DEFAULT 0x3 | |
43 | #define TARGET_SOFT_FLOAT (!(target_flags & 1)) | |
44 | ||
45 | /* Macro to define tables used to set the flags. This is a list in braces | |
46 | of pairs in braces, each pair being { "NAME", VALUE } | |
47 | where VALUE is the bits to set or minus the bits to clear. | |
48 | An empty string NAME is used to identify the default VALUE. */ | |
49 | ||
50 | #define TARGET_SWITCHES \ | |
994fe660 UW |
51 | { { "hard-float", 1, N_("Use hardware fp")}, \ |
52 | { "soft-float", -1, N_("Don't use hardware fp")}, \ | |
53 | { "backchain", 2, N_("Set backchain")}, \ | |
54 | { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \ | |
55 | { "small-exec", 4, N_("Use bras for execucable < 64k")}, \ | |
56 | { "no-small-exec",-4, N_("Don't use bras")}, \ | |
57 | { "debug", 8, N_("Additional debug prints")}, \ | |
58 | { "no-debug", -8, N_("Don't print additional debug prints")}, \ | |
59 | { "64", 16, N_("64 bit mode")}, \ | |
60 | { "31", -16, N_("31 bit mode")}, \ | |
61 | { "mvcle", 32, N_("mvcle use")}, \ | |
62 | { "no-mvcle", -32, N_("mvc&ex")}, \ | |
9db1d521 HP |
63 | { "", TARGET_DEFAULT, 0 } } |
64 | ||
65 | /* Define this to change the optimizations performed by default. */ | |
994fe660 | 66 | #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE) |
9db1d521 | 67 | |
70eeb10b UW |
68 | /* Defines for REAL_ARITHMETIC. */ |
69 | #define IEEE_FLOAT 1 | |
70 | #define TARGET_IBM_FLOAT 0 | |
71 | #define TARGET_IEEE_FLOAT 1 | |
72 | ||
9db1d521 HP |
73 | /* The current function count for create unique internal labels. */ |
74 | ||
75 | extern int s390_function_count; | |
76 | ||
77 | /* The amount of space used for outgoing arguments. */ | |
78 | ||
79 | extern int current_function_outgoing_args_size; | |
80 | ||
81 | /* Target machine storage layout. */ | |
82 | ||
83 | /* Define this if most significant bit is lowest numbered in instructions | |
84 | that operate on numbered bit-fields. */ | |
85 | ||
86 | #define BITS_BIG_ENDIAN 1 | |
87 | ||
88 | /* Define this if most significant byte of a word is the lowest numbered. */ | |
89 | ||
90 | #define BYTES_BIG_ENDIAN 1 | |
91 | ||
92 | /* Define this if MS word of a multiword is the lowest numbered. */ | |
93 | ||
94 | #define WORDS_BIG_ENDIAN 1 | |
95 | ||
96 | /* Number of bits in an addressable storage unit. */ | |
97 | ||
98 | #define BITS_PER_UNIT 8 | |
99 | ||
100 | /* Width in bits of a "word", which is the contents of a machine register. */ | |
101 | ||
102 | #define BITS_PER_WORD (TARGET_64BIT ? 64 : 32) | |
f314b9b1 | 103 | #define MAX_BITS_PER_WORD 64 |
9db1d521 HP |
104 | |
105 | /* Width of a word, in units (bytes). */ | |
106 | ||
107 | #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) | |
108 | #define MIN_UNITS_PER_WORD 4 | |
109 | ||
110 | /* Width in bits of a pointer. See also the macro `Pmode' defined below. */ | |
111 | ||
112 | #define POINTER_SIZE (TARGET_64BIT ? 64 : 32) | |
113 | ||
114 | /* A C expression for the size in bits of the type `short' on the | |
115 | target machine. If you don't define this, the default is half a | |
116 | word. (If this would be less than one storage unit, it is | |
117 | rounded up to one unit.) */ | |
118 | #define SHORT_TYPE_SIZE 16 | |
119 | ||
120 | /* A C expression for the size in bits of the type `int' on the | |
121 | target machine. If you don't define this, the default is one | |
122 | word. */ | |
123 | #define INT_TYPE_SIZE 32 | |
124 | ||
125 | /* A C expression for the size in bits of the type `long' on the | |
126 | target machine. If you don't define this, the default is one | |
127 | word. */ | |
128 | #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32) | |
f314b9b1 | 129 | #define MAX_LONG_TYPE_SIZE 64 |
9db1d521 HP |
130 | |
131 | /* A C expression for the size in bits of the type `long long' on the | |
132 | target machine. If you don't define this, the default is two | |
133 | words. */ | |
134 | #define LONG_LONG_TYPE_SIZE 64 | |
135 | ||
136 | /* Right now we only support two floating point formats, the | |
137 | 32 and 64 bit ieee formats. */ | |
138 | ||
139 | #define FLOAT_TYPE_SIZE 32 | |
140 | #define DOUBLE_TYPE_SIZE 64 | |
141 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
142 | ||
143 | /* Define this macro if it is advisable to hold scalars in registers | |
144 | in a wider mode than that declared by the program. In such cases, | |
145 | the value is constrained to be within the bounds of the declared | |
146 | type, but kept valid in the wider mode. The signedness of the | |
147 | extension may differ from that of the type. */ | |
148 | ||
149 | #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ | |
150 | if (INTEGRAL_MODE_P (MODE) && \ | |
151 | GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \ | |
152 | (MODE) = Pmode; \ | |
153 | } | |
154 | ||
155 | /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign | |
156 | extensions applied to char/short functions arguments. Defining | |
157 | PROMOTE_FUNCTION_RETURN does the same for function returns. */ | |
158 | ||
159 | #define PROMOTE_FUNCTION_ARGS | |
160 | #define PROMOTE_FUNCTION_RETURN | |
161 | #define PROMOTE_FOR_CALL_ONLY | |
162 | ||
163 | /* Allocation boundary (in *bits*) for storing pointers in memory. */ | |
164 | ||
165 | #define POINTER_BOUNDARY 32 | |
166 | ||
167 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
168 | ||
169 | #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32) | |
170 | ||
171 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
172 | ||
173 | #define STACK_BOUNDARY 64 | |
174 | ||
175 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
176 | ||
177 | #define FUNCTION_BOUNDARY 32 | |
178 | ||
179 | /* There is no point aligning anything to a rounder boundary than this. */ | |
180 | ||
181 | #define BIGGEST_ALIGNMENT 64 | |
182 | ||
183 | /* Alignment of field after `int : 0' in a structure. */ | |
184 | ||
185 | #define EMPTY_FIELD_BOUNDARY 32 | |
186 | ||
f710504c | 187 | /* Alignment on even addresses for LARL instruction. */ |
9db1d521 HP |
188 | |
189 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN) | |
190 | ||
191 | #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN) | |
192 | ||
193 | /* Define this if move instructions will actually fail to work when given | |
194 | unaligned data. */ | |
195 | ||
196 | #define STRICT_ALIGNMENT 0 | |
197 | ||
198 | /* real arithmetic */ | |
199 | ||
200 | #define REAL_ARITHMETIC | |
201 | ||
202 | /* Define target floating point format. */ | |
203 | ||
204 | #undef TARGET_FLOAT_FORMAT | |
205 | #ifdef IEEE_FLOAT | |
206 | #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT | |
207 | #else | |
208 | #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT | |
209 | #endif | |
210 | ||
211 | /* Define if special allocation order desired. */ | |
212 | ||
213 | #define REG_ALLOC_ORDER \ | |
214 | { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \ | |
215 | 16, 17, 18, 19, 20, 21, 22, 23, \ | |
216 | 24, 25, 26, 27, 28, 29, 30, 31, \ | |
217 | 15, 32, 33 } | |
218 | ||
219 | /* Standard register usage. */ | |
220 | ||
994fe660 | 221 | #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 ) |
9db1d521 HP |
222 | #ifdef IEEE_FLOAT |
223 | #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 ) | |
224 | #else | |
225 | #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 ) | |
226 | #endif | |
227 | #define CC_REGNO_P(N) ( (N) == 33 ) | |
228 | ||
229 | /* Number of actual hardware registers. The hardware registers are | |
230 | assigned numbers for the compiler from 0 to just below | |
231 | FIRST_PSEUDO_REGISTER. | |
232 | All registers that the compiler knows about must be given numbers, | |
233 | even those that are not normally considered general registers. | |
234 | For the 390, we give the data registers numbers 0-15, | |
235 | and the floating point registers numbers 16-19. | |
236 | G5 and following have 16 IEEE floating point register, | |
237 | which get numbers 16-31. */ | |
238 | ||
239 | #define FIRST_PSEUDO_REGISTER 34 | |
240 | ||
241 | /* The following register have a fix usage | |
242 | GPR 12: GOT register points to the GOT, setup in prologue, | |
243 | GOT contains pointer to variables in shared libraries | |
244 | GPR 13: Base register setup in prologue to point to the | |
245 | literal table of each function | |
246 | GPR 14: Return registers holds the return address | |
247 | GPR 15: Stack pointer */ | |
248 | ||
249 | #define PIC_OFFSET_TABLE_REGNUM 12 | |
250 | #define BASE_REGISTER 13 | |
251 | #define RETURN_REGNUM 14 | |
252 | #define STACK_POINTER_REGNUM 15 | |
253 | ||
254 | #define FIXED_REGISTERS \ | |
255 | { 0, 0, 0, 0, \ | |
256 | 0, 0, 0, 0, \ | |
257 | 0, 0, 0, 0, \ | |
258 | 0, 1, 1, 1, \ | |
259 | 0, 0, 0, 0, \ | |
260 | 0, 0, 0, 0, \ | |
261 | 0, 0, 0, 0, \ | |
262 | 0, 0, 0, 0, \ | |
263 | 1, 1 } | |
264 | ||
265 | /* 1 for registers not available across function calls. These must include | |
266 | the FIXED_REGISTERS and also any registers that can be used without being | |
267 | saved. | |
268 | The latter must include the registers where values are returned | |
269 | and the register where structure-value addresses are passed. */ | |
270 | ||
271 | #define CALL_USED_REGISTERS \ | |
272 | { 1, 1, 1, 1, \ | |
273 | 1, 1, 0, 0, \ | |
274 | 0, 0, 0, 0, \ | |
275 | 0, 1, 1, 1, \ | |
276 | 1, 1, 0, 0, \ | |
277 | 1, 1, 1, 1, \ | |
278 | 1, 1, 1, 1, \ | |
279 | 1, 1, 1, 1, \ | |
280 | 1, 1 } | |
281 | ||
282 | /* If not pic code, gpr 12 can be used. */ | |
283 | ||
284 | #define CONDITIONAL_REGISTER_USAGE \ | |
285 | do \ | |
286 | { \ | |
287 | if (flag_pic) \ | |
288 | { \ | |
289 | fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
290 | call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ | |
291 | } \ | |
292 | } while (0) | |
293 | ||
294 | /* The following register have a special usage | |
295 | GPR 11: Frame pointer if needed to point to automatic variables. | |
296 | GPR 32: In functions with more the 5 args this register | |
297 | points to that arguments, it is always eliminated | |
298 | with stack- or frame-pointer. | |
299 | GPR 33: Condition code 'register' */ | |
300 | ||
301 | #define FRAME_POINTER_REGNUM 11 | |
302 | ||
303 | #define ARG_POINTER_REGNUM 32 | |
304 | ||
305 | #define CC_REGNUM 33 | |
306 | ||
307 | /* We use the register %r0 to pass the static chain to a nested function. | |
308 | ||
309 | Note: It is assumed that this register is call-clobbered! | |
310 | We can't use any of the function-argument registers either, | |
311 | and register 1 is needed by the trampoline code, so we have | |
312 | no other choice but using this one ... */ | |
313 | ||
314 | #define STATIC_CHAIN_REGNUM 0 | |
315 | ||
316 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
317 | to hold something of mode MODE. | |
318 | This is ordinarily the length in words of a value of mode MODE | |
319 | but can be less for certain modes in special long registers. */ | |
320 | ||
321 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
322 | (FLOAT_REGNO_P(REGNO)? \ | |
323 | (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \ | |
324 | INT_REGNO_P(REGNO)? \ | |
325 | ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \ | |
326 | 1) | |
327 | ||
328 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
329 | The gprs can hold QI, HI, SI, SF, DF, SC and DC. | |
330 | Even gprs can hold DI. | |
331 | The floating point registers can hold DF, SF, DC and SC. */ | |
332 | ||
333 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ | |
334 | (FLOAT_REGNO_P(REGNO)? \ | |
335 | (GET_MODE_CLASS(MODE) == MODE_FLOAT || \ | |
336 | GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \ | |
337 | INT_REGNO_P(REGNO)? \ | |
f314b9b1 | 338 | (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \ |
9db1d521 HP |
339 | CC_REGNO_P(REGNO)? \ |
340 | GET_MODE_CLASS (MODE) == MODE_CC : \ | |
341 | 0) | |
342 | ||
343 | /* Value is 1 if it is a good idea to tie two pseudo registers when one has | |
344 | mode MODE1 and one has mode MODE2. | |
345 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
346 | for any hard reg, then this must be 0 for correct output. */ | |
347 | ||
348 | #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
349 | (((MODE1) == SFmode || (MODE1) == DFmode) \ | |
350 | == ((MODE2) == SFmode || (MODE2) == DFmode)) | |
351 | ||
352 | ||
353 | /* Define this macro if references to a symbol must be treated | |
354 | differently depending on something about the variable or | |
355 | function named by the symbol (such as what section it is in). | |
356 | ||
357 | On s390, if using PIC, mark a SYMBOL_REF for a non-global symbol | |
358 | so that we may access it directly in the GOT. */ | |
359 | ||
360 | #define ENCODE_SECTION_INFO(DECL) \ | |
361 | do \ | |
362 | { \ | |
363 | if (flag_pic) \ | |
364 | { \ | |
365 | rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ | |
366 | ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ | |
367 | \ | |
368 | if (GET_CODE (rtl) == MEM) \ | |
369 | { \ | |
370 | SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ | |
371 | = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ | |
372 | || ! TREE_PUBLIC (DECL)); \ | |
373 | } \ | |
374 | } \ | |
375 | } \ | |
376 | while (0) | |
377 | ||
378 | ||
379 | /* This is an array of structures. Each structure initializes one pair | |
380 | of eliminable registers. The "from" register number is given first, | |
381 | followed by "to". Eliminations of the same "from" register are listed | |
382 | in order of preference. */ | |
383 | ||
384 | #define ELIMINABLE_REGS \ | |
385 | {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
386 | { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
387 | { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}} | |
388 | ||
389 | #define CAN_ELIMINATE(FROM, TO) (1) | |
390 | ||
391 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
392 | { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
393 | { (OFFSET) = 0; } \ | |
394 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ | |
395 | { (OFFSET) = s390_arg_frame_offset (); } \ | |
396 | else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ | |
397 | { (OFFSET) = s390_arg_frame_offset (); } \ | |
b3656137 KG |
398 | else \ |
399 | abort(); \ | |
9db1d521 HP |
400 | } |
401 | ||
402 | #define CAN_DEBUG_WITHOUT_FP | |
403 | ||
404 | /* Value should be nonzero if functions must have frame pointers. | |
405 | Zero means the frame pointer need not be set up (and parms may be | |
406 | accessed via the stack pointer) in functions that seem suitable. | |
407 | This is computed in `reload', in reload1.c. */ | |
408 | ||
409 | #define FRAME_POINTER_REQUIRED 0 | |
410 | ||
411 | /* Define the classes of registers for register constraints in the | |
412 | machine description. Also define ranges of constants. | |
413 | ||
414 | One of the classes must always be named ALL_REGS and include all hard regs. | |
415 | If there is more than one class, another class must be named NO_REGS | |
416 | and contain no registers. | |
417 | ||
418 | The name GENERAL_REGS must be the name of a class (or an alias for | |
419 | another name such as ALL_REGS). This is the class of registers | |
420 | that is allowed by "g" or "r" in a register constraint. | |
421 | Also, registers outside this class are allocated only when | |
422 | instructions express preferences for them. | |
423 | ||
424 | The classes must be numbered in nondecreasing order; that is, | |
425 | a larger-numbered class must never be contained completely | |
426 | in a smaller-numbered class. | |
427 | ||
428 | For any two classes, it is very desirable that there be another | |
429 | class that represents their union. */ | |
430 | ||
431 | /*#define SMALL_REGISTER_CLASSES 1*/ | |
432 | ||
433 | enum reg_class | |
434 | { | |
435 | NO_REGS, ADDR_REGS, GENERAL_REGS, | |
f314b9b1 | 436 | FP_REGS, ALL_REGS, LIM_REG_CLASSES |
9db1d521 HP |
437 | }; |
438 | ||
439 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
440 | ||
441 | /* Give names of register classes as strings for dump file. */ | |
442 | ||
443 | #define REG_CLASS_NAMES \ | |
f314b9b1 | 444 | { "NO_REGS","ADDR_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" } |
9db1d521 HP |
445 | |
446 | /* Define which registers fit in which classes. This is an initializer for | |
447 | a vector of HARD_REG_SET of length N_REG_CLASSES. | |
448 | G5 and latter have 16 register and support IEEE floating point operations. */ | |
449 | ||
450 | #define REG_CLASS_CONTENTS \ | |
451 | { \ | |
452 | { 0x00000000, 0x00000000 }, /* NO_REGS */ \ | |
453 | { 0x0000fffe, 0x00000001 }, /* ADDR_REGS */ \ | |
454 | { 0x0000ffff, 0x00000001 }, /* GENERAL_REGS */ \ | |
455 | { 0xffff0000, 0x00000000 }, /* FP_REGS */ \ | |
9db1d521 HP |
456 | { 0xffffffff, 0x00000003 }, /* ALL_REGS */ \ |
457 | } | |
458 | ||
459 | ||
460 | /* The same information, inverted: | |
461 | Return the class number of the smallest class containing | |
462 | reg number REGNO. This could be a conditional expression | |
463 | or could index an array. */ | |
464 | ||
465 | #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) | |
466 | ||
467 | extern enum reg_class regclass_map[]; /* smalled class containing REGNO */ | |
468 | ||
469 | /* The class value for index registers, and the one for base regs. */ | |
470 | ||
471 | #define INDEX_REG_CLASS ADDR_REGS | |
472 | #define BASE_REG_CLASS ADDR_REGS | |
473 | ||
474 | /* Get reg_class from a letter such as appears in the machine description. */ | |
475 | ||
476 | #define REG_CLASS_FROM_LETTER(C) \ | |
477 | ((C) == 'a' ? ADDR_REGS : \ | |
478 | (C) == 'd' ? GENERAL_REGS : \ | |
479 | (C) == 'f' ? FP_REGS : NO_REGS) | |
480 | ||
481 | /* The letters I, J, K, L and M in a register constraint string can be used | |
482 | to stand for particular ranges of immediate operands. | |
483 | This macro defines what the ranges are. | |
484 | C is the letter, and VALUE is a constant value. | |
485 | Return 1 if VALUE is in the range specified by C. */ | |
486 | ||
487 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
488 | ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \ | |
489 | (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \ | |
490 | (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \ | |
491 | (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0) | |
492 | ||
493 | /* Similar, but for floating constants, and defining letters G and H. | |
494 | Here VALUE is the CONST_DOUBLE rtx itself. */ | |
495 | ||
496 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 | |
497 | ||
498 | /* 'Q' means a memory-reference for a S-type operand. */ | |
499 | ||
500 | #define EXTRA_CONSTRAINT(OP, C) \ | |
501 | ((C) == 'Q' ? s_operand (OP, GET_MODE (OP)) : \ | |
502 | (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0) | |
503 | ||
504 | /* Given an rtx X being reloaded into a reg required to be in class CLASS, | |
505 | return the class of reg to actually use. In general this is just CLASS; | |
506 | but on some machines in some cases it is preferable to use a more | |
507 | restrictive class. */ | |
508 | ||
509 | #define PREFERRED_RELOAD_CLASS(X, CLASS) \ | |
510 | (GET_CODE (X) == CONST_DOUBLE ? \ | |
511 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\ | |
512 | (GET_CODE (X) == CONST_INT ? \ | |
513 | (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? FP_REGS : ADDR_REGS) :\ | |
514 | GET_CODE (X) == PLUS || \ | |
515 | GET_CODE (X) == LABEL_REF || \ | |
516 | GET_CODE (X) == SYMBOL_REF || \ | |
517 | GET_CODE (X) == CONST ? ADDR_REGS : (CLASS))) | |
518 | ||
519 | /* Return the maximum number of consecutive registers needed to represent | |
520 | mode MODE in a register of class CLASS. */ | |
521 | ||
522 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
523 | ((CLASS) == FP_REGS ? \ | |
524 | (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \ | |
525 | (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
526 | ||
527 | /* If we are copying between FP registers and anything else, we need a memory | |
528 | location. */ | |
529 | ||
530 | #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ | |
531 | ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS)) | |
532 | ||
533 | /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit | |
d65f7478 | 534 | because the movsi and movsf patterns don't handle r/f moves. */ |
9db1d521 HP |
535 | |
536 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
537 | (GET_MODE_BITSIZE (MODE) < 32 \ | |
538 | ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ | |
539 | : MODE) | |
540 | ||
541 | ||
542 | /* A C expression whose value is nonzero if pseudos that have been | |
543 | assigned to registers of class CLASS would likely be spilled | |
544 | because registers of CLASS are needed for spill registers. | |
545 | ||
546 | The default value of this macro returns 1 if CLASS has exactly one | |
547 | register and zero otherwise. On most machines, this default | |
548 | should be used. Only define this macro to some other expression | |
549 | if pseudo allocated by `local-alloc.c' end up in memory because | |
550 | their hard registers were needed for spill registers. If this | |
551 | macro returns nonzero for those classes, those pseudos will only | |
552 | be allocated by `global.c', which knows how to reallocate the | |
553 | pseudo to another register. If there would not be another | |
554 | register available for reallocation, you should not change the | |
555 | definition of this macro since the only effect of such a | |
556 | definition would be to slow down register allocation. */ | |
557 | ||
558 | /* Stack layout; function entry, exit and calling. */ | |
559 | ||
560 | /* The current return address is on Offset 56 of the current frame | |
561 | if we are in an leaf_function. Otherwise we have to go one stack | |
562 | back. | |
563 | The return address of anything farther back is accessed normally | |
564 | at an offset of 56 from the frame pointer. | |
565 | ||
566 | FIXME: builtin_return_addr does not work correctly in a leaf | |
567 | function, we need to find way to find out, if we | |
568 | are in a leaf function | |
569 | */ | |
570 | ||
571 | #define _RETURN_ADDR_OFFSET (TARGET_64BIT ? 112 : 56) | |
572 | ||
573 | #define RETURN_ADDR_RTX(count, frame) \ | |
574 | gen_rtx (MEM, Pmode, \ | |
575 | memory_address (Pmode, \ | |
576 | plus_constant ( \ | |
577 | copy_to_reg (gen_rtx (MEM, Pmode, \ | |
578 | memory_address (Pmode, frame))), \ | |
579 | _RETURN_ADDR_OFFSET))); | |
580 | ||
581 | /* The following macros will turn on dwarf2 exception hndling | |
582 | Other code location for this exception handling are | |
583 | in s390.md (eh_return insn) and in linux.c in the prologue. */ | |
584 | ||
585 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM) | |
586 | ||
587 | /* We have 31 bit mode. */ | |
588 | ||
589 | #define MASK_RETURN_ADDR (GEN_INT (0x7fffffff)) | |
590 | ||
591 | /* Location, from where return address to load. */ | |
592 | ||
593 | #define DWARF_FRAME_RETURN_COLUMN 14 | |
594 | ||
595 | /* Describe how we implement __builtin_eh_return. */ | |
596 | #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM) | |
597 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10) | |
598 | #define EH_RETURN_HANDLER_RTX \ | |
f314b9b1 UW |
599 | gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \ |
600 | TARGET_64BIT? -48 : -40)) | |
9db1d521 HP |
601 | |
602 | /* Define this if pushing a word on the stack makes the stack pointer a | |
603 | smaller address. */ | |
604 | ||
605 | #define STACK_GROWS_DOWNWARD | |
606 | ||
607 | /* Define this if the nominal address of the stack frame is at the | |
608 | high-address end of the local variables; that is, each additional local | |
609 | variable allocated goes at a more negative offset in the frame. */ | |
610 | ||
611 | /* #define FRAME_GROWS_DOWNWARD */ | |
612 | ||
613 | /* Offset from stack-pointer to first location of outgoing args. */ | |
614 | ||
615 | #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96) | |
616 | ||
617 | /* Offset within stack frame to start allocating local variables at. | |
618 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
619 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
620 | of the first local allocated. */ | |
621 | ||
622 | #define STARTING_FRAME_OFFSET \ | |
623 | (STACK_POINTER_OFFSET + current_function_outgoing_args_size) | |
624 | ||
625 | #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0 | |
626 | ||
627 | /* If we generate an insn to push BYTES bytes, this says how many the stack | |
628 | pointer really advances by. On S/390, we have no push instruction. */ | |
629 | ||
630 | /* #define PUSH_ROUNDING(BYTES) */ | |
631 | ||
632 | /* Accumulate the outgoing argument count so we can request the right | |
633 | DSA size and determine stack offset. */ | |
634 | ||
635 | #define ACCUMULATE_OUTGOING_ARGS 1 | |
636 | ||
637 | /* Offset from the stack pointer register to an item dynamically | |
638 | allocated on the stack, e.g., by `alloca'. | |
639 | ||
640 | The default value for this macro is `STACK_POINTER_OFFSET' plus the | |
641 | length of the outgoing arguments. The default is correct for most | |
642 | machines. See `function.c' for details. */ | |
643 | #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET) | |
644 | ||
645 | /* Offset of first parameter from the argument pointer register value. | |
646 | On the S/390, we define the argument pointer to the start of the fixed | |
647 | area. */ | |
648 | #define FIRST_PARM_OFFSET(FNDECL) 0 | |
649 | ||
650 | /* Define this if stack space is still allocated for a parameter passed | |
651 | in a register. The value is the number of bytes allocated to this | |
652 | area. */ | |
653 | /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */ | |
654 | ||
655 | /* Define this if the above stack space is to be considered part of the | |
656 | space allocated by the caller. */ | |
657 | /* #define OUTGOING_REG_PARM_STACK_SPACE */ | |
658 | ||
659 | /* 1 if N is a possible register number for function argument passing. | |
660 | On S390, general registers 2 - 6 and floating point register 0 and 2 | |
661 | are used in this way. */ | |
662 | ||
663 | #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \ | |
664 | (N) == 16 || (N) == 17) | |
665 | ||
666 | /* Define a data type for recording info about an argument list during | |
667 | the scan of that argument list. This data type should hold all | |
668 | necessary information about the function itself and about the args | |
669 | processed so far, enough to enable macros such as FUNCTION_ARG to | |
670 | determine where the next arg should go. */ | |
671 | ||
672 | typedef struct s390_arg_structure | |
673 | { | |
674 | int gprs; /* gpr so far */ | |
675 | int fprs; /* fpr so far */ | |
676 | } | |
677 | CUMULATIVE_ARGS; | |
678 | ||
679 | ||
680 | /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to | |
681 | a function whose data type is FNTYPE. | |
682 | For a library call, FNTYPE is 0. */ | |
683 | ||
684 | #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \ | |
685 | ((CUM).gprs=0, (CUM).fprs=0) | |
686 | ||
687 | /* Update the data in CUM to advance over an argument of mode MODE and | |
688 | data type TYPE. (TYPE is null for libcalls where that information | |
689 | may not be available.) */ | |
690 | ||
691 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
994fe660 | 692 | s390_function_arg_advance (&CUM, MODE, TYPE, NAMED) |
9db1d521 HP |
693 | |
694 | /* Define where to put the arguments to a function. Value is zero to push | |
695 | the argument on the stack, or a hard register in which to store the | |
696 | argument. */ | |
697 | ||
698 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
994fe660 | 699 | s390_function_arg (&CUM, MODE, TYPE, NAMED) |
9db1d521 HP |
700 | |
701 | /* Define where to expect the arguments of a function. Value is zero, if | |
702 | the argument is on the stack, or a hard register in which the argument | |
703 | is stored. It is the same like FUNCTION_ARG, except for unnamed args | |
704 | That means, that all in case of varargs used, the arguments are expected | |
705 | from the stack. | |
706 | S/390 has already space on the stack for args coming in registers, | |
707 | they are pushed in prologue, if needed. */ | |
708 | ||
709 | ||
710 | /* Define the `__builtin_va_list' type. */ | |
711 | ||
712 | #define BUILD_VA_LIST_TYPE(VALIST) \ | |
713 | (VALIST) = s390_build_va_list () | |
714 | ||
715 | /* Implement `va_start' for varargs and stdarg. */ | |
716 | ||
717 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
718 | s390_va_start (stdarg, valist, nextarg) | |
719 | ||
720 | /* Implement `va_arg'. */ | |
721 | ||
722 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
723 | s390_va_arg (valist, type) | |
724 | ||
725 | /* For an arg passed partly in registers and partly in memory, this is the | |
726 | number of registers used. For args passed entirely in registers or | |
727 | entirely in memory, zero. */ | |
728 | ||
729 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 | |
730 | ||
731 | ||
732 | /* Define if returning from a function call automatically pops the | |
733 | arguments described by the number-of-args field in the call. */ | |
734 | ||
735 | #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 | |
736 | ||
737 | ||
738 | /* Define how to find the value returned by a function. VALTYPE is the | |
739 | data type of the value (as a tree). | |
740 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
741 | otherwise, FUNC is 15. */ | |
742 | ||
743 | #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \ | |
744 | || TARGET_SOFT_FLOAT ) ? 2 : 16) | |
745 | ||
746 | ||
747 | /* for structs the address is passed, and the Callee makes a | |
748 | copy, only if needed */ | |
749 | ||
750 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
751 | s390_function_arg_pass_by_reference (MODE, TYPE) | |
752 | ||
753 | ||
754 | /* Register 2 (and 3) for integral values | |
755 | or floating point register 0 (and 2) for fp values are used. */ | |
756 | ||
757 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
758 | gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ | |
759 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ | |
760 | || POINTER_TYPE_P (VALTYPE) \ | |
761 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
762 | TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2) | |
763 | ||
764 | /* Define how to find the value returned by a library function assuming | |
765 | the value has mode MODE. */ | |
766 | ||
767 | #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE)) | |
768 | ||
769 | /* 1 if N is a possible register number for a function value. */ | |
770 | ||
771 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16) | |
772 | ||
773 | /* The definition of this macro implies that there are cases where | |
774 | a scalar value cannot be returned in registers. */ | |
775 | ||
f314b9b1 UW |
776 | #define RETURN_IN_MEMORY(type) \ |
777 | (TYPE_MODE (type) == BLKmode || \ | |
778 | GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \ | |
779 | GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT) | |
9db1d521 HP |
780 | |
781 | /* Mode of stack savearea. | |
782 | FUNCTION is VOIDmode because calling convention maintains SP. | |
783 | BLOCK needs Pmode for SP. | |
784 | NONLOCAL needs twice Pmode to maintain both backchain and SP. */ | |
785 | ||
786 | #define STACK_SAVEAREA_MODE(LEVEL) \ | |
787 | (LEVEL == SAVE_FUNCTION ? VOIDmode \ | |
788 | : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode) | |
789 | ||
790 | /* Structure value address is passed as invisible first argument (gpr 2). */ | |
791 | ||
792 | #define STRUCT_VALUE 0 | |
793 | ||
794 | /* This macro definition sets up a default value for `main' to return. */ | |
795 | ||
796 | #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node) | |
797 | ||
798 | /* Length in units of the trampoline for entering a nested function. */ | |
799 | ||
800 | #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20) | |
801 | ||
802 | /* Initialize the dynamic part of trampoline. */ | |
803 | ||
804 | #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \ | |
805 | s390_initialize_trampoline ((ADDR), (FNADDR), (CXT)) | |
806 | ||
807 | /* Template for constant part of trampoline. */ | |
808 | ||
809 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
810 | s390_trampoline_template (FILE) | |
811 | ||
812 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
813 | for profiling a function entry. */ | |
814 | ||
815 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
816 | do { \ | |
817 | extern rtx s390_profile[]; \ | |
994fe660 | 818 | extern int s390_pool_count; \ |
9db1d521 HP |
819 | static char label[128]; \ |
820 | fprintf (FILE, "# function profiler \n"); \ | |
821 | if (TARGET_64BIT) \ | |
822 | { \ | |
823 | rtx tmp[1]; \ | |
824 | output_asm_insn ("stg\t14,8(15)", tmp); \ | |
825 | sprintf (label, "%sP%d", LPREFIX, LABELNO); \ | |
826 | tmp[0] = gen_rtx_SYMBOL_REF (Pmode, label); \ | |
827 | SYMBOL_REF_FLAG (tmp[0]) = 1; \ | |
828 | output_asm_insn ("larl\t1,%0", tmp); \ | |
829 | tmp[0] = gen_rtx_SYMBOL_REF (Pmode, "_mcount"); \ | |
830 | if (flag_pic) \ | |
831 | { \ | |
832 | tmp[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, tmp[0]), 113); \ | |
833 | tmp[0] = gen_rtx_CONST (Pmode, tmp[0]); \ | |
834 | } \ | |
835 | output_asm_insn ("brasl\t14,%0", tmp); \ | |
836 | output_asm_insn ("lg\t14,8(15)", tmp); \ | |
837 | } \ | |
838 | else \ | |
839 | { \ | |
840 | output_asm_insn ("l 14,4(15)", s390_profile); \ | |
841 | s390_pool_count = 0; \ | |
842 | output_asm_insn ("st 14,4(15)", s390_profile); \ | |
843 | output_asm_insn ("l 14,%4", s390_profile); \ | |
844 | output_asm_insn ("l 1,%9", s390_profile); \ | |
845 | if (flag_pic) \ | |
846 | { \ | |
847 | output_asm_insn ("ar 1,13", s390_profile); \ | |
848 | output_asm_insn ("bas 14,0(14,13)", s390_profile); \ | |
849 | } \ | |
850 | else \ | |
851 | { \ | |
852 | output_asm_insn ("basr 14,14", s390_profile); \ | |
853 | } \ | |
854 | output_asm_insn ("l 14,4(15)", s390_profile); \ | |
855 | } \ | |
856 | } while (0) | |
857 | ||
858 | /* #define PROFILE_BEFORE_PROLOGUE */ | |
859 | ||
9db1d521 HP |
860 | /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack |
861 | pointer does not matter (provided there is a frame pointer). */ | |
862 | ||
863 | #define EXIT_IGNORE_STACK 1 | |
864 | ||
865 | /* Addressing modes, and classification of registers for them. */ | |
866 | ||
867 | /* #define HAVE_POST_INCREMENT */ | |
868 | /* #define HAVE_POST_DECREMENT */ | |
869 | ||
870 | /* #define HAVE_PRE_DECREMENT */ | |
871 | /* #define HAVE_PRE_INCREMENT */ | |
872 | ||
873 | /* These assume that REGNO is a hard or pseudo reg number. They give | |
874 | nonzero only if REGNO is a hard reg of the suitable class or a pseudo | |
875 | reg currently allocated to a suitable hard reg. | |
876 | These definitions are NOT overridden anywhere. */ | |
877 | ||
878 | #define REGNO_OK_FOR_INDEX_P(REGNO) \ | |
879 | (((REGNO) > 0 && (REGNO) < 16) || (REGNO) == ARG_POINTER_REGNUM \ | |
880 | /* || (REGNO) == FRAME_POINTER_REGNUM */ \ | |
881 | || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16)) | |
882 | ||
883 | #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) | |
884 | ||
885 | #define REGNO_OK_FOR_DATA_P(REGNO) \ | |
886 | ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16) | |
887 | ||
888 | #define REGNO_OK_FOR_FP_P(REGNO) \ | |
994fe660 | 889 | FLOAT_REGNO_P (REGNO) |
9db1d521 HP |
890 | |
891 | /* Now macros that check whether X is a register and also, | |
892 | strictly, whether it is in a specified class. */ | |
893 | ||
894 | /* 1 if X is a data register. */ | |
895 | ||
896 | #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X))) | |
897 | ||
898 | /* 1 if X is an fp register. */ | |
899 | ||
900 | #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X))) | |
901 | ||
902 | /* 1 if X is an address register. */ | |
903 | ||
904 | #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X))) | |
905 | ||
906 | /* Maximum number of registers that can appear in a valid memory address. */ | |
907 | ||
908 | #define MAX_REGS_PER_ADDRESS 2 | |
909 | ||
910 | /* Recognize any constant value that is a valid address. */ | |
911 | ||
912 | #define CONSTANT_ADDRESS_P(X) 0 | |
913 | ||
914 | #define SYMBOLIC_CONST(X) \ | |
915 | (GET_CODE (X) == SYMBOL_REF \ | |
916 | || GET_CODE (X) == LABEL_REF \ | |
917 | || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) | |
918 | ||
919 | /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE | |
920 | they have to be forced to constant pool | |
921 | CONST_INT have to be forced into constant pool, if greater than | |
922 | 64k. Depending on the insn they have to be force into constant pool | |
923 | for smaller value; in this case we have to work with nonimmediate operand. */ | |
924 | ||
925 | #define LEGITIMATE_PIC_OPERAND_P(X) \ | |
926 | legitimate_pic_operand_p (X) | |
927 | ||
928 | /* Nonzero if the constant value X is a legitimate general operand. | |
929 | It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ | |
930 | ||
931 | #define LEGITIMATE_CONSTANT_P(X) \ | |
932 | legitimate_constant_p (X) | |
933 | ||
934 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check | |
935 | its validity for a certain class. We have two alternate definitions | |
936 | for each of them. The usual definition accepts all pseudo regs; the | |
937 | other rejects them all. The symbol REG_OK_STRICT causes the latter | |
938 | definition to be used. | |
939 | ||
940 | Most source files want to accept pseudo regs in the hope that they will | |
941 | get allocated to the class that the insn wants them to be in. | |
942 | Some source files that are used after register allocation | |
943 | need to be strict. */ | |
944 | ||
945 | /* | |
946 | * Nonzero if X is a hard reg that can be used as an index or if it is | |
947 | * a pseudo reg. | |
948 | */ | |
949 | ||
950 | #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ | |
951 | ((GET_MODE (X) == Pmode) && \ | |
952 | ((REGNO (X) > 0 && REGNO (X) < 16) || \ | |
953 | (REGNO (X) == ARG_POINTER_REGNUM) || \ | |
954 | (REGNO (X) >= FIRST_PSEUDO_REGISTER))) | |
955 | ||
956 | /* Nonzero if X is a hard reg that can be used as a base reg or if it is | |
957 | a pseudo reg. */ | |
958 | ||
959 | #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) | |
960 | ||
961 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
962 | ||
963 | #define REG_OK_FOR_INDEX_STRICT_P(X) \ | |
964 | ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X)))) | |
965 | ||
966 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
967 | ||
968 | #define REG_OK_FOR_BASE_STRICT_P(X) \ | |
969 | ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X)))) | |
970 | ||
971 | ||
972 | #ifndef REG_OK_STRICT | |
973 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X) | |
974 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X) | |
975 | #else | |
976 | #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X) | |
977 | #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X) | |
978 | #endif | |
979 | ||
980 | ||
981 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a | |
982 | valid memory address for an instruction. | |
983 | The MODE argument is the machine mode for the MEM expression | |
984 | that wants to use this address. | |
985 | ||
986 | The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, | |
987 | except for CONSTANT_ADDRESS_P which is actually machine-independent. */ | |
988 | ||
989 | #ifdef REG_OK_STRICT | |
990 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
991 | { \ | |
992 | if (legitimate_address_p (MODE, X, 1)) \ | |
993 | goto ADDR; \ | |
994 | } | |
995 | #else | |
996 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
997 | { \ | |
998 | if (legitimate_address_p (MODE, X, 0)) \ | |
999 | goto ADDR; \ | |
1000 | } | |
1001 | #endif | |
1002 | ||
1003 | ||
1004 | /* S/390 has no mode dependent addresses. */ | |
1005 | ||
1006 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) | |
1007 | ||
1008 | /* Try machine-dependent ways of modifying an illegitimate address | |
1009 | to be legitimate. If we find one, return the new, valid address. | |
1010 | This macro is used in only one place: `memory_address' in explow.c. */ | |
1011 | ||
1012 | #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ | |
1013 | { \ | |
1014 | (X) = legitimize_address (X, OLDX, MODE); \ | |
1015 | if (memory_address_p (MODE, X)) \ | |
1016 | goto WIN; \ | |
1017 | } | |
1018 | ||
1019 | /* Specify the machine mode that this machine uses for the index in the | |
1020 | tablejump instruction. */ | |
1021 | ||
1022 | #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode) | |
1023 | ||
1024 | /* Define this if the tablejump instruction expects the table to contain | |
1025 | offsets from the address of the table. | |
1026 | Do not define this if the table should contain absolute addresses. */ | |
1027 | ||
1028 | /* #define CASE_VECTOR_PC_RELATIVE */ | |
1029 | ||
1030 | /* Load from integral MODE < SI from memory into register makes sign_extend | |
1031 | or zero_extend | |
1032 | In our case sign_extension happens for Halfwords, other no extension. */ | |
1033 | ||
1034 | #define LOAD_EXTEND_OP(MODE) \ | |
1035 | (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \ | |
1036 | (MODE) == HImode ? SIGN_EXTEND : NIL) \ | |
1037 | : ((MODE) == HImode ? SIGN_EXTEND : NIL)) | |
1038 | ||
1039 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1040 | ||
1041 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1042 | ||
1043 | /* Define this if fixuns_trunc is the same as fix_trunc. */ | |
1044 | ||
1045 | /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */ | |
1046 | ||
1047 | /* We use "unsigned char" as default. */ | |
1048 | ||
1049 | #define DEFAULT_SIGNED_CHAR 0 | |
1050 | ||
1051 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1052 | ||
1053 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1054 | ||
1055 | /* Max number of bytes we can move from memory to memory in one reasonably | |
1056 | fast instruction. */ | |
1057 | ||
1058 | #define MOVE_MAX 256 | |
1059 | ||
1060 | /* Define this if zero-extension is slow (more than one real instruction). */ | |
1061 | ||
1062 | #define SLOW_ZERO_EXTEND | |
1063 | ||
1064 | /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
1065 | ||
1066 | #define SLOW_BYTE_ACCESS 1 | |
1067 | ||
1068 | /* Define if shifts truncate the shift count which implies one can omit | |
1069 | a sign-extension or zero-extension of a shift count. */ | |
1070 | ||
1071 | /* #define SHIFT_COUNT_TRUNCATED */ | |
1072 | ||
1073 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
1074 | is done just by pretending it is already truncated. */ | |
1075 | ||
1076 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1077 | ||
1078 | /* We assume that the store-condition-codes instructions store 0 for false | |
1079 | and some other value for true. This is the value stored for true. */ | |
1080 | ||
1081 | /* #define STORE_FLAG_VALUE -1 */ | |
1082 | ||
1083 | /* When a prototype says `char' or `short', really pass an `int'. */ | |
1084 | ||
1085 | #define PROMOTE_PROTOTYPES 1 | |
1086 | ||
1087 | /* Don't perform CSE on function addresses. */ | |
1088 | ||
1089 | #define NO_FUNCTION_CSE | |
1090 | ||
1091 | /* Specify the machine mode that pointers have. | |
1092 | After generation of rtl, the compiler makes no further distinction | |
1093 | between pointers and any other objects of this machine mode. */ | |
1094 | ||
994fe660 | 1095 | #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode)) |
9db1d521 HP |
1096 | |
1097 | /* A function address in a call instruction is a byte address (for | |
1098 | indexing purposes) so give the MEM rtx a byte's mode. */ | |
1099 | ||
1100 | #define FUNCTION_MODE QImode | |
1101 | ||
1102 | ||
1103 | /* A part of a C `switch' statement that describes the relative costs | |
1104 | of constant RTL expressions. It must contain `case' labels for | |
1105 | expression codes `const_int', `const', `symbol_ref', `label_ref' | |
1106 | and `const_double'. Each case must ultimately reach a `return' | |
1107 | statement to return the relative cost of the use of that kind of | |
1108 | constant value in an expression. The cost may depend on the | |
1109 | precise value of the constant, which is available for examination | |
1110 | in X, and the rtx code of the expression in which it is contained, | |
1111 | found in OUTER_CODE. | |
1112 | ||
1113 | CODE is the expression code--redundant, since it can be obtained | |
1114 | with `GET_CODE (X)'. */ | |
1115 | /* Force_const_mem does not work out of reload, because the saveable_obstack | |
1116 | is set to reload_obstack, which does not live long enough. | |
1117 | Because of this we cannot use force_const_mem in addsi3. | |
1118 | This leads to problems with gen_add2_insn with a constant greater | |
d65f7478 | 1119 | than a short. Because of that we give an addition of greater |
9db1d521 HP |
1120 | constants a cost of 3 (reload1.c 10096). */ |
1121 | ||
1122 | ||
1123 | #define CONST_COSTS(RTX, CODE, OUTER_CODE) \ | |
1124 | case CONST: \ | |
1125 | if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \ | |
1126 | (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \ | |
1127 | return 1000; \ | |
1128 | case CONST_INT: \ | |
1129 | if ((OUTER_CODE == PLUS) && \ | |
1130 | ((INTVAL (RTX) > 32767) || \ | |
1131 | (INTVAL (RTX) < -32768))) \ | |
f314b9b1 | 1132 | return COSTS_N_INSNS (3); \ |
9db1d521 HP |
1133 | case LABEL_REF: \ |
1134 | case SYMBOL_REF: \ | |
1135 | case CONST_DOUBLE: \ | |
f314b9b1 | 1136 | return 0; \ |
9db1d521 HP |
1137 | |
1138 | ||
1139 | /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. | |
1140 | This can be used, for example, to indicate how costly a multiply | |
1141 | instruction is. In writing this macro, you can use the construct | |
1142 | `COSTS_N_INSNS (N)' to specify a cost equal to N fast | |
1143 | instructions. OUTER_CODE is the code of the expression in which X | |
1144 | is contained. | |
1145 | ||
1146 | This macro is optional; do not define it if the default cost | |
1147 | assumptions are adequate for the target machine. */ | |
1148 | ||
1149 | #define RTX_COSTS(X, CODE, OUTER_CODE) \ | |
1150 | case ASHIFT: \ | |
1151 | case ASHIFTRT: \ | |
1152 | case LSHIFTRT: \ | |
1153 | case PLUS: \ | |
1154 | case AND: \ | |
1155 | case IOR: \ | |
1156 | case XOR: \ | |
1157 | case MINUS: \ | |
1158 | case NEG: \ | |
1159 | case NOT: \ | |
1160 | return 1; \ | |
1161 | case MULT: \ | |
1162 | if (GET_MODE (XEXP (X, 0)) == DImode) \ | |
1163 | return 40; \ | |
1164 | else \ | |
1165 | return 7; \ | |
1166 | case DIV: \ | |
1167 | case UDIV: \ | |
1168 | case MOD: \ | |
1169 | case UMOD: \ | |
1170 | return 33; | |
1171 | ||
1172 | ||
1173 | /* An expression giving the cost of an addressing mode that contains | |
1174 | ADDRESS. If not defined, the cost is computed from the ADDRESS | |
1175 | expression and the `CONST_COSTS' values. | |
1176 | ||
1177 | For most CISC machines, the default cost is a good approximation | |
1178 | of the true cost of the addressing mode. However, on RISC | |
1179 | machines, all instructions normally have the same length and | |
1180 | execution time. Hence all addresses will have equal costs. | |
1181 | ||
1182 | In cases where more than one form of an address is known, the form | |
1183 | with the lowest cost will be used. If multiple forms have the | |
1184 | same, lowest, cost, the one that is the most complex will be used. | |
1185 | ||
1186 | For example, suppose an address that is equal to the sum of a | |
1187 | register and a constant is used twice in the same basic block. | |
1188 | When this macro is not defined, the address will be computed in a | |
1189 | register and memory references will be indirect through that | |
1190 | register. On machines where the cost of the addressing mode | |
1191 | containing the sum is no higher than that of a simple indirect | |
1192 | reference, this will produce an additional instruction and | |
1193 | possibly require an additional register. Proper specification of | |
1194 | this macro eliminates this overhead for such machines. | |
1195 | ||
1196 | Similar use of this macro is made in strength reduction of loops. | |
1197 | ||
1198 | ADDRESS need not be valid as an address. In such a case, the cost | |
1199 | is not relevant and can be any value; invalid addresses need not be | |
1200 | assigned a different cost. | |
1201 | ||
1202 | On machines where an address involving more than one register is as | |
1203 | cheap as an address computation involving only one register, | |
1204 | defining `ADDRESS_COST' to reflect this can cause two registers to | |
1205 | be live over a region of code where only one would have been if | |
1206 | `ADDRESS_COST' were not defined in that manner. This effect should | |
1207 | be considered in the definition of this macro. Equivalent costs | |
1208 | should probably only be given to addresses with different numbers | |
1209 | of registers on machines with lots of registers. | |
1210 | ||
1211 | This macro will normally either not be defined or be defined as a | |
1212 | constant. | |
1213 | ||
1214 | On s390 symbols are expensive if compiled with fpic | |
1215 | lifetimes. */ | |
1216 | ||
1217 | #define ADDRESS_COST(RTX) \ | |
1218 | ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1) | |
1219 | ||
1220 | /* On s390, copy between fprs and gprs is expensive. */ | |
1221 | ||
1222 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ | |
1223 | (((CLASS1 != CLASS2) && \ | |
1224 | (CLASS1 == FP_REGS || CLASS2 == FP_REGS)) ? 10 : 1) | |
1225 | ||
1226 | ||
1227 | /* A C expression for the cost of moving data of mode M between a | |
1228 | register and memory. A value of 2 is the default; this cost is | |
1229 | relative to those in `REGISTER_MOVE_COST'. | |
1230 | ||
1231 | If moving between registers and memory is more expensive than | |
1232 | between two registers, you should define this macro to express the | |
1233 | relative cost. */ | |
1234 | ||
1235 | #define MEMORY_MOVE_COST(M, C, I) 1 | |
1236 | ||
1237 | /* A C expression for the cost of a branch instruction. A value of 1 | |
1238 | is the default; other values are interpreted relative to that. */ | |
1239 | ||
1240 | #define BRANCH_COST 1 | |
1241 | ||
d65f7478 | 1242 | /* Add any extra modes needed to represent the condition code. */ |
9db1d521 HP |
1243 | #define EXTRA_CC_MODES \ |
1244 | CC (CCZmode, "CCZ") \ | |
1245 | CC (CCAmode, "CCA") \ | |
ba956982 | 1246 | CC (CCLmode, "CCL") \ |
9db1d521 HP |
1247 | CC (CCUmode, "CCU") \ |
1248 | CC (CCSmode, "CCS") \ | |
1249 | CC (CCTmode, "CCT") | |
1250 | ||
1251 | /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, | |
d65f7478 | 1252 | return the mode to be used for the comparison. */ |
9db1d521 | 1253 | |
ba956982 | 1254 | #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y)) |
9db1d521 HP |
1255 | |
1256 | ||
1257 | /* Define the information needed to generate branch and scc insns. This is | |
1258 | stored from the compare operation. Note that we can't use "rtx" here | |
1259 | since it hasn't been defined! */ | |
1260 | ||
1261 | extern struct rtx_def *s390_compare_op0, *s390_compare_op1; | |
9db1d521 HP |
1262 | |
1263 | ||
1264 | /* How to refer to registers in assembler output. This sequence is | |
1265 | indexed by compiler's hard-register-number (see above). */ | |
1266 | ||
1267 | #define REGISTER_NAMES \ | |
1268 | { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \ | |
1269 | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \ | |
1270 | "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \ | |
1271 | "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \ | |
1272 | "%ap", "%cc" \ | |
1273 | } | |
1274 | ||
1275 | /* implicit call of memcpy, not bcopy */ | |
1276 | ||
1277 | #define TARGET_MEM_FUNCTIONS | |
1278 | ||
1279 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1280 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1281 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1282 | ||
1283 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1284 | ||
1285 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
1286 | ||
1287 | ||
1288 | /* Define the codes that are matched by predicates in aux-output.c. */ | |
1289 | ||
1290 | #define PREDICATE_CODES \ | |
1291 | {"s_operand", { MEM }}, \ | |
1292 | {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \ | |
1293 | {"r_or_s_operand", { MEM, SUBREG, REG }}, \ | |
1294 | {"r_or_im8_operand", { CONST_INT, SUBREG, REG }}, \ | |
1295 | {"r_or_s_or_im8_operand", { MEM, SUBREG, REG, CONST_INT }}, \ | |
1296 | {"r_or_x_or_im16_operand", { MEM, SUBREG, REG, CONST_INT }}, \ | |
1297 | {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \ | |
1298 | {"const1_operand", { CONST_INT, CONST_DOUBLE }}, \ | |
1299 | {"tmxx_operand", { CONST_INT, MEM }}, | |
1300 | ||
1301 | ||
9db1d521 HP |
1302 | /* Constant Pool for all symbols operands which are changed with |
1303 | force_const_mem during insn generation (expand_insn). */ | |
1304 | ||
1305 | extern struct rtx_def *s390_pool_start_insn; | |
1306 | extern int s390_pool_count; | |
1307 | extern int s390_nr_constants; | |
1308 | ||
1309 | /* Function is splitted in chunk, if literal pool could overflow | |
1310 | Value need to be lowered, if problems with displacement overflow. */ | |
1311 | ||
1312 | #define S390_REL_MAX 55000 | |
1313 | #define S390_CHUNK_MAX 0x2000 | |
1314 | #define S390_CHUNK_OV 0x8000 | |
1315 | #define S390_POOL_MAX 0xe00 | |
1316 | ||
1317 | #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \ | |
1318 | { \ | |
1319 | register rtx insn; \ | |
1320 | struct pool_constant *pool; \ | |
1321 | \ | |
1322 | if (s390_pool_count == -1) \ | |
1323 | { \ | |
1324 | s390_nr_constants = 0; \ | |
1325 | for (pool = first_pool; pool; pool = pool->next) \ | |
1326 | if (pool->mark) s390_nr_constants++; \ | |
1327 | return; \ | |
1328 | } \ | |
1329 | if (first_pool == 0) { \ | |
1330 | s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \ | |
1331 | return; \ | |
1332 | } \ | |
1333 | for (pool = first_pool; pool; pool = pool->next) \ | |
1334 | pool->mark = 0; \ | |
1335 | \ | |
1336 | insn = s390_pool_start_insn; \ | |
1337 | \ | |
1338 | if (insn==NULL_RTX) \ | |
1339 | insn = get_insns (); \ | |
1340 | else \ | |
1341 | insn = NEXT_INSN (insn); \ | |
1342 | for (; insn; insn = NEXT_INSN (insn)) { \ | |
1343 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') { \ | |
1344 | if (s390_stop_dump_lit_p (insn)) { \ | |
1345 | mark_constants (PATTERN (insn)); \ | |
1346 | break; \ | |
1347 | } else \ | |
1348 | mark_constants (PATTERN (insn)); \ | |
1349 | } \ | |
1350 | } \ | |
1351 | \ | |
1352 | /* Mark entries referenced by other entries */ \ | |
1353 | for (pool = first_pool; pool; pool = pool->next) \ | |
1354 | if (pool->mark) \ | |
c8af3574 | 1355 | mark_constants (pool->constant); \ |
9db1d521 HP |
1356 | \ |
1357 | s390_asm_output_pool_prologue (FILE, FUNNAME, fndecl, size); \ | |
1358 | } | |
1359 | ||
1360 | /* We need to return, because otherwise the pool is deleted of the | |
1361 | constant pool after the first output. */ | |
1362 | ||
1363 | #define ASM_OUTPUT_POOL_EPILOGUE(FILE, FUNNAME, fndecl, size) return; | |
1364 | ||
1365 | #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \ | |
c8af3574 RH |
1366 | { \ |
1367 | if ((s390_pool_count == 0) || (s390_pool_count > 0 && LABELNO >= 0)) \ | |
1368 | { \ | |
1369 | fprintf (FILE, ".LC%d:\n", LABELNO); \ | |
1370 | LABELNO = ~LABELNO; \ | |
1371 | } \ | |
1372 | if (s390_pool_count > 0) \ | |
1373 | { \ | |
1374 | fprintf (FILE, ".LC%d_%X:\n", ~LABELNO, s390_pool_count); \ | |
1375 | } \ | |
1376 | \ | |
1377 | /* Output the value of the constant itself. */ \ | |
1378 | switch (GET_MODE_CLASS (MODE)) \ | |
1379 | { \ | |
1380 | case MODE_FLOAT: \ | |
1381 | if (GET_CODE (EXP) != CONST_DOUBLE) \ | |
1382 | abort (); \ | |
1383 | \ | |
1384 | memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (EXP), sizeof u); \ | |
1385 | assemble_real (u.d, MODE, ALIGN); \ | |
1386 | break; \ | |
1387 | \ | |
1388 | case MODE_INT: \ | |
1389 | case MODE_PARTIAL_INT: \ | |
1390 | if (flag_pic \ | |
1391 | && (GET_CODE (EXP) == CONST \ | |
1392 | || GET_CODE (EXP) == SYMBOL_REF \ | |
1393 | || GET_CODE (EXP) == LABEL_REF )) \ | |
1394 | { \ | |
1395 | fprintf (FILE, "%s\t",TARGET_64BIT ? ASM_QUAD : ASM_LONG); \ | |
1396 | s390_output_symbolic_const (FILE, EXP); \ | |
1397 | fputc ('\n', (FILE)); \ | |
1398 | } \ | |
1399 | else \ | |
1400 | assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \ | |
1401 | break; \ | |
1402 | \ | |
1403 | default: \ | |
1404 | abort (); \ | |
1405 | } \ | |
1406 | goto WIN; \ | |
9db1d521 HP |
1407 | } |
1408 | ||
1409 | #endif |