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39f12501 AO |
1 | /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001 |
2 | Free Software Foundation, Inc. | |
a1dba937 SC |
3 | |
4 | This file is free software; you can redistribute it and/or modify it | |
5 | under the terms of the GNU General Public License as published by the | |
6 | Free Software Foundation; either version 2, or (at your option) any | |
7 | later version. | |
8 | ||
9 | In addition to the permissions in the GNU General Public License, the | |
10 | Free Software Foundation gives you unlimited permission to link the | |
f7af368f JL |
11 | compiled version of this file into combinations with other programs, |
12 | and to distribute those combinations without any restriction coming | |
13 | from the use of this file. (The General Public License restrictions | |
14 | do apply in other respects; for example, they cover modification of | |
15 | the file, and distribution when not linked into a combine | |
16 | executable.) | |
a1dba937 SC |
17 | |
18 | This file is distributed in the hope that it will be useful, but | |
19 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
21 | General Public License for more details. | |
22 | ||
23 | You should have received a copy of the GNU General Public License | |
24 | along with this program; see the file COPYING. If not, write to | |
c15c9075 RK |
25 | the Free Software Foundation, 59 Temple Place - Suite 330, |
26 | Boston, MA 02111-1307, USA. */ | |
a1dba937 | 27 | |
7857f134 | 28 | !! libgcc routines for the Hitachi SH cpu. |
a1dba937 SC |
29 | !! Contributed by Steve Chamberlain. |
30 | !! sac@cygnus.com | |
31 | ||
b8b7ac24 JW |
32 | !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines |
33 | !! recoded in assembly by Toshiyasu Morita | |
34 | !! tm@netcom.com | |
a1dba937 | 35 | |
e430f738 R |
36 | /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and |
37 | ELF local label prefixes by J"orn Rennecke | |
38 | amylaar@cygnus.com */ | |
39 | ||
40 | #ifdef __ELF__ | |
41 | #define LOCAL(X) .L_##X | |
42 | #else | |
43 | #define LOCAL(X) L_##X | |
44 | #endif | |
45 | ||
93ca1662 NY |
46 | #ifdef __linux__ |
47 | #define GLOBAL(X) __##X | |
48 | #endif | |
49 | ||
acd50a92 NY |
50 | #ifndef GLOBAL |
51 | #define GLOBAL(X) ___##X | |
52 | #endif | |
53 | ||
a1dba937 | 54 | #ifdef L_ashiftrt |
acd50a92 NY |
55 | .global GLOBAL(ashiftrt_r4_0) |
56 | .global GLOBAL(ashiftrt_r4_1) | |
57 | .global GLOBAL(ashiftrt_r4_2) | |
58 | .global GLOBAL(ashiftrt_r4_3) | |
59 | .global GLOBAL(ashiftrt_r4_4) | |
60 | .global GLOBAL(ashiftrt_r4_5) | |
61 | .global GLOBAL(ashiftrt_r4_6) | |
62 | .global GLOBAL(ashiftrt_r4_7) | |
63 | .global GLOBAL(ashiftrt_r4_8) | |
64 | .global GLOBAL(ashiftrt_r4_9) | |
65 | .global GLOBAL(ashiftrt_r4_10) | |
66 | .global GLOBAL(ashiftrt_r4_11) | |
67 | .global GLOBAL(ashiftrt_r4_12) | |
68 | .global GLOBAL(ashiftrt_r4_13) | |
69 | .global GLOBAL(ashiftrt_r4_14) | |
70 | .global GLOBAL(ashiftrt_r4_15) | |
71 | .global GLOBAL(ashiftrt_r4_16) | |
72 | .global GLOBAL(ashiftrt_r4_17) | |
73 | .global GLOBAL(ashiftrt_r4_18) | |
74 | .global GLOBAL(ashiftrt_r4_19) | |
75 | .global GLOBAL(ashiftrt_r4_20) | |
76 | .global GLOBAL(ashiftrt_r4_21) | |
77 | .global GLOBAL(ashiftrt_r4_22) | |
78 | .global GLOBAL(ashiftrt_r4_23) | |
79 | .global GLOBAL(ashiftrt_r4_24) | |
80 | .global GLOBAL(ashiftrt_r4_25) | |
81 | .global GLOBAL(ashiftrt_r4_26) | |
82 | .global GLOBAL(ashiftrt_r4_27) | |
83 | .global GLOBAL(ashiftrt_r4_28) | |
84 | .global GLOBAL(ashiftrt_r4_29) | |
85 | .global GLOBAL(ashiftrt_r4_30) | |
86 | .global GLOBAL(ashiftrt_r4_31) | |
87 | .global GLOBAL(ashiftrt_r4_32) | |
a1dba937 | 88 | |
b8b7ac24 | 89 | .align 1 |
acd50a92 NY |
90 | GLOBAL(ashiftrt_r4_32): |
91 | GLOBAL(ashiftrt_r4_31): | |
b8b7ac24 JW |
92 | rotcl r4 |
93 | rts | |
94 | subc r4,r4 | |
95 | ||
acd50a92 | 96 | GLOBAL(ashiftrt_r4_30): |
a1dba937 | 97 | shar r4 |
acd50a92 | 98 | GLOBAL(ashiftrt_r4_29): |
a1dba937 | 99 | shar r4 |
acd50a92 | 100 | GLOBAL(ashiftrt_r4_28): |
a1dba937 | 101 | shar r4 |
acd50a92 | 102 | GLOBAL(ashiftrt_r4_27): |
a1dba937 | 103 | shar r4 |
acd50a92 | 104 | GLOBAL(ashiftrt_r4_26): |
a1dba937 | 105 | shar r4 |
acd50a92 | 106 | GLOBAL(ashiftrt_r4_25): |
a1dba937 | 107 | shar r4 |
acd50a92 | 108 | GLOBAL(ashiftrt_r4_24): |
b8b7ac24 JW |
109 | shlr16 r4 |
110 | shlr8 r4 | |
111 | rts | |
112 | exts.b r4,r4 | |
113 | ||
acd50a92 | 114 | GLOBAL(ashiftrt_r4_23): |
a1dba937 | 115 | shar r4 |
acd50a92 | 116 | GLOBAL(ashiftrt_r4_22): |
a1dba937 | 117 | shar r4 |
acd50a92 | 118 | GLOBAL(ashiftrt_r4_21): |
a1dba937 | 119 | shar r4 |
acd50a92 | 120 | GLOBAL(ashiftrt_r4_20): |
a1dba937 | 121 | shar r4 |
acd50a92 | 122 | GLOBAL(ashiftrt_r4_19): |
a1dba937 | 123 | shar r4 |
acd50a92 | 124 | GLOBAL(ashiftrt_r4_18): |
a1dba937 | 125 | shar r4 |
acd50a92 | 126 | GLOBAL(ashiftrt_r4_17): |
a1dba937 | 127 | shar r4 |
acd50a92 | 128 | GLOBAL(ashiftrt_r4_16): |
b8b7ac24 JW |
129 | shlr16 r4 |
130 | rts | |
131 | exts.w r4,r4 | |
132 | ||
acd50a92 | 133 | GLOBAL(ashiftrt_r4_15): |
a1dba937 | 134 | shar r4 |
acd50a92 | 135 | GLOBAL(ashiftrt_r4_14): |
a1dba937 | 136 | shar r4 |
acd50a92 | 137 | GLOBAL(ashiftrt_r4_13): |
a1dba937 | 138 | shar r4 |
acd50a92 | 139 | GLOBAL(ashiftrt_r4_12): |
a1dba937 | 140 | shar r4 |
acd50a92 | 141 | GLOBAL(ashiftrt_r4_11): |
a1dba937 | 142 | shar r4 |
acd50a92 | 143 | GLOBAL(ashiftrt_r4_10): |
a1dba937 | 144 | shar r4 |
acd50a92 | 145 | GLOBAL(ashiftrt_r4_9): |
a1dba937 | 146 | shar r4 |
acd50a92 | 147 | GLOBAL(ashiftrt_r4_8): |
a1dba937 | 148 | shar r4 |
acd50a92 | 149 | GLOBAL(ashiftrt_r4_7): |
a1dba937 | 150 | shar r4 |
acd50a92 | 151 | GLOBAL(ashiftrt_r4_6): |
a1dba937 | 152 | shar r4 |
acd50a92 | 153 | GLOBAL(ashiftrt_r4_5): |
a1dba937 | 154 | shar r4 |
acd50a92 | 155 | GLOBAL(ashiftrt_r4_4): |
a1dba937 | 156 | shar r4 |
acd50a92 | 157 | GLOBAL(ashiftrt_r4_3): |
a1dba937 | 158 | shar r4 |
acd50a92 | 159 | GLOBAL(ashiftrt_r4_2): |
a1dba937 | 160 | shar r4 |
acd50a92 | 161 | GLOBAL(ashiftrt_r4_1): |
a1dba937 SC |
162 | rts |
163 | shar r4 | |
164 | ||
acd50a92 | 165 | GLOBAL(ashiftrt_r4_0): |
a1dba937 | 166 | rts |
1c688cd7 | 167 | nop |
a1dba937 SC |
168 | #endif |
169 | ||
b8b7ac24 JW |
170 | #ifdef L_ashiftrt_n |
171 | ||
172 | ! | |
acd50a92 | 173 | ! GLOBAL(ashrsi3) |
b8b7ac24 JW |
174 | ! |
175 | ! Entry: | |
176 | ! | |
177 | ! r4: Value to shift | |
178 | ! r5: Shifts | |
179 | ! | |
180 | ! Exit: | |
181 | ! | |
182 | ! r0: Result | |
183 | ! | |
184 | ! Destroys: | |
185 | ! | |
25f5b13e | 186 | ! (none) |
b8b7ac24 JW |
187 | ! |
188 | ||
acd50a92 | 189 | .global GLOBAL(ashrsi3) |
b8b7ac24 | 190 | .align 2 |
acd50a92 | 191 | GLOBAL(ashrsi3): |
b8b7ac24 | 192 | mov #31,r0 |
e430f738 R |
193 | and r0,r5 |
194 | mova LOCAL(ashrsi3_table),r0 | |
25f5b13e | 195 | mov.b @(r0,r5),r5 |
e430f738 R |
196 | #ifdef __sh1__ |
197 | add r5,r0 | |
b8b7ac24 | 198 | jmp @r0 |
e430f738 R |
199 | #else |
200 | braf r5 | |
201 | #endif | |
b8b7ac24 JW |
202 | mov r4,r0 |
203 | ||
e430f738 R |
204 | .align 2 |
205 | LOCAL(ashrsi3_table): | |
206 | .byte LOCAL(ashrsi3_0)-LOCAL(ashrsi3_table) | |
207 | .byte LOCAL(ashrsi3_1)-LOCAL(ashrsi3_table) | |
208 | .byte LOCAL(ashrsi3_2)-LOCAL(ashrsi3_table) | |
209 | .byte LOCAL(ashrsi3_3)-LOCAL(ashrsi3_table) | |
210 | .byte LOCAL(ashrsi3_4)-LOCAL(ashrsi3_table) | |
211 | .byte LOCAL(ashrsi3_5)-LOCAL(ashrsi3_table) | |
212 | .byte LOCAL(ashrsi3_6)-LOCAL(ashrsi3_table) | |
213 | .byte LOCAL(ashrsi3_7)-LOCAL(ashrsi3_table) | |
214 | .byte LOCAL(ashrsi3_8)-LOCAL(ashrsi3_table) | |
215 | .byte LOCAL(ashrsi3_9)-LOCAL(ashrsi3_table) | |
216 | .byte LOCAL(ashrsi3_10)-LOCAL(ashrsi3_table) | |
217 | .byte LOCAL(ashrsi3_11)-LOCAL(ashrsi3_table) | |
218 | .byte LOCAL(ashrsi3_12)-LOCAL(ashrsi3_table) | |
219 | .byte LOCAL(ashrsi3_13)-LOCAL(ashrsi3_table) | |
220 | .byte LOCAL(ashrsi3_14)-LOCAL(ashrsi3_table) | |
221 | .byte LOCAL(ashrsi3_15)-LOCAL(ashrsi3_table) | |
222 | .byte LOCAL(ashrsi3_16)-LOCAL(ashrsi3_table) | |
223 | .byte LOCAL(ashrsi3_17)-LOCAL(ashrsi3_table) | |
224 | .byte LOCAL(ashrsi3_18)-LOCAL(ashrsi3_table) | |
225 | .byte LOCAL(ashrsi3_19)-LOCAL(ashrsi3_table) | |
226 | .byte LOCAL(ashrsi3_20)-LOCAL(ashrsi3_table) | |
227 | .byte LOCAL(ashrsi3_21)-LOCAL(ashrsi3_table) | |
228 | .byte LOCAL(ashrsi3_22)-LOCAL(ashrsi3_table) | |
229 | .byte LOCAL(ashrsi3_23)-LOCAL(ashrsi3_table) | |
230 | .byte LOCAL(ashrsi3_24)-LOCAL(ashrsi3_table) | |
231 | .byte LOCAL(ashrsi3_25)-LOCAL(ashrsi3_table) | |
232 | .byte LOCAL(ashrsi3_26)-LOCAL(ashrsi3_table) | |
233 | .byte LOCAL(ashrsi3_27)-LOCAL(ashrsi3_table) | |
234 | .byte LOCAL(ashrsi3_28)-LOCAL(ashrsi3_table) | |
235 | .byte LOCAL(ashrsi3_29)-LOCAL(ashrsi3_table) | |
236 | .byte LOCAL(ashrsi3_30)-LOCAL(ashrsi3_table) | |
237 | .byte LOCAL(ashrsi3_31)-LOCAL(ashrsi3_table) | |
238 | ||
239 | LOCAL(ashrsi3_31): | |
b8b7ac24 JW |
240 | rotcl r0 |
241 | rts | |
242 | subc r0,r0 | |
243 | ||
e430f738 | 244 | LOCAL(ashrsi3_30): |
b8b7ac24 | 245 | shar r0 |
e430f738 | 246 | LOCAL(ashrsi3_29): |
b8b7ac24 | 247 | shar r0 |
e430f738 | 248 | LOCAL(ashrsi3_28): |
b8b7ac24 | 249 | shar r0 |
e430f738 | 250 | LOCAL(ashrsi3_27): |
b8b7ac24 | 251 | shar r0 |
e430f738 | 252 | LOCAL(ashrsi3_26): |
b8b7ac24 | 253 | shar r0 |
e430f738 | 254 | LOCAL(ashrsi3_25): |
b8b7ac24 | 255 | shar r0 |
e430f738 | 256 | LOCAL(ashrsi3_24): |
b8b7ac24 JW |
257 | shlr16 r0 |
258 | shlr8 r0 | |
259 | rts | |
260 | exts.b r0,r0 | |
261 | ||
e430f738 | 262 | LOCAL(ashrsi3_23): |
b8b7ac24 | 263 | shar r0 |
e430f738 | 264 | LOCAL(ashrsi3_22): |
b8b7ac24 | 265 | shar r0 |
e430f738 | 266 | LOCAL(ashrsi3_21): |
b8b7ac24 | 267 | shar r0 |
e430f738 | 268 | LOCAL(ashrsi3_20): |
b8b7ac24 | 269 | shar r0 |
e430f738 | 270 | LOCAL(ashrsi3_19): |
b8b7ac24 | 271 | shar r0 |
e430f738 | 272 | LOCAL(ashrsi3_18): |
b8b7ac24 | 273 | shar r0 |
e430f738 | 274 | LOCAL(ashrsi3_17): |
b8b7ac24 | 275 | shar r0 |
e430f738 | 276 | LOCAL(ashrsi3_16): |
b8b7ac24 JW |
277 | shlr16 r0 |
278 | rts | |
279 | exts.w r0,r0 | |
280 | ||
e430f738 | 281 | LOCAL(ashrsi3_15): |
b8b7ac24 | 282 | shar r0 |
e430f738 | 283 | LOCAL(ashrsi3_14): |
b8b7ac24 | 284 | shar r0 |
e430f738 | 285 | LOCAL(ashrsi3_13): |
b8b7ac24 | 286 | shar r0 |
e430f738 | 287 | LOCAL(ashrsi3_12): |
b8b7ac24 | 288 | shar r0 |
e430f738 | 289 | LOCAL(ashrsi3_11): |
b8b7ac24 | 290 | shar r0 |
e430f738 | 291 | LOCAL(ashrsi3_10): |
b8b7ac24 | 292 | shar r0 |
e430f738 | 293 | LOCAL(ashrsi3_9): |
b8b7ac24 | 294 | shar r0 |
e430f738 | 295 | LOCAL(ashrsi3_8): |
b8b7ac24 | 296 | shar r0 |
e430f738 | 297 | LOCAL(ashrsi3_7): |
b8b7ac24 | 298 | shar r0 |
e430f738 | 299 | LOCAL(ashrsi3_6): |
b8b7ac24 | 300 | shar r0 |
e430f738 | 301 | LOCAL(ashrsi3_5): |
b8b7ac24 | 302 | shar r0 |
e430f738 | 303 | LOCAL(ashrsi3_4): |
b8b7ac24 | 304 | shar r0 |
e430f738 | 305 | LOCAL(ashrsi3_3): |
b8b7ac24 | 306 | shar r0 |
e430f738 | 307 | LOCAL(ashrsi3_2): |
b8b7ac24 | 308 | shar r0 |
e430f738 | 309 | LOCAL(ashrsi3_1): |
b8b7ac24 JW |
310 | rts |
311 | shar r0 | |
312 | ||
e430f738 | 313 | LOCAL(ashrsi3_0): |
b8b7ac24 JW |
314 | rts |
315 | nop | |
316 | ||
317 | #endif | |
318 | ||
319 | #ifdef L_ashiftlt | |
320 | ||
321 | ! | |
acd50a92 | 322 | ! GLOBAL(ashlsi3) |
b8b7ac24 JW |
323 | ! |
324 | ! Entry: | |
325 | ! | |
326 | ! r4: Value to shift | |
327 | ! r5: Shifts | |
328 | ! | |
329 | ! Exit: | |
330 | ! | |
331 | ! r0: Result | |
332 | ! | |
333 | ! Destroys: | |
334 | ! | |
25f5b13e | 335 | ! (none) |
b8b7ac24 | 336 | ! |
acd50a92 | 337 | .global GLOBAL(ashlsi3) |
b8b7ac24 | 338 | .align 2 |
acd50a92 | 339 | GLOBAL(ashlsi3): |
b8b7ac24 | 340 | mov #31,r0 |
e430f738 R |
341 | and r0,r5 |
342 | mova LOCAL(ashlsi3_table),r0 | |
25f5b13e | 343 | mov.b @(r0,r5),r5 |
e430f738 R |
344 | #ifdef __sh1__ |
345 | add r5,r0 | |
b8b7ac24 | 346 | jmp @r0 |
e430f738 R |
347 | #else |
348 | braf r5 | |
349 | #endif | |
b8b7ac24 JW |
350 | mov r4,r0 |
351 | ||
e430f738 R |
352 | .align 2 |
353 | LOCAL(ashlsi3_table): | |
354 | .byte LOCAL(ashlsi3_0)-LOCAL(ashlsi3_table) | |
355 | .byte LOCAL(ashlsi3_1)-LOCAL(ashlsi3_table) | |
356 | .byte LOCAL(ashlsi3_2)-LOCAL(ashlsi3_table) | |
357 | .byte LOCAL(ashlsi3_3)-LOCAL(ashlsi3_table) | |
358 | .byte LOCAL(ashlsi3_4)-LOCAL(ashlsi3_table) | |
359 | .byte LOCAL(ashlsi3_5)-LOCAL(ashlsi3_table) | |
360 | .byte LOCAL(ashlsi3_6)-LOCAL(ashlsi3_table) | |
361 | .byte LOCAL(ashlsi3_7)-LOCAL(ashlsi3_table) | |
362 | .byte LOCAL(ashlsi3_8)-LOCAL(ashlsi3_table) | |
363 | .byte LOCAL(ashlsi3_9)-LOCAL(ashlsi3_table) | |
364 | .byte LOCAL(ashlsi3_10)-LOCAL(ashlsi3_table) | |
365 | .byte LOCAL(ashlsi3_11)-LOCAL(ashlsi3_table) | |
366 | .byte LOCAL(ashlsi3_12)-LOCAL(ashlsi3_table) | |
367 | .byte LOCAL(ashlsi3_13)-LOCAL(ashlsi3_table) | |
368 | .byte LOCAL(ashlsi3_14)-LOCAL(ashlsi3_table) | |
369 | .byte LOCAL(ashlsi3_15)-LOCAL(ashlsi3_table) | |
370 | .byte LOCAL(ashlsi3_16)-LOCAL(ashlsi3_table) | |
371 | .byte LOCAL(ashlsi3_17)-LOCAL(ashlsi3_table) | |
372 | .byte LOCAL(ashlsi3_18)-LOCAL(ashlsi3_table) | |
373 | .byte LOCAL(ashlsi3_19)-LOCAL(ashlsi3_table) | |
374 | .byte LOCAL(ashlsi3_20)-LOCAL(ashlsi3_table) | |
375 | .byte LOCAL(ashlsi3_21)-LOCAL(ashlsi3_table) | |
376 | .byte LOCAL(ashlsi3_22)-LOCAL(ashlsi3_table) | |
377 | .byte LOCAL(ashlsi3_23)-LOCAL(ashlsi3_table) | |
378 | .byte LOCAL(ashlsi3_24)-LOCAL(ashlsi3_table) | |
379 | .byte LOCAL(ashlsi3_25)-LOCAL(ashlsi3_table) | |
380 | .byte LOCAL(ashlsi3_26)-LOCAL(ashlsi3_table) | |
381 | .byte LOCAL(ashlsi3_27)-LOCAL(ashlsi3_table) | |
382 | .byte LOCAL(ashlsi3_28)-LOCAL(ashlsi3_table) | |
383 | .byte LOCAL(ashlsi3_29)-LOCAL(ashlsi3_table) | |
384 | .byte LOCAL(ashlsi3_30)-LOCAL(ashlsi3_table) | |
385 | .byte LOCAL(ashlsi3_31)-LOCAL(ashlsi3_table) | |
386 | ||
387 | LOCAL(ashlsi3_6): | |
b8b7ac24 | 388 | shll2 r0 |
e430f738 | 389 | LOCAL(ashlsi3_4): |
b8b7ac24 | 390 | shll2 r0 |
e430f738 | 391 | LOCAL(ashlsi3_2): |
b8b7ac24 JW |
392 | rts |
393 | shll2 r0 | |
394 | ||
e430f738 | 395 | LOCAL(ashlsi3_7): |
b8b7ac24 | 396 | shll2 r0 |
e430f738 | 397 | LOCAL(ashlsi3_5): |
b8b7ac24 | 398 | shll2 r0 |
e430f738 | 399 | LOCAL(ashlsi3_3): |
b8b7ac24 | 400 | shll2 r0 |
e430f738 | 401 | LOCAL(ashlsi3_1): |
b8b7ac24 JW |
402 | rts |
403 | shll r0 | |
404 | ||
e430f738 | 405 | LOCAL(ashlsi3_14): |
b8b7ac24 | 406 | shll2 r0 |
e430f738 | 407 | LOCAL(ashlsi3_12): |
b8b7ac24 | 408 | shll2 r0 |
e430f738 | 409 | LOCAL(ashlsi3_10): |
b8b7ac24 | 410 | shll2 r0 |
e430f738 | 411 | LOCAL(ashlsi3_8): |
b8b7ac24 JW |
412 | rts |
413 | shll8 r0 | |
414 | ||
e430f738 | 415 | LOCAL(ashlsi3_15): |
b8b7ac24 | 416 | shll2 r0 |
e430f738 | 417 | LOCAL(ashlsi3_13): |
b8b7ac24 | 418 | shll2 r0 |
e430f738 | 419 | LOCAL(ashlsi3_11): |
b8b7ac24 | 420 | shll2 r0 |
e430f738 | 421 | LOCAL(ashlsi3_9): |
b8b7ac24 JW |
422 | shll8 r0 |
423 | rts | |
424 | shll r0 | |
425 | ||
e430f738 | 426 | LOCAL(ashlsi3_22): |
b8b7ac24 | 427 | shll2 r0 |
e430f738 | 428 | LOCAL(ashlsi3_20): |
b8b7ac24 | 429 | shll2 r0 |
e430f738 | 430 | LOCAL(ashlsi3_18): |
b8b7ac24 | 431 | shll2 r0 |
e430f738 | 432 | LOCAL(ashlsi3_16): |
b8b7ac24 JW |
433 | rts |
434 | shll16 r0 | |
435 | ||
e430f738 | 436 | LOCAL(ashlsi3_23): |
b8b7ac24 | 437 | shll2 r0 |
e430f738 | 438 | LOCAL(ashlsi3_21): |
b8b7ac24 | 439 | shll2 r0 |
e430f738 | 440 | LOCAL(ashlsi3_19): |
b8b7ac24 | 441 | shll2 r0 |
e430f738 | 442 | LOCAL(ashlsi3_17): |
b8b7ac24 JW |
443 | shll16 r0 |
444 | rts | |
445 | shll r0 | |
446 | ||
e430f738 | 447 | LOCAL(ashlsi3_30): |
b8b7ac24 | 448 | shll2 r0 |
e430f738 | 449 | LOCAL(ashlsi3_28): |
b8b7ac24 | 450 | shll2 r0 |
e430f738 | 451 | LOCAL(ashlsi3_26): |
b8b7ac24 | 452 | shll2 r0 |
e430f738 | 453 | LOCAL(ashlsi3_24): |
b8b7ac24 JW |
454 | shll16 r0 |
455 | rts | |
456 | shll8 r0 | |
457 | ||
e430f738 | 458 | LOCAL(ashlsi3_31): |
b8b7ac24 | 459 | shll2 r0 |
e430f738 | 460 | LOCAL(ashlsi3_29): |
b8b7ac24 | 461 | shll2 r0 |
e430f738 | 462 | LOCAL(ashlsi3_27): |
b8b7ac24 | 463 | shll2 r0 |
e430f738 | 464 | LOCAL(ashlsi3_25): |
b8b7ac24 JW |
465 | shll16 r0 |
466 | shll8 r0 | |
467 | rts | |
468 | shll r0 | |
469 | ||
e430f738 | 470 | LOCAL(ashlsi3_0): |
b8b7ac24 JW |
471 | rts |
472 | nop | |
473 | ||
474 | #endif | |
475 | ||
476 | #ifdef L_lshiftrt | |
477 | ||
478 | ! | |
acd50a92 | 479 | ! GLOBAL(lshrsi3) |
b8b7ac24 JW |
480 | ! |
481 | ! Entry: | |
482 | ! | |
483 | ! r4: Value to shift | |
484 | ! r5: Shifts | |
485 | ! | |
486 | ! Exit: | |
487 | ! | |
488 | ! r0: Result | |
489 | ! | |
490 | ! Destroys: | |
491 | ! | |
25f5b13e | 492 | ! (none) |
b8b7ac24 | 493 | ! |
acd50a92 | 494 | .global GLOBAL(lshrsi3) |
b8b7ac24 | 495 | .align 2 |
acd50a92 | 496 | GLOBAL(lshrsi3): |
b8b7ac24 | 497 | mov #31,r0 |
e430f738 R |
498 | and r0,r5 |
499 | mova LOCAL(lshrsi3_table),r0 | |
25f5b13e | 500 | mov.b @(r0,r5),r5 |
e430f738 R |
501 | #ifdef __sh1__ |
502 | add r5,r0 | |
b8b7ac24 | 503 | jmp @r0 |
e430f738 R |
504 | #else |
505 | braf r5 | |
506 | #endif | |
b8b7ac24 JW |
507 | mov r4,r0 |
508 | ||
e430f738 R |
509 | .align 2 |
510 | LOCAL(lshrsi3_table): | |
511 | .byte LOCAL(lshrsi3_0)-LOCAL(lshrsi3_table) | |
512 | .byte LOCAL(lshrsi3_1)-LOCAL(lshrsi3_table) | |
513 | .byte LOCAL(lshrsi3_2)-LOCAL(lshrsi3_table) | |
514 | .byte LOCAL(lshrsi3_3)-LOCAL(lshrsi3_table) | |
515 | .byte LOCAL(lshrsi3_4)-LOCAL(lshrsi3_table) | |
516 | .byte LOCAL(lshrsi3_5)-LOCAL(lshrsi3_table) | |
517 | .byte LOCAL(lshrsi3_6)-LOCAL(lshrsi3_table) | |
518 | .byte LOCAL(lshrsi3_7)-LOCAL(lshrsi3_table) | |
519 | .byte LOCAL(lshrsi3_8)-LOCAL(lshrsi3_table) | |
520 | .byte LOCAL(lshrsi3_9)-LOCAL(lshrsi3_table) | |
521 | .byte LOCAL(lshrsi3_10)-LOCAL(lshrsi3_table) | |
522 | .byte LOCAL(lshrsi3_11)-LOCAL(lshrsi3_table) | |
523 | .byte LOCAL(lshrsi3_12)-LOCAL(lshrsi3_table) | |
524 | .byte LOCAL(lshrsi3_13)-LOCAL(lshrsi3_table) | |
525 | .byte LOCAL(lshrsi3_14)-LOCAL(lshrsi3_table) | |
526 | .byte LOCAL(lshrsi3_15)-LOCAL(lshrsi3_table) | |
527 | .byte LOCAL(lshrsi3_16)-LOCAL(lshrsi3_table) | |
528 | .byte LOCAL(lshrsi3_17)-LOCAL(lshrsi3_table) | |
529 | .byte LOCAL(lshrsi3_18)-LOCAL(lshrsi3_table) | |
530 | .byte LOCAL(lshrsi3_19)-LOCAL(lshrsi3_table) | |
531 | .byte LOCAL(lshrsi3_20)-LOCAL(lshrsi3_table) | |
532 | .byte LOCAL(lshrsi3_21)-LOCAL(lshrsi3_table) | |
533 | .byte LOCAL(lshrsi3_22)-LOCAL(lshrsi3_table) | |
534 | .byte LOCAL(lshrsi3_23)-LOCAL(lshrsi3_table) | |
535 | .byte LOCAL(lshrsi3_24)-LOCAL(lshrsi3_table) | |
536 | .byte LOCAL(lshrsi3_25)-LOCAL(lshrsi3_table) | |
537 | .byte LOCAL(lshrsi3_26)-LOCAL(lshrsi3_table) | |
538 | .byte LOCAL(lshrsi3_27)-LOCAL(lshrsi3_table) | |
539 | .byte LOCAL(lshrsi3_28)-LOCAL(lshrsi3_table) | |
540 | .byte LOCAL(lshrsi3_29)-LOCAL(lshrsi3_table) | |
541 | .byte LOCAL(lshrsi3_30)-LOCAL(lshrsi3_table) | |
542 | .byte LOCAL(lshrsi3_31)-LOCAL(lshrsi3_table) | |
543 | ||
544 | LOCAL(lshrsi3_6): | |
b8b7ac24 | 545 | shlr2 r0 |
e430f738 | 546 | LOCAL(lshrsi3_4): |
b8b7ac24 | 547 | shlr2 r0 |
e430f738 | 548 | LOCAL(lshrsi3_2): |
b8b7ac24 JW |
549 | rts |
550 | shlr2 r0 | |
551 | ||
e430f738 | 552 | LOCAL(lshrsi3_7): |
b8b7ac24 | 553 | shlr2 r0 |
e430f738 | 554 | LOCAL(lshrsi3_5): |
b8b7ac24 | 555 | shlr2 r0 |
e430f738 | 556 | LOCAL(lshrsi3_3): |
b8b7ac24 | 557 | shlr2 r0 |
e430f738 | 558 | LOCAL(lshrsi3_1): |
b8b7ac24 JW |
559 | rts |
560 | shlr r0 | |
561 | ||
e430f738 | 562 | LOCAL(lshrsi3_14): |
b8b7ac24 | 563 | shlr2 r0 |
e430f738 | 564 | LOCAL(lshrsi3_12): |
b8b7ac24 | 565 | shlr2 r0 |
e430f738 | 566 | LOCAL(lshrsi3_10): |
b8b7ac24 | 567 | shlr2 r0 |
e430f738 | 568 | LOCAL(lshrsi3_8): |
b8b7ac24 JW |
569 | rts |
570 | shlr8 r0 | |
571 | ||
e430f738 | 572 | LOCAL(lshrsi3_15): |
b8b7ac24 | 573 | shlr2 r0 |
e430f738 | 574 | LOCAL(lshrsi3_13): |
b8b7ac24 | 575 | shlr2 r0 |
e430f738 | 576 | LOCAL(lshrsi3_11): |
b8b7ac24 | 577 | shlr2 r0 |
e430f738 | 578 | LOCAL(lshrsi3_9): |
b8b7ac24 JW |
579 | shlr8 r0 |
580 | rts | |
581 | shlr r0 | |
582 | ||
e430f738 | 583 | LOCAL(lshrsi3_22): |
b8b7ac24 | 584 | shlr2 r0 |
e430f738 | 585 | LOCAL(lshrsi3_20): |
b8b7ac24 | 586 | shlr2 r0 |
e430f738 | 587 | LOCAL(lshrsi3_18): |
b8b7ac24 | 588 | shlr2 r0 |
e430f738 | 589 | LOCAL(lshrsi3_16): |
b8b7ac24 JW |
590 | rts |
591 | shlr16 r0 | |
592 | ||
e430f738 | 593 | LOCAL(lshrsi3_23): |
b8b7ac24 | 594 | shlr2 r0 |
e430f738 | 595 | LOCAL(lshrsi3_21): |
b8b7ac24 | 596 | shlr2 r0 |
e430f738 | 597 | LOCAL(lshrsi3_19): |
b8b7ac24 | 598 | shlr2 r0 |
e430f738 | 599 | LOCAL(lshrsi3_17): |
b8b7ac24 JW |
600 | shlr16 r0 |
601 | rts | |
602 | shlr r0 | |
603 | ||
e430f738 | 604 | LOCAL(lshrsi3_30): |
b8b7ac24 | 605 | shlr2 r0 |
e430f738 | 606 | LOCAL(lshrsi3_28): |
b8b7ac24 | 607 | shlr2 r0 |
e430f738 | 608 | LOCAL(lshrsi3_26): |
b8b7ac24 | 609 | shlr2 r0 |
e430f738 | 610 | LOCAL(lshrsi3_24): |
b8b7ac24 JW |
611 | shlr16 r0 |
612 | rts | |
613 | shlr8 r0 | |
614 | ||
e430f738 | 615 | LOCAL(lshrsi3_31): |
b8b7ac24 | 616 | shlr2 r0 |
e430f738 | 617 | LOCAL(lshrsi3_29): |
b8b7ac24 | 618 | shlr2 r0 |
e430f738 | 619 | LOCAL(lshrsi3_27): |
b8b7ac24 | 620 | shlr2 r0 |
e430f738 | 621 | LOCAL(lshrsi3_25): |
b8b7ac24 JW |
622 | shlr16 r0 |
623 | shlr8 r0 | |
624 | rts | |
625 | shlr r0 | |
626 | ||
e430f738 | 627 | LOCAL(lshrsi3_0): |
b8b7ac24 JW |
628 | rts |
629 | nop | |
630 | ||
631 | #endif | |
632 | ||
a1dba937 SC |
633 | #ifdef L_movstr |
634 | .text | |
635 | ! done all the large groups, do the remainder | |
636 | ||
637 | ! jump to movstr+ | |
638 | done: | |
639 | add #64,r5 | |
acd50a92 | 640 | mova GLOBAL(movstrSI0),r0 |
a1dba937 SC |
641 | shll2 r6 |
642 | add r6,r0 | |
643 | jmp @r0 | |
b8b7ac24 | 644 | add #64,r4 |
a1dba937 | 645 | .align 4 |
acd50a92 NY |
646 | .global GLOBAL(movstrSI64) |
647 | GLOBAL(movstrSI64): | |
a1dba937 SC |
648 | mov.l @(60,r5),r0 |
649 | mov.l r0,@(60,r4) | |
acd50a92 NY |
650 | .global GLOBAL(movstrSI60) |
651 | GLOBAL(movstrSI60): | |
a1dba937 SC |
652 | mov.l @(56,r5),r0 |
653 | mov.l r0,@(56,r4) | |
acd50a92 NY |
654 | .global GLOBAL(movstrSI56) |
655 | GLOBAL(movstrSI56): | |
a1dba937 SC |
656 | mov.l @(52,r5),r0 |
657 | mov.l r0,@(52,r4) | |
acd50a92 NY |
658 | .global GLOBAL(movstrSI52) |
659 | GLOBAL(movstrSI52): | |
a1dba937 SC |
660 | mov.l @(48,r5),r0 |
661 | mov.l r0,@(48,r4) | |
acd50a92 NY |
662 | .global GLOBAL(movstrSI48) |
663 | GLOBAL(movstrSI48): | |
a1dba937 SC |
664 | mov.l @(44,r5),r0 |
665 | mov.l r0,@(44,r4) | |
acd50a92 NY |
666 | .global GLOBAL(movstrSI44) |
667 | GLOBAL(movstrSI44): | |
a1dba937 SC |
668 | mov.l @(40,r5),r0 |
669 | mov.l r0,@(40,r4) | |
acd50a92 NY |
670 | .global GLOBAL(movstrSI40) |
671 | GLOBAL(movstrSI40): | |
a1dba937 SC |
672 | mov.l @(36,r5),r0 |
673 | mov.l r0,@(36,r4) | |
acd50a92 NY |
674 | .global GLOBAL(movstrSI36) |
675 | GLOBAL(movstrSI36): | |
a1dba937 SC |
676 | mov.l @(32,r5),r0 |
677 | mov.l r0,@(32,r4) | |
acd50a92 NY |
678 | .global GLOBAL(movstrSI32) |
679 | GLOBAL(movstrSI32): | |
a1dba937 SC |
680 | mov.l @(28,r5),r0 |
681 | mov.l r0,@(28,r4) | |
acd50a92 NY |
682 | .global GLOBAL(movstrSI28) |
683 | GLOBAL(movstrSI28): | |
a1dba937 SC |
684 | mov.l @(24,r5),r0 |
685 | mov.l r0,@(24,r4) | |
acd50a92 NY |
686 | .global GLOBAL(movstrSI24) |
687 | GLOBAL(movstrSI24): | |
a1dba937 SC |
688 | mov.l @(20,r5),r0 |
689 | mov.l r0,@(20,r4) | |
acd50a92 NY |
690 | .global GLOBAL(movstrSI20) |
691 | GLOBAL(movstrSI20): | |
a1dba937 SC |
692 | mov.l @(16,r5),r0 |
693 | mov.l r0,@(16,r4) | |
acd50a92 NY |
694 | .global GLOBAL(movstrSI16) |
695 | GLOBAL(movstrSI16): | |
a1dba937 SC |
696 | mov.l @(12,r5),r0 |
697 | mov.l r0,@(12,r4) | |
acd50a92 NY |
698 | .global GLOBAL(movstrSI12) |
699 | GLOBAL(movstrSI12): | |
a1dba937 SC |
700 | mov.l @(8,r5),r0 |
701 | mov.l r0,@(8,r4) | |
acd50a92 NY |
702 | .global GLOBAL(movstrSI8) |
703 | GLOBAL(movstrSI8): | |
a1dba937 SC |
704 | mov.l @(4,r5),r0 |
705 | mov.l r0,@(4,r4) | |
acd50a92 NY |
706 | .global GLOBAL(movstrSI4) |
707 | GLOBAL(movstrSI4): | |
a1dba937 SC |
708 | mov.l @(0,r5),r0 |
709 | mov.l r0,@(0,r4) | |
acd50a92 | 710 | GLOBAL(movstrSI0): |
a1dba937 | 711 | rts |
b28f69a0 | 712 | nop |
a1dba937 SC |
713 | |
714 | .align 4 | |
715 | ||
acd50a92 NY |
716 | .global GLOBAL(movstr) |
717 | GLOBAL(movstr): | |
a1dba937 SC |
718 | mov.l @(60,r5),r0 |
719 | mov.l r0,@(60,r4) | |
720 | ||
721 | mov.l @(56,r5),r0 | |
722 | mov.l r0,@(56,r4) | |
723 | ||
724 | mov.l @(52,r5),r0 | |
725 | mov.l r0,@(52,r4) | |
726 | ||
727 | mov.l @(48,r5),r0 | |
728 | mov.l r0,@(48,r4) | |
729 | ||
730 | mov.l @(44,r5),r0 | |
731 | mov.l r0,@(44,r4) | |
732 | ||
733 | mov.l @(40,r5),r0 | |
734 | mov.l r0,@(40,r4) | |
735 | ||
736 | mov.l @(36,r5),r0 | |
737 | mov.l r0,@(36,r4) | |
738 | ||
739 | mov.l @(32,r5),r0 | |
740 | mov.l r0,@(32,r4) | |
741 | ||
742 | mov.l @(28,r5),r0 | |
743 | mov.l r0,@(28,r4) | |
744 | ||
745 | mov.l @(24,r5),r0 | |
746 | mov.l r0,@(24,r4) | |
747 | ||
748 | mov.l @(20,r5),r0 | |
749 | mov.l r0,@(20,r4) | |
750 | ||
751 | mov.l @(16,r5),r0 | |
752 | mov.l r0,@(16,r4) | |
753 | ||
754 | mov.l @(12,r5),r0 | |
755 | mov.l r0,@(12,r4) | |
756 | ||
757 | mov.l @(8,r5),r0 | |
758 | mov.l r0,@(8,r4) | |
759 | ||
760 | mov.l @(4,r5),r0 | |
761 | mov.l r0,@(4,r4) | |
762 | ||
763 | mov.l @(0,r5),r0 | |
764 | mov.l r0,@(0,r4) | |
765 | ||
766 | add #-16,r6 | |
767 | cmp/pl r6 | |
768 | bf done | |
769 | ||
770 | add #64,r5 | |
acd50a92 | 771 | bra GLOBAL(movstr) |
a1dba937 SC |
772 | add #64,r4 |
773 | #endif | |
774 | ||
225e4f43 | 775 | #ifdef L_movstr_i4 |
225e4f43 | 776 | .text |
acd50a92 NY |
777 | .global GLOBAL(movstr_i4_even) |
778 | .global GLOBAL(movstr_i4_odd) | |
779 | .global GLOBAL(movstrSI12_i4) | |
225e4f43 R |
780 | |
781 | .p2align 5 | |
782 | L_movstr_2mod4_end: | |
783 | mov.l r0,@(16,r4) | |
784 | rts | |
785 | mov.l r1,@(20,r4) | |
786 | ||
787 | .p2align 2 | |
788 | ||
acd50a92 | 789 | GLOBAL(movstr_i4_odd): |
225e4f43 R |
790 | mov.l @r5+,r1 |
791 | add #-4,r4 | |
792 | mov.l @r5+,r2 | |
793 | mov.l @r5+,r3 | |
794 | mov.l r1,@(4,r4) | |
795 | mov.l r2,@(8,r4) | |
796 | ||
797 | L_movstr_loop: | |
798 | mov.l r3,@(12,r4) | |
799 | dt r6 | |
800 | mov.l @r5+,r0 | |
801 | bt/s L_movstr_2mod4_end | |
802 | mov.l @r5+,r1 | |
803 | add #16,r4 | |
804 | L_movstr_start_even: | |
805 | mov.l @r5+,r2 | |
806 | mov.l @r5+,r3 | |
807 | mov.l r0,@r4 | |
808 | dt r6 | |
809 | mov.l r1,@(4,r4) | |
810 | bf/s L_movstr_loop | |
811 | mov.l r2,@(8,r4) | |
812 | rts | |
813 | mov.l r3,@(12,r4) | |
814 | ||
acd50a92 | 815 | GLOBAL(movstr_i4_even): |
225e4f43 R |
816 | mov.l @r5+,r0 |
817 | bra L_movstr_start_even | |
818 | mov.l @r5+,r1 | |
819 | ||
820 | .p2align 4 | |
acd50a92 | 821 | GLOBAL(movstrSI12_i4): |
225e4f43 R |
822 | mov.l @r5,r0 |
823 | mov.l @(4,r5),r1 | |
824 | mov.l @(8,r5),r2 | |
825 | mov.l r0,@r4 | |
826 | mov.l r1,@(4,r4) | |
827 | rts | |
828 | mov.l r2,@(8,r4) | |
225e4f43 R |
829 | #endif |
830 | ||
a1dba937 SC |
831 | #ifdef L_mulsi3 |
832 | ||
833 | ||
acd50a92 | 834 | .global GLOBAL(mulsi3) |
a1dba937 SC |
835 | |
836 | ! r4 = aabb | |
837 | ! r5 = ccdd | |
838 | ! r0 = aabb*ccdd via partial products | |
839 | ! | |
840 | ! if aa == 0 and cc = 0 | |
841 | ! r0 = bb*dd | |
842 | ! | |
843 | ! else | |
844 | ! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536) | |
845 | ! | |
846 | ||
acd50a92 | 847 | GLOBAL(mulsi3): |
e9a9e960 | 848 | mulu.w r4,r5 ! multiply the lsws macl=bb*dd |
a1dba937 SC |
849 | mov r5,r3 ! r3 = ccdd |
850 | swap.w r4,r2 ! r2 = bbaa | |
851 | xtrct r2,r3 ! r3 = aacc | |
852 | tst r3,r3 ! msws zero ? | |
b8b7ac24 | 853 | bf hiset |
abc95ed3 | 854 | rts ! yes - then we have the answer |
a1dba937 SC |
855 | sts macl,r0 |
856 | ||
857 | hiset: sts macl,r0 ! r0 = bb*dd | |
e9a9e960 | 858 | mulu.w r2,r5 ! brewing macl = aa*dd |
a1dba937 | 859 | sts macl,r1 |
e9a9e960 | 860 | mulu.w r3,r4 ! brewing macl = cc*bb |
b8b7ac24 | 861 | sts macl,r2 |
a1dba937 SC |
862 | add r1,r2 |
863 | shll16 r2 | |
864 | rts | |
865 | add r2,r0 | |
b8b7ac24 JW |
866 | |
867 | ||
868 | #endif | |
225e4f43 | 869 | #ifdef L_sdivsi3_i4 |
a1dba937 SC |
870 | .title "SH DIVIDE" |
871 | !! 4 byte integer Divide code for the Hitachi SH | |
225e4f43 R |
872 | #ifdef __SH4__ |
873 | !! args in r4 and r5, result in fpul, clobber dr0, dr2 | |
874 | ||
acd50a92 NY |
875 | .global GLOBAL(sdivsi3_i4) |
876 | GLOBAL(sdivsi3_i4): | |
225e4f43 R |
877 | lds r4,fpul |
878 | float fpul,dr0 | |
879 | lds r5,fpul | |
880 | float fpul,dr2 | |
881 | fdiv dr2,dr0 | |
882 | rts | |
883 | ftrc dr0,fpul | |
884 | ||
885 | #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) | |
886 | !! args in r4 and r5, result in fpul, clobber r2, dr0, dr2 | |
887 | ||
acd50a92 NY |
888 | .global GLOBAL(sdivsi3_i4) |
889 | GLOBAL(sdivsi3_i4): | |
225e4f43 R |
890 | sts.l fpscr,@-r15 |
891 | mov #8,r2 | |
892 | swap.w r2,r2 | |
893 | lds r2,fpscr | |
894 | lds r4,fpul | |
895 | float fpul,dr0 | |
896 | lds r5,fpul | |
897 | float fpul,dr2 | |
898 | fdiv dr2,dr0 | |
899 | ftrc dr0,fpul | |
900 | rts | |
901 | lds.l @r15+,fpscr | |
902 | ||
903 | #endif /* ! __SH4__ */ | |
904 | #endif | |
905 | ||
906 | #ifdef L_sdivsi3 | |
907 | /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with | |
908 | sh3e code. */ | |
93ca1662 | 909 | #if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) |
a1dba937 SC |
910 | !! |
911 | !! Steve Chamberlain | |
912 | !! sac@cygnus.com | |
913 | !! | |
914 | !! | |
915 | ||
916 | !! args in r4 and r5, result in r0 clobber r1,r2,r3 | |
917 | ||
acd50a92 NY |
918 | .global GLOBAL(sdivsi3) |
919 | GLOBAL(sdivsi3): | |
a1dba937 SC |
920 | mov r4,r1 |
921 | mov r5,r0 | |
b8b7ac24 | 922 | |
a1dba937 SC |
923 | tst r0,r0 |
924 | bt div0 | |
925 | mov #0,r2 | |
926 | div0s r2,r1 | |
927 | subc r3,r3 | |
928 | subc r2,r1 | |
929 | div0s r0,r3 | |
930 | rotcl r1 | |
931 | div1 r0,r3 | |
932 | rotcl r1 | |
933 | div1 r0,r3 | |
934 | rotcl r1 | |
935 | div1 r0,r3 | |
936 | rotcl r1 | |
937 | div1 r0,r3 | |
938 | rotcl r1 | |
939 | div1 r0,r3 | |
940 | rotcl r1 | |
941 | div1 r0,r3 | |
942 | rotcl r1 | |
943 | div1 r0,r3 | |
944 | rotcl r1 | |
945 | div1 r0,r3 | |
946 | rotcl r1 | |
947 | div1 r0,r3 | |
948 | rotcl r1 | |
949 | div1 r0,r3 | |
950 | rotcl r1 | |
951 | div1 r0,r3 | |
952 | rotcl r1 | |
953 | div1 r0,r3 | |
954 | rotcl r1 | |
955 | div1 r0,r3 | |
956 | rotcl r1 | |
957 | div1 r0,r3 | |
958 | rotcl r1 | |
959 | div1 r0,r3 | |
960 | rotcl r1 | |
961 | div1 r0,r3 | |
962 | rotcl r1 | |
963 | div1 r0,r3 | |
964 | rotcl r1 | |
965 | div1 r0,r3 | |
966 | rotcl r1 | |
967 | div1 r0,r3 | |
968 | rotcl r1 | |
969 | div1 r0,r3 | |
970 | rotcl r1 | |
971 | div1 r0,r3 | |
972 | rotcl r1 | |
973 | div1 r0,r3 | |
974 | rotcl r1 | |
975 | div1 r0,r3 | |
976 | rotcl r1 | |
977 | div1 r0,r3 | |
978 | rotcl r1 | |
979 | div1 r0,r3 | |
980 | rotcl r1 | |
981 | div1 r0,r3 | |
982 | rotcl r1 | |
983 | div1 r0,r3 | |
984 | rotcl r1 | |
985 | div1 r0,r3 | |
986 | rotcl r1 | |
987 | div1 r0,r3 | |
988 | rotcl r1 | |
989 | div1 r0,r3 | |
990 | rotcl r1 | |
991 | div1 r0,r3 | |
992 | rotcl r1 | |
993 | div1 r0,r3 | |
994 | rotcl r1 | |
995 | addc r2,r1 | |
b8b7ac24 | 996 | rts |
a1dba937 SC |
997 | mov r1,r0 |
998 | ||
b8b7ac24 | 999 | |
a1dba937 SC |
1000 | div0: rts |
1001 | mov #0,r0 | |
1002 | ||
225e4f43 | 1003 | #endif /* ! __SH4__ */ |
a1dba937 | 1004 | #endif |
225e4f43 | 1005 | #ifdef L_udivsi3_i4 |
a1dba937 SC |
1006 | |
1007 | .title "SH DIVIDE" | |
1008 | !! 4 byte integer Divide code for the Hitachi SH | |
225e4f43 R |
1009 | #ifdef __SH4__ |
1010 | !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4 | |
1011 | ||
acd50a92 NY |
1012 | .global GLOBAL(udivsi3_i4) |
1013 | GLOBAL(udivsi3_i4): | |
225e4f43 R |
1014 | mov #1,r1 |
1015 | cmp/hi r1,r5 | |
1016 | bf trivial | |
1017 | rotr r1 | |
1018 | xor r1,r4 | |
1019 | lds r4,fpul | |
1020 | mova L1,r0 | |
1021 | #ifdef FMOVD_WORKS | |
1022 | fmov.d @r0+,dr4 | |
1023 | #else | |
1024 | #ifdef __LITTLE_ENDIAN__ | |
1025 | fmov.s @r0+,fr5 | |
1026 | fmov.s @r0,fr4 | |
1027 | #else | |
1028 | fmov.s @r0+,fr4 | |
1029 | fmov.s @r0,fr5 | |
1030 | #endif | |
1031 | #endif | |
1032 | float fpul,dr0 | |
1033 | xor r1,r5 | |
1034 | lds r5,fpul | |
1035 | float fpul,dr2 | |
1036 | fadd dr4,dr0 | |
1037 | fadd dr4,dr2 | |
1038 | fdiv dr2,dr0 | |
1039 | rts | |
1040 | ftrc dr0,fpul | |
1041 | ||
1042 | trivial: | |
1043 | rts | |
1044 | lds r4,fpul | |
1045 | ||
1046 | .align 2 | |
2e4b78f6 R |
1047 | #ifdef FMOVD_WORKS |
1048 | .align 3 ! make double below 8 byte aligned. | |
1049 | #endif | |
225e4f43 R |
1050 | L1: |
1051 | .double 2147483648 | |
1052 | ||
1053 | #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) | |
1054 | !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4 | |
1055 | ||
acd50a92 NY |
1056 | .global GLOBAL(udivsi3_i4) |
1057 | GLOBAL(udivsi3_i4): | |
225e4f43 R |
1058 | mov #1,r1 |
1059 | cmp/hi r1,r5 | |
1060 | bf trivial | |
1061 | sts.l fpscr,@-r15 | |
1062 | mova L1,r0 | |
1063 | lds.l @r0+,fpscr | |
1064 | rotr r1 | |
1065 | xor r1,r4 | |
1066 | lds r4,fpul | |
1067 | #ifdef FMOVD_WORKS | |
1068 | fmov.d @r0+,dr4 | |
1069 | #else | |
1070 | #ifdef __LITTLE_ENDIAN__ | |
1071 | fmov.s @r0+,fr5 | |
1072 | fmov.s @r0,fr4 | |
1073 | #else | |
1074 | fmov.s @r0+,fr4 | |
1075 | fmov.s @r0,fr5 | |
1076 | #endif | |
1077 | #endif | |
1078 | float fpul,dr0 | |
1079 | xor r1,r5 | |
1080 | lds r5,fpul | |
1081 | float fpul,dr2 | |
1082 | fadd dr4,dr0 | |
1083 | fadd dr4,dr2 | |
1084 | fdiv dr2,dr0 | |
1085 | ftrc dr0,fpul | |
1086 | rts | |
1087 | lds.l @r15+,fpscr | |
1088 | ||
2e4b78f6 R |
1089 | #ifdef FMOVD_WORKS |
1090 | .align 3 ! make double below 8 byte aligned. | |
1091 | #endif | |
225e4f43 R |
1092 | trivial: |
1093 | rts | |
1094 | lds r4,fpul | |
1095 | ||
1096 | .align 2 | |
1097 | L1: | |
05bca102 | 1098 | #ifndef FMOVD_WORKS |
225e4f43 R |
1099 | .long 0x80000 |
1100 | #else | |
1101 | .long 0x180000 | |
1102 | #endif | |
1103 | .double 2147483648 | |
1104 | ||
1105 | #endif /* ! __SH4__ */ | |
1106 | #endif | |
1107 | ||
1108 | #ifdef L_udivsi3 | |
1109 | /* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with | |
1110 | sh3e code. */ | |
93ca1662 | 1111 | #if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) |
a1dba937 SC |
1112 | !! |
1113 | !! Steve Chamberlain | |
1114 | !! sac@cygnus.com | |
1115 | !! | |
b8b7ac24 | 1116 | !! |
a1dba937 | 1117 | |
9ff5b60d | 1118 | !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit |
acd50a92 | 1119 | .global GLOBAL(udivsi3) |
a1dba937 | 1120 | |
acd50a92 | 1121 | GLOBAL(udivsi3): |
a1dba937 SC |
1122 | longway: |
1123 | mov #0,r0 | |
b8b7ac24 JW |
1124 | div0u |
1125 | ! get one bit from the msb of the numerator into the T | |
a1dba937 SC |
1126 | ! bit and divide it by whats in r5. Put the answer bit |
1127 | ! into the T bit so it can come out again at the bottom | |
1128 | ||
b8b7ac24 | 1129 | rotcl r4 ; div1 r5,r0 |
a1dba937 SC |
1130 | rotcl r4 ; div1 r5,r0 |
1131 | rotcl r4 ; div1 r5,r0 | |
1132 | rotcl r4 ; div1 r5,r0 | |
1133 | rotcl r4 ; div1 r5,r0 | |
1134 | rotcl r4 ; div1 r5,r0 | |
1135 | rotcl r4 ; div1 r5,r0 | |
1136 | rotcl r4 ; div1 r5,r0 | |
1137 | ||
1138 | rotcl r4 ; div1 r5,r0 | |
1139 | rotcl r4 ; div1 r5,r0 | |
1140 | rotcl r4 ; div1 r5,r0 | |
1141 | rotcl r4 ; div1 r5,r0 | |
1142 | rotcl r4 ; div1 r5,r0 | |
1143 | rotcl r4 ; div1 r5,r0 | |
1144 | rotcl r4 ; div1 r5,r0 | |
1145 | rotcl r4 ; div1 r5,r0 | |
1146 | shortway: | |
1147 | rotcl r4 ; div1 r5,r0 | |
1148 | rotcl r4 ; div1 r5,r0 | |
1149 | rotcl r4 ; div1 r5,r0 | |
1150 | rotcl r4 ; div1 r5,r0 | |
1151 | rotcl r4 ; div1 r5,r0 | |
1152 | rotcl r4 ; div1 r5,r0 | |
1153 | rotcl r4 ; div1 r5,r0 | |
1154 | rotcl r4 ; div1 r5,r0 | |
1155 | ||
1156 | vshortway: | |
1157 | rotcl r4 ; div1 r5,r0 | |
1158 | rotcl r4 ; div1 r5,r0 | |
1159 | rotcl r4 ; div1 r5,r0 | |
1160 | rotcl r4 ; div1 r5,r0 | |
1161 | rotcl r4 ; div1 r5,r0 | |
1162 | rotcl r4 ; div1 r5,r0 | |
1163 | rotcl r4 ; div1 r5,r0 | |
1164 | rotcl r4 ; div1 r5,r0 | |
b8b7ac24 | 1165 | rotcl r4 |
a1dba937 SC |
1166 | ret: rts |
1167 | mov r4,r0 | |
1168 | ||
225e4f43 | 1169 | #endif /* __SH4__ */ |
a1dba937 | 1170 | #endif |
e430f738 | 1171 | #ifdef L_set_fpscr |
225e4f43 | 1172 | #if defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) |
acd50a92 NY |
1173 | .global GLOBAL(set_fpscr) |
1174 | GLOBAL(set_fpscr): | |
e430f738 | 1175 | lds r4,fpscr |
acd50a92 | 1176 | mov.l LOCAL(set_fpscr_L1),r1 |
e430f738 R |
1177 | swap.w r4,r0 |
1178 | or #24,r0 | |
225e4f43 | 1179 | #ifndef FMOVD_WORKS |
e430f738 | 1180 | xor #16,r0 |
225e4f43 R |
1181 | #endif |
1182 | #if defined(__SH4__) | |
1183 | swap.w r0,r3 | |
1184 | mov.l r3,@(4,r1) | |
1185 | #else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */ | |
e430f738 R |
1186 | swap.w r0,r2 |
1187 | mov.l r2,@r1 | |
225e4f43 R |
1188 | #endif |
1189 | #ifndef FMOVD_WORKS | |
e430f738 | 1190 | xor #8,r0 |
225e4f43 R |
1191 | #else |
1192 | xor #24,r0 | |
1193 | #endif | |
1194 | #if defined(__SH4__) | |
1195 | swap.w r0,r2 | |
1196 | rts | |
1197 | mov.l r2,@r1 | |
1198 | #else /* defined(__SH3E__) || defined(__SH4_SINGLE*__) */ | |
e430f738 R |
1199 | swap.w r0,r3 |
1200 | rts | |
1201 | mov.l r3,@(4,r1) | |
225e4f43 | 1202 | #endif |
e430f738 | 1203 | .align 2 |
acd50a92 NY |
1204 | LOCAL(set_fpscr_L1): |
1205 | .long GLOBAL(fpscr_values) | |
e430f738 | 1206 | #ifdef __ELF__ |
acd50a92 | 1207 | .comm GLOBAL(fpscr_values),8,4 |
e430f738 | 1208 | #else |
acd50a92 | 1209 | .comm GLOBAL(fpscr_values),8 |
e430f738 | 1210 | #endif /* ELF */ |
225e4f43 | 1211 | #endif /* SH3E / SH4 */ |
e430f738 | 1212 | #endif /* L_set_fpscr */ |
93ca1662 NY |
1213 | #ifdef L_ic_invalidate |
1214 | #if defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) | |
1215 | .global GLOBAL(ic_invalidate) | |
1216 | GLOBAL(ic_invalidate): | |
1217 | ocbwb @r4 | |
1218 | mova 0f,r0 | |
1219 | mov.w 1f,r1 | |
1220 | sub r0,r4 | |
1221 | and r1,r4 | |
1222 | add #4,r4 | |
1223 | braf r4 | |
1224 | nop | |
1225 | 1: | |
1226 | .short 0x1fe0 | |
1227 | nop | |
1228 | 0: | |
1229 | .rept 2048 | |
1230 | rts | |
1231 | nop | |
1232 | .endr | |
1233 | #endif /* SH4 */ | |
1234 | #endif /* L_ic_invalidate */ |